On Monday 12 June 2006 19:50, you wrote: > There seems to be some misunderstanding here. The SPI PROM that is > connected to the small FPGA is programmed with boot code (VGA boot > or Unix Console code). It does not hold the FPGA configuration. > > The FPGA configuration EEPROM for the small FPGA is contained > in the FPGA itself. This integrated EEPROM can not be accessed > from the internals of the FPGA, but must be programmed via the > JTAG interface. Therefore it can not be tampered with by broken > software, because there is no way to get from PCI to internal > EEPROM. >
Oops, my bad. Sorry for the confusion! That'll teach me to read a datasheet I suppose. :P Peter -- Quake II build tools maintainer http://tinyurl.com/fkldd v2sw6YShw7$ln5pr6ck3ma8u6/8Lw3+2m0l7Ci6e4+8t4Eb8Aen5+6g6Pa2Xs5MSr5p4 hackerkey.com
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