Yes, the above binary locks oocd out. However, using the mbed tool I can still flash the board (with the drag and drop method).
I agree, it "should" be open-drain. There is a 10k pullup, but clearly on my board something fights against it. Maybe the app configures that I/O line with a pull-down? I will add a stronger pull-up to see what happens. I also have to retract my earlier statement. I still had that small patch that forced the rst line down in my code. That's what made the rst line toggle. I attached my openocd.cfg file. All I do to run openocd is: openocd -f openocd.cfg I saw that you added a LOG_INFO statement if we connect under reset. I don't see that one in my output: $ openocd -f ../../openocd.cfg Open On-Chip Debugger 0.8.0-dev-00175-gd770a46 (2013-09-18-19:23) Licensed under GNU GPL v2 For bug reports, read http://openocd.sourceforge.net/doc/doxygen/bugs.html srst_only separate srst_nogate srst_open_drain connect_deassert_srst Info : only one transport option; autoselect 'cmsis-dap' Info : CMSIS-DAP: SWD Supported Info : CMSIS-DAP: Interface Initialised (SWD) adapter speed: 1000 kHz Warn : Interface already configured, ignoring Info : add flash_bank kinetis MKL25Z128VLK4.flash cortex_m reset_config sysresetreq Info : CMSIS-DAP: FW Version = 1.0 Info : SWCLK/TCK = 0 SWDIO/TMS = 1 TDI = 0 TDO = 0 nTRST = 0 nRESET = 1 Info : DAP_SWJ Sequence (reset: 50+ '1' followed by 0) Info : CMSIS-DAP: Interface ready Info : clock speed 1000 kHz Info : IDCODE 0x0bc11477 Error: CMSIS-DAP: Block Read Error (0x04) Info : MKL25Z128VLK4.cpu: hardware has 2 breakpoints, 0 watchpoints Error: CMSIS-DAP: Read Error (0x04) Polling target MKL25Z128VLK4.cpu failed, GDB will be halted. Polling again in 100ms Polling target MKL25Z128VLK4.cpu succeeded again Error: CMSIS-DAP: Read Error (0x04) - Thomas On Thu, Sep 19, 2013 at 10:29 AM, Spencer Oliver <s...@spen-soft.co.uk>wrote: > On 19 September 2013 17:27, Spencer Oliver <s...@spen-soft.co.uk> wrote: > > On 19 September 2013 17:20, Thomas Schmid <thomas.sch...@gmail.com> > wrote: > >> Spencer, > >> > >> Your patch compiles, and it pulls down the reset line. However, I > noticed > >> something else. The Reset line doesn't get pulled up all the way. It is > >> stuck at 2V, instead of the 3.3 that it should be at. > >> > > > > I will look into that. > > > > according to the docs, srst is supposed to be open-drain. > > Spen >
openocd.cfg
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