Hi, On Tue, Mar 24, 2015 at 11:26:22AM +0100, SevenW wrote: > For a write up see my blog, section "hard wired reset" > http://www.sevenwatt.com/main/nucleo-stlink-for-lpc8xx-behind-the-scenes/
I think this is confusing: " 0.9.0 cfg hla newtap $_CHIPNAME cpu -expected-id $_CPUTAPID target create $_TARGETNAME hla_target -chain-position $_TARGETNAME " It was the old way actually, pre-0.8.0. With the current code swj_newdap and target create cortex_m should work just fine, out of the box. If there're any issues with that, please report. Regarding the idcode, can you please tell which lpc8xx parts have that 0x0bc11477 code? All of them? Your suggestion to use "reset init" command might lead to issues too, IMHO, as the target firmware is not expecting to run with PLL etc configured. gdb flash write end hook already does "reset halt" by default which seems to be appropriate. If it doesn't work for some reason, probably it's worth investigating, please share your -d3 log etc. -- Be free, use free (http://www.gnu.org/philosophy/free-sw.html) software! mailto:fercer...@gmail.com ------------------------------------------------------------------------------ Dive into the World of Parallel Programming The Go Parallel Website, sponsored by Intel and developed in partnership with Slashdot Media, is your hub for all things parallel software development, from weekly thought leadership blogs to news, videos, case studies, tutorials and more. Take a look and join the conversation now. http://goparallel.sourceforge.net/ _______________________________________________ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
