Do not be so focused to a reset signal on target connecting.
Reset is not pulsed just because OpenOCD init command fails before
script reads a reset command.
Origin of the problem is bad read from DP. Recheck cabling and
compatibility of cfg and busblaster CPLD.
I have no experience with busblaster, no more clues from me.
Tom
On 26.3.2015 23:59, Michael Schwingen wrote:
On 26.03.2015 08:21, Tomas Vanek wrote:
Michael,
If srst wiring of your LPC812 board is correct, there might be
another reason that srst
is not pulsed: OpenOCD checks if target was examined and if not reset
is not issued
(this is IMHO wrong)
Please try http://openocd.zylin.com/2606
More serious problem is DP access failure.
As included lpc1xxx.cfg uses "adapter_nsrst_delay 200" try
http://openocd.zylin.com/2591
Also try http://openocd.zylin.com/2601
Please report results.
I cherry-picked all three and rebuilt - I do not see a difference in
behaviour: still no pulse on reset, and what looks like the same error
to my untrained eye, with or without reset.
cu
Michael
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