Every year or so I try openocd, and still no joy. Actually, seems the
script and config stuff has all finally matured/stabilized, so I'll
assume I can make it work w/o too much pain, after I fix this hang:

I have a vanilla lpc2138 on an ARM-USB-OCD, that seems to fire up ok
using the built-in configs in /usr/share/openocd.

Hangs forever on write_image:

steve@dystant:~/projects/clients/zonge/DNT/NT-32/firmware/arm/main$
openocd -f openocd.cfg
Open On-Chip Debugger 0.4.0 (2010-10-08-15:42)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.berlios.de/doc/doxygen/bugs.html
RCLK - adaptive
jtag_nsrst_delay: 200
jtag_ntrst_delay: 200
srst_only srst_pulls_trst srst_gates_jtag srst_open_drain
Info : RCLK (adaptive clock speed) not supported - fallback to 500 kHz
Info : JTAG tap: lpc2138.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
Info : Embedded ICE version 4
Info : lpc2138.cpu: hardware has 2 breakpoint/watchpoint units
flash write_image erase unlock Main.elf 0


Just for completeness, the the config script follows.

Best,
Steve

#
# Olimex ARM-USB-OCD
#
# http://www.olimex.com/dev/arm-usb-ocd.html
#

interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG"
ft2232_layout "olimex-jtag"
ft2232_vid_pid 0x15BA 0x0003

# Use RCLK. If RCLK is not available fall back to 500kHz.
#
# Depending on cabling you might be able to eek this up to 2000kHz.
jtag_rclk 500

if { [info exists CHIPNAME] } {
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME lpc2138
}

if { [info exists ENDIAN] } {
   set _ENDIAN $ENDIAN
} else {
   set _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x4f1f0f0f
}

jtag_nsrst_delay 200
jtag_ntrst_delay 200

# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
# JTAG, power-on reset is not enough, i.e. you need to perform a
# reset before being able to talk to the LPC2148, attach is not possible.

#reset_config trst_and_srst srst_pulls_trst
reset_config srst_only srst_pulls_trst

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
-expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position
$_TARGETNAME -variant arm7tdmi-s_r4

$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size
0x4000 -work-area-backup 0

$_TARGETNAME configure -event reset-init {
        # Force target into ARM state
        arm core_state arm

        # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
        # "User Flash Mode" where interrupt vectors are _not_ remapped,
        # and reside in flash instead).
        #
        # See section 7.1 on page 32 ("Memory Mapping control register") in
        # "UM10139: Volume 1: LPC214x User Manual", Rev. 02 -- 25 July 2006.
        # 
http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf
        mwb 0xE01FC040 0x01
}

# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock>
[calc_checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x7d000 0 0 $_TARGETNAME lpc2000_v2
14765 calc_checksum

#
# Olimex LPC-H2148 eval board
#
# http://www.olimex.com/dev/lpc-h2148.html
#
#source [find target/lpc2148.cfg]

#gdb_breakpoint_override hard
#gdb_detach resume
#gdb_memory_map enable
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