Brian Beesley wrote:
On Wednesday 20 July 2005 20:02, Alex Phillips wrote:
For the purposes of Prime testing, dual-core processors behave exactly like
an SMP mobo with 2 CPUs fitted, however you only get half as much memory
bus bandwidth for each CPU, compared with a proper SMP mobo,
Actually this is a memory controller issue. There are lots of "hobbyist"
dual-cpu mobos which aren't "proper" i.e. have only one memory controller and
are therefore subject to the sort of blocking you describe.
how about every chipset and CPU Intel makes ?
AMD Opteron processors have a shared memory controller per CPU. Intel Xeon
processors use a single shared memory bus in all normal configurations.
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