On Sat, 28 Sept 2024 at 21:40, Daniel Henrique Barboza <dbarb...@ventanamicro.com> wrote: > > > > On 9/28/24 8:34 AM, Peter Maydell wrote: > > The assertion failure is > > ERROR:../tests/qtest/riscv-iommu-test.c:72:test_reg_reset: assertion > > failed (cap & RISCV_IOMMU_CAP_VERSION == 0x10): (0 == 16) > > The root cause is that the qtests I added aren't considering the endianess of > the > host. The RISC-V IOMMU is being implemented as LE only and all regs are being > read/written in memory as LE. The qtest read/write helpers must take the qtest > endianess into account. We make this type of handling in other qtest archs > like > ppc64. > > I have a fix for the tests but I'm unable to run the > ubuntu-22.04-s390x-all-system > job to verify it, even after setting Cirrus like Thomas taught me a week ago. > In > fact I have no 'ubuntu-22-*' jobs available to run.
It's on the private s390 VM we have, so it's set up only to be available on the main CI run (there's not enough capacity on the machine to do any more than that). If you want to point me at a gitlab branch I can do a quick "make check" on that if you like. thanks -- PMM
