On 9/30/24 7:48 AM, Peter Maydell wrote:
On Sun, 29 Sept 2024 at 21:53, Daniel Henrique Barboza
<dbarb...@ventanamicro.com> wrote:
On 9/29/24 12:38 PM, Peter Maydell wrote:
On Sat, 28 Sept 2024 at 21:40, Daniel Henrique Barboza
<dbarb...@ventanamicro.com> wrote:
On 9/28/24 8:34 AM, Peter Maydell wrote:
The assertion failure is
ERROR:../tests/qtest/riscv-iommu-test.c:72:test_reg_reset: assertion
failed (cap & RISCV_IOMMU_CAP_VERSION == 0x10): (0 == 16)
The root cause is that the qtests I added aren't considering the endianess of
the
host. The RISC-V IOMMU is being implemented as LE only and all regs are being
read/written in memory as LE. The qtest read/write helpers must take the qtest
endianess into account. We make this type of handling in other qtest archs like
ppc64.
I have a fix for the tests but I'm unable to run the
ubuntu-22.04-s390x-all-system
job to verify it, even after setting Cirrus like Thomas taught me a week ago. In
fact I have no 'ubuntu-22-*' jobs available to run.
It's on the private s390 VM we have, so it's set up only to
be available on the main CI run (there's not enough capacity
on the machine to do any more than that). If you want to point
me at a gitlab branch I can do a quick "make check" on that
if you like.
I appreciate it. This is the repo:
https://gitlab.com/danielhb/qemu/-/tree/pull_fix
This doesn't fix the assertion. This is because the test (now) does:
qpci_memread(&r_iommu->dev, r_iommu->reg_bar, reg_offset,
®, sizeof(reg));
if (riscv_iommu_qtest_big_endian()) {
reg = bswap32(reg);
}
where riscv_iommu_qtest_big_endian() is a wrapper for
qtest_big_endian(). But qtest_big_endian() queries the
endianness of the *guest*, and so for riscv it will
always return false and we will never bswap.
Ooops. My bad.
If you need to do swapping inline in a test you can use
reg = le32_to_cpu(reg);
which swaps an LE value read from the guest to the host
CPU's endianness ordering (and similarly with cpu_to_le32
on the write path).
But it turns out that libqos provides already functions
to read/write 32 and 64 bit values from PCI devices:
reg = qpci_io_readl(&r_iommu->dev, r_iommu->reg_bar, reg_offset);
which do the byteswap for you.
Similarly qpci_io_writel() etc. (The functions work for
both IO and MEM PCI BARs.)
I'll convert the tests to use qcpi_io_readl/writel and friends. Hopefully this
will fix it.
If this is enough to fix the tests, I'll amend it in the new IOMMU version.
If we still failing then I'll need to set this s390 VM.
By the way, if you have any recipe/pointers to set this s390 VM to share,
that would be great.
It's a VM provided by IBM under their "Community Cloud"
umbrella: https://community.ibm.com/zsystems/l1cc/
I'll see if I can get something going with the IBM community cloud, but I wonder
how hard it is to launch a s390x TCG guest with Ubuntu. The image is freely
available:
https://cdimage.ubuntu.com/releases/jammy/release/ubuntu-22.04.5-live-server-s390x.iso
But I'm unsure of whether we need some secret sauce/paid key to do the install.
Thomas,
do you have more info?
Thanks,
Daniel
thanks
-- PMM
