> -----Original Message----- > From: Cédric Le Goater <[email protected]> > Sent: Tuesday, December 30, 2025 10:29 PM > To: Kane Chen <[email protected]>; Nabih Estefan > <[email protected]> > Cc: Peter Maydell <[email protected]>; Steven Lee > <[email protected]>; Troy Lee <[email protected]>; Jamin Lin > <[email protected]>; Andrew Jeffery > <[email protected]>; Joel Stanley <[email protected]>; open > list:ASPEED BMCs <[email protected]>; open list:All patches CC here > <[email protected]>; Troy Lee <[email protected]>; Philippe > Mathieu-Daudé <[email protected]> > Subject: Re: [PATCH v4 06/19] hw/arm/aspeed: Integrate interrupt controller > for AST1700 > > Hello Kane, > > > Currently, three devices in our setup support I2C. > > 1. BMC > > 2. IO expander 1 > > 3. IO expander 2 > > > > Each device supports 16 I2C buses, and the bus indices for each device > > all start from 0. This leads to naming conflicts under the current > > naming convention. While we could extend the bus IDs from 16 to 47, > > doing so would require significant code changes to handle different ID > > ranges, > making the code harder to maintain. > > > > Therefore, I believe using readable bus labels would be more intuitive for > > the > user API. > > I tend to agree. > > > If there are any existing conventions for this use case or if you have > > any concerns regarding the use of bus labels, please let me know. > > Could you please send us the contents of directory : > > /sys/bus/i2c/devices/ > > on a system with such IO expanders? preferably with some devices attached > to the I2C buses. > > Thanks, > > C.
Hi Cédric, I'm afraid I cannot provide data from a physical platform on such short notice. Currently, my AST1700 board is malfunctioning, and our other unit is occupied with different tests. I am reaching out to colleagues to see if a spare is available. I've attached logs from a QEMU simulation, as the results are expected to be consistent with the actual hardware.. Since our EVB does not have I2C devices connected to these specific buses, I typically use the following command to create a dummy device for testing: echo slave-24c02 0x106c > /sys/bus/i2c/devices/i2c-16/new_device" System info: ls -l /sys/bus/i2c/devices/ lrwxrwxrwx 1 root root 0 Apr 3 2025 10-1010 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0fb00.i2c-bus/i2c-10/10-1010 lrwxrwxrwx 1 root root 0 Dec 31 09:43 16-106c -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f100.i2c-bus/i2c-16/16-106c lrwxrwxrwx 1 root root 0 Apr 3 2025 8-1010 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0f900.i2c-bus/i2c-8/8-1010 lrwxrwxrwx 1 root root 0 Apr 3 2025 9-0050 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0fa00.i2c-bus/i2c-9/9-0050 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-10 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0fb00.i2c-bus/i2c-10 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-16 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f100.i2c-bus/i2c-16 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-17 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f200.i2c-bus/i2c-17 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-18 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f300.i2c-bus/i2c-18 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-19 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f400.i2c-bus/i2c-19 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-20 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f500.i2c-bus/i2c-20 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-21 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f600.i2c-bus/i2c-21 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-22 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f700.i2c-bus/i2c-22 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-23 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f800.i2c-bus/i2c-23 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-24 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f900.i2c-bus/i2c-24 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-25 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fa00.i2c-bus/i2c-25 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-26 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fb00.i2c-bus/i2c-26 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-27 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fc00.i2c-bus/i2c-27 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-28 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fd00.i2c-bus/i2c-28 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-29 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fe00.i2c-bus/i2c-29 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-30 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0ff00.i2c-bus/i2c-30 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-31 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c10000.i2c-bus/i2c-31 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-32 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f100.i2c-bus/i2c-32 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-33 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f200.i2c-bus/i2c-33 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-34 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f300.i2c-bus/i2c-34 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-35 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f400.i2c-bus/i2c-35 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-36 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f500.i2c-bus/i2c-36 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-37 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f600.i2c-bus/i2c-37 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-38 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f700.i2c-bus/i2c-38 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-39 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f800.i2c-bus/i2c-39 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-40 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f900.i2c-bus/i2c-40 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-41 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fa00.i2c-bus/i2c-41 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-42 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fb00.i2c-bus/i2c-42 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-43 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fc00.i2c-bus/i2c-43 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-44 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fd00.i2c-bus/i2c-44 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-45 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fe00.i2c-bus/i2c-45 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-46 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0ff00.i2c-bus/i2c-46 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-47 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c10000.i2c-bus/i2c-47 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-8 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0f900.i2c-bus/i2c-8 lrwxrwxrwx 1 root root 0 Apr 3 2025 i2c-9 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0fa00.i2c-bus/i2c-9 Best Regards, Kane
