Hello Kane, + Joe (for I3C)
I was able to access a functional AST1700 platform today and captured the actual bus states. Below is the output from the real hardware (using the same image as my previous QEMU log): ls -l /sys/bus/i2c/devices/ lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-12 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0fd00.i2c-bus/i2c-12 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-13 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0fe00.i2c-bus/i2c-13 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-16 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f100.i2c-bus/i2c-16 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-17 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f200.i2c-bus/i2c-17 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-18 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f300.i2c-bus/i2c-18 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-19 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f400.i2c-bus/i2c-19 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-20 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f500.i2c-bus/i2c-20 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-21 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f600.i2c-bus/i2c-21 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-22 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f700.i2c-bus/i2c-22 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-23 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f800.i2c-bus/i2c-23 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-24 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f900.i2c-bus/i2c-24 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-25 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fa00.i2c-bus/i2c-25 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-26 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fb00.i2c-bus/i2c-26 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-27 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fc00.i2c-bus/i2c-27 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-28 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fd00.i2c-bus/i2c-28 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-29 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fe00.i2c-bus/i2c-29 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-30 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0ff00.i2c-bus/i2c-30 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-31 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c10000.i2c-bus/i2c-31 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-32 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f100.i2c-bus/i2c-32 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-33 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f200.i2c-bus/i2c-33 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-34 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f300.i2c-bus/i2c-34 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-35 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f400.i2c-bus/i2c-35 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-36 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f500.i2c-bus/i2c-36 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-37 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f600.i2c-bus/i2c-37 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-38 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f700.i2c-bus/i2c-38 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-39 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f800.i2c-bus/i2c-39 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-40 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f900.i2c-bus/i2c-40 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-41 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fa00.i2c-bus/i2c-41 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-42 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fb00.i2c-bus/i2c-42 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-43 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fc00.i2c-bus/i2c-43 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-44 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fd00.i2c-bus/i2c-44 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-45 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fe00.i2c-bus/i2c-45 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-46 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0ff00.i2c-bus/i2c-46 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-47 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c10000.i2c-bus/i2c-47 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-48 -> ../../../devices/platform/soc@14000000/14c21000.i3c1/i2c-48 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-49 -> ../../../devices/platform/soc@14000000/14c23000.i3c3/i2c-49 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-50 -> ../../../devices/platform/soc@14000000/14c25000.i3c5/i2c-50 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-51 -> ../../../devices/platform/soc@14000000/14c27000.i3c7/i2c-51 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-52 -> ../../../devices/platform/soc@14000000/14c29000.i3c9/i2c-52 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-53 -> ../../../devices/platform/soc@14000000/14c2b000.i3c11/i2c-53 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-54 -> ../../../devices/platform/soc@14000000/14c2d000.i3c13/i2c-54 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-55 -> ../../../devices/platform/soc@14000000/14c2f000.i3c15/i2c-55 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-56 -> ../../../devices/platform/ltpi0_bus@30000000/30c21000.i3c1/i2c-56 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-57 -> ../../../devices/platform/ltpi0_bus@30000000/30c23000.i3c3/i2c-57 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-58 -> ../../../devices/platform/ltpi0_bus@30000000/30c25000.i3c5/i2c-58 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-59 -> ../../../devices/platform/ltpi0_bus@30000000/30c27000.i3c7/i2c-59 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-60 -> ../../../devices/platform/ltpi0_bus@30000000/30c29000.i3c9/i2c-60 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-61 -> ../../../devices/platform/ltpi0_bus@30000000/30c2b000.i3c11/i2c-61 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-62 -> ../../../devices/platform/ltpi0_bus@30000000/30c2d000.i3c13/i2c-62 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-63 -> ../../../devices/platform/ltpi0_bus@30000000/30c2f000.i3c15/i2c-63 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-64 -> ../../../devices/platform/ltpi1_bus@50000000/50c21000.i3c1/i2c-64 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-65 -> ../../../devices/platform/ltpi1_bus@50000000/50c23000.i3c3/i2c-65 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-66 -> ../../../devices/platform/ltpi1_bus@50000000/50c25000.i3c5/i2c-66 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-67 -> ../../../devices/platform/ltpi1_bus@50000000/50c27000.i3c7/i2c-67 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-68 -> ../../../devices/platform/ltpi1_bus@50000000/50c29000.i3c9/i2c-68 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-69 -> ../../../devices/platform/ltpi1_bus@50000000/50c2b000.i3c11/i2c-69 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-70 -> ../../../devices/platform/ltpi1_bus@50000000/50c2d000.i3c13/i2c-70 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-71 -> ../../../devices/platform/ltpi1_bus@50000000/50c2f000.i3c15/i2c-71 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-8 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0f900.i2c-bus/i2c-8 As shown above, the real platform incorporates I2C buses via the LTPI (IO expander) and even through I3C controllers. Using a consistent i2c-X naming style across the model should sufficiently cover these use cases.We would need to modify the bus creation in aspeed_i2c_bus_realize() as follows : s->bus = i2c_init_bus(dev, NULL); and fix all tests.Regarding your suggestion to modify aspeed_i2c_bus_realize() by passing NULL as the second argument to i2c_init_bus(): I have tested this change. It results in the following object hierarchy: BMC I2C: /i2c/bus[0]/i2c-bus.0 IOEXP0 (LTPI0): /ioexp[0]/ioexp-i2c[0]/bus[0]/i2c-bus.16 IOEXP1 (LTPI1): /ioexp[1]/ioexp-i2c[0]/bus[0]/i2c-bus.32 By adjusting the I2C object names this way, the naming conflicts are resolved, and the automated tests now pass correctly.
Linux doesn’t order the I2C buses in a logical or physical sense. It numbers them dynamically as adapters are registered. The I3C device will add another group (SOC, LTPI0, LTP1, I3C) of I2C buses and devices. So, we need to find a way to distinguish these groups at the QEMU machine level to add devices on the right bus. Adding a "label" to the I2C bus model seems to be a step in the right direction. The idea needs time to mature. Insights are welcome. Thanks, C.
