> -----Original Message----- > From: Cédric Le Goater <[email protected]> > Sent: Saturday, January 3, 2026 12:32 AM > To: Kane Chen <[email protected]>; Nabih Estefan > <[email protected]> > Cc: Peter Maydell <[email protected]>; Steven Lee > <[email protected]>; Troy Lee <[email protected]>; Jamin Lin > <[email protected]>; Andrew Jeffery > <[email protected]>; Joel Stanley <[email protected]>; open > list:ASPEED BMCs <[email protected]>; open list:All patches CC here > <[email protected]>; Troy Lee <[email protected]>; Philippe > Mathieu-Daudé <[email protected]> > Subject: Re: [PATCH v4 06/19] hw/arm/aspeed: Integrate interrupt controller > for AST1700 > > On 12/31/25 12:49, Cédric Le Goater wrote: > > Hello Kane, > > > > On 12/31/25 11:15, Kane Chen wrote: > >>> -----Original Message----- > >>> From: Cédric Le Goater <[email protected]> > >>> Sent: Tuesday, December 30, 2025 10:29 PM > >>> To: Kane Chen <[email protected]>; Nabih Estefan > >>> <[email protected]> > >>> Cc: Peter Maydell <[email protected]>; Steven Lee > >>> <[email protected]>; Troy Lee <[email protected]>; Jamin > Lin > >>> <[email protected]>; Andrew Jeffery > >>> <[email protected]>; Joel Stanley <[email protected]>; open > >>> list:ASPEED BMCs <[email protected]>; open list:All patches CC > >>> here <[email protected]>; Troy Lee <[email protected]>; > >>> Philippe Mathieu-Daudé <[email protected]> > >>> Subject: Re: [PATCH v4 06/19] hw/arm/aspeed: Integrate interrupt > >>> controller for AST1700 > >>> > >>> Hello Kane, > >>> > >>>> Currently, three devices in our setup support I2C. > >>>> 1. BMC > >>>> 2. IO expander 1 > >>>> 3. IO expander 2 > >>>> > >>>> Each device supports 16 I2C buses, and the bus indices for each > >>>> device all start from 0. This leads to naming conflicts under the > >>>> current naming convention. While we could extend the bus IDs from > >>>> 16 to 47, doing so would require significant code changes to handle > >>>> different ID ranges, > >>> making the code harder to maintain. > >>>> > >>>> Therefore, I believe using readable bus labels would be more > >>>> intuitive for the > >>> user API. > >>> > >>> I tend to agree. > >>> > >>>> If there are any existing conventions for this use case or if you > >>>> have any concerns regarding the use of bus labels, please let me know. > >>> > >>> Could you please send us the contents of directory : > >>> > >>> /sys/bus/i2c/devices/ > >>> > >>> on a system with such IO expanders? preferably with some devices > >>> attached to the I2C buses. > >>> > >>> Thanks, > >>> > >>> C. > >> > >> Hi Cédric, > >> > >> I'm afraid I cannot provide data from a physical platform on such short > notice. > >> Currently, my AST1700 board is malfunctioning, and our other unit is > >> occupied with different tests. I am reaching out to colleagues to see if a > spare is available. > >> > >> I've attached logs from a QEMU simulation, as the results are > >> expected to be consistent with the actual hardware.. Since our EVB > >> does not have I2C devices connected to these specific buses, I > >> typically use the following command to create a dummy device for testing: > >> echo slave-24c02 0x106c > /sys/bus/i2c/devices/i2c-16/new_device" > > > > Which command line did you use for the I2C backing device in QEMU ?
I used the following command to test the LTPI feature. Note that no additional options were added specifically for the I2C devices; I am relying on the default machine model configuration: ./qemu-system-aarch64 -M ast2700a1-evb -nographic \ -device loader,addr=0x400000000,file=2700-img/u-boot.bin,force-raw=on \ -device loader,addr=0x430000000,file=2700-img/bl31.bin,force-raw=on \ -device loader,addr=0x430080000,file=2700-img/optee/tee-raw.bin,force-raw=on \ -device loader,addr=0x430000000,cpu-num=0 \ -device loader,addr=0x430000000,cpu-num=1 \ -device loader,addr=0x430000000,cpu-num=2 \ -device loader,addr=0x430000000,cpu-num=3 \ -drive file=2700-img/image-bmc,format=raw,if=mtd \ -net nic,macaddr=32:27:a1:12:01:01 \ -net nic,macaddr=32:27:a1:12:02:02 \ -net nic,macaddr=32:27:a1:12:03:03 \ -net user,hostfwd=:127.0.0.1:12222-:22,hostfwd=:127.0.0.1:12443-:443,hostfwd=udp:127.0.0.1:12623-:623,hostname=qemu \ -serial mon:stdio > > > > Is there a specific FW image to use to enable the IO expanders ? To enable the IO expanders, users could use the below DTS file to build the image https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v6.6/arch/arm64/boot/dts/aspeed/ast2700-dcscm_ast1700-evb.dts Or user could use the below image and switch the DTB in the uboot stage for enabling IO expanders. https://github.com/AspeedTech-BMC/openbmc/releases/download/v10.00/ast2700-a1-dcscm-obmc.tar.gz > > > >> System info: > >> ls -l /sys/bus/i2c/devices/ > >> lrwxrwxrwx 1 root root 0 Apr 3 2025 > 10-1010 -> > >> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/1 > 4c0 > >> fb00.i2c-bus/i2c-10/10-1010 lrwxrwxrwx 1 > root root > >> 0 Dec 31 09:43 16-106c -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0f100.i2c-bus/i2c-16/16-106c > >> lrwxrwxrwx 1 root root 0 Apr 3 2025 > 8-1010 -> > >> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/1 > 4c0 > >> f900.i2c-bus/i2c-8/8-1010 lrwxrwxrwx 1 > root root 0 > >> Apr 3 2025 9-0050 -> > >> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/1 > 4c0 > >> fa00.i2c-bus/i2c-9/9-0050 lrwxrwxrwx 1 > root root 0 > >> Apr 3 2025 i2c-10 -> > >> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/1 > 4c0 > >> fb00.i2c-bus/i2c-10 lrwxrwxrwx 1 > root root 0 Apr > >> 3 2025 i2c-16 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0f100.i2c-bus/i2c-16 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-17 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0f200.i2c-bus/i2c-17 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-18 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0f300.i2c-bus/i2c-18 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-19 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0f400.i2c-bus/i2c-19 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-20 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0f500.i2c-bus/i2c-20 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-21 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0f600.i2c-bus/i2c-21 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-22 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0f700.i2c-bus/i2c-22 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-23 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0f800.i2c-bus/i2c-23 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-24 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0f900.i2c-bus/i2c-24 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-25 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0fa00.i2c-bus/i2c-25 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-26 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0fb00.i2c-bus/i2c-26 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-27 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0fc00.i2c-bus/i2c-27 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-28 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0fd00.i2c-bus/i2c-28 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-29 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0fe00.i2c-bus/i2c-29 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-30 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c0ff00.i2c-bus/i2c-30 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-31 -> > >> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@ > 3 > >> 0c0f000/30c10000.i2c-bus/i2c-31 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-32 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0f100.i2c-bus/i2c-32 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-33 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0f200.i2c-bus/i2c-33 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-34 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0f300.i2c-bus/i2c-34 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-35 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0f400.i2c-bus/i2c-35 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-36 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0f500.i2c-bus/i2c-36 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-37 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0f600.i2c-bus/i2c-37 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-38 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0f700.i2c-bus/i2c-38 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-39 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0f800.i2c-bus/i2c-39 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-40 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0f900.i2c-bus/i2c-40 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-41 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0fa00.i2c-bus/i2c-41 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-42 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0fb00.i2c-bus/i2c-42 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-43 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0fc00.i2c-bus/i2c-43 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-44 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0fd00.i2c-bus/i2c-44 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-45 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0fe00.i2c-bus/i2c-45 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-46 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c0ff00.i2c-bus/i2c-46 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-47 -> > >> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@ > 5 > >> 0c0f000/50c10000.i2c-bus/i2c-47 lrwxrwxrwx 1 > root root > >> 0 Apr 3 2025 i2c-8 -> > >> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/1 > 4c0 > >> f900.i2c-bus/i2c-8 lrwxrwxrwx 1 root root 0 > Apr 3 > >> 2025 i2c-9 -> > >> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/1 > 4c0 > >> fa00.i2c-bus/i2c-9 > > > > Could we order the I2C buses the same way in QEMU ? Regarding your question about ordering the I2C buses in QEMU: if you mean aligning the QEMU object paths with the i2c-X naming convention used in the kernel, I believe that would be the most intuitive approach. I was able to access a functional AST1700 platform today and captured the actual bus states. Below is the output from the real hardware (using the same image as my previous QEMU log): ls -l /sys/bus/i2c/devices/ lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-12 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0fd00.i2c-bus/i2c-12 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-13 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0fe00.i2c-bus/i2c-13 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-16 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f100.i2c-bus/i2c-16 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-17 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f200.i2c-bus/i2c-17 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-18 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f300.i2c-bus/i2c-18 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-19 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f400.i2c-bus/i2c-19 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-20 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f500.i2c-bus/i2c-20 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-21 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f600.i2c-bus/i2c-21 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-22 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f700.i2c-bus/i2c-22 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-23 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f800.i2c-bus/i2c-23 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-24 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0f900.i2c-bus/i2c-24 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-25 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fa00.i2c-bus/i2c-25 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-26 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fb00.i2c-bus/i2c-26 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-27 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fc00.i2c-bus/i2c-27 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-28 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fd00.i2c-bus/i2c-28 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-29 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0fe00.i2c-bus/i2c-29 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-30 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c0ff00.i2c-bus/i2c-30 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-31 -> ../../../devices/platform/ltpi0_bus@30000000/ltpi0_bus@30000000:bus@30c0f000/30c10000.i2c-bus/i2c-31 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-32 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f100.i2c-bus/i2c-32 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-33 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f200.i2c-bus/i2c-33 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-34 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f300.i2c-bus/i2c-34 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-35 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f400.i2c-bus/i2c-35 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-36 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f500.i2c-bus/i2c-36 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-37 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f600.i2c-bus/i2c-37 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-38 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f700.i2c-bus/i2c-38 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-39 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f800.i2c-bus/i2c-39 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-40 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0f900.i2c-bus/i2c-40 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-41 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fa00.i2c-bus/i2c-41 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-42 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fb00.i2c-bus/i2c-42 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-43 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fc00.i2c-bus/i2c-43 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-44 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fd00.i2c-bus/i2c-44 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-45 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0fe00.i2c-bus/i2c-45 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-46 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c0ff00.i2c-bus/i2c-46 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-47 -> ../../../devices/platform/ltpi1_bus@50000000/ltpi1_bus@50000000:bus@50c0f000/50c10000.i2c-bus/i2c-47 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-48 -> ../../../devices/platform/soc@14000000/14c21000.i3c1/i2c-48 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-49 -> ../../../devices/platform/soc@14000000/14c23000.i3c3/i2c-49 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-50 -> ../../../devices/platform/soc@14000000/14c25000.i3c5/i2c-50 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-51 -> ../../../devices/platform/soc@14000000/14c27000.i3c7/i2c-51 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-52 -> ../../../devices/platform/soc@14000000/14c29000.i3c9/i2c-52 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-53 -> ../../../devices/platform/soc@14000000/14c2b000.i3c11/i2c-53 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-54 -> ../../../devices/platform/soc@14000000/14c2d000.i3c13/i2c-54 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-55 -> ../../../devices/platform/soc@14000000/14c2f000.i3c15/i2c-55 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-56 -> ../../../devices/platform/ltpi0_bus@30000000/30c21000.i3c1/i2c-56 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-57 -> ../../../devices/platform/ltpi0_bus@30000000/30c23000.i3c3/i2c-57 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-58 -> ../../../devices/platform/ltpi0_bus@30000000/30c25000.i3c5/i2c-58 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-59 -> ../../../devices/platform/ltpi0_bus@30000000/30c27000.i3c7/i2c-59 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-60 -> ../../../devices/platform/ltpi0_bus@30000000/30c29000.i3c9/i2c-60 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-61 -> ../../../devices/platform/ltpi0_bus@30000000/30c2b000.i3c11/i2c-61 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-62 -> ../../../devices/platform/ltpi0_bus@30000000/30c2d000.i3c13/i2c-62 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-63 -> ../../../devices/platform/ltpi0_bus@30000000/30c2f000.i3c15/i2c-63 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-64 -> ../../../devices/platform/ltpi1_bus@50000000/50c21000.i3c1/i2c-64 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-65 -> ../../../devices/platform/ltpi1_bus@50000000/50c23000.i3c3/i2c-65 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-66 -> ../../../devices/platform/ltpi1_bus@50000000/50c25000.i3c5/i2c-66 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-67 -> ../../../devices/platform/ltpi1_bus@50000000/50c27000.i3c7/i2c-67 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-68 -> ../../../devices/platform/ltpi1_bus@50000000/50c29000.i3c9/i2c-68 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-69 -> ../../../devices/platform/ltpi1_bus@50000000/50c2b000.i3c11/i2c-69 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-70 -> ../../../devices/platform/ltpi1_bus@50000000/50c2d000.i3c13/i2c-70 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-71 -> ../../../devices/platform/ltpi1_bus@50000000/50c2f000.i3c15/i2c-71 lrwxrwxrwx 1 root root 0 Jan 5 07:24 i2c-8 -> ../../../devices/platform/soc@14000000/soc@14000000:bus@14c0f000/14c0f900.i2c-bus/i2c-8 As shown above, the real platform incorporates I2C buses via the LTPI (IO expander) and even through I3C controllers. Using a consistent i2c-X naming style across the model should sufficiently cover these use cases. > > We would need to modify the bus creation in aspeed_i2c_bus_realize() as > follows : > > s->bus = i2c_init_bus(dev, NULL); > > and fix all tests. Regarding your suggestion to modify aspeed_i2c_bus_realize() by passing NULL as the second argument to i2c_init_bus(): I have tested this change. It results in the following object hierarchy: BMC I2C: /i2c/bus[0]/i2c-bus.0 IOEXP0 (LTPI0): /ioexp[0]/ioexp-i2c[0]/bus[0]/i2c-bus.16 IOEXP1 (LTPI1): /ioexp[1]/ioexp-i2c[0]/bus[0]/i2c-bus.32 By adjusting the I2C object names this way, the naming conflicts are resolved, and the automated tests now pass correctly. Does this structure look acceptable to you, or would you prefer a different approach to bus indexing? > > Hmm, I am pondering the possible solutions. > > C.
