This initial version of the GICv5 will not support migration: * the spec is still only at EAC level, so the data to be migrated might in theory change before it is finalised * when we add support for missing features like EL2/EL3/Realm we might find we want to refactor the data structures we use * I still need to check against the proposed KVM GICv5 handling to see if there are any awkward mismatches that might affect how we want to store the data * it's experimental, so for pragmatic reasons I'm skipping it to get the initial version done faster
Install a migration blocker to enforce this. Signed-off-by: Peter Maydell <[email protected]> --- hw/intc/arm_gicv5.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/intc/arm_gicv5.c b/hw/intc/arm_gicv5.c index 0eb4348e81..73a6e629df 100644 --- a/hw/intc/arm_gicv5.c +++ b/hw/intc/arm_gicv5.c @@ -11,6 +11,7 @@ #include "qapi/error.h" #include "qemu/log.h" #include "trace.h" +#include "migration/blocker.h" OBJECT_DEFINE_TYPE(GICv5, gicv5, ARM_GICV5, ARM_GICV5_COMMON) @@ -194,6 +195,7 @@ static void gicv5_realize(DeviceState *dev, Error **errp) { GICv5Common *cs = ARM_GICV5_COMMON(dev); GICv5Class *gc = ARM_GICV5_GET_CLASS(dev); + Error *migration_blocker = NULL; ERRP_GUARD(); @@ -202,6 +204,12 @@ static void gicv5_realize(DeviceState *dev, Error **errp) return; } + error_setg(&migration_blocker, + "Live migration disabled: not yet supported by GICv5"); + if (migrate_add_blocker(&migration_blocker, errp)) { + return; + } + /* * When we implement support for more than one interrupt domain, * we will provide some QOM properties so the board can configure -- 2.43.0
