On Wed, Feb 25, 2026 at 8:20 PM Djordje Todorovic
<[email protected]> wrote:
>
> For riscvbe target, the fields for OpenSBI's fw_payload
> need to be in target endian.
> ---
> hw/riscv/boot.c | 14 ++++++++++++++
> include/hw/riscv/boot.h | 5 +++++
> 2 files changed, 19 insertions(+)
>
> diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
> index 6dab521a6b..f13264a87f 100644
> --- a/hw/riscv/boot.c
> +++ b/hw/riscv/boot.c
> @@ -396,19 +396,33 @@ void riscv_rom_copy_firmware_info(MachineState *machine,
> size_t dinfo_len;
>
> if (riscv_is_32bit(harts)) {
> +#if TARGET_BIG_ENDIAN
This will need to be done without adding any TARGET_BIG_ENDIAN macros.
We don't want to have custom built binaries
Alistair
> + dinfo32.magic = cpu_to_be32(FW_DYNAMIC_INFO_MAGIC_VALUE);
> + dinfo32.version = cpu_to_be32(FW_DYNAMIC_INFO_VERSION);
> + dinfo32.next_mode = cpu_to_be32(FW_DYNAMIC_INFO_NEXT_MODE_S);
> + dinfo32.next_addr = cpu_to_be32(kernel_entry);
> +#else
> dinfo32.magic = cpu_to_le32(FW_DYNAMIC_INFO_MAGIC_VALUE);
> dinfo32.version = cpu_to_le32(FW_DYNAMIC_INFO_VERSION);
> dinfo32.next_mode = cpu_to_le32(FW_DYNAMIC_INFO_NEXT_MODE_S);
> dinfo32.next_addr = cpu_to_le32(kernel_entry);
> +#endif
> dinfo32.options = 0;
> dinfo32.boot_hart = 0;
> dinfo_ptr = &dinfo32;
> dinfo_len = sizeof(dinfo32);
> } else {
> +#if TARGET_BIG_ENDIAN
> + dinfo64.magic = cpu_to_be64(FW_DYNAMIC_INFO_MAGIC_VALUE);
> + dinfo64.version = cpu_to_be64(FW_DYNAMIC_INFO_VERSION);
> + dinfo64.next_mode = cpu_to_be64(FW_DYNAMIC_INFO_NEXT_MODE_S);
> + dinfo64.next_addr = cpu_to_be64(kernel_entry);
> +#else
> dinfo64.magic = cpu_to_le64(FW_DYNAMIC_INFO_MAGIC_VALUE);
> dinfo64.version = cpu_to_le64(FW_DYNAMIC_INFO_VERSION);
> dinfo64.next_mode = cpu_to_le64(FW_DYNAMIC_INFO_NEXT_MODE_S);
> dinfo64.next_addr = cpu_to_le64(kernel_entry);
> +#endif
> dinfo64.options = 0;
> dinfo64.boot_hart = 0;
> dinfo_ptr = &dinfo64;
> diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
> index f00b3ca122..6a6b796eee 100644
> --- a/include/hw/riscv/boot.h
> +++ b/include/hw/riscv/boot.h
> @@ -24,8 +24,13 @@
> #include "hw/core/loader.h"
> #include "hw/riscv/riscv_hart.h"
>
> +#if TARGET_BIG_ENDIAN
> +#define RISCV32_BIOS_BIN "opensbi-riscv32be-generic-fw_dynamic.bin"
> +#define RISCV64_BIOS_BIN "opensbi-riscv64be-generic-fw_dynamic.bin"
> +#else
> #define RISCV32_BIOS_BIN "opensbi-riscv32-generic-fw_dynamic.bin"
> #define RISCV64_BIOS_BIN "opensbi-riscv64-generic-fw_dynamic.bin"
> +#endif
>
> typedef struct RISCVBootInfo {
> ssize_t kernel_size;
> --
> 2.34.1
