Re: [PATCH v6 26/27] target/riscv: Pass address as uint64_t in cpu_set_exception_base()

[Alistair Francis]

On Sat, May 16, 2026 at 4:03 AM Anton Johansson via qemu development
<qemu-devel@nongnu.org> wrote:
>
> The corresponding field CPUArchState::resetvec is uint64_t anyway, no
> need to use target_ulong.
>
> Signed-off-by: Anton Johansson <a...@rev.ng>

Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>

Alistair

> ---
>  target/riscv/cpu.h | 2 +-
>  target/riscv/cpu.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 3352409676..ad5d23ee6b 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -679,7 +679,7 @@ uint8_t riscv_cpu_get_fflags(CPURISCVState *env);
>  void riscv_cpu_set_fflags(CPURISCVState *env, uint8_t);
>
>  #ifndef CONFIG_USER_ONLY
> -void cpu_set_exception_base(int vp_index, target_ulong address);
> +void cpu_set_exception_base(int vp_index, uint64_t address);
>  #endif
>
>  FIELD(TB_FLAGS, MEM_IDX, 0, 3)
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index daad317381..753f92307f 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -79,7 +79,7 @@ bool riscv_cpu_option_set(const char *optname)
>
>  #ifndef CONFIG_USER_ONLY
>  /* This is used in runtime only. */
> -void cpu_set_exception_base(int vp_index, target_ulong address)
> +void cpu_set_exception_base(int vp_index, uint64_t address)
>  {
>      RISCVCPU *cpu;
>      CPUState *cs = qemu_get_cpu(vp_index);
> --
> 2.52.0
>
>