riscv_cpu_get_fflags() and riscv_cpu_set_fflags() are used by CSR/FCSR handling and operate on architectural CPU state rather than translated floating-point instructions.
Move them out of fpu_helper.c so fpu_helper.c can be built only when TCG is enabled. Signed-off-by: Zephyr Li <[email protected]> --- target/riscv/cpu.h | 3 --- target/riscv/cpu_helper.c | 28 ++++++++++++++++++++++++++++ target/riscv/fpu_helper.c | 27 --------------------------- target/riscv/internals.h | 3 +++ 4 files changed, 31 insertions(+), 30 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 7d79c7a5a7..2273567139 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -666,9 +666,6 @@ G_NORETURN void riscv_raise_exception(CPURISCVState *env, RISCVException exception, uintptr_t pc); -target_ulong riscv_cpu_get_fflags(CPURISCVState *env); -void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong); - #ifndef CONFIG_USER_ONLY void cpu_set_exception_base(int vp_index, target_ulong address); #endif diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 17305e1bb7..678c106ae5 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "qemu/main-loop.h" #include "cpu.h" +#include "fpu/softfloat.h" #include "internals.h" #include "pmu.h" #include "exec/cputlb.h" @@ -38,6 +39,33 @@ #include "pmp.h" #include "qemu/plugin.h" +target_ulong riscv_cpu_get_fflags(CPURISCVState *env) +{ + int soft = get_float_exception_flags(&env->fp_status); + target_ulong hard = 0; + + hard |= (soft & float_flag_inexact) ? FPEXC_NX : 0; + hard |= (soft & float_flag_underflow) ? FPEXC_UF : 0; + hard |= (soft & float_flag_overflow) ? FPEXC_OF : 0; + hard |= (soft & float_flag_divbyzero) ? FPEXC_DZ : 0; + hard |= (soft & float_flag_invalid) ? FPEXC_NV : 0; + + return hard; +} + +void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong hard) +{ + int soft = 0; + + soft |= (hard & FPEXC_NX) ? float_flag_inexact : 0; + soft |= (hard & FPEXC_UF) ? float_flag_underflow : 0; + soft |= (hard & FPEXC_OF) ? float_flag_overflow : 0; + soft |= (hard & FPEXC_DZ) ? float_flag_divbyzero : 0; + soft |= (hard & FPEXC_NV) ? float_flag_invalid : 0; + + set_float_exception_flags(soft, &env->fp_status); +} + int riscv_env_mmu_index(CPURISCVState *env, bool ifetch) { #ifdef CONFIG_USER_ONLY diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index af40561b31..eec6328281 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -23,33 +23,6 @@ #include "fpu/softfloat.h" #include "internals.h" -target_ulong riscv_cpu_get_fflags(CPURISCVState *env) -{ - int soft = get_float_exception_flags(&env->fp_status); - target_ulong hard = 0; - - hard |= (soft & float_flag_inexact) ? FPEXC_NX : 0; - hard |= (soft & float_flag_underflow) ? FPEXC_UF : 0; - hard |= (soft & float_flag_overflow) ? FPEXC_OF : 0; - hard |= (soft & float_flag_divbyzero) ? FPEXC_DZ : 0; - hard |= (soft & float_flag_invalid) ? FPEXC_NV : 0; - - return hard; -} - -void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong hard) -{ - int soft = 0; - - soft |= (hard & FPEXC_NX) ? float_flag_inexact : 0; - soft |= (hard & FPEXC_UF) ? float_flag_underflow : 0; - soft |= (hard & FPEXC_OF) ? float_flag_overflow : 0; - soft |= (hard & FPEXC_DZ) ? float_flag_divbyzero : 0; - soft |= (hard & FPEXC_NV) ? float_flag_invalid : 0; - - set_float_exception_flags(soft, &env->fp_status); -} - void helper_set_rounding_mode(CPURISCVState *env, uint32_t rm) { int softrm; diff --git a/target/riscv/internals.h b/target/riscv/internals.h index 4e1bb8849a..7f28190c29 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -193,6 +193,9 @@ static inline target_ulong get_xepc_mask(CPURISCVState *env) bool riscv_cpu_has_work(CPUState *cs); #endif +target_ulong riscv_cpu_get_fflags(CPURISCVState *env); +void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong val); + void riscv_cpu_ext_user_opts_init(void); void riscv_cpu_cfg_ext_add_user_opt(uint32_t ext_offset, bool value); void riscv_cpu_misa_ext_add_user_opt(uint32_t bit, bool value); -- 2.43.0
