riscv_raise_exception() is referenced by RISC-V internal code, but its current implementation relies on TCG's cpu_loop_exit_restore(). Move it to cpu_helper.c so op_helper.c can become TCG-only. The actual exception unwind still relies on TCG's cpu_loop_exit_restore(), so the non-TCG path remains unreachable.
Signed-off-by: Zephyr Li <[email protected]> --- target/riscv/cpu.h | 4 ---- target/riscv/cpu_helper.c | 19 +++++++++++++++++++ target/riscv/debug.c | 1 + target/riscv/internals.h | 4 ++++ target/riscv/op_helper.c | 15 --------------- target/riscv/zce_helper.c | 1 + 6 files changed, 25 insertions(+), 19 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 2273567139..98bda189e6 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -662,10 +662,6 @@ void riscv_translate_init(void); void riscv_translate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, vaddr pc, void *host_pc); -G_NORETURN void riscv_raise_exception(CPURISCVState *env, - RISCVException exception, - uintptr_t pc); - #ifndef CONFIG_USER_ONLY void cpu_set_exception_base(int vp_index, target_ulong address); #endif diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 678c106ae5..752752d520 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -39,6 +39,25 @@ #include "pmp.h" #include "qemu/plugin.h" +/* Exceptions processing helpers */ +G_NORETURN void riscv_raise_exception(CPURISCVState *env, + RISCVException exception, + uintptr_t pc) +{ + CPUState *cs = env_cpu(env); + + trace_riscv_exception(exception, + riscv_cpu_get_trap_name(exception, false), + env->pc); + + cs->exception_index = exception; +#ifdef CONFIG_TCG + cpu_loop_exit_restore(cs, pc); +#else + qemu_build_not_reached(); +#endif +} + target_ulong riscv_cpu_get_fflags(CPURISCVState *env) { int soft = get_float_exception_flags(&env->fp_status); diff --git a/target/riscv/debug.c b/target/riscv/debug.c index 5664466749..1a74aedeab 100644 --- a/target/riscv/debug.c +++ b/target/riscv/debug.c @@ -27,6 +27,7 @@ #include "qemu/log.h" #include "qapi/error.h" #include "cpu.h" +#include "internals.h" #include "trace.h" #include "exec/helper-proto.h" #include "exec/watchpoint.h" diff --git a/target/riscv/internals.h b/target/riscv/internals.h index 7f28190c29..1863012807 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -193,6 +193,10 @@ static inline target_ulong get_xepc_mask(CPURISCVState *env) bool riscv_cpu_has_work(CPUState *cs); #endif +G_NORETURN void riscv_raise_exception(CPURISCVState *env, + RISCVException exception, + uintptr_t pc); + target_ulong riscv_cpu_get_fflags(CPURISCVState *env); void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong val); diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 81873014cb..d17a8bbf10 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -28,21 +28,6 @@ #include "exec/tlb-flags.h" #include "trace.h" -/* Exceptions processing helpers */ -G_NORETURN void riscv_raise_exception(CPURISCVState *env, - RISCVException exception, - uintptr_t pc) -{ - CPUState *cs = env_cpu(env); - - trace_riscv_exception(exception, - riscv_cpu_get_trap_name(exception, false), - env->pc); - - cs->exception_index = exception; - cpu_loop_exit_restore(cs, pc); -} - void helper_raise_exception(CPURISCVState *env, uint32_t exception) { riscv_raise_exception(env, exception, 0); diff --git a/target/riscv/zce_helper.c b/target/riscv/zce_helper.c index 15bf0a99c8..152a7a63ef 100644 --- a/target/riscv/zce_helper.c +++ b/target/riscv/zce_helper.c @@ -18,6 +18,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "internals.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" -- 2.43.0
