Signed-off-by: Molly Chen <[email protected]>
---
target/riscv/tcg/insn_trans/trans_rvb.c.inc | 4 +++-
target/riscv/tcg/insn_trans/trans_rvp.c.inc | 2 +-
target/riscv/tcg/tcg-cpu.c | 6 ++----
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/target/riscv/tcg/insn_trans/trans_rvb.c.inc
b/target/riscv/tcg/insn_trans/trans_rvb.c.inc
index e4dcc7c9913..af53eb4fe4b 100644
--- a/target/riscv/tcg/insn_trans/trans_rvb.c.inc
+++ b/target/riscv/tcg/insn_trans/trans_rvb.c.inc
@@ -527,7 +527,9 @@ static bool trans_brev8(DisasContext *ctx, arg_brev8 *a)
static bool trans_pack(DisasContext *ctx, arg_pack *a)
{
- REQUIRE_ZBKB(ctx);
+ if (!has_ext(ctx, RVP) && !ctx->cfg_ptr->ext_zbkb) {
+ return false;
+ }
return gen_arith(ctx, a, EXT_NONE, gen_pack, NULL);
}
diff --git a/target/riscv/tcg/insn_trans/trans_rvp.c.inc
b/target/riscv/tcg/insn_trans/trans_rvp.c.inc
index e33e0ec110a..8c5b52ca970 100644
--- a/target/riscv/tcg/insn_trans/trans_rvp.c.inc
+++ b/target/riscv/tcg/insn_trans/trans_rvp.c.inc
@@ -1386,4 +1386,4 @@ GEN_DWS_REG_OP(psll_dws, gen_shift, EXT_NONE,
tcg_gen_shl_tl)
GEN_DWS_REG_OP(psrl_dws, gen_shift, EXT_ZERO, tcg_gen_shr_tl)
GEN_DWS_REG_OP(psra_dws, gen_shift, EXT_SIGN, tcg_gen_sar_tl)
-GEN_DW_PAIR_ARITH(ppaire_dh, REQUIRE_ZBKB(ctx); , EXT_NONE, gen_pack)
+GEN_DW_PAIR_ARITH(ppaire_dh, , EXT_NONE, gen_pack)
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index 1665583accf..36b0196a626 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -563,10 +563,8 @@ static void riscv_cpu_validate_p(RISCVCPU *cpu, Error
**errp)
return;
}
- if (!(cpu->cfg.ext_zmmul && cpu->cfg.ext_zba && cpu->cfg.ext_zbb &&
- cpu->cfg.ext_zbkb)) {
- error_setg(errp, "P extension requires zmmul, zba, zbb and zbkb "
- "extensions");
+ if (!(cpu->cfg.ext_zmmul && cpu->cfg.ext_zba && cpu->cfg.ext_zbb)) {
+ error_setg(errp, "P extension requires zmmul, zba and zbb extensions");
return;
}
}
--
2.34.1