All functions called by target has_work() handler take a const @cpu
argument. We can now fulfill the comment added in commit c2804566f6
("target/arm: do not clear halting reason in has_work helper"),
qualifying the handler const to denote its idempotency.Signed-off-by: Philippe Mathieu-Daudé <[email protected]> --- include/hw/core/sysemu-cpu-ops.h | 4 ++-- target/loongarch/internals.h | 2 +- target/riscv/internals.h | 2 +- target/s390x/s390x-internal.h | 2 +- target/alpha/cpu.c | 2 +- target/arm/cpu.c | 4 ++-- target/avr/cpu.c | 5 +++-- target/hexagon/cpu.c | 4 ++-- target/hppa/cpu.c | 2 +- target/i386/cpu.c | 2 +- target/loongarch/cpu.c | 4 ++-- target/m68k/cpu.c | 2 +- target/microblaze/cpu.c | 2 +- target/mips/cpu.c | 4 ++-- target/or1k/cpu.c | 2 +- target/ppc/cpu_init.c | 2 +- target/riscv/cpu.c | 2 +- target/rx/cpu.c | 2 +- target/s390x/cpu-system.c | 2 +- target/sh4/cpu.c | 2 +- target/sparc/cpu.c | 4 ++-- target/tricore/cpu.c | 4 ++-- target/xtensa/cpu.c | 4 ++-- 23 files changed, 33 insertions(+), 32 deletions(-) diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-ops.h index 9a45596169a..095bdcd997a 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -19,10 +19,10 @@ typedef struct SysemuCPUOps { /** * @has_work: Callback for checking if there is work to do. * - * This function should be idempotent (i.e. not change state) as + * This function is idempotent (i.e. not change state) as * it will likely be queried multiple times before a CPU resumes. */ - bool (*has_work)(CPUState *cpu); /* MANDATORY NON-NULL */ + bool (*has_work)(const CPUState *cpu); /* MANDATORY NON-NULL */ /** * @get_memory_mapping: Callback for obtaining the memory mappings. */ diff --git a/target/loongarch/internals.h b/target/loongarch/internals.h index 6a733e6c3a5..d86029bcb31 100644 --- a/target/loongarch/internals.h +++ b/target/loongarch/internals.h @@ -38,7 +38,7 @@ uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu); uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu); void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu, uint64_t value); -bool loongarch_cpu_has_work(CPUState *cs); +bool loongarch_cpu_has_work(const CPUState *cs); bool cpu_loongarch_hw_interrupts_pending(const CPULoongArchState *env); #endif /* !CONFIG_USER_ONLY */ diff --git a/target/riscv/internals.h b/target/riscv/internals.h index 5d84e4de960..782f12abfaf 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -203,7 +203,7 @@ static inline target_ulong get_xepc_mask(CPURISCVState *env) #ifndef CONFIG_USER_ONLY /* Our implementation of SysemuCPUOps::has_work */ -bool riscv_cpu_has_work(CPUState *cs); +bool riscv_cpu_has_work(const CPUState *cs); #endif /* Zjpm addr masking routine */ diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 54b62808d83..00917473a54 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -248,7 +248,7 @@ bool s390_cpu_system_realize(DeviceState *dev, Error **errp); void s390_cpu_finalize(Object *obj); void s390_cpu_system_class_init(CPUClass *cc); void s390_cpu_machine_reset_cb(void *opaque); -bool s390_cpu_has_work(CPUState *cs); +bool s390_cpu_has_work(const CPUState *cs); #endif /* CONFIG_USER_ONLY */ diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 7d1d036e1d3..21d4f8ac23b 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -77,7 +77,7 @@ static void alpha_restore_state_to_opc(CPUState *cs, } #ifndef CONFIG_USER_ONLY -static bool alpha_cpu_has_work(CPUState *cs) +static bool alpha_cpu_has_work(const CPUState *cs) { /* Here we are checking to see if the CPU should wake up from HALT. We will have gotten into this state only for WTINT from PALmode. */ diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 9761bb173c1..ba66359d410 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -141,9 +141,9 @@ int arm_cpu_mmu_index(CPUState *cs, bool ifetch) * CPU_INTERRUPT_*NMI anyway. So we might as well accept NMI here * unconditionally. */ -static bool arm_cpu_has_work(CPUState *cs) +static bool arm_cpu_has_work(const CPUState *cs) { - ARMCPU *cpu = ARM_CPU(cs); + const ARMCPU *cpu = ARM_CPU(cs); /* * Only another PSCI call can wake the CPU up in which case the diff --git a/target/avr/cpu.c b/target/avr/cpu.c index a01e6fa4751..1024c0ae9a2 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -23,6 +23,7 @@ #include "qemu/qemu-print.h" #include "exec/translation-block.h" #include "system/address-spaces.h" +#include "hw/core/cpu.h" #include "cpu.h" #include "disas/dis-asm.h" #include "tcg/debug-assert.h" @@ -43,10 +44,10 @@ static vaddr avr_cpu_get_pc(CPUState *cs) return cpu->env.pc_w * 2; } -static bool avr_cpu_has_work(CPUState *cs) +static bool avr_cpu_has_work(const CPUState *cs) { return cpu_test_interrupt(cs, CPU_INTERRUPT_HARD | CPU_INTERRUPT_RESET) - && cpu_interrupts_enabled(cpu_env(cs)); + && cpu_interrupts_enabled(cpu_env_const(cs)); } static int avr_cpu_mmu_index(CPUState *cs, bool ifetch) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 7ae5740899b..4ad1cae354a 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -364,9 +364,9 @@ bool hexagon_thread_is_enabled(const CPUHexagonState *env) return E_bit; } -static bool hexagon_cpu_has_work(CPUState *cs) +static bool hexagon_cpu_has_work(const CPUState *cs) { - CPUHexagonState *env = cpu_env(cs); + const CPUHexagonState *env = cpu_env_const(cs); return hexagon_thread_is_enabled(env) && (cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_SWI diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 7b1309a7c38..dbf58466c24 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -134,7 +134,7 @@ static void hppa_restore_state_to_opc(CPUState *cs, } #ifndef CONFIG_USER_ONLY -static bool hppa_cpu_has_work(CPUState *cs) +static bool hppa_cpu_has_work(const CPUState *cs) { return cpu_test_interrupt(cs, CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 8777bcbae85..93b617f94dc 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -10639,7 +10639,7 @@ int x86_cpu_pending_interrupt(const CPUState *cs, int interrupt_request) return 0; } -static bool x86_cpu_has_work(CPUState *cs) +static bool x86_cpu_has_work(const CPUState *cs) { return x86_cpu_pending_interrupt(cs, cs->interrupt_request) != 0; } diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 82ec35e081f..4c1aae4fb01 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -96,12 +96,12 @@ bool cpu_loongarch_hw_interrupts_pending(const CPULoongArchState *env) #endif #ifndef CONFIG_USER_ONLY -bool loongarch_cpu_has_work(CPUState *cs) +bool loongarch_cpu_has_work(const CPUState *cs) { bool has_work = false; if (cpu_test_interrupt(cs, CPU_INTERRUPT_HARD) && - cpu_loongarch_hw_interrupts_pending(cpu_env(cs))) { + cpu_loongarch_hw_interrupts_pending(cpu_env_const(cs))) { has_work = true; } diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 523694d8fbf..da3681fab1f 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -76,7 +76,7 @@ static void m68k_restore_state_to_opc(CPUState *cs, } #ifndef CONFIG_USER_ONLY -static bool m68k_cpu_has_work(CPUState *cs) +static bool m68k_cpu_has_work(const CPUState *cs) { return cpu_test_interrupt(cs, CPU_INTERRUPT_HARD); } diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 6013a8def8e..d1d2f0ec7e3 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -127,7 +127,7 @@ static void mb_restore_state_to_opc(CPUState *cs, } #ifndef CONFIG_USER_ONLY -static bool mb_cpu_has_work(CPUState *cs) +static bool mb_cpu_has_work(const CPUState *cs) { return cpu_test_interrupt(cs, CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } diff --git a/target/mips/cpu.c b/target/mips/cpu.c index c069aa1c0b7..0f9374d98a9 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -134,9 +134,9 @@ static vaddr mips_cpu_get_pc(CPUState *cs) } #if !defined(CONFIG_USER_ONLY) -static bool mips_cpu_has_work(CPUState *cs) +static bool mips_cpu_has_work(const CPUState *cs) { - CPUMIPSState *env = cpu_env(cs); + const CPUMIPSState *env = cpu_env_const(cs); bool has_work = false; /* diff --git a/target/or1k/cpu.c b/target/or1k/cpu.c index 42d9351b6d7..10b13ae69cd 100644 --- a/target/or1k/cpu.c +++ b/target/or1k/cpu.c @@ -76,7 +76,7 @@ static void openrisc_restore_state_to_opc(CPUState *cs, } #ifndef CONFIG_USER_ONLY -static bool openrisc_cpu_has_work(CPUState *cs) +static bool openrisc_cpu_has_work(const CPUState *cs) { return cpu_test_interrupt(cs, CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER); } diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 85a91ff4bb6..fd63cd6ab09 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7224,7 +7224,7 @@ static int ppc_cpu_mmu_index(CPUState *cs, bool ifetch) #endif /* CONFIG_TCG */ #ifndef CONFIG_USER_ONLY -static bool ppc_cpu_has_work(CPUState *cs) +static bool ppc_cpu_has_work(const CPUState *cs) { return cpu_test_interrupt(cs, CPU_INTERRUPT_HARD); } diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index ab2868dc1e2..b455b997561 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -950,7 +950,7 @@ int riscv_cpu_vsirq_pending(const CPURISCVState *env) (irqs | irqs_f_vs), env->hviprio); } -bool riscv_cpu_has_work(CPUState *cs) +bool riscv_cpu_has_work(const CPUState *cs) { RISCVCPU *cpu = RISCV_CPU(cs); CPURISCVState *env = &cpu->env; diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 69946928995..dfa09a85bce 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -73,7 +73,7 @@ static void rx_restore_state_to_opc(CPUState *cs, cpu->env.pc = data[0]; } -static bool rx_cpu_has_work(CPUState *cs) +static bool rx_cpu_has_work(const CPUState *cs) { return cpu_test_interrupt(cs, CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIR); } diff --git a/target/s390x/cpu-system.c b/target/s390x/cpu-system.c index cc9685221ae..22ed2b097bb 100644 --- a/target/s390x/cpu-system.c +++ b/target/s390x/cpu-system.c @@ -39,7 +39,7 @@ #include "system/tcg.h" #include "hw/core/sysemu-cpu-ops.h" -bool s390_cpu_has_work(CPUState *cs) +bool s390_cpu_has_work(const CPUState *cs) { S390CPU *cpu = S390_CPU(cs); diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 55c73a1da35..b0ed356d0f7 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -107,7 +107,7 @@ static bool superh_io_recompile_replay_branch(CPUState *cs, return false; } -static bool superh_cpu_has_work(CPUState *cs) +static bool superh_cpu_has_work(const CPUState *cs) { return cpu_test_interrupt(cs, CPU_INTERRUPT_HARD); } diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 2baa5036871..f7c04daf0c9 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -783,10 +783,10 @@ static void sparc_restore_state_to_opc(CPUState *cs, } #ifndef CONFIG_USER_ONLY -static bool sparc_cpu_has_work(CPUState *cs) +static bool sparc_cpu_has_work(const CPUState *cs) { return cpu_test_interrupt(cs, CPU_INTERRUPT_HARD) && - cpu_interrupts_enabled(cpu_env(cs)); + cpu_interrupts_enabled(cpu_env_const(cs)); } #endif /* !CONFIG_USER_ONLY */ diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 6d448727005..33a5875ef24 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -111,9 +111,9 @@ static void tricore_cpu_reset_hold(Object *obj, ResetType type) cpu_state_reset(cpu_env(cs)); } -static bool tricore_cpu_has_work(CPUState *cs) +static bool tricore_cpu_has_work(const CPUState *cs) { - return true; + return true; /* XXX */ } static int tricore_cpu_mmu_index(CPUState *cs, bool ifetch) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 99c8bd4b5fb..fe7965651f4 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -140,9 +140,9 @@ static void xtensa_restore_state_to_opc(CPUState *cs, } #ifndef CONFIG_USER_ONLY -static bool xtensa_cpu_has_work(CPUState *cs) +static bool xtensa_cpu_has_work(const CPUState *cs) { - CPUXtensaState *env = cpu_env(cs); + const CPUXtensaState *env = cpu_env_const(cs); return !env->runstall && env->pending_irq_level; } -- 2.53.0
