Add the const qualifier to CPURISCVState when the argument is accessed without modification.
Note we have to use the recently introduced env_archcpu_const() helper in riscv_cpu_cfg(). Signed-off-by: Philippe Mathieu-Daudé <[email protected]> --- target/riscv/cpu.h | 12 ++++++------ target/riscv/cpu.c | 8 ++++---- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 2333dcecd8a..9fd9ba54147 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -637,10 +637,10 @@ int riscv_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); int riscv_cpu_hviprio_index2irq(int index, int *out_irq, int *out_rdzero); uint8_t riscv_cpu_default_priority(int irq); uint64_t riscv_cpu_all_pending(const CPURISCVState *env); -int riscv_cpu_mirq_pending(CPURISCVState *env); -int riscv_cpu_sirq_pending(CPURISCVState *env); -int riscv_cpu_vsirq_pending(CPURISCVState *env); -int riscv_cpu_pending_to_irq(CPURISCVState *env, +int riscv_cpu_mirq_pending(const CPURISCVState *env); +int riscv_cpu_sirq_pending(const CPURISCVState *env); +int riscv_cpu_vsirq_pending(const CPURISCVState *env); +int riscv_cpu_pending_to_irq(const CPURISCVState *env, int extirq, unsigned int extirq_def_prio, uint64_t pending, const uint8_t *iprio); @@ -753,9 +753,9 @@ static inline RISCVMXL riscv_cpu_mxl(const CPURISCVState *env) #endif #define riscv_cpu_mxl_bits(env) (1UL << (4 + riscv_cpu_mxl(env))) -static inline const RISCVCPUConfig *riscv_cpu_cfg(CPURISCVState *env) +static inline const RISCVCPUConfig *riscv_cpu_cfg(const CPURISCVState *env) { - return &env_archcpu(env)->cfg; + return &env_archcpu_const(env)->cfg; } #if !defined(CONFIG_USER_ONLY) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index a344daf62f8..ab2868dc1e2 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -864,7 +864,7 @@ uint8_t riscv_cpu_default_priority(int irq) return default_iprio[irq] ? default_iprio[irq] : IPRIO_MMAXIPRIO; }; -int riscv_cpu_pending_to_irq(CPURISCVState *env, +int riscv_cpu_pending_to_irq(const CPURISCVState *env, int extirq, unsigned int extirq_def_prio, uint64_t pending, const uint8_t *iprio) { @@ -917,7 +917,7 @@ uint64_t riscv_cpu_all_pending(const CPURISCVState *env) return (env->mip | vsgein | vstip) & env->mie; } -int riscv_cpu_mirq_pending(CPURISCVState *env) +int riscv_cpu_mirq_pending(const CPURISCVState *env) { uint64_t irqs = riscv_cpu_all_pending(env) & ~env->mideleg & ~(MIP_SGEIP | MIP_VSSIP | MIP_VSTIP | MIP_VSEIP); @@ -926,7 +926,7 @@ int riscv_cpu_mirq_pending(CPURISCVState *env) irqs, env->miprio); } -int riscv_cpu_sirq_pending(CPURISCVState *env) +int riscv_cpu_sirq_pending(const CPURISCVState *env) { uint64_t irqs = riscv_cpu_all_pending(env) & env->mideleg & ~env->hideleg; uint64_t irqs_f = env->mvip & env->mvien & ~env->mideleg & env->sie; @@ -935,7 +935,7 @@ int riscv_cpu_sirq_pending(CPURISCVState *env) irqs | irqs_f, env->siprio); } -int riscv_cpu_vsirq_pending(CPURISCVState *env) +int riscv_cpu_vsirq_pending(const CPURISCVState *env) { uint64_t irqs = riscv_cpu_all_pending(env) & env->mideleg & env->hideleg; uint64_t irqs_f_vs = env->hvip & env->hvien & ~env->hideleg & env->vsie; -- 2.53.0
