On 2026/08/26 10:38 AM, Chinmay Rath wrote:
> From: Nikhil Kumar Singh <[email protected]>
> 
> Move EXTSWSLI to decodetree using the XS-form layout with a custom
> %xs_sh field to represent the fractured shift encoding.
> 
> This replaces legacy GEN_HANDLER-based implementations with a single
> trans_EXTSWSLI() handler.
> 
> The implementation intentionally operates directly on the destination
> GPR to preserve exact TCG output and avoid introducing temporary
> variables, matching legacy behavior.
> 
> Testing:
>   - Verified TCG equivalence with legacy implementation.
> 
> Signed-off-by: Nikhil Kumar Singh <[email protected]>
> Reviewed-by: Glenn Miles <[email protected]>
> Signed-off-by: Chinmay Rath <[email protected]>
> ---
>  target/ppc/insn32.decode |  8 ++++++++
>  target/ppc/translate.c   | 43 ++++++++++++++--------------------------
>  2 files changed, 23 insertions(+), 28 deletions(-)
> 
> diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
> index 0e9c68f2fb..342e65dadf 100644
> --- a/target/ppc/insn32.decode
> +++ b/target/ppc/insn32.decode
> @@ -117,6 +117,11 @@
>  &X_sa_rc        rs ra rc
>  @X_sa_rc        ...... rs:5 ra:5 ..... .......... rc:1          &X_sa_rc
>  
> +# XS-form with fractured shift amount
> +%xs_sh           1:1 11:5
> +&XS              rs ra sh rc
> +@XS              ...... rs:5 ra:5 ..... ......... . rc:1        &XS sh=%xs_sh
> +
>  %x_frtp         22:4 !function=times_2
>  %x_frap         17:4 !function=times_2
>  %x_frbp         12:4 !function=times_2
> @@ -1301,6 +1306,9 @@ XVF64GERPN      111011 ... -- .... 0 ..... 10111010 ..- 
>  @XX3_at xa=%xx_xa_pair
>  XVF64GERNP      111011 ... -- .... 0 ..... 01111010 ..-  @XX3_at 
> xa=%xx_xa_pair
>  XVF64GERNN      111011 ... -- .... 0 ..... 11111010 ..-  @XX3_at 
> xa=%xx_xa_pair
>  
> +##Extend Sign Word and Shift Left Immediate XS-form
> +EXTSWSLI         011111 ..... ..... ..... 110111101 . .         @XS
> +
>  ## Vector Division Instructions
>  
>  VDIVSW          000100 ..... ..... ..... 00110001011    @VX
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 06ed2adf10..e627f48f9e 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -2470,30 +2470,6 @@ static void gen_sradi1(DisasContext *ctx)
>      gen_sradi(ctx, 1);
>  }
>  
> -/* extswsli & extswsli. */
> -static inline void gen_extswsli(DisasContext *ctx, int n)
> -{
> -    int sh = SH(ctx->opcode) + (n << 5);
> -    TCGv dst = cpu_gpr[rA(ctx->opcode)];
> -    TCGv src = cpu_gpr[rS(ctx->opcode)];
> -
> -    tcg_gen_ext32s_tl(dst, src);
> -    tcg_gen_shli_tl(dst, dst, sh);
> -    if (unlikely(Rc(ctx->opcode) != 0)) {
> -        gen_set_Rc0(ctx, dst);
> -    }
> -}
> -
> -static void gen_extswsli0(DisasContext *ctx)
> -{
> -    gen_extswsli(ctx, 0);
> -}
> -
> -static void gen_extswsli1(DisasContext *ctx)
> -{
> -    gen_extswsli(ctx, 1);
> -}
> -
>  /* srd & srd. */
>  static void gen_srd(DisasContext *ctx)
>  {
> @@ -5750,6 +5726,21 @@ static bool resolve_PLS_D(DisasContext *ctx, arg_D *d, 
> arg_PLS_D *a)
>      return true;
>  }
>  
> +static bool trans_EXTSWSLI(DisasContext *ctx, arg_XS *a)
> +{
> +    REQUIRE_64BIT(ctx);
> +    REQUIRE_INSNS_FLAGS2(ctx, ISA300);

TRANS64_FLAGS2 exists and could technically be used here, but it would
require splitting into a do_extswsli helper + a macro expansion, adding
an extra indirection with no benefit since the logic is unique to
EXTSWSLI and not shared with any other instruction. The hand-written
trans_EXTSWSLI looks the right choice.

Reviewed-by: Amit Machhiwal <[email protected]>

Thanks,
Amit

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