On 2026/08/26 10:38 AM, Chinmay Rath wrote:
> From: Shivani Nittor <[email protected]>
> 
> Convert mcrf to decode tree specification.The functionality

minor: s/The/ The/

> was tested by comparing the qemu -D log -d op,in_asm output
> as well as single stepping gdb.
> 
> Signed-off-by: Shivani Nittor <[email protected]>
> Reviewed-by: Glenn Miles <[email protected]>
> Signed-off-by: Chinmay Rath <[email protected]>
> ---
>  target/ppc/insn32.decode             | 6 ++++++
>  target/ppc/translate.c               | 7 -------
>  target/ppc/translate/misc-impl.c.inc | 6 ++++++
>  3 files changed, 12 insertions(+), 7 deletions(-)

Reviewed-by: Amit Machhiwal <[email protected]>

> 
> diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
> index af35a44223..7d792d2318 100644
> --- a/target/ppc/insn32.decode
> +++ b/target/ppc/insn32.decode
> @@ -1455,6 +1455,12 @@ MSGSYNC         011111 ----- ----- ----- 1101110110 -
>  SYNC            011111 -- ... --- ..   ----- 1001010110 -           @X_sync
>  EIEIO           011111 ----- ----- ----- 1101010110 -
>  
> +# Condition Register Field Instruction
> +
> +&XL_bfa         bf bfa
> +@XL_bfa         ...... bf:3 .. bfa:3 .. ..... ..... ..... .
> +MCRF            010011 ... -- ... -- ----- 00000 00000 -       @XL_bfa
> +
>  # Branch History Rolling Buffer (BHRB) Instructions
>  
>  &XFX_bhrbe      rt bhrbe
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index f00071aa91..55b515cec7 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -3642,12 +3642,6 @@ GEN_CRLOGIC(crorc, tcg_gen_orc_i32, 0x0D);
>  /* crxor */
>  GEN_CRLOGIC(crxor, tcg_gen_xor_i32, 0x06);
>  
> -/* mcrf */
> -static void gen_mcrf(DisasContext *ctx)
> -{
> -    tcg_gen_mov_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfS(ctx->opcode)]);
> -}
> -
>  /***                           System linkage                              
> ***/
>  
>  /* rfi (supervisor only) */
> @@ -5722,7 +5716,6 @@ GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW),
>  GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW),
>  GEN_HANDLER(bclr, 0x13, 0x10, 0x00, 0x00000000, PPC_FLOW),
>  GEN_HANDLER_E(bctar, 0x13, 0x10, 0x11, 0x0000E000, PPC_NONE, 
> PPC2_BCTAR_ISA207),
> -GEN_HANDLER(mcrf, 0x13, 0x00, 0xFF, 0x00000001, PPC_INTEGER),
>  GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW),
>  #if defined(TARGET_PPC64)
>  GEN_HANDLER(rfid, 0x13, 0x12, 0x00, 0x03FF8001, PPC_64B),
> diff --git a/target/ppc/translate/misc-impl.c.inc 
> b/target/ppc/translate/misc-impl.c.inc
> index cbf82b1ea0..890fbb209e 100644
> --- a/target/ppc/translate/misc-impl.c.inc
> +++ b/target/ppc/translate/misc-impl.c.inc
> @@ -155,3 +155,9 @@ static bool trans_ATTN(DisasContext *ctx, arg_ATTN *a)
>      return false;
>  #endif
>  }
> +
> +static bool trans_MCRF(DisasContext *ctx, arg_MCRF *a)
> +{
> +    tcg_gen_mov_i32(cpu_crf[a->bf], cpu_crf[a->bfa]);
> +    return true;
> +}
> -- 
> 2.55.0
> 

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