On Mon, 31 Aug 2026 at 23:00, Mingliang Liu
<[email protected]> wrote:
>
> Co-Auther: Daniel Henrique Barboza <[email protected]>

Typo: Co-Author

This should include a Signed-off-by from Daniel as well.

Mention in the commit message that the assembler doesn't support the
opcodes yet so instructions are hardcoded for the time being.

Also worth mentioning that binutils/gas 2.47 has the 0.7 opcodes(!),
so the test should never be built with that version, even once support
is changed over to use the mnemonics.

https://github.com/gnutools/binutils-gdb/commit/d3b84dac949ac10f8736c85253b4a1073d244ac1

> Signed-off-by: Mingliang Liu <[email protected]>
> ---
>  tests/tcg/riscv64/Makefile.softmmu-target |   8 +
>  tests/tcg/riscv64/test-zvabd.S            | 659 ++++++++++++++++++++++
>  2 files changed, 667 insertions(+)
>  create mode 100644 tests/tcg/riscv64/test-zvabd.S
>
> diff --git a/tests/tcg/riscv64/Makefile.softmmu-target 
> b/tests/tcg/riscv64/Makefile.softmmu-target
> index 6a219c306c..787fdaab40 100644
> --- a/tests/tcg/riscv64/Makefile.softmmu-target
> +++ b/tests/tcg/riscv64/Makefile.softmmu-target
> @@ -71,5 +71,13 @@ EXTRA_RUNS += run-test-misa-w
>  run-test-misa-w: test-misa-w
>         $(call run-test, $<, $(QEMU) -cpu 
> rv64$(comma)x-misa-w=true$(comma)c=true$(comma)v=true $(QEMU_OPTS)$<)
>
> +EXTRA_RUNS += run-test-zvabd
> +ZVABD_CPU = rv64$(comma)v=true$(comma)vlen=256$(comma)x-zvabd=true
> +CLEANFILES += test-zvabd
> +test-zvabd: test-zvabd.o $(LINK_SCRIPT)
> +       $(LD) $(LDFLAGS) $< -o $@
> +run-test-zvabd: test-zvabd
> +       $(call run-test, $<, $(QEMU) -cpu $(ZVABD_CPU) $(QEMU_OPTS)$<)
> +
>  # We don't currently support the multiarch system tests
>  undefine MULTIARCH_TESTS
> diff --git a/tests/tcg/riscv64/test-zvabd.S b/tests/tcg/riscv64/test-zvabd.S
> new file mode 100644
> index 0000000000..01db2fd7dc
> --- /dev/null
> +++ b/tests/tcg/riscv64/test-zvabd.S
> @@ -0,0 +1,659 @@
> +/*
> + * Test the Zvabd vector absolute-difference instructions and the vabs.v
> + * pseudoinstruction.
> + *

> +test_vabs_v:
> +       vsetivli zero, 2, e8, m1, ta, ma
> +
> +       /* Load .arr_neg array in v1 */
> +       la     t0,.arr_neg
> +       vle8.v v1,0(t0)
> +
> +       /* vabs.v v2, v1 (vabd.vx v2, v1, x0) raw opcode */
> +       .word   0x56106157

Palmer mentioned using .insn instead of .word. It is a little bit
easier to check than the raw .word:

.insn r 0x57, 0x6, 0x2b, x2, x0, x1

I don't have a strong opinion either way.

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