On 23 Jan 2018 at 9:21, Graeme Gregory via Ql-Users wrote: > > I've already started putting together a clone using an Xilinx > > XC9572XL, which I have lying around. The Verilog file compiled from > > the get-go, I just had to remove the additional SS lines because of > > Pin restrictions in the small chip on my eval board. The long lines to > > the board might not exactly help, though... might take a while, but I > > will try to make a GoldCard compatible QL-SD one way or another, now > > that I have your release to base it on :-) > > > Doesnt gold card have a parralell port? > > That should be enough IO pins to connect an SD card which just needs SPI.
I already designed an SD card device for SGC, Q40, Q60 parallel port many years ago. It even draws enough supply power by some tricks, no need for AC adaptor. Due to the slow speed I did not release it. IIRC it was like floppy on Q40/Q60 and even slower on SGC. SGC data lines are unidirectional, allowing only bitbanging. No PAR on GC. Peter _______________________________________________ QL-Users Mailing List
