Re: SCSI Manager 4.3 and the Q900/950?

[Derek Morton]

Determining the needed speed of the SRAM does not really work in that 
fashion...  although it is a common mistake people make.  What you need 
to keep in mind is that to run at zero wait states the memory must get 
the data on the bus within the (zero wait state) timing requirements of 
the CPU.  Remember that any time for decoding, processing and signal 
propagation must be included in the equation.  I don't recall what I 
ended up getting, but I think it might have been around 10 or 12 nSec.  
With crafty design you can do a sort of pre-fetch and simply hold the 
outputs off until decoding is complete.  This allows for slower devices 
to be used, but at a tremendous power cost (as all devices must be 
enabled all the time).

Is the zero wait states based on the speed rating of the SRAM or are 
there other specifications that you must take into account?   50 MHz 
is a 20ns period, so are you looking at 20ns SRAM?
I found some right angle connectors...  And only one tube at that!  I 
think I may end up using a secondary connector to bring the board back 
upright...  but there is the extra capacitance to consider <groan>.  
One of the advantages of being in the design industry is that I have a 
lost of resources to draw from and can readily get samples of many 
parts.

Did you find some?  Or did you decide on a work around of some kind? I 
had a similar problem when I was looking for the CPU connector for the 
x500 PMacs.  AMP has about 300 in stock, but their minimum order is 
1008 at $9 each and all the distributers are out of stock.   But for 
$9072 they'll run off another batch of 1008 for me...
The code will copy the ROM to the SRAM (very easy routine) and then I 
can modify it since it is in RAM.  To substitute the RAM version for 
the ROM version I can have the GALs disable the memory manager for any 
ROM calls.  This is the same thing needed to make the SRAM run as zero 
wait state memory (as opposed to a write through cache).

So you need to write some kind of utility to redirect the ROM reads to 
your SRAM card, plus add/modify the actual ROM code.   That's the part 
that is a complete mystery to me.   I wouldn't know where to begin, 
except at the beginning of several years of study of Mac programming.
There are a couple of board houses I deal with at work.  I am sure that 
I can get somebody to the board for me...  But with tooling charges it 
will run me around $400.00 per design to get five flats (I will 
probably put both boards on the same flat and likely three or four 
steps of each).  We have the facilities for doing prototypes at work, 
but the masked outputs from the board house are so much nicer.  :-)

I agree that a ROM SIMM is much better than replacing the motherboard 
ROMs.  It's just that getting the .050" board  seems to be difficult 
these days.  Will you be etching your own boards?
The 53CF96 is one change...  Let's just say that a few PPC 8100 Macs 
made the ultimate sacrifice for my creation.  I also swapped out the 
Ethernet Controller with a 33MHz SONIC.  This allows me to up the I/O 
bus frequency...  unfortunately to do that I also need to modify some 
of the timing registers in the controllers...  Hence the ROM mods.  It 
must be done in the ROM to be able to boot from devices on the built in 
busses, as the timing will fall way out of spec otherwise.  Since I had 
to make these ROM mods, I thought it would be nice to add a few extra 
changes.

Did you put in a 53CF96 for the SCSI chip or something more advanced? 
The CF would give you the potential for Fast SCSI instead of just 5 
MB/s and I think it's pin compatible with the existing 53C96. However, 
the part is very hard to find and rather expensive ($25/chip)--at 
least it was a couple of years ago.   There was a lot of 10 or so of 
them on Ebay in the last year or so.   Did you pick those up, if this 
is the chip you're using?

What did you do to the ethernet controller?
I already have the PROMs (1 set), but I need to get everything else 
done before I burn them.  The two GAL programs are done, so this winter 
I hope to get the layouts done (after review and verification).  With 
any luck I will have a lickity-split 950 this coming spring.

HEY!  What do you think about the idea of adding a ROM socket to the 
SRAM board?  It could be used to have a ROM based system (7.xx or maybe 
even 8.x).  Can you say Slot $E declaration ROM?  Kind of like a...  
What?  Classic?  4 MB would probably do it...  Trick the system into 
thinking the ROM is a drive...  It could probably even be flash...  
Hmmmmmmm...

Derek

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