[casper] Debian Sqeeze and BORPH
Hi All, I've been playing around in my spare time trying to get Debian squeeze as the OS for a ROACH board (possibly a bad/pointless idea but hey). The issue I'm facing is that I need a kernel with UDEV support in and so launched into cross-compiling one. The problem is finding a BORPH patch that matches the kernel - I came across the following two links https://github.com/brandonhamilton/BORPH http://wiki.netfpga.org/foswiki/bin/view/NetFPGA/OneGig/BORPH The first one doesn't mention which kernel the patch is for (fails on latest 2.6) and then second one has no permissions for the link. Does anyone have links to a later version of the kernel with the BORPH patch in? I'd like sources so I can really break things. Cheers, Ross -- Ross Williamson Research Scientist - Sub-mm Group California Institute of Technology 626-395-2647 (office) 312-504-3051 (Cell)
Re: [casper] PPS Sync on Toolflow 14.2
Hi Dave, here (http://www.med.ira.inaf.it/~mattana/casper/) you can find a screenshot and the model file. I did this simulation because I see the same problem on the running project on my ROACH1 board (the pps connected to a led is not blinking anymore). The same simulation is working nominally using the very old 7.1 libraries, I'm using the ska-sa 14.2 toolflow with mlib_devel updated from git on Tue March 5 14:54:36 2013 (commit from wnew). PPS line in our lab is inverted. Cheers, Andrea 2013/4/3 David MacMahon dav...@astro.berkeley.edu: Hi, Andrea, Are you seeing problems in simulation or on actual hardware? I just made a quick test model and the sync input was propagated fine in simulation. Can you please explain your symptoms in more detail? Which version of mlib_devel are you using? What hardware platform are you targeting? Thanks, Dave On Apr 3, 2013, at 7:16 AM, Andrea Mattana wrote: Does anybody have tested the sync line (pps) on the iadc of the new toolflow? Cheers, Andrea 2013/3/27 Andrea Mattana matt...@ira.inaf.it: Hi all, I have tested the PPS over the sync0-1-2-3 output port of the iADC on the new libraries with a very simple design and it seems that the simulated PPS in input is not propagated anymore. I have tested a very similar model file on a old Ibob toolflow and it works fine. There are any new constraints or it is just a bug (or better, I'm wrong something?)?? Cheers, Andrea
Re: [casper] PPS Sync on Toolflow 14.2
Hi Andrea I have simulated the sync pulse with out any issues on the latest version of the ska-mlib_devel libraries with matlab 2012b and Xilinx 14.4 I have taken your design and put a scope on the output of the OR block and it looks fine. Regards Wes On Thu, Apr 4, 2013 at 9:15 AM, Andrea Mattana matt...@ira.inaf.it wrote: Hi Dave, here (http://www.med.ira.inaf.it/~mattana/casper/) you can find a screenshot and the model file. I did this simulation because I see the same problem on the running project on my ROACH1 board (the pps connected to a led is not blinking anymore). The same simulation is working nominally using the very old 7.1 libraries, I'm using the ska-sa 14.2 toolflow with mlib_devel updated from git on Tue March 5 14:54:36 2013 (commit from wnew). PPS line in our lab is inverted. Cheers, Andrea 2013/4/3 David MacMahon dav...@astro.berkeley.edu: Hi, Andrea, Are you seeing problems in simulation or on actual hardware? I just made a quick test model and the sync input was propagated fine in simulation. Can you please explain your symptoms in more detail? Which version of mlib_devel are you using? What hardware platform are you targeting? Thanks, Dave On Apr 3, 2013, at 7:16 AM, Andrea Mattana wrote: Does anybody have tested the sync line (pps) on the iadc of the new toolflow? Cheers, Andrea 2013/3/27 Andrea Mattana matt...@ira.inaf.it: Hi all, I have tested the PPS over the sync0-1-2-3 output port of the iADC on the new libraries with a very simple design and it seems that the simulated PPS in input is not propagated anymore. I have tested a very similar model file on a old Ibob toolflow and it works fine. There are any new constraints or it is just a bug (or better, I'm wrong something?)?? Cheers, Andrea
Re: [casper] PPS Sync on Toolflow 14.2
I have updated to the latest mlib_devel, and installed the 14.4. I cannot run the simulation because my MATLAB 8.0 doesn't have yet the DSP Toolbox needed for the downsampler into the iADC block, anyway I found a difference with the past version, the actual ADC block takes in input just three simulation signals rather than four. I have posted the new screenshot on http://www.med.ira.inaf.it/~mattana/casper/ . Do you think I will be able to simulate/compiling it replacing the downsampler block using the simulink downsampler without having installed the DSP Toolbox?! (I need to check to the mail archive because somebody has notified me some weeks ago). Cheers, Andrea 2013/4/4 Wesley New wes...@ska.ac.za: Hi Andrea I have simulated the sync pulse with out any issues on the latest version of the ska-mlib_devel libraries with matlab 2012b and Xilinx 14.4 I have taken your design and put a scope on the output of the OR block and it looks fine. Regards Wes On Thu, Apr 4, 2013 at 9:15 AM, Andrea Mattana matt...@ira.inaf.it wrote: Hi Dave, here (http://www.med.ira.inaf.it/~mattana/casper/) you can find a screenshot and the model file. I did this simulation because I see the same problem on the running project on my ROACH1 board (the pps connected to a led is not blinking anymore). The same simulation is working nominally using the very old 7.1 libraries, I'm using the ska-sa 14.2 toolflow with mlib_devel updated from git on Tue March 5 14:54:36 2013 (commit from wnew). PPS line in our lab is inverted. Cheers, Andrea 2013/4/3 David MacMahon dav...@astro.berkeley.edu: Hi, Andrea, Are you seeing problems in simulation or on actual hardware? I just made a quick test model and the sync input was propagated fine in simulation. Can you please explain your symptoms in more detail? Which version of mlib_devel are you using? What hardware platform are you targeting? Thanks, Dave On Apr 3, 2013, at 7:16 AM, Andrea Mattana wrote: Does anybody have tested the sync line (pps) on the iadc of the new toolflow? Cheers, Andrea 2013/3/27 Andrea Mattana matt...@ira.inaf.it: Hi all, I have tested the PPS over the sync0-1-2-3 output port of the iADC on the new libraries with a very simple design and it seems that the simulated PPS in input is not propagated anymore. I have tested a very similar model file on a old Ibob toolflow and it works fine. There are any new constraints or it is just a bug (or better, I'm wrong something?)?? Cheers, Andrea
Re: [casper] To disable the PAR timing check:
Hi CASPER team, Thanks to everybody for the suggestions. Finally the problem has been solved. This a typical error when you have timing error: “ERROR: 1 constraint not met. PAR could not meet all timing constraints. A bitstream will not be generated.” It can be generated for different delays in the design, and it is possible to solved adding strategically other delays ….but it not was the case. Thanks to one member of JPL called Ryan or for my Super Ryan checking the system.twr report saw a very big problem in the design “high value for the fanout of about 256” it was the real problem. Slack: -0.516ns (requirement - (data path - clock path skew + uncertainty)) Requirement: 4.000ns Data Path Delay: 4.481ns (Levels of Logic = 1) Clock Path Skew: -0.035ns (-0.123 - -0.088) Source Clock: adc0_clk rising at 0.000ns Destination Clock:adc0_clk rising at 4.000ns Clock Uncertainty:0.000ns Logical Resource(s) - --- SLICE_X89Y76.YQ Tcko 0.370 ./latency_gt_0.fd_array[1].reg_comp/fd_prim_array[0].bit_is_0.fdre_comp SLICE_X44Y98.G4 net (fanout=265) 2.453 - --- Total 4.481ns (0.908ns logic, 3.573ns route) (20.3% logic, 79.7% route) Now this signal does not feed a lot of gates directly, if not thought different buffers to obtain a suitable fanout. So if you have timing errors, have a look to the fanout. Thanks very much to the CASPER community for the help and especially to Ryan. Isaac
