Re: [edk2-devel] [platforms/devel-dynamictables-reorg PATCH 0/1] Platform/NXP:LX2160: Update paths to DynamicTables

2024-07-04 Thread Sami Mujawar
Hi Pierre,

Thank you for this patch.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 04/07/2024, 09:44, "pierre.gond...@arm.com <mailto:pierre.gond...@arm.com>" 
mailto:pierre.gond...@arm.com>> wrote:


From: Pierre Gondois mailto:pierre.gond...@arm.com>>


Additional patch to appply on top of:
- [platforms/devel-dynamictables-reorg PATCH 00/14] Platform: 
N1Sdp,Morello,NXP: Move DynamicTablesPkg obj to Arch Common 
https://edk2.groups.io/g/devel/message/119520 
<https://edk2.groups.io/g/devel/message/119520>


Cc: AbdulLateef Attar mailto:abdullateef.at...@amd.com>>
Cc: Girish Mahadevan mailto:gmahade...@nvidia.com>>
Cc: Jeff Brasen mailto:jbra...@nvidia.com>>
Cc: Jeshua Smith mailto:jesh...@nvidia.com>>
Cc: Leif Lindholm mailto:quic_llind...@quicinc.com>>
Cc: Meenakshi Aggarwal mailto:meenakshi.aggar...@nxp.com>>
Cc: Pierre Gondois mailto:pierre.gond...@arm.com>>
Cc: Sami Mujawar mailto:sami.muja...@arm.com>>
Cc: Sunil V L mailto:suni...@ventanamicro.com>>
Cc: Yeo Reum Yun mailto:yeoreum@arm.com>>




Pierre Gondois (1):
Platform/NXP:LX2160: Update paths to DynamicTables generators


Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)


-- 
2.25.1







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Re: [edk2-devel] [staging/dynamictables-reorg PATCH 2/2] DynamicTablesPkg: Add EFIAPI to generators hooks

2024-07-03 Thread Sami Mujawar
Hi Pierre,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 03/07/2024, 10:54, "Pierre Gondois" mailto:pierre.gond...@arm.com>> wrote:


For X64 builds, the EFIAPI is replaced by '(__attribute__((ms_abi))'.
This might lead to build error for some ACPI tablte generators
due to function prototype mismatch.


Add the EFIAPI to ACPI table generator hooks:
- ACPI_TABLE_GENERATOR_BUILD_TABLEEX
- ACPI_TABLE_GENERATOR_FREE_TABLEEX


Signed-off-by: Pierre Gondois mailto:pierre.gond...@arm.com>>
---
DynamicTablesPkg/Include/AcpiTableGenerator.h | 8 
.../Library/Acpi/Common/AcpiMcfgLib/McfgGenerator.c | 1 +
.../Library/Acpi/Common/AcpiPcctLib/PcctGenerator.c | 1 +
.../Library/Acpi/Common/AcpiPpttLib/PpttGenerator.c | 1 +
.../Library/Acpi/Common/AcpiSratLib/SratGenerator.c | 1 +
.../AcpiSsdtCpuTopologyLib/SsdtCpuTopologyGenerator.c | 1 +
6 files changed, 9 insertions(+), 4 deletions(-)


diff --git a/DynamicTablesPkg/Include/AcpiTableGenerator.h 
b/DynamicTablesPkg/Include/AcpiTableGenerator.h
index d0eda011c301..f5c6179be082 100644
--- a/DynamicTablesPkg/Include/AcpiTableGenerator.h
+++ b/DynamicTablesPkg/Include/AcpiTableGenerator.h
@@ -214,7 +214,7 @@ typedef struct AcpiTableGenerator ACPI_TABLE_GENERATOR;
@return EFI_SUCCESS If the table is generated successfully or other


failure codes as returned by the generator.


**/


-typedef EFI_STATUS (*ACPI_TABLE_GENERATOR_BUILD_TABLE) (


+typedef EFI_STATUS (EFIAPI *ACPI_TABLE_GENERATOR_BUILD_TABLE)(


IN CONST ACPI_TABLE_GENERATOR *This,


IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo,


IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,


@@ -234,7 +234,7 @@ typedef EFI_STATUS (*ACPI_TABLE_GENERATOR_BUILD_TABLE) (
@return EFI_SUCCESS If freed successfully or other failure codes


as returned by the generator.


**/


-typedef EFI_STATUS (*ACPI_TABLE_GENERATOR_FREE_TABLE) (


+typedef EFI_STATUS (EFIAPI *ACPI_TABLE_GENERATOR_FREE_TABLE)(


IN CONST ACPI_TABLE_GENERATOR *CONST This,


IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo,


IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,


@@ -257,7 +257,7 @@ typedef EFI_STATUS (*ACPI_TABLE_GENERATOR_FREE_TABLE) (
@return EFI_SUCCESS If the table is generated successfully or other


failure codes as returned by the generator.


**/


-typedef EFI_STATUS (*ACPI_TABLE_GENERATOR_BUILD_TABLEEX) (


+typedef EFI_STATUS (EFIAPI *ACPI_TABLE_GENERATOR_BUILD_TABLEEX)(


IN CONST ACPI_TABLE_GENERATOR *This,


IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo,


IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,


@@ -280,7 +280,7 @@ typedef EFI_STATUS (*ACPI_TABLE_GENERATOR_BUILD_TABLEEX) (
@return EFI_SUCCESS If freed successfully or other failure codes


as returned by the generator.


**/


-typedef EFI_STATUS (*ACPI_TABLE_GENERATOR_FREE_TABLEEX) (


+typedef EFI_STATUS (EFIAPI *ACPI_TABLE_GENERATOR_FREE_TABLEEX)(


IN CONST ACPI_TABLE_GENERATOR *CONST This,


IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo,


IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,


diff --git a/DynamicTablesPkg/Library/Acpi/Common/AcpiMcfgLib/McfgGenerator.c 
b/DynamicTablesPkg/Library/Acpi/Common/AcpiMcfgLib/McfgGenerator.c
index 722f9c17d541..40dea304e301 100644
--- a/DynamicTablesPkg/Library/Acpi/Common/AcpiMcfgLib/McfgGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Common/AcpiMcfgLib/McfgGenerator.c
@@ -261,6 +261,7 @@ error_handler:
**/


STATIC


EFI_STATUS


+EFIAPI


FreeMcfgTableResources (


IN CONST ACPI_TABLE_GENERATOR *CONST This,


IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo,


diff --git a/DynamicTablesPkg/Library/Acpi/Common/AcpiPcctLib/PcctGenerator.c 
b/DynamicTablesPkg/Library/Acpi/Common/AcpiPcctLib/PcctGenerator.c
index 061e12bf1b3d..12e34f3e442c 100644
--- a/DynamicTablesPkg/Library/Acpi/Common/AcpiPcctLib/PcctGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Common/AcpiPcctLib/PcctGenerator.c
@@ -1075,6 +1075,7 @@ error_handler:
**/


STATIC


EFI_STATUS


+EFIAPI


FreePcctTableResources (


IN CONST ACPI_TABLE_GENERATOR *CONST This,


IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo,


diff --git a/DynamicTablesPkg/Library/Acpi/Common/AcpiPpttLib/PpttGenerator.c 
b/DynamicTablesPkg/Library/Acpi/Common/AcpiPpttLib/PpttGenerator.c
index 2b8088a07f44..fd465cbab0e9 100644
--- a/DynamicTablesPkg/Library/Acpi/Common/AcpiPpttLib/PpttGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Common/AcpiPpttLib/PpttGenerator.c
@@ -1342,6 +1342,7 @@ error_handler:
**/


STATIC


EFI_STATUS


+EFIAPI


FreePpttTableResources (


IN CONST ACPI_TABLE_GENERATOR *CONST This,


IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo,


diff --git a/DynamicTablesPkg/Library/Acpi/Common/AcpiSratLib/SratGenerator.c 
b/DynamicTablesPkg/Library/Acpi/Common/AcpiSratLib/SratGenerator.c
index dcdacc4e966e..1a9434e6bd08 100644
--- a/Dy

Re: [edk2-devel] [staging/dynamictables-reorg PATCH 1/2] DynamicTablesPkg: Fix conversion compiler warnings

2024-07-03 Thread Sami Mujawar
Hi Pierre,

Thank you for these patches.


On 03/07/2024, 10:54, "Pierre Gondois" mailto:pierre.gond...@arm.com>> wrote:


Some CM objects fields are wider than the targeted field in ACPI
tables. Some assignments are also subject to data loss and
trigger the following warnings:
- '<': signed/unsigned mismatch
- '=': conversion from 'UINTxx' to 'UINTyy', possible loss of data
with xx > yy.


Add checks/cast to remove the warnings.


Signed-off-by: Pierre Gondois mailto:pierre.gond...@arm.com>>
---
.../Acpi/Common/AcpiPcctLib/PcctGenerator.c | 15 +++
.../SsdtCpuTopologyGenerator.c | 6 --
.../Common/AcpiSsdtPcieLib/SsdtPcieGenerator.c | 15 ++-
3 files changed, 25 insertions(+), 11 deletions(-)


diff --git a/DynamicTablesPkg/Library/Acpi/Common/AcpiPcctLib/PcctGenerator.c 
b/DynamicTablesPkg/Library/Acpi/Common/AcpiPcctLib/PcctGenerator.c
index 205c44405785..061e12bf1b3d 100644
--- a/DynamicTablesPkg/Library/Acpi/Common/AcpiPcctLib/PcctGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Common/AcpiPcctLib/PcctGenerator.c
@@ -379,10 +379,12 @@ AddSubspaceStructType1 (
Doorbell = >DoorbellReg;


ChannelTiming = >ChannelTiming;






+ ASSERT ((PccCmObj->PlatIrq.Flags >> 8) == 0);

[SAMI] I think we can change this to ASSERT ((PccCmObj->PlatIrq.Flags & 
~MAX_UINT8) == 0);
That way we can also avoid magic numbers. 
I think similar changes are required elsewhere in this patch. 
If you agree, I will make the changes before merging.

Otherwise, this series looks good to me.

Reviewed-by: Sami Mujawar 


Regards,

Sami Mujawar



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Re: [edk2-devel] [staging/dynamictables-reorg PATCH 00/15] Prepare libraries to support other archs

2024-07-03 Thread Sami Mujawar
Hi Sunil,

I think we can look into that. My initial thoughts are that this can be solved 
using a Pcd. However, we need a bit of investigation.
Is it ok if we address that in a separate patch?

Regards,

Sami Mujawar

On 03/07/2024, 10:37, "Sunil V L" mailto:suni...@ventanamicro.com>> wrote:


Hi Pierre, Sami,


Thanks a lot again for this work!.


The series looks good to me as well. I agree with Sami's suggestions.


However, I have a request for an additional change. The common ACPI
tables still use ARMH/ARMLTD as the CREATOR_ID/OEM_ID. Can they be made
architecture specific?


Reviewed-by: Sunil V L mailto:suni...@ventanamicro.com>>


Thanks!
Sunil
On Wed, Jul 03, 2024 at 09:08:08AM +, Sami Mujawar wrote:
> Hi Pierre,
> 
> Overall, this patch series looks good to me.
> 
> I have some minor comments regarding the return value for the Arch hook 
> functions their placement in Common folder.
> e.g. in Patch "DynamicTablesPkg: AcpiFadtLib: Prepare to support other archs"
> The file 
> DynamicTablesPkg/Library/Acpi/Common/AcpiFadtLib/Common/CommonFadtGenerator.c
> provides an empty stub for the arch specific implementation for the 
> FadtArchUpdate () and returns
> success. I think this function should return EFI_UNSUPPORTED to indicate that 
> this function is not
> implemented and that the architecture needs to provide an implementation.
> 
> Also, the file name AcpiFadtLib/Common/CommonFadtGenerator.c should be 
> changed to
> AcpiFadtLib/FadtGeneratorNull.c to clarify that the implementation does not 
> exist.
> 
> Similar changes are required for other patches as well.
> 
> Apart from the above, in patch " DynamicTablesPkg: FdtHwInfoParserLib: Move 
> IRQ map to arch folder"
> I think the file 
> DynamicTablesPkg/Library/FdtHwInfoParserLib/Arm/ArmFdtUtility.c should be 
> renamed to 
> DynamicTablesPkg/Library/FdtHwInfoParserLib/Arm/ArmFdtInterrupt.c
> 
> If you agree with the above, I will make the necessary changes before merging.
> 
> With that,
> 
> Reviewed-by: Sami Mujawar mailto:sami.muja...@arm.com>>
> 
> Regards,
> 
> Sami Mujawar
> 
> 
> On 19/06/2024, 23:06, "Pierre Gondois"  <mailto:pierre.gond...@arm.com> <mailto:pierre.gond...@arm.com 
> <mailto:pierre.gond...@arm.com>>> wrote:
> 
> 
> The DynamicTables framework has mainly been developed/tested against Arm
> architecture. While still trying to have re-usable libraries, opening the
> framework to other architectures implies some re-organization.
> 
> 
> The libraries that are generic enough to be directly re-used are moved
> to a Common/ directory. For some libraries, additional arch-specific hooks
> have been added to allow architectures specific modifications.
> 
> 
> ---
> 
> 
> Changes can be seen at:
> https://github.com/pierregondois/edk2/tree/pg/dyntables_libraries_reorg 
> <https://github.com/pierregondois/edk2/tree/pg/dyntables_libraries_reorg> 
> <https://github.com/pierregondois/edk2/tree/pg/dyntables_libraries_reorg> 
> <https://github.com/pierregondois/edk2/tree/pg/dyntables_libraries_reorg;>
> 
> 
> ---
> 
> 
> References:
> 1. Staging branch creation:
> URL: https://edk2.groups.io/g/devel/message/114790 
> <https://edk2.groups.io/g/devel/message/114790> 
> <https://edk2.groups.io/g/devel/message/114790> 
> <https://edk2.groups.io/g/devel/message/114790;>
> 
> 
> 2. edk2-staging Repo
> URL: https://github.com/tianocore/edk2-staging.git 
> <https://github.com/tianocore/edk2-staging.git> 
> <https://github.com/tianocore/edk2-staging.git> 
> <https://github.com/tianocore/edk2-staging.git;>
> Branch Name: dynamictables-reorg
> 
> 
> 3. edk2-platforms Repo
> URL: https://github.com/tianocore/edk2-platforms.git 
> <https://github.com/tianocore/edk2-platforms.git> 
> <https://github.com/tianocore/edk2-platforms.git> 
> <https://github.com/tianocore/edk2-platforms.git;>
> Branch Name: devel-dynamictables-reorg
> 
> 
> ---
> 
> 
> Cc: AbdulLateef Attar  <mailto:abdullateef.at...@amd.com> <mailto:abdullateef.at...@amd.com 
> <mailto:abdullateef.at...@amd.com>>>
> Cc: Girish Mahadevan mailto:gmahade...@nvidia.com> 
> <mailto:gmahade...@nvidia.com <mailto:gmahade...@nvidia.com>>>
> Cc: Jeff Brasen mailto:jbra...@nvidia.com> 
> <mailto:jbra...@nvidia.com <mailto:jbra...@nvidia.com>>>
> Cc: Jeshua Smith mailto:jesh...@nvidia.com> 
> <mailto:jesh...@nvidia.com <mailto:jesh...@nvidia.com>>>
> Cc: Leif Lindholm  <mailto:quic_llind...@quicinc.com> <mailto:quic_llind...@quicinc.com 
> <mailto:qui

Re: [edk2-devel] [staging/dynamictables-reorg PATCH 00/15] Prepare libraries to support other archs

2024-07-03 Thread Sami Mujawar
Hi Pierre,

Overall, this patch series looks good to me.

I have some minor comments regarding the return value for the Arch hook 
functions their placement in Common folder.
e.g. in Patch "DynamicTablesPkg: AcpiFadtLib: Prepare to support other archs"
The file 
DynamicTablesPkg/Library/Acpi/Common/AcpiFadtLib/Common/CommonFadtGenerator.c
provides an empty stub for the arch specific implementation for the 
FadtArchUpdate () and returns
success. I think this function should return EFI_UNSUPPORTED to indicate that 
this function is not
implemented and that the architecture needs to provide an implementation.

Also, the file name AcpiFadtLib/Common/CommonFadtGenerator.c should be changed 
to
AcpiFadtLib/FadtGeneratorNull.c to clarify that the implementation does not 
exist.

Similar changes are required for other patches as well.

Apart from the above, in patch " DynamicTablesPkg: FdtHwInfoParserLib: Move IRQ 
map to arch folder"
I think the file 
DynamicTablesPkg/Library/FdtHwInfoParserLib/Arm/ArmFdtUtility.c should be 
renamed to 
DynamicTablesPkg/Library/FdtHwInfoParserLib/Arm/ArmFdtInterrupt.c

If you agree with the above, I will make the necessary changes before merging.

With that,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 19/06/2024, 23:06, "Pierre Gondois" mailto:pierre.gond...@arm.com>> wrote:


The DynamicTables framework has mainly been developed/tested against Arm
architecture. While still trying to have re-usable libraries, opening the
framework to other architectures implies some re-organization.


The libraries that are generic enough to be directly re-used are moved
to a Common/ directory. For some libraries, additional arch-specific hooks
have been added to allow architectures specific modifications.


---


Changes can be seen at:
https://github.com/pierregondois/edk2/tree/pg/dyntables_libraries_reorg 
<https://github.com/pierregondois/edk2/tree/pg/dyntables_libraries_reorg>


---


References:
1. Staging branch creation:
URL: https://edk2.groups.io/g/devel/message/114790 
<https://edk2.groups.io/g/devel/message/114790>


2. edk2-staging Repo
URL: https://github.com/tianocore/edk2-staging.git 
<https://github.com/tianocore/edk2-staging.git>
Branch Name: dynamictables-reorg


3. edk2-platforms Repo
URL: https://github.com/tianocore/edk2-platforms.git 
<https://github.com/tianocore/edk2-platforms.git>
Branch Name: devel-dynamictables-reorg


---


Cc: AbdulLateef Attar mailto:abdullateef.at...@amd.com>>
Cc: Girish Mahadevan mailto:gmahade...@nvidia.com>>
Cc: Jeff Brasen mailto:jbra...@nvidia.com>>
Cc: Jeshua Smith mailto:jesh...@nvidia.com>>
Cc: Leif Lindholm mailto:quic_llind...@quicinc.com>>
Cc: Meenakshi Aggarwal mailto:meenakshi.aggar...@nxp.com>>
Cc: Pierre Gondois mailto:pierre.gond...@arm.com>>
Cc: Sami Mujawar mailto:sami.muja...@arm.com>>
Cc: Sunil V L mailto:suni...@ventanamicro.com>>
Cc: Yeo Reum Yun mailto:yeoreum@arm.com>>


Pierre Gondois (15):
DynamicTablesPkg: Acpi: Move generic libraries to common folder
DynamicTablesPkg: Acpi: Prepare common libraries to support other
archs
DynamicTablesPkg: AcpiFadtLib: Prepare to support other archs
DynamicTablesPkg: AcpiDbg2Lib: Prepare to support other archs
DynamicTablesPkg: AcpiSpcrLib: Prepare to support other archs
DynamicTablesPkg: AcpiSratLib: Prepare to support other archs
DynamicTablesPkg: AcpiSsdtCpuTopologyLib: Avoid dependency on GICC
DynamicTablesPkg: DynamicTableManagerDxe: Refactor PresenceArray
DynamicTablesPkg: FdtHwInfoParserLib: Move ARM parsers to Arm
directory
DynamicTablesPkg: FdtHwInfoParserLib: Refactor to prepare for other
archs
DynamicTablesPkg: FdtHwInfoParserLib: Make Pci parser arch neutral
DynamicTablesPkg: FdtHwInfoParserLib: Make Serial Port parser arch
neutral
DynamicTablesPkg: FdtHwInfoParserLib: Move ArmLib.h to ArmGicCParser.c
DynamicTablesPkg: FdtHwInfoParserLib: Move IRQ map to arch folder
DynamicTablesPkg: FdtHwInfoParserLib: Create wrapper to get INTC addr
cells


.../Arm/ArmDynamicTableManagerDxe.c | 63 +++
.../Common/CommonDynamicTableManagerDxe.c | 58 +++
.../DynamicTableManagerDxe.c | 70 +--
.../DynamicTableManagerDxe.h | 63 +++
.../DynamicTableManagerDxe.inf | 7 +
DynamicTablesPkg/DynamicTables.dsc.inc | 64 +--
.../SsdtCpuTopologyGenerator.h | 147 ---
.../AcpiDbg2Lib/AcpiDbg2Lib.inf} | 22 +-
.../Common/AcpiDbg2Lib/Arm/ArmDbg2Generator.c | 67 +++
.../AcpiDbg2Lib/Common/CommonDbg2Generator.c | 59 +++
.../AcpiDbg2Lib}/Dbg2Generator.c | 24 +-
.../Acpi/Common/AcpiDbg2Lib/Dbg2Generator.h | 56 +++
.../AcpiFadtLib/AcpiFadtLib.inf} | 16 +-
.../Common/AcpiFadtLib/Arm/ArmFadtGenerator.c | 126 ++
.../AcpiFadtLib/Common/CommonFadtGenerator.c | 46 ++
.../AcpiFadtLib}/FadtGenerator.c | 86 +---
.../Acpi/Common/AcpiFadtLib/FadtGenerator.h | 35 ++
.../AcpiMcfgLib/AcpiMcfgLib.inf} | 9 +-
.../AcpiMcfgLib}/McfgGenerator.c | 0
.../AcpiPcctLib/AcpiPcctLib.in

Re: [edk2-devel] [staging/dynamictables-reorg PATCH 15/15] DynamicTablesPkg: FdtHwInfoParserLib: Create wrapper to get INTC addr cells

2024-07-03 Thread Sami Mujawar
Hi Sunil,

Thank you for the review.

> +EFI_STATUS
> +EFIAPI
> +FdtGetIntcAddressCells (
> + IN CONST VOID *Fdt,
> + IN INT32 Node,
> + OUT INT32 *AddressCells, OPTIONAL
> + OUT INT32 *SizeCells OPTIONAL
NIT: I might be wrong but alignment doesn't look correct.
[SAMI] I wonder if this is an artifact of the email client. The alignment looks 
ok to me in visual studio code. 
That being said, I may have run uncrustify on Pierre's patch series as I am 
planning to get it merged soon.
In either case I will get it addressed, thank you for the feedback.
[/SAMI]

Otherwise, LGTM.


Reviewed-by: Sunil V L mailto:suni...@ventanamicro.com>>


Thanks!
Sunil














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Re: [edk2-devel] [PATCH edk2-platforms 0/5] Platform,Silicon: drop use of PcdArmArchTimerFreqInHz

2024-06-22 Thread Sami Mujawar
Hi Leif,

On Fri, Jun 21, 2024 at 04:37 AM, Leif Lindholm wrote:

> 
> Since 1-2 are just cleanup, I have now pushed those two commits,
> with R-b:s given, as 3f08401365d6..b29e69a688d6.
> 
> I am tempted to now merge https://github.com/tianocore/edk2/pull/5797 ,

The patch series at https://github.com/tianocore/edk2/pull/5797 looks good to 
me.

> 
> at which point the platforms affected by 3-5 will break.

I have build tested platforms under edk2-platforms/Platforms/ARM/...  and can 
confirm patch 3/5 " Platform/ARM: drop use of PcdArmArchTimerFreqInHz " fixes 
the build break.

> 
> Any objection?

I do not have any objection from 'Platforms/ARM' perspective for merging these 
patches.

Regards,

Sami Mujawar

> 
> /
> Leif


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Re: [edk2-devel] [PATCH edk2-platforms 3/5] Platform/ARM: drop use of PcdArmArchTimerFreqInHz

2024-06-22 Thread Sami Mujawar
Hi Leif,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


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Re: [edk2-devel] [platforms/devel-dynamictables-reorg PATCH 11/14] Platform/NXP: Add Arch Common objects handler

2024-06-11 Thread Sami Mujawar
Hi Leif, Meenakshi,

Is it possible to provide feedback for the patches 11 - 14 in this series 
(links below), please?
  https://edk2.groups.io/g/devel/message/119531
  https://edk2.groups.io/g/devel/message/119532
  https://edk2.groups.io/g/devel/message/119533
  https://edk2.groups.io/g/devel/message/119534

Regards,

Sami Mujawar

On 10/06/2024, 10:47, "devel@edk2.groups.io <mailto:devel@edk2.groups.io> on 
behalf of PierreGondois via groups.io" mailto:devel@edk2.groups.io> on behalf of pierre.gondois=arm@groups.io 
<mailto:arm@groups.io>> wrote:


From: Pierre Gondois mailto:pierre.gond...@arm.com>>


Some DynamicTables objects have been moved from the Arm namespace
to a new Arch Common namespace. Prepare the handling of these objects
in the ConfigurationManagers by adding a function handler for these
objects.


This patch modifies the ConfigurationManager of the NXP
platforms.


Signed-off-by: Pierre Gondois mailto:pierre.gond...@arm.com>>
---
.../ConfigurationManager.c | 54 +++
1 file changed, 54 insertions(+)


diff --git 
a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c
 
b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c
index 80ce8412c47a..b5ad69cc9632 100644
--- 
a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c
+++ 
b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/ConfigurationManager.c
@@ -3,6 +3,7 @@


Copyright 2020 NXP
Copyright 2020 Puresoftware Ltd
+ Copyright (c) 2024, Arm Limited. All rights reserved.


SPDX-License-Identifier: BSD-2-Clause-Patent


@@ -472,6 +473,56 @@ GetStandardNameSpaceObject (
return Status;
}


+/** Return an Arch Common namespace object.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token An optional token identifying the object. If
+ unused this must be CM_NULL_TOKEN.
+ @param [in, out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the requested Object.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object information is not found.
+**/
+EFI_STATUS
+EFIAPI
+GetArchCommonNameSpaceObject (
+ IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
+ IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ EFI_STATUS Status;
+ EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo;
+
+ if ((This == NULL) || (CmObject == NULL)) {
+ ASSERT (This != NULL);
+ ASSERT (CmObject != NULL);
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Status = EFI_NOT_FOUND;
+ PlatformRepo = This->PlatRepoInfo;
+
+ switch (GET_CM_OBJECT_ID (CmObjectId)) {
+ default: {
+ Status = EFI_NOT_FOUND;
+ DEBUG ((
+ DEBUG_INFO,
+ "INFO: Object 0x%x. Status = %r\n",
+ CmObjectId,
+ Status
+ ));
+ break;
+ }
+ } //switch
+
+ return Status;
+}
+
/** Return an ARM namespace object.


@param [in] This Pointer to the Configuration Manager Protocol.
@@ -733,6 +784,9 @@ FslPlatformGetObject (
case EObjNameSpaceStandard:
Status = GetStandardNameSpaceObject (This, CmObjectId, Token, CmObject);
break;
+ case EObjNameSpaceArchCommon:
+ Status = GetArchCommonNameSpaceObject (This, CmObjectId, Token, CmObject);
+ break;
case EObjNameSpaceArm:
Status = GetArmNameSpaceObject (This, CmObjectId, Token, CmObject);
break;
--
2.25.1






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Re: [edk2-devel] [platforms/devel-dynamictables-reorg PATCH 00/14] Platform: N1Sdp,Morello,NXP: Move DynamicTablesPkg obj to Arch Common

2024-06-11 Thread Sami Mujawar
Hi Pierre,

Thank you for this patch series.

These changes look good to me.

For this series,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 10/06/2024, 10:34, "pierre.gond...@arm.com <mailto:pierre.gond...@arm.com>" 
mailto:pierre.gond...@arm.com>> wrote:


From: Pierre Gondois mailto:pierre.gond...@arm.com>>


Patches for the DynamicTablesPkg reorg branches are still sent
through the mailing list for now. A branch with the patches is
available at:
https://github.com/pierregondois/edk2-platforms/pull/new/pg/Morello_N1Sdp_NXP_plat_reorg
 
<https://github.com/pierregondois/edk2-platforms/pull/new/pg/Morello_N1Sdp_NXP_plat_reorg>
 


References:
- edk2 reorg branch:
https://github.com/tianocore/edk2-staging/tree/dynamictables-reorg 
<https://github.com/tianocore/edk2-staging/tree/dynamictables-reorg>
- edk2-platforms reorg branch:
https://github.com/tianocore/edk2-platforms/tree/devel-dynamictables-reorg 
<https://github.com/tianocore/edk2-platforms/tree/devel-dynamictables-reorg>
- Previous serie for FVP, Juno platforms:
https://edk2.groups.io/g/devel/message/117001 
<https://edk2.groups.io/g/devel/message/117001>


Other architectures than Arm aim to leverage the DynamicTablesPkg.
The package uses namespaces/domains to split objects IDs. Currently
most of the objects are part of the Arm namespace. Some objects are
generic enough to be re-used by other architectures.


Update the following platforms which use the DynamicTablesPkg
framework/objects:
- Platform/ARM/N1Sdp
- Platform/ARM/Morello
- Platform/NXP/ConfigurationManagerPkg
now that the following platforms have already been updated:
- Juno
- VExpress


Cc: Sami Mujawar mailto:sami.muja...@arm.com>>
Cc: Pierre Gondois mailto:pierre.gond...@arm.com>>
Cc: Yeo Reum Yun mailto:yeoreum@arm.com>>
Cc: Sunil V L mailto:suni...@ventanamicro.com>>
Cc: AbdulLateef Attar mailto:abdullateef.at...@amd.com>>
Cc: Jeshua Smith mailto:jesh...@nvidia.com>>
Cc: Jeff Brasen mailto:jbra...@nvidia.com>>
Cc: Girish Mahadevan mailto:gmahade...@nvidia.com>>
Cc: Leif Lindholm mailto:quic_llind...@quicinc.com>>
Cc: Meenakshi Aggarwal mailto:meenakshi.aggar...@nxp.com>>


Pierre Gondois (14):
Platform/ARM: Morello,N1Sdp: Add Arch Common objects handler
Platform/ARM: Morello,N1Sdp: Move Power Mgmt Profile info to Arch
Common
Platform/ARM: Morello,N1Sdp: Move Serial Port info to Arch Common
Platform/ARM: Morello,N1Sdp: Move Fixed Feat Flags info to Arch Common
Platform/ARM: Morello,N1Sdp: Move CmRef info to Arch Common
Platform/ARM: Morello,N1Sdp: Move Pci Config Space info to Arch Common
Platform/ARM: Morello,N1Sdp: Rename GicCToken
Platform/ARM: Morello,N1Sdp: Move Proc Hierarchy info to Arch Common
Platform/ARM: Morello,N1Sdp: Move Cache info to Arch Common
Platform/ARM: N1Sdp: Move Memory Affinity info to Arch Common
Platform/NXP: Add Arch Common objects handler
Platform/NXP: Move Power Mgmt Profile info to Arch Common
Platform/NXP: Move Serial Port info to Arch Common
Platform/NXP: Move Pci Config Space info to Arch Common


.../ConfigurationManager.c | 216 +-
.../ConfigurationManager.h | 20 +-
.../ConfigurationManagerFvp.c | 65 +++-
.../ConfigurationManagerFvp.h | 2 +-
.../ConfigurationManager.c | 281 +++---
.../ConfigurationManager.h | 24 +-
.../ConfigurationManager.c | 120 ++--
.../ConfigurationManager.h | 7 +-
8 files changed, 473 insertions(+), 262 deletions(-)


-- 
2.25.1







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Re: [edk2-devel] [RESEND PATCH 00/14] Platform/ARM: FVP, Juno: Move DynamicTablesPkg obj to Arch Common

2024-06-07 Thread Sami Mujawar
Hi All,

I have merged this series at 
https://github.com/tianocore/edk2-platforms/tree/devel-dynamictables-reorg.

The corresponding DynamicTablesPkg reorg changes are also merged at 
https://github.com/tianocore/edk2-staging/tree/dynamictables-reorg


Regards,

Sami Mujawar


From: devel@edk2.groups.io  on behalf of Sami Mujawar via 
groups.io 
Date: Friday, 7 June 2024 at 15:07
To: Pierre Gondois , devel@edk2.groups.io 

Subject: Re: [edk2-devel] [RESEND PATCH 00/14] Platform/ARM: FVP, Juno: Move 
DynamicTablesPkg obj to Arch Common
Hi Pierre,

Thank you for this patch series.

Just a note for the future. The patch subject line should follow the following 
format to clarify that these patches are for the devel-dynamictables-reorg 
branch.
 [platforms/devel-dynamictables-reorg PATCH v ]: Package/Module: Subject

Otherwise this patch series looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

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Re: [edk2-devel] [PATCH 00/16] DynamicTablesPkg: Move objects to Arch Common NameSpace (first)

2024-06-07 Thread Sami Mujawar
Hi All,

I have merged the [1] and [2] series at 
https://github.com/tianocore/edk2-staging/tree/dynamictables-reorg
I have also merged the Platform support series at 
https://github.com/tianocore/edk2-platforms/tree/devel-dynamictables-reorg.

Regards,

Sami Mujawar

From: Sunil V L 
Date: Thursday, 4 April 2024 at 11:03
To: Pierre Gondois 
Cc: devel@edk2.groups.io , Sami Mujawar 
, Yeo Reum Yun , AbdulLateef Attar 
, Jeshua Smith , Jeff Brasen 
(jbra...@nvidia.com) , Girish Mahadevan 
, Leif Lindholm , Meenakshi 
Aggarwal (meenakshi.aggar...@nxp.com) 
Subject: Re: [PATCH 00/16] DynamicTablesPkg: Move objects to Arch Common 
NameSpace (first)
On Thu, Mar 21, 2024 at 04:53:03PM +0100, Pierre Gondois wrote:
> Following [1] and [2], other architectures than Arm aim to leverage
> the DynamicTablesPkg. The package uses namespaces/domains to split
> objects IDs. Currently most of the objects are part of the Arm
> namespace. Some objects are generic enough to be re-used by other
> architectures.
>
> In [2], an Arch Common namespace Id was created and some objects
> present in the Arm namespace were identified to be moved to this
> Arch Common namespace.
> Continue the effort by moving these objects to this new namespace.
>
> Some platforms rely on the DynamicTablesPkg and its namespace
> organization. Additional patches matching this change for the:
> - Juno
> - VExpress
> platforms will be submitted along this patchset.
>
> As the actual patchset is more than 20 patches, split it in
> two parts to avoid being detected as a spam/fraudulous activity.
>
> [1] Branch to reorg Dynamic Tables & support other arch
> https://edk2.groups.io/g/devel/topic/104054584#116308
> [2] DynamicTablesPkg: Arch Common Namespace
> https://edk2.groups.io/g/devel/message/116330
>
> Cc: Sami Mujawar 
> Cc: Pierre Gondois 
> Cc: Yeo Reum Yun 
> Cc: Sunil V L 
> Cc: AbdulLateef Attar 
> Cc: Jeshua Smith 
> Cc: Jeff Brasen 
> Cc: Girish Mahadevan 
> Cc: Leif Lindholm 
> Cc: Meenakshi Aggarwal 
>
Hi Pierre, Sami,

Thank you very much for doing this!. The series look good to me.

Reviewed-by: Sunil V L 
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Re: [edk2-devel] [RESEND PATCH 00/14] Platform/ARM: FVP, Juno: Move DynamicTablesPkg obj to Arch Common

2024-06-07 Thread Sami Mujawar
Hi Pierre,

Thank you for this patch series.

Just a note for the future. The patch subject line should follow the following 
format to clarify that these patches are for the devel-dynamictables-reorg 
branch.
[platforms/devel-dynamictables-reorg PATCH v ]: Package/Module: Subject

Otherwise this patch series looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


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Re: [edk2-devel] [edk2-platforms][PATCH v1 0/5] Platform/Sgi: Extend SMBIOS support for RD-V2 and RD-Fremont

2024-06-06 Thread Sami Mujawar
Merged as fc4cd3545fe6..8f05785753aa

Thanks.

Regards,

Sami Mujawar

From: "Prabin CA via Groups.Io" 
Reply to: Prabin CA 
Date: Wednesday 5 June 2024 at 16:38
To: Sami Mujawar , "devel@edk2.groups.io" 

Subject: Re: [edk2-devel] [edk2-platforms][PATCH v1 0/5] Platform/Sgi: Extend 
SMBIOS support for RD-V2 and RD-Fremont


Hi Sami,



Thank you for reviewing the patches. Yes that is fine, you can make the changes 
locally and merge to upstream.

Thanks,
Prabin CA

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Re: [edk2-devel] [edk2-platforms][PATCH v1 0/5] Platform/Sgi: Extend SMBIOS support for RD-V2 and RD-Fremont

2024-06-05 Thread Sami Mujawar

Hi Prabin,

If you agree with my suggestions for patch 2/5, can you reply back on 
the list, please?


I will then fix that patch locally before merging.

Other than patch 2/5 the rest of the series looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 4/3/24 18:33, Prabin CA wrote:

Each CPUs of RD-V2 has 64KB of L1 instruction/data cache, 2MB of L2
cache and 32MB of system level cache. The system architecture of the
RD-V2 platform is similar to the RD-N2 platform, except for the CPU
and L2 cache size. So existing RD-N2 SMBIOS support is extended for
RD-V2 platform to reuse rest of the RD-N2 SMBIOS configuration for the
RD-V2 platform.

Each CPUs of RD-Fremont include 64KB L1 instruction/data cache, 2MB L2
cache and 2MB of system level cache. This patch series adding the
extended SMBIOS support for RD-Fremont platform.

In addition to patches that extend the SMBIO support for these two
platforms, there are two patches that update support for existing
platforms. The first patch in this series introduce a PCD to specify
L2 cache size. The second patch make use of this PCD in PPTT table.

Link to gitlab branch with the patches in this series -
https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platforms/-/commits/topics/rdv2/?ref_type=heads

Prabin CA (3):
   Platform/Sgi: Add a new PCD for L2 cache size
   Platform/Sgi: Use PCD value for L2 cache size in PPTT table
   Platform/Sgi: Extend SMBIOS support for RD-Fremont

Pranav Madhu (2):
   Platform/Sgi: Define RD-V2 platform id values
   Platform/Sgi: Extend SMBIOS support for RD-V2 platform

  Platform/ARM/SgiPkg/SgiPlatform.dec   |  
3 +++
  Platform/ARM/SgiPkg/RdN2/RdN2.dsc |  
4 
  Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf |  
1 +
  Platform/ARM/SgiPkg/Include/SgiPlatform.h | 
12 ++-
  Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 
10 --
  Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 
12 ---
  Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c | 
21 +++-
  Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c | 
14 -
  Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc |  
4 +++-
  9 files changed, 72 insertions(+), 9 deletions(-)




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Re: [edk2-devel] [edk2-platforms][PATCH v1 2/5] Platform/Sgi: Use PCD value for L2 cache size in PPTT table

2024-06-05 Thread Sami Mujawar

Hi Prabin,

Thank you for this patch.

Please see my response inline marked [SAMI].

With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 4/3/24 18:33, Prabin CA wrote:

The PcdL2CacheSize PCD specifies the size of L2 cache of the CPU.
Use the size specified by this PCD in the PPTT table of the
RD-N2 platform.

The PLAT_L2_CACHE_SIZE build time parameter is used to set the size of
the CPU's L2 cache and this allows changing the value of the L2 cache
size depending the variant of the RD-N2 platform being build. RD-V2
platform is an example of such a variant.

Signed-off-by: Prabin CA
---
  Platform/ARM/SgiPkg/RdN2/RdN2.dsc | 4 
  Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf | 1 +
  Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc | 4 +++-
  3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/RdN2/RdN2.dsc 
b/Platform/ARM/SgiPkg/RdN2/RdN2.dsc
index 49a317a930e0..634edc2416c4 100644
--- a/Platform/ARM/SgiPkg/RdN2/RdN2.dsc
+++ b/Platform/ARM/SgiPkg/RdN2/RdN2.dsc
@@ -45,6 +45,10 @@ [PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdCoreCount|1
gArmPlatformTokenSpaceGuid.PcdClusterCount|16
  
+!ifdef $(PLAT_L2_CACHE_SIZE)

+   gArmSgiTokenSpaceGuid.PcdL2CacheSize|$(PLAT_L2_CACHE_SIZE)


[SAMI] I think there is no need for PLAT_L2_CACHE_SIZE. The pcd can be 
set from the build command line using the something like '--pcd 
PcdL2CacheSize=0x1'.


Can you check, please?

Also update the commit message to document that the Pcd can be 
configured from the build command line and provide an example.


[/SAMI]


+!endif
+
  

  #
  # Components Section - list of all EDK II Modules needed by this Platform
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf 
b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
index afc38385c051..fb5e6e72c9e8 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
@@ -64,6 +64,7 @@ [FixedPcd]
gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base
gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable
+  gArmSgiTokenSpaceGuid.PcdL2CacheSize
gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip
gArmSgiTokenSpaceGuid.PcdOscLpiEnable
gArmSgiTokenSpaceGuid.PcdOscCppcEnable
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc 
b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc
index b8cb04459be2..c37f04582f9c 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc
@@ -21,6 +21,8 @@
  #include "SgiAcpiHeader.h"
  #include "SgiPlatform.h"
  
+#define L2_CACHE_SIZE  FixedPcdGet32 (PcdL2CacheSize)

+
  /** Define helper macro for populating processor core information.
  
@param [in] PackageId Package instance number.

@@ -81,7 +83,7 @@
  EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_INIT (  
 \
PPTT_CACHE_STRUCTURE_FLAGS,   /* Flag */
 \
0,/* Next level of cache */ 
 \
-  SIZE_1MB, /* Size */ 
\
+  L2_CACHE_SIZE,/* Size */ 
\


[SAMI] I think you can use FixedPcdGet32 (PcdL2CacheSize) in the above 
macro directly.


[/SAMI]


2048, /* Num of sets */ 
 \
8,/* Associativity */   
 \
PPTT_UNIFIED_CACHE_ATTR,  /* Attributes */  
 \



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Re: [edk2-devel] [edk2-platforms][PATCH V4 00/17] Split NorFlashDxe driver and add CadenceQspiNorFlashDeviceLib library

2024-05-29 Thread Sami Mujawar
Merged as f69888ada859..35bca3ca71c0

Thanks.

Regards,

Sami Mujawar


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Re: [edk2-devel] [edk2-platforms][PATCH V4 00/17] Split NorFlashDxe driver and add CadenceQspiNorFlashDeviceLib library

2024-05-29 Thread Sami Mujawar
Other than my comments for patch 14 and 15 (the changes for which I will fix 
locally before merging), this patch series looks good to me.

For this series,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


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Re: [edk2-devel] [edk2-platforms][PATCH V4 15/17] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe

2024-05-29 Thread Sami Mujawar
Hi Sahil,

I will drop the loop before merging the changes.
Other than that this patch looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

From: Sahil Kaushal 
Date: Wednesday 29 May 2024 at 12:51
To: Sami Mujawar , "devel@edk2.groups.io" 

Cc: Ard Biesheuvel , Leif Lindholm   
, nd 
Subject: Re: [edk2-platforms][PATCH V4 15/17] Platform/ARM: Add 
CadenceQspiNorFlashDeviceLib for NorFlashDxe

Hi Sami,
Thank you for reviewing the patch.
You are right. The do-while loop is redundant and hence can be removed.
Thanks,
Sahil

From: Sami Mujawar 
Date: Wednesday, 29 May 2024 at 5:06 PM
To: Sahil Kaushal , devel@edk2.groups.io 

Cc: Ard Biesheuvel , Leif Lindholm   
, nd 
Subject: Re: [edk2-platforms][PATCH V4 15/17] Platform/ARM: Add 
CadenceQspiNorFlashDeviceLib for NorFlashDxe
Hi Sahil,

Please find my feedback inline marked [SAMI].

Regards,

Sami Mujawar

On 29/05/2024, 09:56, "Sahil Kaushal" mailto:sahil.kaus...@arm.com>> wrote:


From: sahil mailto:sa...@arm.com>>


In N1Sdp platform, the SoC is connected to IOFPGA which has a
Cadence Quad SPI (QSPI) controller. This QSPI controller manages
the flash chip device via QSPI bus.


This patch adds CadenceQspiNorFlashDeviceLib which is used to
manage and access the above configuration.


Signed-off-by: sahil mailto:sa...@arm.com>>
---
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 | 32 +
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
 | 46 +
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
 | 1034 
3 files changed, 1112 insertions(+)


diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
new file mode 100644
index ..506876b62285
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
@@ -0,0 +1,32 @@
+#/** @file
+#
+# Component description file for CadenceQspiNorFlashDeviceLib Library
+#
+# Copyright (c) 2024, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = CadenceQspiNorFlashDeviceLib
+ FILE_GUID = ed172366-066b-4998-9b5e-ca7f385a170b
+ MODULE_TYPE = DXE_RUNTIME_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = NorFlashDeviceLib
+
+[Sources.common]
+ CadenceQspiNorFlashDeviceLib.c
+ CadenceQspiNorFlashDeviceLib.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ Platform/ARM/ARM.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ IoLib
+ TimerLib
diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
new file mode 100644
index ..951a93481dd1
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
@@ -0,0 +1,46 @@
+/** @file
+
+ Copyright (c) 2024, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_
+#define CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_
+
+#define NOR_FLASH_ERASE_RETRY 10
+
+// QSPI Controller defines
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OFFSET 0x90
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_EXECUTE 0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE 0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS 19
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS 16
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE 0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B 0x02
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS 20
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C 0x8
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS 7
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x) ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS)
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x) ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS)
+
+#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET 0xA0
+
+#define CDNS_QSPI_FLASH_CMD_ADDR_REG_OFFSET 0x94
+
+#define CDNS_QSPI_FLASH_CMD_STATUS_POLL_TIMEOUT_MS 1000u // Command Status 
Register read timeout
+
+#define SPINOR_SR_WIP BIT0 // Write in progress
+
+#define SPINOR_OP_WREN 0x06 // Write enable
+#define SPINOR_OP_BE_4K 0x20 // Erase 4KiB block
+#define SPINOR_OP_RDID 0x9f // Read JEDEC ID
+#define SPINOR_OP_RDSR 0x05 // Read status register
+
+#define SPINOR_SR_WIP_POLL_TIMEOUT_MS 1000u // Status Register read timeout
+
+#endif /* CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ */
diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
 
b

Re: [edk2-devel] [edk2-platforms][PATCH V4 14/17] Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp

2024-05-29 Thread Sami Mujawar
Hi Sahil,

There is a typo in one of the macro names, see my comment inline marked [SAMI].
I will fix that up before merging.

Other than that, this patch looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 29/05/2024, 09:56, "Sahil Kaushal" mailto:sahil.kaus...@arm.com>> wrote:


From: sahil mailto:sa...@arm.com>>


Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.


This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.


Signed-off-by: sahil mailto:sa...@arm.com>>
---
Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf | 35 +
Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 1 +
Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c | 80 

3 files changed, 116 insertions(+)


diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index ..a9495cf667d5
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,35 @@
+## @file
+# NOR flash lib for ARM Neoverse N1 platform.
+#
+# Copyright (c) 2024, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = NorFlashNeoverseN1SocLib
+ FILE_GUID = 7006fcf1-a585-4272-92e3-b286b1dff5bb
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = NorFlashPlatformLib
+
+[Sources.common]
+ NorFlashLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/ARM.dec
+ Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+
+[FixedPcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h 
b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 2dae57a0f01a..2a592e5adc2f 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -47,6 +47,7 @@
// SCP QSPI flash device
#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE 0x1800
#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ 0x200
+#define NEOVERSEN1SOC_FIRMWARE_IAMGES_SZ 0x80
[SAMI] I noticed there is a typo in the macro above. I will fix that locally 
before merging.


/*
* Platform information structure stored in Non-secure SRAM. Platform
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index ..a354ffb5ac6d
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,80 @@
+/** @file
+* NOR flash lib for ARM Neoverse N1 platform
+*
+* Copyright (c) 2024, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include 
+#include 
+#include 
+#include 
+
+#define FW_ENV_REGION_BASE FixedPcdGet32 (PcdFlashNvStorageVariableBase)
+#define FW_ENV_REGION_SIZE (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + \
+ FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + \
+ FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize))
+
+STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
+ {
+ /// Environment variable region
+ NEOVERSEN1SOC_SCP_QSPI_AHB_BASE, ///< device base
+ FW_ENV_REGION_BASE, ///< region base
+ FW_ENV_REGION_SIZE, ///< region size
+ SIZE_4KB, ///< block size
+ },
+};
+
+/**
+ Dummy implementation of NorFlashPlatformInitialization to
+ comply with NorFlashPlatformLib structure.
+
+ @retval EFI_SUCCESS Success.
+**/
+EFI_STATUS
+NorFlashPlatformInitialization (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+/**
+ Get NOR flash region info
+
+ @param[out] NorFlashDevices NOR flash regions info.
+ @param[out] Count number of flash instance.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_ACCESS_DENIED Invalid variable region address.
+**/
+EFI_STATUS
+NorFlashPlatformGetDevices (
+ OUT NOR_FLASH_DESCRIPTION **NorFlashDevices,
+ OUT UINT32 *Count
+ )
+{
+ if ((NorFlashDevices == NULL) || (Count == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ((NEOVERSEN1SOC_SCP_QSPI_AHB_BASE +
+ NEOVERSEN1SOC_FIRMWARE_IAMGES_SZ) >=
+ FW_ENV_REGION_BASE)
+ {
+ DEBUG ((
+ DEBUG_ERROR,
+ "NorFlashPlatformInitialization: Variable region overlapping with "
+ "firmware region.\n"
+ ));
+
+ return EFI_ACCESS_DENIED;
+ }
+
+ *NorFlashDevices = mNorFlashDevices;
+ *Count = ARRAY_SIZE (mNorFlashDevices);
+ return EFI_SUCCESS;
+}
-- 
2.25.1







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Gro

Re: [edk2-devel] [edk2-platforms][PATCH V4 15/17] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe

2024-05-29 Thread Sami Mujawar
Hi Sahil,

Please find my feedback inline marked [SAMI].

Regards,

Sami Mujawar

On 29/05/2024, 09:56, "Sahil Kaushal" mailto:sahil.kaus...@arm.com>> wrote:


From: sahil mailto:sa...@arm.com>>


In N1Sdp platform, the SoC is connected to IOFPGA which has a
Cadence Quad SPI (QSPI) controller. This QSPI controller manages
the flash chip device via QSPI bus.


This patch adds CadenceQspiNorFlashDeviceLib which is used to
manage and access the above configuration.


Signed-off-by: sahil mailto:sa...@arm.com>>
---
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 | 32 +
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
 | 46 +
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
 | 1034 
3 files changed, 1112 insertions(+)


diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
new file mode 100644
index ..506876b62285
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
@@ -0,0 +1,32 @@
+#/** @file
+#
+# Component description file for CadenceQspiNorFlashDeviceLib Library
+#
+# Copyright (c) 2024, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = CadenceQspiNorFlashDeviceLib
+ FILE_GUID = ed172366-066b-4998-9b5e-ca7f385a170b
+ MODULE_TYPE = DXE_RUNTIME_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = NorFlashDeviceLib
+
+[Sources.common]
+ CadenceQspiNorFlashDeviceLib.c
+ CadenceQspiNorFlashDeviceLib.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ Platform/ARM/ARM.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ IoLib
+ TimerLib
diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
new file mode 100644
index ..951a93481dd1
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
@@ -0,0 +1,46 @@
+/** @file
+
+ Copyright (c) 2024, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_
+#define CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_
+
+#define NOR_FLASH_ERASE_RETRY 10
+
+// QSPI Controller defines
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OFFSET 0x90
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_EXECUTE 0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE 0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS 19
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS 16
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE 0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B 0x02
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS 20
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C 0x8
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS 7
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x) ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS)
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x) ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS)
+
+#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET 0xA0
+
+#define CDNS_QSPI_FLASH_CMD_ADDR_REG_OFFSET 0x94
+
+#define CDNS_QSPI_FLASH_CMD_STATUS_POLL_TIMEOUT_MS 1000u // Command Status 
Register read timeout
+
+#define SPINOR_SR_WIP BIT0 // Write in progress
+
+#define SPINOR_OP_WREN 0x06 // Write enable
+#define SPINOR_OP_BE_4K 0x20 // Erase 4KiB block
+#define SPINOR_OP_RDID 0x9f // Read JEDEC ID
+#define SPINOR_OP_RDSR 0x05 // Read status register
+
+#define SPINOR_SR_WIP_POLL_TIMEOUT_MS 1000u // Status Register read timeout
+
+#endif /* CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ */
diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
new file mode 100644
index ..f97c8d51fd48
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
@@ -0,0 +1,1034 @@
+/** @file
+
+ Copyright (c) 2024 ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "CadenceQspiNorFlashDeviceLib.h"
+
+/**
+ Converts milliseconds into number of ticks of the performance counter.
+
+ @param[in] Milliseconds Milliseconds to convert into ticks.
+
+ @retval Milliseconds expressed as number of ticks.
+
+**/
+STATIC
+UINT64
+MilliSecondsToTicks (
+ IN UINTN Milliseconds
+ )
+{
+ UINT64 NanoSecondsPer

Re: [edk2-devel] [edk2-platforms][PATCH V3 01/17] Platform/ARM/NorFlashDxe: Move DiskIo related functions out of NorFlash.c

2024-05-23 Thread Sami Mujawar
Hi Sahil,

I cannot apply your patches cleanly. Can you share a github branch with your 
patches, please?

Regards,

Sami Mujawar

On 23/05/2024, 11:56, "Sahil Kaushal" mailto:sahil.kaus...@arm.com>> wrote:


From: sahil mailto:sa...@arm.com>>


Moving these functions from NorFlash.c to NorFlashBlockIoDxe.c as
they are not dependent on any particular flash implementation.


Signed-off-by: sahil mailto:sa...@arm.com>>
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 129 
Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 129 
2 files changed, 129 insertions(+), 129 deletions(-)


diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 1b431073ee93..60854ef2a7d0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -807,135 +807,6 @@ NorFlashWriteSingleBlock (
return EFI_SUCCESS;


}






-/*


- Although DiskIoDxe will automatically install the DiskIO protocol whenever


- we install the BlockIO protocol, its implementation is sub-optimal as it reads


- and writes entire blocks using the BlockIO protocol. In fact we can access


- NOR flash with a finer granularity than that, so we can improve performance


- by directly producing the DiskIO protocol.


-*/


-


-/**


- Read BufferSize bytes from Offset into Buffer.


-


- @param This Protocol instance pointer.


- @param MediaId Id of the media, changes every time the media is replaced.


- @param Offset The starting byte offset to read from


- @param BufferSize Size of Buffer


- @param Buffer Buffer containing read data


-


- @retval EFI_SUCCESS The data was read correctly from the device.


- @retval EFI_DEVICE_ERROR The device reported an error while performing the 
read.


- @retval EFI_NO_MEDIA There is no media in the device.


- @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.


- @retval EFI_INVALID_PARAMETER The read request contains device addresses that 
are not


- valid for the device.


-


-**/


-EFI_STATUS


-EFIAPI


-NorFlashDiskIoReadDisk (


- IN EFI_DISK_IO_PROTOCOL *This,


- IN UINT32 MediaId,


- IN UINT64 DiskOffset,


- IN UINTN BufferSize,


- OUT VOID *Buffer


- )


-{


- NOR_FLASH_INSTANCE *Instance;


- UINT32 BlockSize;


- UINT32 BlockOffset;


- EFI_LBA Lba;


-


- Instance = INSTANCE_FROM_DISKIO_THIS (This);


-


- if (MediaId != Instance->Media.MediaId) {


- return EFI_MEDIA_CHANGED;


- }


-


- BlockSize = Instance->Media.BlockSize;


- Lba = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, );


-


- return NorFlashRead (Instance, Lba, BlockOffset, BufferSize, Buffer);


-}


-


-/**


- Writes a specified number of bytes to a device.


-


- @param This Indicates a pointer to the calling context.


- @param MediaId ID of the medium to be written.


- @param Offset The starting byte offset on the logical block I/O device to 
write.


- @param BufferSize The size in bytes of Buffer. The number of bytes to write 
to the device.


- @param Buffer A pointer to the buffer containing the data to be written.


-


- @retval EFI_SUCCESS The data was written correctly to the device.


- @retval EFI_WRITE_PROTECTED The device can not be written to.


- @retval EFI_DEVICE_ERROR The device reported an error while performing the 
write.


- @retval EFI_NO_MEDIA There is no media in the device.


- @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.


- @retval EFI_INVALID_PARAMETER The write request contains device addresses 
that are not


- valid for the device.


-


-**/


-EFI_STATUS


-EFIAPI


-NorFlashDiskIoWriteDisk (


- IN EFI_DISK_IO_PROTOCOL *This,


- IN UINT32 MediaId,


- IN UINT64 DiskOffset,


- IN UINTN BufferSize,


- IN VOID *Buffer


- )


-{


- NOR_FLASH_INSTANCE *Instance;


- UINT32 BlockSize;


- UINT32 BlockOffset;


- EFI_LBA Lba;


- UINTN RemainingBytes;


- UINTN WriteSize;


- EFI_STATUS Status;


-


- Instance = INSTANCE_FROM_DISKIO_THIS (This);


-


- if (MediaId != Instance->Media.MediaId) {


- return EFI_MEDIA_CHANGED;


- }


-


- BlockSize = Instance->Media.BlockSize;


- Lba = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, );


-


- RemainingBytes = BufferSize;


-


- // Write either all the remaining bytes, or the number of bytes that bring


- // us up to a block boundary, whichever is less.


- // (DiskOffset | (BlockSize - 1)) + 1) rounds DiskOffset up to the next


- // block boundary (even if it is already on one).


- WriteSize = MIN (RemainingBytes, ((DiskOffset | (BlockSize - 1)) + 1) - 
DiskOffset);


-


- do {


- if (WriteSize == BlockSize) {


- // Write a full block


- Status = NorFlashWriteFullBlock (Instance, Lba, Buffer, BlockSize / sizeof 
(UINT32));


- } else {


- // Write a partial block


- Status = NorFlashWriteSingleBlock (Instance, Lba, BlockOffset, , 
Buffer);


- }


-


- if 

Re: [edk2-devel] [edk2-platforms][PATCH V3 11/17] Platform/ARM/NorFlashDxe: Fix memory leak in NorFlashCreateInstance()

2024-05-23 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

I have a minor suggession marked inline as [SAMI].

Otherwise this patch looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/05/2024 11:55 am, Sahil Kaushal wrote:

From: sahil

This patch adds error_handler1 and error_handler2 labels in
NorFlashCreateInstance() function to handle the cleanup.

error_handler1: Frees just the Instance structure as the
ShadowBuffer is not allocated yet.

error_handler2: Frees both Instance and Instance->ShadowBuffer.

Signed-off-by: sahil
---
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c  | 18 
+-
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 19 
++-
  2 files changed, 27 insertions(+), 10 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index e01b05d91978..fd47bd9e4c63 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -135,7 +135,8 @@ NorFlashCreateInstance (
  


Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);

if (Instance->ShadowBuffer == NULL) {

-return EFI_OUT_OF_RESOURCES;

+Status = EFI_OUT_OF_RESOURCES;

+goto error_handler1;

}

  


if (SupportFvb) {

@@ -152,8 +153,7 @@ NorFlashCreateInstance (
  NULL

  );

  if (EFI_ERROR (Status)) {

-  FreePool (Instance);

-  return Status;

+  goto error_handler2;

  }

} else {

  Status = gBS->InstallMultipleProtocolInterfaces (

@@ -167,12 +167,20 @@ NorFlashCreateInstance (
  NULL

  );

  if (EFI_ERROR (Status)) {

-  FreePool (Instance);

-  return Status;

+  goto error_handler2;

  }

}

  


*NorFlashInstance = Instance;

[SNIP]

+  return EFI_SUCCESS;

+
+error_handler1:

+  FreePool (Instance);

+  return Status;

+

+error_handler2:

+  FreePool (Instance->ShadowBuffer);

+  FreePool (Instance);

return Status;


[/SNIP]

[SAMI] I think the above code can be simplified as below:

---

+ return Status;
+

+error_handler2:

+  FreePool (Instance->ShadowBuffer);

+error_handler2:

+  FreePool (Instance);

   return Status;
---

A similar change is reuired later in this patch below.

If you agree, I will fix this up before merging the patch.

[/SAMI]



  }

  


diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
index 16fe3762e125..17dfe26627dd 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
@@ -129,7 +129,8 @@ NorFlashCreateInstance (
  


Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);

if (Instance->ShadowBuffer == NULL) {

-return EFI_OUT_OF_RESOURCES;

+Status = EFI_OUT_OF_RESOURCES;

+goto error_handler1;

}

  


if (SupportFvb) {

@@ -142,16 +143,24 @@ NorFlashCreateInstance (
>FvbProtocol

);

  if (EFI_ERROR (Status)) {

-  FreePool (Instance);

-  return Status;

+  goto error_handler2;

  }

} else {

  DEBUG ((DEBUG_ERROR, "standalone MM NOR Flash driver only support 
FVB.\n"));

-FreePool (Instance);

-return EFI_UNSUPPORTED;

+Status = EFI_UNSUPPORTED;

+goto error_handler2;

}

  


*NorFlashInstance = Instance;

+  return EFI_SUCCESS;

+

+error_handler1:

+  FreePool (Instance);

+  return Status;

+

+error_handler2:

+  FreePool (Instance->ShadowBuffer);

+  FreePool (Instance);

return Status;

  }

  




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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 05/14] Platform/ARM: Create NorFlashDeviceLib library interface for flash specific functions

2024-05-21 Thread Sami Mujawar

Hi Sahil,

Please find my response inline marked [SAMI].

Regards,

Sami mujawar

On 21/05/2024 09:37 am, Sahil wrote:

Hi Sami,
Thank you for reviewing the patches.
Please find my comments inline below marked as [SAHIL].
Also, for the documentation headers, I will try to add in
NorFlashDeviceLib.h and keep it consistent with
CadenceQspiNorFlashDeviceLib.


On Thu, 16 May 2024 at 20:48, Sami Mujawar via groups.io
 wrote:

Hi Sahil,

Thank you for this patch.

I have some feedback marked inline as [SAMI].

Other than that, is is possible to add documentation header for the functions 
and data streuctures in this file, please?

With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.

This patch splits NorFlash.h and moves out the function prototypes and
macros that are expected by NorFlashDxe to be implemented by any
Nor Flash implementation to NorFlashDeviceLib.h file.

Signed-off-by: sahil 
---
  Platform/ARM/ARM.dec  |   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 143 +-
  Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h |   1 +
  Platform/ARM/Include/Library/NorFlashDeviceLib.h  | 156 
  4 files changed, 159 insertions(+), 142 deletions(-)

diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index be7e6dc83fde..86d1fcb4878e 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -17,6 +17,7 @@


  [LibraryClasses]

BdsLib|Include/Library/BdsLib.h

+  NorFlashDeviceLib|Include/Library/NorFlashDeviceLib.h

NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h



  [Guids]

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index bd5c6a949cf0..6cb1f64b9875 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,6 +20,7 @@


  #include 

  #include 

+#include 



  #define NOR_FLASH_ERASE_RETRY  10



@@ -40,7 +41,6 @@
  #define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr)   ((BaseAddr) + ((OffsetAddr) 
<< 2))

  #define CREATE_DUAL_CMD(Cmd)   ( ( Cmd << 16) | ( Cmd 
& LOW_16_BITS) )

  #define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd)MmioWrite32 
(CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))

-#define GET_NOR_BLOCK_ADDRESS(BaseAddr, Lba, LbaSize)  ( BaseAddr + 
(UINTN)((Lba) * LbaSize) )



  // Status Register Bits

  #define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7)

@@ -105,145 +105,4 @@
  #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP  0x0060

  #define P30_CMD_READ_CONFIGURATION_REGISTER0x0003



-typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;

-

-#pragma pack (1)

-typedef struct {

-  VENDOR_DEVICE_PATH  Vendor;

-  UINT8   Index;

-  EFI_DEVICE_PATH_PROTOCOLEnd;

-} NOR_FLASH_DEVICE_PATH;

-#pragma pack ()

-

-struct _NOR_FLASH_INSTANCE {

-  UINT32 Signature;

-  EFI_HANDLE Handle;

-

-  UINTN  DeviceBaseAddress;

-  UINTN  RegionBaseAddress;

-  UINTN  Size;

-  EFI_LBAStartLba;

-

-  EFI_BLOCK_IO_PROTOCOL  BlockIoProtocol;

-  EFI_BLOCK_IO_MEDIA Media;

-  EFI_DISK_IO_PROTOCOL   DiskIoProtocol;

-

-  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOLFvbProtocol;

-  VOID   *ShadowBuffer;

-

-  NOR_FLASH_DEVICE_PATH  DevicePath;

-};

-

-EFI_STATUS

-NorFlashReadCfiData (

-  IN  UINTN   DeviceBaseAddress,

-  IN  UINTN   CFI_Offset,

-  IN  UINT32  NumberOfBytes,

-  OUT UINT32  *Data

-  );

[SAMI] Where is this function implemented ?

[SAHIL]
This function is not implemented anywhere. It is the same for
NorFlashWrite() as well.
I have migrated them as-is from NorFlash.h but If needed I can push a
patch removing both from the library interface.
Shall I push it?

[SAMI] Yes, please drop the dead code. [/SAMI]

[/SAHIL]

-

-EFI_STATUS

-NorFlashWriteBuffer (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN UINTN   TargetAddress,

-  IN UINTN   BufferSizeInBytes,

-  IN UINT32  *Buffer

-  );

-

-//

-// NorFlash.c

-//

-EFI_STATUS

-NorFlashWriteSingleBlock (

-  INNOR_FLASH_INSTANCE  *Instance,

-  INEFI_LBA Lba,

-  INUINTN   Offset,

-  IN OUTUINTN   *NumBytes,

-  INUINT8   *Buffer

-  );

-

-EFI_STATUS

-NorFlashWriteBlocks (

-  IN  NOR_FLASH_INSTANCE  *Instance,

-  IN  E

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 11/14] Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp

2024-05-21 Thread Sami Mujawar

Hi Sahil,

Please see my response marked inline as [SAMI].

Regards,

Sami Mujawar

On 21/05/2024 10:24 am, sahil via groups.io wrote:

Hi Sami,
Thank you for reviewing the patches.
Please find my comments inline below marked as [SAHIL].

On Thu, 16 May 2024 at 20:54, Sami Mujawar via groups.io
 wrote:

Hi Sahil,

Thank you for this patch.

I have some suggestions marked inline below, otherwise this patch looks good to 
me.

With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.

[SAMI] I think the information in the commit message of patch 10/14 would be 
more useful here.

Not mandatory, but it may be useful to have an ASCII diagram to explain the 
flash partitioning.

[/SAMI]

[SAHIL]
I will add more information to the commit message.
As for the ASCII diagram, as the size of the images can change, it
will not be possible to make an accurate diagram.
[/SAHIL]
[SAMI] See if you can represent the layout, otherwise ignore my comment. 
[/SAMI]



Signed-off-by: sahil 
---
  Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf | 34 ++
  Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c   | 65 

  2 files changed, 99 insertions(+)

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index ..fad3bca79d3a
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,34 @@
+## @file

+#  NOR flash lib for ARM Neoverse N1 platform.

+#

+#  Copyright (c) 2024, ARM Limited. All rights reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+[Defines]

+  INF_VERSION= 0x0001001B

+  BASE_NAME  = NorFlashNeoverseN1SocLib

+  FILE_GUID  = 7006fcf1-a585-4272-92e3-b286b1dff5bb

+  MODULE_TYPE= DXE_DRIVER

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = NorFlashPlatformLib

+

+[Sources.common]

+  NorFlashLib.c

+

+[Packages]

+  MdeModulePkg/MdeModulePkg.dec

+  MdePkg/MdePkg.dec

+  Platform/ARM/ARM.dec

+  Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec

+

+[LibraryClasses]

+  BaseLib

+

+[FixedPcd]

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index ..a48db9c74548
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,65 @@
+/** @file

+*  NOR flash lib for ARM Neoverse N1 platform

+*

+*  Copyright (c) 2024, ARM Limited. All rights reserved.

+*

+*  SPDX-License-Identifier: BSD-2-Clause-Patent

+*

+**/

+

+#include 

+#include 

+#include 

+

+#define FW_ENV_REGION_BASE  FixedPcdGet32 (PcdFlashNvStorageVariableBase)

+#define FW_ENV_REGION_SIZE  (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + \

+FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + \

+FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize))

[SAMI] Would it be an issue if someone were to increase the storage variable 
sizes above?

How can you prevent someone overwriting the flash region used by the SCP?

Would it make sense to add a check in NorFlashPlatformInitialization() ?

[/SAMI]

[SAHIL]
With the current code, the firmware images take ~2.5MB and the
variable storage region starts at 15MB
offset from the base. The firmware image's size is unlikely to change much.
Therefore, it is unlikely to cause any issue if someone tries to
increase the variable
region by decreasing the PcdFlashNvStorageVariableBase.

If we still want to add a check, I can add an assert checking
PcdFlashNvStorageVariableBase offset is
not <= to a particular offset (maybe 8MB) in NorFlashPlatformInitialization().
Would this be fine?
[SAMI] Yes, an assert at the appropriate place would be good. Also think 
if it would make sense to add a check and return an error. [/SAMI]

[/SAHIL]


+

+STATIC NOR_FLASH_DESCRIPTION  mNorFlashDevices[] = {

+  {

+/// Environment variable region

+NEOVERSEN1SOC_SCP_QSPI_AHB_BASE,///< device base

+FW_ENV_REGION_BASE, ///< region base

+FW_ENV_REGION_SIZE, ///< region size

+SIZE_4KB,   ///< block size

+  },

+};

+

+/**

+  Dummy implementation of NorFlashPlatformInitialization to

+  comply with NorFlashPlatfo

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 12/14] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Please find my response inline marked [SAMI].

Regards,

Sami Mujawar

On 09/05/2024 07:25 am, Sahil wrote:
Hi Pierre, Thanks for reviewing the patchset. Please find my comment 
inline below.


On Thu, 2 May 2024 at 18:47, PierreGondois via groups.io 
<http://groups.io>  wrote:

>
> Hello Sahil,
>
> On 4/23/24 07:56, Sahil Kaushal via groups.io <http://groups.io> wrote:
> > From: sahil 
> >
> > In N1Sdp platform, the SoC is connected to IOFPGA which has a
> > Cadence Quad SPI (QSPI) controller. This QSPI controller manages
> > the flash chip device via QSPI bus.
> >
> > This patch adds CadenceQspiNorFlashDeviceLib which is used to
> > manage and access the above configuration.
> >
> > Signed-off-by: sahil 
> > ---
> > 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf 
|   32 +
> > 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h 
  |   44 +
> > 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c 
  | 1011 

> >   3 files changed, 1087 insertions(+)
> >
>
> [snip]
>
> > +
> > +/**
> > +  Converts milliseconds into number of ticks of the performance 
counter.

> > +
> > +  @param[in] Milliseconds  Milliseconds to convert into ticks.
> > +
> > +  @retval Milliseconds expressed as number of ticks.
> > +
> > +**/
> > +STATIC
> > +UINT64
> > +MilliSecondsToTicks (
> > +  IN UINTN  Milliseconds
> > +  )
> > +{
> > +  CONST UINT64  NanoSecondsPerTick = GetTimeInNanoSecond (1);
> > +
> > +  return (Milliseconds * 100) / NanoSecondsPerTick;
>
> Should use DivU64x64Remainder() here:
> {
>    UINT64  NanoSecondsPerTick;
>    UINT64  NanoSeconds;
>
>    NanoSecondsPerTick = GetTimeInNanoSecond (1);
>    NanoSeconds = MultU64x32 (Milliseconds, 100);
>
>    return DivU64x64Remainder (NanoSeconds, NanoSecondsPerTick, NULL);
> }
>
> > +}
> > +
> > +/**
> > +  Poll Status register for NOR flash erase/write completion.
> > +
> > +  @param[in]      Instance           NOR flash Instance.
> > +
> > +  @retval         EFI_SUCCESS        Request is executed 
successfully.

> > +  @retval         EFI_TIMEOUT        Operation timed out.
> > +  @retval         EFI_DEVICE_ERROR   Controller operartion failed.
>
> operartion -> typo
> (same at another place I think)
>
> [snip]
>
> > +
> > +/**
> > +  Read from nor flash.
> > +
> > +  @param[in]     Instance               NOR flash Instance of 
variable store region.
> > +  @param[in]     Lba                    The starting logical 
block index to read from.
> > +  @param[in]     Offset                 Offset into the block at 
which to begin reading.

> > +  @param[in]     BufferSizeInBytes      The number of bytes to read.
> > +  @param[out]    Buffer                 The pointer to a 
caller-allocated buffer that

> > +                                        should copied with read data.
> > +
> > +  @retval        EFI_SUCCESS            The read is completed.
> > +  @retval        EFI_INVALID_PARAMETER  Invalid parameters passed.
> > +**/
> > +EFI_STATUS
> > +NorFlashRead (
> > +  IN NOR_FLASH_INSTANCE  *Instance,
> > +  IN EFI_LBA             Lba,
> > +  IN UINTN               Offset,
> > +  IN UINTN               BufferSizeInBytes,
> > +  OUT VOID               *Buffer
> > +  )
> > +{
> > +  UINTN  StartAddress;
> > +
> > +  // The buffer must be valid
> > +  if (Buffer == NULL) {
> > +    return EFI_INVALID_PARAMETER;
> > +  }
> > +
> > +  // Return if we do not have any byte to read
> > +  if (BufferSizeInBytes == 0) {
> > +    return EFI_SUCCESS;
> > +  }
> > +
> > +  if (((Lba * Instance->Media.BlockSize) + Offset + 
BufferSizeInBytes) >

> > +      Instance->Size)
> > +  {
> > +    DEBUG ((
> > +      DEBUG_ERROR,
> > +      "NorFlashRead: ERROR - Read will exceed device size.\n"
> > +      ));
> > +    return EFI_INVALID_PARAMETER;
> > +  }
> > +
> > +  // Get the address to start reading from
> > +  StartAddress = GET_NOR_BLOCK_ADDRESS (
> > +                   Instance->RegionBaseAddress,
> > +                   Lba,
> > +                   Instance->Media.BlockSize
> > +                   );
> > +
> > +  // Readout the data
> > +  CopyMem (Buffer, (UINTN *)(StartAddress + Offset), 
BufferSizeInBytes);

>
> The original code at:
&g

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 14/14] Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

This driver enables Fault Tolerant Write protocol, which provides
fault tolerant write capability for block devices.

Signed-off-by: sahil 
---
  Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 +
  Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 1 +
  2 files changed, 6 insertions(+)

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc 
b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index fd630fa08c35..743c2e647b76 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -162,6 +162,10 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20

  


# NOR flash support

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x18F4

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0002

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x18F2

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0002

gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0

gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002

  


@@ -228,6 +232,7 @@

NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf

BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

}

+  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf

  


# ACPI Support

MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf 
b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index 07118725f168..7b7eda51c70c 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -90,6 +90,7 @@ READ_LOCK_STATUS   = TRUE
INF MdeModulePkg/Universal/Metronome/Metronome.inf

INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf

INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf

+  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf

INF 
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf

INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf




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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 13/14] Platform/ARM/N1Sdp: Persistent storage for N1Sdp

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

Enable persistent storage on QSPI flash device.

Signed-off-by: sahil 
---
  Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 19 ++-
  Platform/ARM/N1Sdp/N1SdpPlatform.fdf |  2 ++
  2 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc 
b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index 46412bff7d78..fd630fa08c35 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -161,11 +161,9 @@
# ACPI Table Version

gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20

  


-  # Runtime Variable storage

-  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0

-  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE

-  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000

-  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800

+  # NOR flash support

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002

  


  


  #

@@ -197,6 +195,16 @@
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800F

}

  


+  # NOR flash support

+  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf {

+

+  
NorFlashDeviceLib|Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf

+  
NorFlashPlatformLib|Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

+

+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x1C0C

+  }

+

# Architectural Protocols

ArmPkg/Drivers/CpuDxe/CpuDxe.inf

ArmPkg/Drivers/ArmGic/ArmGicDxe.inf

@@ -217,6 +225,7 @@
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {

  

NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf

+  
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf

BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

}

  


diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf 
b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index 7aae8e6a753b..07118725f168 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -140,6 +140,8 @@ READ_LOCK_STATUS   = TRUE
INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf

INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf

  


+  INF Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf

+

INF Platform/ARM/Drivers/BootMonFs/BootMonFs.inf

INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf

  




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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 12/14] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

Please find my response inline marked [SAMI].

With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil

In N1Sdp platform, the SoC is connected to IOFPGA which has a
Cadence Quad SPI (QSPI) controller. This QSPI controller manages
the flash chip device via QSPI bus.

This patch adds CadenceQspiNorFlashDeviceLib which is used to
manage and access the above configuration.

Signed-off-by: sahil
---
  
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 |   32 +
  
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
   |   44 +
  
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
   | 1011 
  3 files changed, 1087 insertions(+)

diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
new file mode 100644
index ..506876b62285
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
@@ -0,0 +1,32 @@
+#/** @file

+#

+#  Component description file for CadenceQspiNorFlashDeviceLib Library

+#

+#  Copyright (c) 2024, Arm Limited. All rights reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+#**/

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = CadenceQspiNorFlashDeviceLib

+  FILE_GUID  = ed172366-066b-4998-9b5e-ca7f385a170b

+  MODULE_TYPE= DXE_RUNTIME_DRIVER

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = NorFlashDeviceLib

+

+[Sources.common]

+  CadenceQspiNorFlashDeviceLib.c

+  CadenceQspiNorFlashDeviceLib.h

+

+[Packages]

+  MdePkg/MdePkg.dec

+  Platform/ARM/ARM.dec

+

+[LibraryClasses]

+  BaseLib

+  BaseMemoryLib

+  DebugLib

+  IoLib

+  TimerLib

diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
new file mode 100644
index ..d43d27fe5eb4
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
@@ -0,0 +1,44 @@
+/** @file

+

+  Copyright (c) 2024, ARM Limited. All rights reserved.

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_

+#define CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_

+

+#define NOR_FLASH_ERASE_RETRY  10

+

+// QSPI Controller defines

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OFFSET 0x90

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_EXECUTE0x01

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE0x01

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS   19

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS  16

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE0x01

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B   0x02

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS   20

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C   0x8

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS  7

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x)  ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS)

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x)  ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS)

+

+#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET  0xA0

+

+#define CDNS_QSPI_FLASH_CMD_ADDR_REG_OFFSET  0x94

+

+#define SPINOR_SR_WIP  BIT0 // Write in progress

+

+#define SPINOR_OP_WREN   0x06   // Write enable

+#define SPINOR_OP_BE_4K  0x20   // Erase 4KiB block

+#define SPINOR_OP_RDID   0x9f   // Read JEDEC ID

+#define SPINOR_OP_RDSR   0x05   // Read status register

+

+#define SPINOR_SR_WIP_POLL_TIMEOUT_MS  1000u // Status Register read timeout

+

+#endif /* CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ */

diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
new file mode 100644
index ..8a416e07f15e
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
@@ -0,0 +1,1011 @@
+/** @file

+

+  Copyright (c) 2024 ARM Limited. All rights reserved.

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+

+#include "CadenceQspiNorFlashDeviceLib.h"

+

+/**

+  Execute Flash cmd ctrl and Read Status.

+

+  @p

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 11/14] Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

I have some suggestions marked inline below, otherwise this patch looks 
good to me.


With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil

Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.


[SAMI] I think the information in the commit message of patch 10/14 
would be more useful here.


Not mandatory, but it may be useful to have an ASCII diagram to explain 
the flash partitioning.


[/SAMI]


Signed-off-by: sahil
---
  Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf | 34 ++
  Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c   | 65 

  2 files changed, 99 insertions(+)

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index ..fad3bca79d3a
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,34 @@
+## @file

+#  NOR flash lib for ARM Neoverse N1 platform.

+#

+#  Copyright (c) 2024, ARM Limited. All rights reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+[Defines]

+  INF_VERSION= 0x0001001B

+  BASE_NAME  = NorFlashNeoverseN1SocLib

+  FILE_GUID  = 7006fcf1-a585-4272-92e3-b286b1dff5bb

+  MODULE_TYPE= DXE_DRIVER

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = NorFlashPlatformLib

+

+[Sources.common]

+  NorFlashLib.c

+

+[Packages]

+  MdeModulePkg/MdeModulePkg.dec

+  MdePkg/MdePkg.dec

+  Platform/ARM/ARM.dec

+  Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec

+

+[LibraryClasses]

+  BaseLib

+

+[FixedPcd]

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index ..a48db9c74548
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,65 @@
+/** @file

+*  NOR flash lib for ARM Neoverse N1 platform

+*

+*  Copyright (c) 2024, ARM Limited. All rights reserved.

+*

+*  SPDX-License-Identifier: BSD-2-Clause-Patent

+*

+**/

+

+#include 

+#include 

+#include 

+

+#define FW_ENV_REGION_BASE  FixedPcdGet32 (PcdFlashNvStorageVariableBase)

+#define FW_ENV_REGION_SIZE  (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + \

+FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + \

+FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize))


[SAMI] Would it be an issue if someone were to increase the storage 
variable sizes above?


How can you prevent someone overwriting the flash region used by the SCP?

Would it make sense to add a check in NorFlashPlatformInitialization() ?

[/SAMI]



+

+STATIC NOR_FLASH_DESCRIPTION  mNorFlashDevices[] = {

+  {

+/// Environment variable region

+NEOVERSEN1SOC_SCP_QSPI_AHB_BASE,///< device base

+FW_ENV_REGION_BASE, ///< region base

+FW_ENV_REGION_SIZE, ///< region size

+SIZE_4KB,   ///< block size

+  },

+};

+

+/**

+  Dummy implementation of NorFlashPlatformInitialization to

+  comply with NorFlashPlatformLib structure.

+

+  @retvalEFI_SUCCESSSuccess.

+**/

+EFI_STATUS

+NorFlashPlatformInitialization (

+  VOID

+  )

+{

+  return EFI_SUCCESS;

+}

+

+/**

+  Get NOR flash region info

+

+  @param[out]NorFlashDevicesNOR flash regions info.

+  @param[out]Count  number of flash instance.

+

+  @retvalEFI_SUCCESSSuccess.

+  @retvalEFI_INVALID_PARAMETER  The parameters specified are not valid.

+**/

+EFI_STATUS

+NorFlashPlatformGetDevices (

+  OUT NOR_FLASH_DESCRIPTION  **NorFlashDevices,

+  OUT UINT32 *Count

+  )

+{

+  if ((NorFlashDevices == NULL) || (Count == NULL)) {

+return EFI_INVALID_PARAMETER;

+  }

+

+  *NorFlashDevices = mNorFlashDevices;

+  *Count   = ARRAY_SIZE (mNorFlashDevices);

+  return EFI_SUCCESS;

+}




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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 10/14] Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

Enable SCP QSPI flash region access by adding it in the PlatformLibMem.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.

Signed-off-by: sahil 
---
  Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h  | 7 +++
  Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 8 +++-
  2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h 
b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 5483e7bc5f68..2dae57a0f01a 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -4,6 +4,9 @@
  *

  * SPDX-License-Identifier: BSD-2-Clause-Patent

  *

+* Arm Neoverse N1 System Development Platform Technical Reference Manual

+* https://developer.arm.com/documentation/101489//?lang=en

+*

  **/

  


  #ifndef NEOVERSEN1SOC_PLATFORM_H_

@@ -41,6 +44,10 @@
  #define NEOVERSEN1SOC_EXP_PERIPH_BASE0   0x1C00

  #define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ0x130

  


+// SCP QSPI flash device

+#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE  0x1800

+#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ0x200

+

  /*

   * Platform information structure stored in Non-secure SRAM. Platform

   * information are passed from the trusted firmware with the below structure

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c 
b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
index 80daedb33416..282bfbc81736 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
@@ -14,7 +14,7 @@
  #include 

  


  // The total number of descriptors, including the final "end-of-table" 
descriptor.

-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 19

+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 20

  


  /**

Returns the Virtual Memory Map of the platform.

@@ -203,6 +203,12 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Length  = 
NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ;

VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;

  


+  // SCP QSPI flash device

+  VirtualMemoryTable[++Index].PhysicalBase  = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;

+  VirtualMemoryTable[Index].VirtualBase = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;

+  VirtualMemoryTable[Index].Length  = NEOVERSEN1SOC_SCP_QSPI_AHB_SZ;

+  VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;

+

if (PlatInfo->MultichipMode == 1) {

  //Remote DDR (2GB)

  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdExtMemorySpace) +




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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 09/14] Platform/ARM: Add optional provision to fetch and print NOR Flash info

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

Please find my feedback inline marked [SAMI].

Regards,

Sami Mujawarnd

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil

This patch adds an optional functionality in NorFlashDxe to fetch and
print NOR Flash information from NorFlashInfoLib using its JEDEC ID.

NOR Flash libraries will implement a function "NorFlashReadID" which
will fetch and return JEDEC ID. This JEDEC ID can be then used to
print NOR Flash info using NorFlashInfoLib. If this functionality is


[SAMI] Can you explain how this information is useful, please? Is it 
just for debugging or it can be used for some other purpose.


If it is just for printing the information, then maybe the above 
sentence could be silghtly modified, e.g.


This JEDEC ID can be then printed along with the NOR Flash info by 
NorFlashInfoLib.

[/SAMI]


not needed then the function can just return EFI_UNSUPPORTED.

Signed-off-by: sahil
---
  Platform/ARM/SgiPkg/SgiPlatform.dsc.inc  |  2 ++
  Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc|  2 ++
  Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc |  2 ++
  Platform/ARM/JunoPkg/ArmJuno.dsc |  2 ++
  Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc|  2 ++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf |  1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf|  1 +
  Platform/ARM/Include/Library/NorFlashDeviceLib.h |  6 ++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c   | 19 
+++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c  | 19 
+++
  Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c | 18 
++
  11 files changed, 74 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 3dcf422eab4b..aef7cba5449e 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -36,6 +36,8 @@
LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf


NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf


ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf

TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf

diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
index ab0e2a957a1b..02d684adaebd 100644
--- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
@@ -65,6 +65,8 @@
IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf


NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf

RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf


PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf

diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc 
b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
index 70ff049d3248..4e208c539a88 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
@@ -95,6 +95,8 @@

ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf


NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf


ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf

  


# ARM PL031 RTC Driver

diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 81d2cbe4359f..946b8680c8c2 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -42,6 +42,8 @@
  



NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

  


CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf


CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf

diff --git 

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 08/14] Platform/ARM: Add HostRegisterBaseAddress variable

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

I have a minor comment marked inline as [SAMI].

With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

This variable holds the QSPI controller's base address.
It is defined in ARM.dec as well with the default value of 0x0.
In case a platform is not using it, they can just ignore this
variable and the default value of 0x0 will be propogated and
the variable will not be used.

Signed-off-by: sahil 
---
  Platform/ARM/ARM.dec  |  3 ++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |  3 ++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |  2 ++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h |  1 +
  Platform/ARM/Include/Library/NorFlashDeviceLib.h  |  1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c| 34 
+---
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   | 12 ---
  7 files changed, 48 insertions(+), 8 deletions(-)

diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index 86d1fcb4878e..a5e28c372903 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -26,3 +26,6 @@
  


  [PcdsFeatureFlag.common]


gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x001

+

+[PcdsFixedAtBuild.common]

+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x0|UINT32|0x0002

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index de160025b632..6522968d6c5a 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -65,5 +65,8 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase

gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize

  


+[FixedPcd]

+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress

+

  [Depex]

gEfiCpuArchProtocolGuid

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index d9e7de07165c..eb86d423f106 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -59,5 +59,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase

gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize

  


+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress

+

  [Depex]

TRUE

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index 7fcb949843e8..98464e4868b1 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -34,6 +34,7 @@
  //

  EFI_STATUS

  NorFlashCreateInstance (

+  IN UINTNHostRegisterBase,

IN UINTNNorFlashDeviceBase,

IN UINTNNorFlashRegionBase,

IN UINTNNorFlashSize,

diff --git a/Platform/ARM/Include/Library/NorFlashDeviceLib.h 
b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
index e5017130a091..29b8b8901525 100644
--- a/Platform/ARM/Include/Library/NorFlashDeviceLib.h
+++ b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
@@ -29,6 +29,7 @@ struct _NOR_FLASH_INSTANCE {
UINT32 Signature;

EFI_HANDLE Handle;

  


+  UINTN  HostRegisterBaseAddress;
[SAMI] HostControllerBaseAddress ? Also, can you add doxygen 
documentation for this field, please? Also mention that this is optional 
if there is no Host Controller present.


UINTN  DeviceBaseAddress;

UINTN  RegionBaseAddress;

UINTN  Size;

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index 1c12572ab663..f5c0dadf84e0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -1,6 +1,6 @@
  /** @file  NorFlashDxe.c

  


-  Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.

+  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.

  


SPDX-License-Identifier: BSD-2-Clause-Patent

  


@@ -30,6 +30,7 @@ NOR_FLASH_INSTANCE  mNorFlashInstanceTemplate = {
NOR_FLASH_SIGNATURE, // Signature

NULL,// Handle ... NEED TO BE FILLED

  


+  0, // HostRegisterBaseAddress  ... NEED TO BE FILLED

[SAMI] Should the documentation also say that this is optional?


0, // DeviceBaseAddress ... NEED TO BE FILLED

0, // RegionBaseAddress ... NEED TO BE FILLED

0, // Size ... NEED TO BE FILLED

@@ -99,6 +100,7 @@ NOR_FLASH_INSTANCE  mNorFlashInstanceTemplate = {
  


  EFI_STATUS

  NorFlashCreateInstance (

+  IN UINTNHostRegisterBase,

[SAMI

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 07/14] Platform/ARM/NorFlashDxe: Switch from NorFlash.c to NorFlashDeviceLib

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.

This patch adds the following major changes:

1. Adds changes in NorFlashDxe to look for NorFlashDeviceLib instead of
NorFlash.c for flash specific implementation

2. Remove NorFlash.c and NorFlash.h as they are no longer required.

3. Add changes to platform description files to provide
P30NorFlashDeviceLib as NorFlashDeviceLib

Signed-off-by: sahil 
---
  Platform/ARM/SgiPkg/SgiPlatform.dsc.inc   |   1 +
  Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc |   1 +
  Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc  |   1 +
  Platform/ARM/JunoPkg/ArmJuno.dsc  |   1 +
  Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc |   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |   5 +-
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |   6 +-
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 108 ---
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   | 953 

  Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c |   1 -
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c|   1 -
  Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c|   1 -
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   |   1 -
  13 files changed, 7 insertions(+), 1074 deletions(-)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 1bf489ffeb39..3dcf422eab4b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -34,6 +34,7 @@
BasePathLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf

LcdHwLib|ArmPlatformPkg/Library/HdLcd/HdLcd.inf

LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf

+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf

HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf


ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf

diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
index 0dd9ebbfc16c..ab0e2a957a1b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
@@ -63,6 +63,7 @@
AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf

BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf

IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf

+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf

OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf

RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf

diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc 
b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
index 9f51e05af561..70ff049d3248 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
@@ -93,6 +93,7 @@
# Versatile Express Specific Libraries

PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf


ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf

+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf


ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf

  


diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 7fe796a53433..81d2cbe4359f 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -40,6 +40,7 @@
ArmPlatformLib|Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf

ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf

  


+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf

  


CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf

diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc 
b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
index 0e77b76cae69..a5805da49c92 100644
--- a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
+++ b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
@@ -100,6 +100,7 @@
  


# STMM for Variable runtime service

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 06/14] Platform/ARM: Add P30NorFlashDeviceLib Library

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

Please find my response inline marked [SAMI].

With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

This patch implements functions to interact with P30 NOR Flash.
The code is taken from Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
file.

Signed-off-by: sahil 
---
  Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf |  35 +
  Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h   |  98 ++
  Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c   | 949 

  3 files changed, 1082 insertions(+)

diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf 
b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
new file mode 100644
index ..0707edb54442
--- /dev/null
+++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
@@ -0,0 +1,35 @@
+#/** @file

+#

+#  Component description file for P30NorFlashDeviceLib library

+#

+#  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.

+#  Copyright (c) 2020, Linaro, Ltd. All rights reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+#**/

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = P30NorFlashDeviceLib

+  FILE_GUID  = ed172366-066b-4998-9b5e-ca7f385a1709

+  MODULE_TYPE= DXE_DRIVER

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = NorFlashDeviceLib

+

+[Sources.common]

+  P30NorFlashDeviceLib.c

+  P30NorFlashDeviceLib.h

+

+[Packages]

+  MdePkg/MdePkg.dec

+  Platform/ARM/ARM.dec

+

+[LibraryClasses]

+  BaseLib

+  BaseMemoryLib

+  DebugLib

+  IoLib

+

+[Pcd.common]

+  gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked

diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h 
b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h
new file mode 100644
index ..c310b2310d62
--- /dev/null
+++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h
@@ -0,0 +1,98 @@
+/** @file  P30NorFlashDeviceLib.h

+

+  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.

+  Copyright (c) 2020, Linaro, Ltd. All rights reserved.

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef P30_NOR_FLASH_DEVICE_LIB_H_

+#define P30_NOR_FLASH_DEVICE_LIB_H_

+

+#define NOR_FLASH_ERASE_RETRY  10

+

+// Device access macros

+// These are necessary because we use 2 x 16bit parts to make up 32bit data

+

+#define HIGH_16_BITS  0x

+#define LOW_16_BITS   0x

+#define LOW_8_BITS0x00FF

+

+#define FOLD_32BIT_INTO_16BIT(value)  ( ( value >> 16 ) | ( value & 
LOW_16_BITS ) )

+

+#define GET_LOW_BYTE(value)   ( value & LOW_8_BITS )

+#define GET_HIGH_BYTE(value)  ( GET_LOW_BYTE( value >> 16 ) )

+

+// Each command must be sent simultaneously to both chips,

+// i.e. at the lower 16 bits AND at the higher 16 bits

+#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr)  ((BaseAddr) + ((OffsetAddr) 
<< 2))

+#define CREATE_DUAL_CMD(Cmd)  ( ( Cmd << 16) | ( Cmd & 
LOW_16_BITS) )

+#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd)   MmioWrite32 
(CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))

+

+#define BOTH_ALIGNED(a, b, align)  UINTN)(a) | (UINTN)(b)) & ((align) - 
1)) == 0)

+

+// Status Register Bits

+#define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7)

+#define P30_SR_BIT_ERASE_SUSPEND(BIT6 << 16 | BIT6)

+#define P30_SR_BIT_ERASE(BIT5 << 16 | BIT5)

+#define P30_SR_BIT_PROGRAM  (BIT4 << 16 | BIT4)

+#define P30_SR_BIT_VPP  (BIT3 << 16 | BIT3)

+#define P30_SR_BIT_PROGRAM_SUSPEND  (BIT2 << 16 | BIT2)

+#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)

+#define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)

+

+// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family

+

+// On chip buffer size for buffered programming operations

+// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each 
word is 2 bytes.

+// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes

+#define P30_MAX_BUFFER_SIZE_IN_BYTES  ((UINTN)128)

+#define P30_MAX_BUFFER_SIZE_IN_WORDS  (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))

+#define MAX_BUFFERED_PROG_ITERATIONS  1000

+#define BOUNDARY_OF_32_WORDS  0x7F

+

+// CFI Addresses

+#define P30_CFI_ADDR_QUERY_UNIQUE_QRY  0x10

+#define P30_CFI_ADDR_VENDOR_ID 0x13

+

+// CFI Data

+#define CFI_QRY  0x00595251

+

+// READ Commands

+#define P30_CMD_READ_DEVICE_ID 0x0090

+#define P30_CMD_READ_STATUS_REGISTER   0x0070

+#define P30_CMD_CLEAR_STATUS_REGISTER  0x0050

+#define P30_CMD_READ_ARRAY 0x00FF

+#define P30_CMD_READ_CFI_QUERY 0x0098

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 05/14] Platform/ARM: Create NorFlashDeviceLib library interface for flash specific functions

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

I have some feedback marked inline as [SAMI].

Other than that, is is possible to add documentation header for the functions 
and data streuctures in this file, please?

With that fixed,

Reviewed-by: Sami Mujawar <mailto:sami.muja...@arm.com>

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil <mailto:sa...@arm.com>

NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.

This patch splits NorFlash.h and moves out the function prototypes and
macros that are expected by NorFlashDxe to be implemented by any
Nor Flash implementation to NorFlashDeviceLib.h file.

Signed-off-by: sahil <mailto:sa...@arm.com>
---
Platform/ARM/ARM.dec  |   1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 143 +-
Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h |   1 +
Platform/ARM/Include/Library/NorFlashDeviceLib.h  | 156 
4 files changed, 159 insertions(+), 142 deletions(-)

diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index be7e6dc83fde..86d1fcb4878e 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -17,6 +17,7 @@


[LibraryClasses]

  BdsLib|Include/Library/BdsLib.h

+  NorFlashDeviceLib|Include/Library/NorFlashDeviceLib.h

  NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h



[Guids]

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index bd5c6a949cf0..6cb1f64b9875 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,6 +20,7 @@


#include 

#include 

+#include 



#define NOR_FLASH_ERASE_RETRY  10



@@ -40,7 +41,6 @@
#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr)   ((BaseAddr) + ((OffsetAddr) 
<< 2))

#define CREATE_DUAL_CMD(Cmd)   ( ( Cmd << 16) | ( Cmd & 
LOW_16_BITS) )

#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd)MmioWrite32 
(CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))

-#define GET_NOR_BLOCK_ADDRESS(BaseAddr, Lba, LbaSize)  ( BaseAddr + 
(UINTN)((Lba) * LbaSize) )



// Status Register Bits

#define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7)

@@ -105,145 +105,4 @@
#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP  0x0060

#define P30_CMD_READ_CONFIGURATION_REGISTER0x0003



-typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;

-

-#pragma pack (1)

-typedef struct {

-  VENDOR_DEVICE_PATH  Vendor;

-  UINT8   Index;

-  EFI_DEVICE_PATH_PROTOCOLEnd;

-} NOR_FLASH_DEVICE_PATH;

-#pragma pack ()

-

-struct _NOR_FLASH_INSTANCE {

-  UINT32 Signature;

-  EFI_HANDLE Handle;

-

-  UINTN  DeviceBaseAddress;

-  UINTN  RegionBaseAddress;

-  UINTN  Size;

-  EFI_LBAStartLba;

-

-  EFI_BLOCK_IO_PROTOCOL  BlockIoProtocol;

-  EFI_BLOCK_IO_MEDIA Media;

-  EFI_DISK_IO_PROTOCOL   DiskIoProtocol;

-

-  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOLFvbProtocol;

-  VOID   *ShadowBuffer;

-

-  NOR_FLASH_DEVICE_PATH  DevicePath;

-};

-

-EFI_STATUS

-NorFlashReadCfiData (

-  IN  UINTN   DeviceBaseAddress,

-  IN  UINTN   CFI_Offset,

-  IN  UINT32  NumberOfBytes,

-  OUT UINT32  *Data

-  );

[SAMI] Where is this function implemented ?



-

-EFI_STATUS

-NorFlashWriteBuffer (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN UINTN   TargetAddress,

-  IN UINTN   BufferSizeInBytes,

-  IN UINT32  *Buffer

-  );

-

-//

-// NorFlash.c

-//

-EFI_STATUS

-NorFlashWriteSingleBlock (

-  INNOR_FLASH_INSTANCE  *Instance,

-  INEFI_LBA Lba,

-  INUINTN   Offset,

-  IN OUTUINTN   *NumBytes,

-  INUINT8   *Buffer

-  );

-

-EFI_STATUS

-NorFlashWriteBlocks (

-  IN  NOR_FLASH_INSTANCE  *Instance,

-  IN  EFI_LBA Lba,

-  IN  UINTN   BufferSizeInBytes,

-  IN  VOID*Buffer

-  );

-

-EFI_STATUS

-NorFlashReadBlocks (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN EFI_LBA Lba,

-  IN UINTN   BufferSizeInBytes,

-  OUT VOID   *Buffer

-  );

-

-EFI_STATUS

-NorFlashRead (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN EFI_LBA Lba,

-  IN UINTN   Offset,

-  IN UINTN   BufferSizeInBytes,

-  OUT VOID   *Buffer

-  );

-

-EFI_STATUS

-NorFlashWrite (

-  INNOR_FLASH_INSTANCE  *Instance,

-  INEFI_LBA Lba,

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 04/14] Platform/ARM/NorFlashDxe: Move flash specific functions to NorFlash.c

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

Refactoring done in this patch has two major parts:

1. Moving out NorFlashUnlockAndEraseSingleBlock and
NorFlashWriteFullBlock functions from NorFlashDxe.c and
NorFlashStandaloneMm.c to NorFlash.c files.

2. At the same time, we are adding NorFlashLock and NorFlashUnlock
functions which will take care of TPL related operations needed by
functions mentioned in point 1. These functions are implemented
in NorFlashDxe.c but are just dummy placeholder functions in
NorFlashStandaloneMm.c file.

Signed-off-by: sahil 
---
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.h |  26 +++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h   |  14 --
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 136 +-
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c  | 193 

  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 151 +++
  5 files changed, 225 insertions(+), 295 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index e0ebb1e2fd35..bd5c6a949cf0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -220,4 +220,30 @@ NorFlashWriteSingleWord (
IN UINT32  WriteData

);

  


+EFI_STATUS

+NorFlashWriteFullBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN EFI_LBA Lba,

+  IN UINT32  *DataBuffer,

+  IN UINT32  BlockSizeInWords

+  );

+

+EFI_STATUS

+NorFlashUnlockAndEraseSingleBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN UINTN   BlockAddress

+  );

+

+VOID

+EFIAPI

+NorFlashLock (

+  IN EFI_TPL  *OriginalTPL

+  );

+

+VOID

+EFIAPI

+NorFlashUnlock (

+  IN EFI_TPL OriginalTPL

+  );

+

  #endif /* __NOR_FLASH_H__ */

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index e329e0727617..c0a3b5861532 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -31,20 +31,6 @@
  //

  // NorFlashDxe.c

  //

-EFI_STATUS

-NorFlashWriteFullBlock (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN EFI_LBA Lba,

-  IN UINT32  *DataBuffer,

-  IN UINT32  BlockSizeInWords

-  );

-

-EFI_STATUS

-NorFlashUnlockAndEraseSingleBlock (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN UINTN   BlockAddress

-  );

-

  EFI_STATUS

  NorFlashCreateInstance (

IN UINTNNorFlashDeviceBase,

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 4e5a97c83c7b..15000a692b02 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -10,7 +10,6 @@
  #include 

  


  #include "NorFlash.h"

-#include "NorFlashCommon.h"

  


  //

  // Global variable declarations

@@ -817,3 +816,138 @@ NorFlashReset (
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);

return EFI_SUCCESS;

  }

+

+/**

+ * This function unlock and erase an entire NOR Flash block.

+**/

+EFI_STATUS

+NorFlashUnlockAndEraseSingleBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN UINTN   BlockAddress

+  )

+{

+  EFI_STATUS  Status;

+  UINTN   Index;

+  EFI_TPL OriginalTPL;

+

+  NorFlashLock ();

+

+  Index = 0;

+  // The block erase might fail a first time (SW bug ?). Retry it ...

+  do {

+// Unlock the block if we have to

+Status = NorFlashUnlockSingleBlockIfNecessary (Instance, BlockAddress);

+if (EFI_ERROR (Status)) {

+  break;

+}

+

+Status = NorFlashEraseSingleBlock (Instance, BlockAddress);

+Index++;

+  } while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));

+

+  if (Index == NOR_FLASH_ERASE_RETRY) {

+DEBUG ((DEBUG_ERROR, "EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error 
(try to erase %d times)\n", BlockAddress, Index));

+  }

+

+  NorFlashUnlock (OriginalTPL);

+

+  return Status;

+}

+

+EFI_STATUS

+NorFlashWriteFullBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN EFI_LBA Lba,

+  IN UINT32  *DataBuffer,

+  IN UINT32  BlockSizeInWords

+  )

+{

+  EFI_STATUS  Status;

+  UINTN   WordAddress;

+  UINT32  WordIndex;

+  UINTN   BufferIndex;

+  UINTN   BlockAddress;

+  UINTN   BuffersInBlock;

+  UINTN   RemainingWords;

+  EFI_TPL OriginalTPL;

+  UINTN   Cnt;

+

+  Status = EFI_SUCCESS;

+

+  // Get the physical address of the block

+  BlockAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress, Lba, 
BlockSizeInWords * 4);

+

+  // Start writing f

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 03/14] Platform/ARM/NorFlashDxe: Add NorFlashCommon.h header file

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

This patch splits NorFlash.h and adds NorFlashCommon.h which
will have all the flash independent functions and macros.
Whereas all the flash specific functions will be in NorFlash.h
header file.

Signed-off-by: sahil 
---
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 199 
--
  Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 221 

  Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   |   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c |   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c|   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c|   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   |   1 +
  9 files changed, 228 insertions(+), 199 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index cdf1f5c27f35..18e99bac 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -21,6 +21,7 @@
NorFlash.h

NorFlashBlockIoDxe.c

NorFlashDxe.c

+  NorFlashCommon.h

NorFlashFvb.c

  


  [Packages]

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index 001f281220f2..69c40ccf9c27 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -22,6 +22,7 @@
NorFlash.c

NorFlash.h

NorFlashFvb.c

+  NorFlashCommon.h

NorFlashStandaloneMm.c

  


  [Packages]

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index d4d97bd22cc5..e0ebb1e2fd35 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,9 +20,6 @@
  


  #include 

  #include 

-#include 

-#include 

-#include 

  


  #define NOR_FLASH_ERASE_RETRY  10

  


@@ -108,11 +105,6 @@
  #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP  0x0060

  #define P30_CMD_READ_CONFIGURATION_REGISTER0x0003

  


-#define NOR_FLASH_SIGNATURE  SIGNATURE_32('n', 'o', 'r', '0')

-#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, 
NOR_FLASH_SIGNATURE)

-#define INSTANCE_FROM_BLKIO_THIS(a)   CR(a, NOR_FLASH_INSTANCE, 
BlockIoProtocol, NOR_FLASH_SIGNATURE)

-#define INSTANCE_FROM_DISKIO_THIS(a)  CR(a, NOR_FLASH_INSTANCE, 
DiskIoProtocol, NOR_FLASH_SIGNATURE)

-

  typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;

  


  #pragma pack (1)

@@ -158,197 +150,6 @@ NorFlashWriteBuffer (
IN UINT32  *Buffer

);

  


-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoReset (

-  IN EFI_BLOCK_IO_PROTOCOL  *This,

-  IN BOOLEANExtendedVerification

-  );

-

-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoReadBlocks (

-  IN  EFI_BLOCK_IO_PROTOCOL  *This,

-  IN  UINT32 MediaId,

-  IN  EFI_LBALba,

-  IN  UINTN  BufferSizeInBytes,

-  OUT VOID   *Buffer

-  );

-

-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoWriteBlocks (

-  IN  EFI_BLOCK_IO_PROTOCOL  *This,

-  IN  UINT32 MediaId,

-  IN  EFI_LBALba,

-  IN  UINTN  BufferSizeInBytes,

-  IN  VOID   *Buffer

-  );

-

-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoFlushBlocks (

-  IN EFI_BLOCK_IO_PROTOCOL  *This

-  );

-

-//

-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk

-//

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoReadDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64Offset,

-  IN UINTN BufferSize,

-  OUT VOID *Buffer

-  );

-

-//

-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk

-//

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoWriteDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64Offset,

-  IN UINTN BufferSize,

-  IN VOID  *Buffer

-  );

-

-//

-// NorFlashFvbDxe.c

-//

-

-EFI_STATUS

-EFIAPI

-FvbGetAttributes (

-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL  *This,

-  OUT   EFI_FVB_ATTRIBUTES_2 *Attributes

-  );

-

-EFI_STATUS

-EFIAPI

-FvbSetAttributes (

-  IN CONST

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 02/14] Platform/ARM/NorFlashDxe: Move NorFlashVirtualNotifyEvent

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

Moving this function from NorFlash.c to NorFlashDxe.c as it is not
dependent on any particular flash implementation.

Signed-off-by: sahil 
---
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.h| 14 +++
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.c| 44 
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 44 
  3 files changed, 51 insertions(+), 51 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index c83032e87d9c..d4d97bd22cc5 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -342,6 +342,13 @@ NorFlashFvbInitialize (
IN NOR_FLASH_INSTANCE  *Instance

);

  


+VOID

+EFIAPI

+NorFlashVirtualNotifyEvent (

+  IN EFI_EVENT  Event,

+  IN VOID   *Context

+  );

+

  //

  // NorFlash.c

  //

@@ -412,11 +419,4 @@ NorFlashWriteSingleWord (
IN UINT32  WriteData

);

  


-VOID

-EFIAPI

-NorFlashVirtualNotifyEvent (

-  IN EFI_EVENT  Event,

-  IN VOID   *Context

-  );

-

  #endif /* __NOR_FLASH_H__ */

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 60854ef2a7d0..55f6abd0eef3 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -816,47 +816,3 @@ NorFlashReset (
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);

return EFI_SUCCESS;

  }

-

-/**

-  Fixup internal data so that EFI can be call in virtual mode.

-  Call the passed in Child Notify event and convert any pointers in

-  lib to virtual mode.

-

-  @param[in]Event   The Event that is being processed

-  @param[in]Context Event Context

-**/

-VOID

-EFIAPI

-NorFlashVirtualNotifyEvent (

-  IN EFI_EVENT  Event,

-  IN VOID   *Context

-  )

-{

-  UINTN  Index;

-

-  for (Index = 0; Index < mNorFlashDeviceCount; Index++) {

-EfiConvertPointer (0x0, (VOID 
**)[Index]->DeviceBaseAddress);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->RegionBaseAddress);

-

-// Convert BlockIo protocol

-EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.FlushBlocks);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.ReadBlocks);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.Reset);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.WriteBlocks);

-

-// Convert Fvb

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.EraseBlocks);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.GetAttributes);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.GetBlockSize);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.GetPhysicalAddress);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.Read);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.SetAttributes);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.Write);

-

-if (mNorFlashInstances[Index]->ShadowBuffer != NULL) {

-  EfiConvertPointer (0x0, (VOID 
**)[Index]->ShadowBuffer);

-}

-  }

-

-  return;

-}

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index f7b92de21a57..963af7dcf435 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -504,3 +504,47 @@ NorFlashFvbInitialize (
  


return Status;

  }

+

+/**

+  Fixup internal data so that EFI can be call in virtual mode.

+  Call the passed in Child Notify event and convert any pointers in

+  lib to virtual mode.

+

+  @param[in]Event   The Event that is being processed

+  @param[in]Context Event Context

+**/

+VOID

+EFIAPI

+NorFlashVirtualNotifyEvent (

+  IN EFI_EVENT  Event,

+  IN VOID   *Context

+  )

+{

+  UINTN  Index;

+

+  for (Index = 0; Index < mNorFlashDeviceCount; Index++) {

+EfiConvertPointer (0x0, (VOID 
**)[Index]->DeviceBaseAddress);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->RegionBaseAddress);

+

+// Convert BlockIo protocol

+EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.FlushBlocks);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.ReadBlocks);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.Reset);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.WriteBlocks);

+

+// Convert Fvb

+EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.EraseBlocks);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.GetAttributes);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.GetBlockSize)

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 01/14] Platform/ARM/NorFlashDxe: Move DiskIo related functions out of NorFlash.c

2024-05-16 Thread Sami Mujawar

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

Moving these functions from NorFlash.c to NorFlashBlockIoDxe.c as
they are not dependent on any particular flash implementation.

Signed-off-by: sahil 
---
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   | 129 

  Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 129 

  2 files changed, 129 insertions(+), 129 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 1b431073ee93..60854ef2a7d0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -807,135 +807,6 @@ NorFlashWriteSingleBlock (
return EFI_SUCCESS;

  }

  


-/*

-  Although DiskIoDxe will automatically install the DiskIO protocol whenever

-  we install the BlockIO protocol, its implementation is sub-optimal as it 
reads

-  and writes entire blocks using the BlockIO protocol. In fact we can access

-  NOR flash with a finer granularity than that, so we can improve performance

-  by directly producing the DiskIO protocol.

-*/

-

-/**

-  Read BufferSize bytes from Offset into Buffer.

-

-  @param  This  Protocol instance pointer.

-  @param  MediaId   Id of the media, changes every time the media 
is replaced.

-  @param  OffsetThe starting byte offset to read from

-  @param  BufferSizeSize of Buffer

-  @param  BufferBuffer containing read data

-

-  @retval EFI_SUCCESS   The data was read correctly from the device.

-  @retval EFI_DEVICE_ERROR  The device reported an error while performing 
the read.

-  @retval EFI_NO_MEDIA  There is no media in the device.

-  @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.

-  @retval EFI_INVALID_PARAMETER The read request contains device addresses 
that are not

-valid for the device.

-

-**/

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoReadDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64DiskOffset,

-  IN UINTN BufferSize,

-  OUT VOID *Buffer

-  )

-{

-  NOR_FLASH_INSTANCE  *Instance;

-  UINT32  BlockSize;

-  UINT32  BlockOffset;

-  EFI_LBA Lba;

-

-  Instance = INSTANCE_FROM_DISKIO_THIS (This);

-

-  if (MediaId != Instance->Media.MediaId) {

-return EFI_MEDIA_CHANGED;

-  }

-

-  BlockSize = Instance->Media.BlockSize;

-  Lba   = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, 
);

-

-  return NorFlashRead (Instance, Lba, BlockOffset, BufferSize, Buffer);

-}

-

-/**

-  Writes a specified number of bytes to a device.

-

-  @param  This   Indicates a pointer to the calling context.

-  @param  MediaIdID of the medium to be written.

-  @param  Offset The starting byte offset on the logical block I/O device 
to write.

-  @param  BufferSize The size in bytes of Buffer. The number of bytes to write 
to the device.

-  @param  Buffer A pointer to the buffer containing the data to be written.

-

-  @retval EFI_SUCCESS   The data was written correctly to the device.

-  @retval EFI_WRITE_PROTECTED   The device can not be written to.

-  @retval EFI_DEVICE_ERROR  The device reported an error while performing 
the write.

-  @retval EFI_NO_MEDIA  There is no media in the device.

-  @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.

-  @retval EFI_INVALID_PARAMETER The write request contains device addresses 
that are not

- valid for the device.

-

-**/

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoWriteDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64DiskOffset,

-  IN UINTN BufferSize,

-  IN VOID  *Buffer

-  )

-{

-  NOR_FLASH_INSTANCE  *Instance;

-  UINT32  BlockSize;

-  UINT32  BlockOffset;

-  EFI_LBA Lba;

-  UINTN   RemainingBytes;

-  UINTN   WriteSize;

-  EFI_STATUS  Status;

-

-  Instance = INSTANCE_FROM_DISKIO_THIS (This);

-

-  if (MediaId != Instance->Media.MediaId) {

-return EFI_MEDIA_CHANGED;

-  }

-

-  BlockSize = Instance->Media.BlockSize;

-  Lba   = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, 
);

-

-  RemainingBytes = BufferSize;

-

-  // Write either all the remaining bytes, or the number of bytes that bring

-  // us up to a block boundary, whichever is less.

-  // (DiskOffset | (BlockSize - 1)) + 1) rounds DiskOffset up to the next

-  // block boundary (even if it is already on one).

-  WriteSize = MIN (RemainingBytes, ((DiskOffset | (B

Re: 回复: [edk2-devel] [edk2-stable202405 RESEND PATCH v2 1/1] DynamicTablesPkg: Adds integer to the AML package node

2024-05-09 Thread Sami Mujawar
Hi Liming,

If the decision is to merge this patch, I have created a pull request at 
https://github.com/tianocore/edk2/pull/5647

Regards,

Sami Mujawar

From:  on behalf of "Sami Mujawar via groups.io" 

Reply to: "devel@edk2.groups.io" , Sami Mujawar 

Date: Thursday 9 May 2024 at 11:18
To: "devel@edk2.groups.io" , "gaolim...@byosoft.com.cn" 
, "'Attar, AbdulLateef (Abdul Lateef)'" 

Cc: Pierre Gondois , 'Leif Lindholm' 
, 'Andrew Fish' , 'Michael Kinney' 

Subject: Re: 回复: [edk2-devel] [edk2-stable202405 RESEND PATCH v2 1/1] 
DynamicTablesPkg: Adds integer to the AML package node
Resent from: 
Resent date: Thursday 9 May 2024 at 11:18

Hi Liming,

> What’s your comments for this patch?
The patch was reviewed by Pierre at 
https://edk2.groups.io/g/devel/message/118589 before the feature freeze email 
was sent out.
Pierre had some minor recommendations that Abdul has addressed in the V2 patch. 
Ideally Pierre’s the r-b tag could have been carried forward.

> Is this a required bug fix or new feature?
This is adding a new feature by introducing a new API, and I think it should 
not impact the existing functionality as such.
So, by merging this patch the risk of breaking existing functionality seems to 
be low.

This patch looks good to me.
Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar



From:  on behalf of "gaoliming via groups.io" 

Reply to: "devel@edk2.groups.io" , 
"gaolim...@byosoft.com.cn" 
Date: Thursday 9 May 2024 at 10:01
To: "'Attar, AbdulLateef (Abdul Lateef)'" , 
"devel@edk2.groups.io" 
Cc: Pierre Gondois , Sami Mujawar 
, 'Leif Lindholm' , 'Andrew 
Fish' , 'Michael Kinney' 
Subject: 回复: [edk2-devel] [edk2-stable202405 RESEND PATCH v2 1/1] 
DynamicTablesPkg: Adds integer to the AML package node
Resent from: 
Resent date: Thursday 9 May 2024 at 10:00

Sami and Pierre:
  What’s your comments for this patch? Is this a required bug fix or new 
feature?

Thanks
Liming
发件人: Attar, AbdulLateef (Abdul Lateef) 
发送时间: 2024年5月9日 16:39
收件人: gaoliming ; devel@edk2.groups.io
抄送: 'Pierre Gondois' ; 'Sami Mujawar' 

主题: Re: [edk2-devel] [edk2-stable202405 RESEND PATCH v2 1/1] DynamicTablesPkg: 
Adds integer to the AML package node


[AMD Official Use Only - General]

Hi Liming,
This patch provides an API to add integer value to AML package node.
Using this API user can create CXL device with two PNPID.
Without this API user has to rely on static ASL files.

This patch is required for platform who uses DynamicTablesPkg to generate ACPI 
tables based on this stable release.

Thanks
AbduL

From: gaoliming mailto:gaolim...@byosoft.com.cn>>
Sent: Thursday, May 9, 2024 1:10 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>>; Attar, AbdulLateef (Abdul 
Lateef) mailto:abdullateef.at...@amd.com>>
Cc: 'Pierre Gondois' mailto:pierre.gond...@arm.com>>; 
'Sami Mujawar' mailto:sami.muja...@arm.com>>
Subject: 回复: [edk2-devel] [edk2-stable202405 RESEND PATCH v2 1/1] 
DynamicTablesPkg: Adds integer to the AML package node

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.


Abdul:
  Can you give more information why this change is required for this stable
tag 202405?

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
> mailto:devel@edk2.groups.io>> 代表 Abdul Lateef
> Attar via groups.io
> 发送时间: 2024年5月9日 12:49
> 收件人: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
> 抄送: Abdul Lateef Attar 
> mailto:abdullateef.at...@amd.com>>; Pierre Gondois
> mailto:pierre.gond...@arm.com>>; Sami Mujawar 
> mailto:sami.muja...@arm.com>>
> 主题: [edk2-devel] [edk2-stable202405 RESEND PATCH v2 1/1]
> DynamicTablesPkg: Adds integer to the AML package node
>
> Adds an AmlAddIntegerToNamedPackage() API to generate AML code,
> which adds an integer value to the package node.
>
> Cc: Pierre Gondois mailto:pierre.gond...@arm.com>>
> Cc: Sami Mujawar mailto:sami.muja...@arm.com>>
> Signed-off-by: Abdul Lateef Attar 
> mailto:abdullateef.at...@amd.com>>
> ---
>  .../Include/Library/AmlLib/AmlLib.h   | 41 +++-
>  .../Common/AmlLib/CodeGen/AmlCodeGen.c| 67
> +++
>  2 files changed, 107 insertions(+), 1 deletion(-)
>
> diff --git a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
> b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
> index 82d5464084..4427ab68fa 100644
> --- a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
> +++ b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
> @@ -2,7 +2,7 @@
>AML Lib.
>
>Copyright (c) 2019 - 2023, Arm Limited. All rights reserved.
> -  Copyright (C) 2023 Advanced 

Re: 回复: [edk2-devel] [edk2-stable202405 RESEND PATCH v2 1/1] DynamicTablesPkg: Adds integer to the AML package node

2024-05-09 Thread Sami Mujawar
Hi Liming,

> What’s your comments for this patch?
The patch was reviewed by Pierre at 
https://edk2.groups.io/g/devel/message/118589 before the feature freeze email 
was sent out.
Pierre had some minor recommendations that Abdul has addressed in the V2 patch. 
Ideally Pierre’s the r-b tag could have been carried forward.

> Is this a required bug fix or new feature?
This is adding a new feature by introducing a new API, and I think it should 
not impact the existing functionality as such.
So, by merging this patch the risk of breaking existing functionality seems to 
be low.

This patch looks good to me.
Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


From:  on behalf of "gaoliming via groups.io" 

Reply to: "devel@edk2.groups.io" , 
"gaolim...@byosoft.com.cn" 
Date: Thursday 9 May 2024 at 10:01
To: "'Attar, AbdulLateef (Abdul Lateef)'" , 
"devel@edk2.groups.io" 
Cc: Pierre Gondois , Sami Mujawar 
, 'Leif Lindholm' , 'Andrew 
Fish' , 'Michael Kinney' 
Subject: 回复: [edk2-devel] [edk2-stable202405 RESEND PATCH v2 1/1] 
DynamicTablesPkg: Adds integer to the AML package node
Resent from: 
Resent date: Thursday 9 May 2024 at 10:00

Sami and Pierre:
  What’s your comments for this patch? Is this a required bug fix or new 
feature?

Thanks
Liming
发件人: Attar, AbdulLateef (Abdul Lateef) 
发送时间: 2024年5月9日 16:39
收件人: gaoliming ; devel@edk2.groups.io
抄送: 'Pierre Gondois' ; 'Sami Mujawar' 

主题: Re: [edk2-devel] [edk2-stable202405 RESEND PATCH v2 1/1] DynamicTablesPkg: 
Adds integer to the AML package node


[AMD Official Use Only - General]

Hi Liming,
This patch provides an API to add integer value to AML package node.
Using this API user can create CXL device with two PNPID.
Without this API user has to rely on static ASL files.

This patch is required for platform who uses DynamicTablesPkg to generate ACPI 
tables based on this stable release.

Thanks
AbduL

From: gaoliming mailto:gaolim...@byosoft.com.cn>>
Sent: Thursday, May 9, 2024 1:10 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>>; Attar, AbdulLateef (Abdul 
Lateef) mailto:abdullateef.at...@amd.com>>
Cc: 'Pierre Gondois' mailto:pierre.gond...@arm.com>>; 
'Sami Mujawar' mailto:sami.muja...@arm.com>>
Subject: 回复: [edk2-devel] [edk2-stable202405 RESEND PATCH v2 1/1] 
DynamicTablesPkg: Adds integer to the AML package node

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.


Abdul:
  Can you give more information why this change is required for this stable
tag 202405?

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
> mailto:devel@edk2.groups.io>> 代表 Abdul Lateef
> Attar via groups.io
> 发送时间: 2024年5月9日 12:49
> 收件人: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
> 抄送: Abdul Lateef Attar 
> mailto:abdullateef.at...@amd.com>>; Pierre Gondois
> mailto:pierre.gond...@arm.com>>; Sami Mujawar 
> mailto:sami.muja...@arm.com>>
> 主题: [edk2-devel] [edk2-stable202405 RESEND PATCH v2 1/1]
> DynamicTablesPkg: Adds integer to the AML package node
>
> Adds an AmlAddIntegerToNamedPackage() API to generate AML code,
> which adds an integer value to the package node.
>
> Cc: Pierre Gondois mailto:pierre.gond...@arm.com>>
> Cc: Sami Mujawar mailto:sami.muja...@arm.com>>
> Signed-off-by: Abdul Lateef Attar 
> mailto:abdullateef.at...@amd.com>>
> ---
>  .../Include/Library/AmlLib/AmlLib.h   | 41 +++-
>  .../Common/AmlLib/CodeGen/AmlCodeGen.c| 67
> +++
>  2 files changed, 107 insertions(+), 1 deletion(-)
>
> diff --git a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
> b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
> index 82d5464084..4427ab68fa 100644
> --- a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
> +++ b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
> @@ -2,7 +2,7 @@
>AML Lib.
>
>Copyright (c) 2019 - 2023, Arm Limited. All rights reserved.
> -  Copyright (C) 2023 Advanced Micro Devices, Inc. All rights
reserved.
> +  Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc. All rights
> reserved.
>
>SPDX-License-Identifier: BSD-2-Clause-Patent
>  **/
> @@ -1743,6 +1743,45 @@ AmlAddNameStringToNamedPackage (
>IN AML_OBJECT_NODE_HANDLE  NamedNode
>);
>
> +/** Add an integer value to the named package node.
> +
> +  AmlCodeGenNamePackage ("_CID", NULL, );
> +  AmlGetEisaIdFromString ("PNP0A03", );
> +  AmlAddIntegerToNamedPackage (EisaId, NameNode);
> +  AmlGetEisaIdFromString ("PNP0A08", );
> +  AmlAddIntegerToNamedPackage (EisaId, NameNode);
> +
> +  equivalent of the fo

Re: [edk2-devel] [RESEND PATCH v4 0/5] DynamicTablesPkg: Adds FADT, HPET, WSMT and MADT Table generators

2024-05-03 Thread Sami Mujawar
Hi All,

Please find my response inline marked [SAMI].

Regards,

Sami Mujawar

On 02/05/2024, 17:36, "Pierre Gondois" mailto:pierre.gond...@arm.com>> wrote:


Hello Abdul,
I added some comments.
I think that:
a. patches related to HPET/WSMT should require little work
b. MADT patch needs to redefine the CmObjects it uses,
but it seems ok otherwise (just need to have the right properties
in the right objects),
c. FADT patch is re-defining CmObjects that are already existing
in ArmNameSpaceObjects.h. So there is going to be a clash with
ongoing DynamicTables objects reorganization...


I think that a. could be sent separately and should quickly go in,
b. might require a bit more checking/reviewing, and c. might need
to wait for the re-org to be finished, unless Sami thinks it's ok
to take the patch,
[SAMI] For c., I think we should not wait for the reorg to be completed. The 
FADT patch can go it the mainline if it passes the review.
The additional work would be to reorg this patch on the staging branch when 
rebasing with the edk2 mainline code. However, this can be addressed just 
before we merge the first set of reorg changes into mainline.
[/SAMI]


Regards,
Pierre




On 4/29/24 08:03, Abdul Lateef Attar wrote:
> PR: https://github.com/tianocore/edk2/pull/5500/ 
> <https://github.com/tianocore/edk2/pull/5500/>
> V4: delta changes
> Added X64 arch specific MADT table generator.
> V3: delta changes
> Restructure the code as the review comments.
> Added sanity check for WSMT flags.
> Added CM object for HPET base address.
> V2: delta changes
> Addressed review comments
> Adds ACPI HPET table to add HPET to ACPI namespace
> V1:
> Adds new space for ArchNameSpaceObjects.
> Adds generic FADT table generator.
> Adds generic HPET table generator.
> Adds generic WSMT table generator.
>
> Cc: Sami Mujawar mailto:sami.muja...@arm.com>>
> Cc: Pierre Gondois mailto:pierre.gond...@arm.com>>
> Cc: Abdul Lateef Attar  <mailto:abdullateef.at...@amd.com>>
>
> Abdul Lateef Attar (5):
> DynamicTablesPkg: Adds ACPI FADT Table generator
> DynamicTablesPkg: Adds ACPI HPET Table generator
> DynamicTablesPkg: Adds ACPI WSMT Table generator
> DynamicTablesPkg: Adds ACPI SSDT HPET Table generator
> DynamicTablesPkg: Adds X64 arch MADT Table generator
>
> DynamicTablesPkg/DynamicTables.dsc.inc | 22 +-
> DynamicTablesPkg/DynamicTablesPkg.ci.yaml | 4 +-
> DynamicTablesPkg/Include/AcpiTableGenerator.h | 4 +
> .../Include/ArchNameSpaceObjects.h | 237 ++
> .../Include/ConfigurationManagerObject.h | 7 +
> .../Include/X64NameSpaceObjects.h | 48 ++
> .../Library/Acpi/AcpiFadtLib/AcpiFadtLib.inf | 36 +
> .../Library/Acpi/AcpiFadtLib/Arm/FadtUpdate.c | 39 +
> .../Library/Acpi/AcpiFadtLib/FadtGenerator.c | 745 ++
> .../Library/Acpi/AcpiFadtLib/FadtUpdate.h | 26 +
> .../Library/Acpi/AcpiFadtLib/X64/FadtUpdate.c | 32 +
> .../Library/Acpi/AcpiHpetLib/AcpiHpetLib.inf | 31 +
> .../Library/Acpi/AcpiHpetLib/HpetGenerator.c | 246 ++
> .../Acpi/AcpiSsdtHpetLib/AcpiSsdtHpetLib.inf | 32 +
> .../Acpi/AcpiSsdtHpetLib/SsdtHpetGenerator.c | 295 +++
> .../Library/Acpi/AcpiWsmtLib/AcpiWsmtLib.inf | 30 +
> .../Library/Acpi/AcpiWsmtLib/WsmtGenerator.c | 243 ++
> .../X64/AcpiMadtLibX64/AcpiMadtLibX64.inf | 27 +
> .../Acpi/X64/AcpiMadtLibX64/MadtGenerator.c | 375 +
> 19 files changed, 2477 insertions(+), 2 deletions(-)
> create mode 100644 DynamicTablesPkg/Include/ArchNameSpaceObjects.h
> create mode 100644 DynamicTablesPkg/Include/X64NameSpaceObjects.h
> create mode 100644 DynamicTablesPkg/Library/Acpi/AcpiFadtLib/AcpiFadtLib.inf
> create mode 100644 DynamicTablesPkg/Library/Acpi/AcpiFadtLib/Arm/FadtUpdate.c
> create mode 100644 DynamicTablesPkg/Library/Acpi/AcpiFadtLib/FadtGenerator.c
> create mode 100644 DynamicTablesPkg/Library/Acpi/AcpiFadtLib/FadtUpdate.h
> create mode 100644 DynamicTablesPkg/Library/Acpi/AcpiFadtLib/X64/FadtUpdate.c
> create mode 100644 DynamicTablesPkg/Library/Acpi/AcpiHpetLib/AcpiHpetLib.inf
> create mode 100644 DynamicTablesPkg/Library/Acpi/AcpiHpetLib/HpetGenerator.c
> create mode 100644 
> DynamicTablesPkg/Library/Acpi/AcpiSsdtHpetLib/AcpiSsdtHpetLib.inf
> create mode 100644 
> DynamicTablesPkg/Library/Acpi/AcpiSsdtHpetLib/SsdtHpetGenerator.c
> create mode 100644 DynamicTablesPkg/Library/Acpi/AcpiWsmtLib/AcpiWsmtLib.inf
> create mode 100644 DynamicTablesPkg/Library/Acpi/AcpiWsmtLib/WsmtGenerator.c
> create mode 100644 
> DynamicTablesPkg/Library/Acpi/X64/AcpiMadtLibX64/AcpiMadtLibX64.inf
> create mode 100644 
> DynamicTablesPkg/Library/Acpi/X64/AcpiMadtLibX64/MadtGenerator.c
>



IMPORTANT NOTICE: The contents of this email and any attachments are 
confidential and may also be privileged. If you are not the intended recipient, 
please notify the sen

Re: [edk2-devel] [PATCH v1 1/1] StandaloneMmPkg/StandaloneMmHobLib: Remove HOB creation

2024-05-02 Thread Sami Mujawar
Hi Oliver,

We are working on a solution to remove the HOB creation logic from StandaloneMm 
for Arm, and this involves implementing the Firmware handoff specification 
(https://github.com/FirmwareHandoff/firmware_handoff/releases/download/v0.9/firmware_handoff.pdf).

As you rightly mentioned this also requires changes in TF-A, and this work is 
in progress.

Levi (Yeo) is currently working on this feature and will post the patches to 
the mailing list once we have the necessary components ready.

Regards,

Sami Mujawar

On 01/05/2024, 22:32, "Oliver Smith-Denny" mailto:o...@linux.microsoft.com>> wrote:


Hi folks, returning to this thread because I noticed that HOB
creation still exists in StandaloneMmCore for ARM:


https://github.com/tianocore/edk2/blob/5d4c5253e8bbc0baa8837fcd868925212df85201/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/CreateHobList.c
 
<https://github.com/tianocore/edk2/blob/5d4c5253e8bbc0baa8837fcd868925212df85201/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/CreateHobList.c>


As far as I can tell, there is only this one file that creates 6
HOBs from StandaloneMmCore. Per our earlier discussion that led to
disabling HOB creation in StandaloneMm, I think that this falls into
the case where StandaloneMm is a HOB consumer phase, not a producer
phase and so it should not be creating these HOBs. On the x64 side,
all of the StandaloneMm HOB creation functions ASSERT with the
comment that StandaloneMm is a HOB consumer phase and should not
be creating HOBs.


On ARM this is more complicated, as all of this information would
seem to originate from TF-A and so we would need TF-A to produce
these HOBs to tell StandaloneMm the information it needs to
operate. Today TF-A already has to communicate this information, the
HOBs are just created in StandaloneMmCore instead of in TF-A.


Curious to get other folks thoughts here on this paradigm.


Thanks,
Oliver


On 12/5/2023 5:47 AM, Nhi Pham wrote:
> According to the discussion in "StandaloneMmPkg: Fix HOB space and
> heap space conflicted issue" [1], Standalone MM modules should be HOB
> consumers where HOB is read-only. Therefore, this patch removes the
> supported functions for HOB creation in the StandaloneMmHobLib.
>
> [1] https://edk2.groups.io/g/devel/message/108333 
> <https://edk2.groups.io/g/devel/message/108333>
>
> Cc: Ard Biesheuvel  <mailto:ardb+tianoc...@kernel.org>>
> Cc: Ray Ni mailto:ray...@intel.com>>
> Cc: Sami Mujawar mailto:sami.muja...@arm.com>>
> Cc: Oliver Smith-Denny  <mailto:o...@linux.microsoft.com>>
> Signed-off-by: Nhi Pham mailto:nhipham...@gmail.com>>
> ---
> StandaloneMmPkg/Library/StandaloneMmHobLib/StandaloneMmHobLib.c | 171 
> ++--
> 1 file changed, 51 insertions(+), 120 deletions(-)
>
> diff --git a/StandaloneMmPkg/Library/StandaloneMmHobLib/StandaloneMmHobLib.c 
> b/StandaloneMmPkg/Library/StandaloneMmHobLib/StandaloneMmHobLib.c
> index ee61bdd227d0..bef66d167494 100644
> --- a/StandaloneMmPkg/Library/StandaloneMmHobLib/StandaloneMmHobLib.c
> +++ b/StandaloneMmPkg/Library/StandaloneMmHobLib/StandaloneMmHobLib.c
> @@ -1,5 +1,5 @@
> /** @file
>
> - HOB Library implementation for Standalone MM Core.
>
> + HOB Library implementation for Standalone MM modules.
>
>
>
> Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
>
> Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
>
> @@ -250,48 +250,13 @@ GetBootModeHob (
> return HandOffHob->BootMode;
>
> }
>
>
>
> -VOID *
>
> -CreateHob (
>
> - IN UINT16 HobType,
>
> - IN UINT16 HobLength
>
> - )
>
> -{
>
> - EFI_HOB_HANDOFF_INFO_TABLE *HandOffHob;
>
> - EFI_HOB_GENERIC_HEADER *HobEnd;
>
> - EFI_PHYSICAL_ADDRESS FreeMemory;
>
> - VOID *Hob;
>
> -
>
> - HandOffHob = GetHobList ();
>
> -
>
> - HobLength = (UINT16)((HobLength + 0x7) & (~0x7));
>
> -
>
> - FreeMemory = HandOffHob->EfiFreeMemoryTop - HandOffHob->EfiFreeMemoryBottom;
>
> -
>
> - if (FreeMemory < HobLength) {
>
> - return NULL;
>
> - }
>
> -
>
> - Hob = (VOID *)(UINTN)HandOffHob->EfiEndOfHobList;
>
> - ((EFI_HOB_GENERIC_HEADER *)Hob)->HobType = HobType;
>
> - ((EFI_HOB_GENERIC_HEADER *)Hob)->HobLength = HobLength;
>
> - ((EFI_HOB_GENERIC_HEADER *)Hob)->Reserved = 0;
>
> -
>
> - HobEnd = (EFI_HOB_GENERIC_HEADER *)((UINTN)Hob + HobLength);
>
> - HandOffHob->EfiEndOfHobList = (EFI_PHYSICAL_ADDRESS)(UINTN)HobEnd;
>
> -
>
> - HobEnd->HobType = EFI_HOB_TYPE_END_OF_HOB_LIST;
>
> - HobEnd->HobLength = sizeof (EFI_HOB_GENERIC_HEADER);
>
> - HobEnd->Reserved = 0;
>
> - HobEnd++;
>
> - HandOffHob->EfiFreeMemoryBot

Re: [edk2-devel] [PATCH 1/1] BaseTool/Ecc: Fix incorrect parsing of variable initialisation

2024-04-15 Thread Sami Mujawar
Dear Maintainers,

This patch fixes an ECC tool issue that is preventing the Arm CCA patch series 
from passing the edk2-CI tests, see 
https://dev.azure.com/tianocore/edk2-ci/_build/results?buildId=122726=logs=ec42d809-3c3b-54a9-276c-e54a8b9aaee9=bd91c6c3-6d75-5ede-7b63-5767cf827334=74

Regards,

Sami Mujawar

On 16/04/2024, 00:30, "devel@edk2.groups.io <mailto:devel@edk2.groups.io> on 
behalf of levi.yun via groups.io" mailto:devel@edk2.groups.io> on behalf of yeoreum.yun=arm@groups.io 
<mailto:arm@groups.io>> wrote:


If a global variable is initialised using a macro with multiple
arguments, ECC incorrectly parses the statement and reports the
macro arguments as variable declarations.


Example: In the following statement:
STATIC INT WrongVariable = MACRO_VERSION(1, 0), NextVariable;
The logic in the ECC function GetIdentifierList() interprets the
above statement as declaration of three variables:
1. 'WrongVariable = MACRO_VERSION(1,'
2. '0)'
3. 'NextVariable'
Following which NamingConventionCheckVariableName() reports an
error for "0)" stating an incorrect variable declaration as
below:
"ERROR - *The variable name [0)] does not follow the rules"


This patch fixes the parsing logic so that scenarios with macro
initialisations are handled correctly.


Cc: Rebecca Cran mailto:rebe...@bsdio.com>>
Cc: Liming Gao mailto:gaolim...@byosoft.com.cn>>
Cc: Bob Feng mailto:bob.c.f...@intel.com>>
Cc: Yuwei Chen mailto:yuwei.c...@intel.com>>
Cc: Sami Mujawar mailto:sami.muja...@arm.com>>
Cc: Pierre Gondois mailto:pierre.gond...@arm.com>>
Signed-off-by: levi.yun mailto:yeoreum@arm.com>>
---


The changes can be seen at 
https://github.com/LeviYeoReum/edk2/tree/levi/3057_fix_false_on_ecc_v2 
<https://github.com/LeviYeoReum/edk2/tree/levi/3057_fix_false_on_ecc_v2>


BaseTools/Source/Python/Ecc/c.py | 23 ++--
1 file changed, 21 insertions(+), 2 deletions(-)


diff --git a/BaseTools/Source/Python/Ecc/c.py b/BaseTools/Source/Python/Ecc/c.py
index 
61ad084fcc5b85b5a2194afd8bb1a4b4b65fdaee..71dc0fcf884ee3d45a527f20844b697958df366c
 100644
--- a/BaseTools/Source/Python/Ecc/c.py
+++ b/BaseTools/Source/Python/Ecc/c.py
@@ -182,8 +182,27 @@ def GetIdentifierList():
continue


if var.Declarator.find('{') == -1:
- for decl in var.Declarator.split(','):
- DeclList = decl.split('=')
+ DeclText = var.Declarator
+ while (len(DeclText) > 0):
+ AllocatorPos = DeclText.find('=')
+ SplitPos = DeclText.find(',')
+
+ if (SplitPos == -1):
+ SplitPos = len(DeclText)
+ elif (SplitPos > AllocatorPos):
+ NextAllcatorPos = DeclText.find('=', AllocatorPos + 1)
+ if (NextAllcatorPos == -1):
+ NextAllcatorPos = len(DeclText)
+ ParPos = DeclText.rfind(')', SplitPos, NextAllcatorPos)
+ if (ParPos != -1):
+ SplitPos = DeclText.find(',', ParPos)
+ if (SplitPos == -1):
+ SplitPos = ParPos + 1
+
+ SubDeclText = DeclText[:SplitPos]
+ DeclText = DeclText[SplitPos + 1:]
+
+ DeclList = SubDeclText.split('=')
Name = DeclList[0].strip()
if ArrayPattern.match(Name):
LSBPos = var.Declarator.find('[')
--
Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")






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Re: [edk2-devel] [PATCH v1 1/1] ArmVirtPkg: Kvmtool: Fix ACPI/DT boot selection

2024-04-13 Thread Sami Mujawar
Hi Ard,

Thank you for your feedback.

Please see my response inline marked [SAMI].

Regards,

Sami Mujawar

On 27/03/2024, 14:00, "Ard Biesheuvel" mailto:a...@kernel.org>> wrote:


Hello Sami,


On Tue, 26 Mar 2024 at 19:07, Sami Mujawar mailto:sami.muja...@arm.com>> wrote:
>
> The Kvmtool guest firmware uses the dynamic HII
> PCD PcdForceNoAcpi to determine if ACPI tables
> or the DT must be used for booting an OS.
>
> This PcdForceNoAcpi is a BOOLEAN value that can
> be configured using the variable "ForceNoAcpi"
> specifing the gOvmfVariableGuid GUID which is
> "50BEA1E5-A2C5-46E9-9B3A-59596516B00A".
>
> However, this feature was not working as the
> PCD was not defined in the platform DSC file
> and the DEPEX section in KvmtoolPlatfomDxe.inf
> was not set correctly.
>


Understood. I do wonder whether gEfiVariableArchProtocolGuid is the
appropriate protocol here to DEPEX on. Shouldn't PcdDxe depend on this
already, and should we depend on the PCD protocol instead?

[SAMI] I did some experiments and realised we have a cyclic dependency. 
I expect some further changes once the Arm CCA support patches are merged and 
will therefore send out a v2 with the dependency fixed later.
[/SAMI]

Other than that, this looks fine to me.


> Therefore, fix this issue so that the ACPI/DT
> boot selection can be done from the UEFI shell
> as shown below.
>
> 1. Check the status of the 'ForceNoAcpi' variable
> setvar ForceNoAcpi -guid
> "50BEA1E5-A2C5-46E9-9B3A-59596516B00A"
> -nv -bs
>
> Value 00 indicates ACPI boot
> Value 01 indicates DT boot
>
> 2. Set the boot mode to ACPI
> setvar ForceNoAcpi -guid
> "50BEA1E5-A2C5-46E9-9B3A-59596516B00A"
> -nv -bs =0x00
>
> 3. Set the boot mode to DT
> setvar ForceNoAcpi -guid
> "50BEA1E5-A2C5-46E9-9B3A-59596516B00A"
> -nv -bs =0x01
>
> Cc: Ard Biesheuvel  <mailto:ardb+tianoc...@kernel.org>>
> Cc: Leif Lindholm  <mailto:quic_llind...@quicinc.com>>
> Cc: Gerd Hoffmann mailto:kra...@redhat.com>>
> Signed-off-by: Sami Mujawar  <mailto:sami.muja...@arm.com>>
> ---
> The changes can be seen at:
> https://github.com/samimujawar/edk2/tree/2954_kvmtool_fix_acpi_dt_selection_v1
>  
> <https://github.com/samimujawar/edk2/tree/2954_kvmtool_fix_acpi_dt_selection_v1>
>
> ArmVirtPkg/ArmVirtKvmTool.dsc | 14 ++
> ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf | 2 +-
> 2 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
> index 
> 20da3319667900e64755272fa110d57452d1fc67..c3c27b2765b34599c7312026ce5cb9474a22c684
>  100644
> --- a/ArmVirtPkg/ArmVirtKvmTool.dsc
> +++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
> @@ -189,6 +189,20 @@ [PcdsPatchableInModule.common]
> [PcdsDynamicHii]
> gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5
>
> + #
> + # Dynamic Hii PCD to select ACPI/DT boot.
> + #
> + # 1. Check the status of the 'ForceNoAcpi' variable
> + # setvar ForceNoAcpi -guid "50BEA1E5-A2C5-46E9-9B3A-59596516B00A" -nv -bs
> + # Value 00 indicates ACPI boot
> + # Value 01 indicates DT boot
> + # 2. Set the boot mode to ACPI
> + # setvar ForceNoAcpi -guid "50BEA1E5-A2C5-46E9-9B3A-59596516B00A" -nv -bs 
> =0x00
> + # 3. Set the boot mode to DT
> + # setvar ForceNoAcpi -guid "50BEA1E5-A2C5-46E9-9B3A-59596516B00A" -nv -bs 
> =0x01
> + #
> + 
> gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi|L"ForceNoAcpi"|gOvmfVariableGuid|0x0|FALSE|NV,BS
> +
> [PcdsDynamicDefault.common]
> gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|0x0
> gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x0
> diff --git a/ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf 
> b/ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf
> index 
> b0583d52058805aaeece31d7e3776ac498f101ad..508bfa60c2c2cb3f3e7456b010f4e9057437cda8
>  100644
> --- a/ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf
> +++ b/ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf
> @@ -42,4 +42,4 @@ [Pcd]
> gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi
>
> [Depex]
> - TRUE
> + gEfiVariableArchProtocolGuid
> --
> 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
>





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[edk2-devel] [PATCH v2 00/45] Support for Arm CCA guest firmware

2024-04-12 Thread Sami Mujawar
firmware for FVP Base RevC AEM Model
   Follow the instructions in
   
https://github.com/tianocore/edk2-platforms/blob/master/Platform/ARM/Readme.md
   to "Build the firmware for Arm FVP Base AEMv8A-AEMv8A model
   platform" based on your development environment configuration.

   Note: The same firmware binary can be used for both the Arm FVP
   Base AEMv8A-AEMv8A and the FVP Base RevC AEM Model.

d. Building the Realm Guest UEFI firmware for kvmtool:
   To build the kvmtool guest firmware, run the following commands:
   $build -a AARCH64 -t GCC5 -p ArmVirtPkg/ArmVirtKvmTool.dsc -b DEBUG
   $build -a AARCH64 -t GCC5 -p ArmVirtPkg/ArmVirtKvmTool.dsc -b RELEASE

   The Kvmtool guest firmware binaries are at the following location:
   $WORKSPACE/Build/ArmVirtKvmTool-AARCH64/_GCC5/
 FV/KVMTOOL_EFI.fd

Running the stack


To run/test the stack, you would need the following components:

  i. FVP Base AEM RevC model with FEAT_RME support [5]
 ii. TF-A firmware for EL3 [6]
iii. TF-A RMM for R-EL2 [4]
 iv. Linux Kernel [7]
  v. kvmtool [8]
 vi. UEFI Firmware for Arm CCA [12].

Instructions for building the remaining firmware components and
running the model are available here [10]. Once, the host kernel
has finished booting, a Realm can be launched by invoking the
`lkvm` command as follows:

 $ lkvm run --realm \
   --restricted_mem \
   --measurement-algo=["sha256", "sha512"] \
   --firmware KVMTOOL_EFI.fd \
   -m 512 \
   --irqchip=gicv3-its \
   --force-pci \
   --disk 
   

Where:
 * --measurement-algo (Optional) specifies the algorithm selected for
   creating the initial measurements by the RMM for this Realm (defaults
   to sha256)
 * GICv3 is mandatory for the Realms
 * --force-pci is required as only Virtio-v1.0 PCIe transport is
   supported.

Links


[1] Arm CCA Landing page (See Key Resources section for various documentations)
https://www.arm.com/armcca

[2] RMM Specification Latest
https://developer.arm.com/documentation/den0137/latest

[3] RMM v1.0-eac5 specification
https://developer.arm.com/documentation/den0137/1-0eac5

[4] Trusted Firmware RMM - TF-RMM
https://www.trustedfirmware.org/projects/tf-rmm/
GIT: https://git.trustedfirmware.org/TF-RMM/tf-rmm.git
TAG: rmm-spec-v1.0-eac5

[5] FVP Base RevC AEM Model (available on x86_64 / Arm64 Linux)
https://developer.arm.com/Tools%20and%20Software/Fixed%20Virtual%20Platforms

[6] Trusted Firmware for A class
https://www.trustedfirmware.org/projects/tf-a/

[7] Linux kernel support for Arm-CCA
https://gitlab.arm.com/linux-arm/linux-cca
KVM Support branch: cca-host/v2
Linux Guest branch: cca-guest/v2
Full stack branch: cca-full/v2

[8] kvmtool support for Arm CCA
https://gitlab.arm.com/linux-arm/kvmtool-cca
Branch: cca/v2

[9] kvm-unit-tests support for Arm CCA
https://gitlab.arm.com/linux-arm/kvm-unit-tests-cca
Branch: cca/v2

[10] Instructions for Building Firmware components and running the model, see
section 4.19.2 "Building and running TF-A with RME"

https://trustedfirmware-a.readthedocs.io/en/latest/components/realm-management-extension.html#building-and-running-tf-a-with-rme

[11] RFC V1 series posted previously for adding support for Arm CCA guest 
firmware:
 https://edk2.groups.io/g/devel/message/103581

[12] UEFI Firmware support for Arm CCA
  Host & Guest Support:
  - Repo: 
  edk2: https://gitlab.arm.com/linux-arm/edk2-cca
  edk2-platforms: https://gitlab.arm.com/linux-arm/edk2-platforms-cca
  - Branch: 2865_arm_cca_v2
  - URLs:
 edk2: https://gitlab.arm.com/linux-arm/edk2-cca/-/tree/2865_arm_cca_v2
 edk2-platforms: 
https://gitlab.arm.com/linux-arm/edk2-platforms-cca/-/tree/2865_arm_cca_v2

Sami Mujawar (45):
  ArmPkg: Add helper function to detect RME
  ArmPkg: Introduce SetMemoryProtectionAttribute() for Realms
  ArmPkg: Extend number of parameter registers in SMC call
  ArmVirtPkg: Add Arm CCA Realm Service Interface Library
  ArmVirtPkg: ArmCcaRsiLib: Add interfaces to manage the Realm IPA state
  ArmVirtPkg: ArmCcaRsiLib: Add an interface to get an attestation token
  ArmVirtPkg: ArmCcaRsiLib: Add interfaces to get/extend REMs
  ArmVirtPkg: ArmCcaRsiLib: Add an interface to make a RSI Host Call
  ArmVirtPkg: Define a GUID HOB for IPA width of a Realm
  ArmVirtPkg: Add library for Arm CCA initialisation in PEI
  ArmVirtPkg: Add NULL instance of ArmCcaInitPeiLib
  ArmVirtPkg: Add library for Arm CCA helper functions
  ArmVirtPkg: Add Null instance of ArmCcaLib
  ArmVirtPkg: Define an interface to configure MMIO regions for Arm CCA
  ArmVirtPkg: CloudHv: Add a NULL implementation of ArmCcaConfigureMmio
  ArmVirtPkg: Qemu: Add a NULL implementation of ArmCcaConfigureMmio
  ArmVirtPkg: Xen: Add a NULL implementation of ArmCcaConfigureMmio
  ArmVirtPkg: Configure the MMIO regions for Arm CCA
  ArmVirtPkg: Kvmtool: Use Null version of DebugL

[edk2-devel] [PATCH v2 41/45] ArmVirtPkg: RMM 1.0-eac4 - Add RSI Features support

2024-04-12 Thread Sami Mujawar
The RMM 1.0-eac4 introduces a new FID  RSI_FEATURES
to query the RSI features supported that have been
implemented.

Therefore, introduce a new function RsiGetFeatures
to query the features supported by the RSI.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  | 24 +++-
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h|  3 +-
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 39 +++-
 3 files changed, 63 insertions(+), 3 deletions(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
88351f53336c42c032fcff6ea97ea7728b917b76..8c1c0d5bc19d14fa640464c8d0d44e3ef522ba79
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-eac3
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac4
  (https://developer.arm.com/documentation/den0137/)
 **/
 
@@ -334,4 +334,26 @@ RsiGetVersion (
   OUT UINT16 *CONST  Minor
   );
 
+/**
+  Get the features supported by the RSI implementation.
+
+  RMM implementations across different CCA platforms may support
+  disparate features and may offer disparate configuration options
+  for Realms. The features supported by an RSI implementation are
+  discovered by reading feature pseudo-register values using the
+  RSI_FEATURES command.
+
+  @param [in]   FeatureRegIndexThe Feature Register Index.
+  @param [out]  FeatureRegValueThe Feature Register Value.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiGetFeatures (
+  INUINT64  FeatureRegIndex,
+  OUT   UINT64  *FeatureRegValue
+  );
+
 #endif // ARM_CCA_RSI_LIB_
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
index 
b1c359e2486c20ee19493b10ed3fcef1e20f2689..cd2c9ac05c02413caeed26fd764320dd751ea05b
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -10,7 +10,7 @@
 - RIPAS- Realm IPA state
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version A-bet0
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac4
  (https://developer.arm.com/documentation/den0137/)
 **/
 
@@ -20,6 +20,7 @@
 // FIDs for Realm Service Interface calls.
 #define FID_RSI_ATTESTATION_TOKEN_CONTINUE  0xC4000195
 #define FID_RSI_ATTESTATION_TOKEN_INIT  0xC4000194
+#define FID_RSI_FEATURES0xC4000191
 #define FID_RSI_HOST_CALL   0xC4000199
 #define FID_RSI_IPA_STATE_GET   0xC4000198
 #define FID_RSI_IPA_STATE_SET   0xC4000197
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
12636c484824426b2ea81ca007d962f5f7c58f8c..edd2e11f786d11191f13dd9b087cdeec4127b375
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-eac3
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac4
  (https://developer.arm.com/documentation/den0137/)
 
 **/
@@ -574,3 +574,40 @@ RsiGetVersion (
   *Major = (SmcCmd.Arg0 & RSI_VER_MAJOR_MASK) >> RSI_VER_MAJOR_SHIFT;
   return RETURN_SUCCESS;
 }
+
+/**
+  Get the features supported by the RSI implementation.
+
+  RMM implementations across different CCA platforms may support
+  disparate features and may offer disparate configuration options
+  for Realms. The features supported by an RSI implementation are
+  discovered by reading feature pseudo-register values using the
+  RSI_FEATURES command.
+
+  @param [in]   FeatureRegIndexThe Feature Register Index.
+  @param [out]  FeatureRegValueThe Feature Register Value.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiGetFeatures (
+  INUINT64  FeatureRegIndex,
+  OUT   UINT64  *FeatureRegValue
+  )
+{
+  ARM_SMC_ARGS  SmcCmd;
+
+  if (FeatureRegValue == NULL) {
+return RETURN_INVALID_PARAMETER;
+  }
+
+  ZeroMem (, sizeof (SmcCmd));
+  SmcCmd.Arg0 = FID_RSI_FEATURES;
+  SmcCmd.Arg1 = FeatureRegIndex;
+
+  ArmCallSmc ();
+  *FeatureRegValue = SmcCmd.Arg1;
+  return RsiCmdStatusToEfiStatus (SmcCmd.Arg0);
+}
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 43/45] ArmVirtPkg: RMM 1.0-eac5 - Update RSI Version support

2024-04-12 Thread Sami Mujawar
The RMM 1.0-eac5 specification updates the RSI version command
to return the highest interface revision which is supported by
the RMM and the lower revision value which indicates:
  a. The RMM supports an interface revision which is compatible
 with the requested revision and the lower revision is equal
 to the requested revision and the status code is RSI_SUCCESS
  b. The RMM does not support the requested version, but the RMM
 supports an interface revision which is lower than the
 requested revision and the status code is RSI_ERROR_INPUT
  c. The RMM does not support an interface revision which is
 compatible with the requested revision and that it supports
 an interface revision that is greater than the requested
 revision. The status code is RSI_ERROR_INPUT and the lower
 revision is equal to the higher revision.

Therefore, update the RsiGetVersion() to return the lower and
higher revision that is supported by the RMM. The RsiGetVersion
function also returns the RSI version that is implemented by
the firmware.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  | 20 --
 ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c   | 11 +++-
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h| 12 +++-
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 65 
 4 files changed, 85 insertions(+), 23 deletions(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
b768f3498314a2ea61762af65bf2668d463909a6..fd86191f90f64329aadbb847d31cd46d2549b032
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -330,17 +330,25 @@ RsiHostCall (
 /**
Get the version of the RSI implementation.
 
-  @param [out] Major  The major version of the RSI implementation.
-  @param [out] Minor  The minor version of the RSI implementation.
+  @param [out] UefiImpl The version of the RSI specification
+implemented by the UEFI firmware.
+  @param [out] RmmImplLow   The low version of the RSI specification
+implemented by the RMM.
+  @param [out] RmmImplHigh  The high version of the RSI specification
+implemented by the RMM.
 
-  @retval RETURN_SUCCESSSuccess.
-  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_UNSUPPORTEDThe execution context is not a Realm.
+  @retval RETURN_INCOMPATIBLE_VERSION   The Firmware and RMM specification
+revisions are not compatible.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
 **/
 RETURN_STATUS
 EFIAPI
 RsiGetVersion (
-  OUT UINT16 *CONST  Major,
-  OUT UINT16 *CONST  Minor
+  OUT UINT32 *CONST  UefiImpl,
+  OUT UINT32 *CONST  RmmImplLow,
+  OUT UINT32 *CONST  RmmImplHigh
   );
 
 /**
diff --git a/ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c 
b/ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c
index 
57b05f308377cf931c5f43fc7793c260dfdc36fb..3abb4dfaf567c635b28ff3a7cd5adea064e02510
 100644
--- a/ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c
+++ b/ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c
@@ -36,11 +36,16 @@ IsRealm (
   )
 {
   RETURN_STATUS  Status;
-  UINT16 Major;
-  UINT16 Minor;
+  UINT32 UefiImpl;
+  UINT32 RmmImplLow;
+  UINT32 RmmImplHigh;
 
   if (ArmHasRme ()) {
-Status = RsiGetVersion (, );
+Status = RsiGetVersion (
+   ,
+   ,
+   
+   );
 if (!RETURN_ERROR (Status)) {
   return TRUE;
 }
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
index 
cd2c9ac05c02413caeed26fd764320dd751ea05b..ce3cb0c36ffa6ddf3a16f9f47199123dc6150c51
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -10,7 +10,7 @@
 - RIPAS- Realm IPA state
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-eac4
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac5
  (https://developer.arm.com/documentation/den0137/)
 **/
 
@@ -45,5 +45,15 @@
 #define RSI_VER_MINOR_MASK   0xULL
 #define RSI_VER_MAJOR_MASK   0x7FFFULL
 #define RSI_VER_MAJOR_SHIFT  16
+#define RSI_VERSION_MASK (RSI_VER_MAJOR_MASK | RSI_VER_MINOR_MASK)
+
+#define RMM_VERSION(Major, Minor)  ((Minor & RSI_VER_MINOR_MASK) | \
+  ((Major << RSI_VER_MAJOR_SHIFT) & RSI_VER_MAJOR_MASK))
+
+#define GET_MAJOR_REVISION(Rev) \
+  ((Rev & RSI_VER_MAJOR_MASK) >> RSI_VER_MAJOR_SHIFT)
+
+#define GET_MINOR_REVISION(Rev) \
+  ((Rev & RSI_VER_MINOR_MASK))
 
 #endif // ARM_CCA_RSI_H_
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCc

[edk2-devel] [PATCH v2 44/45] ArmVirtPkg: ArmCcaLib: Cache current world value

2024-04-12 Thread Sami Mujawar
IsRealm() probes to check if the code is executing
in a Realm context by checking if RME is supported
and then issuing a RSI_VERSION command to check it
is supported.

Instead of calling RSI_VERSION command every time the
IsRealm() is called, cache the world value we are
running in, to return the value in subsequent calls.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c | 31 
 1 file changed, 18 insertions(+), 13 deletions(-)

diff --git a/ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c 
b/ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c
index 
3abb4dfaf567c635b28ff3a7cd5adea064e02510..67ad2824f1f6a8fe4e1fd3f837300097a68775c7
 100644
--- a/ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c
+++ b/ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c
@@ -35,23 +35,28 @@ IsRealm (
   VOID
   )
 {
-  RETURN_STATUS  Status;
-  UINT32 UefiImpl;
-  UINT32 RmmImplLow;
-  UINT32 RmmImplHigh;
+  RETURN_STATUS   Status;
+  UINT32  UefiImpl;
+  UINT32  RmmImplLow;
+  UINT32  RmmImplHigh;
+  STATIC BOOLEAN  RealmWorld   = FALSE;
+  STATIC BOOLEAN  FlagsInitialised = FALSE;
 
-  if (ArmHasRme ()) {
-Status = RsiGetVersion (
-   ,
-   ,
-   
-   );
-if (!RETURN_ERROR (Status)) {
-  return TRUE;
+  if (!FlagsInitialised) {
+FlagsInitialised = TRUE;
+if (ArmHasRme ()) {
+  Status = RsiGetVersion (
+ ,
+ ,
+ 
+ );
+  if (!RETURN_ERROR (Status)) {
+RealmWorld = TRUE;
+  }
 }
   }
 
-  return FALSE;
+  return RealmWorld;
 }
 
 /**
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 45/45] ArmVirtPkg: ArmCcaIoMmu: Provide an implementation for SetAttribute

2024-04-12 Thread Sami Mujawar
The patch at "049695a0b1e2 MdeModulePkg/PciBusDxe: Add feedback
status for PciIoMap" adds support to propagate the error code
following the invocation of the IoMmu protocol SetAttribute()
operation.

Since the ArmCcaIoMmuDxe implementation of the SetAttribute()
function returned EFI_UNSUPPORTED, it resulted in the virtio
disk not being mounted.

Although there is nothing to be done in SetAttribute(), follow
the approach as done by the patch at "97c3f5b8d272  Provide an
implementation for SetAttribute" to validate the IoMmu access
method being requested against the IoMmu mapping operation and
return a suitable return code.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c | 63 +++-
 1 file changed, 61 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c 
b/ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c
index 
cf52b82218bb9ece7bfedcb6e3a2ced00eff5e92..91f9dae91843b6739ddb818e9ec81706ccfa73b3
 100644
--- a/ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c
+++ b/ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c
@@ -629,7 +629,9 @@ IoMmuFreeBuffer (
   @param[in]  Mapping   The mapping value returned from Map().
   @param[in]  IoMmuAccess   The IOMMU access.
 
-  @retval EFI_UNSUPPORTEDOperation not supported by IOMMU.
+  @retval EFI_INVALID_PARAMETER   A parameter was invalid.
+  @retval EFI_UNSUPPORTED The requested operation is not supported.
+  @retval EFI_SUCCESS Success.
 
 **/
 EFI_STATUS
@@ -641,7 +643,64 @@ IoMmuSetAttribute (
   IN UINT64IoMmuAccess
   )
 {
-  return EFI_UNSUPPORTED;
+  EFI_STATUS  Status;
+  MAP_INFO*MapInfo;
+
+  DEBUG ((
+DEBUG_VERBOSE,
+"%a: Mapping=0x%p Access=%lu\n",
+__func__,
+Mapping,
+IoMmuAccess
+));
+
+  if (Mapping == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  Status = EFI_SUCCESS;
+
+  // An IoMmuAccess value of 0 is always accepted,
+  // validate any non-zero value.
+  if (IoMmuAccess != 0) {
+MapInfo = (MAP_INFO *)Mapping;
+
+// The mapping operation already implied the access mode.
+// Validate that the supplied access mode matches operation
+// access mode.
+switch (MapInfo->Operation) {
+  case EdkiiIoMmuOperationBusMasterRead:
+  case EdkiiIoMmuOperationBusMasterRead64:
+if (IoMmuAccess != EDKII_IOMMU_ACCESS_READ) {
+  Status = EFI_INVALID_PARAMETER;
+}
+
+break;
+
+  case EdkiiIoMmuOperationBusMasterWrite:
+  case EdkiiIoMmuOperationBusMasterWrite64:
+if (IoMmuAccess != EDKII_IOMMU_ACCESS_WRITE) {
+  Status = EFI_INVALID_PARAMETER;
+}
+
+break;
+
+  case EdkiiIoMmuOperationBusMasterCommonBuffer:
+  case EdkiiIoMmuOperationBusMasterCommonBuffer64:
+if (IoMmuAccess !=
+(EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE))
+{
+  Status = EFI_INVALID_PARAMETER;
+}
+
+break;
+
+  default:
+Status = EFI_UNSUPPORTED;
+} // switch
+  }
+
+  return Status;
 }
 
 /** Arm CCA IoMMU protocol
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 30/45] ArmVirtPkg: ArmCcaRsiLib: Fix incorrect RSI version masks

2024-04-12 Thread Sami Mujawar
The RsiInterfaceVersion fieldset contains an RSI interface
version and the width of this fieldset is 64 bits.

The bits 15:0 of this fieldset represent the RSI minor
revision number and the bits 30:16 represent the major
revision number. The remaining bits 63:31 are reserved
and should be zero.

The RSI version masks were incorrectly defined which
resulted in an incorrect RSI version being returned
by RsiGetVersion (). Therefore, fix the RSI version
masks to reflect the bit fields defined by the RMM
specification.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
index 
70e84a20711f04c32a5850230cc907a6d231f50b..b1c359e2486c20ee19493b10ed3fcef1e20f2689
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -41,8 +41,8 @@
See Section B4.4.3,  RMM Specification, version A-bet0.
The width of the RsiInterfaceVersion fieldset is 64 bits.
 */
-#define RSI_VER_MINOR_MASK   0x00FFULL
-#define RSI_VER_MAJOR_MASK   0x7F00ULL
+#define RSI_VER_MINOR_MASK   0xULL
+#define RSI_VER_MAJOR_MASK   0x7FFFULL
 #define RSI_VER_MAJOR_SHIFT  16
 
 #endif // ARM_CCA_RSI_H_
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 38/45] ArmVirtPkg: RMM 1.0-eac2 - Add RsiRipasChangeFlags definitions

2024-04-12 Thread Sami Mujawar
The RMM specification 1.0-eac2 updates the RSI_IPA_STATE_SET
interface to add a new parameter RsiRipasChangeFlags.

The RsiRipasChangeFlags fieldset is 64 bits and the bit 0
describes the RsiRipasChangeDestroyed type which is used
to indicate if a RIPAS change from DESTROYED should be
permitted or not.

Therefore, define the macros for specifying the
RsiRipasChangeFlags that represent the
RsiRipasChangeDestroyed type.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h | 20 
 1 file changed, 20 insertions(+)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
e237187dbc481d32aa6018c135aabe6f5a0781c6..154a5717f259502952a36312f6c3b3d6b75f15cb
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -71,6 +71,26 @@
 */
 #define RSI_HASH_SHA_512  1
 
+/* The RsiRipasChangeFlags fieldset contains flags provided by
+   the Realm when requesting a RIPAS change.
+   See section B4.4.8 RsiRipasChangeFlags type in the
+   RMM Specification, version 1.0-eac2.
+   The following macros prefixed RIPAS_CHANGE_FLAGS_xxx
+   define the values of the RsiRipasChangeFlags fieldset.
+*/
+
+/* A RIPAS change from DESTROYED should not be permitted.
+  See section B4.4.7 RsiRipasChangeDestroyed type in the
+  RMM Specification, version 1.0-eac2
+*/
+#define RIPAS_CHANGE_FLAGS_RSI_NO_CHANGE_DESTROYED  0
+
+/* A RIPAS change from DESTROYED should be permitted.
+  See section B4.4.7 RsiRipasChangeDestroyed type in the
+  RMM Specification, version 1.0-eac2
+*/
+#define RIPAS_CHANGE_FLAGS_RSI_CHANGE_DESTROYED  1
+
 /** An enum describing the RSI RIPAS.
See Section A5.2.2 Realm IPA state, RMM Specification, version 1.0-eac2
 */
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 37/45] ArmVirtPkg: RMM 1.0-eac2 - Add RIPAS DESTROYED state

2024-04-12 Thread Sami Mujawar
The RMM specification 1.0-eac2 updates the RIPAS state
to add a new DESTROYED state for an address which is
inaccessible to the Realm due to an action taken by
the Host.

Therefore, update the RSI RIPAS state enum to add the
new RIPAS_DESTROYED state.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
2b72ad09da85a9fd2f067db1c511d12f636d3dda..e237187dbc481d32aa6018c135aabe6f5a0781c6
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -72,11 +72,12 @@
 #define RSI_HASH_SHA_512  1
 
 /** An enum describing the RSI RIPAS.
-   See Section A5.2.2 Realm IPA state, RMM Specification, version A-bet0
+   See Section A5.2.2 Realm IPA state, RMM Specification, version 1.0-eac2
 */
 typedef enum Ripas {
   RipasEmpty,  ///< Unused IPA location.
   RipasRam,///< Private code or data owned by the Realm.
+  RipasDestroyed,  ///< An address which is inaccessible to the Realm.
   RipasMax ///< A valid RIPAS type value is less than RipasMax.
 } RIPAS;
 
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 33/45] ArmVirtPkg: RMM 1.0-bet2 - Increase number of RSI host call args

2024-04-12 Thread Sami Mujawar
The RMM 1.0-bet2 spec expands the set of GPRs for RSI host call
to X0-X30.

Therefore, update the RSI HOST_CALL_ARGS structure to reflect
these changes.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  | 29 ++--
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c |  3 +-
 2 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
81d125a81941cc1680cfdfb08e001193851d50e5..3d6ace866def5f10dd74afd4e9340530150f6f43
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-bet1
+   - Realm Management Monitor (RMM) Specification, version 1.0-bet2
  (https://developer.arm.com/documentation/den0137/)
 **/
 
@@ -82,7 +82,7 @@ typedef struct RealmConfig {
 } REALM_CONFIG;
 
 /** A structure describing the Host Call arguments
-See Section 4.4.2 RsiHostCall type, RMM Specification, version 1.0-bet1
+See Section 4.4.2 RsiHostCall type, RMM Specification, version 1.0-bet2
 */
 typedef struct HostCallArgs {
   UINT16Imm;
@@ -95,7 +95,30 @@ typedef struct HostCallArgs {
   UINT64Gprs4;
   UINT64Gprs5;
   UINT64Gprs6;
-  UINT8 Reserved[0x100 - (sizeof (UINT64) * 8)];
+  UINT64Gprs7;
+  UINT64Gprs8;
+  UINT64Gprs9;
+  UINT64Gprs10;
+  UINT64Gprs11;
+  UINT64Gprs12;
+  UINT64Gprs13;
+  UINT64Gprs14;
+  UINT64Gprs15;
+  UINT64Gprs16;
+  UINT64Gprs17;
+  UINT64Gprs18;
+  UINT64Gprs19;
+  UINT64Gprs20;
+  UINT64Gprs21;
+  UINT64Gprs22;
+  UINT64Gprs23;
+  UINT64Gprs24;
+  UINT64Gprs25;
+  UINT64Gprs26;
+  UINT64Gprs27;
+  UINT64Gprs28;
+  UINT64Gprs29;
+  UINT64Gprs30;
 } HOST_CALL_ARGS;
 
 /**
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
5984651f6d9d627d9fee30a4fbf11c45b3951877..ceec0477d7ec9ba0ae831aa5a4f31d8a3791b9d1
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-bet1
+   - Realm Management Monitor (RMM) Specification, version 1.0-bet2
  (https://developer.arm.com/documentation/den0137/)
 
 **/
@@ -522,7 +522,6 @@ RsiHostCall (
 
   // Clear the reserved fields
   ZeroMem (>Reserved1, sizeof (Args->Reserved1));
-  ZeroMem (>Reserved, sizeof (Args->Reserved));
 
   ZeroMem (, sizeof (SmcCmd));
   SmcCmd.Arg0 = FID_RSI_HOST_CALL;
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 42/45] ArmVirtPkg: RMM 1.0-eac5 - Attestation token API updates

2024-04-12 Thread Sami Mujawar
The RMM 1.0-eac3 specification removed the restriction that
attestation token size must not exceed 4KB. Further it also
extended the RSI_ATTESTATION_TOKEN_CONTINUE command so as to
return up to a granule worth of the attestation token data.

The RMM 1.0-eac5 specification simplified the attestation
token interfaces such that, the RSI_ATTESTATION_TOKEN_INIT
command returns the upper bound of the attestation token
size. This eliminates the need for relocation of token data
buffers during attestation token retrieval.

Therefore, implement the attestation token API updates
from RMM 1.0-eac3 through to RMM 1.0-eac5 specification.

Note: The RsiGetAttestationToken() API has been modified
such that ArmCcaRsiLib allocates memory for the returned
attestation token buffer. The caller is therefore required
to call RsiFreeAttestationToken() to free the memory that
was allocated for the attestation token buffer.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  |  31 ++--
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 160 +++-
 2 files changed, 146 insertions(+), 45 deletions(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
8c1c0d5bc19d14fa640464c8d0d44e3ef522ba79..b768f3498314a2ea61762af65bf2668d463909a6
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-eac4
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac5
  (https://developer.arm.com/documentation/den0137/)
 **/
 
@@ -33,11 +33,6 @@
 */
 #define RIPAS_TYPE_MASK  0xFF
 
-/* Maximum attestation token size
-  RBXKKY The size of an attestation token is no larger than 4KB.
-*/
-#define MAX_ATTESTATION_TOKEN_SIZE  SIZE_4KB
-
 /* Maximum challenge data size in bits.
 */
 #define MAX_CHALLENGE_DATA_SIZE_BITS  512
@@ -185,9 +180,10 @@ typedef struct HostCallArgs {
   @param [in]   ChallengeDataSizeBits Size of the challenge data in bits.
   @param [out]  TokenBuffer   Pointer to a buffer to store the
   retrieved attestation token.
-  @param [in, out]  TokenBufferSize   Size of the token buffer on input and
-  number of bytes stored in token 
buffer
-  on return.
+  @param [out]  TokenBufferSize   Length of token data returned.
+
+  Note: The TokenBuffer allocated must be freed by the caller
+  using RsiFreeAttestationToken().
 
   @retval RETURN_SUCCESSSuccess.
   @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
@@ -202,8 +198,21 @@ EFIAPI
 RsiGetAttestationToken (
   IN  CONST UINT8   *CONST  ChallengeData,
   INUINT64  ChallengeDataSizeBits,
-  OUT   UINT8   *CONST  TokenBuffer,
-  IN OUTUINT64  *CONST  TokenBufferSize
+  OUT   UINT8  **CONST  TokenBuffer,
+  OUT   UINT64  *CONST  TokenBufferSize
+  );
+
+/**
+  Free the attestation token buffer.
+
+  @param [in]  TokenBuffer   Pointer to the retrieved
+ attestation token.
+  @param [in]  TokenBufferSize   Size of the token buffer.
+**/
+VOID
+RsiFreeAttestationToken (
+  IN   UINT8  *CONST  TokenBuffer,
+  IN   UINT64  CONST  TokenBufferSize
   );
 
 /**
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
edd2e11f786d11191f13dd9b087cdeec4127b375..b861b2e79d5d659a0eb16206d329a0cb039eda0d
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-eac4
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac5
  (https://developer.arm.com/documentation/den0137/)
 
 **/
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "ArmCcaRsi.h"
 
 /**
@@ -88,6 +89,8 @@ AddrIsGranuleAligned (
 
   @param [out] TokenBuffer  Pointer to a buffer to store the
 retrieved attestation token.
+  @param [in]  Offset   Offset within Token buffer granule
+to start of buffer in bytes.
   @param [in,out]  TokenSizeOn input size of the token buffer,
 and on output size of the token
 returned if operation is successful,
@@ -106,6 +109,7 @@ RETURN_STATUS
 EFIAPI
 RsiAttestationTokenContinue (
   OUT   UINT8   *CONST  TokenBuffer,
+  INUINT64   CON

[edk2-devel] [PATCH v2 40/45] ArmVirtPkg: RMM 1.0-eac3 - Handle RsiSetIpaState() response

2024-04-12 Thread Sami Mujawar
The RMM 1.0-eac3 specification extends the RSI_IPA_STATE_SET
command to return a new RsiResponse value to indicate if the
Host accepts or rejects the IPA state change request to RAM.

Therefore, define the RsiResponse enum and return an error
RETURN_ACCESS_DENIED if the Host rejects the RIPAS change
request to RAM.

Such a failure is fatal and not recoverable and the caller
is then expected to tear down the Realm.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  | 26 +++-
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c |  8 +-
 2 files changed, 32 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
5c2f996d3b4376e831a901f2919780acffec3313..88351f53336c42c032fcff6ea97ea7728b917b76
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-eac2
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac3
  (https://developer.arm.com/documentation/den0137/)
 **/
 
@@ -91,6 +91,29 @@
 */
 #define RIPAS_CHANGE_FLAGS_RSI_CHANGE_DESTROYED  1
 
+/* The RsiResponse type is a value returned by the
+   RSI_IPA_STATE_SET command and represents whether
+   the Host accepted or rejected a Realm request.
+   See section B4.4.6 RsiResponse type in the
+   RMM Specification, version 1.0-eac3.
+   The width of the RsiResponse enumeration is 1 bit
+   and the following macros prefixed RIPAS_CHANGE_RESPONSE_xxx
+   define the values of the RsiResponse type.
+*/
+
+/* The RIPAS change request to RAM was accepted
+   by the host.
+*/
+#define RIPAS_CHANGE_RESPONSE_ACCEPT  0
+
+/* The RIPAS change request to RAM was rejected
+   by the host.
+*/
+#define RIPAS_CHANGE_RESPONSE_REJECT  1
+
+/* A mask for the RSI Response bit */
+#define RSI_RESPONSE_MASK  BIT0
+
 /** An enum describing the RSI RIPAS.
See Section A5.2.2 Realm IPA state, RMM Specification, version 1.0-eac2
 */
@@ -209,6 +232,7 @@ RsiGetIpaState (
 
   @retval RETURN_SUCCESSSuccess.
   @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_ACCESS_DENIED  RIPAS change request was rejected.
 **/
 RETURN_STATUS
 EFIAPI
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
0535254a3991bfe7a19b904e83b9482f801da20c..12636c484824426b2ea81ca007d962f5f7c58f8c
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-eac2
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac3
  (https://developer.arm.com/documentation/den0137/)
 
 **/
@@ -322,6 +322,7 @@ RsiGetIpaState (
 
   @retval RETURN_SUCCESSSuccess.
   @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_ACCESS_DENIED  RIPAS change request was rejected.
 **/
 RETURN_STATUS
 EFIAPI
@@ -365,6 +366,11 @@ RsiSetIpaState (
 
 BaseAddress = (UINT64 *)SmcCmd.Arg1;
 Size= EndAddress - BaseAddress;
+
+if ((SmcCmd.Arg2 & RSI_RESPONSE_MASK) == RIPAS_CHANGE_RESPONSE_REJECT) {
+  Status = RETURN_ACCESS_DENIED;
+  break;
+}
   }   // while
 
   return Status;
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 35/45] ArmVirtPkg: RMM 1.0-eac1 - Relax alignment of RSI host call arg

2024-04-12 Thread Sami Mujawar
The RMM 1.0-eac1 relaxed the RSI_HOST_CALL alignment requirement
from 4KB to 256B.

Therefore, update the alignment check for the address parameter
of the RSI_HOST_CALL command to relax the alignment requirement
to 256 bytes.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
59b9d7a12c82a534280595328347995f1ff51ee2..0280d8e42882ddfb02d0a40c47a6fba7855ba84f
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-eac0
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac1
  (https://developer.arm.com/documentation/den0137/)
 
 **/
@@ -512,7 +512,11 @@ RsiHostCall (
 {
   ARM_SMC_ARGS  SmcCmd;
 
-  if ((Args == NULL) || (!AddrIsGranuleAligned ((UINT64 *)Args))) {
+  // The RMM specification, version 1.0-eac1, relaxes the alignment
+  // requirement for RSI_HOST_CALL from 4KB to 256B. Also see RMM
+  // specification, sections B4.3.3 RSI_HOST_CALL command and
+  // section B4.3.3.2 Failure conditions.
+  if ((Args == NULL) || (((UINT64)Args & (0x100 - 1)) != 0)) {
 return RETURN_INVALID_PARAMETER;
   }
 
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 23/45] ArmVirtPkg: Arm CCA configure system memory in early Pei

2024-04-12 Thread Sami Mujawar
When a VMM creates a Realm, a small amount of DRAM (which contains
the firmware image) and the initial content is configured as Protected
RAM. The remaining System Memory is in the Protected Empty state. The
firmware must then initialise the remaining System Memory as Protected
RAM before it can be accessed.

Therefore, call the ArmCcaConfigureSystemMemory () in the early Pei
phase so that the System Memory is configured as Protected RAM.

Note: ArmCcaConfigureSystemMemory () is implemented in ArmCcaInitPeiLib
for which a Null implementation is provided. Therefore, this change
should not have an impact for non-Arm CCA enabled systems.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S | 6 +-
 ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf | 3 ++-
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S 
b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
index 
01623b6b3591242778a5c76df5d401b1ce71834f..03bef60dd408e787cbeb912d95639821714f
 100644
--- a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
+++ b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
@@ -1,5 +1,5 @@
 //
-//  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+//  Copyright (c) 2011-2023, Arm Limited. All rights reserved.
 //  Copyright (c) 2015-2016, Linaro Limited. All rights reserved.
 //
 //  SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -11,6 +11,10 @@
 ASM_FUNC(_ModuleEntryPoint)
   blASM_PFX(DiscoverDramFromDt)
 
+  // Check if we are in a Realm and configure
+  // the System Memory as Protected RAM.
+  blASM_PFX(ArmCcaConfigureSystemMemory)
+
   // Get ID of this CPU in Multicore system
   blASM_PFX(ArmReadMpidr)
   // Keep a copy of the MpId register value
diff --git a/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf 
b/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf
index 
578ee37e7467b2f29bacac0b5d111271061e3ff5..f1c2776c7b74d0fae3529956ea91a9b504ba83c2
 100755
--- a/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf
+++ b/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf
@@ -1,6 +1,6 @@
 #/** @file
 #
-#  Copyright (c) 2011-2015, ARM Ltd. All rights reserved.
+#  Copyright (c) 2011-2023, Arm Limited. All rights reserved.
 #  Copyright (c) 2015, Linaro Ltd. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -38,6 +38,7 @@ [Packages]
   OvmfPkg/OvmfPkg.dec
 
 [LibraryClasses]
+  ArmCcaInitPeiLib
   BaseLib
   DebugLib
   FdtLib
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 28/45] MdePkg: Warn if AArch64 RNDR instruction is not supported

2024-04-12 Thread Sami Mujawar
The BaseRngLib library constructor for AArch64 asserts if the
RNDR instruction is not supported by the CPU. This approach to
warn about the unsupported instruction may be suitable for the
host platform firmware. However, for a guest firmware the only
mechanism to discover the supported RNG interface is by probing
the processor feature registers.
The guest firmware may therefore assume that RNDR instruction
is supported and if the probe fails, fall back to an alternate
RNG source, e.g. Virtio RNG.

Therefore, replace the assert with a warning message to allow
the guest firmware to progress.

Note:
 - If RNDR instruction is not supported, the GetRandomNumberXXX
   functions will return FALSE to indicate that the random number
   generation has failed. It is expected that the calling function
   checks the status and handles this error appropriately.
 - This change should not have any side effect as the behaviour
   will be similar to that of release builds where the asserts
   would be removed.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Sami Mujawar 
---
 MdePkg/Library/BaseRngLib/AArch64/Rndr.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/MdePkg/Library/BaseRngLib/AArch64/Rndr.c 
b/MdePkg/Library/BaseRngLib/AArch64/Rndr.c
index 
d39db62153eed415151e7a27a5931231febd20d3..dc41eea8fbfd7d18bca24e2ebe1cdc56b4eb8d81
 100644
--- a/MdePkg/Library/BaseRngLib/AArch64/Rndr.c
+++ b/MdePkg/Library/BaseRngLib/AArch64/Rndr.c
@@ -49,10 +49,14 @@ BaseRngLibConstructor (
   // Determine RNDR support by examining bits 63:60 of the ISAR0 register 
returned by
   // MSR. A non-zero value indicates that the processor supports the RNDR 
instruction.
   //
-  Isar0 = ArmReadIdIsar0 ();
-  ASSERT ((Isar0 & RNDR_MASK) != 0);
-
+  Isar0  = ArmReadIdIsar0 ();
   mRndrSupported = ((Isar0 & RNDR_MASK) != 0);
+  if (!mRndrSupported) {
+DEBUG ((
+  DEBUG_WARN,
+  "WARNING: BaseRngLib: RNDR instruction not supported by the processor.\n"
+  ));
+  }
 
   return EFI_SUCCESS;
 }
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 26/45] ArmVirtPkg: IoMMU driver to DMA from Realms

2024-04-12 Thread Sami Mujawar
On Arm CCA systems the access to pages inside the Realm is protected.

However, software executing in a Realm needs to interact with the
external world. This may be done using para virtualisation of the
disk, network interfaces, etc. For this to work the buffers in the
Realm need to be shared with the Host. The sharing and management
of the Realm buffers is done by the Realm Aperture Management
Protocol, which invokes the necessary Realm Service Interfaces
to transition the buffers from Protected IPA to Unprotected IPA.

The ArmCcaIoMmu driver provides the necessary hooks so that DMA
operations can be performed by bouncing buffers using pages shared
with the Host. It uses the Realm Aperture Management protocol to
share the buffers with the Host.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c  | 813 
 ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.h  |  66 ++
 ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmuDxe.c   |  59 ++
 ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmuDxe.inf |  45 ++
 4 files changed, 983 insertions(+)

diff --git a/ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c 
b/ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c
new file mode 100644
index 
..cf52b82218bb9ece7bfedcb6e3a2ced00eff5e92
--- /dev/null
+++ b/ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c
@@ -0,0 +1,813 @@
+/** @file
+  The protocol provides support to allocate, free, map and umap a DMA buffer
+  for bus master (e.g PciHostBridge). When the execution context is a Realm,
+  the DMA operations must be performed on buffers that are shared with the 
Host.
+  Hence the RAMP protocol is used to manage the sharing of the DMA buffers or
+  in some cases to bounce the buffers.
+
+  Copyright (c) 2017, AMD Inc. All rights reserved.
+  Copyright (c) 2017, Intel Corporation. All rights reserved.
+  Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "ArmCcaIoMmu.h"
+
+/** List of the MAP_INFO structures that have been set up by IoMmuMap() and not
+yet torn down by IoMmuUnmap(). The list represents the full set of mappings
+currently in effect.
+*/
+STATIC LIST_ENTRY  mMapInfos = INITIALIZE_LIST_HEAD_VARIABLE (mMapInfos);
+
+#if !defined (MDEPKG_NDEBUG)
+
+/** ASCII names for EDKII_IOMMU_OPERATION constants, for debug logging.
+*/
+STATIC CONST CHAR8 *CONST
+mBusMasterOperationName[EdkiiIoMmuOperationMaximum] = {
+  "Read",
+  "Write",
+  "CommonBuffer",
+  "Read64",
+  "Write64",
+  "CommonBuffer64"
+};
+#endif
+
+/** Pointer to the Realm Aperture Management Protocol
+*/
+extern EDKII_REALM_APERTURE_MANAGEMENT_PROTOCOL  *mRamp;
+
+/**
+  Given the host address find a mapping node in the linked list.
+
+  @param [in] HostAddress Host address.
+
+  @return Pointer to the MapInfo node if found, otherwise NULL.
+**/
+STATIC
+MAP_INFO *
+EFIAPI
+FindMappingByHostAddress (
+  INVOID  *HostAddress
+  )
+{
+  LIST_ENTRY  *Node;
+  LIST_ENTRY  *NextNode;
+  MAP_INFO*MapInfo;
+
+  for (Node = GetFirstNode (); Node !=  Node = NextNode) {
+NextNode = GetNextNode (, Node);
+MapInfo  = CR (Node, MAP_INFO, Link, MAP_INFO_SIG);
+if (MapInfo->HostAddress == HostAddress) {
+  return MapInfo;
+}
+  }
+
+  return NULL;
+}
+
+/**
+  Map a shared buffer
+
+  @param [in]   Operation   IoMMU operation to perform.
+  @param [in]   HostAddress Pointer to the Host buffer.
+  @param [in]   NumberOfBytes   Number of bytes to map.
+  @param [in]   BbAddress   Bounce buffer address.
+  @param [in]   BbPages Number of pages covering the bounce buffer.
+  @param [out]  Mapping Pointer to the MapInfo node.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval EFI_OUT_OF_RESOURCES  Failed to allocate memory.
+**/
+STATIC
+EFI_STATUS
+MapSharedBuffer (
+  INEDKII_IOMMU_OPERATION  Operation,
+  INVOID   *HostAddress,
+  INUINTN  NumberOfBytes,
+  INEFI_PHYSICAL_ADDRESS   BbAddress,
+  INUINTN  BbPages,
+  OUT   MAP_INFO   **Mapping
+  )
+{
+  EFI_STATUS  Status;
+  MAP_INFO*MapInfo;
+
+  if (BbPages != EFI_SIZE_TO_PAGES (NumberOfBytes)) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  // Allocate a MAP_INFO structure to remember the mapping when Unmap() is
+  // called later.
+  MapInfo = AllocateZeroPool (sizeof (MAP_INFO));
+  if (MapInfo == NULL) {
+return EFI_OUT_OF_RESOURCES;
+  }
+
+  InitializeListHead (>Link);
+
+  // Initialize the MAP_INFO structure, except the NonParAddress field
+  MapInfo->Signature = MAP_INFO_SIG;
+  MapInfo->Operation = Operation;
+  MapInfo->NumberOfBytes = NumberOfBytes;
+  MapInfo->NumberOfPages = BbPages;
+  MapInfo->HostAddress   = HostAddress;
+  Map

[edk2-devel] [PATCH v2 32/45] ArmVirtPkg: RMM 1.0-bet1 - Update width of RSI host call struct

2024-04-12 Thread Sami Mujawar
The RMM 1.0-bet1 updates the width of the RsiHostCall
structure to 256 (0x100) bytes.

Therefore, update the RSI HOST_CALL_ARGS structure to reflect
these changes.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  | 6 +++---
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 6 --
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
af4be275d37f0376335de5344f9626c9a92c70d2..81d125a81941cc1680cfdfb08e001193851d50e5
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version A-bet0
+   - Realm Management Monitor (RMM) Specification, version 1.0-bet1
  (https://developer.arm.com/documentation/den0137/)
 **/
 
@@ -82,7 +82,7 @@ typedef struct RealmConfig {
 } REALM_CONFIG;
 
 /** A structure describing the Host Call arguments
-See Section 4.4.2 RsiHostCall type, RMM Specification, version A-bet0
+See Section 4.4.2 RsiHostCall type, RMM Specification, version 1.0-bet1
 */
 typedef struct HostCallArgs {
   UINT16Imm;
@@ -95,7 +95,7 @@ typedef struct HostCallArgs {
   UINT64Gprs4;
   UINT64Gprs5;
   UINT64Gprs6;
-  UINT8 Reserved[0x1000 - (sizeof (UINT64) * 8)];
+  UINT8 Reserved[0x100 - (sizeof (UINT64) * 8)];
 } HOST_CALL_ARGS;
 
 /**
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
dc41e77b55f4369e89592b5437e525baf80aa0b3..5984651f6d9d627d9fee30a4fbf11c45b3951877
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version A-bet0
+   - Realm Management Monitor (RMM) Specification, version 1.0-bet1
  (https://developer.arm.com/documentation/den0137/)
 
 **/
@@ -516,7 +516,9 @@ RsiHostCall (
 return RETURN_INVALID_PARAMETER;
   }
 
-  STATIC_ASSERT (sizeof (HOST_CALL_ARGS) == SIZE_4KB);
+  // See RMM specification, version 1.0-bet1, Section B4.4.2 RsiHostCall type
+  // The width of the RsiHostCall structure is 256 (0x100) bytes.
+  STATIC_ASSERT (sizeof (HOST_CALL_ARGS) == 0x100);
 
   // Clear the reserved fields
   ZeroMem (>Reserved1, sizeof (Args->Reserved1));
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 34/45] ArmVirtPkg: RMM 1.0-eac0 - Update RsiSetIpaState parameter usage

2024-04-12 Thread Sami Mujawar
The RMM 1.0-eac0 specification updates the parameter usage for the
RSI_IPA_STATE_SET command to change the parameter 3 from IPA region
size to Top of target IPA region.

Therefore, update the RseSetIpaState () implementation to reflect
this change.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
ceec0477d7ec9ba0ae831aa5a4f31d8a3791b9d1..59b9d7a12c82a534280595328347995f1ff51ee2
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-bet2
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac0
  (https://developer.arm.com/documentation/den0137/)
 
 **/
@@ -351,7 +351,7 @@ RsiSetIpaState (
 ZeroMem (, sizeof (SmcCmd));
 SmcCmd.Arg0 = FID_RSI_IPA_STATE_SET;
 SmcCmd.Arg1 = (UINTN)BaseAddress;
-SmcCmd.Arg2 = (UINTN)Size;
+SmcCmd.Arg2 = (UINTN)EndAddress;
 SmcCmd.Arg3 = (UINTN)State;
 
 ArmCallSmc ();
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 36/45] ArmVirtPkg: RMM 1.0-eac2 - Update RsiRealmConfig structure

2024-04-12 Thread Sami Mujawar
The RMM 1.0-eac2 specification updates the RsiRealmConfig
structure to add a new member to identify the Realm hash
algorithm.

Therefore, update the REALM_CONFIG structure to add a
new member HashAlgorithm that represents the Realm hash
value. Also add macros to define the RsiHashAlgorithm
enumeration values SHA-256 and SHA-512.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h | 18 +++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
3d6ace866def5f10dd74afd4e9340530150f6f43..2b72ad09da85a9fd2f067db1c511d12f636d3dda
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-bet2
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac2
  (https://developer.arm.com/documentation/den0137/)
 **/
 
@@ -61,6 +61,16 @@
 #define MIN_REM_INDEX  1
 #define MAX_REM_INDEX  4
 
+/* The values of the RsiHashAlgorithm enumeration.
+   SHA-256 (Secure Hash Standard (SHS))
+*/
+#define RSI_HASH_SHA_256  0
+
+/* The values of the RsiHashAlgorithm enumeration.
+   SHA-512 (Secure Hash Standard (SHS))
+*/
+#define RSI_HASH_SHA_512  1
+
 /** An enum describing the RSI RIPAS.
See Section A5.2.2 Realm IPA state, RMM Specification, version A-bet0
 */
@@ -71,14 +81,16 @@ typedef enum Ripas {
 } RIPAS;
 
 /** A structure describing the Realm Configuration.
-  See Section B4.4.4 RsiRealmConfig type, RMM Specification, version A-bet0
+  See Section B4.4.5 RsiRealmConfig type, RMM Specification, version 1.0-eac2
   The width of the RsiRealmConfig structure is 4096 (0x1000) bytes.
 */
 typedef struct RealmConfig {
   // Width of IPA in bits.
   UINT64IpaWidth;
+  // Width of the RsiHashAlgorithm enumeration is 8 bits.
+  UINT8 HashAlgorithm;
   // Unused bits of the RsiRealmConfig structure should be zero.
-  UINT8 Reserved[SIZE_4KB - sizeof (UINT64)];
+  UINT8 Reserved[SIZE_4KB - (sizeof (UINT64) + sizeof (UINT8))];
 } REALM_CONFIG;
 
 /** A structure describing the Host Call arguments
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 25/45] ArmVirtPkg: Introduce Realm Aperture Management Protocol

2024-04-12 Thread Sami Mujawar
The Realm Aperture Management Protocol (RAMP) is used to manage
the sharing of buffers between the Guest and Host. It configures
the memory regions as Protected EMPTY or Protected RAM by calling
RSI_IPA_STATE_SET command. The RAMP provides interfaces that device
drivers can use to open/close apertures for sharing buffers.

The RAMP also keeps track of the apertures that have been opened
and closes them on ExitBootServices. It also registers for reset
notification and closes all open apertures before the platform
resets the system.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirtPkg.dec  
  |   3 +
 ArmVirtPkg/Include/Protocol/RealmApertureManagementProtocol.h  
  | 103 +++
 
ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.c
   | 658 
 
ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.inf
 |  48 ++
 4 files changed, 812 insertions(+)

diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index 
d521e107ddff15e6dc585e3a63567e3ad817189f..a6701ed3f88b9976110992dda22c11eea735cc4c
 100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -44,6 +44,9 @@ [PcdsFeatureFlag]
   #
   gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled|FALSE|BOOLEAN|0x0004
 
+[Protocols]
+  gEfiRealmApertureManagementProtocolGuid = { 0x585c00be, 0xcf7c, 0x4db8, { 
0x8a, 0xa2, 0x49, 0xd, 0x67, 0xf5, 0xf6, 0xe6 } }
+
 [PcdsFixedAtBuild, PcdsPatchableInModule]
   ##
   # This is the physical address of Rsdp which is the core struct of Acpi.
diff --git a/ArmVirtPkg/Include/Protocol/RealmApertureManagementProtocol.h 
b/ArmVirtPkg/Include/Protocol/RealmApertureManagementProtocol.h
new file mode 100644
index 
..0f45fd296fd54ec536ed3d4bd7725350ab487295
--- /dev/null
+++ b/ArmVirtPkg/Include/Protocol/RealmApertureManagementProtocol.h
@@ -0,0 +1,103 @@
+/** @file
+  Realm Aperture Management Protocol (RAMP)
+  On Arm CCA Systems the Realm protects access and visibility of Guest memory
+  and code execution from software outside the realm.
+
+  However, software executing in a Realm needs to interact with the external
+  world. This may be done using virtualised disk, network interfaces, etc.
+  The drivers for these virtualised devices need to share buffers with the host
+  OS to exchange information/data.
+
+  Since the Guest memory is protected by the Realm, the host cannot access 
these
+  buffers unless the IPA state of the buffers is changed to Protected EMPTY by
+  the software executing in the Realm.
+
+  By enabling the sharing of the buffers, we are essentially opening an
+  aperture so that the host OS can access the range of pages that are shared.
+
+  The virtual firmware (Guest firmware) needs a mechanism to manage the sharing
+  of buffers. The Realm Aperture Management Protocol provides an interface that
+  UEFI drivers/modules can use to enable/disable the sharing of buffers with 
the
+  Host. The protocol also tracks open apertures and ensures they are shut on
+  ExitBootServices.
+
+  Copyright (c) 2022 - 2023, ARM Ltd. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- RAMP  - Realm Aperture Management Protocol
+**/
+
+#ifndef REALM_APERTURE_MANAGEMENT_PROTOCOL_H_
+#define REALM_APERTURE_MANAGEMENT_PROTOCOL_H_
+
+/** This macro defines the Realm Aperture Management Protocol GUID.
+
+  GUID: {585C00BE-CF7C-4DB8-8AA2-490D67F5F6E6}
+*/
+#define EDKII_REALM_APERTURE_MANAGEMENT_PROTOCOL_GUID \
+  { 0x585c00be, 0xcf7c, 0x4db8, \
+{ 0x8a, 0xa2, 0x49, 0xd, 0x67, 0xf5, 0xf6, 0xe6 }   \
+  };
+
+/** This macro defines the Realm Aperture Management Protocol Revision.
+*/
+#define EDKII_REALM_APERTURE_MANAGEMENT_PROTOCOL_REVISION  0x0001
+
+#pragma pack(1)
+
+/** Enables sharing of the memory buffers with the host.
+
+  @param [in]  Memory Pointer to the page start address.
+  @param [in]  Pages  Number of pages to share.
+  @param [out] ApertureReference  Reference to the opened aperture.
+
+  @retval EFI_SUCCESS Success.
+  @retval EFI_INVALID_PARAMETER   A parameter is invalid.
+  @retval EFI_OUT_OF_RESOURCESMemory allocation failed.
+  @retval EFI_ACCESS_DENIED   Aperture already open over memory region.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_REALM_APERTURE_MANAGEMENT_PROTOCOL_OPEN_APERTURE)(
+  IN  CONST EFI_PHYSICAL_ADDRESSMemory,
+  IN  CONST UINTN   Pages,
+  OUT   EFI_HANDLE  *CONST ApertureReference
+  );
+
+/** Disables the sharing of the buffers.
+
+  @param [in] ApertureReference   Reference to the aperture for closing.
+
+  @retval EFI_SUCCESS The operation completed successfully.
+  @retval EFI_INVALID_PARAMETER

[edk2-devel] [PATCH v2 39/45] ArmVirtPkg: RMM 1.0-eac2 - Add Flags to RsiSetIpaState()

2024-04-12 Thread Sami Mujawar
The RMM specification 1.0-eac2 updates the RSI_IPA_STATE_SET
interface to add a new parameter RsiRipasChangeFlags.

The RsiRipasChangeFlags fieldset is 64 bits and the bit 0
describes the RsiRipasChangeDestroyed type which is used
to indicate if a RIPAS change from DESTROYED should be
permitted or not.

Therefore, update the RsiSetIpaState() to add a new
parameter for specifying the RsiRipasChangeFlags.

Also update the usage of RsiSetIpaState() in ArmCcaInitPeiLib
and in RealmApertureManagementProtocolDxe.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  
| 4 +++-
 ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c 
| 3 ++-
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
| 7 +--
 
ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.c
 | 6 --
 4 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
154a5717f259502952a36312f6c3b3d6b75f15cb..5c2f996d3b4376e831a901f2919780acffec3313
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -205,6 +205,7 @@ RsiGetIpaState (
   @param [in]   Address Address to the start of the memory range.
   @param [in]   SizeLength of the memory range.
   @param [in]   State   The RIPAS state to be configured.
+  @param [in]   Flags   The RIPAS change flags.
 
   @retval RETURN_SUCCESSSuccess.
   @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
@@ -214,7 +215,8 @@ EFIAPI
 RsiSetIpaState (
   IN  UINT64  *Address,
   IN  UINT64  Size,
-  IN  RIPAS   State
+  IN  RIPAS   State,
+  IN  UINT64  Flags
   );
 
 /**
diff --git a/ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c 
b/ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c
index 
2b2801cc5426994efc15c970fd6b0adf43bd7d36..e59a990da42526e280c1951b404e318df6a7bfca
 100644
--- a/ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c
@@ -50,7 +50,8 @@ ArmCcaConfigureSystemMemory (
   Status =  RsiSetIpaState (
   (UINT64 *)PcdGet64 (PcdSystemMemoryBase),
   PcdGet64 (PcdSystemMemorySize),
-  RipasRam
+  RipasRam,
+  RIPAS_CHANGE_FLAGS_RSI_NO_CHANGE_DESTROYED
   );
   if (RETURN_ERROR (Status)) {
 // Panic
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
0280d8e42882ddfb02d0a40c47a6fba7855ba84f..0535254a3991bfe7a19b904e83b9482f801da20c
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -11,7 +11,7 @@
 - REM  - Realm Extensible Measurement
 
   @par Reference(s):
-   - Realm Management Monitor (RMM) Specification, version 1.0-eac1
+   - Realm Management Monitor (RMM) Specification, version 1.0-eac2
  (https://developer.arm.com/documentation/den0137/)
 
 **/
@@ -318,6 +318,7 @@ RsiGetIpaState (
   @param [in]   Address Address to the start of the memory range.
   @param [in]   SizeLength of the memory range.
   @param [in]   State   The RIPAS state to be configured.
+  @param [in]   Flags   The RIPAS change flags.
 
   @retval RETURN_SUCCESSSuccess.
   @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
@@ -327,7 +328,8 @@ EFIAPI
 RsiSetIpaState (
   IN  UINT64  *Address,
   IN  UINT64  Size,
-  IN  RIPAS   State
+  IN  RIPAS   State,
+  IN  UINT64  Flags
   )
 {
   RETURN_STATUS  Status;
@@ -353,6 +355,7 @@ RsiSetIpaState (
 SmcCmd.Arg1 = (UINTN)BaseAddress;
 SmcCmd.Arg2 = (UINTN)EndAddress;
 SmcCmd.Arg3 = (UINTN)State;
+SmcCmd.Arg4 = Flags;
 
 ArmCallSmc ();
 Status = RsiCmdStatusToEfiStatus (SmcCmd.Arg0);
diff --git 
a/ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.c
 
b/ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.c
index 
991054d47b10b45ed5c211827e795d88f8942c02..9212f0f6d2522a59bf289d2699d0972a074b8f9d
 100644
--- 
a/ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.c
+++ 
b/ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.c
@@ -236,7 +236,8 @@ RampOpenAperture (
   Status = RsiSetIpaState (
  (UINT64 *)Memory,
  (Pages * EFI_PAGE_SIZE),
- RipasEmpty
+ RipasEmpty,
+ RIPAS_CHANGE_FLAGS_RSI_NO_CHANGE_DESTROYED
  );
   if (RETURN_ERROR (Status)) {
 DEBUG ((
@@ -335,7 +336,8 @@ RampCloseAperture (
   Status = RsiSetIpaState (
  (UINT64 *)ApertInfo->BaseAddress,
  (ApertInfo->Pages * EFI_PAGE_SIZE),
- Ri

[edk2-devel] [PATCH v2 27/45] ArmVirtPkg: Enable Virtio communication for Arm CCA

2024-04-12 Thread Sami Mujawar
Arm CCA Realms protect the access to memory from outside the
Realm. For Virtio to work the Realm Guest and the Host should
be able to share buffers.

Realm Aperture Management protocol (RAMP) manages the sharing
of buffers between the Realm Guest and the Host, while the
ArmCcaIoMmuDxe implements the EDKII_IOMMU_PROTOCOL which
provides the necessary hooks so that DMA accesses can be
performed by bouncing buffers using pages shared with the
host.

Therefore, enable the support for Realm Aperture Management
Protocol and ArmCcaIoMmuDxe for Kvmtool Guest firmware.

Note: The ArmCcaIoMmuDxe and RAMP check if the code is executing
in a Realm before installing the respective protocols. If the
code is not executing in a Realm the gIoMmuAbsentProtocolGuid is
installed, thereby allowing the same firmware to be used both for
normal and Realm Guest firmware.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirtKvmTool.dsc | 13 +++--
 ArmVirtPkg/ArmVirtKvmTool.fdf | 10 ++
 2 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index 
33eb280f91413141cacb6526375c2733778a853c..c358b0a55daea8f8231b037cc63005cc86fe9a18
 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -401,9 +401,18 @@ [Components.common]
   #
   SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf
 
-!if $(ARCH) == AARCH64
+[Components.AARCH64]
   #
   # ACPI Support
   #
   ArmVirtPkg/KvmtoolCfgMgrDxe/ConfigurationManagerDxe.inf
-!endif
+
+  #
+  # Realm Aperture Management
+  #
+  
ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.inf
+
+  #
+  # IoMMU support for Arm CCA
+  #
+  ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmuDxe.inf
diff --git a/ArmVirtPkg/ArmVirtKvmTool.fdf b/ArmVirtPkg/ArmVirtKvmTool.fdf
index 
cdf756c11289b90cb3815295a6cb38cb2f74916f..07d86f649e01a9e61f2acb76f748a95eb57c0a6e
 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.fdf
+++ b/ArmVirtPkg/ArmVirtKvmTool.fdf
@@ -212,6 +212,16 @@ [FV.FvMain]
   !include DynamicTablesPkg/DynamicTables.fdf.inc
 
   INF ArmVirtPkg/KvmtoolCfgMgrDxe/ConfigurationManagerDxe.inf
+
+  #
+  # Realm Aperture Management
+  #
+  INF 
ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.inf
+
+  #
+  # IoMMU support for Arm CCA
+  #
+  INF ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmuDxe.inf
 !endif
 
   #
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 31/45] ArmVirtPkg: ArmCcaRsiLib: Fix size of Imm field in HostCallArgs

2024-04-12 Thread Sami Mujawar
The section B4.4.2 'RsiHostCall type' of the RMM specification
version A-bet0 specifies the Imm field in HostCallArgs structure
as a 16 bit wide value and the offset for the gprs[0] field is
0x8, which means the 6 bytes after the Imm field are padded.

Therefore, define the Imm field as UINT16 and add an additional
field UINT8 Reserved1[6] for padding.

Also update the RsiHostCall() to initialise the Reserved1 field
to zero.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  | 4 +++-
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
db1ae5b4c1a6475a275ce6be3383ea933ec9af20..af4be275d37f0376335de5344f9626c9a92c70d2
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -85,7 +85,9 @@ typedef struct RealmConfig {
 See Section 4.4.2 RsiHostCall type, RMM Specification, version A-bet0
 */
 typedef struct HostCallArgs {
-  UINT64Imm;
+  UINT16Imm;
+  UINT8 Reserved1[6];
+
   UINT64Gprs0;
   UINT64Gprs1;
   UINT64Gprs2;
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
79a65300f05af665b3afebe2a8f8b1f6faf76f23..dc41e77b55f4369e89592b5437e525baf80aa0b3
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -519,6 +519,7 @@ RsiHostCall (
   STATIC_ASSERT (sizeof (HOST_CALL_ARGS) == SIZE_4KB);
 
   // Clear the reserved fields
+  ZeroMem (>Reserved1, sizeof (Args->Reserved1));
   ZeroMem (>Reserved, sizeof (Args->Reserved));
 
   ZeroMem (, sizeof (SmcCmd));
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 16/45] ArmVirtPkg: Qemu: Add a NULL implementation of ArmCcaConfigureMmio

2024-04-12 Thread Sami Mujawar
To support Arm CCA, a hook function ArmCcaConfigureMmio () has
been added to the ArmVirtMemInfoLib library.

Since, Arm CCA has not been enabled for the Qemu guest firmware,
update the QemuVirtMemInfoLib library to add a NULL implementation
for ArmCcaConfigureMmio () that returns RETURN_UNSUPPORTED.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c | 21 

 1 file changed, 21 insertions(+)

diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c 
b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c
index 
62fa62e5f04668227f7412252212e0462114f85a..18fc8a4447bda601d144c240cb2d355d99321aa5
 100644
--- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c
+++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c
@@ -1,6 +1,7 @@
 /** @file
 
   Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
+  Copyright (c) 2023, Arm Limited. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -122,3 +123,23 @@ ArmVirtGetMemoryMap (
 
   *VirtualMemoryMap = VirtualMemoryTable;
 }
+
+/**
+  Configure the MMIO regions as shared with the VMM.
+
+  Set the protection attribute for the MMIO regions as Unprotected IPA.
+
+  @param[in]IpaWidth  IPA width of the Realm.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaConfigureMmio (
+  IN UINT64  IpaWidth
+  )
+{
+  return RETURN_UNSUPPORTED;
+}
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 29/45] ArmVirtPkg: Kvmtool: Switch to use BaseRng for AArch64

2024-04-12 Thread Sami Mujawar
The kvmtool guest firmware is using the default RNG library
defined in ArmVirtPkg.dsc.inc which is BaseRngLibTimerLib.

BaseRngLibTimerLib is only present to use for test purposes on
platforms that do not have a suitable RNG source and must not be
used for production purposes.

Armv8.5 introduces random number instructions (e.g., RNDR) which
return a 64-bit random number. Although, this feature is optional,
it can be assumed that most modern platforms will implement this
support. This feature i.e. FEAT_RNG can be discovered by examining
the processor feature registers.

It is therefore desirable to use the RNDR instructions instead of
using the default BaseRngLibTimerLib which is unsafe.

The BaseRngLib in MdePkg already implements the RNG support using
RNDR. However, it is worth noting that FEAT_RNG is supported in
AArch64 state only. Therefore, switch to using the BaseRngLib
instance for AArch64 firmware builds. The AArch32 firmware builds
will continue to use BaseRngLibTimerLib.

Note: The guest firmware already supports Virtio RNG. So, should
the processor not implement FEAT_RNG, the guest firmware can fall
back to use Virtio RNG.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirtKvmTool.dsc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index 
c358b0a55daea8f8231b037cc63005cc86fe9a18..835e4f1a5a618537d885682322a288f12b8ce8dd
 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -90,6 +90,7 @@ [LibraryClasses.common]
 [LibraryClasses.AARCH64]
   ArmCcaLib|ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.inf
   ArmCcaRsiLib|ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.inf
+  RngLib|MdePkg/Library/BaseRngLib/BaseRngLib.inf
 
 [LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE, 
LibraryClasses.common.PEIM]
   PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 19/45] ArmVirtPkg: Kvmtool: Use Null version of DebugLib in PrePi

2024-04-12 Thread Sami Mujawar
The patch at "6c8a08bd8a680 ArmVirtPkg/PrePi: Ensure timely
 execution of library constructors" moved the processing of
library constructors before the MMU is initialised.

This resulted in the BaseDebugLibSerialPort library constructor
BaseDebugLibSerialPortConstructor () which initialises the serial
port, being invoked before the MMU is enabled.

However, the Realm Code requires the protection attribute of
the MMIO regions to be configured as unprotected (shared with
the host), which requires the MMU to be enabled. Otherwise,
accesses to the MMIO region result in a synchronous external
abort being reflected to the Realm by the RMM.

Therefore, link the Null version of DebugLib in PrePi stage.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirtKvmTool.dsc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index 
20da3319667900e64755272fa110d57452d1fc67..d09b3e06928ad70dba8581bd605a7c76b231ba61
 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -250,6 +250,7 @@ [Components.common]
   #
   ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf {
 
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
   
ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
   
LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
   PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 05/45] ArmVirtPkg: ArmCcaRsiLib: Add interfaces to manage the Realm IPA state

2024-04-12 Thread Sami Mujawar
The IPA space of a Realm is divided into two halves: Protected IPA space
and Unprotected IPA space. Software in a Realm should treat the most
significant bit of an IPA as a protection attribute. A Protected IPA is
an address in the lower half of a Realm's IPA space. An Unprotected IPA
is an address in the upper half of a Realm's IPA space.

A Protected IPA has an associated Realm IPA state (RIPAS). The RIPAS
values are:
 * EMPTY  - Unused address
 * RAM- Private code or data owned by the Realm.

Software in the Realm needs to share memory with the host to communicate
with the outside world, e.g. network, disk image, etc.

To share memory, the software in the Realm first transitions the RIPAS
of memory region it wants to share with the host from RAM to EMPTY. The
Realm software can then access the shared memory region using the
Unprotected IPA address.

The RMM specification defines the following Realm Service Interfaces for
managing the IPA state:
 * RSI_IPA_STATE_GET
 * RSI_IPA_STATE_SET

Therefore, update the ArmCcaRsiLib to add interfaces to get and set the
IPA state of Realm memory pages.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  | 50 +++
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h|  7 +-
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 92 
 3 files changed, 147 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
ab70240b3ab2979996f20190ddf669b53183556b..0c7f1afc78252b286a20dd8a7a81d538cf76ea8f
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -6,6 +6,7 @@
 
 - Rsi or RSI   - Realm Service Interface
 - IPA  - Intermediate Physical Address
+- RIPAS- Realm IPA state
 
   @par Reference(s):
- Realm Management Monitor (RMM) Specification, version A-bet0
@@ -24,6 +25,21 @@
 */
 #define REALM_GRANULE_SIZE  SIZE_4KB
 
+/**
+  A macro defining the mask for the RSI RIPAS type.
+  See Section B4.4.5 RsiRipas type, RMM Specification, version A-bet0.
+*/
+#define RIPAS_TYPE_MASK  0xFF
+
+/** An enum describing the RSI RIPAS.
+   See Section A5.2.2 Realm IPA state, RMM Specification, version A-bet0
+*/
+typedef enum Ripas {
+  RipasEmpty,  ///< Unused IPA location.
+  RipasRam,///< Private code or data owned by the Realm.
+  RipasMax ///< A valid RIPAS type value is less than RipasMax.
+} RIPAS;
+
 /** A structure describing the Realm Configuration.
   See Section B4.4.4 RsiRealmConfig type, RMM Specification, version A-bet0
   The width of the RsiRealmConfig structure is 4096 (0x1000) bytes.
@@ -35,6 +51,40 @@ typedef struct RealmConfig {
   UINT8 Reserved[SIZE_4KB - sizeof (UINT64)];
 } REALM_CONFIG;
 
+/**
+  Returns the IPA state for the page pointed by the address.
+
+  @param [in]   Address Address to retrive IPA state.
+  @param [out]  State   The RIPAS state for the address specified.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiGetIpaState (
+  IN   UINT64  *Address,
+  OUT  RIPAS   *State
+  );
+
+/**
+  Sets the IPA state for the pages pointed by the memory range.
+
+  @param [in]   Address Address to the start of the memory range.
+  @param [in]   SizeLength of the memory range.
+  @param [in]   State   The RIPAS state to be configured.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiSetIpaState (
+  IN  UINT64  *Address,
+  IN  UINT64  Size,
+  IN  RIPAS   State
+  );
+
 /**
   Read the Realm Configuration.
 
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
index 
90e9dbb609679c82cd8e8ee8081428fd97021f97..9cc12bc5a70b457367077d0b26011c3b91fa63c9
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -7,6 +7,7 @@
   @par Glossary:
 - Rsi or RSI   - Realm Service Interface
 - IPA  - Intermediate Physical Address
+- RIPAS- Realm IPA state
 
   @par Reference(s):
- Realm Management Monitor (RMM) Specification, version A-bet0
@@ -17,8 +18,10 @@
 #define ARM_CCA_RSI_H_
 
 // FIDs for Realm Service Interface calls.
-#define FID_RSI_REALM_CONFIG  0xC4000196
-#define FID_RSI_VERSION   0xC4000190
+#define FID_RSI_IPA_STATE_GET  0xC4000198
+#define FID_RSI_IPA_STATE_SET  0xC4000197
+#define FID_RSI_REALM_CONFIG   0xC4000196
+#define FID_RSI_VERSION0xC4000190
 
 /** RSI Command Return codes
See Section B4.4.1, RMM Specification, version A-bet0.
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
42b99fb7a71c8b38512a2f7472f9bc8

[edk2-devel] [PATCH v2 15/45] ArmVirtPkg: CloudHv: Add a NULL implementation of ArmCcaConfigureMmio

2024-04-12 Thread Sami Mujawar
To support Arm CCA, a hook function ArmCcaConfigureMmio () has
been added to the ArmVirtMemInfoLib library.

Since, Arm CCA has not been enabled for the Cloud Hypervisor guest
firmware, update the CloudHvVirtMemInfoLib library to add a NULL
implementation for ArmCcaConfigureMmio () that returns
RETURN_UNSUPPORTED.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c | 22 
+++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c 
b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
index 
98cc13870599c10bfab5029de9f7730a67099b72..c47ddc4a16caf9b3755617627718789098aa2f26
 100644
--- a/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
+++ b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2022, Arm Limited. All rights reserved.
+  Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -241,3 +241,23 @@ ArmVirtGetMemoryMap (
 
   *VirtualMemoryMap = VirtualMemoryTable;
 }
+
+/**
+  Configure the MMIO regions as shared with the VMM.
+
+  Set the protection attribute for the MMIO regions as Unprotected IPA.
+
+  @param[in]IpaWidth  IPA width of the Realm.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaConfigureMmio (
+  IN UINT64  IpaWidth
+  )
+{
+  return RETURN_UNSUPPORTED;
+}
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 18/45] ArmVirtPkg: Configure the MMIO regions for Arm CCA

2024-04-12 Thread Sami Mujawar
The IPA space of a Realm is divided into two halves:
  - Protected IPA space and
  - Unprotected IPA space.

Software in a Realm should treat the most significant bit of an
IPA as a protection attribute.

The Unprotected IPA space is used for sharing memory and for performing
MMIO accesses with the Host.

An Unprotected IPA is an address in the upper half of a Realm's
IPA space. The most significant bit of an Unprotected IPA is 1.

The page tables for the MMIO regions must be updated to set the most
significant bit of the IPA space.

Therefore, implement ArmCcaConfigureMmio () which configures the MMIO
regions as Unprotected IPA by setting the protection attribute in the
page tables for the MMIO regions.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.c   | 39 
+++-
 ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.inf |  3 +-
 2 files changed, 40 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.c 
b/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.c
index 
79412897f2251712fafa4a9633b44235f2d7bb9b..a4fee904a43ccb8844ceaea992698a99df2a8b3c
 100644
--- a/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.c
+++ b/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.c
@@ -1,14 +1,16 @@
 /** @file
   Kvmtool virtual memory map library.
 
-  Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.
+  Copyright (c) 2018 - 2023, Arm Limited. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -96,3 +98,38 @@ ArmVirtGetMemoryMap (
 
   *VirtualMemoryMap = VirtualMemoryTable;
 }
+
+/**
+  Configure the MMIO regions as shared with the VMM.
+
+  Set the protection attribute for the MMIO regions as Unprotected IPA.
+
+  @param[in]IpaWidth  IPA width of the Realm.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaConfigureMmio (
+  IN UINT64  IpaWidth
+  )
+{
+  EFI_STATUS  Status;
+
+  if (!IsRealm ()) {
+return RETURN_UNSUPPORTED;
+  }
+
+  // Set the protection attribute for the Peripheral memory.
+  // Peripheral space before DRAM
+  Status = ArmCcaSetMemoryProtectAttribute (
+ 0,
+ PcdGet64 (PcdSystemMemoryBase),
+ IpaWidth,
+ TRUE
+ );
+  ASSERT_EFI_ERROR (Status);
+  return Status;
+}
diff --git a/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.inf 
b/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.inf
index 
a354e734ab1b7308a3e52b4e2b4885ef29592681..8e157a44dc9d11b9258d3f6182d5b169ec97ae9c
 100644
--- a/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.inf
+++ b/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  Kvmtool virtual memory map library.
 #
-#  Copyright (c) 2018, ARM Limited. All rights reserved.
+#  Copyright (c) 2018 - 2023, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -26,6 +26,7 @@ [Packages]
   MdePkg/MdePkg.dec
 
 [LibraryClasses]
+  ArmCcaLib
   ArmLib
   BaseLib
   BaseMemoryLib
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 20/45] ArmVirtPkg: Introduce ArmVirtMonitorLib library

2024-04-12 Thread Sami Mujawar
ArmMonitorLib provides an abstraction for invoking monitor calls
using a SMC or HVC conduit based on the value configured in the
PCD PcdMonitorConduitHvc.

The monitor call conduit is fixed for a platform firmware in
most scenarios. For a normal virtual machine guest firmware,
the default conduit is HVC. However, for Arm CCA the Realm
code must use SMC as the conduit.

To have a common code base for Guest/Virtual firmware to be used
by both normal VMs and Realm VMs, the firmware must dynamically
detect the conduit to be used.

Some VMMs like kvmtool setup the PSCI conduit to be used in the
device tree it hands off to the firmware. Therefore, introduce
an ArmVirt instance of ArmMontorLib that parses this device tree
to read the PSCI conduit value and issues monitor calls using
the appropriate conduit.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Library/ArmVirtMonitorLib/ArmVirtMonitorLib.c   | 119 

 ArmVirtPkg/Library/ArmVirtMonitorLib/ArmVirtMonitorLib.inf |  37 ++
 2 files changed, 156 insertions(+)

diff --git a/ArmVirtPkg/Library/ArmVirtMonitorLib/ArmVirtMonitorLib.c 
b/ArmVirtPkg/Library/ArmVirtMonitorLib/ArmVirtMonitorLib.c
new file mode 100644
index 
..a13bec36b3537a2348e7883c29c5beb6e55dc64b
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmVirtMonitorLib/ArmVirtMonitorLib.c
@@ -0,0 +1,119 @@
+/** @file
+  Arm Monitor Library.
+
+  Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  An enum representing the PSCI conduits for issuing monitor calls.
+*/
+typedef enum PsciConduit {
+  PsciConduitHvc,   // < HVC conduit
+  PsciConduitSmc,   // < SMC conduit
+  PsciConduitMax
+} PSCI_CONDUIT;
+
+/**
+  A variable that stores the PSCI conduit to be used.
+*/
+STATIC PSCI_CONDUIT  mArmPsciConduit = PsciConduitMax;
+
+/** Monitor call.
+
+  An HyperVisor Call (HVC) or System Monitor Call (SMC) will be issued
+  depending on the conduit. The library constructor for ArmVirtMonitorLib
+  determines the conduit by parsing the Device Tree handed off by the VMM
+  and initialising mArmPsciConduit.
+
+  @param [in,out]  ArgsArguments for the HVC/SMC.
+**/
+VOID
+EFIAPI
+ArmMonitorCall (
+  IN OUT ARM_MONITOR_ARGS  *Args
+  )
+{
+  switch (mArmPsciConduit) {
+case PsciConduitHvc:
+  ArmCallHvc ((ARM_HVC_ARGS *)Args);
+  break;
+case PsciConduitSmc:
+  ArmCallSmc ((ARM_SMC_ARGS *)Args);
+  break;
+default:
+  ASSERT (0);
+  CpuDeadLoop ();
+  }
+}
+
+/** Constructor for ArmVirtMonitorLib.
+
+  The library constructor for ArmVirtMonitorLib determines the conduit
+  by parsing the Device Tree handed off by the VMM and initialising
+  mArmPsciConduit, which can then be used to select the appropriate
+  conduit for invoking the monitor call.
+
+  @retval RETURN_SUCCESSThe constructor always returns RETURN_SUCCESS.
+  @retval RETURN_NOT_FOUND  An entry for the PSCI conduit was not found in
+the platform device tree.
+**/
+RETURN_STATUS
+EFIAPI
+ArmVirtMonitorLibConstructor (
+  VOID
+  )
+{
+  RETURN_STATUSStatus;
+  FDT_CLIENT_PROTOCOL  *FdtClient;
+  CONST VOID   *Prop;
+
+  Status = gBS->LocateProtocol (
+  ,
+  NULL,
+  (VOID **)
+  );
+  if (RETURN_ERROR (Status)) {
+ASSERT (0);
+return Status;
+  }
+
+  Status = FdtClient->FindCompatibleNodeProperty (
+FdtClient,
+"arm,psci-0.2",
+"method",
+,
+NULL
+);
+  if (RETURN_ERROR (Status)) {
+return Status;
+  }
+
+  if (AsciiStrnCmp (Prop, "hvc", 3) == 0) {
+mArmPsciConduit = PsciConduitHvc;
+  } else if (AsciiStrnCmp (Prop, "smc", 3) == 0) {
+mArmPsciConduit = PsciConduitSmc;
+  } else {
+DEBUG ((
+  DEBUG_ERROR,
+  "%a: Unknown PSCI method \"%a\"\n",
+  __func__,
+  Prop
+  ));
+return RETURN_NOT_FOUND;
+  }
+
+  return RETURN_SUCCESS;
+}
diff --git a/ArmVirtPkg/Library/ArmVirtMonitorLib/ArmVirtMonitorLib.inf 
b/ArmVirtPkg/Library/ArmVirtMonitorLib/ArmVirtMonitorLib.inf
new file mode 100644
index 
..d90f92d5faff96de9cd0433c1de18b0168b42592
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmVirtMonitorLib/ArmVirtMonitorLib.inf
@@ -0,0 +1,37 @@
+## @file
+#  Arm Virt Monitor Library
+#
+#  Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  INF_VERSION= 1.29
+  BASE_NAME  = ArmVirtMonitorLib
+  FILE_GUID  = 3E464

[edk2-devel] [PATCH v2 22/45] ArmVirtPkg: Add Arm CCA libraries for Kvmtool guest firmware

2024-04-12 Thread Sami Mujawar
The following libraries have been introduced for Arm CCA:
 * ArmCcaInitPeiLib - provides functions for ARM CCA
  initialisations in early PEI phase.
 * ArmCcaLib- provides the necessary helper functions
  for Arm CCA
 * ArmCcaRsiLib - implements functions to call the Realm
  Service Interface.

Therefore, add these libraries in the Kvmtool guest firmware
workspace as part of enabling support for Arm CCA.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirtKvmTool.dsc | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index 
a310fbd53ec7a37805865525da142e0610846f86..33eb280f91413141cacb6526375c2733778a853c
 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -87,6 +87,10 @@ [LibraryClasses.common]
   ArmMonitorLib|ArmVirtPkg/Library/ArmVirtMonitorLib/ArmVirtMonitorLib.inf
   ArmTrngLib|ArmPkg/Library/ArmTrngLib/ArmTrngLib.inf
 
+[LibraryClasses.AARCH64]
+  ArmCcaLib|ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.inf
+  ArmCcaRsiLib|ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.inf
+
 [LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE, 
LibraryClasses.common.PEIM]
   PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
   
PlatformHookLib|ArmVirtPkg/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.inf
@@ -100,6 +104,9 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER]
   
DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf
 !endif
 
+[LibraryClasses.AARCH64.SEC, LibraryClasses.AARCH64.PEI_CORE, 
LibraryClasses.AARCH64.PEIM]
+  ArmCcaInitPeiLib|ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.inf
+
 [LibraryClasses.common.UEFI_DRIVER]
   UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
 
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 08/45] ArmVirtPkg: ArmCcaRsiLib: Add an interface to make a RSI Host Call

2024-04-12 Thread Sami Mujawar
The Section A4.5 Host call, RMM Specification, version A-bet0
describes the programming model for Realm communication with
the Host and specifies the following:
  DYDJWT - A Host call is a call made by the Realm to the Host, by
   execution of the RSI_HOST_CALL command.
  IXNFKZ - A Host call can be used by a Realm to make a hypercall.
  DYDJWT - A Host call is a call made by the Realm to the Host, by
   execution of the RSI_HOST_CALL command.

Therefore, introduce definition of HOST_CALL_ARGS structure that
represents the arguments to the RSI_HOST_CALL command as defined
in Section B4.3.3 RSI_HOST_CALL command.

Also update the ArmCcaRsiLib library to add a new interface
RsiHostCall () to make a Host call.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  | 36 ++
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h|  1 +
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 40 
 3 files changed, 77 insertions(+)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
99a8175262331f4b0ddc098c3c62a20954b2b516..db1ae5b4c1a6475a275ce6be3383ea933ec9af20
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -81,6 +81,21 @@ typedef struct RealmConfig {
   UINT8 Reserved[SIZE_4KB - sizeof (UINT64)];
 } REALM_CONFIG;
 
+/** A structure describing the Host Call arguments
+See Section 4.4.2 RsiHostCall type, RMM Specification, version A-bet0
+*/
+typedef struct HostCallArgs {
+  UINT64Imm;
+  UINT64Gprs0;
+  UINT64Gprs1;
+  UINT64Gprs2;
+  UINT64Gprs3;
+  UINT64Gprs4;
+  UINT64Gprs5;
+  UINT64Gprs6;
+  UINT8 Reserved[0x1000 - (sizeof (UINT64) * 8)];
+} HOST_CALL_ARGS;
+
 /**
   Retrieve an attestation token from the RMM.
 
@@ -198,6 +213,27 @@ RsiGetRealmConfig (
   IN  REALM_CONFIG  *Config
   );
 
+/**
+  Make a Host Call.
+
+  A Host call can be used by a Realm to make a hypercall.
+  On Realm execution of HVC, an Unknown exception is taken to the Realm.
+
+  @param [in] ArgsPointer to the IPA of the Host call data
+  structure.
+
+  Note: The IPA of the Host call arguments data structure must be aligned
+ to the Realm granule size.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiHostCall (
+  IN  HOST_CALL_ARGS  *Args
+  );
+
 /**
Get the version of the RSI implementation.
 
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
index 
6f0ee3061ade5a4a99b717a52d5a241e0e446270..70e84a20711f04c32a5850230cc907a6d231f50b
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -20,6 +20,7 @@
 // FIDs for Realm Service Interface calls.
 #define FID_RSI_ATTESTATION_TOKEN_CONTINUE  0xC4000195
 #define FID_RSI_ATTESTATION_TOKEN_INIT  0xC4000194
+#define FID_RSI_HOST_CALL   0xC4000199
 #define FID_RSI_IPA_STATE_GET   0xC4000198
 #define FID_RSI_IPA_STATE_SET   0xC4000197
 #define FID_RSI_MEASUREMENT_EXTEND  0xC4000193
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
eb9896668a267f2cdf30f36bd14697d56d2612ed..79a65300f05af665b3afebe2a8f8b1f6faf76f23
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -489,6 +489,46 @@ RsiGetRealmConfig (
   return RsiCmdStatusToEfiStatus (SmcCmd.Arg0);
 }
 
+/**
+  Make a Host Call.
+
+  A Host call can be used by a Realm to make a hypercall.
+  On Realm execution of HVC, an Unknown exception is taken to the Realm.
+
+  @param [in] ArgsPointer to the IPA of the Host call data
+  structure.
+
+  Note: The IPA of the Host call arguments data structure must be aligned
+ to the Realm granule size.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiHostCall (
+  IN  HOST_CALL_ARGS  *Args
+  )
+{
+  ARM_SMC_ARGS  SmcCmd;
+
+  if ((Args == NULL) || (!AddrIsGranuleAligned ((UINT64 *)Args))) {
+return RETURN_INVALID_PARAMETER;
+  }
+
+  STATIC_ASSERT (sizeof (HOST_CALL_ARGS) == SIZE_4KB);
+
+  // Clear the reserved fields
+  ZeroMem (>Reserved, sizeof (Args->Reserved));
+
+  ZeroMem (, sizeof (SmcCmd));
+  SmcCmd.Arg0 = FID_RSI_HOST_CALL;
+  SmcCmd.Arg1 = (UINTN)Args;
+
+  ArmCallSmc ();
+  return RsiCmdStatusToEfiStatus (SmcCmd.Arg0);
+}
+
 /**
Get the version of the RSI implementation.
 
-- 
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[edk2-devel] [PATCH v2 14/45] ArmVirtPkg: Define an interface to configure MMIO regions for Arm CCA

2024-04-12 Thread Sami Mujawar
The IPA space of a Realm is divided into two halves:
  - Protected IPA space and
  - Unprotected IPA space.

Software in a Realm should treat the most significant bit of an
IPA as a protection attribute.

The Unprotected IPA space is used for sharing memory and for performing
MMIO accesses with the Host.

An Unprotected IPA is an address in the upper half of a Realm's
IPA space. The most significant bit of an Unprotected IPA is 1.

Therefore, the page tables for the MMIO regions must be updated to set
the most significant bit of the IPA space.

To facilitate this define ArmCcaConfigureMmio () that can be called
during the early firmware startup.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h | 19 ++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h 
b/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h
index 
7812c2e28657ca9525880dcc0d16d7bca90cc334..b70a96ed923e8c2654e51c9714074744a4d5f0c2
 100644
--- a/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h
+++ b/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h
@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+  Copyright (c) 2011-2023, Arm Limited. All rights reserved.
   Copyright (c) 2017, Linaro, Ltd. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -32,4 +32,21 @@ ArmVirtGetMemoryMap (
   OUT ARM_MEMORY_REGION_DESCRIPTOR  **VirtualMemoryMap
   );
 
+/**
+  Configure the MMIO regions as shared with the VMM.
+
+  Set the protection attribute for the MMIO regions as Unprotected IPA.
+
+  @param[in]IpaWidth  IPA width of the Realm.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaConfigureMmio (
+  IN UINT64  IpaWidth
+  );
+
 #endif
-- 
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[edk2-devel] [PATCH v2 24/45] ArmVirtPkg: Perform Arm CCA initialisation in the Pei phase

2024-04-12 Thread Sami Mujawar
Add ArmCcaInitialize () to perform Arm CCA specific initialisation
like:
 - Reading the Realm Config by calling the RSI interface.
 - Storing the IPA width of the Realm in PcdArmCcaEarlyIpaWidth.
 - Configuring the MMIO regions to update the page tables to set
   the protection attribute as Unprotected IPA.

Note: ArmCcaInitialize () is implemented in ArmCcaInitPeiLib for
which a Null implementation is provided. Therefore, this change
should not break existing platforms that do not implement the
Arm CCA.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/PrePi/PrePi.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/ArmVirtPkg/PrePi/PrePi.c b/ArmVirtPkg/PrePi/PrePi.c
index 
f27e0ad3d223820f60d1f8087325a96c60ebe876..405da60177f56238a79687ff8e1839207b14afd3
 100755
--- a/ArmVirtPkg/PrePi/PrePi.c
+++ b/ArmVirtPkg/PrePi/PrePi.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -34,6 +35,7 @@ PrePiMain (
   CHAR8   Buffer[100];
   UINTN   CharCount;
   UINTN   StacksSize;
+  RETURN_STATUS   RetStatus;
 
   // Initialize the architecture specific bits
   ArchInitialize ();
@@ -61,6 +63,12 @@ PrePiMain (
   Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 
(PcdSystemMemoryUefiRegionSize));
   ASSERT_EFI_ERROR (Status);
 
+  // Perform the Arm CCA specific initialisations.
+  RetStatus = ArmCcaInitialize ();
+  if (RETURN_ERROR (RetStatus)) {
+CpuDeadLoop ();
+  }
+
   // Initialize the Serial Port
   SerialPortInitialize ();
   CharCount = AsciiSPrint (
-- 
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[edk2-devel] [PATCH v2 17/45] ArmVirtPkg: Xen: Add a NULL implementation of ArmCcaConfigureMmio

2024-04-12 Thread Sami Mujawar
To support Arm CCA, a hook function ArmCcaConfigureMmio () has
been added to the ArmVirtMemInfoLib library.

Since, Arm CCA has not been enabled for the Xen guest firmware,
update the XenVirtMemInfoLib library to add a NULL implementation
for ArmCcaConfigureMmio () that returns RETURN_UNSUPPORTED.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c | 21 

 1 file changed, 21 insertions(+)

diff --git a/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c 
b/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c
index 
ac0c75aecfe54090788836f2eea097f4abb112a3..8a9f6e1e1eee91ec2fc1418b342c0966548e8a6c
 100644
--- a/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c
+++ b/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c
@@ -1,6 +1,7 @@
 /** @file
 
   Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
+  Copyright (c) 2023, Arm Limited. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -55,3 +56,23 @@ ArmVirtGetMemoryMap (
 
   *VirtualMemoryMap = mVirtualMemoryTable;
 }
+
+/**
+  Configure the MMIO regions as shared with the VMM.
+
+  Set the protection attribute for the MMIO regions as Unprotected IPA.
+
+  @param[in]IpaWidth  IPA width of the Realm.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaConfigureMmio (
+  IN UINT64  IpaWidth
+  )
+{
+  return RETURN_UNSUPPORTED;
+}
-- 
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[edk2-devel] [PATCH v2 04/45] ArmVirtPkg: Add Arm CCA Realm Service Interface Library

2024-04-12 Thread Sami Mujawar
The Realm Management Monitor (RMM) is a software component which
forms part of a system which implements the Arm Confidential Compute
Architecture (CCA) and is responsible for management of Realms.
The RMM specification defines a Realm Service Interface (RSI) that
the Guest can use to request services from the RMM.

Therefore, add a library that implements the RSI interfaces to:
  - query the RSI version
  - get the Realm configuration.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirtPkg.dec|   1 +
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h|  72 ++
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h  |  40 ++
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c   | 145 
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.inf |  29 
 5 files changed, 287 insertions(+)

diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index 
6aa5ea05f4e9bfc7aa17d40777dda916ccc82798..d92cb52fc30a6f0ee3469fbd2a940f88e9cf2c67
 100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -26,6 +26,7 @@ [Includes.common]
   Include# Root include for the package
 
 [LibraryClasses]
+  ArmCcaRsiLib|Include/Library/ArmCcaRsiLib.h
   ArmVirtMemInfoLib|Include/Library/ArmVirtMemInfoLib.h
 
 [Guids.common]
diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
new file mode 100644
index 
..ab70240b3ab2979996f20190ddf669b53183556b
--- /dev/null
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -0,0 +1,72 @@
+/** @file
+  Library that implements the Arm CCA Realm Service Interface calls.
+
+  Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+- Rsi or RSI   - Realm Service Interface
+- IPA  - Intermediate Physical Address
+
+  @par Reference(s):
+   - Realm Management Monitor (RMM) Specification, version A-bet0
+ (https://developer.arm.com/documentation/den0137/)
+**/
+
+#ifndef ARM_CCA_RSI_LIB_
+#define ARM_CCA_RSI_LIB_
+
+#include 
+
+/**
+  A macro defining the size of a Realm Granule.
+  See Section A2.2, RMM Specification, version A-bet0
+  DNBXXX A Granule is a unit of physical memory whose size is 4KB.
+*/
+#define REALM_GRANULE_SIZE  SIZE_4KB
+
+/** A structure describing the Realm Configuration.
+  See Section B4.4.4 RsiRealmConfig type, RMM Specification, version A-bet0
+  The width of the RsiRealmConfig structure is 4096 (0x1000) bytes.
+*/
+typedef struct RealmConfig {
+  // Width of IPA in bits.
+  UINT64IpaWidth;
+  // Unused bits of the RsiRealmConfig structure should be zero.
+  UINT8 Reserved[SIZE_4KB - sizeof (UINT64)];
+} REALM_CONFIG;
+
+/**
+  Read the Realm Configuration.
+
+  @param [out]  Config Pointer to the address of the buffer to retrieve
+   the Realm configuration.
+
+  Note: The buffer to retrieve the Realm configuration must be aligned to the
+Realm granule size.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiGetRealmConfig (
+  IN  REALM_CONFIG  *Config
+  );
+
+/**
+   Get the version of the RSI implementation.
+
+  @param [out] Major  The major version of the RSI implementation.
+  @param [out] Minor  The minor version of the RSI implementation.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+ */
+RETURN_STATUS
+EFIAPI
+RsiGetVersion (
+  OUT UINT16 *CONST  Major,
+  OUT UINT16 *CONST  Minor
+  );
+
+#endif // ARM_CCA_RSI_LIB_
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
new file mode 100644
index 
..90e9dbb609679c82cd8e8ee8081428fd97021f97
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -0,0 +1,40 @@
+/** @file
+  Definitions for Arm CCA Realm Service Interface.
+
+  Copyright (c) 2022 - 2023, ARM Ltd. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Rsi or RSI   - Realm Service Interface
+- IPA  - Intermediate Physical Address
+
+  @par Reference(s):
+   - Realm Management Monitor (RMM) Specification, version A-bet0
+ (https://developer.arm.com/documentation/den0137/)
+**/
+
+#ifndef ARM_CCA_RSI_H_
+#define ARM_CCA_RSI_H_
+
+// FIDs for Realm Service Interface calls.
+#define FID_RSI_REALM_CONFIG  0xC4000196
+#define FID_RSI_VERSION   0xC4000190
+
+/** RSI Command Return codes
+   See Section B4.4.1, RMM Specification, version A-bet0.
+   The width of the RsiCommandReturnCode enumeration is 64 bits.
+*/
+#define RSI_SUCCESS  0ULL
+#define RSI_ERROR_INPUT  1ULL
+#define RSI_ERROR_STATE  2ULL
+#define RSI_INCOMPLETE   3ULL
+
+/** RSI interface Version
+   See Section B4.4.3,  RMM

[edk2-devel] [PATCH v2 12/45] ArmVirtPkg: Add library for Arm CCA helper functions

2024-04-12 Thread Sami Mujawar
Introduce ArmCcaLib library that implements helper
functions to:
- probe if the code is executing in a Realm context
- configure the protection attribute in page tables
  for the memory regions shared with the host
- get the IPA width of the Realm which was stored in
  the GUID HOB gArmCcaIpaWidthGuid.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirtPkg.dec  |   1 +
 ArmVirtPkg/Include/Library/ArmCcaLib.h | 114 +
 ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c   | 174 
 ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.inf |  34 
 4 files changed, 323 insertions(+)

diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index 
23179c89704db789ab649de81873924c3958ab2a..d521e107ddff15e6dc585e3a63567e3ad817189f
 100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -27,6 +27,7 @@ [Includes.common]
 
 [LibraryClasses]
   ArmCcaInitPeiLib|Include/Library/ArmCcaInitPeiLib.h
+  ArmCcaLib|Include/Library/ArmCcaLib.h
   ArmCcaRsiLib|Include/Library/ArmCcaRsiLib.h
   ArmVirtMemInfoLib|Include/Library/ArmVirtMemInfoLib.h
 
diff --git a/ArmVirtPkg/Include/Library/ArmCcaLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaLib.h
new file mode 100644
index 
..a47e14b507f1bfd1feece636063eb2ba83357a5b
--- /dev/null
+++ b/ArmVirtPkg/Include/Library/ArmCcaLib.h
@@ -0,0 +1,114 @@
+/** @file
+  Library that implements the Arm CCA helper functions.
+
+  Copyright (c) 2022 - 2023, Arm Ltd. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+- Rsi or RSI   - Realm Service Interface
+- IPA  - Intermediate Physical Address
+- RIPAS- Realm IPA state
+**/
+
+#ifndef ARM_CCA_LIB_
+#define ARM_CCA_LIB_
+
+#include 
+#include 
+
+/**
+  Check if running in a Realm.
+
+@retval TRUEThe execution is within the context of a Realm.
+@retval FALSE   The execution is not within the context of a Realm.
+**/
+BOOLEAN
+EFIAPI
+IsRealm (
+  VOID
+  );
+
+/**
+  Configure the protection attribute for the page tables
+  describing the memory region.
+
+  The IPA space of a Realm is divided into two halves:
+- Protected IPA space and
+- Unprotected IPA space.
+
+  Software in a Realm should treat the most significant bit of an
+  IPA as a protection attribute.
+
+  A Protected IPA is an address in the lower half of a Realms IPA
+  space. The most significant bit of a Protected IPA is 0.
+
+  An Unprotected IPA is an address in the upper half of a Realms
+  IPA space. The most significant bit of an Unprotected IPA is 1.
+
+  Note:
+  - Configuring the memory region as Unprotected IPA enables the
+Realm to share the memory region with the Host.
+  - This function updates the page table entries to reflect the
+protection attribute.
+  - A separate call to transition the memory range using the Realm
+Service Interface (RSI) RSI_IPA_STATE_SET command is additionally
+required and is expected to be done outside this function.
+
+@param [in]  BaseAddress  Base address of the memory region.
+@param [in]  Length   Length of the memory region.
+@param [in]  IpaWidth IPA width of the Realm.
+@param [in]  ShareIf TRUE, set the most significant
+  bit of the IPA to configure the memory
+  region as Unprotected IPA.
+  If FALSE, clear the most significant
+  bit of the IPA to configure the memory
+  region as Protected IPA.
+
+@retval RETURN_SUCCESSIPA protection attribute updated.
+@retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+@retval RETURN_UNSUPPORTEDThe request is not initiated in a
+  Realm.
+**/
+RETURN_STATUS
+EFIAPI
+ArmCcaSetMemoryProtectAttribute (
+  IN EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN UINT64Length,
+  IN UINT64IpaWidth,
+  IN BOOLEAN   Share
+  );
+
+/**
+  Return the IPA width of the Realm.
+
+  The IPA width of the Realm is used to configure the protection attribute
+  for memory regions, see ArmCcaSetMemoryProtectAttribute().
+
+  The IPA width of the Realm is present in the Realm config which is read
+  when the ArmCcaInitPeiLib library hook function ArmCcaInitialize () is
+  called in the PrePi phase. ArmCcaInitialize () stores the IPA width of
+  the Realm in a GUID HOB gArmCcaIpaWidthGuid.
+
+  This function searches the GUID HOB gArmCcaIpaWidthGuid and returns the
+  IPA width value stored therein.
+
+  Note:
+  - This function must only be called after ArmCcaInitialize () has setup
+the GUID HOB gArmCcaIpaWidthGuid.
+
+@param [out] IpaWidth  IPA width of the Realm.
+
+@retval RETURN_SUCCESSSuccess.
+@retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+@retval

[edk2-devel] [PATCH v2 21/45] ArmVirtPkg: Kvmtool: Use ArmVirt instance of ArmMonitorLib

2024-04-12 Thread Sami Mujawar
ArmVirtMonitorLib parses the device tree handed off by the VMM
to determine the conduit that must be used for monitor calls.

For a normal virtual machine guest firmware, the default conduit
is HVC. However, for Arm CCA the Realm code must use SMC as the
conduit. Kvmtool populates the correct conduit to be used by the
VM instance in the device tree it hands off to the firmware.

Therefore, switch to using ArmVirtMonitorLib as this enables to
have a unified firmware binary for both Normal VMs and Realm VMs.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirtKvmTool.dsc | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index 
d09b3e06928ad70dba8581bd605a7c76b231ba61..a310fbd53ec7a37805865525da142e0610846f86
 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -84,7 +84,7 @@ [LibraryClasses.common]
   
HwInfoParserLib|DynamicTablesPkg/Library/FdtHwInfoParserLib/FdtHwInfoParserLib.inf
   
DynamicPlatRepoLib|DynamicTablesPkg/Library/Common/DynamicPlatRepoLib/DynamicPlatRepoLib.inf
 
-  ArmMonitorLib|ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.inf
+  ArmMonitorLib|ArmVirtPkg/Library/ArmVirtMonitorLib/ArmVirtMonitorLib.inf
   ArmTrngLib|ArmPkg/Library/ArmTrngLib/ArmTrngLib.inf
 
 [LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE, 
LibraryClasses.common.PEIM]
@@ -126,8 +126,6 @@ [PcdsFeatureFlag.common]
   # Use MMIO for accessing RTC controller registers.
   gPcAtChipsetPkgTokenSpaceGuid.PcdRtcUseMmio|TRUE
 
-  gArmTokenSpaceGuid.PcdMonitorConduitHvc|TRUE
-
 [PcdsFixedAtBuild.common]
   gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800F
 
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 06/45] ArmVirtPkg: ArmCcaRsiLib: Add an interface to get an attestation token

2024-04-12 Thread Sami Mujawar
A CCA attestation token is a collection of claims about the state of a
Realm and of the CCA platform on which the Realm is running.
A CCA attestation token consists of two parts:
  * Realm token - Contains attributes of the Realm, including:
# Realm Initial Measurement
# Realm Extensible Measurements
  * CCA platform token - Contains attributes of the CCA platform
on which the Realm is running, including:
# CCA platform identity
# CCA platform life cycle state
# CCA platform software component measurements

The CCA attestation token is used by a verification service to validate
these claims.

The Realm Service Interface defines the following interfaces to retrieve
an attestation token from the Realm Management Monitor (RMM).
  - RSI_ATTESTATION_TOKEN_INIT
  - RSI_ATTESTATION_TOKEN_CONTINUE

Therefore, update the ArmCcaRsiLib to add an interface to get an
attestation token from the RMM.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  |  44 -
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h|  10 +-
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 195 +++-
 3 files changed, 243 insertions(+), 6 deletions(-)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
0c7f1afc78252b286a20dd8a7a81d538cf76ea8f..f88b07ee9806a51dd10add3a82bf5ce1115c0656
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -31,6 +31,19 @@
 */
 #define RIPAS_TYPE_MASK  0xFF
 
+/* Maximum attestation token size
+  RBXKKY The size of an attestation token is no larger than 4KB.
+*/
+#define MAX_ATTESTATION_TOKEN_SIZE  SIZE_4KB
+
+/* Maximum challenge data size in bits.
+*/
+#define MAX_CHALLENGE_DATA_SIZE_BITS  512
+
+/* Minimum recommended challenge data size in bits.
+*/
+#define MIN_CHALLENGE_DATA_SIZE_BITS  256
+
 /** An enum describing the RSI RIPAS.
See Section A5.2.2 Realm IPA state, RMM Specification, version A-bet0
 */
@@ -51,6 +64,35 @@ typedef struct RealmConfig {
   UINT8 Reserved[SIZE_4KB - sizeof (UINT64)];
 } REALM_CONFIG;
 
+/**
+  Retrieve an attestation token from the RMM.
+
+  @param [in]   ChallengeData Pointer to the challenge data to be
+  included in the attestation token.
+  @param [in]   ChallengeDataSizeBits Size of the challenge data in bits.
+  @param [out]  TokenBuffer   Pointer to a buffer to store the
+  retrieved attestation token.
+  @param [in, out]  TokenBufferSize   Size of the token buffer on input and
+  number of bytes stored in token 
buffer
+  on return.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_ABORTEDThe operation was aborted as the state
+of the Realm or REC does not match the
+state expected by the command.
+  @retval RETURN_NOT_READY  The operation requested by the command
+is not complete.
+**/
+RETURN_STATUS
+EFIAPI
+RsiGetAttestationToken (
+  IN  CONST UINT8   *CONST  ChallengeData,
+  INUINT64  ChallengeDataSizeBits,
+  OUT   UINT8   *CONST  TokenBuffer,
+  IN OUTUINT64  *CONST  TokenBufferSize
+  );
+
 /**
   Returns the IPA state for the page pointed by the address.
 
@@ -111,7 +153,7 @@ RsiGetRealmConfig (
 
   @retval RETURN_SUCCESSSuccess.
   @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
- */
+**/
 RETURN_STATUS
 EFIAPI
 RsiGetVersion (
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
index 
9cc12bc5a70b457367077d0b26011c3b91fa63c9..325234d06695befc840dcf37e951130dfe0550c3
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -18,10 +18,12 @@
 #define ARM_CCA_RSI_H_
 
 // FIDs for Realm Service Interface calls.
-#define FID_RSI_IPA_STATE_GET  0xC4000198
-#define FID_RSI_IPA_STATE_SET  0xC4000197
-#define FID_RSI_REALM_CONFIG   0xC4000196
-#define FID_RSI_VERSION0xC4000190
+#define FID_RSI_ATTESTATION_TOKEN_CONTINUE  0xC4000195
+#define FID_RSI_ATTESTATION_TOKEN_INIT  0xC4000194
+#define FID_RSI_IPA_STATE_GET   0xC4000198
+#define FID_RSI_IPA_STATE_SET   0xC4000197
+#define FID_RSI_REALM_CONFIG0xC4000196
+#define FID_RSI_VERSION 0xC4000190
 
 /** RSI Command Return codes
See Section B4.4.1, RMM Specification, version A-bet0.
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
546df9a94cb86533b37fef7e42fdaf7b8563052d

[edk2-devel] [PATCH v2 07/45] ArmVirtPkg: ArmCcaRsiLib: Add interfaces to get/extend REMs

2024-04-12 Thread Sami Mujawar
The Section A2.1.3 Realm attributes, RMM Specification, version A-bet0
introduces the concept of REMs as described below:
  DGRFCS - A Realm Extensible Measurement (REM) is a measurement value
   which can be extended during the lifetime of a Realm.
  IFMPYL - Attributes of a Realm include an array of measurement values.
   The first entry in this array is a RIM. The remaining entries
   in this array are REMs.

The Realm Service Interface commands defined in section
B4.3.7 RSI_MEASUREMENT_READ and B4.3.6 RSI_MEASUREMENT_EXTEND
specify the interfaces to read and extend measurements to REMs.

Therefore, update ArmCcaRsiLib to add interfaces to get and extend REMs.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/Include/Library/ArmCcaRsiLib.h  | 53 
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h|  2 +
 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 91 
 3 files changed, 146 insertions(+)

diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index 
f88b07ee9806a51dd10add3a82bf5ce1115c0656..99a8175262331f4b0ddc098c3c62a20954b2b516
 100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -7,6 +7,8 @@
 - Rsi or RSI   - Realm Service Interface
 - IPA  - Intermediate Physical Address
 - RIPAS- Realm IPA state
+- RIM  - Realm Initial Measurement
+- REM  - Realm Extensible Measurement
 
   @par Reference(s):
- Realm Management Monitor (RMM) Specification, version A-bet0
@@ -44,6 +46,21 @@
 */
 #define MIN_CHALLENGE_DATA_SIZE_BITS  256
 
+/* Maximum measurement data size in bytes.
+  See Section C1.11 RmmRealmMeasurement type, RMM Specification, version A-bet0
+  The width of the RmmRealmMeasurement type is 512 bits.
+*/
+#define MAX_MEASUREMENT_DATA_SIZE_BYTES  64
+
+/* Minimum and Maximum indices for REMs
+  See Section A2.1.3 Realm attributes, RMM Specification, version A-bet0
+  IFMPYL - Attributes of a Realm include an array of measurement values. The
+  first entry in this array is a RIM. The remaining entries in this array are
+  REMs.
+*/
+#define MIN_REM_INDEX  1
+#define MAX_REM_INDEX  4
+
 /** An enum describing the RSI RIPAS.
See Section A5.2.2 Realm IPA state, RMM Specification, version A-bet0
 */
@@ -127,6 +144,42 @@ RsiSetIpaState (
   IN  RIPAS   State
   );
 
+/**
+  Extends a measurement to a REM.
+
+  @param [in] MeasurementIndex Index of the REM.
+  @param [in] Measurement  Pointer to the measurement buffer.
+  @param [in] MeasurementSize  Size of the measurement data.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiExtendMeasurement (
+  INUINTN  MeasurementIndex,
+  IN  CONST UINT8  *CONST  Measurement,
+  INUINTN  MeasurementSize
+  );
+
+/**
+  Read the measurement value from a REM.
+
+  @param [in]   MeasurementIndex Index of the REM.
+  @param [out]  MeasurementBuffer Pointer to store the measurement data.
+  @param [in]   MeasurementBufferSize Size of the measurement buffer.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiReadMeasurement (
+  INUINTN  MeasurementIndex,
+  OUT   UINT8  *CONST  MeasurementBuffer,
+  INUINTN  MeasurementBufferSize
+  );
+
 /**
   Read the Realm Configuration.
 
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
index 
325234d06695befc840dcf37e951130dfe0550c3..6f0ee3061ade5a4a99b717a52d5a241e0e446270
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -22,6 +22,8 @@
 #define FID_RSI_ATTESTATION_TOKEN_INIT  0xC4000194
 #define FID_RSI_IPA_STATE_GET   0xC4000198
 #define FID_RSI_IPA_STATE_SET   0xC4000197
+#define FID_RSI_MEASUREMENT_EXTEND  0xC4000193
+#define FID_RSI_MEASUREMENT_READ0xC4000192
 #define FID_RSI_REALM_CONFIG0xC4000196
 #define FID_RSI_VERSION 0xC4000190
 
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c 
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index 
3cc6be299e0a7bd12e5a91d17eb0b9393f57a907..eb9896668a267f2cdf30f36bd14697d56d2612ed
 100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -8,6 +8,7 @@
 - Rsi or RSI   - Realm Service Interface
 - IPA  - Intermediate Physical Address
 - RIPAS- Realm IPA state
+- REM  - Realm Extensible Measurement
 
   @par Reference(s):
- Realm Management Monitor (RMM) Specification, version A-bet0
@@ -366,6 +367,96 @@ RsiSetIpaState (
   return Status

[edk2-devel] [PATCH v2 11/45] ArmVirtPkg: Add NULL instance of ArmCcaInitPeiLib

2024-04-12 Thread Sami Mujawar
Add a NULL instance of ArmCcaInitPeiLib library that guest firmware
for VMMs that do not implement Arm CCA Realms can use.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirt.dsc.inc   |  2 +
 ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.c   | 59 

 ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.inf | 27 +
 3 files changed, 88 insertions(+)

diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
index 
2bc6a29eb131f7c3817c4b411a0a69eb6181a059..8c1063fb73f81e69e866549a2ba9b12945c83d9c
 100644
--- a/ArmVirtPkg/ArmVirt.dsc.inc
+++ b/ArmVirtPkg/ArmVirt.dsc.inc
@@ -194,6 +194,8 @@ [LibraryClasses.common.SEC]
   
DebugLib|ArmVirtPkg/Library/DebugLibFdtPL011Uart/DebugLibFdtPL011UartFlash.inf
 !endif
 
+  
ArmCcaInitPeiLib|ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.inf
+
 [LibraryClasses.common.PEI_CORE]
   PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
diff --git a/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.c 
b/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.c
new file mode 100644
index 
..5b606208dbcf4f0494cde79dd8923ef80fa0137b
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.c
@@ -0,0 +1,59 @@
+/** @file
+  Library that implements a NULL implementation of the ArmCcaInitPeiLib.
+
+  Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Rsi or RSI   - Realm Service Interface
+- IPA  - Intermediate Physical Address
+- RIPAS- Realm IPA state
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Configure the System Memory region as Protected RAM.
+
+  When a VMM creates a Realm, a small amount of DRAM (which contains the
+  firmware image) and the initial content is configured as Protected RAM.
+  The remaining System Memory is in the Protected Empty state. The firmware
+  must then initialise the remaining System Memory as Protected RAM before
+  it can be accessed.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+RETURN_STATUS
+EFIAPI
+ArmCcaConfigureSystemMemory (
+  VOID
+  )
+{
+  return RETURN_UNSUPPORTED;
+}
+
+/**
+  Perform Arm CCA specific initialisations.
+
+  @retval EFI_SUCCESS   Success or execution context is not a 
Realm.
+  @retval EFI_OUT_OF_RESOURCES  Out of resources.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaInitialize (
+  VOID
+  )
+{
+  // Noting to do as the execution context is not a Realm.
+  return EFI_SUCCESS;
+}
diff --git a/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.inf 
b/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.inf
new file mode 100644
index 
..f039c7abdb6d5391f792179546ff9947086fe541
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.inf
@@ -0,0 +1,27 @@
+## @file
+#  Library that implements a NULL implementation of the ArmCcaInitPeiLib.
+#
+#  Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = ArmCcaInitPeiLib
+  FILE_GUID  = 60686C60-8433-49EE-9F2C-DDC424A95652
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = ArmCcaInitPeiLib
+
+[Sources]
+  ArmCcaInitPeiLibNull.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  ArmVirtPkg/ArmVirtPkg.dec
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  BaseLib
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 09/45] ArmVirtPkg: Define a GUID HOB for IPA width of a Realm

2024-04-12 Thread Sami Mujawar
The IPA width of a Realm is read from the Realm Config by invoking
the RSI call RSI_REALM_CONFIG to read the Realm Config. The IPA width
is then stored in a GUID HOB gArmCcaIpaWidthGuid for subsequent use.

This GUID HOB is also useful to pass the IPA width of the Realm to the
DXE phase.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirtPkg.dec | 1 +
 1 file changed, 1 insertion(+)

diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index 
d92cb52fc30a6f0ee3469fbd2a940f88e9cf2c67..0f95fd43bd189eda713aeccc6c73019e0f815169
 100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -34,6 +34,7 @@ [Guids.common]
   gEarlyPL011BaseAddressGuid   = { 0xB199DEA9, 0xFD5C, 0x4A84, { 0x80, 
0x82, 0x2F, 0x41, 0x70, 0x78, 0x03, 0x05 } }
   gEarly16550UartBaseAddressGuid   = { 0xea67ca3e, 0x1f54, 0x436b, { 0x97, 
0x88, 0xd4, 0xeb, 0x29, 0xc3, 0x42, 0x67 } }
   gArmVirtSystemMemorySizeGuid = { 0x504eccb9, 0x1bf0, 0x4420, { 0x86, 
0x5d, 0xdc, 0x66, 0x06, 0xd4, 0x13, 0xbf } }
+  gArmCcaIpaWidthGuid  = { 0xbdb66787, 0xfc8a, 0x412e, { 0xa0, 
0x9b, 0x84, 0x96, 0x61, 0x81, 0x72, 0xc0 } }
 
 [PcdsFeatureFlag]
   #
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 13/45] ArmVirtPkg: Add Null instance of ArmCcaLib

2024-04-12 Thread Sami Mujawar
Add a Null instance of ArmCcaLib so that guest firmware that does
not support Arm CCA can link to this Null version of the library.

Also include it in ArmVirt.dsc.inc so that it is linked for the
non-Arm CCA firmware builds.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirt.dsc.inc |   4 +-
 ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.c   | 117 
 ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.inf |  28 +
 3 files changed, 148 insertions(+), 1 deletion(-)

diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
index 
8c1063fb73f81e69e866549a2ba9b12945c83d9c..c8a29dd8ebc88107c4caab4f826001d9b0c2e7f7
 100644
--- a/ArmVirtPkg/ArmVirt.dsc.inc
+++ b/ArmVirtPkg/ArmVirt.dsc.inc
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2011 - 2022, ARM Limited. All rights reserved.
+#  Copyright (c) 2011 - 2023, ARM Limited. All rights reserved.
 #  Copyright (c) 2014, Linaro Limited. All rights reserved.
 #  Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
 #  Copyright (c) Microsoft Corporation.
@@ -180,6 +180,8 @@ [LibraryClasses.common]
 
   
ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
 
+  ArmCcaLib|ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.inf
+
 [LibraryClasses.common.SEC]
   PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
diff --git a/ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.c 
b/ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.c
new file mode 100644
index 
..e5e645e148d485fc324e060ec27fbc3607fe8aae
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.c
@@ -0,0 +1,117 @@
+/** @file
+  Null implemmentation of the ArmCcaLib library.
+
+  Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Rsi or RSI   - Realm Service Interface
+- IPA  - Intermediate Physical Address
+- RIPAS- Realm IPA state
+**/
+#include 
+
+/**
+  Check if running in a Realm.
+
+@retval TRUEThe execution is within the context of a Realm.
+@retval FALSE   The execution is not within the context of a Realm.
+**/
+BOOLEAN
+EFIAPI
+IsRealm (
+  VOID
+  )
+{
+  return FALSE;
+}
+
+/**
+  Configure the protection attribute for the page tables
+  describing the memory region.
+
+  The IPA space of a Realm is divided into two halves:
+- Protected IPA space and
+- Unprotected IPA space.
+
+  Software in a Realm should treat the most significant bit of an
+  IPA as a protection attribute.
+
+  A Protected IPA is an address in the lower half of a Realms IPA
+  space. The most significant bit of a Protected IPA is 0.
+
+  An Unprotected IPA is an address in the upper half of a Realms
+  IPA space. The most significant bit of an Unprotected IPA is 1.
+
+  Note:
+  - Configuring the memory region as Unprotected IPA enables the
+Realm to share the memory region with the Host.
+  - This function updates the page table entries to reflect the
+protection attribute.
+  - A separate call to transition the memory range using the Realm
+Service Interface (RSI) RSI_IPA_STATE_SET command is additionally
+required and is expected to be done outside this function.
+
+@param [in]  BaseAddress  Base address of the memory region.
+@param [in]  Length   Length of the memory region.
+@param [in]  IpaWidth IPA width of the Realm.
+@param [in]  ShareIf TRUE, set the most significant
+  bit of the IPA to configure the memory
+  region as Unprotected IPA.
+  If FALSE, clear the most significant
+  bit of the IPA to configure the memory
+  region as Protected IPA.
+
+@retval RETURN_SUCCESSIPA protection attribute updated.
+@retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+@retval RETURN_UNSUPPORTEDThe request is not initiated in a
+  Realm.
+**/
+RETURN_STATUS
+EFIAPI
+ArmCcaSetMemoryProtectAttribute (
+  IN EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN UINT64Length,
+  IN UINT64IpaWidth,
+  IN BOOLEAN   Share
+  )
+{
+  return RETURN_UNSUPPORTED;
+}
+
+/**
+  Return the IPA width of the Realm.
+
+  The IPA width of the Realm is used to configure the protection attribute
+  for memory regions, see ArmCcaSetMemoryProtectAttribute().
+
+  The IPA width of the Realm is present in the Realm config which is read
+  when the ArmCcaInitPeiLib library hook function ArmCcaInitialize () is
+  called in the PrePi phase. ArmCcaInitialize () stores the IPA width of
+  the Realm in a GUID HOB gArmCcaIpaWidthGuid.
+
+  This function searches the GUID HOB

[edk2-devel] [PATCH v2 03/45] ArmPkg: Extend number of parameter registers in SMC call

2024-04-12 Thread Sami Mujawar
The Realm Service Interface (RSI) commands use registers between
X1-X10 as parameters and between X0-X8 as return values for SMC
calls.

According to the SMCCC Section 2.6 SMC32/HVC32 argument passing
  When an SMC32/HVC32 call is made from AArch32:
   - Arguments are passed in registers R1-R7.
   - Results are returned in R0-R7.
  When an SMC32/HVC32 call is made from AArch64:
   - Arguments are passed in registers W1-W7.
   - Results are returned in W0-W7.

According to SMCCC Section 2.7 SMC64/HVC64 argument passing
  When an SMC64/HVC64 call is made from AArch64:
   - Arguments are passed in registers X1-X17.
   - Results are returned in X0-X17.

This means SMC calls can take up to 7/17 arguments and return up
to 7/17 return values.

However, for the current use-case(s):
  - SMC32/HVC32 calls made from AArch32/AArch64 require up to 7
arguments and 4 return values.
  - SMC64/HVC64 calls made from AArch64 require up to 10 arguments
and 9 return values.

Therefore, for SMC32/HVC32 calls made from AArch32/AArch64 there is
no update required. However, for AMC64/HVC64 calls made from AArch64,
extend the ArmCallSmc () to use registers X1-X11 as parameters and
return values for SMC call.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Signed-off-by: Sami Mujawar 
---
 ArmPkg/Include/Library/ArmSmcLib.h| 50 ++--
 ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S | 22 ++---
 2 files changed, 62 insertions(+), 10 deletions(-)

diff --git a/ArmPkg/Include/Library/ArmSmcLib.h 
b/ArmPkg/Include/Library/ArmSmcLib.h
index 
beef0175c35ce86aac9e465f9062bf8052b08dfb..e80b74671a6424723323bab95917fb3909771759
 100644
--- a/ArmPkg/Include/Library/ArmSmcLib.h
+++ b/ArmPkg/Include/Library/ArmSmcLib.h
@@ -1,10 +1,13 @@
 /** @file
 *
 *  Copyright (c) 2021, NUVIA Inc. All rights reserved.
-*  Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+*  Copyright (c) 2012-2023, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
+*  @par Reference(s):
+*   - SMC Calling Convention (SMCCC), ARM DEN 0028E, EAC0, 1.4
+* (https://developer.arm.com/documentation/den0028/e/)
 **/
 
 #ifndef ARM_SMC_LIB_H_
@@ -13,6 +16,18 @@
 /**
  * The size of the SMC arguments are different between AArch64 and AArch32.
  * The native size is used for the arguments.
+ * According to the SMCCC Section 2.6 SMC32/HVC32 argument passing
+ * When an SMC32/HVC32 call is made from AArch32:
+ *  - Arguments are passed in registers R1-R7.
+ *  - Results are returned in R0-R7.
+ * When an SMC32/HVC32 call is made from AArch64:
+ *  - Arguments are passed in registers W1-W7.
+ *  - Results are returned in W0-W7.
+ *
+ * According to SMCCC Section 2.7 SMC64/HVC64 argument passing
+ * When an SMC64/HVC64 call is made from AArch64:
+ *  - Arguments are passed in registers X1-X17.
+ *  - Results are returned in X0-X17.
  */
 typedef struct {
   UINTNArg0;
@@ -23,13 +38,42 @@ typedef struct {
   UINTNArg5;
   UINTNArg6;
   UINTNArg7;
+ #ifdef MDE_CPU_AARCH64
+  UINTNArg8;
+  UINTNArg9;
+  UINTNArg10;
+  UINTNArg11;
+ #endif
 } ARM_SMC_ARGS;
 
 /**
   Trigger an SMC call
 
-  SMC calls can take up to 7 arguments and return up to 4 return values.
-  Therefore, the 4 first fields in the ARM_SMC_ARGS structure are used
+  According to the SMCCC Section 2.6 SMC32/HVC32 argument passing
+  When an SMC32/HVC32 call is made from AArch32:
+   - Arguments are passed in registers R1-R7.
+   - Results are returned in R0-R7.
+  When an SMC32/HVC32 call is made from AArch64:
+   - Arguments are passed in registers W1-W7.
+   - Results are returned in W0-W7.
+
+  According to SMCCC Section 2.7 SMC64/HVC64 argument passing
+  When an SMC64/HVC64 call is made from AArch64:
+   - Arguments are passed in registers X1-X17.
+   - Results are returned in X0-X17.
+
+  This means SMC calls can take up to 7/17 arguments and return up
+  to 7/17 return values.
+
+  However, the current use-case:
+  - For SMC32/HVC32 calls made from AArch32/AArch64 up to 7 arguments
+and 4 return values are required. Therefore, limit the maximum
+arguments to 7 and return values to 4.
+  - For AMC64/HVC64 calls made from AArch64 up to 11 arguments and
+return values are required. Therefore, limit the maximum arguments
+and return values to 11.
+
+  The fields in the ARM_SMC_ARGS structure are used
   for both input and output values.
 
 **/
diff --git a/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S 
b/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
index 
4a8c2a8f59eab3e5b66dda2515d5bbced131af13..299d612dc5e1ebfeaf69a356b400c511905d72fe
 100644
--- a/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
+++ b/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
@@ -1,8 +1,11 @@
 //
-//  Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+//  Copyright (c) 2012-2023, Arm Limited. All rights reserved.
 //
 //  SPDX-License-Identifier: BSD-2-Clause-Patent
 //
+//  @par Reference(s):
+//   - SMC Calling Convention (SMCCC), ARM

[edk2-devel] [PATCH v2 01/45] ArmPkg: Add helper function to detect RME

2024-04-12 Thread Sami Mujawar
Add helper function to check if the Realm Management
Extension (RME) is implemented by the hardware.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Signed-off-by: Sami Mujawar 
---
 ArmPkg/Include/Chipset/AArch64.h   |  3 ++-
 ArmPkg/Include/Library/ArmLib.h| 15 ++-
 ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 16 +++-
 3 files changed, 31 insertions(+), 3 deletions(-)

diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index 
5390bf0a2774fb410f33e031cb0367708905c658..33f8df12637b7003b46458ae0680f67ebc3a431a
 100644
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -1,7 +1,7 @@
 /** @file
 
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-  Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.
+  Copyright (c) 2011 - 2023, Arm Limited. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -30,6 +30,7 @@
 // ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions
 #define AARCH64_PFR0_FP   (0xF << 16)
 #define AARCH64_PFR0_GIC  (0xF << 24)
+#define AARCH64_PFR0_RME  (0xFULL << 52)
 
 // ID_AA64DFR0 - AArch64 Debug Feature Register 0 definitions
 #define AARCH64_DFR0_TRACEVER  (0xFULL << 4)
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 
6aa8a48f07f39255b70406774d2d803dbfc97b0b..ed876d231bbe82a1655e7455d04c92042aab3a94
 100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -1,7 +1,7 @@
 /** @file
 
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-  Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.
+  Copyright (c) 2011 - 2023, Arm Limited. All rights reserved.
   Copyright (c) 2020 - 2021, NUVIA Inc. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -824,6 +824,19 @@ ArmHasSecurityExtensions (
   VOID
   );
 
+#else
+
+/** Checks if RME is implemented.
+
+   @retval TRUE  RME is implemented.
+   @retval FALSE RME is not implemented.
+**/
+BOOLEAN
+EFIAPI
+ArmHasRme (
+  VOID
+  );
+
 #endif // MDE_CPU_ARM
 
 #endif // ARM_LIB_H_
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c 
b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
index 
87285465871dc100ea0065659959ca845912c549..8952524fb3d56695cce181f852723d8b2a1dc77c
 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
@@ -1,7 +1,7 @@
 /** @file
 
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-  Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
+  Portions copyright (c) 2011 - 2023, Arm Limited. All rights reserved.
   Copyright (c) 2021, NUVIA Inc. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -150,3 +150,17 @@ ArmHasEte (
   // The ID_AA64DFR0_EL1.TraceVer field identifies the presence of FEAT_ETE.
   return ((ArmReadIdAA64Dfr0 () & AARCH64_DFR0_TRACEVER) != 0);
 }
+
+/** Checks if RME is implemented.
+
+   @retval TRUE  RME is implemented.
+   @retval FALSE RME is not implemented.
+**/
+BOOLEAN
+EFIAPI
+ArmHasRme (
+  VOID
+  )
+{
+  return ((ArmReadIdAA64Pfr0 () & AARCH64_PFR0_RME) != 0);
+}
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



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[edk2-devel] [PATCH v2 10/45] ArmVirtPkg: Add library for Arm CCA initialisation in PEI

2024-04-12 Thread Sami Mujawar
Add ArmCcaInitPeiLib library that performs the Arm CCA specific
initialisation in the PEI phase like:
 - Configuring the system memory as Protected RAM.
 - Reading the Realm Config and storing the IPA width in
   a GUID HOB i.e., gArmCcaIpaWidthGuid for subsequent use.
 - Calling ArmCcaConfigureMmio () to configure the MMIO regions
   by setting the Unprotected IPA attribute in the page tables.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Gerd Hoffmann 
Signed-off-by: Sami Mujawar 
---
 ArmVirtPkg/ArmVirtPkg.dec|   1 +
 ArmVirtPkg/Include/Library/ArmCcaInitPeiLib.h|  49 +
 ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c   | 116 

 ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.inf |  39 +++
 4 files changed, 205 insertions(+)

diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index 
0f95fd43bd189eda713aeccc6c73019e0f815169..23179c89704db789ab649de81873924c3958ab2a
 100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -26,6 +26,7 @@ [Includes.common]
   Include# Root include for the package
 
 [LibraryClasses]
+  ArmCcaInitPeiLib|Include/Library/ArmCcaInitPeiLib.h
   ArmCcaRsiLib|Include/Library/ArmCcaRsiLib.h
   ArmVirtMemInfoLib|Include/Library/ArmVirtMemInfoLib.h
 
diff --git a/ArmVirtPkg/Include/Library/ArmCcaInitPeiLib.h 
b/ArmVirtPkg/Include/Library/ArmCcaInitPeiLib.h
new file mode 100644
index 
..439a70a54a218badd4cd4d6c419df58f57271cc2
--- /dev/null
+++ b/ArmVirtPkg/Include/Library/ArmCcaInitPeiLib.h
@@ -0,0 +1,49 @@
+/** @file
+  Library that implements the Arm CCA helper functions.
+
+  Copyright (c) 2022 2023, Arm Ltd. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+- Rsi or RSI   - Realm Service Interface
+- IPA  - Intermediate Physical Address
+- RIPAS- Realm IPA state
+**/
+
+#ifndef ARM_CCA_INIT_PEI_LIB_
+#define ARM_CCA_INIT_PEI_LIB_
+
+#include 
+
+/**
+  Configure the System Memory region as Protected RAM.
+
+  When a VMM creates a Realm, a small amount of DRAM (which contains the
+  firmware image) and the initial content is configured as Protected RAM.
+  The remaining System Memory is in the Protected Empty state. The firmware
+  must then initialise the remaining System Memory as Protected RAM before
+  it can be accessed.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+RETURN_STATUS
+EFIAPI
+ArmCcaConfigureSystemMemory (
+  VOID
+  );
+
+/**
+  Perform Arm CCA specific initialisations.
+
+  @retval RETURN_SUCCESS   Success or execution context is not a 
Realm.
+  @retval RETURN_OUT_OF_RESOURCES  Out of resources.
+  @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+ArmCcaInitialize (
+  VOID
+  );
+
+#endif // ARM_CCA_LIB_
diff --git a/ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c 
b/ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c
new file mode 100644
index 
..2b2801cc5426994efc15c970fd6b0adf43bd7d36
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c
@@ -0,0 +1,116 @@
+/** @file
+  Library that implements the Arm CCA initialisation in PEI phase.
+
+  Copyright (c) 2022 2023, Arm Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Rsi or RSI   - Realm Service Interface
+- IPA  - Intermediate Physical Address
+- RIPAS- Realm IPA state
+**/
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Configure the System Memory region as Protected RAM.
+
+  When a VMM creates a Realm, a small amount of DRAM (which contains the
+  firmware image) and the initial content is configured as Protected RAM.
+  The remaining System Memory is in the Protected Empty state. The firmware
+  must then initialise the remaining System Memory as Protected RAM before
+  it can be accessed.
+
+  @retval RETURN_SUCCESSSuccess.
+  @retval RETURN_INVALID_PARAMETER  A parameter is invalid.
+  @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+RETURN_STATUS
+EFIAPI
+ArmCcaConfigureSystemMemory (
+  VOID
+  )
+{
+  RETURN_STATUS  Status;
+
+  if (!IsRealm ()) {
+return RETURN_UNSUPPORTED;
+  }
+
+  Status =  RsiSetIpaState (
+  (UINT64 *)PcdGet64 (PcdSystemMemoryBase),
+  PcdGet64 (PcdSystemMemorySize),
+  RipasRam
+  );
+  if (RETURN_ERROR (Status)) {
+// Panic
+CpuDeadLoop ();
+  }
+
+  return Status;
+}
+
+/**
+  Perform Arm CCA specific initialisations.
+
+  @retval RETURN_SUCCESS   Success or execution context is not a 
Realm

[edk2-devel] [PATCH v2 02/45] ArmPkg: Introduce SetMemoryProtectionAttribute() for Realms

2024-04-12 Thread Sami Mujawar
Arm CCA requires the software in a Realm to treat the most
significant bit of an IPA as a protection attribute. To
enable/disable sharing of memory regions with the host, the
protection attribute needs to be set/cleared accordingly.

Therefore, introduce SetMemoryProtectionAttribute() so that
the memory regions can be shared/unshared with the host.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Signed-off-by: Sami Mujawar 
---
 ArmPkg/Include/Library/ArmMmuLib.h   | 55 
 ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 90 
 2 files changed, 145 insertions(+)

diff --git a/ArmPkg/Include/Library/ArmMmuLib.h 
b/ArmPkg/Include/Library/ArmMmuLib.h
index 
2ce948e8db1d34e5ba0228de3dc347e186f31c11..1cea71ee6e88d351a3c57c4b97fe229305bfc1af
 100644
--- a/ArmPkg/Include/Library/ArmMmuLib.h
+++ b/ArmPkg/Include/Library/ArmMmuLib.h
@@ -71,4 +71,59 @@ ArmSetMemoryAttributes (
   IN UINT64AttributeMask
   );
 
+#ifdef MDE_CPU_AARCH64
+
+/**
+  Configure the protection attribute for the page tables
+  describing the memory region.
+
+  The IPA space of a Realm is divided into two halves:
+- Protected IPA space and
+- Unprotected IPA space.
+
+  Software in a Realm should treat the most significant bit of an
+  IPA as a protection attribute.
+
+  A Protected IPA is an address in the lower half of a Realms IPA
+  space. The most significant bit of a Protected IPA is 0.
+
+  An Unprotected IPA is an address in the upper half of a Realms
+  IPA space. The most significant bit of an Unprotected IPA is 1.
+
+  Note:
+  - Configuring the memory region as Unprotected IPA enables the
+Realm to share the memory region with the Host.
+  - This function updates the page table entries to reflect the
+protection attribute.
+  - A separate call to transition the memory range using the Realm
+Service Interface (RSI) RSI_IPA_STATE_SET command is additionally
+required and is expected to be done outside this function.
+  - The caller must ensure that this function call is invoked by code
+executing within the Realm.
+
+@param [in]  BaseAddress  Base address of the memory region.
+@param [in]  Length   Length of the memory region.
+@param [in]  IpaWidth IPA width of the Realm.
+@param [in]  ShareIf TRUE, set the most significant
+  bit of the IPA to configure the memory
+  region as Unprotected IPA.
+  If FALSE, clear the most significant
+  bit of the IPA to configure the memory
+  region as Protected IPA.
+
+@retval EFI_SUCCESSIPA protection attribute updated.
+@retval EFI_INVALID_PARAMETER  A parameter is invalid.
+@retval EFI_UNSUPPORTEDRME is not supported.
+**/
+EFI_STATUS
+EFIAPI
+SetMemoryProtectionAttribute (
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN  UINT64Length,
+  IN  UINT64IpaWidth,
+  IN  BOOLEAN   Share
+  );
+
+#endif
+
 #endif // ARM_MMU_LIB_H_
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c 
b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
index 
9d9c623581fe0010e35cb33c0c8ef4061720a6f7..25d32cceb61e1f0fd62d878202cf8ead05cfd9e2
 100644
--- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
+++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
@@ -7,6 +7,10 @@
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
+*  @par Glossary:
+*- Rsi or RSI   - Realm Service Interface
+*- IPA  - Intermediate Physical Address
+*- RIPAS- Realm IPA state
 **/
 
 #include 
@@ -749,3 +753,89 @@ ArmMmuBaseLibConstructor (
 
   return RETURN_SUCCESS;
 }
+
+/**
+  Configure the protection attribute for the page tables
+  describing the memory region.
+
+  The IPA space of a Realm is divided into two halves:
+- Protected IPA space and
+- Unprotected IPA space.
+
+  Software in a Realm should treat the most significant bit of an
+  IPA as a protection attribute.
+
+  A Protected IPA is an address in the lower half of a Realms IPA
+  space. The most significant bit of a Protected IPA is 0.
+
+  An Unprotected IPA is an address in the upper half of a Realms
+  IPA space. The most significant bit of an Unprotected IPA is 1.
+
+  Note:
+  - Configuring the memory region as Unprotected IPA enables the
+Realm to share the memory region with the Host.
+  - This function updates the page table entries to reflect the
+protection attribute.
+  - A separate call to transition the memory range using the Realm
+Service Interface (RSI) RSI_IPA_STATE_SET command is additionally
+required and is expected to be done outside this function.
+  - The caller must ensure that this function call is invoked by code
+executing within the Realm.
+
+@param [in]  BaseAddress  Base address of the memory region.
+@param [in]  Length   Length of the memory

Re: [edk2-devel] [PATCH 0/2] ArmPkg: Remove ArmCortexA[5x|9].h files

2024-04-05 Thread Sami Mujawar
Merged as 6fb3cc05dc87..8707f835ae35

Thanks.

Regards,

Sami Mujawar


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Re: [edk2-devel] [PATCH 0/2] ArmPkg: Remove ArmCortexA[5x|9].h files

2024-04-04 Thread Sami Mujawar

Hi Pierre,

Thank you for this series.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 14/02/2024 12:42 pm, Pierre Gondois wrote:

Following the discussion at:
https://edk2.groups.io/g/devel/message/115378
remove ArmCortexA5x.h and ArmCortexA9.h files.
A patch-set for the edk2-platforms repository will be posted
to remove the remaining references.

Pierre Gondois (2):
   ArmPkg: Remove ArmCortexA5x.h
   ArmPkg: Remove ArmCortexA9.h

  ArmPkg/Include/Chipset/ArmCortexA5x.h | 44 -
  ArmPkg/Include/Chipset/ArmCortexA9.h  | 57 ---
  2 files changed, 101 deletions(-)
  delete mode 100644 ArmPkg/Include/Chipset/ArmCortexA5x.h
  delete mode 100644 ArmPkg/Include/Chipset/ArmCortexA9.h




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Re: [edk2-devel] [PATCH 0/3] Platform/ARM: Remove ArmVExpressLibSec and CTA15-A7 support

2024-04-04 Thread Sami Mujawar
Merged as 8b29c9255d44..ff3c7adf0785

Thanks.

Regards,

Sami Mujawar


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Re: [edk2-devel] [PATCH 0/3] Platform/ARM: Remove ArmVExpressLibSec and CTA15-A7 support

2024-04-04 Thread Sami Mujawar

Hi Pierre,

Thank you for this series.

Apologies for the delay. These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 14/02/2024 12:43 pm, pierre.gond...@arm.com wrote:

From: Pierre Gondois 

Following the discussion at:
https://edk2.groups.io/g/devel/message/115378

Remove:
- the ArmVExpressLibSec module, containing the last reference to
   ArmCortexA9.h
- CTA15-A7 platform support
- files/modules used by the CTA15-A7 platform.

Pierre Gondois (3):
   Platform/ARM: Remove ArmVExpressLibSec
   Platform/ARM: Remove CTA15-A7 platform support
   Platform/ARM: Remove CTA15-A7 support

  .../ARM/VExpressPkg/ArmVExpress-CTA15-A7.dsc  | 286 
  .../ARM/VExpressPkg/ArmVExpress-CTA15-A7.fdf  | 299 
  .../VExpressPkg/ArmVExpress-FVP-AArch64.dsc   |   3 -
  Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc  |   7 +-
  .../Drivers/Isp1761UsbDxe/Isp1761UsbDxe.c | 636 --
  .../Drivers/Isp1761UsbDxe/Isp1761UsbDxe.h | 123 
  .../Drivers/Isp1761UsbDxe/Isp1761UsbDxe.inf   |  46 --
  .../Include/Platform/CTA15-A7/ArmPlatform.h   | 148 
  .../ArmVExpressLibCTA15-A7/ArmVExpressLib.inf |  44 --
  .../Library/ArmVExpressLibCTA15-A7/CTA15-A7.c | 176 -
  .../ArmVExpressLibCTA15-A7/CTA15-A7Helper.S   |  75 ---
  .../ArmVExpressLibCTA15-A7/CTA15-A7Mem.c  | 172 -
  .../ArmVExpressLibRTSM/Arm/RTSMHelper.S   |  91 ---
  .../ArmVExpressLibRTSM/ArmVExpressLib.inf |   3 -
  .../ArmVExpressLibRTSM/ArmVExpressLibSec.inf  |  49 --
  15 files changed, 1 insertion(+), 2157 deletions(-)
  delete mode 100644 Platform/ARM/VExpressPkg/ArmVExpress-CTA15-A7.dsc
  delete mode 100644 Platform/ARM/VExpressPkg/ArmVExpress-CTA15-A7.fdf
  delete mode 100644 
Platform/ARM/VExpressPkg/Drivers/Isp1761UsbDxe/Isp1761UsbDxe.c
  delete mode 100644 
Platform/ARM/VExpressPkg/Drivers/Isp1761UsbDxe/Isp1761UsbDxe.h
  delete mode 100644 
Platform/ARM/VExpressPkg/Drivers/Isp1761UsbDxe/Isp1761UsbDxe.inf
  delete mode 100644 
Platform/ARM/VExpressPkg/Include/Platform/CTA15-A7/ArmPlatform.h
  delete mode 100644 
Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf
  delete mode 100644 
Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c
  delete mode 100644 
Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S
  delete mode 100644 
Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c
  delete mode 100644 
Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
  delete mode 100644 
Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf




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Re: [edk2-devel] [edk2-platforms][PATCH v5 0/9] Platform/Sgi: Add support for RD-Fremont platform

2024-03-31 Thread Sami Mujawar
Merged as  344be33d497d..b64443f7b8c3

Thanks.

Regards,

Sami Mujawar


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Re: [edk2-devel] [edk2-platforms][PATCH v5 0/9] Platform/Sgi: Add support for RD-Fremont platform

2024-03-31 Thread Sami Mujawar

Hi Prabin,

I am going to drop patch 7/9 that adds the SMBIOS support, and merge the 
remaining series.


Please fix patch 7/9 and send it as a separate patch that adds SMBIOS 
support for RD-Fremont.


Regards,

Sami Mujawar

On 11/03/2024 01:14 pm, Prabin CA wrote:

Changes since V4:
- Addressed the comments shared by Levi for V3.

Changes since V3:
- Rebase on top of latest upstream branch.

Changes since V2:
- Removed author's signed-off on the patches, which is owned by another author.

Changes since V1:
- Corrected memory map in the DSDT file.

This patch series introduce support for RD-Fremont reference design
platform. This platform includes 32 CPUs, but the fixed virtual platform
(FVP) simulates 16 CPUs of the platform. There is one CPU per cluster in
the system and so the FVP simulates 16 clusters. Each of the CPUs
include 64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache.
The platform also includes system level cache of 32MB and 8GB of RAM.
Also, this patch series adding the extended SMBIO support for RD-Fremont
platform.

In addition to patches that introduce RD-Fremont platform, there are
four patches that update support for existing platforms. The first patch
in this series correct the typo while defining the CPPC support.
The second patch in this series changes the data type of PcdSmmuBase
from u32 to u64. The third patch refactor the system memory map base and
size values. The fourth patch add a flag to enable PCIE support for
existing and future platforms.

This patch series should be applied on top of the patch series
https://edk2.groups.io/g/devel/message/116262

Link to gitlab branch with the patches in this series -
https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platforms/-/commits/topics/rdfremont/

Prabin CA (7):
   Platform/Sgi: Correct typo in defining CPPC performance limited register
   Platform/Sgi: Refactor system memory base and size definitions
   Platform/Sgi: Introduce a flag to enable PCIe support for RD Platforms
   Platform/Sgi: Add initial support for RD-Fremont platform
   Platform/Sgi: Extend SMBIOS support for RD-Fremont
   Platform/Sgi: Low Power Idle States for RD-Fremont
   Platform/Sgi: Add CPPC support for RD-Fremont platform

Shriram K (1):
   Platform/Sgi: Add ACPI tables for RD-Fremont platform

Vivek Gautam (1):
   Platform/Sgi: Update the datatype of PcdSmmuBase from u32 to u64

  Platform/ARM/SgiPkg/SgiPlatform.dec   |   
3 +-
  Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc  |   
8 +-
  Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc |   
8 +-
  Platform/ARM/SgiPkg/{SgiMemoryMap2.dsc.inc => SgiMemoryMap3.dsc.inc}  |  
88 ++--
  Platform/ARM/SgiPkg/SgiPlatform.dsc.inc   |  
12 +-
  Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc |   
4 +-
  Platform/ARM/SgiPkg/{RdV1/RdV1.dsc => RdFremont/RdFremont.dsc}|  
14 +-
  Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc |   
4 +-
  Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc |   
4 +-
  Platform/ARM/SgiPkg/RdV1/RdV1.dsc |   
4 +-
  Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc |   
4 +-
  Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc |   
4 +-
  Platform/ARM/SgiPkg/SgiPlatform.fdf   |   
4 +-
  Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf|  
75 +++
  Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf   |   
5 +-
  Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h   |   
3 +-
  Platform/ARM/SgiPkg/Include/SgiPlatform.h |   
5 +
  Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c|   
5 +-
  Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c |   
5 +-
  Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c |   
1 +
  Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c |   
6 +
  Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c  |  
25 +-
  Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl | 
512 
  Platform/ARM/SgiPkg/AcpiTables/RdFremont/Madt.aslc| 
138 ++
  Platform/ARM/SgiPkg/AcpiTables/RdFremont/Pptt.aslc| 
167 +++
  Platform/ARM/SgiPkg/RdFremont/RdFremont.fdf.inc   |  
10 +
  26 files changed, 1033 insertions(+), 85 deletions(-)
  copy Platform/ARM/SgiPkg/{SgiMemoryMap2.dsc.inc => SgiMemoryMap3.dsc.inc} 
(62%)
  copy Platform/ARM/SgiPkg/{RdV1/RdV1.dsc => RdFremont/RdFremont.dsc} (77%)
  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
  create mode 100644 Platfor

Re: [edk2-devel] [edk2-platforms][PATCH v5 9/9] Platform/Sgi: Add CPPC support for RD-Fremont platform

2024-03-31 Thread Sami Mujawar

Hi Prabin,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 11/03/2024 01:14 pm, Prabin CA wrote:

Enable ACPI CPPC mechanism for RD-Fremont as defined by the ACPI
specification. The implementation uses AMU registers accessible as
Fixed-feature Hardware (FFixedHW) for monitoring the performance.
Non-secure SCMI fastchannels are used to communicate with LCP to set the
desired performance. In addition to this, RD-Fremont platform does not
support CPPC revision 1 and below. So update the _OSC method to let OSPM
know about this fact.

Signed-off-by: Prabin CA 
---
  Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf |   1 +
  Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl  | 162 

  2 files changed, 163 insertions(+)

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf 
b/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
index 7556c1239116..fcaa3299c4ea 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
@@ -48,6 +48,7 @@ [FixedPcd]
gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable
gArmSgiTokenSpaceGuid.PcdOscLpiEnable
gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl 
b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
index f921eeb2d99e..9c7266c79285 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
@@ -11,6 +11,10 @@
  *   - ACPI 6.5, Chapter 8, Section 8.4.3, Lower Power Idle States
  *   - Arm Functional Fixed Hardware Specification v1.2, Chapter 3, Section 
3.1,
  * Idle management and Low Power Idle states
+*   - ACPI 6.5, Chapter 8, Section 8.4.6, Collaborative Processor Performance
+* Control
+*   - Arm Functional Fixed Hardware Specification v1.2, Chapter 3, Section 3.2,
+* Performance management and Collaborative Processor Performance Control
  *
  **/
  
@@ -43,6 +47,20 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",

Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
  }
}
+
+  If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) {
+/* CPPC revision 1 and below not supported */
+And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0)
+Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+  }
+
+  If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) {
+if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) {
+  And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0)
+  Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+}
+  }
+
  } Else {
And (STS0, Not (OSC_STS_MASK), STS0)
Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
@@ -116,6 +134,15 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", 
"ARMSGI",
  Name (_UID, 0)
  Name (_STA, 0xF)
  
+Name (_CPC, Package()

+  CPPC_PACKAGE_INIT (0x200093000, 0x0, 20, 160, 160, 85, 85, 5)
+)
+
+Name (_PSD, Package () {
+  Package ()
+PSD_INIT (0)
+})
+
  Method (_LPI, 0, NotSerialized) {
Return (\_SB.PLPI)
  }
@@ -131,6 +158,15 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", 
"ARMSGI",
  Name (_UID, 1)
  Name (_STA, 0xF)
  
+Name (_CPC, Package()

+  CPPC_PACKAGE_INIT (0x200293000, 0x0, 20, 160, 160, 85, 85, 5)
+)
+
+Name (_PSD, Package () {
+  Package ()
+PSD_INIT (1)
+})
+
  Method (_LPI, 0, NotSerialized) {
Return (\_SB.PLPI)
  }
@@ -146,6 +182,15 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", 
"ARMSGI",
  Name (_UID, 2)
  Name (_STA, 0xF)
  
+Name (_CPC, Package()

+  CPPC_PACKAGE_INIT (0x200493000, 0x0, 20, 160, 160, 85, 85, 5)
+)
+
+Name (_PSD, Package () {
+  Package ()
+PSD_INIT (2)
+})
+
  Method (_LPI, 0, NotSerialized) {
Return (\_SB.PLPI)
  }
@@ -161,6 +206,15 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", 
"ARMSGI",
  Name (_UID, 3)
  Name (_STA, 0xF)
  
+Name (_CPC, Package()

+  CPPC_PACKAGE_INIT (0x200693000, 0x0, 20, 160, 160, 85, 85, 5)
+)
+
+Name (_PSD, Package () {
+  Package ()
+PSD_INIT (3)
+})
+
  Method (_LPI, 0, NotSerialized) {
R

Re: [edk2-devel] [edk2-platforms][PATCH v5 8/9] Platform/Sgi: Low Power Idle States for RD-Fremont

2024-03-31 Thread Sami Mujawar

Hi Prabin,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 11/03/2024 01:14 pm, Prabin CA wrote:

RD-Fremont platform supports two LPI states, LPI1 (Standby WFI) and LPI3
(Power-down). The cluster supports LPI2 (Power-down) state. The LPI
implementation also supports combined power state for core and cluster.

Signed-off-by: Prabin CA 
---
  Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf |   1 +
  Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl  | 154 

  2 files changed, 155 insertions(+)

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf 
b/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
index 9d07001dec96..7556c1239116 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
@@ -48,6 +48,7 @@ [FixedPcd]
gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl 
b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
index 8812ea877f7a..f921eeb2d99e 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
@@ -8,6 +8,9 @@
  * @par Specification Reference:
  *   - ACPI 6.5, Chapter 5, Section 5.2.11.1, Differentiated System Description
  * Table (DSDT)
+*   - ACPI 6.5, Chapter 8, Section 8.4.3, Lower Power Idle States
+*   - Arm Functional Fixed Hardware Specification v1.2, Chapter 3, Section 3.1,
+* Idle management and Low Power Idle states
  *
  **/
  
@@ -17,6 +20,93 @@

  DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
   EFI_ACPI_ARM_OEM_REVISION) {
Scope (_SB) {
+/* _OSC: Operating System Capabilities */
+Method (_OSC, 4, Serialized) {
+  CreateDWordField (Arg3, 0x00, STS0)
+  CreateDWordField (Arg3, 0x04, CAP0)
+
+  /* Platform-wide Capabilities */
+  If (LEqual (Arg0, ToUUID("0811b06e-4a27-44f9-8d60-3cbbc22e7b48"))) {
+/* OSC rev 1 supported, for other version, return failure */
+If (LEqual (Arg1, One)) {
+  And (STS0, Not (OSC_STS_MASK), STS0)
+
+  If (And (CAP0, OSC_CAP_OS_INITIATED_LPI)) {
+/* OS initiated LPI not supported */
+And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0)
+Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+  }
+
+  If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+  And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+  Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+}
+  }
+} Else {
+  And (STS0, Not (OSC_STS_MASK), STS0)
+  Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
+}
+  } Else {
+And (STS0, Not (OSC_STS_MASK), STS0)
+Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_UUID), STS0)
+  }
+
+  Return (Arg3)
+}
+
+Name (PLPI, Package () {  /* LPI for Processor, support 2 LPI states */
+  0,  // Version
+  0,  // Level Index
+  2,  // Count
+  Package () {// WFI for CPU
+1,// Min residency (uS)
+1,// Wake latency (uS)
+1,// Flags
+0,// Arch Context lost Flags (no loss)
+0,// Residency Counter Frequency
+0,// No parent state
+ResourceTemplate () { // Register Entry method
+  Register (FFixedHW,
+32,   // Bit Width
+0,// Bit Offset
+0x,   // Address
+3,// Access Size
+  )
+},
+ResourceTemplate () { // Null Residency Counter
+  Register (SystemMemory, 0, 0, 0, 0)
+},
+ResourceTemplate () { // Null Usage Counter
+  Register (SystemMemory, 0, 0, 0, 0)
+},
+"LPI1-Core"
+  },
+  Package () {// Power Gating state for CPU
+150,  // Min residency (uS)
+350,  // Wake latency (uS)
+1,// Flags
+1,// Arch Context lost Flags (Core context lost)
+0,// Residency Counter Frequency
+0,// No parent state
+ResourceTemplate () { // Register Entry method
+  Register (FFixedHW

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