ESD or EN50082-1:1997 & EN55024
Comments 1. The first person to publish data on the subnanosecond performance of the ESD event was W.M.King back in the 80s. The data is published in the IEEE.( Dr. Pommerenke..I can send you slides of the data if you wish) 2. There is a distinct difference in the rise time between a discharge from a finger[slow] and a discharge from metal intervening object (such as a key)[fast <1nS]. 3. There is a difference in the risetime due to approach speed and voltage.. Sooo 4. The Contact Discharge was invented to taked care of the variences and provide a consistent rise time irresspective of voltage and approach speed. So one could test at a higher voltage for contact and pass at the lower. Note the probe is sharp..simulating the metal intervening object. Indeed as I recall Keytek had to add a ferrite to moderate the risetime. This is NOT a conductive test. There is a very intense field between the probe and the tip due to the very small capacitance. 5. The Air Discharge probe is rounded - simulating a finger and as we all know, is intended for non-conductive surfaces. The AD has all the variabilities of ESD at a high DC level. There is no radiative coupling per se (which would require an AC field), rather an induced field of the opposite polarity on the other side of the nonconductive medium. If this is high enough a breakdown will occur. Thank you Charles Grasso StorageTek 2270 Sth 88th Street Louisville CO 80027 Tel: (303)673-2908 Fax(303)661-7115 > -- > From: Leslie Bai[SMTP:leslie_...@yahoo.com] > Sent: Saturday, August 21, 1999 12:28 PM > To: Mike Hopkins; 'b...@anritsu.com'; 'IEEE' > Subject: RE: re: EN50082-1:1997 & EN55024 > > > Years ago, Diethard Moehr (Secretary of IEC TC77) > invited me to join IEC TC77 representing > Singapore but due to some personal reason, > the invitation was declined (like I said in Seattle > when I met him, I still feel sorry for that.) > > After reading Mike's email, I can't stop myself > adding a few more words to my previous > reply to Arun Kaore regarding ESD. Many > people think ESD is conductive coupling > and thus only take into account of Voltage > applied. For contact discharge, it may be > alright since in this case conductive coupling > is dominate. But for air-discharge, it is not > true. The ESD effects mainly result from > radiative coupling (some conductive as well > but not dominate). The test level is in Voltage > but actual effects result from dV/dt. In other > words, how many kVs is not so important > but dV/dt becomes the killer. > > Different dV/dt result in different field distributions > and different current indensities when picked up > by different portions of the EUT which is actually > exposed to an electromagnetic field. > > If you don't look at it in this way, I guess > you may not be able to answer the question > logically. > > Regards, > Leslie > > > --- Mike Hopkins wrote: > > > > I'm not sure I'm the most appropriate person to > > answer, but here's my > > opinion. Doug Smith at Auspex (also a member of this > > ieee group) is probably > > the best qualified to talk about ESD and other noise > > phenomena: > > > > Back in the mid '80's when we were demonstrating ESD > > simulators (air > > discharge only), we saw a lot of cases where EUT's > > survived higer voltages > > -- 8 to 10kV, but failed when tested at a few kV. > > With the scopes at the > > time, we could see faster rise times at the lower > > voltages (about 2-5kV), > > slower risetimes at intermediate voltages (5-10kV) > > and faster risetimes > > again at the higher voltages (>10kV). We attributed > > these low voltage > > failures to the faster risetimes with air discharges > > below about 5kV. I I > > think this scenereo is still valid, and we see > > risetimes of a few hundred > > pico seconds below about 3kV. Risetimes do get to be > > slower at higher > > voltages. David Pommerenke at HP has done a lot of > > recent work to > > characterize human ESD with modern scopes and high > > bandwidth > > instrumentation. > > > > With contact mode testing, I'm not sure the same > > argument applies. With a > > simulator that has very clean risetimes, the > > risetime is held constant (IEC > > is .7 to 1ns) with voltage. di/dt in fact increases > > with voltage, which > > would be evidence for more failures at higher > > voltages, but this doesn't > > seem to be the case in practice. Nevertheless, > > people keep coming up with > > cases where
RE: re: EN50082-1:1997 & EN55024
Years ago, Diethard Moehr (Secretary of IEC TC77) invited me to join IEC TC77 representing Singapore but due to some personal reason, the invitation was declined (like I said in Seattle when I met him, I still feel sorry for that.) After reading Mike's email, I can't stop myself adding a few more words to my previous reply to Arun Kaore regarding ESD. Many people think ESD is conductive coupling and thus only take into account of Voltage applied. For contact discharge, it may be alright since in this case conductive coupling is dominate. But for air-discharge, it is not true. The ESD effects mainly result from radiative coupling (some conductive as well but not dominate). The test level is in Voltage but actual effects result from dV/dt. In other words, how many kVs is not so important but dV/dt becomes the killer. Different dV/dt result in different field distributions and different current indensities when picked up by different portions of the EUT which is actually exposed to an electromagnetic field. If you don't look at it in this way, I guess you may not be able to answer the question logically. Regards, Leslie --- Mike Hopkins wrote: > > I'm not sure I'm the most appropriate person to > answer, but here's my > opinion. Doug Smith at Auspex (also a member of this > ieee group) is probably > the best qualified to talk about ESD and other noise > phenomena: > > Back in the mid '80's when we were demonstrating ESD > simulators (air > discharge only), we saw a lot of cases where EUT's > survived higer voltages > -- 8 to 10kV, but failed when tested at a few kV. > With the scopes at the > time, we could see faster rise times at the lower > voltages (about 2-5kV), > slower risetimes at intermediate voltages (5-10kV) > and faster risetimes > again at the higher voltages (>10kV). We attributed > these low voltage > failures to the faster risetimes with air discharges > below about 5kV. I I > think this scenereo is still valid, and we see > risetimes of a few hundred > pico seconds below about 3kV. Risetimes do get to be > slower at higher > voltages. David Pommerenke at HP has done a lot of > recent work to > characterize human ESD with modern scopes and high > bandwidth > instrumentation. > > With contact mode testing, I'm not sure the same > argument applies. With a > simulator that has very clean risetimes, the > risetime is held constant (IEC > is .7 to 1ns) with voltage. di/dt in fact increases > with voltage, which > would be evidence for more failures at higher > voltages, but this doesn't > seem to be the case in practice. Nevertheless, > people keep coming up with > cases where lower voltages cause failures where > higher voltages are okay. > > Some possibilities for the problem with contact > mode: > 1. Some simulator have a considerable amount of > ringing on the rising edge > of the current waveform -- ESD Association work > under WG14 -- also papers > published at past ESD Symposiums by HP and others. > This ringing could be > inconsistant with voltage and be a significant > contributor to failures. > > 2. Breakdowns inside the EUT in air across very > small gaps could produce > risetimes well under 400ps. > > 3. Other ideas > > In any case, it is still felt by members of IEC > TC77B WG9 (now in the > process of completely re-evaluating IEC 61000-4-2) > that testing at lower > voltages is required to insure a product is, in > fact, immune to ESD. This > requirement will likely continue into any future > version of the IEC > standard. > > The latest draft of ANSI/IEEE C63.16- includes > statements recommending > testing begin at the lowest voltage and progress to > higher voltages -- 1kV > intervals for contact mode and 2kV intervals for air > discharge. > > It's clear these requirements will go forward -- > there's just too much > evidence for the existance of the phenomena, even > though the reasons aren't > always clearly understood for a specific EUT. > > Mike Hopkins > mhopk...@keytek.com > > > -Original Message- > > From: b...@anritsu.com [SMTP:b...@anritsu.com] > > Sent: Thursday, August 19, 1999 6:56 PM > > To: Mike Hopkins > > Subject:fwd: re: EN50082-1:1997 & EN55024 > > > > Mike, > > > > You are the most appropriate person to answer the > question that why DUT > > could > > fail at lower ESD voltage sometimes. Can you post > your answer directly to > > the > > emc-pstc group? > > > > Thank you. > > Barry Ma > > b...@anritsu.com > > -- Original Text -- >
Re: EN50082-1:1997 & EN55024
Gentlemen: Increasing the voltage incrementally is the correct way to test for ESD susceptibility. There are indeed physical changes in the discharge risetime for different charge voltages. But there are other ways of explaining these window effects. I first encountered this issue in the mid 1980's, while ESD testing equipment that used singlechip microcontrollers. These were very slow devices with clock speeds of 1 to 4 MHz. They showed signgifcant ESD window effects. But because of their intrinsically slow speeds, I doubt that they were responding to subnanosecond ristime changes. Instead, I like the comparator/logic gate model to explain these window events. COMPARATOR/LOGIC GATE MODEL Suppose we have a logic gate with the following truth table: Inputs A&B HIGH > output LOW > (EUT functions normally) Inputs A&B LOW > output LOW > (EUT functions normally) Inputs A HIGH & B LOW > output HIGH > (EUT resets/fails) Inputs A LOW & B HIGH> output HIGH > (EUT resets/fails) Now suppose further that noise induced by ESD does not couple equally to both A & B. Lets say that the induced voltage at A is 70 percent of the induced voltage at B. Start with A & B inputs LOW with no noise present. At low ESD levels, both A&B inputs remain LOW, and the system functions normally. As we increase the ESD voltage, at some point the induced noise voltage will be high enough so that B is HIGH, while A is still LOW. >From the truth table above, the unit will now reset/fail. But as we increase the ESD level higher, now the noise voltage will drive both A & B HIGH, and the unit is now passing again. Just another model to put in your arsenal when you try to explain ESD window effects to a skeptical customer. Some customers will convert your testing rate into dollars per minute, and will be skeptical about things that increase the testing time. With those guys, you'll need every reasonable model you can lay your hands on. PS - Bear in mind, most modern digital IC's have thousands of gates built into their dies, and it only takes one gate to cause this type of window effect. Best regards Paul Cook NARTE Certified EMC Engineer Alpha EMC Inc 8540 West River Rd Minneapolis, Minnestoa 55444 Tel # (612)-561-2844 Fax #(612)-561-3400 E-mailpaulc...@skypoint.com Specialty - EMC Consulting -Original Message- From: Scott Douglas To: 'bnad...@matrox.com' Cc: hulbe...@pb.com ; emc-p...@ieee.org List-Post: emc-pstc@listserv.ieee.org Date: Friday, August 20, 1999 1:27 PM Subject: RE: EN50082-1:1997 & EN55024 > >Hi Benoit, > >I think that testing at voltage increments up to the standard limit (or >beyond) is necessary. We too had several products that failed at 2 or 3 kV >but never blinked at 8 kV. Testing to 8 kV only does meet the requirement >of the standard, but if my customers keep asking for their money back, what >good is the standard test? As for your hypothesis, I concur. Either one is >possible. I never did go after figuring out why, just how to fix it. The >solution would probably give a clue as to why, but it was long enough ago >that I forget what it was. > >Scott >s_doug...@ecrm.com > >-Original Message- >From: bnad...@matrox.com [SMTP:bnad...@matrox.com] >Sent: Thursday, August 19, 1999 1:07 PM >To: hulbe...@pb.com; emc-p...@ieee.org >Subject: Re: EN50082-1:1997 & EN55024 > > >Bonjour de Montreal, > >In another life, I was working for a EMC Test lab and we always used the >step by step procedure which was in the ESD Standard. We tested using this >procedure for years and we did encounter some products who failed at low >level ESD but had no problem at higher levels. > >We wondered what to conclude and had some hypothesis. > >1) may be the current path was different at higher level or >2) Lower levels might have a slightly longer rise time which tends to >produce >more energy in the lower part of the frequency spectrum where the EUT was >more sensible. > >Since the products were not staying in our hands for long we never had a >chance to investigate further. > >Comments ? >At 10:07 19-08-99 -0400, Jim Hulbert wrote: >>> .Snip lots of other stuff. - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
RE: EN50082-1:1997 & EN55024
Hi Benoit, I think that testing at voltage increments up to the standard limit (or beyond) is necessary. We too had several products that failed at 2 or 3 kV but never blinked at 8 kV. Testing to 8 kV only does meet the requirement of the standard, but if my customers keep asking for their money back, what good is the standard test? As for your hypothesis, I concur. Either one is possible. I never did go after figuring out why, just how to fix it. The solution would probably give a clue as to why, but it was long enough ago that I forget what it was. Scott s_doug...@ecrm.com -Original Message- From: bnad...@matrox.com [SMTP:bnad...@matrox.com] Sent: Thursday, August 19, 1999 1:07 PM To: hulbe...@pb.com; emc-p...@ieee.org Subject:Re: EN50082-1:1997 & EN55024 Bonjour de Montreal, In another life, I was working for a EMC Test lab and we always used the step by step procedure which was in the ESD Standard. We tested using this procedure for years and we did encounter some products who failed at low level ESD but had no problem at higher levels. We wondered what to conclude and had some hypothesis. 1) may be the current path was different at higher level or 2) Lower levels might have a slightly longer rise time which tends to produce more energy in the lower part of the frequency spectrum where the EUT was more sensible. Since the products were not staying in our hands for long we never had a chance to investigate further. Comments ? At 10:07 19-08-99 -0400, Jim Hulbert wrote: >> >> >> >>Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards >>EN61000-4-2 and EN61000-4-5 for ESD and Surge. >> >>EN61000-4-2, Section 5 starts out "The preferential range of test levels for the >>ESD test is given in table 1. Testing shall also be satisfied at the >lower >>levels given in table 1." EN61000-4-5, Section 5 contains similar >wording. >>This is how we perform our compliance tests. We start at the lowest >test >>voltage levels from the respective tables and step up to the test levels called >>out in EN50082-1/ EN55024 (or higher, depending on our own in-house >product >>spec.) >> >>However, I have noticed that some test labs go straight to the levels called out >>in EN 50082-1/EN55024 and skip testing at the lower levels. I believe >this >>approach is incorrect because it does not conform to the requirements of >the >>basic standard and is simply not a complete test. As explained in EN61000-4-5, >>the non-linear current-voltage characteristics of the equipment under >test >>should be considered and the test voltage should therefore be increased >by steps >>up to the test level specified in the product standard or test plan. >The same >>rationale applies to ESD testing where current-voltage characteristics >are also >>non-linear. >> >>How do others approach these tests? Are we adding unnecessary test time >by >>starting at lower test voltages and stepping our way up or are the test >labs >>that go straight to the maximum test levels overlooking an important aspect of >>the testing? >> >>Jim Hulbert >>Senior Engineer-EMC >>Pitney Bowes -- Benoit Nadeau, ing. M.ing. (P.Eng., M.Eng) Gerant du Groupe Conformite (Conformity Group Manager) Matrox <http://www.matrox.com/> -- 1055, boul. St-Regis Dorval (Quebec) Canada H9P 2T4 Tel : (514) 822-6000 (x2475) FAX : (514) 822-6275 Internet : bnad...@matrox.com, <mailto:bnad...@matrox.com> - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
RE: re: EN50082-1:1997 & EN55024
I'm not sure I'm the most appropriate person to answer, but here's my opinion. Doug Smith at Auspex (also a member of this ieee group) is probably the best qualified to talk about ESD and other noise phenomena: Back in the mid '80's when we were demonstrating ESD simulators (air discharge only), we saw a lot of cases where EUT's survived higer voltages -- 8 to 10kV, but failed when tested at a few kV. With the scopes at the time, we could see faster rise times at the lower voltages (about 2-5kV), slower risetimes at intermediate voltages (5-10kV) and faster risetimes again at the higher voltages (>10kV). We attributed these low voltage failures to the faster risetimes with air discharges below about 5kV. I I think this scenereo is still valid, and we see risetimes of a few hundred pico seconds below about 3kV. Risetimes do get to be slower at higher voltages. David Pommerenke at HP has done a lot of recent work to characterize human ESD with modern scopes and high bandwidth instrumentation. With contact mode testing, I'm not sure the same argument applies. With a simulator that has very clean risetimes, the risetime is held constant (IEC is .7 to 1ns) with voltage. di/dt in fact increases with voltage, which would be evidence for more failures at higher voltages, but this doesn't seem to be the case in practice. Nevertheless, people keep coming up with cases where lower voltages cause failures where higher voltages are okay. Some possibilities for the problem with contact mode: 1. Some simulator have a considerable amount of ringing on the rising edge of the current waveform -- ESD Association work under WG14 -- also papers published at past ESD Symposiums by HP and others. This ringing could be inconsistant with voltage and be a significant contributor to failures. 2. Breakdowns inside the EUT in air across very small gaps could produce risetimes well under 400ps. 3. Other ideas In any case, it is still felt by members of IEC TC77B WG9 (now in the process of completely re-evaluating IEC 61000-4-2) that testing at lower voltages is required to insure a product is, in fact, immune to ESD. This requirement will likely continue into any future version of the IEC standard. The latest draft of ANSI/IEEE C63.16- includes statements recommending testing begin at the lowest voltage and progress to higher voltages -- 1kV intervals for contact mode and 2kV intervals for air discharge. It's clear these requirements will go forward -- there's just too much evidence for the existance of the phenomena, even though the reasons aren't always clearly understood for a specific EUT. Mike Hopkins mhopk...@keytek.com > -Original Message- > From: b...@anritsu.com [SMTP:b...@anritsu.com] > Sent: Thursday, August 19, 1999 6:56 PM > To: Mike Hopkins > Subject: fwd: re: EN50082-1:1997 & EN55024 > > Mike, > > You are the most appropriate person to answer the question that why DUT > could > fail at lower ESD voltage sometimes. Can you post your answer directly to > the > emc-pstc group? > > Thank you. > Barry Ma > b...@anritsu.com > -- Original Text -- > > From: "Leslie Bai" , on 8/19/99 3:00 PM: > To: Bailin Ma@MMDILAB@ACUS > > Barry, > > I agree with you but just wondering why > "DUT got larger current at lower ESD > voltage. ...". > > BTW, I called Anritsu early this week > requesting for a demonstration of "Site Master" > but just couldn't get any reply yet. > > Rgds, > Leslie > > --- b...@anritsu.com wrote: > > > > Jim, > > > > You have been doing right thing. Those who directly > > go to the highest ESD > > voltage level may thought if DUT can pass the > > highest level it will certainly > > pass lower level. As a matter of fact, DUT could > > possibly fail at lower level > > and pass at higher level. Because DUT got larger > > current at lower ESD > > voltage. ... > > > > Barry Ma > > b...@anritsu.com > > -- Original Text -- > > > > From: "Jim Hulbert" , on 8/19/99 > > 11:34 AM: > > > > > > > > > > Immunity test standards EN50082-1:1997 and EN 55024 > > call out the basic > > standards > > EN61000-4-2 and EN61000-4-5 for ESD and Surge. > > > > EN61000-4-2, Section 5 starts out "The preferential > > range of test levels for > > the > > ESD test is given in table 1. Testing shall also be > > satisfied at the lower > > levels given in table 1." EN61000-4-5, Section 5 > > contains similar wording. > > This is how we perform our compliance tests. We > > start at the lowest test >
FW: EN50082-1:1997 & EN55024
EN 55014-2: 1997: Immunity standard for Household goods: #5.1: ESD will be tested to the procedures of IEC 1000-4-2 but "tests with lower voltages than those given in Table 1 (4kV Contact/ 8 kV Air) are not required.: # 5.6: Surges: Tests with lower voltages than those given in Table 12 (1kV/2kV) are not required, but tests will be carried out in accordance with IEC 1000-4-5. What is right and what is wrong? At least for household we believe that EN 55014-2 takes precedence, and we belt the EUT with the stated levels. But we do a few exploratory runs at lower voltages. For all other immunity standards we start off gradually till we reach the stated limit values, which is the way I believe it should be done. But it increases the time, especially for Surge tests where you got to hit at different points on the sine wave quadrant too. Regards Arun Kaore EMC Engineer ADI Limited Systems Group Test & Evaluation Centre Forrester Road, St Marys NSW 2760 P O Box: 315, St Marys NSW 1790 Tel: 61 2 9673 8375 Fax: 61 2 9673 8321 Email: kao...@sg.adi-limited.com.au <mailto:kao...@sg.adi-limited.com.au> -Original Message- From: Jim Hulbert [mailto:hulbe...@pb.com] <mailto:[mailto:hulbe...@pb.com]> Sent: Friday, 20 August, 1999 0:07 To: emc-p...@ieee.org <mailto:emc-p...@ieee.org> Subject:EN50082-1:1997 & EN55024 Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards EN61000-4-2 and EN61000-4-5 for ESD and Surge. EN61000-4-2, Section 5 starts out "The preferential range of test levels for the ESD test is given in table 1. Testing shall also be satisfied at the lower levels given in table 1." EN61000-4-5, Section 5 contains similar wording. This is how we perform our compliance tests. We start at the lowest test voltage levels from the respective tables and step up to the test levels called out in EN50082-1/ EN55024 (or higher, depending on our own in-house product spec.) However, I have noticed that some test labs go straight to the levels called out in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this approach is incorrect because it does not conform to the requirements of the basic standard and is simply not a complete test. As explained in EN61000-4-5, the non-linear current-voltage characteristics of the equipment under test should be considered and the test voltage should therefore be increased by steps up to the test level specified in the product standard or test plan. The same rationale applies to ESD testing where current-voltage characteristics are also non-linear. How do others approach these tests? Are we adding unnecessary test time by starting at lower test voltages and stepping our way up or are the test labs that go straight to the maximum test levels overlooking an important aspect of the testing? Jim Hulbert Senior Engineer-EMC Pitney Bowes - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
Re: EN50082-1:1997 & EN55024
Hi, all Just put a few words of my understanding of ESD. ESD test is to verify the EUT immunity due to induced current (nonsense!). The current can be induced by conducted coupling (direct contact) or/and radiated coupling. My understanding of the test is that for contact discharge, conduct coupling is dominate and for air-discharge, radiated coupling is dominate. Thus for contactt discharge, if you can pass the higher level, you may not have much problem with lower levels, but although radiated coupling is not dominate for contact discharge, the effects have to be verified through testing. For air-discharge, ESD test is to verify the effects of electromagnetic field on the EUT - i.e. a kind of field immunity test. Different levels will have a different field distribution around the EUT due to the different dV/dt - Maxwell told us. Thus, the induced current is (mainly) generated by the electromagnetic field. I tested one Fire Alarm system years ago. This system has 128 ports all connected with (at least 5m) twisted wires. I noticed that the cable layout can affect result (pass or fail) significantly when doing air-discharge. However, there is no noticable difference by varying cable layout when doing contact discharge. That was my understanding comes from. Rgds, Leslie --- Hans Mellberg wrote: > > > --- Benoit Nadeau wrote: > > > > Bonjour de Montreal, > > > > In another life, I was working for a EMC Test lab > > and we always used the > > step by step procedure which was in the ESD > > Standard. We tested using this > > procedure for years and we did encounter some > > products who failed at low > > level ESD but had no problem at higher levels. > > > > We wondered what to conclude and had some > > hypothesis. > > > > 1) may be the current path was different at higher > > level or > > 2) Lower levels might have a slightly longer rise > > time which tends to produce > > more energy in the lower part of the frequency > > spectrum where the EUT was > > more sensible. > > > > > Partly true. The risetime changes as the voltage > increases. The > risetime "slows" (dV/dt or dI/dt value gets reduced) > down as you begin > to go over 6-8kV. I also have seen products fail at > 2-4 kV and pass at > levels 8-10 kV. This ofcourse is on air discharge > equipment where > variability of the risetime is expected. > Contact discharge equipment do not exhibit much > risetime variability > (at least not to a large degree) > > Hans T. Mellberg > EMC/ESD Consultant > member ANSI/IEEE C63.16 WG on ESD > __ > Do You Yahoo!? > Bid and sell for free at http://auctions.yahoo.com > > > - > This message is coming from the emc-pstc discussion > list. > To cancel your subscription, send mail to > majord...@ieee.org > with the single line: "unsubscribe emc-pstc" > (without the > quotes). For help, send mail to ed.pr...@cubic.com, > jim_bac...@monarch.com, ri...@sdd.hp.com, or > roger.volgst...@compaq.com (the list > administrators). > > > __ Do You Yahoo!? Bid and sell for free at http://auctions.yahoo.com - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
Re: EN50082-1:1997 & EN55024
--- Benoit Nadeau wrote: > > Bonjour de Montreal, > > In another life, I was working for a EMC Test lab > and we always used the > step by step procedure which was in the ESD > Standard. We tested using this > procedure for years and we did encounter some > products who failed at low > level ESD but had no problem at higher levels. > > We wondered what to conclude and had some > hypothesis. > > 1) may be the current path was different at higher > level or > 2) Lower levels might have a slightly longer rise > time which tends to produce > more energy in the lower part of the frequency > spectrum where the EUT was > more sensible. > Partly true. The risetime changes as the voltage increases. The risetime "slows" (dV/dt or dI/dt value gets reduced) down as you begin to go over 6-8kV. I also have seen products fail at 2-4 kV and pass at levels 8-10 kV. This ofcourse is on air discharge equipment where variability of the risetime is expected. Contact discharge equipment do not exhibit much risetime variability (at least not to a large degree) Hans T. Mellberg EMC/ESD Consultant member ANSI/IEEE C63.16 WG on ESD __ Do You Yahoo!? Bid and sell for free at http://auctions.yahoo.com - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
Re: EN50082-1:1997 & EN55024
You should always start at the lower ESD Level and step up to the higher levels. You cannot skip the lower levels as I have encountered products that pass the higher levels and fail at the lower levels. Pryor McGinnis c...@prodigy.net -Original Message- From: Jim Hulbert To: emc-p...@ieee.org List-Post: emc-pstc@listserv.ieee.org Date: Thursday, August 19, 1999 2:31 PM Subject: EN50082-1:1997 & EN55024 > > > >Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards >EN61000-4-2 and EN61000-4-5 for ESD and Surge. > >EN61000-4-2, Section 5 starts out "The preferential range of test levels for the >ESD test is given in table 1. Testing shall also be satisfied at the lower >levels given in table 1." EN61000-4-5, Section 5 contains similar wording. >This is how we perform our compliance tests. We start at the lowest test >voltage levels from the respective tables and step up to the test levels called >out in EN50082-1/ EN55024 (or higher, depending on our own in-house product >spec.) > >However, I have noticed that some test labs go straight to the levels called out >in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this >approach is incorrect because it does not conform to the requirements of the >basic standard and is simply not a complete test. As explained in EN61000-4-5, >the non-linear current-voltage characteristics of the equipment under test >should be considered and the test voltage should therefore be increased by steps >up to the test level specified in the product standard or test plan. The same >rationale applies to ESD testing where current-voltage characteristics are also >non-linear. > >How do others approach these tests? Are we adding unnecessary test time by >starting at lower test voltages and stepping our way up or are the test labs >that go straight to the maximum test levels overlooking an important aspect of >the testing? > >Jim Hulbert >Senior Engineer-EMC >Pitney Bowes > > > >- >This message is coming from the emc-pstc discussion list. >To cancel your subscription, send mail to majord...@ieee.org >with the single line: "unsubscribe emc-pstc" (without the >quotes). For help, send mail to ed.pr...@cubic.com, >jim_bac...@monarch.com, ri...@sdd.hp.com, or >roger.volgst...@compaq.com (the list administrators). > > - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
Re: EN50082-1:1997 & EN55024
Thanks, Robert, and everyone else who responded. We all seem to be in agreement. I didn't mention the EFT/Burst test in my original question because the -4 standard, unlike the -2 and -5 standards, does not call out testing at the lower voltages. Not sure why that is Jim Hulbert Senior Engineer - EMC Pitney Bowes -- Forwarded by Jim Hulbert/MSD/US/PBI on 08/19/99 04:43 PM --- rehel...@mmm.com on 08/19/99 02:23:49 PM To: "Jim Hulbert" cc: emc-p...@majordomo.ieee.org (bcc: Jim Hulbert/MSD/US/PBI) Subject: Re: EN50082-1:1997 & EN55024 For both tests (and EFT), we go from the lowest and step through to the higest level specified by the standard or our customer. I have had equipment pass a given voltage and fail at a lower voltage level, but I have only seen this happen with ESD (not EFT or surge). === "Jim Hulbert" on 08/19/99 09:07:25 AM Please respond to "Jim Hulbert" To: emc-p...@ieee.org cc:(bcc: Robert E. Heller/US-Corporate/3M/US) Subject: EN50082-1:1997 & EN55024 Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards EN61000-4-2 and EN61000-4-5 for ESD and Surge. EN61000-4-2, Section 5 starts out "The preferential range of test levels for the ESD test is given in table 1. Testing shall also be satisfied at the lower levels given in table 1." EN61000-4-5, Section 5 contains similar wording. This is how we perform our compliance tests. We start at the lowest test voltage levels from the respective tables and step up to the test levels called out in EN50082-1/ EN55024 (or higher, depending on our own in-house product spec.) However, I have noticed that some test labs go straight to the levels called out in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this approach is incorrect because it does not conform to the requirements of the basic standard and is simply not a complete test. As explained in EN61000-4-5, the non-linear current-voltage characteristics of the equipment under test should be considered and the test voltage should therefore be increased by steps up to the test level specified in the product standard or test plan. The same rationale applies to ESD testing where current-voltage characteristics are also non-linear. How do others approach these tests? Are we adding unnecessary test time by starting at lower test voltages and stepping our way up or are the test labs that go straight to the maximum test levels overlooking an important aspect of the testing? Jim Hulbert Senior Engineer-EMC Pitney Bowes - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
RE: EN50082-1:1997 & EN55024
I agree that you should test and progressively increase the levels, because the lower level tests pre-condition the samples and if you fail then you have already obtained the data to apply the highest passing level. This is even more important when you are doing more destructive tests like TOV. Monty Griffith Senior Product Safety Engineer EMC Quality Manager Intergraph Compliance Services Ph. (256) 730-6017 Fx. (256) 730-6239 http://cscsrv.ics.ingr.com -Original Message- From: Lyons, Jim [mailto:jim.ly...@gtech.com] Sent: Thursday, August 19, 1999 1:49 PM To: 'Jim Hulbert'; emc-p...@ieee.org Subject: RE: EN50082-1:1997 & EN55024 We also fully test at each lower level up to the one we need to pass. It is time consuming, but that is what the standards call for, and that is what we do. I don't want to have to explain to some AHJ some day why I didn't follow the test procedure. Typically, we test our equipment, in-house, to one level higher than that required for the CE Marking. I have also noticed a test lab taking some shortcuts by cutting down on the number of hits/surges at the lower levels, and then doing the recommended number at the top level. Jim Lyons Mgr - product Compliance GTECH Corp. -Original Message- From: Jim Hulbert [mailto:hulbe...@pb.com] Sent: Thursday, August 19, 1999 10:07 AM To: emc-p...@ieee.org Subject: EN50082-1:1997 & EN55024 Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards EN61000-4-2 and EN61000-4-5 for ESD and Surge. EN61000-4-2, Section 5 starts out "The preferential range of test levels for the ESD test is given in table 1. Testing shall also be satisfied at the lower levels given in table 1." EN61000-4-5, Section 5 contains similar wording. This is how we perform our compliance tests. We start at the lowest test voltage levels from the respective tables and step up to the test levels called out in EN50082-1/ EN55024 (or higher, depending on our own in-house product spec.) However, I have noticed that some test labs go straight to the levels called out in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this approach is incorrect because it does not conform to the requirements of the basic standard and is simply not a complete test. As explained in EN61000-4-5, the non-linear current-voltage characteristics of the equipment under test should be considered and the test voltage should therefore be increased by steps up to the test level specified in the product standard or test plan. The same rationale applies to ESD testing where current-voltage characteristics are also non-linear. How do others approach these tests? Are we adding unnecessary test time by starting at lower test voltages and stepping our way up or are the test labs that go straight to the maximum test levels overlooking an important aspect of the testing? Jim Hulbert Senior Engineer-EMC Pitney Bowes - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
RE: EN50082-1:1997 & EN55024
I concur, particularly with item 2. It is my understanding that the frequency spectra is different at the lower levels. Meaning your are stressing different frequencies. Not sure I fully understand why, if the discharge waveform is described shouldn't it be the same rise time for all voltage levels? That implies that the frequency content would be the same throughout. Haven't given it a great deal of thought (I know what your thinking but please spare me), but I certainly agree that I have seen lower levels cause problems not seen at the higher discharge levels, and as a practice have always stepped up in about 2k increments, and have gone significantly higher than the IEC levels required when the test dealt with things people had to touch to make it work - EG keyboards. For what its worth. Gary -Original Message- From: Benoit Nadeau [SMTP:bnad...@matrox.com] Sent: Thursday, August 19, 1999 10:07 AM To: Jim Hulbert; emc-p...@ieee.org Subject: Re: EN50082-1:1997 & EN55024 Bonjour de Montreal, In another life, I was working for a EMC Test lab and we always used the step by step procedure which was in the ESD Standard. We tested using this procedure for years and we did encounter some products who failed at low level ESD but had no problem at higher levels. We wondered what to conclude and had some hypothesis. 1) may be the current path was different at higher level or 2) Lower levels might have a slightly longer rise time which tends to produce more energy in the lower part of the frequency spectrum where the EUT was more sensible. Since the products were not staying in our hands for long we never had a chance to investigate further. Comments ? At 10:07 19-08-99 -0400, Jim Hulbert wrote: > > > >Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards >EN61000-4-2 and EN61000-4-5 for ESD and Surge. > >EN61000-4-2, Section 5 starts out "The preferential range of test levels for the >ESD test is given in table 1. Testing shall also be satisfied at the lower >levels given in table 1." EN61000-4-5, Section 5 contains similar wording. >This is how we perform our compliance tests. We start at the lowest test >voltage levels from the respective tables and step up to the test levels called >out in EN50082-1/ EN55024 (or higher, depending on our own in-house product >spec.) > >However, I have noticed that some test labs go straight to the levels called out >in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this >approach is incorrect because it does not conform to the requirements of the >basic standard and is simply not a complete test. As explained in EN61000-4-5, >the non-linear current-voltage characteristics of the equipment under test >should be considered and the test voltage should therefore be increased by steps >up to the test level specified in the product standard or test plan. The same >rationale applies to ESD testing where current-voltage characteristics are also >non-linear. > >How do others approach these tests? Are we adding unnecessary test time by >starting at lower test voltages and stepping our way up or are the test labs >that go straight to the maximum test levels overlooking an important aspect of >the testing? > >Jim Hulbert >Senior Engineer-EMC >Pitney Bowes -- Benoit Nadeau, ing. M.ing. (P.Eng., M.Eng) Gerant du Groupe Conformite (Conformity Group Manager) Matrox <http://www.matrox.com/> -- 1055, boul. St-Regis Dorval (Quebec) Canada H9P 2T4 Tel : (514) 822-6000 (x2475) FAX : (514) 822-6275 Internet : bnad...@matrox.com, <mailto:bnad...@matrox.com> - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mai
RE: EN50082-1:1997 & EN55024
We also fully test at each lower level up to the one we need to pass. It is time consuming, but that is what the standards call for, and that is what we do. I don't want to have to explain to some AHJ some day why I didn't follow the test procedure. Typically, we test our equipment, in-house, to one level higher than that required for the CE Marking. I have also noticed a test lab taking some shortcuts by cutting down on the number of hits/surges at the lower levels, and then doing the recommended number at the top level. Jim Lyons Mgr - product Compliance GTECH Corp. -Original Message- From: Jim Hulbert [mailto:hulbe...@pb.com] Sent: Thursday, August 19, 1999 10:07 AM To: emc-p...@ieee.org Subject: EN50082-1:1997 & EN55024 Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards EN61000-4-2 and EN61000-4-5 for ESD and Surge. EN61000-4-2, Section 5 starts out "The preferential range of test levels for the ESD test is given in table 1. Testing shall also be satisfied at the lower levels given in table 1." EN61000-4-5, Section 5 contains similar wording. This is how we perform our compliance tests. We start at the lowest test voltage levels from the respective tables and step up to the test levels called out in EN50082-1/ EN55024 (or higher, depending on our own in-house product spec.) However, I have noticed that some test labs go straight to the levels called out in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this approach is incorrect because it does not conform to the requirements of the basic standard and is simply not a complete test. As explained in EN61000-4-5, the non-linear current-voltage characteristics of the equipment under test should be considered and the test voltage should therefore be increased by steps up to the test level specified in the product standard or test plan. The same rationale applies to ESD testing where current-voltage characteristics are also non-linear. How do others approach these tests? Are we adding unnecessary test time by starting at lower test voltages and stepping our way up or are the test labs that go straight to the maximum test levels overlooking an important aspect of the testing? Jim Hulbert Senior Engineer-EMC Pitney Bowes - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
re: EN50082-1:1997 & EN55024
Jim, You have been doing right thing. Those who directly go to the highest ESD voltage level may thought if DUT can pass the highest level it will certainly pass lower level. As a matter of fact, DUT could possibly fail at lower level and pass at higher level. Because DUT got larger current at lower ESD voltage. ... Barry Ma b...@anritsu.com -- Original Text -- From: "Jim Hulbert" , on 8/19/99 11:34 AM: Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards EN61000-4-2 and EN61000-4-5 for ESD and Surge. EN61000-4-2, Section 5 starts out "The preferential range of test levels for the ESD test is given in table 1. Testing shall also be satisfied at the lower levels given in table 1." EN61000-4-5, Section 5 contains similar wording. This is how we perform our compliance tests. We start at the lowest test voltage levels from the respective tables and step up to the test levels called out in EN50082-1/ EN55024 (or higher, depending on our own in-house product spec.) However, I have noticed that some test labs go straight to the levels called out in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this approach is incorrect because it does not conform to the requirements of the basic standard and is simply not a complete test. As explained in EN61000-4-5, the non-linear current-voltage characteristics of the equipment under test should be considered and the test voltage should therefore be increased by steps up to the test level specified in the product standard or test plan. The same rationale applies to ESD testing where current-voltage characteristics are also non-linear. How do others approach these tests? Are we adding unnecessary test time by starting at lower test voltages and stepping our way up or are the test labs that go straight to the maximum test levels overlooking an important aspect of the testing? Jim Hulbert Senior Engineer-EMC Pitney Bowes - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
Re: EN50082-1:1997 & EN55024
>In another life, I was working for a EMC Test lab and we always used the >step by step procedure which was in the ESD Standard. We tested using this >procedure for years and we did encounter some products who failed at low >level ESD but had no problem at higher levels. > >We wondered what to conclude and had some hypothesis. Benoit, Our Electromagnetic Compatibility (EMC) Lab folks require us to perform IEC 801.2 Electrostatic Discharge (ESD) tests at all test levels up to the specified maximum for the product for air discharge and contact discharge. For Horizontal Coupling Plane and Vertical Coupling Plane tests, which are not required for the CE Mark, they let us test at just the maximum voltage. During developmental tests (we fix these before we release the product to manufacturing) we have seen two forms of the effect that you describe-- that a product passes ESD testing at low and high voltages but fails at intermediate voltages. One set of symptoms was: * Product worked perfectly despite low-voltage ESD hits. * Around 8kV the product locked up occasionally. * At 15kV the product did a power-on reset (POR) and restarted itself without losing any data. We found a couple of interrupt lines going to the microprocessor that were very close to the back plate of the printer. At intermediate ESD voltages we put enough of a spike on the interrupt lines that the microprocessor would start to execute an interrupt, then hang because the interrupt went away. At higher voltage we still hung the microprocessor, but would also trigger the POR circuit starting the card up from scratch. Our fix was to add 22pF capacitors on the interrupt lines at the microprocessor, and move them well away from the edge of the card to make the card more immune to ESD. For the other case, the product would work perfectly despite low-voltage or high-voltage ESD hits, but would act up for intermediate-voltage ESD hits. This was before I became involved with EMC/ESD testing, but the explanation I heard was that the product was sensitive to the dI/dt of the ESD hits. At low-to-medium voltages dI/dt was proportional to the voltage on the ESD gun. At high voltages corona started carrying off the charge early, and effectively slowed dI/dt below the susceptibility level of the product. This is akin to bringing the gun in slowly, versus quickly (just below a speed that would damage the product) as required by IEC 801.2. John Barnes Advisory Engineer Lexmark International - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
Re: EN50082-1:1997 & EN55024
For both tests (and EFT), we go from the lowest and step through to the higest level specified by the standard or our customer. I have had equipment pass a given voltage and fail at a lower voltage level, but I have only seen this happen with ESD (not EFT or surge). === "Jim Hulbert" on 08/19/99 09:07:25 AM Please respond to "Jim Hulbert" To: emc-p...@ieee.org cc:(bcc: Robert E. Heller/US-Corporate/3M/US) Subject: EN50082-1:1997 & EN55024 Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards EN61000-4-2 and EN61000-4-5 for ESD and Surge. EN61000-4-2, Section 5 starts out "The preferential range of test levels for the ESD test is given in table 1. Testing shall also be satisfied at the lower levels given in table 1." EN61000-4-5, Section 5 contains similar wording. This is how we perform our compliance tests. We start at the lowest test voltage levels from the respective tables and step up to the test levels called out in EN50082-1/ EN55024 (or higher, depending on our own in-house product spec.) However, I have noticed that some test labs go straight to the levels called out in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this approach is incorrect because it does not conform to the requirements of the basic standard and is simply not a complete test. As explained in EN61000-4-5, the non-linear current-voltage characteristics of the equipment under test should be considered and the test voltage should therefore be increased by steps up to the test level specified in the product standard or test plan. The same rationale applies to ESD testing where current-voltage characteristics are also non-linear. How do others approach these tests? Are we adding unnecessary test time by starting at lower test voltages and stepping our way up or are the test labs that go straight to the maximum test levels overlooking an important aspect of the testing? Jim Hulbert Senior Engineer-EMC Pitney Bowes - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
RE: EN50082-1:1997 & EN55024
Jim, Here at Emulex we also start at the lowest test level and slowly work our way up. In my time working at a commercial test lab, I have seen several cases where a product could fail ESD testing at 6 kV but pass at 8 kV. We step through all of the levels as required by the test procedure to avoid this "window" effect. In addition, doing the test in this manner allows the test personnel to easily determine the "threshold" of a non-compliant unit. -- Sincerely, Randall T. Flinders EMC Engineer Emulex Network Systems V: (714) 513-8012 F: (714) 513-8265 randall.flind...@emulex.com __ __ __\ /__ __/ \__ E M U L E X Chairman Orange County Chapter IEEE EMC Society r.flind...@ieee.org -- From: Jim Hulbert Sent: Thursday, August 19, 1999 7:07 AM To: emc-p...@ieee.org Subject: EN50082-1:1997 & EN55024 Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards EN61000-4-2 and EN61000-4-5 for ESD and Surge. EN61000-4-2, Section 5 starts out "The preferential range of test levels for the ESD test is given in table 1. Testing shall also be satisfied at the lower levels given in table 1." EN61000-4-5, Section 5 contains similar wording. This is how we perform our compliance tests. We start at the lowest test voltage levels from the respective tables and step up to the test levels called out in EN50082-1/ EN55024 (or higher, depending on our own in-house product spec.) However, I have noticed that some test labs go straight to the levels called out in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this approach is incorrect because it does not conform to the requirements of the basic standard and is simply not a complete test. As explained in EN61000-4-5, the non-linear current-voltage characteristics of the equipment under test should be considered and the test voltage should therefore be increased by steps up to the test level specified in the product standard or test plan. The same rationale applies to ESD testing where current-voltage characteristics are also non-linear. How do others approach these tests? Are we adding unnecessary test time by starting at lower test voltages and stepping our way up or are the test labs that go straight to the maximum test levels overlooking an important aspect of the testing? Jim Hulbert Senior Engineer-EMC Pitney Bowes - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
Re: EN50082-1:1997 & EN55024
Jim, I believe you are correct, especially for the tests according to EN 61000-4-2 and EN 61000-4-5, (ESD & Surge). The tests should be done at lower voltages. We have always done it that way at TUV Rheinland. By the way, for the surge tests, following the standards and doing all the lower voltages at a 1 per minute rep rate and 0,90 & 270 degrees of the AC wave takes over 3 hours to perform. I say this because we have been told we take too long to do a surge test! Bruce Fagley TUV Rheinland EMC Dept - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
RE: EN50082-1:1997 & EN55024
Hi Jim, You are absolutely correct. Many clients want to know at what the threshold level the E.U.T. exhibited degradation before/or component failure. Don't forget about EN61000-4-4 Electrical Fast Transients Best Regards -Original Message- From: Jim Hulbert [mailto:hulbe...@pb.com] Sent: Thursday, August 19, 1999 10:07 AM To: emc-p...@ieee.org Subject: EN50082-1:1997 & EN55024 Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards EN61000-4-2 and EN61000-4-5 for ESD and Surge. EN61000-4-2, Section 5 starts out "The preferential range of test levels for the ESD test is given in table 1. Testing shall also be satisfied at the lower levels given in table 1." EN61000-4-5, Section 5 contains similar wording. This is how we perform our compliance tests. We start at the lowest test voltage levels from the respective tables and step up to the test levels called out in EN50082-1/ EN55024 (or higher, depending on our own in-house product spec.) However, I have noticed that some test labs go straight to the levels called out in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this approach is incorrect because it does not conform to the requirements of the basic standard and is simply not a complete test. As explained in EN61000-4-5, the non-linear current-voltage characteristics of the equipment under test should be considered and the test voltage should therefore be increased by steps up to the test level specified in the product standard or test plan. The same rationale applies to ESD testing where current-voltage characteristics are also non-linear. How do others approach these tests? Are we adding unnecessary test time by starting at lower test voltages and stepping our way up or are the test labs that go straight to the maximum test levels overlooking an important aspect of the testing? Jim Hulbert Senior Engineer-EMC Pitney Bowes - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). <>
Re: EN50082-1:1997 & EN55024
Bonjour de Montreal, In another life, I was working for a EMC Test lab and we always used the step by step procedure which was in the ESD Standard. We tested using this procedure for years and we did encounter some products who failed at low level ESD but had no problem at higher levels. We wondered what to conclude and had some hypothesis. 1) may be the current path was different at higher level or 2) Lower levels might have a slightly longer rise time which tends to produce more energy in the lower part of the frequency spectrum where the EUT was more sensible. Since the products were not staying in our hands for long we never had a chance to investigate further. Comments ? At 10:07 19-08-99 -0400, Jim Hulbert wrote: > > > >Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards >EN61000-4-2 and EN61000-4-5 for ESD and Surge. > >EN61000-4-2, Section 5 starts out "The preferential range of test levels for the >ESD test is given in table 1. Testing shall also be satisfied at the lower >levels given in table 1." EN61000-4-5, Section 5 contains similar wording. >This is how we perform our compliance tests. We start at the lowest test >voltage levels from the respective tables and step up to the test levels called >out in EN50082-1/ EN55024 (or higher, depending on our own in-house product >spec.) > >However, I have noticed that some test labs go straight to the levels called out >in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this >approach is incorrect because it does not conform to the requirements of the >basic standard and is simply not a complete test. As explained in EN61000-4-5, >the non-linear current-voltage characteristics of the equipment under test >should be considered and the test voltage should therefore be increased by steps >up to the test level specified in the product standard or test plan. The same >rationale applies to ESD testing where current-voltage characteristics are also >non-linear. > >How do others approach these tests? Are we adding unnecessary test time by >starting at lower test voltages and stepping our way up or are the test labs >that go straight to the maximum test levels overlooking an important aspect of >the testing? > >Jim Hulbert >Senior Engineer-EMC >Pitney Bowes -- Benoit Nadeau, ing. M.ing. (P.Eng., M.Eng) Gerant du Groupe Conformite (Conformity Group Manager) Matrox <http://www.matrox.com/> -- 1055, boul. St-Regis Dorval (Quebec) Canada H9P 2T4 Tel : (514) 822-6000 (x2475) FAX : (514) 822-6275 Internet : bnad...@matrox.com, <mailto:bnad...@matrox.com> - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
EN50082-1:1997 & EN55024
Jim, The way you use to perform the tests is the right one. We use exactly the same one. In France too, some labs are testing as you explain, but they are wrong. good work !! == Pierre Selva Laboratory responsible SMEE Actions MesuresEMC and Safety laboratory ZI des Blanchisseries Phone : 33 4 76 65 76 50 38500 VOIRONFax : 33 4 76 66 18 30 FRANCE e-mail : actionsmesures@compuserve;com == - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
EN50082-1:1997 & EN55024
Immunity test standards EN50082-1:1997 and EN 55024 call out the basic standards EN61000-4-2 and EN61000-4-5 for ESD and Surge. EN61000-4-2, Section 5 starts out "The preferential range of test levels for the ESD test is given in table 1. Testing shall also be satisfied at the lower levels given in table 1." EN61000-4-5, Section 5 contains similar wording. This is how we perform our compliance tests. We start at the lowest test voltage levels from the respective tables and step up to the test levels called out in EN50082-1/ EN55024 (or higher, depending on our own in-house product spec.) However, I have noticed that some test labs go straight to the levels called out in EN 50082-1/EN55024 and skip testing at the lower levels. I believe this approach is incorrect because it does not conform to the requirements of the basic standard and is simply not a complete test. As explained in EN61000-4-5, the non-linear current-voltage characteristics of the equipment under test should be considered and the test voltage should therefore be increased by steps up to the test level specified in the product standard or test plan. The same rationale applies to ESD testing where current-voltage characteristics are also non-linear. How do others approach these tests? Are we adding unnecessary test time by starting at lower test voltages and stepping our way up or are the test labs that go straight to the maximum test levels overlooking an important aspect of the testing? Jim Hulbert Senior Engineer-EMC Pitney Bowes - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, jim_bac...@monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
EN50082-1:1997 and EN50082-1:1992
Hi Roger, Just a reminder. 3/1/98 to 7/1/01 is the transition period of time for EN50082-1:1997 to replace EN50082-1:1992 and others. Best Regards, Barry Ma - Original Text From: , on 9/9/98 2:59 PM: To: If I want to certify my product to meet the EN50082-1(1992) requirements, should I call for the IEC801 tests or the IEC1000-4 series? Is there any difference between them apart from the IEC801-3 and the IEC1000-4-3? Thanks and Regards Roger Hsu - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.com with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, ri...@sdd.hp.com, or roger.volgst...@compaq.co (the list administrators). V - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.com with the single line: "unsubscribe emc-pstc" (without the quotes). For help, send mail to ed.pr...@cubic.com, ri...@sdd.hp.com, or roger.volgst...@compaq.co (the list administrators).
EN50082-1:1997
I just received the information on the captioned new standard which said to be replaced the 1992 version when it is withdrawn on 1 July 2001. Can anyone tell me what are the major impacts on the existing compliance of 1992 version on audio and video products and electrical appliances. Thanks, -- Raymond Li Dixons Asia Ltd. Ph: (852)2542 5303 Fax: (852)2541 9067
Re: EN50082-1:1997
Pryor - The 1997 version of the standard cannot be used as sefl-certification standard until it is referenced in the Official Journal (OJ). The idea was that the OJ would list the standard and also list the date of withdrawal (dow) of conflicting standards (in this case the 1992 edition), effectively giving a transition period. If the OJ does not give a dow then I assume that the DOW listed in the standard will be used to define the end of the transition period. During the transition period, either standard can be used for self-certification of a device. After the transition period, only the 1997 version can be used. So, in answer to your questions: >I am getting conflicting opinions on the effectivity of EN50082-1:1997. > >the dop is 1998-03-01 > >the dow is 2001-07-01 > >One opinion is that all NEW products released after the dop (1998-03-01) >must meet the 1997 version. Not in my opinion - I believe that the EMC Directive treats each product as it is placed "on the market" as a NEW product. Also the dop of the standard cannot be used to determine whether or not it can be used for the EMC Directive, it depends on the OJ. > >A second opinion is that NEW products may meet the 1992 version until the >dow (2001-07-01). Depending on the dow listed in the OJ, this is correct (in my opinion) > >It is generally agreed that existing products have until the dow >(2001-07-01) to meet the 1997 version. Correct (in my opinion) > > >I would appreciate and clarification. > >Best Regards > >Pryor McGinnis > > ++ +Mark Briggs MSc CEng, MIEE + + Manager, EMC Consulting Services + + Elliott Labs, 684 W Maude Avenue + +Sunnyvale, CA 94086+ ++ + Phone: +1 (408) 245 7800 x238+ + Fax: +1 (408) 245 3499 + ++ + Email: mbri...@elliottlabs.com + + http://www.elliottlabs.com + ++
RE: EN50082-1:1997
Hello Mark, Pryor and group I fully agree with the remarks that Mark makes in his conclusions about EN 50082-1:1997. I want to emphasize however that any new product complying to the 1992 version has just the period to DOW to meet the 1997 version. This means that without new declaration (and testing and modifications..) at DOW your sales have to STOP. So better meet the 1997 requirements immediately for any NEW product which economic life will probable exceed DOW. Your remark about the OJ and waiting for publication is legally correct, but as the 1992 is almost a subset of the 1997 version (except for radiated immunity: was 30 -1000 MHz , now 80 -1000 MHz and the added modulation issue) , your test house will probable include the requirements of the 1992 version in the 1997 version series of tests (this is what we offer our clients). The declaration of conformity is issued in 2 versions: one for 1992 version and a future-to-be-signed-version for the 1997 version. The EN 50082-1:1997 version will however soon (!???!) be replaced by the IEC 1000-6-1 generic standard implemented in the EN 61000-6 series. New DOWS new problems! Regards, Ing. Gert Gremmen == CE-test, qualified testing, Consultancy, Compliance tests for EMC and Electrical Safety 15 Great EMC-design tips available ! Visit our site : http://www.cetest.nl The Dutch Electronics Directory http://www.cetest.nl/electronics.htm == -Oorspronkelijk bericht- Van:Mark Briggs [SMTP:mbri...@elliottlabs.com] Verzonden: dinsdag 24 februari 1998 1:11 Aan:CTL; emc-p...@ieee.org Onderwerp: Re: EN50082-1:1997 Pryor - The 1997 version of the standard cannot be used as sefl-certification standard until it is referenced in the Official Journal (OJ). The idea was that the OJ would list the standard and also list the date of withdrawal (dow) of conflicting standards (in this case the 1992 edition), effectively giving a transition period. If the OJ does not give a dow then I assume that the DOW listed in the standard will be used to define the end of the transition period. During the transition period, either standard can be used for self-certification of a device. After the transition period, only the 1997 version can be used. So, in answer to your questions: >I am getting conflicting opinions on the effectivity of EN50082-1:1997. > >the dop is 1998-03-01 > >the dow is 2001-07-01 > >One opinion is that all NEW products released after the dop (1998-03-01) >must meet the 1997 version. Not in my opinion - I believe that the EMC Directive treats each product as it is placed "on the market" as a NEW product. Also the dop of the standard cannot be used to determine whether or not it can be used for the EMC Directive, it depends on the OJ. > >A second opinion is that NEW products may meet the 1992 version until the >dow (2001-07-01). Depending on the dow listed in the OJ, this is correct (in my opinion) > >It is generally agreed that existing products have until the dow >(2001-07-01) to meet the 1997 version. Correct (in my opinion) > > >I would appreciate and clarification. > >Best Regards > >Pryor McGinnis > > ++ +Mark Briggs MSc CEng, MIEE + + Manager, EMC Consulting Services + + Elliott Labs, 684 W Maude Avenue + +Sunnyvale, CA 94086+ ++ + Phone: +1 (408) 245 7800 x238+ + Fax: +1 (408) 245 3499 + ++ + Email: mbri...@elliottlabs.com + + http://www.elliottlabs.com + ++
RE: EN50082-1:1997
EN50082-1:1997 [BSEN50082-1:1998] includes the following dates:- dop - 1998-3-1 dow - 2001-7-1 the forward make NO reference to products which have previously satisfied 1992 requirements. Hence ALL products sold after this date [which need to use the generics] must meet this requirement on 2001-7-1 [year-month-day]. I will check back through my records but I do not remember any such requirement if you choose to use the 1992 version in any given period, it would not make any logical sense. Dependent upon product life cycle it would also not be logical to use the 1992 version if you were still to sell product after 2001-7-1. Note : although the forward of the specification states they have NO legal status as defined by the commission, these will be listed separately in the OJ - so until we see exactly what is written in the OJ it is all supposition ! Regards Andy Griffin EMiSoft Limited - Test and Assessment Software Solutions Uk Tel +44 (0)468 188244 Uk Fax +44 (0)1793 522214 USA Tel/Fax +408 356 1980 Emailagrif...@emisoft.co.uk Web http://www.emisoft.co.uk Hot Linkshttp://www.emisoft.co.uk/special/hotemc.htm We write software - we don't sell equipment At 13:54 10/1/98 -0700, Grasso, Charles (Chaz) wrote: >>There is one little rumor about generic immunity that needs to be confirmed >>or denied. (It appeared on EMC-PSTC a couple months ago.) Supposedly, if >>the 1992 edition is used on a product after 1 March 1998, then the >>transition period for that product is accelerated by six months - to 1 >>January 2001, rather than the published DOW of 1 July 2001. > >Can anyone confirm or deny this rumour?? > >-Original Message- >From: Mark Briggs [SMTP:mbri...@elliottlabs.com] >Sent: Thursday, January 08, 1998 12:51 PM >To:emc-p...@ieee.org >Subject: re: EN50082-1:1997 > >Which edition of the OJ was EN50082-1 1997 published in ? > >Mark >mbri...@elliottlabs.com > > >>Thanks to Christie for the update. >> >>There is one little rumor about generic immunity that needs to be confirmed >>or denied. (It appeared on EMC-PSTC a couple months ago.) Supposedly, if >>the 1992 edition is used on a product after 1 March 1998, then the >>transition period for that product is accelerated by six months - to 1 >>January 2001, rather than the published DOW of 1 July 2001. >> >>Is this really a published requirement - or some rogue internal policy? >> >>Regards, >>Eric Lifsey >>Compliance Engineer >>National Instruments >> >> >> >> >> >>Christie Bishop on 01/07/98 06:51:05 PM >> >>Please respond to t...@world.std.com >> >>To: "INTERNET:t...@world.std.com" >>cc:(bcc: Eric Lifsey/AUS/NIC) >>Subject: re: EN50082-1:1998 >> >> >> >> >>Hi Pete- >>The standard EN50082-1 is actually dated August 1997. : ) >>You Wrote:As EN50082-1:1998 is now available, I am wondering whether my >>EMC >>testing to the EU's EMC Directive MUST now be done in accordance with >>this version which is more stringent than the 1992 version. More >>specifically: >>1) Has EN50082-1:1998 been listed in the OJ? EN50082-1 is in the OJ >>2) What is the transition period (if any)? The transition is from >>3/1/1998 to 7/1/2001. >>Yes it is more stringent and there are more tests. i.e. EN 61000-4-2 , -3, >>-4, -5 , -6, -8 and -11 as well as ENV50204. >>Hope this helps >>Christine Bishop >>Business Services Manager >>EMC Technology Services, Inc. >>(A wholly owned subsidiary of Underwriters Laboratories) >>Full Service EMC/Safety/Telecom Test Lab >>Phone: 510-440-3838 >>Fax: 510-440-3992 >> >> >> >> >> >> > >
re: EN50082-1:1997
Thanks to Christie for the update. There is one little rumor about generic immunity that needs to be confirmed or denied. (It appeared on EMC-PSTC a couple months ago.) Supposedly, if the 1992 edition is used on a product after 1 March 1998, then the transition period for that product is accelerated by six months - to 1 January 2001, rather than the published DOW of 1 July 2001. Is this really a published requirement - or some rogue internal policy? Regards, Eric Lifsey Compliance Engineer National Instruments Christie Bishop on 01/07/98 06:51:05 PM Please respond to t...@world.std.com To: "INTERNET:t...@world.std.com" cc:(bcc: Eric Lifsey/AUS/NIC) Subject: re: EN50082-1:1998 Hi Pete- The standard EN50082-1 is actually dated August 1997. : ) You Wrote:As EN50082-1:1998 is now available, I am wondering whether my EMC testing to the EU's EMC Directive MUST now be done in accordance with this version which is more stringent than the 1992 version. More specifically: 1) Has EN50082-1:1998 been listed in the OJ? EN50082-1 is in the OJ 2) What is the transition period (if any)? The transition is from 3/1/1998 to 7/1/2001. Yes it is more stringent and there are more tests. i.e. EN 61000-4-2 , -3, -4, -5 , -6, -8 and -11 as well as ENV50204. Hope this helps Christine Bishop Business Services Manager EMC Technology Services, Inc. (A wholly owned subsidiary of Underwriters Laboratories) Full Service EMC/Safety/Telecom Test Lab Phone: 510-440-3838 Fax: 510-440-3992
