Re: gEDA-user: Message and Library windows
On Tue, 2010-02-23 at 22:32 -0800, Jared Casper wrote: On Tue, Feb 23, 2010 at 3:53 PM, Peter Clifton pc...@cam.ac.uk wrote: I can't help but feel that some log messages are important enough to bother the user about - and others are not.. we'll have to see what people actually using it think, I'm not doing any PCB design work at the moment myself. Maybe add a Warn function along side Message (or something along those lines), and add a flag to HID.log that says whether or not to bring the log window to the foreground? Or go all out and add an enum for severity. It'd be easy to add the plumbing, the hard part would be to go through and decide what Message()s should be Warn()s, etc. I'm sure different severities could be displayed differently in the log quite easily as well... Sounds good. gschem has different message warning levels, but in practice you rarely see them. (Especially as it looses that info if the message window isn't on-screen when the message is logged!) The functionality I saw someplace (was it in your repo?) to attach/embed the log window to the main window will help out with this problem as well I think. Not mine.. I recall the one you're talking about, but I can't remember the location of it. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem text line spacing in postscript
On Tue, 23 Feb 2010 22:36:48 +, Peter Clifton pc...@cam.ac.uk wrote: BUT.. this should also be using the gEDA font size - points conversion. The 13 vs 13.89 discrepency is already incorporated in the 1.3 factor shipped by default. If I remember correctly, printed line spacing was another reason in favour of the font sizing option we chose in the end. Peter -- Peter Brett pe...@peter-b.co.uk Remote Sensing Research Group Surrey Space Centre ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Tue, Feb 23, 2010 at 10:01:55PM -0500, gene glick wrote: what else? Any suggestions? Check your hole dimensions, especially on connectors - a correctly-routed board is not much use if your connector pins won't fit through the holes... -- David SmithWork Email: dave.sm...@st.com STMicroelectronics Home Email: david.sm...@ds-electronics.co.uk Bristol, England GPG Key: 0xF13192F2 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: desktop-i18n in gEDA
On Tue, 23 Feb 2010 23:16:49 -0500, Charles Lepple clep...@gmail.com wrote: I think the Fedora build is silently accepting the other directory under BUILDROOT: Making install in po make[3]: Entering directory `/builddir/build/BUILD/geda-gaf-1.6.0/ libgeda/po' /usr/bin/make prefix=../../.desktop-i18n installcp ./ LINGUAS ../../.desktop-i18n/libgeda38.LINGUAS || rm stamp-i18n make[4]: Entering directory `/builddir/build/BUILD/geda-gaf-1.6.0/ libgeda/po' /bin/mkdir -p /builddir/build/BUILDROOT/geda-gaf-1.6.0-3.fc13.i386/usr/ share installing nl.gmo as /builddir/build/BUILDROOT/geda- gaf-1.6.0-3.fc13.i386../../.desktop-i18n/share/locale/nl/LC_MESSAGES/ libgeda38.mo ... Wow, that's pretty epicly broken of something, especially since I'm being careful to specify the DESKTOP_I18N_LOCALE_DIR relative to $(top_builddir). Please check the Makefile in the po directories to verify that '@DESKTOP_I18N_LOCALE_DIR@' is expanded to '$(top_builddir)/.desktop-i18n'. I'm open to suggestions as to how to fix this, because I still can't see what I've done wrong here. :-| Peter -- Peter Brett pe...@peter-b.co.uk Remote Sensing Research Group Surrey Space Centre ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Message and Library windows
On Wed, 24 Feb 2010 10:30:20 +, Peter Clifton pc...@cam.ac.uk wrote: On Tue, 2010-02-23 at 22:32 -0800, Jared Casper wrote: On Tue, Feb 23, 2010 at 3:53 PM, Peter Clifton pc...@cam.ac.uk wrote: I can't help but feel that some log messages are important enough to bother the user about - and others are not.. we'll have to see what people actually using it think, I'm not doing any PCB design work at the moment myself. Maybe add a Warn function along side Message (or something along those lines), and add a flag to HID.log that says whether or not to bring the log window to the foreground? Or go all out and add an enum for severity. It'd be easy to add the plumbing, the hard part would be to go through and decide what Message()s should be Warn()s, etc. Why not have a bar (in a warning colour) that pops up at the top of the layout window, and disappears after a short interval (say, 2 seconds). Clicking the bar would bring up the message window. This is what my phone (N900, runs Linux) uses for displaying transient warning/notification messages, and it works really nicely. Peter I'm sure different severities could be displayed differently in the log quite easily as well... Sounds good. gschem has different message warning levels, but in practice you rarely see them. (Especially as it looses that info if the message window isn't on-screen when the message is logged!) The functionality I saw someplace (was it in your repo?) to attach/embed the log window to the main window will help out with this problem as well I think. Not mine.. I recall the one you're talking about, but I can't remember the location of it. -- Peter Brett pe...@peter-b.co.uk Remote Sensing Research Group Surrey Space Centre ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Message and Library windows
On Wed, 2010-02-24 at 11:48 +, Peter TB Brett wrote: On Wed, 24 Feb 2010 10:30:20 +, Peter Clifton pc...@cam.ac.uk wrote: On Tue, 2010-02-23 at 22:32 -0800, Jared Casper wrote: On Tue, Feb 23, 2010 at 3:53 PM, Peter Clifton pc...@cam.ac.uk wrote: I can't help but feel that some log messages are important enough to bother the user about - and others are not.. we'll have to see what people actually using it think, I'm not doing any PCB design work at the moment myself. Maybe add a Warn function along side Message (or something along those lines), and add a flag to HID.log that says whether or not to bring the log window to the foreground? Or go all out and add an enum for severity. It'd be easy to add the plumbing, the hard part would be to go through and decide what Message()s should be Warn()s, etc. Why not have a bar (in a warning colour) that pops up at the top of the layout window, and disappears after a short interval (say, 2 seconds). Clicking the bar would bring up the message window. This is what my phone (N900, runs Linux) uses for displaying transient warning/notification messages, and it works really nicely. Peter Neat idea.. and also seems to be a growingly common idiom in other apps due to the recognition that focus-stealing and popping up dialogs when the user isn't expecting them is poor interaction design, resulting in bad usability if it happens often. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Message and Library windows
Hi all, -Original Message- From: geda-user-boun...@moria.seul.org [mailto:geda-user-boun...@moria.seul.org] On Behalf Of Peter Clifton Sent: Wednesday, February 24, 2010 11:30 AM To: gEDA user mailing list Subject: Re: gEDA-user: Message and Library windows On Tue, 2010-02-23 at 22:32 -0800, Jared Casper wrote: On Tue, Feb 23, 2010 at 3:53 PM, Peter Clifton pc...@cam.ac.uk wrote: I can't help but feel that some log messages are important enough to bother the user about - and others are not.. we'll have to see what people actually using it think, I'm not doing any PCB design work at the moment myself. Maybe add a Warn function along side Message (or something along those lines), and add a flag to HID.log that says whether or not to bring the log window to the foreground? Or go all out and add an enum for severity. It'd be easy to add the plumbing, the hard part would be to go through and decide what Message()s should be Warn()s, etc. I'm sure different severities could be displayed differently in the log quite easily as well... Sounds good. gschem has different message warning levels, but in practice you rarely see them. (Especially as it looses that info if the message window isn't on-screen when the message is logged!) The functionality I saw someplace (was it in your repo?) to attach/embed the log window to the main window will help out with this problem as well I think. Not mine.. I recall the one you're talking about, but I can't remember the location of it. Maybe it was the geany app used for coding stuff by some (including me). http://www.geany.org/Documentation/Screenshots Kind regards, Bert Timmerman. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gerbv export to png
Stephan Boettcher boettc...@physik.uni-kiel.de writes:
Julian thepurl...@gmail.com writes:
Stephan,
Yes, you can do it, however you can't use the project file for the
process. Here's how:
gerbv --export=png --dpi=600 --foreground=#ffff
--foreground=#00ff0088 file1.gbx file2.gbx ...and so on
Hope this helps. Cheers--
Absolutely, thanks! Now I need to write a script to transform the
project file into a Makefile rule :-)
Here is is.
#!/usr/bin/python
# coding=utf-8
# $Id: gvp2make.py 16 2010-02-24 12:38:06Z stephan $
# This script is free software (c) 2010 Stephan I. Böttcher
# Distributed under GNU GPL Version 2 or later.
Julian thepurl...@gmail.com writes:
Stephan,
Yes, you can do it, however you can't use the project file for the
process. Here's how:
gerbv --export=png --dpi=600 --foreground=#ffff
--foreground=#00ff0088 file1.gbx file2.gbx ...and so on
Hope this helps. Cheers--
usage=
Prints a gerbv commandline to export a project to png,
with adjusted layer opacities.
Options:
-h print this help
-g gerbv path of the gerbv executable
-x png export format
-o layout.png~ output file
-D 600 dpi resolution
-w option gerbv option
-A layer=alpha alpha between 0 and 1.0
-X execute the command
-M print Makefile to stdout
options=[
gerbv,
--export=png,
--output=layout.png~,
--dpi=600,
]
The layer names are the second dot-separated part of the filename.
Digits are stripped from the layer name and tried again.
opacities = {
DEFAULT: 0.7,
frontsilk: 1.0,
backsilk: 1.0,
outline: 1.0,
plated-drill: 1.0,
frontpaste: 0.7,
backpaste: 0.7,
front: 0.5,
back: 0.5,
group: 0.4,
}
execcmd=False
makefile=False
import sys, os
from getopt import gnu_getopt as getopt
oo,ifile = getopt(sys.argv[1:], hg:x:o:w:D:XMA:)
for o,v in oo:
if o==-h:
print Synopsis:, sys.argv[0], options gerbv-project-file, usage
sys.exit()
if o==-g:
options[0]=v
if o==-x:
options[1]=--export=%s % v
if o==-o:
options[2]=--output=%s % v
if o==-D:
options[3]=--dpi=%s % v
if o==-w:
options.append(v)
if o==-X:
execcmd=True
if o==-M:
makefile=True
if o==-A:
vv=v.split(=)
opacities[vv[0]]=float(vv[1])
layers = {}
from fileinput import input
for l in input(ifile):
ll = l.split()
if ll[0]==(define-layer!:
ll=[.strip(\')(#) for lll in ll for in lll.split()()]
layers[int(ll[1])] = {
number : int(ll[1]),
filename: ll[4],
visible: ll[7]==t,
color: [int(lll)/65536.0 for lll in ll[10:13]],
}
files=[]
lnumbers = [n for n in layers]
lnumbers.sort()
for n in lnumbers:
l = layers[n]
if l[visible]:
fn = l[filename]
files.append(fn)
try:
ltype = fn.split(.)[1]
try:
opacity = opacities[ltype]
except KeyError:
opacity = opacities[ltype.strip(0123456789)]
except:
opacity = opacities[DEFAULT]
l[color].append(opacity)
options.append(--foreground=#%02x%02x%02x%02x % tuple(
[int(c*255) for c in l[color]]))
if makefile:
target = options[2].split(=)[1]
print GERBV=+options[0]
print FORMAT=+options[1].split(=)[1]
print DPI=+options[3].split(=)[1]
print target+: \\\n\t + \\\n\t .join(files)
print \t$(GERBV) --output=$@ --export=$(FORMAT) --dpi=$(DPI) \\
print \t + \\\n\t .join(options[4:])+ \\\n\t $
else:
cmd = .join(options+files)
print cmd
if execcmd:
os.system(cmd)
--
Stephan Böttcher FAX: +49-431-880-3968
Extraterrestrische PhysikTel: +49-431-880-2508
I.f.Exp.u.Angew.Physik mailto:boettc...@physik.uni-kiel.de
Leibnizstr. 11, 24118 Kiel, Germany
___
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Re: gEDA-user: Message and Library windows
On Wed, 24 Feb 2010 11:48:14 + Peter TB Brett pe...@peter-b.co.uk wrote: Why not have a bar (in a warning colour) that pops up at the top of the layout window, and disappears after a short interval (say, 2 seconds). Clicking the bar would bring up the message window. I like this idea, but with one caveat: If the warning/error level that spawned the bar is high enough (i.e. fatal errors such as shorted nets), leave the bar visible until it is clicked, rather than fading it out. -- There are some things in life worth obsessing over. Most things aren't, and when you learn that, life improves. http://starbase.globalpc.net/~ezekowitz Vanessa Ezekowitz vanessaezekow...@gmail.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: General Question on gschem
Ladies and Gentlemen - Is there an update to gschem scheduled, and if so, when? Is there a release notes that we can view to know what is coming? Thanks! Tony Radice ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: General Question on gschem
On Wed, 24 Feb 2010 08:22:05 -0500, Tony Radice tradi...@verizon.net wrote: Ladies and Gentlemen - Is there an update to gschem scheduled, and if so, when? Is there a release notes that we can view to know what is coming? We just released 1.6.1 in the current stable release series, but there don't appear to be any release notes or release announcement on the main gEDA website yet. However, here's the NEWS file for the release: http://git.gpleda.org/?p=gaf.git;a=blob;f=NEWS;h=5acfd81f;hb=11921dc1 There probably won't be an (unstable) 1.7.0 for a couple of months yet -- to be honest, there hasn't been an awful lot of development taking place on the unstable branch since 1.6.0 was released back in October. Regards, Peter -- Peter Brett pe...@peter-b.co.uk Remote Sensing Research Group Surrey Space Centre ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: General Question on gschem
On Wed, 2010-02-24 at 08:22 -0500, Tony Radice wrote: Ladies and Gentlemen - Is there an update to gschem scheduled, and if so, when? Is there a release notes that we can view to know what is coming? The weekend before last.. http://geda.seul.org/release/v1.6/1.6.1/ Release notes not yet available. Basically it is 1.6.0 + bug-fixes. If you aren't already on 1.6.0, you might be interested in its release notes, here: http://geda.seul.org/release/v1.6/1.6.0/geda-gaf-1.6.0-releasenotes.html If you wanted to know about development releases, there hasn't yet been any 1.7.x release - and at this stage, there probably aren't enough changes to justify one. Regards, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Message and Library windows
On Tue, 23 Feb 2010 23:53:13 +, Peter Clifton wrote: I can't help but feel that some log messages are important enough to bother the user about I suggest, that gschem (and pcb for that matter) stick to the way most unix applications handle this issue: Truely important messages should be presented as pop-up dialogs. All the rest should be emitted on stdout. If there needs to be a log, this log should be written to a file. ---(kaimartin)--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Tue, 23 Feb 2010 22:18:02 -0500, gene glick wrote: I'll have to order up a bunch of parts to make it happen but that's ok. This is an important part of the check. It is too easy to misread some aspect of the physical dimensions in the data sheet. Think SO16 vs SO16- wide. This has hit me hard some years ago. ---(kaimartin)--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Open Source mechanical CAD on the horizon
I just got aware of the open source mechanical CAD project freecad. It hit the debian repository a month ago. Although it is still lacking important features, much of the basic infrastructure is already up and running. http://en.wikipedia.org/wiki/FreeCAD_(Juergen_Riegel) ---(kaimartin) -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/code co-simulation and schematics and netlists for silicon
al davis wrote: On Tuesday 23 February 2010, John Griessen wrote: Would you still use gschem/gnetlist to schematically connect verilog modules? That depends on having a good translator first, right? Anything that generates a netlist. Gnucap uses language plugins to read whatever input format. Maybe someone could make a language plugin to read and write the gschem format directly. Once this is done, it will also give us a stand-alone translator, both ways, between any of the supported formats. Could you just use a top level schematic as a guide for connecting code modules to simulate with no netlist generated from gschem? Sure, but do you want to? Only as a stopgap measure. I can't dive into the translator project, but I've hinted to Mr. Wender about it -- and it sounds very much aligned with their goals the more I think about it. John Griessen ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Tue, Feb 23, 2010 at 10:01 PM, gene glick carzr...@optonline.net wrote: After a very long time, I am just about ready to send out 3 different boards for fab. I would appreciate any advice to improve my chances of success. I'm making the assumption you will have a contractor build quantities someday, in automated equipment. These will (at least should) lower production costs: Do you have at least three Fudicuals on all of your boards? I typically place at least three. One on each long edge of the board in a line, with the third centered in the middle of the line on the opposite edge, like a sideways triangle: * * * These compensate for film stretching, board alignment during assembly etc. Have you specified tooling holes for panels?: 1/4 waste material around all sided, 0.125 tooling hole in each corner of the waste materiel, of each panel. Fudicals on the waste material. Have you specified how to route and/or score the boards? Do you care if you have secondary sanding operations (you don't wan't those)? Do you have any ceramic caps or such along an edge that will break when boards are depanalized from descoring? Have you put Fudicuals on components, such as tiny QFN packages, or even massive TQFP and BGAs. Always a nice touch, but frequently not room. Really helps out if parts are at angles to the board edge. Two, one each in diagonal corners of the package. Having to many Fudicuals is bad, more than four to six per boad, and having them not in some kind of alignment makes them useless in most cases. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Message and Library windows
On Tue, 23 Feb 2010 22:32:20 -0800, Jared Casper wrote: Maybe add a Warn function along side Message (or something along those lines), and add a flag to HID.log that says whether or not to bring the log window to the foreground? Or go all out and add an enum for severity. It'd be easy to add the plumbing, the hard part would be to go through and decide what Message()s should be Warn()s, etc. I'm sure different severities could be displayed differently in the log quite easily as well... The functionality I saw someplace (was it in your repo?) to attach/embed the log window to the main window will help out with this problem as well I think. Maybe it was in this thread: http://thread.gmane.org/gmane.comp.cad.geda.user/27394 You find the patch(es) in the sf tracker: http://sourceforge.net/tracker/?func=detailaid=2779826group_id=73743atid=538813 The second patch displays a little icon in the status bar when the log is not visible to inform the user about new messages. But the patches still lack of some functionality e.g. remembering the last status of the log- gui when the user leaves the application. Later in the thread mentioned above Peter C. suggest gdl (gnome docking library) for such a change. So I spend the last weeks (unfortunately I was very busy with my b-o-t-job) fighting against a bug in the ubuntu libgdl package. Now some things are clearer and I'am planing to rework my patch with libgdl. And the opportunity for different severities (different colors or little icons, filters, ...) are also in my mind. Frank Bergmann. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
Hi - On Wed, Feb 24, 2010 at 02:40:50PM -0500, Bob Paddock wrote: I'm making the assumption you will have a contractor build quantities someday, in automated equipment. These will (at least should) lower production costs: Although OT, I appreciate and try to learn from discussions like this. Do you have at least three Fudicuals on all of your boards? I know what fiducials look like, but haven't seen a footprint for one within pcb. Am I blind? Is there a standard recipe for making one? These compensate for film stretching, board alignment during assembly etc. The last time I asked a board loading house about fiducials, they said they gave up and just optically register to the component footprint itself. Have you specified tooling holes for panels?: [chop] Have you specified how to route and/or score the boards? This is something I have never gotten into. I guess my boards are always too large and/or the order too few to care. Have you put Fudicuals on components, such as tiny QFN packages, or even massive TQFP and BGAs. I don't think you said what you wanted to say. - Larry ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Wed, Feb 24, 2010 at 3:24 PM, Larry Doolittle ldool...@recycle.lbl.gov wrote: Hi - On Wed, Feb 24, 2010 at 02:40:50PM -0500, Bob Paddock wrote: I'm making the assumption you will have a contractor build quantities someday, in automated equipment. These will (at least should) lower production costs: Although OT, I appreciate and try to learn from discussions like this. Do you have at least three Fudicuals on all of your boards? I know what fiducials look like, but haven't seen a footprint for one within pcb. Am I blind? Is there a standard recipe for making one? Simply a pad with no solder mask. I use 30 or 40mil pads, with 50 to 80mil solder mask opening, depending on how much space I have. The last time I asked a board loading house about fiducials, they said they gave up Yes. Because so few do it correctly. Have you put Fudicuals on components, such as tiny QFN packages, or even massive TQFP and BGAs. I don't think you said what you wanted to say. Not sure. I know our CM loves that I put fuducials on the QFN accelerometer and compass IC's. They get mounted at funny angles on the board. My intent was to say, that if space is available put fudcials at the component footprint level, when space is available, especially on very small or very large packages, that have multiple pins. Putting on things like resistors and caps would be silly. I've learned most of this by working at a large CM, and 'The Hard Way' of doing it wrong. For example the job today is 5,000 boards. When you get into quantities, you start to do things differently. See the note at the bottom of my blog http://blog.designer-iii.com/avr_isp_spi/20081116-10511-Digital-MEMS-Accelerometers-will-not-work-with-AVR-ISP-using-SPI . You are supposed to isolated the AVR ISP pins with 1k resistors, as the Atmel documentation shows. This is true. However that takes four resistors per board, on a board that already did not have enough space. Also at 50,000 units per year, with an design lifetime of five years, that is 10,000,000 resistors. After a while these resistors start to add up to real money, for what is a single event at manufacturing time. Design for Manufacturing always should be given consideration. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Wed, Feb 24, 2010 at 04:07:13PM -0500, Bob Paddock wrote: I've learned most of this by working at a large CM, and 'The Hard Way' of doing it wrong. For example the job today is 5,000 boards. When you get into quantities, you start to do things differently. See the note at the bottom of my blog http://blog.designer-iii.com/avr_isp_spi/20081116-10511-Digital-MEMS-Accelerometers-will-not-work-with-AVR-ISP-using-SPI . You are supposed to isolated the AVR ISP pins with 1k resistors, as the Atmel documentation shows. I would have just ensured that my AVR image didn't contain any sequences that trigger the problem. It might be possible to just modify AVRdude to detect such sequences and modify the programming sequence to avoid them. Sort of like bit stuffing with NRZI. -- Ben Jackson AD7GD b...@ben.com http://www.ben.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Feb 24, 2010, at 1:07 PM, Bob Paddock wrote: On Wed, Feb 24, 2010 at 3:24 PM, Larry Doolittle ldool...@recycle.lbl.gov wrote: Hi - On Wed, Feb 24, 2010 at 02:40:50PM -0500, Bob Paddock wrote: I'm making the assumption you will have a contractor build quantities someday, in automated equipment. These will (at least should) lower production costs: Although OT, I appreciate and try to learn from discussions like this. Do you have at least three Fudicuals on all of your boards? I know what fiducials look like, but haven't seen a footprint for one within pcb. Am I blind? Is there a standard recipe for making one? Simply a pad with no solder mask. I use 30 or 40mil pads, with 50 to 80mil solder mask opening, depending on how much space I have. The last time I asked a board loading house about fiducials, they said they gave up Yes. Because so few do it correctly. Have you put Fudicuals on components, such as tiny QFN packages, or even massive TQFP and BGAs. I don't think you said what you wanted to say. Not sure. I know our CM loves that I put fuducials on the QFN accelerometer and compass IC's. They get mounted at funny angles on the board. My intent was to say, that if space is available put fudcials at the component footprint level, when space is available, especially on very small or very large packages, that have multiple pins. Putting on things like resistors and caps would be silly. I've learned most of this by working at a large CM, and 'The Hard Way' of doing it wrong. For example the job today is 5,000 boards. When you get into quantities, you start to do things differently. See the note at the bottom of my blog http://blog.designer-iii.com/avr_isp_spi/20081116-10511-Digital-MEMS-Accelerometers-will-not-work-with-AVR-ISP-using-SPI . You are supposed to isolated the AVR ISP pins with 1k resistors, as the Atmel documentation shows. This is true. However that takes four resistors per board, on a board that already did not have enough space. Also at 50,000 units per year, with an design lifetime of five years, that is 10,000,000 resistors. After a while these resistors start to add up to real money, for what is a single event at manufacturing time. Design for Manufacturing always should be given consideration. Solder jumpers are how I get around crap like this, were you can't connect something till its powered up and programmed properly, or else it blows a safety circuit. Examples from DJ http://www.delorie.com/pcb/solderjumpers.html But of course paying someone to solder that jumper also costs money over time ;-) Sounds like you needed pre-programmed parts Steve ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
Bob Paddock wrote: On Wed, Feb 24, 2010 at 3:24 PM, Larry Doolittle ldool...@recycle.lbl.gov wrote: Have you put Fudicuals on components, such as tiny QFN packages, or even massive TQFP and BGAs. I don't think you said what you wanted to say. Not sure. I know our CM loves that I put fuducials on the QFN accelerometer and compass IC's. They get mounted at funny angles on the board. My intent was to say, that if space is available put fudcials at the component footprint level, So these footprint fiducials are outboard of the part so they show in a vision system as the part is being placed? Do you put silk outline outside them or some silk circles around each one to clue the CM about what they are good for, or does that just need some notes and documentation and phone calls? John ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Message and Library windows
On Wed, Feb 24, 2010 at 12:15 PM, Frank Bergmann frank.g...@frajasalo.de wrote: On Tue, 23 Feb 2010 22:32:20 -0800, Jared Casper wrote: The functionality I saw someplace (was it in your repo?) to attach/embed the log window to the main window will help out with this problem as well I think. Maybe it was in this thread: http://thread.gmane.org/gmane.comp.cad.geda.user/27394 You find the patch(es) in the sf tracker: http://sourceforge.net/tracker/?func=detailaid=2779826group_id=73743atid=538813 Yup, that's what I was thinking of. I think it'd be cool to see this or something like it worked into the mainline. Jared ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
I would have just ensured that my AVR image didn't contain any sequences that trigger the problem. It might be possible to just modify AVRdude to detect such sequences and modify the programming sequence to avoid them. Sort of like bit stuffing with NRZI. I'm sorry, you cannot program an 86 here. Please select a different value for the speed of light. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Message and Library windows
On Mon, 22 Feb 2010 23:42:32 +, Peter Clifton wrote: gschem's log window can be persuaded not to appear with this rhune in a gschemrc. (I have it in ~/.gEDA/gschemrc) (log-window later) I added this to the gschem-FAQ ---(kaimartin)--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=getsearch=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
I would have just ensured that my AVR image didn't contain any sequences that trigger the problem. How? Its a crap shoot as to know if any particular image will generate the bad sequence. Then you waste time trying to figure out how to get around it. To DJ's comment. We usually do go with pre-programmed parts eventually. Solder jumpers are a really bad idea when doing anything more than few boards. Even zero ohm resisters jumpers cost real money. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Wed, Feb 24, 2010 at 04:41:35PM -0500, Bob Paddock wrote: I would have just ensured that my AVR image didn't contain any sequences that trigger the problem. How? Its a crap shoot as to know if any particular image will generate the bad sequence. Then you waste time trying to figure out how to get around it. You can waste time spinning the board or waste time working around the programming issue. If it's just part of your normal board spins, obviously you just change the board. If you didn't happen to encounter a problem issue until after you have 50,000 made, then you spend time avoiding the problem at the programming stage. I bet it wouldn't be that hard to modify AVRdude to avoid a specific output bit sequence during programming without modifying your image at all. Worst case is to find a bootloader that doesn't trigger the problem (or is easily modified to avoid it) and then you control both ends. -- Ben Jackson AD7GD b...@ben.com http://www.ben.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Tue, Feb 23, 2010 at 10:01 PM, gene glick [1]carzr...@optonline.net wrote: After a very long time, I am just about ready to send out 3 different boards for fab. ?I would appreciate any advice to improve my chances of success. Don't send all three at once. Send one and get it all the way through your process before sending the last two. John Eaton References 1. mailto:carzr...@optonline.net ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Open Source mechanical CAD on the horizon
Could be interesting. Thanks for that! Cheers, Andy. Signality Solutions York, UK t: +44 (0) 5601 720 580 m: +44 (0) 7796 538 192 skype: andyfierman www.signality.co.uk On 24 February 2010 15:12, Kai-Martin Knaak k...@familieknaak.de wrote: I just got aware of the open source mechanical CAD project freecad. It hit the debian repository a month ago. Although it is still lacking important features, much of the basic infrastructure is already up and running. http://en.wikipedia.org/wiki/FreeCAD_(Juergen_Riegel) ---(kaimartin) -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Wed, 24 Feb 2010 15:22:54 -0600, John Griessen wrote: So these footprint fiducials are outboard of the part so they show in a vision system as the part is being placed? Do you put silk outline outside them or some silk circles around each one to clue the CM about what they are good for, or does that just need some notes and documentation and phone calls? For me, just copper, no solder mask but described in the bom and appeared in the pick and place data. Communicaton starts typically when they are missed ... Frank Bergmann. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
gene glick wrote: After a very long time, I am just about ready to send out 3 different boards for fab. I would appreciate any advice to improve my chances of success. So far here's what has been done: 1. Run DRC on all PCBs with no issues.. 2. Checked schematics. 3. Checked schematic matches layout. 4. In process of checking all the components, especially the transistor pinouts (all SOT23 devices) 5. Checked the board dimensions. These boards plug into one another, so have to be sure they match up. It looks good physically and the pin numbers look correct from board-to-board. 6. Checked the soldermask. I found a bunch with very minimal dam spacing so fixed them. 7. fixed cosmetic trace runs that looked ugly. 8. double checked for unused traces left behind from component moves. The cash layout for PCB fab is going to be large enough that I am nervous about not getting it right. Still, I have a CPU card and SMPS to do which can wait a bit while this gets put together. what else? Any suggestions? don't even consider ordering boards without loading up the photoplot files into something like gerbv and doing some sanity checks. This advice applies to a design done with any layout tool and not just pcb. A minimal list would be: - From 20,000 feet, does each layer look right or are there glaring errors like a big missing chunk of a ground plane. - On your plane layer(s), make sure that you see some pins/vias that go through the plane *without* connecting. Now make sure you see some that *do* connect. Yes, I have seen a case where someone (not me) ordered a board that had exactly 0 connections to the ground plane. All thermals were missing. Didn't work so well. - Mounting holes there? In the right place? - If you're using new footprints, especially high pin count QFN's, and QFP's where there are versions with different pin pitch for the same pin count, then do at least some sanity checks on pin pitch. For example on a 128 pin TQFP, measure from pin 1 center to pin 32 center , divide by 31 and make sure you get the right answer. - On new leaded connector footprints, at least spot check your hole sizes. - for the top and bottom layers, toggle on/off the associated soldermask relieve layer and see that it appears that your pads and pins are covered. I don't usually check every single pad but at least do a high level check to see that it is about right. - for the top and bottom layers, turn on the solder mask relief and toggle the silk screen layers and look for silk over pad openings. For these last 2 cases, I'd love to see a tool that used libgerbv that could do boolean operations on layers to compute things like: err_top_silk = layer_and(top_silk, top_soldermask_relief) In other words something that could do an after the fact set of DRC checks. But that is a whole other project. -Dan - Ma ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
don't even consider ordering boards without loading up the photoplot files into something like gerbv and doing some sanity checks. This advice applies to a design done with any layout tool and not just pcb. A minimal list would be: - From 20,000 feet, does each layer look right or are there glaring errors like a big missing chunk of a ground plane. - On your plane layer(s), make sure that you see some pins/vias that go through the plane *without* connecting. Now make sure you see some that *do* connect. Yes, I have seen a case where someone (not me) ordered a board that had exactly 0 connections to the ground plane. All thermals were missing. Didn't work so well. As another interesting aside - not likely to happen if you're using gEDA - a tech in the company I work for sent off a pcb design in the raw Altium pcb format (ie - not the generated gerb files). This was a not uncommon practice as Altium was considered *industry standard* and every pcb fab house we deal with has a copy. In this case however the fab house opened the designs in a slightly older version than what the files were generated in. AFTER the boards were fabbed AND populated it was discovered that due to the difference in version a whole bunch of nets had been fused to various power planes. The whole thing was fubar. Expensively fubar. The pcb fab house were not at fault as we hadn't specified which version of Altium had been used etc etc. There are a multitude of serious process errors involved in how the build was handled... if you follow what has been discussed so far I don't think you will have the same problems. Geoff ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Feb 24, 2010, at 1:41 PM, Bob Paddock wrote: To DJ's comment. We usually do go with pre-programmed parts eventually. Solder jumpers are a really bad idea when doing anything more than few boards. Even zero ohm resisters jumpers cost real money. I believe it was my comment that referenced DJ's solder jumpers. Solder jumpers are not always a really bad idea. They can be hand populated much easier than 0 ohm resistors and cost less. The whole point of the solder jumpers have two uses. 1. A jumper with a dollop of solder applied at SMT using the solder mask is cheaper than a 0 ohm resistor for rework purposes, As the resistor needs solder + resistor. After the design is finalized a new board can be spun that shorts the jumper with copper. When you need to disconnect for rework, just use solderwik and remove. 2. A jumper with the solder not applied at SMT, so that the connection is not made until the solder is applied at a later time. This jumper is much easier to apply than a resistor by an operator. A hot iron and solder are the only things needed, not tweezers or parts. #2 is used to manufacture products built on the millions of units scale. Steve ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
So these footprint fiducials are outboard of the part so they show in a vision system as the part is being placed? Do you put silk outline outside them or some silk circles around each one to clue the CM about what they are good for, or does that just need some notes and documentation and phone calls? I don't put silk around the fiducials. For the parts that have them, they are in two diagonal corners of the part footprint, as part of the footprint. My current CM knows our process and we know theirs now, so we don't usually say much about them. Going to a new CM I would have lots of fab notes in a ReadMe. Where things usually fall about is the people on the line don't get to talk to the customers. Make it a point to ask to the people that are on the line doing the work. Not the CM salesmen nor the company managers. The line people know how to make things go well, and what can be done to improve things, but it frequently gets lost in the hierarchy of politics between the workers and the customer, and doesn't make it back to the board designers. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Wed, Feb 24, 2010 at 7:47 PM, Steven Michalske smichal...@gmail.com wrote: On Feb 24, 2010, at 1:41 PM, Bob Paddock wrote: To DJ's comment. We usually do go with pre-programmed parts eventually. Solder jumpers are a really bad idea when doing anything more than few boards. Even zero ohm resisters jumpers cost real money. I believe it was my comment that referenced DJ's solder jumpers. Yes, sorry. Solder jumpers are not always a really bad idea. They can be hand populated much easier than 0 ohm resistors and cost less. I'll stand by what I said. Solder jumpers are a bad idea in any quantity beyond a few prototypes. After the design is finalized a new board can be spun that shorts the jumper with copper. I agree. This jumper is much easier to apply than a resistor by an operator. A hot iron and solder are the only things needed, not tweezers or parts. #2 is used to manufacture products built on the millions of units scale. I don't want to pay a person to solder that many jumpers. Not a good use of their skills. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: any last minute advice prior to sending out for PCB fab
On Feb 24, 2010, at 4:59 PM, Bob Paddock wrote: On Wed, Feb 24, 2010 at 7:47 PM, Steven Michalske smichal...@gmail.com wrote: On Feb 24, 2010, at 1:41 PM, Bob Paddock wrote: To DJ's comment. We usually do go with pre-programmed parts eventually. Solder jumpers are a really bad idea when doing anything more than few boards. Even zero ohm resisters jumpers cost real money. I believe it was my comment that referenced DJ's solder jumpers. Yes, sorry. Solder jumpers are not always a really bad idea. They can be hand populated much easier than 0 ohm resistors and cost less. I'll stand by what I said. Solder jumpers are a bad idea in any quantity beyond a few prototypes. I guess my gripe is that your outright stating its bad, when in truth its a manufacturing decision. When it is the best choice for some assembly requirements, like connection sequencing. e.g. Solder these 4 jumpers in order. The example I know that is used in millions of products is generalized as this. Solder these 20 wires onto the PCB, and tack this solder jumper. The solder jumper uses the least effort of the assembly, and specifying the order of the wire connections doesn't omit the many momentary connections inserting the wire and soldering. At times it is the only cost effective option. Here the cost effective option is pre-programmed, no argument. After the design is finalized a new board can be spun that shorts the jumper with copper. I agree. This jumper is much easier to apply than a resistor by an operator. A hot iron and solder are the only things needed, not tweezers or parts. #2 is used to manufacture products built on the millions of units scale. I don't want to pay a person to solder that many jumpers. Not a good use of their skills. It is more of a waste to solder resistors. I don't want folks to rule out this option because of the quote Solder jumpers are a bad idea in any quantity beyond a few prototypes Steve ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Eagle to gEDA conversion path??
On Tuesday 23 February 2010, Dave N6NZ wrote: Really? Is there a use for gEDA-Eagle? Lots of reasons. Whether you like it or not, it is popular. Some people will insist on it. If gEDA is ever to replace Eagle, there needs to be a migration path both ways. If Free/open-source is ever to make it to the mainstream, the various free packages need to share. That includes Kicad. Regarding Kicad and gEDA, think of it like vi and emacs. It must be possible to use them interchangeably, but you will never convince a fan of one to use the other, and it will harm both if you try. I never would have cared about Eagle, except that the RepRap PCB's are done with Eagle. Now, why someone would do open source hardware with closed source tools is a mystery to me... but anyway so far in a total of 30 minutes of Eagle usage I've discovered: 1) the crippleware version only allows a single schematic sheet, leading people to create unreadable glop, and 2) printing is truly bizarre. I can't imagine someone going from gEDA to the free/crippled version of Eagle. And as to going to the commercial version, OK I can see some customer requiring that, but isn't that Eagle's problem? No. They are on top. Remember the golden rule: He who has the gold makes the rules. They have no business reason to cooperate. After all, nobody is hiding gEDA's file formats. True, but they are not really designed for general exchange. Rather, they are more like a dump of the internal representation. There is no possibility that anyone outside would adopt such a tool-specific format. For interchange, it is necessary to abstract the content to something that is equally meaningful in all contexts. Don't forget .. there is layout too, and lots of other tools and ways to use it. The only representation that is equally meaningful in all contexts is a circuit, a netlist. Then augment it with the extra information needed to render it as a schematic, and as a layout. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Changing the author name on the fabrication drawings
Hello, If you are in PCB and you bring up the command window you can use ChangeName(Layout) and it will allow you to change the name of the layout visible in the fab drawing gerber file. Which command changes the author name? I tried working with fab-author (and author and originator along with some capitalization variations) which I found at http://www.mail-archive.com/geda-user@moria.seul.org/msg18977.html but I had no success. Thank you, Andy ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Open Source mechanical CAD on the horizon
Kai-Martin Knaak wrote: I just got aware of the open source mechanical CAD project freecad. It hit the debian repository a month ago. Although it is still lacking important features, much of the basic infrastructure is already up and running. http://en.wikipedia.org/wiki/FreeCAD_(Juergen_Riegel) ---(kaimartin) Kai, Have you, or anyone in the group, used FreeCAD for any useful work? I just downloaded the source code for Linux and took a look at the docs. Although they may not be up to date (file date of Jan 7, 2010), they have no substance. It is proclaiming there isn't yet much in the way of GUI commands to implement the internal drawing functions. I am looking for a free and Open Source mechanical drawing program to complement gEDA. i.e.: Okay, we have the PWB out for fab, now let's design and document an enclosure! I have been using gschem's drawing capability for much of my projects' mechanical documentation. For the most part, it is acceptable for that, however, gschem has a few limitations, such as lack of drawing ellipses for oval speaker cutouts, that real mechanical drawing programs support. FreeCAD looks promising on the surface; however, before I install and/or update a lot of Linux system support libraries for FreeCAD, I would like to hear from someone who actually found FreeCAD useful at this stage of its development (version 0.9.2646). TIA. Girvin Herr ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: desktop-i18n in gEDA
On Wed, Feb 24, 2010 at 5:37 AM, Peter TB Brett pe...@peter-b.co.uk wrote: On Tue, 23 Feb 2010 23:16:49 -0500, Charles Lepple clep...@gmail.com wrote: I think the Fedora build is silently accepting the other directory under BUILDROOT: Making install in po make[3]: Entering directory `/builddir/build/BUILD/geda-gaf-1.6.0/ libgeda/po' /usr/bin/make prefix=../../.desktop-i18n install cp ./ LINGUAS ../../.desktop-i18n/libgeda38.LINGUAS || rm stamp-i18n make[4]: Entering directory `/builddir/build/BUILD/geda-gaf-1.6.0/ libgeda/po' /bin/mkdir -p /builddir/build/BUILDROOT/geda-gaf-1.6.0-3.fc13.i386/usr/ share installing nl.gmo as /builddir/build/BUILDROOT/geda- gaf-1.6.0-3.fc13.i386../../.desktop-i18n/share/locale/nl/LC_MESSAGES/ libgeda38.mo ... Wow, that's pretty epicly broken of something, especially since I'm being careful to specify the DESKTOP_I18N_LOCALE_DIR relative to $(top_builddir). Please check the Makefile in the po directories to verify that '@DESKTOP_I18N_LOCALE_DIR@' is expanded to '$(top_builddir)/.desktop-i18n'. Here's the corresponding portion of libgeda/po/Makefile from 1.6.1 on my machine: (very similar to 1.6.0 but I forgot to save that build directory) top_builddir = ../.. MKDIR_P = /sw/bin/gmkdir -p DESKTOP_I18N_LOCALE_DIR = $(top_builddir)/.desktop-i18n It seems that DESTDIR is prepended to top_builddir without an intermediate libgeda/po for the ../.. part to consume. I'm open to suggestions as to how to fix this, because I still can't see what I've done wrong here. :-| I don't know either. Are there any other packages which try to use gettext in this fashion? -- - Charles Lepple ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Changing the author name on the fabrication drawings
fab-author is a user setting, not a board setting. You can do pcb --fab-author me ... or put it in ~/.pcb/settings: fab-author: Me ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
