Re: [m5-dev] Testing Functional Access
Brad, functional accesses work for the case when the only functional
accesses are allowed in the system. Currently I am working when the ratio
is 1:1 for functional and timing accesses.
I am facing some problem with the timing access right now, which should
work perfectly fine. Actually the value returned for a read packet is
coming out to be incorrect. I tracked the request, the response was
correct, but it seems that the packet was not updated properly. I
noticed that around line 530 in Sequencer.cc, the following code has been
added. Do you think we need such code for memtester as well? Should we not
be updating the subBlock when memtester is used?
// If using the RubyTester, update the RubyTester sender state's
// subBlock with the recieved data. The tester will later access
// this state.
// Note: RubyPort will access it's sender state before the
// RubyTester.
if (m_usingRubyTester) {
RubyPort::SenderState *requestSenderState =
safe_castRubyPort::SenderState*(ruby_request.pkt-senderState);
RubyTester::SenderState* testerSenderState =
(RubyTester::SenderState*)(requestSenderState-saved);
testerSenderState-subBlock-mergeFrom(data);
}
Thanks
Nilay
On Tue, 1 Mar 2011, Beckmann, Brad wrote:
I forgot that the memtester includes functional accesses. That is a
good suggestion, especially when it comes to testing the situations
where Ruby can't satisfy the functional access due to contention with
timing accesses.
The memtester does run with Ruby (it actually runs every night in the
regression tester), however the percentage of functional accesses is
currently set to zero. See configs/example/ruby_mem_test.py. You'll
obviously want to change that and include code within
src/cpu/testers/memtest/* to handle failed functional accesses. If you
don't want to initially deal with the failure situations, you can set
the functional access percentage to 100% and that should always work.
Brad
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Re: [m5-dev] Testing Functional Access
Brad, I figured out the error, so no need to respond to my previous mail.
--
Nilay
On Sat, 9 Apr 2011, Nilay Vaish wrote:
Brad, functional accesses work for the case when the only functional accesses
are allowed in the system. Currently I am working when the ratio is 1:1 for
functional and timing accesses.
I am facing some problem with the timing access right now, which should work
perfectly fine. Actually the value returned for a read packet is coming out
to be incorrect. I tracked the request, the response was correct, but it
seems that the packet was not updated properly. I noticed that around line
530 in Sequencer.cc, the following code has been added. Do you think we need
such code for memtester as well? Should we not be updating the subBlock when
memtester is used?
// If using the RubyTester, update the RubyTester sender state's
// subBlock with the recieved data. The tester will later access
// this state.
// Note: RubyPort will access it's sender state before the
// RubyTester.
if (m_usingRubyTester) {
RubyPort::SenderState *requestSenderState =
safe_castRubyPort::SenderState*(ruby_request.pkt-senderState);
RubyTester::SenderState* testerSenderState =
(RubyTester::SenderState*)(requestSenderState-saved);
testerSenderState-subBlock-mergeFrom(data);
}
Thanks
Nilay
On Tue, 1 Mar 2011, Beckmann, Brad wrote:
I forgot that the memtester includes functional accesses. That is a good
suggestion, especially when it comes to testing the situations where Ruby
can't satisfy the functional access due to contention with timing accesses.
The memtester does run with Ruby (it actually runs every night in the
regression tester), however the percentage of functional accesses is
currently set to zero. See configs/example/ruby_mem_test.py. You'll
obviously want to change that and include code within
src/cpu/testers/memtest/* to handle failed functional accesses. If you
don't want to initially deal with the failure situations, you can set the
functional access percentage to 100% and that should always work.
Brad
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[m5-dev] Testing Functional Access
How can I test whether or not functional accesses to the memory are working correctly? Do we have some regression test for this? Thanks Nilay ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] Testing Functional Access
Hi Nilay, I would suggest a few different tests. The first one would be to run a simple binary under Alpha SE mode using Ruby. You should first observe a bunch of functional accesses that initialize memory and then (if I recall correctly) dynamic accesses will load the TLB. After passing that test, I would try loading a SE checkpoint and running. After that, I would move on to similar tests using FS mode. I hope that helps. Please let me know if you have any specific questions. Brad -Original Message- From: m5-dev-boun...@m5sim.org [mailto:m5-dev-boun...@m5sim.org] On Behalf Of Nilay Sent: Tuesday, March 01, 2011 6:51 AM To: m5-dev@m5sim.org Subject: [m5-dev] Testing Functional Access How can I test whether or not functional accesses to the memory are working correctly? Do we have some regression test for this? Thanks Nilay ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] Testing Functional Access
Hi Nilay, I don't know if there is a regression for it, but the M5 utility (./util/m5/) sets up functional accesses to memory. For instance, in FS, if you specify an rcS script to fs.py and call % /sbin/m5 readfile from the command line of the simulated system, it will read the specified rcS file off the host machine's disk and send it to the memory of the simulated system using functional accesses. I think there are other functional access examples in the magic that the M5 utility provides. Hope this helps, Joel On Tue, Mar 1, 2011 at 8:51 AM, Nilay ni...@cs.wisc.edu wrote: How can I test whether or not functional accesses to the memory are working correctly? Do we have some regression test for this? Thanks Nilay ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] Testing Functional Access
The m5 memtester supports functional accesses (there's a percent_functional parameter on the MemTest object). I don't know if anyone's run the memtester with Ruby though. Seems like it should work. Steve On Tue, Mar 1, 2011 at 8:39 AM, Joel Hestness hestn...@cs.utexas.eduwrote: Hi Nilay, I don't know if there is a regression for it, but the M5 utility (./util/m5/) sets up functional accesses to memory. For instance, in FS, if you specify an rcS script to fs.py and call % /sbin/m5 readfile from the command line of the simulated system, it will read the specified rcS file off the host machine's disk and send it to the memory of the simulated system using functional accesses. I think there are other functional access examples in the magic that the M5 utility provides. Hope this helps, Joel On Tue, Mar 1, 2011 at 8:51 AM, Nilay ni...@cs.wisc.edu wrote: How can I test whether or not functional accesses to the memory are working correctly? Do we have some regression test for this? Thanks Nilay ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] Testing Functional Access
I forgot that the memtester includes functional accesses. That is a good suggestion, especially when it comes to testing the situations where Ruby can't satisfy the functional access due to contention with timing accesses. The memtester does run with Ruby (it actually runs every night in the regression tester), however the percentage of functional accesses is currently set to zero. See configs/example/ruby_mem_test.py. You'll obviously want to change that and include code within src/cpu/testers/memtest/* to handle failed functional accesses. If you don't want to initially deal with the failure situations, you can set the functional access percentage to 100% and that should always work. Brad -Original Message- From: m5-dev-boun...@m5sim.org [mailto:m5-dev-boun...@m5sim.org] On Behalf Of Steve Reinhardt Sent: Tuesday, March 01, 2011 10:49 AM To: M5 Developer List Subject: Re: [m5-dev] Testing Functional Access The m5 memtester supports functional accesses (there's a percent_functional parameter on the MemTest object). I don't know if anyone's run the memtester with Ruby though. Seems like it should work. Steve On Tue, Mar 1, 2011 at 8:39 AM, Joel Hestness hestn...@cs.utexas.eduwrote: Hi Nilay, I don't know if there is a regression for it, but the M5 utility (./util/m5/) sets up functional accesses to memory. For instance, in FS, if you specify an rcS script to fs.py and call % /sbin/m5 readfile from the command line of the simulated system, it will read the specified rcS file off the host machine's disk and send it to the memory of the simulated system using functional accesses. I think there are other functional access examples in the magic that the M5 utility provides. Hope this helps, Joel On Tue, Mar 1, 2011 at 8:51 AM, Nilay ni...@cs.wisc.edu wrote: How can I test whether or not functional accesses to the memory are working correctly? Do we have some regression test for this? Thanks Nilay ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
