Re: [PATCH 0/4] rtc: convert subsystem to i2c_new_dummy_device()

2019-07-22 Thread Alexandre Belloni
On 22/07/2019 19:26:14+0200, Wolfram Sang wrote:
> This series is part of a tree-wide movement to replace the I2C API call
> 'i2c_new_dummy' which returns NULL with its new counterpart returning an
> ERRPTR.
> 
> The series was generated with coccinelle (audited afterwards, of course) and
> build tested by me and by buildbot. No tests on HW have been performed.
> 
> The branch is based on v5.3-rc1. A branch (with some more stuff included) can
> be found here:
> 
> git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git 
> renesas/i2c/new_dummy
> 
> Some drivers still need to be manually converted. Patches for those will be
> sent out individually.
> 
> 
> Wolfram Sang (4):
>   rtc: isl12026: convert to i2c_new_dummy_device
>   rtc: max77686: convert to i2c_new_dummy_device
>   rtc: s35390a: convert to i2c_new_dummy_device
>   rtc: s5m: convert to i2c_new_dummy_device
> 
>  drivers/rtc/rtc-isl12026.c | 6 +++---
>  drivers/rtc/rtc-max77686.c | 6 +++---
>  drivers/rtc/rtc-s35390a.c  | 6 +++---
>  drivers/rtc/rtc-s5m.c  | 6 +++---
>  4 files changed, 12 insertions(+), 12 deletions(-)
> 
All applied, thanks!

-- 
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com


Re: [PATCH 39/79] libperf: Add perf_evlist__add function

2019-07-22 Thread Arnaldo Carvalho de Melo
Em Sun, Jul 21, 2019 at 01:24:26PM +0200, Jiri Olsa escreveu:
> Adding perf_evlist__add function to add perf_evsel
> in perf_evlist struct.
> 
> Link: http://lkml.kernel.org/n/tip-pnfovrqcgxquioroelzfz...@git.kernel.org
> Signed-off-by: Jiri Olsa 
> ---
>  tools/perf/lib/evlist.c  | 7 +++
>  tools/perf/lib/include/perf/evlist.h | 3 +++
>  tools/perf/lib/libperf.map   | 1 +
>  tools/perf/util/evlist.c | 2 +-
>  4 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/tools/perf/lib/evlist.c b/tools/perf/lib/evlist.c
> index fdc8c1894b37..e5f187fa4e57 100644
> --- a/tools/perf/lib/evlist.c
> +++ b/tools/perf/lib/evlist.c
> @@ -2,8 +2,15 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  void perf_evlist__init(struct perf_evlist *evlist)
>  {
>   INIT_LIST_HEAD(>entries);
>  }
> +
> +void perf_evlist__add(struct perf_evlist *evlist,
> +   struct perf_evsel *evsel)
> +{
> + list_add_tail(>node, >entries);
> +}
> diff --git a/tools/perf/lib/include/perf/evlist.h 
> b/tools/perf/lib/include/perf/evlist.h
> index 1ddfcca0bd01..6992568b14a0 100644
> --- a/tools/perf/lib/include/perf/evlist.h
> +++ b/tools/perf/lib/include/perf/evlist.h
> @@ -5,7 +5,10 @@
>  #include 
>  
>  struct perf_evlist;
> +struct perf_evsel;
>  
>  LIBPERF_API void perf_evlist__init(struct perf_evlist *evlist);
> +LIBPERF_API void perf_evlist__add(struct perf_evlist *evlist,
> +   struct perf_evsel *evsel);
>  
>  #endif /* __LIBPERF_EVLIST_H */
> diff --git a/tools/perf/lib/libperf.map b/tools/perf/lib/libperf.map
> index 5ca6ff6fcdfa..06ccf31eb24d 100644
> --- a/tools/perf/lib/libperf.map
> +++ b/tools/perf/lib/libperf.map
> @@ -11,6 +11,7 @@ LIBPERF_0.0.1 {
>   perf_thread_map__put;
>   perf_evsel__init;
>   perf_evlist__init;
> + perf_evlist__add;
>   local:
>   *;
>  };
> diff --git a/tools/perf/util/evlist.c b/tools/perf/util/evlist.c
> index aacddd9b2d64..ea25c7b49a4c 100644
> --- a/tools/perf/util/evlist.c
> +++ b/tools/perf/util/evlist.c
> @@ -180,8 +180,8 @@ static void perf_evlist__propagate_maps(struct evlist 
> *evlist)
>  
>  void evlist__add(struct evlist *evlist, struct evsel *entry)
>  {
> + perf_evlist__add(>core, >core);
>   entry->evlist = evlist;
> - list_add_tail(>core.node, >core.entries);
>   entry->idx = evlist->nr_entries;
>   entry->tracking = !entry->idx;

this inversion was ok, it by definition doesn't use entry->evlist, just
core stuff.

- Arnaldo


Re: [PATCH] rtc: imxdi: use devm_platform_ioremap_resource() to simplify code

2019-07-22 Thread Alexandre Belloni
On 17/07/2019 16:14:11+0800, anson.hu...@nxp.com wrote:
> From: Anson Huang 
> 
> Use the new helper devm_platform_ioremap_resource() which wraps the
> platform_get_resource() and devm_ioremap_resource() together, to
> simplify the code.
> 
> Signed-off-by: Anson Huang 
> ---
>  drivers/rtc/rtc-imxdi.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
Applied, thanks.

-- 
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com


[v5 2/2] gpio: aspeed: Add SGPIO driver

2019-07-22 Thread Hongwei Zhang
Hello Linus,

Thanks for your reviewing, please find my inline comment on why we group the 
("A", "B", "C", "D") etc. together at below. We will address other concerns 
separately.
--Hongwei

> From: Linus Walleij 
> Sent: Saturday, July 20, 2019 3:37 AM
> To:   Hongwei Zhang
> Cc:   Andrew Jeffery; open list:GPIO SUBSYSTEM; Joel Stanley; 
> linux-asp...@lists.ozlabs.org; Bartosz 
> Golaszewski; linux-kernel@vger.kernel.org; Linux ARM
> Subject:  Re: [v5 2/2] gpio: aspeed: Add SGPIO driver
> 
> Hi Hongwei,
> 
> thanks for your patch!
> 
> some comments and nitpicking below:
> 
> On Fri, Jul 19, 2019 at 9:25 PM Hongwei Zhang  wrote:
> 
> > Add SGPIO driver support for Aspeed AST2500 SoC.
> >
> > Signed-off-by: Hongwei Zhang 
> 
> > +// SPDX-License-Identifier: GPL-2.0+
> 
> I think the SPDX people prefer GPL-2.0-or-later
> 
> > +#include 
> 
> Do not include this header in any new code using or providing GPIOs.
> 
> > +#include 
> 
> This should be enough.
> 
> > +/*
> > + * Note: The "value" register returns the input value when the GPIO is
> > + *  configured as an input.
> > + *
> > + *  The "rdata" register returns the output value when the GPIO is
> > + *  configured as an output.
> > + */
> > +static const struct aspeed_sgpio_bank aspeed_sgpio_banks[] = {
> > +   {
> > +   .val_regs = 0x,
> > +   .rdata_reg = 0x0070,
> > +   .irq_regs = 0x0004,
> > +   .names = { "A", "B", "C", "D" },
> > +   },
> > +   {
> > +   .val_regs = 0x001C,
> > +   .rdata_reg = 0x0074,
> > +   .irq_regs = 0x0020,
> > +   .names = { "E", "F", "G", "H" },
> > +   },
> > +   {
> > +   .val_regs = 0x0038,
> > +   .rdata_reg = 0x0078,
> > +   .irq_regs = 0x003C,
> > +   .names = { "I", "J" },
> > +   },
> > +};
> 
> I guess you have been over the reasons why this is one big GPIO chip instead 
> of  10 individual gpio_chips?
> 
> It is usally better to have the individual chips, because it is easier to 
> just cut down the code to handle 
> one instance and not having to offset around the different address ranges.
> 
> Even if they all have the same clock, the clocks are reference counted so it 
> will just be referenced 10 
> times at most.
> 
> If they share a few common registers it is not good to split it though. So 
> there may be a compelling 
> argument for keeping them all together.
> 

As you suspected it correctly, AST2500 utilizes all the 32 bits of the 
registers 
(data value, interrupt, etc...), such that using 8-bit bands
[7:0]/[15:8]/23:16]/[31:24] of GPIO_200H for SGPIO_A/B/C/D . 
so registering 10 gpiochip drivers separately will make code more 
complicated, for example gpio_200 register (data_value reg) has to be 
shared by 4 gpiochip instances, and the same is true for gpio204 (interrupt 
reg), 
and other more registers.
So we would prefer to keeping current implementation.

> > +/* This will be resolved at compile time */
> 
> I don't see why that matters.
> 
> > +static inline void __iomem *bank_reg(struct aspeed_sgpio *gpio,
> > +const struct aspeed_sgpio_bank *bank,
> > +const enum aspeed_sgpio_reg reg)
> 
> You don't need inline. The compiler will inline it anyway if it see the need 
> for it.
> 
> The only time we really use inline is in header files, where we want to point 
> out that this function will be 
> inlined as there is no compiled code in header files.
> 
> > +#define GPIO_BANK(x)((x) >> 5)
> > +#define GPIO_OFFSET(x)  ((x) & 0x1f)
> > +#define GPIO_BIT(x) BIT(GPIO_OFFSET(x))
> 
> OK seems fairly standard.
> 
> > +static int aspeed_sgpio_get(struct gpio_chip *gc, unsigned int 
> > +offset) static void aspeed_sgpio_set(struct gpio_chip *gc, unsigned 
> > +int offset, int val) static int aspeed_sgpio_dir_in(struct gpio_chip 
> > +*gc, unsigned int offset)
> 
> These are fairly standard.
> 
> > +static int aspeed_sgpio_dir_out(struct gpio_chip *gc, unsigned int 
> > +offset, int val) {
> > +   struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
> > +   unsigned long flags;
> > +
> > +   spin_lock_irqsave(>lock, flags);
> > +   gpio->dir_in[GPIO_BANK(offset)] &= ~GPIO_BIT(offset);
> > +   spin_unlock_irqrestore(>lock, flags);
> > +
> > +   return 0;
> > +}
> 
> There is a bug here. You fail to write the "val" to the output line, which is 
> the expected semantic of this 
> call.
> 
> > +static int aspeed_sgpio_get_direction(struct gpio_chip *gc, unsigned 
> > +int offset)
> 
> These are all very simple MMIO accessors.
> 
> If you made one gpio_chip per bank, you could just use gpio-mmio.c to control 
> the lines by
> 
> select GPIO_GENERIC
> 
> ret = bgpio_init(chip, dev, 4,
>  base + GPIO_VAL_VALUE ,
>  NULL,
>  NULL,
>

Re: [PATCH] rtc: mxc_v2: use devm_platform_ioremap_resource() to simplify code

2019-07-22 Thread Alexandre Belloni
On 17/07/2019 16:12:17+0800, anson.hu...@nxp.com wrote:
> From: Anson Huang 
> 
> Use the new helper devm_platform_ioremap_resource() which wraps the
> platform_get_resource() and devm_ioremap_resource() together, to
> simplify the code.
> 
> Signed-off-by: Anson Huang 
> ---
>  drivers/rtc/rtc-mxc_v2.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
Applied, thanks.

-- 
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com


[PATCH 2/5] x86_64, -march=native: POPCNT support

2019-07-22 Thread Alexey Dobriyan
Detect POPCNT instruction support and inline hweigth*() functions
if it is supported by CPU.

Detect POPCNT at boot time and conditionally refuse to boot.

Signed-off-by: Alexey Dobriyan 
---
 arch/x86/include/asm/arch_hweight.h   | 24 +++
 arch/x86/include/asm/segment.h|  1 +
 arch/x86/kernel/verify_cpu.S  |  8 +++
 arch/x86/lib/Makefile |  5 +++-
 .../drm/i915/display/intel_display_power.c|  2 +-
 drivers/misc/sgi-gru/grumain.c|  2 +-
 fs/btrfs/tree-checker.c   |  4 ++--
 include/linux/bitops.h|  2 ++
 lib/Makefile  |  2 ++
 scripts/kconfig/cpuid.c   |  7 ++
 scripts/march-native.sh   |  2 ++
 11 files changed, 54 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/arch_hweight.h 
b/arch/x86/include/asm/arch_hweight.h
index ba88edd0d58b..3797aa57baa5 100644
--- a/arch/x86/include/asm/arch_hweight.h
+++ b/arch/x86/include/asm/arch_hweight.h
@@ -2,6 +2,28 @@
 #ifndef _ASM_X86_HWEIGHT_H
 #define _ASM_X86_HWEIGHT_H
 
+#ifdef CONFIG_MARCH_NATIVE_POPCNT
+static inline unsigned int __arch_hweight64(uint64_t x)
+{
+   return __builtin_popcountll(x);
+}
+
+static inline unsigned int __arch_hweight32(uint32_t x)
+{
+   return __builtin_popcount(x);
+}
+
+static inline unsigned int __arch_hweight16(uint16_t x)
+{
+   return __builtin_popcount(x);
+}
+
+static inline unsigned int __arch_hweight8(uint8_t x)
+{
+   return __builtin_popcount(x);
+}
+#else
+
 #include 
 
 #ifdef CONFIG_64BIT
@@ -53,3 +75,5 @@ static __always_inline unsigned long __arch_hweight64(__u64 w)
 #endif /* CONFIG_X86_32 */
 
 #endif
+
+#endif
diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
index ac3892920419..d314c6b9b632 100644
--- a/arch/x86/include/asm/segment.h
+++ b/arch/x86/include/asm/segment.h
@@ -4,6 +4,7 @@
 
 #include 
 #include 
+#include 
 
 /*
  * Constructor for a conventional segment GDT (or LDT) entry.
diff --git a/arch/x86/kernel/verify_cpu.S b/arch/x86/kernel/verify_cpu.S
index a024c4f7ba56..a9be8904faa3 100644
--- a/arch/x86/kernel/verify_cpu.S
+++ b/arch/x86/kernel/verify_cpu.S
@@ -134,6 +134,14 @@ ENTRY(verify_cpu)
movl $1,%eax
ret
 .Lverify_cpu_sse_ok:
+
+#ifdef CONFIG_MARCH_NATIVE_POPCNT
+   mov $1, %eax
+   cpuid
+   bt  $23, %ecx
+   jnc .Lverify_cpu_no_longmode
+#endif
+
popf# Restore caller passed flags
xorl %eax, %eax
ret
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 5246db42de45..7dc0e71b0ef3 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -40,7 +40,10 @@ lib-$(CONFIG_RANDOMIZE_BASE) += kaslr.o
 lib-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o
 lib-$(CONFIG_RETPOLINE) += retpoline.o
 
-obj-y += msr.o msr-reg.o msr-reg-export.o hweight.o
+obj-y += msr.o msr-reg.o msr-reg-export.o
+ifneq ($(CONFIG_MARCH_NATIVE_POPCNT),y)
+   obj-y += hweight.o
+endif
 obj-y += iomem.o
 
 ifeq ($(CONFIG_X86_32),y)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c 
b/drivers/gpu/drm/i915/display/intel_display_power.c
index c93ad512014c..9066105f2fea 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1570,7 +1570,7 @@ static void print_power_domains(struct i915_power_domains 
*power_domains,
 {
enum intel_display_power_domain domain;
 
-   DRM_DEBUG_DRIVER("%s (%lu):\n", prefix, hweight64(mask));
+   DRM_DEBUG_DRIVER("%s (%u):\n", prefix, hweight64(mask));
for_each_power_domain(domain, mask)
DRM_DEBUG_DRIVER("%s use_count %d\n",
 intel_display_power_domain_str(domain),
diff --git a/drivers/misc/sgi-gru/grumain.c b/drivers/misc/sgi-gru/grumain.c
index 40ac59dd018c..30cfeeb28e74 100644
--- a/drivers/misc/sgi-gru/grumain.c
+++ b/drivers/misc/sgi-gru/grumain.c
@@ -833,7 +833,7 @@ void gru_steal_context(struct gru_thread_state *gts)
}
gru_dbg(grudev,
"stole gid %d, ctxnum %d from gts %p. Need cb %d, ds %d;"
-   " avail cb %ld, ds %ld\n",
+   " avail cb %u, ds %u\n",
gru->gs_gid, ctxnum, ngts, cbr, dsr, hweight64(gru->gs_cbr_map),
hweight64(gru->gs_dsr_map));
 }
diff --git a/fs/btrfs/tree-checker.c b/fs/btrfs/tree-checker.c
index ccd5706199d7..2d33c6ae0e61 100644
--- a/fs/btrfs/tree-checker.c
+++ b/fs/btrfs/tree-checker.c
@@ -478,7 +478,7 @@ static int check_block_group_item(struct extent_buffer 
*leaf,
flags = btrfs_block_group_flags();
if (hweight64(flags & BTRFS_BLOCK_GROUP_PROFILE_MASK) > 1) {
block_group_err(leaf, slot,
-"invalid profile flags, have 0x%llx (%lu bits set) expect no more than 1 bit 
set",
+"invalid profile flags, have 0x%llx (%u 

[PATCH 1/5] x86_64: -march=native support

2019-07-22 Thread Alexey Dobriyan
I'm tired of rebasing it, so...

"-march=native" has been available in userspace for a long time and is
trivial to enable in Gentoo:

$ grep -e ^CFLAGS /etc/portage/make.conf
CFLAGS="-march=native -O2 -pipe"

Patchset enables kernel compile with "-march=native" and do additional
optimizations based on CPU detection. Unfortunately most of the fun is in
SSE2/AVX2 instructions and kernel can't use those. But I have ideas for
at least BMI2.

This is intended to be an alternative to old school MCORE2 options.
Gentoo also ships a patch unrolling all those individual -march= options
into kernel config options. This patch should deprecate it.

See the link for more information:


https://www.shlomifish.org/humour/by-others/funroll-loops/Gentoo-is-Rice.html

Patch adds:
* -mgeneral-regs-only
with -march=native all those shiny AVX42-666 instructions
may suddenly became available

* small compile time partial CPUID detection,
* detect L1 cache shift at compile time,
* show "-march=native" line in /proc/config.gz,
* bump Kconfig "shell" output buffer to accomodate the option,

* inject individual MARCH_NATIVE options at compile time,
see other patches.

Currently only Intel and gcc are supported.

Intel, because I never had and AMD box.

Gcc, because clang emits detailed "march=native" information in
a different way, so I need to think how to extract it reliably.

Size benchmarks, my trimmed down kernel:

add/remove: 1/11 grow/shrink: 1856/5598 up/down: 14452/-65830 (-51378)
Function old new   delta
sha_transform   43024606+304
...
udf_write_fi19071023-884
Total: Before=7814760, After=7763382, chg -0.66%

This is mostly due to memset() un-unrolling.

In general, say, crypto and hash code becomes bigger because all those
rotations and shifts become RORX and SHLX instructions and those are 5+
bytes. Older compilers may also emit "REP RET" on generic kernels
because AMD, but upon detecting Intel those REP prefixes may go.

Users are advised to enable it and do their own benchmarks to decide if
it is worth the hassle.

Signed-off-by: Alexey Dobriyan 
---
 Makefile |  4 ++
 arch/x86/Kconfig.cpu | 20 +
 arch/x86/Makefile|  1 +
 scripts/kconfig/.gitignore   |  1 +
 scripts/kconfig/Makefile |  7 ++-
 scripts/kconfig/cpuid.c  | 85 
 scripts/kconfig/preprocess.c |  2 +-
 scripts/march-native.sh  | 66 
 8 files changed, 184 insertions(+), 2 deletions(-)
 create mode 100644 scripts/kconfig/cpuid.c
 create mode 100755 scripts/march-native.sh

diff --git a/Makefile b/Makefile
index 0623c6f88b5b..690f70afa74e 100644
--- a/Makefile
+++ b/Makefile
@@ -606,6 +606,10 @@ ifeq ($(dot-config),1)
 include include/config/auto.conf
 endif
 
+ifdef CONFIG_MARCH_NATIVE
+KBUILD_CFLAGS += -march=native
+endif
+
 ifeq ($(KBUILD_EXTMOD),)
 # Objects we will link into vmlinux / subdirs we need to visit
 init-y := init/
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 8e29c991ba3e..d71928d636be 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -287,8 +287,26 @@ config GENERIC_CPU
  Generic x86-64 CPU.
  Run equally well on all x86-64 CPUs.
 
+config MARCH_NATIVE
+   bool "-march=native"
+   depends on X86_64 && CC_IS_GCC
+   ---help---
+ Compile with -march=native.
+
+ Optimise for the machine where compilation is done at. Resulting
+ kernel and modules will not run reliably on a different machine
+ unless exactly identical CPUs are used.
+
+ Select only if you're self-compiling kernels and never share
+ the binaries. If unsure, select "Generic x86_64".
+
 endchoice
 
+config MARCH_NATIVE_CC_FLAGS
+   string
+   depends on MARCH_NATIVE && CC_IS_GCC
+   default "$(shell,$(CC) -march=native -v -E -x c /dev/null 2>&1 | sed 
-ne '/^COLLECT_GCC_OPTIONS=/{n;p}' | awk '{$1=$1};1')"
+
 config X86_GENERIC
bool "Generic x86 support"
depends on X86_32
@@ -307,6 +325,7 @@ config X86_INTERNODE_CACHE_SHIFT
int
default "12" if X86_VSMP
default X86_L1_CACHE_SHIFT
+   depends on !MARCH_NATIVE
 
 config X86_L1_CACHE_SHIFT
int
@@ -314,6 +333,7 @@ config X86_L1_CACHE_SHIFT
default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || 
X86_GENERIC || GENERIC_CPU
default "4" if MELAN || M486 || MGEODEGX1
default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || 
MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || 
M586 || MVIAC3_2 || MGEODE_LX
+   depends on !MARCH_NATIVE
 
 config X86_F00F_BUG
def_bool y
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 

[PATCH 3/5] x86_64, -march=native: REP MOVSB support

2019-07-22 Thread Alexey Dobriyan
Detect fast REP MOVSB support and use it for page copying.

Inline copy_page(), this saves alternative entry and a function call
overhead which should hopefully improve code generation.

Signed-off-by: Alexey Dobriyan 
---
 Makefile |  3 +++
 arch/x86/include/asm/page_64.h   | 13 +
 arch/x86/kernel/relocate_kernel_64.S | 15 +++
 arch/x86/kernel/verify_cpu.S | 12 
 arch/x86/lib/Makefile|  5 -
 arch/x86/lib/memcpy_64.S | 13 +
 arch/x86/platform/pvh/head.S |  4 
 scripts/kconfig/cpuid.c  |  9 +
 scripts/march-native.sh  |  1 +
 9 files changed, 74 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 690f70afa74e..aa194c96d27c 100644
--- a/Makefile
+++ b/Makefile
@@ -609,6 +609,9 @@ endif
 ifdef CONFIG_MARCH_NATIVE
 KBUILD_CFLAGS += -march=native
 endif
+ifdef CONFIG_MARCH_NATIVE_REP_MOVSB
+KBUILD_CFLAGS += -mmemcpy-strategy=rep_byte:-1:align,rep_byte:-1:noalign
+endif
 
 ifeq ($(KBUILD_EXTMOD),)
 # Objects we will link into vmlinux / subdirs we need to visit
diff --git a/arch/x86/include/asm/page_64.h b/arch/x86/include/asm/page_64.h
index 939b1cff4a7b..051da768273d 100644
--- a/arch/x86/include/asm/page_64.h
+++ b/arch/x86/include/asm/page_64.h
@@ -54,7 +54,20 @@ static inline void clear_page(void *page)
   : "cc", "memory", "rax", "rcx");
 }
 
+#ifdef CONFIG_MARCH_NATIVE_REP_MOVSB
+static __always_inline void copy_page(void *to, void *from)
+{
+   uint32_t len = PAGE_SIZE;
+   asm volatile (
+   "rep movsb"
+   : "+D" (to), "+S" (from), "+c" (len)
+   :
+   : "memory"
+   );
+}
+#else
 void copy_page(void *to, void *from);
+#endif
 
 #endif /* !__ASSEMBLY__ */
 
diff --git a/arch/x86/kernel/relocate_kernel_64.S 
b/arch/x86/kernel/relocate_kernel_64.S
index c51ccff5cd01..822f7a3d035a 100644
--- a/arch/x86/kernel/relocate_kernel_64.S
+++ b/arch/x86/kernel/relocate_kernel_64.S
@@ -266,18 +266,33 @@ swap_pages:
movq%rsi, %rax
 
movq%r10, %rdi
+#ifdef CONFIG_MARCH_NATIVE_REP_MOVSB
+   mov $4096, %ecx
+   rep movsb
+#else
movl$512, %ecx
rep ; movsq
+#endif
 
movq%rax, %rdi
movq%rdx, %rsi
+#ifdef CONFIG_MARCH_NATIVE_REP_MOVSB
+   mov $4096, %ecx
+   rep movsb
+#else
movl$512, %ecx
rep ; movsq
+#endif
 
movq%rdx, %rdi
movq%r10, %rsi
+#ifdef CONFIG_MARCH_NATIVE_REP_MOVSB
+   mov $4096, %ecx
+   rep movsb
+#else
movl$512, %ecx
rep ; movsq
+#endif
 
lea PAGE_SIZE(%rax), %rsi
jmp 0b
diff --git a/arch/x86/kernel/verify_cpu.S b/arch/x86/kernel/verify_cpu.S
index a9be8904faa3..57b41dafc592 100644
--- a/arch/x86/kernel/verify_cpu.S
+++ b/arch/x86/kernel/verify_cpu.S
@@ -142,6 +142,18 @@ ENTRY(verify_cpu)
jnc .Lverify_cpu_no_longmode
 #endif
 
+#ifdef CONFIG_MARCH_NATIVE_REP_MOVSB
+   xor %eax, %eax
+   cpuid
+   cmp $7, %eax
+   jb  .Lverify_cpu_no_longmode
+   mov $7, %eax
+   xor %ecx, %ecx
+   cpuid
+   bt  $9, %ebx
+   jnc .Lverify_cpu_no_longmode
+#endif
+
popf# Restore caller passed flags
xorl %eax, %eax
ret
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 7dc0e71b0ef3..fa24cc717fb1 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -59,7 +59,10 @@ endif
 else
 obj-y += iomap_copy_64.o
 lib-y += csum-partial_64.o csum-copy_64.o csum-wrappers_64.o
-lib-y += clear_page_64.o copy_page_64.o
+lib-y += clear_page_64.o
+ifneq ($(CONFIG_MARCH_NATIVE_REP_MOVSB),y)
+   lib-y += copy_page_64.o
+endif
 lib-y += memmove_64.o memset_64.o
 lib-y += copy_user_64.o
lib-y += cmpxchg16b_emu.o
diff --git a/arch/x86/lib/memcpy_64.S b/arch/x86/lib/memcpy_64.S
index 92748660ba51..ab5b9662b348 100644
--- a/arch/x86/lib/memcpy_64.S
+++ b/arch/x86/lib/memcpy_64.S
@@ -17,6 +17,18 @@
 
 .weak memcpy
 
+#ifdef CONFIG_MARCH_NATIVE_REP_MOVSB
+ENTRY(__memcpy)
+ENTRY(memcpy)
+   mov %rdi, %rax
+   mov %rdx, %rcx
+   rep movsb
+   ret
+ENDPROC(memcpy)
+ENDPROC(__memcpy)
+EXPORT_SYMBOL(memcpy)
+EXPORT_SYMBOL(__memcpy)
+#else
 /*
  * memcpy - Copy a memory block.
  *
@@ -183,6 +195,7 @@ ENTRY(memcpy_orig)
 .Lend:
retq
 ENDPROC(memcpy_orig)
+#endif
 
 #ifndef CONFIG_UML
 
diff --git a/arch/x86/platform/pvh/head.S b/arch/x86/platform/pvh/head.S
index 1f8825bbaffb..2737f3e8c021 100644
--- a/arch/x86/platform/pvh/head.S
+++ b/arch/x86/platform/pvh/head.S
@@ -64,9 +64,13 @@ ENTRY(pvh_start_xen)
mov $_pa(pvh_start_info), %edi
mov %ebx, %esi
mov _pa(pvh_start_info_sz), %ecx
+#ifdef CONFIG_MARCH_NATIVE_REP_MOVSB
+   rep movsb
+#else
  

[PATCH 5/5] x86_64, -march=native: MOVBE support

2019-07-22 Thread Alexey Dobriyan
Use MOVBE if it is available.

Internally MOVBE probably translates to MOV+BSWAP anyway, but who knows.

Do it because it is easy to do...

Signed-off-by: Alexey Dobriyan 
---
 arch/x86/crypto/des3_ede-asm_64.S | 28 
 arch/x86/kernel/verify_cpu.S  |  7 +++
 scripts/kconfig/cpuid.c   |  5 +
 scripts/march-native.sh   |  1 +
 4 files changed, 41 insertions(+)

diff --git a/arch/x86/crypto/des3_ede-asm_64.S 
b/arch/x86/crypto/des3_ede-asm_64.S
index 7fca43099a5f..2fd310e98b0b 100644
--- a/arch/x86/crypto/des3_ede-asm_64.S
+++ b/arch/x86/crypto/des3_ede-asm_64.S
@@ -150,6 +150,15 @@
 
 #define dummy2(a, b) /*_*/
 
+#ifdef CONFIG_MARCH_NATIVE_MOVBE
+#define read_block(io, left, right) \
+   movbe(io), left##d; \
+   movbe   4(io), right##d;
+
+#define write_block(io, left, right) \
+   movbe   left##d,   (io); \
+   movbe   right##d, 4(io);
+#else
 #define read_block(io, left, right) \
movl(io), left##d; \
movl   4(io), right##d; \
@@ -161,6 +170,7 @@
bswapl right##d; \
movl   left##d,   (io); \
movl   right##d, 4(io);
+#endif
 
 ENTRY(des3_ede_x86_64_crypt_blk)
/* input:
@@ -434,6 +444,14 @@ ENTRY(des3_ede_x86_64_crypt_blk_3way)
pushq %rsi /* dst */
 
/* load input */
+#ifdef CONFIG_MARCH_NATIVE_MOVBE
+   movbe 0 * 4(%rdx), RL0d;
+   movbe 1 * 4(%rdx), RR0d;
+   movbe 2 * 4(%rdx), RL1d;
+   movbe 3 * 4(%rdx), RR1d;
+   movbe 4 * 4(%rdx), RL2d;
+   movbe 5 * 4(%rdx), RR2d;
+#else
movl 0 * 4(%rdx), RL0d;
movl 1 * 4(%rdx), RR0d;
movl 2 * 4(%rdx), RL1d;
@@ -447,6 +465,7 @@ ENTRY(des3_ede_x86_64_crypt_blk_3way)
bswapl RR1d;
bswapl RL2d;
bswapl RR2d;
+#endif
 
initial_permutation3(RL, RR);
 
@@ -507,6 +526,14 @@ ENTRY(des3_ede_x86_64_crypt_blk_3way)
 
final_permutation3(RR, RL);
 
+#ifdef CONFIG_MARCH_NATIVE_MOVBE
+   movbe RR0d, 0 * 4(%rsi);
+   movbe RL0d, 1 * 4(%rsi);
+   movbe RR1d, 2 * 4(%rsi);
+   movbe RL1d, 3 * 4(%rsi);
+   movbe RR2d, 4 * 4(%rsi);
+   movbe RL2d, 5 * 4(%rsi);
+#else
bswapl RR0d;
bswapl RL0d;
bswapl RR1d;
@@ -521,6 +548,7 @@ ENTRY(des3_ede_x86_64_crypt_blk_3way)
movl RL1d, 3 * 4(%rsi);
movl RR2d, 4 * 4(%rsi);
movl RL2d, 5 * 4(%rsi);
+#endif
 
popq %r15;
popq %r14;
diff --git a/arch/x86/kernel/verify_cpu.S b/arch/x86/kernel/verify_cpu.S
index d3f3370e7dab..f8ff130edfb3 100644
--- a/arch/x86/kernel/verify_cpu.S
+++ b/arch/x86/kernel/verify_cpu.S
@@ -142,6 +142,13 @@ ENTRY(verify_cpu)
jnc .Lverify_cpu_no_longmode
 #endif
 
+#ifdef CONFIG_MARCH_NATIVE_MOVBE
+   mov $1, %eax
+   cpuid
+   bt  $22, %ecx
+   jnc .Lverify_cpu_no_longmode
+#endif
+
 #if defined(CONFIG_MARCH_NATIVE_REP_MOVSB) || 
defined(CONFIG_MARCH_NATIVE_REP_STOSB)
xor %eax, %eax
cpuid
diff --git a/scripts/kconfig/cpuid.c b/scripts/kconfig/cpuid.c
index 58d09bda61e5..0da1142a59da 100644
--- a/scripts/kconfig/cpuid.c
+++ b/scripts/kconfig/cpuid.c
@@ -43,6 +43,7 @@ static inline void cpuid2(uint32_t eax0, uint32_t ecx0, 
uint32_t *eax, uint32_t
);
 }
 
+static bool movbe  = false;
 static bool popcnt = false;
 static bool rep_movsb  = false;
 static bool rep_stosb  = false;
@@ -57,6 +58,9 @@ static void intel(void)
cpuid(1, , , , );
 // printf("%08x %08x %08x %08x\n", eax, ecx, edx, ebx);
 
+   if (ecx & (1 << 22)) {
+   movbe = true;
+   }
if (ecx & (1 << 23)) {
popcnt = true;
}
@@ -89,6 +93,7 @@ int main(int argc, char *argv[])
}
 
 #define _(x)   if (streq(opt, #x)) return x ? EXIT_SUCCESS : EXIT_FAILURE
+   _(movbe);
_(popcnt);
_(rep_movsb);
_(rep_stosb);
diff --git a/scripts/march-native.sh b/scripts/march-native.sh
index a41a15a64df4..530bac22fa07 100755
--- a/scripts/march-native.sh
+++ b/scripts/march-native.sh
@@ -41,6 +41,7 @@ COLLECT_GCC_OPTIONS=$(
 )
 echo "-march=native: $COLLECT_GCC_OPTIONS"
 
+"$CPUID" movbe && option "CONFIG_MARCH_NATIVE_MOVBE"
 "$CPUID" popcnt&& option "CONFIG_MARCH_NATIVE_POPCNT"
 "$CPUID" rep_movsb && option "CONFIG_MARCH_NATIVE_REP_MOVSB"
 "$CPUID" rep_stosb && option "CONFIG_MARCH_NATIVE_REP_STOSB"
-- 
2.21.0



[PATCH 4/5] x86_64, -march=native: REP STOSB support

2019-07-22 Thread Alexey Dobriyan
Use REP STOSB everywhere if CPU advertises fast REP STOSB.

Gcc LOVES to unroll memset(), using -mmemset-strategy saves terabytes of
.text.

Signed-off-by: Alexey Dobriyan 
---
 Makefile   |  3 +++
 arch/x86/boot/compressed/head_64.S |  4 
 arch/x86/crypto/sha1_ssse3_asm.S   |  7 ++-
 arch/x86/include/asm/page_64.h | 13 +
 arch/x86/kernel/verify_cpu.S   |  2 +-
 arch/x86/lib/Makefile  |  2 ++
 arch/x86/lib/memset_64.S   | 15 +++
 arch/x86/lib/usercopy_64.c | 16 +++-
 scripts/kconfig/cpuid.c|  6 +-
 scripts/march-native.sh|  1 +
 10 files changed, 65 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index aa194c96d27c..31a6375d0e31 100644
--- a/Makefile
+++ b/Makefile
@@ -612,6 +612,9 @@ endif
 ifdef CONFIG_MARCH_NATIVE_REP_MOVSB
 KBUILD_CFLAGS += -mmemcpy-strategy=rep_byte:-1:align,rep_byte:-1:noalign
 endif
+ifdef CONFIG_MARCH_NATIVE_REP_STOSB
+KBUILD_CFLAGS += -mmemset-strategy=rep_byte:-1:align,rep_byte:-1:noalign
+endif
 
 ifeq ($(KBUILD_EXTMOD),)
 # Objects we will link into vmlinux / subdirs we need to visit
diff --git a/arch/x86/boot/compressed/head_64.S 
b/arch/x86/boot/compressed/head_64.S
index 6233ae35d0d9..a350d265e8af 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -520,8 +520,12 @@ relocated:
leaq_bss(%rip), %rdi
leaq_ebss(%rip), %rcx
subq%rdi, %rcx
+#ifdef CONFIG_MARCH_NATIVE_REP_STOSB
+   rep stosb
+#else
shrq$3, %rcx
rep stosq
+#endif
 
 /*
  * Do the extraction, and jump to the new kernel..
diff --git a/arch/x86/crypto/sha1_ssse3_asm.S b/arch/x86/crypto/sha1_ssse3_asm.S
index 99c5b8c4dc38..c98f8f2aead6 100644
--- a/arch/x86/crypto/sha1_ssse3_asm.S
+++ b/arch/x86/crypto/sha1_ssse3_asm.S
@@ -90,10 +90,15 @@
SHA1_PIPELINED_MAIN_BODY
 
# cleanup workspace
-   mov $8, %ecx
mov %rsp, %rdi
xor %eax, %eax
+#ifdef CONFIG_MARCH_NATIVE_REP_STOSB
+   mov $64, %ecx
+   rep stosb
+#else
+   mov $8, %ecx
rep stosq
+#endif
 
mov %rbp, %rsp  # deallocate workspace
pop %rbp
diff --git a/arch/x86/include/asm/page_64.h b/arch/x86/include/asm/page_64.h
index 051da768273d..7654d5544e0b 100644
--- a/arch/x86/include/asm/page_64.h
+++ b/arch/x86/include/asm/page_64.h
@@ -40,6 +40,18 @@ extern unsigned long __phys_addr_symbol(unsigned long);
 #define pfn_valid(pfn)  ((pfn) < max_pfn)
 #endif
 
+#ifdef CONFIG_MARCH_NATIVE_REP_STOSB
+static __always_inline void clear_page(void *page)
+{
+   uint32_t len = PAGE_SIZE;
+   asm volatile (
+   "rep stosb"
+   : "+D" (page), "+c" (len)
+   : "a" (0)
+   : "memory"
+   );
+}
+#else
 void clear_page_orig(void *page);
 void clear_page_rep(void *page);
 void clear_page_erms(void *page);
@@ -53,6 +65,7 @@ static inline void clear_page(void *page)
   "0" (page)
   : "cc", "memory", "rax", "rcx");
 }
+#endif
 
 #ifdef CONFIG_MARCH_NATIVE_REP_MOVSB
 static __always_inline void copy_page(void *to, void *from)
diff --git a/arch/x86/kernel/verify_cpu.S b/arch/x86/kernel/verify_cpu.S
index 57b41dafc592..d3f3370e7dab 100644
--- a/arch/x86/kernel/verify_cpu.S
+++ b/arch/x86/kernel/verify_cpu.S
@@ -142,7 +142,7 @@ ENTRY(verify_cpu)
jnc .Lverify_cpu_no_longmode
 #endif
 
-#ifdef CONFIG_MARCH_NATIVE_REP_MOVSB
+#if defined(CONFIG_MARCH_NATIVE_REP_MOVSB) || 
defined(CONFIG_MARCH_NATIVE_REP_STOSB)
xor %eax, %eax
cpuid
cmp $7, %eax
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index fa24cc717fb1..ed71e88cb859 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -59,7 +59,9 @@ endif
 else
 obj-y += iomap_copy_64.o
 lib-y += csum-partial_64.o csum-copy_64.o csum-wrappers_64.o
+ifneq ($(CONFIG_MARCH_NATIVE_REP_STOSB),y)
 lib-y += clear_page_64.o
+endif
 ifneq ($(CONFIG_MARCH_NATIVE_REP_MOVSB),y)
lib-y += copy_page_64.o
 endif
diff --git a/arch/x86/lib/memset_64.S b/arch/x86/lib/memset_64.S
index 9bc861c71e75..7786d1a65423 100644
--- a/arch/x86/lib/memset_64.S
+++ b/arch/x86/lib/memset_64.S
@@ -8,6 +8,20 @@
 
 .weak memset
 
+#ifdef CONFIG_MARCH_NATIVE_REP_STOSB
+ENTRY(memset)
+ENTRY(__memset)
+   mov %esi, %eax
+   mov %rdi, %rsi
+   mov %rdx, %rcx
+   rep stosb
+   mov %rsi, %rax
+   ret
+ENDPROC(memset)
+ENDPROC(__memset)
+EXPORT_SYMBOL(memset)
+EXPORT_SYMBOL(__memset)
+#else
 /*
  * ISO C memset - set a memory block to a byte value. This function uses fast
  * string to get better performance than the original function. The code is
@@ -140,3 +154,4 @@ ENTRY(memset_orig)
jmp .Lafter_bad_alignment
 .Lfinal:
 ENDPROC(memset_orig)
+#endif
diff --git 

Re: [PATCH] iio: potentiometer: add a driver for Maxim 5432-5435

2019-07-22 Thread kbuild test robot
Hi Martin,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[also build test WARNING on v5.3-rc1 next-20190722]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Martin-Kaiser/iio-potentiometer-add-a-driver-for-Maxim-5432-5435/20190723-024214
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gcc (GCC) 7.4.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.4.0 make.cross ARCH=arm64 

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot 

All warnings (new ones prefixed by >>):

   drivers/iio/potentiometer/max5432.c: In function 'max5432_probe':
>> drivers/iio/potentiometer/max5432.c:99:14: warning: cast from pointer to 
>> integer of different size [-Wpointer-to-int-cast]
 data->ohm = (u32)of_device_get_match_data(dev);
 ^

vim +99 drivers/iio/potentiometer/max5432.c

83  
84  static int max5432_probe(
85  struct i2c_client *client, const struct i2c_device_id 
*id)
86  {
87  struct device *dev = >dev;
88  struct iio_dev *indio_dev;
89  struct max5432_data *data;
90  
91  indio_dev = devm_iio_device_alloc(dev, sizeof(struct 
max5432_data));
92  if (!indio_dev)
93  return -ENOMEM;
94  
95  i2c_set_clientdata(client, indio_dev);
96  
97  data = iio_priv(indio_dev);
98  data->client = client;
  > 99  data->ohm = (u32)of_device_get_match_data(dev);
   100  
   101  indio_dev->dev.parent = dev;
   102  indio_dev->info = _info;
   103  indio_dev->channels = max5432_channels;
   104  indio_dev->num_channels = ARRAY_SIZE(max5432_channels);
   105  indio_dev->name = client->name;
   106  
   107  return devm_iio_device_register(dev, indio_dev);
   108  }
   109  

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip


Re: [PATCH] leds: ktd2692: Fix a typo in the name of a constant

2019-07-22 Thread Jacek Anaszewski
Hi Christophe,

Thank you for the patch.

On 7/21/19 11:05 PM, Christophe JAILLET wrote:
> There is a typo in KTD2962_MM_MIN_CURR_THRESHOLD_SCALE. 6 and 9 are
> switched in 2962.
> 
> Define and use KTD2692_MM_MIN_CURR_THRESHOLD_SCALE instead.
> 
> Signed-off-by: Christophe JAILLET 
> ---
>  drivers/leds/leds-ktd2692.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/leds/leds-ktd2692.c b/drivers/leds/leds-ktd2692.c
> index 45296aaca9da..44db748c570e 100644
> --- a/drivers/leds/leds-ktd2692.c
> +++ b/drivers/leds/leds-ktd2692.c
> @@ -22,7 +22,7 @@
>  /* Value related the movie mode */
>  #define KTD2692_MOVIE_MODE_CURRENT_LEVELS16
>  #define KTD2692_MM_TO_FL_RATIO(x)((x) / 3)
> -#define KTD2962_MM_MIN_CURR_THRESHOLD_SCALE  8
> +#define KTD2692_MM_MIN_CURR_THRESHOLD_SCALE  8
>  
>  /* Value related the flash mode */
>  #define KTD2692_FLASH_MODE_TIMEOUT_LEVELS8
> @@ -253,7 +253,7 @@ static void ktd2692_setup(struct ktd2692_context *led)
>   ktd2692_expresswire_reset(led);
>   gpiod_direction_output(led->aux_gpio, KTD2692_LOW);
>  
> - ktd2692_expresswire_write(led, (KTD2962_MM_MIN_CURR_THRESHOLD_SCALE - 1)
> + ktd2692_expresswire_write(led, (KTD2692_MM_MIN_CURR_THRESHOLD_SCALE - 1)
>| KTD2692_REG_MM_MIN_CURR_THRESHOLD_BASE);
>   ktd2692_expresswire_write(led, KTD2692_FLASH_MODE_CURR_PERCENT(45)
>| KTD2692_REG_FLASH_CURRENT_BASE);
> 

Applied.

-- 
Best regards,
Jacek Anaszewski


Re: [PATCH 1/6] ARM: ks8695: watchdog: stop using mach/*.h

2019-07-22 Thread Olof Johansson
On Mon, Jul 22, 2019 at 7:44 AM Arnd Bergmann  wrote:
>
> On Sat, May 4, 2019 at 4:27 PM Greg Ungerer  wrote:
> > On 4/5/19 3:06 am, Guenter Roeck wrote:
> > > On Fri, May 03, 2019 at 08:16:05AM +0100, Linus Walleij wrote:
> > >> On Fri, May 3, 2019 at 8:02 AM Greg Ungerer  wrote:
> > >>> Ultimately though I am left wondering if the ks8695 support in the
> > >>> kernel is useful to anyone the way it is at the moment. With a minimal
> > >>> kernel configuration I can boot up to a shell - but the system is
> > >>> really unreliable if you try to interactively use it. I don't think
> > >>> it is the hardware - it seems to run reliably with the old code
> > >>> it has running from flash on it. I am only testing the new kernel,
> > >>> running with the existing user space root filesystem on it (which
> > >>> dates from 2004 :-)
> > >>
> > >> Personally I think it is a bad sign that this subarch and boards do
> > >> not have active OpenWrt support, they are routers after all (right?)
> > >> and any active use of networking equipment should use a recent
> > >> userspace as well, given all the security bugs that popped up over
> > >> the years.
>
> Looking around on the internet, I found that Micrel at some point
> had their own openwrt fork for ks8695, but I can't find a copy
> any more, as the micrel.com domain is no longer used after the
> acquisition by Microchip.
>
> https://wikidevi.com/wiki/Micrel has a list of devices based on
> ks8695, and it seems that most of these are rather memory
> limited, which is a problem for recent openwrt builds.
>
> Only two of the 17 listed devices have the absolute minimum of 4MB
> flash and 32MB RAM for openwrt, two more have 8/32 and one
> or two have 4/64, but all these configurations are too limited for the
> web U/I now.
>
> > >> With IXP4xx, Gemini and EP93xx we have found active users and
> > >> companies selling the chips and reference designs and even
> > >> recommending it for new products (!) at times.  If this is not the
> > >> case with KS8695 and no hobbyists are willing to submit it
> > >> to OpenWrt and modernize it to use device tree I think it should be
> > >> deleted from the kernel.
> > >>
> > >
> > > That may be the best approach if indeed no one is using it,
> > > much less maintaining it.
> >
> > Well, I for one don't really use it any more. So I don't have a lot
> > of motivation to maintain it any longer.
>
> I came across my patches while rebasing my backlog to 5.3-rc1.
>
> Should I save the (very small) trouble of sending them out again
> and just remove the platform then?

Given the lack of response/interest from users, I'm OK with removing it.

If someone shows up wanting support, we'll have a good opportunity to
discuss testing/modernization involving someone actively using the
hardware.


-Olof


Re: [PATCH] leds: an30259a: Fix typo

2019-07-22 Thread Jacek Anaszewski
Hi Christophe,

Thank you for the patch.

On 7/21/19 10:59 PM, Christophe JAILLET wrote:
> All this file is about an30259a, including the reference to the datasheet
> at the top of the file.
> 
> So change the 2 places where an32059a is used instead.
> 
> Signed-off-by: Christophe JAILLET 
> ---
> an32059a is another chip from panasonic
> ---
>  drivers/leds/leds-an30259a.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/leds/leds-an30259a.c b/drivers/leds/leds-an30259a.c
> index 1c1f0c8c56f4..37e7c7998972 100644
> --- a/drivers/leds/leds-an30259a.c
> +++ b/drivers/leds/leds-an30259a.c
> @@ -353,7 +353,7 @@ MODULE_DEVICE_TABLE(i2c, an30259a_id);
>  
>  static struct i2c_driver an30259a_driver = {
>   .driver = {
> - .name = "leds-an32059a",
> + .name = "leds-an30259a",
>   .of_match_table = of_match_ptr(an30259a_match_table),
>   },
>   .probe_new = an30259a_probe,
> @@ -364,5 +364,5 @@ static struct i2c_driver an30259a_driver = {
>  module_i2c_driver(an30259a_driver);
>  
>  MODULE_AUTHOR("Simon Shields ");
> -MODULE_DESCRIPTION("AN32059A LED driver");
> +MODULE_DESCRIPTION("AN30259A LED driver");
>  MODULE_LICENSE("GPL v2");
> 

Applied.

-- 
Best regards,
Jacek Anaszewski


Re: [PATCH 01/12] list.h: add list_pop and list_pop_entry helpers

2019-07-22 Thread Matthew Wilcox
On Mon, Jul 22, 2019 at 11:50:13AM +0200, Christoph Hellwig wrote:
> We have a very common pattern where we want to delete the first entry
> from a list and return it as the properly typed container structure.
> 
> Add two helpers to implement this behavior.
> 
> Signed-off-by: Christoph Hellwig 

Reviewed-by: Matthew Wilcox (Oracle) 



Re: leds: apu: drop obsolete support for apu>=2

2019-07-22 Thread Jacek Anaszewski
Hi Enrico,

Thank you for the patch set.

On 7/15/19 4:57 PM, Enrico Weigelt, metux IT consult wrote:
> Hi folks,
> 
> 
> the legacy apu LEDs driver has been superseded by the more complete
> pcengines-apu2 platform driver, for APU >= 2. It only supports
> the three front LEDs, but lacks all the other GPIOs (eg. button
> or simsw), and conflicts with the pcengines-apu2 driver.
> 
> Old APUv1 has a very different chipset.
> 
> Therefore I propose dropping the apu>=2 support from the legacy
> driver, reducing it to only the old (obsolete) APUv1 boards.


Patch set applied along with the update for the patch 5/6.

-- 
Best regards,
Jacek Anaszewski


Re: lift the xfs writepage code into iomap v3

2019-07-22 Thread Andreas Gruenbacher
Hi Christoph,

On Mon, 22 Jul 2019 at 11:50, Christoph Hellwig  wrote:
> this series cleans up the xfs writepage code and then lifts it to
> fs/iomap.c so that it could be use by other file system.  I've been
> wanting to this for a while so that I could eventually convert gfs2
> over to it, but I never got to it.  Now Damien has a new zonefs
> file system for semi-raw access to zoned block devices that would
> like to use the iomap code instead of reinventing it, so I finally
> had to do the work.
>
>
> Changes since v2:
>  - rebased to v5.3-rc1
>  - folded in a few changes from the gfs2 enablement series

thanks for the much appreciated update.

I've added that and the remaining gfs2 iomap patches to this branch:

  git://git.kernel.org/pub/scm/linux/kernel/git/gfs2/linux-gfs2.git iomap

Your final patch on this branch, "gfs2: use iomap for buffered I/O in
ordered and writeback mode", still causes the following four xfstest
failures:

  generic/311 generic/322 generic/393 generic/418

The bug in generic/393 is that in the nobh case, when unstuffing an
inode, we fail to dirty the unstuffed page and so the page is never
written. This should be easy to fix. The other failures have other
causes (still investigating).

> Changes since v1:
>  - rebased to the latest xfs for-next tree
>  - keep the preallocated transactions for size updates
>  - rename list_pop to list_pop_entry and related cleanups
>  - better document the nofs context handling
>  - document that the iomap tracepoints are not a stable API

Thanks,
Andreas


Re: [PATCH 2/3] macb: Update compatibility string for SiFive FU540-C000

2019-07-22 Thread Paul Walmsley
On Fri, 19 Jul 2019, Yash Shah wrote:

> Update the compatibility string for SiFive FU540-C000 as per the new
> string updated in the binding doc.
> Reference: https://lkml.org/lkml/2019/7/17/200
> 
> Signed-off-by: Yash Shah 

Reviewed-by: Paul Walmsley 

- Paul


Re: [PATCH] sched/cputime: make scale_stime() more precise

2019-07-22 Thread Peter Zijlstra
On Mon, Jul 22, 2019 at 12:52:41PM +0200, Stanislaw Gruszka wrote:
> On Fri, Jul 19, 2019 at 01:03:49PM +0200, Peter Zijlstra wrote:
> > > shows the problem even when sum_exec_runtime is not that big: 30 secs.
> > > 
> > > The new implementation of scale_stime() does the additional 
> > > div64_u64_rem()
> > > in a loop but see the comment, as long it is used by cputime_adjust() this
> > > can happen only once.
> > 
> > That only shows something after long long staring :/ There's no words on
> > what the output actually means or what would've been expected.
> > 
> > Also, your example is incomplete; the below is a test for scale_stime();
> > from this we can see that the division results in too large a number,
> > but, important for our use-case in cputime_adjust(), it is a step
> > function (due to loss in precision) and for every plateau we shift
> > runtime into the wrong bucket.
> > 
> > Your proposed function works; but is atrocious, esp. on 32bit. That
> > said, before we 'fixed' it, it had similar horrible divisions in, see
> > commit 55eaa7c1f511 ("sched: Avoid cputime scaling overflow").
> > 
> > Included below is also an x86_64 implementation in 2 instructions.
> > 
> > I'm still trying see if there's anything saner we can do...
> 
> I was always proponent of removing scaling and export raw values
> and sum_exec_runtime. But that has obvious drawback, reintroduce
> 'top hiding' issue.

I think (but didn't grep) that we actually export sum_exec_runtime in
/proc/ *somewhere*.

> But maybe we can export raw values in separate file i.e.
> /proc/[pid]/raw_cpu_times ? So applications that require more precise
> cputime values for very long-living processes can use this file.

There are no raw cpu_times, there are system and user samples, and
samples are, by their very nature, an approximation. We just happen to
track the samples in TICK_NSEC resolution these days, but they're still
ticks (except on s390 and maybe other archs, which do time accounting in
the syscall path).

But I think you'll find x86 people are quite opposed to doing TSC reads
in syscall entry and exit :-)



Re: [PATCH 1/3] macb: bindings doc: update sifive fu540-c000 binding

2019-07-22 Thread Paul Walmsley
On Fri, 19 Jul 2019, Yash Shah wrote:

> As per the discussion with Nicolas Ferre, rename the compatible property
> to a more appropriate and specific string.
> LINK: https://lkml.org/lkml/2019/7/17/200
> 
> Signed-off-by: Yash Shah 

Reviewed-by: Paul Walmsley 

- Paul


[GIT PULL] Wimplicit-fallthrough patches for 5.3-rc2

2019-07-22 Thread Gustavo A. R. Silva
The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b:

  Linus 5.3-rc1 (2019-07-21 14:05:38 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git 
tags/Wimplicit-fallthrough-5.3-rc2

for you to fetch changes up to bc512fd704a92e1be700c941c137d73c0f222eed:

  Makefile: Globally enable fall-through warning (2019-07-22 14:50:20 -0500)


Wimplicit-fallthrough patches for 5.3-rc2

Hi Linus,

Please, pull the following patches that mark switch cases where we are
expecting to fall through. These patches are part of the ongoing efforts
to enable -Wimplicit-fallthrough. Most of them have been baking in linux-next
for a whole development cycle.

Also, pull the Makefile patch that globally enables the
-Wimplicit-fallthrough option.

Finally, some missing-break fixes that have been tagged for -stable:

 - drm/amdkfd: Fix missing break in switch statement
 - drm/amdgpu/gfx10: Fix missing break in switch statement

Notice that with these changes, we completely get rid of all the
fall-through warnings in the kernel.

Thanks

Signed-off-by: Gustavo A. R. Silva 


Gustavo A. R. Silva (11):
  firewire: mark expected switch fall-throughs
  can: mark expected switch fall-throughs
  afs: yfsclient: Mark expected switch fall-throughs
  afs: fsclient: Mark expected switch fall-throughs
  mtd: onenand_base: Mark expected switch fall-through
  perf/x86/intel: Mark expected switch fall-throughs
  drm/amdkfd: Fix missing break in switch statement
  drm/amdgpu/gfx10: Fix missing break in switch statement
  drm/amdkfd/kfd_mqd_manager_v10: Avoid fall-through warning
  drm/i915: Mark expected switch fall-throughs
  Makefile: Globally enable fall-through warning

 Documentation/process/deprecated.rst | 14 ++
 Makefile |  3 ++
 arch/x86/events/intel/core.c |  2 +
 drivers/firewire/core-device.c   |  2 +-
 drivers/firewire/core-iso.c  |  2 +-
 drivers/firewire/core-topology.c |  1 +
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c   |  1 +
 drivers/gpu/drm/amd/amdkfd/kfd_crat.c|  1 +
 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c |  1 -
 drivers/gpu/drm/i915/Makefile|  1 -
 drivers/gpu/drm/i915/display/intel_display.c |  2 +-
 drivers/gpu/drm/i915/display/intel_dp.c  |  1 +
 drivers/gpu/drm/i915/gem/i915_gem_mman.c |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_pages.c|  2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c|  1 +
 drivers/mtd/nand/onenand/onenand_base.c  |  1 +
 drivers/net/can/at91_can.c   |  6 ++-
 drivers/net/can/peak_canfd/peak_pciefd_main.c|  2 +-
 drivers/net/can/spi/mcp251x.c|  3 +-
 drivers/net/can/usb/peak_usb/pcan_usb.c  |  2 +-
 fs/afs/fsclient.c| 51 ++
 fs/afs/yfsclient.c   | 54 +++-
 22 files changed, 106 insertions(+), 49 deletions(-)


Re: [PATCH] sched/cputime: make scale_stime() more precise

2019-07-22 Thread Peter Zijlstra
On Fri, Jul 19, 2019 at 04:37:42PM +0200, Oleg Nesterov wrote:
> On 07/19, Peter Zijlstra wrote:

> > But I'm still confused, since in the long run, it should still end up
> > with a proportionally divided user/system, irrespective of some short
> > term wobblies.
> 
> Why?
> 
> Yes, statistically the numbers are proportionally divided.

This; due to the loss in precision the distribution is like a step
function around the actual s:u ratio line, but on average it still is
s:u.

Even if it were a perfect function, we'd still see increments in stime even
if the current program state never does syscalls, simply because it
needs to stay on that s:u line.

> but you will (probably) never see the real stime == 1000 && utime == 1
> numbers if you watch incrementally.

See, there are no 'real' stime and utime numbers. What we have are user
and system samples -- tick based.

If the tick lands in the kernel, we get a system sample, if the tick
lands in userspace we get a user sample.

What we do have is an accurate (ns) based runtime accounting, and we
(re)construct stime and utime from this; we divide the total known
runtime in stime and utime pro-rata.

Sure, we take a shortcut, it wobbles a bit, but seriously, the samples
are inaccurate anyway, so who bloody cares :-)

You can construct a program that runs 99% in userspace but has all
system samples. All you need to do is make sure you're in a system call
when the tick lands.

> Just in case... yes I know that these numbers can only "converge" to the
> reality, only their sum is correct. But people complain.

People always complain, just tell em to go pound sand :-)



[PATCH 4/5] power/reset: Add a restart driver for UART-based PM MCUs

2019-07-22 Thread Evgeny Kolesnikov
This adds the restart driver for power managing
micro controller units that are connected to a board
via the UART interface.

Signed-off-by: Evgeny Kolesnikov 
---
 drivers/power/reset/Kconfig|   7 +
 drivers/power/reset/Makefile   |   1 +
 drivers/power/reset/uart-restart.c | 204 +
 3 files changed, 212 insertions(+)
 create mode 100644 drivers/power/reset/uart-restart.c

diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 02fdf45e3988..4b187af1fba6 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -223,6 +223,13 @@ config POWER_RESET_UART_POWEROFF
  Power off support for boards with UART-based PM MCU
  such as WD My Cloud NAS, QNAP Turbo NAS, Synology devices.
 
+config POWER_RESET_UART
+   tristate "UART-based PM MCU restart driver"
+   depends on OF_GPIO
+   help
+ Reboot support for boards with UART-based PM MCU
+ such as WD My Cloud NAS, QNAP Turbo NAS, Synology devices.
+
 config POWER_RESET_ZX
tristate "ZTE SoCs reset driver"
depends on ARCH_ZX || COMPILE_TEST
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index efe8f25f463d..fa8a936d7a1a 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_POWER_RESET_SYSCON) += syscon-reboot.o
 obj-$(CONFIG_POWER_RESET_SYSCON_POWEROFF) += syscon-poweroff.o
 obj-$(CONFIG_POWER_RESET_RMOBILE) += rmobile-reset.o
 obj-$(CONFIG_POWER_RESET_UART_POWEROFF) += uart-poweroff.o
+obj-$(CONFIG_POWER_RESET_UART) += uart-restart.o
 obj-$(CONFIG_POWER_RESET_ZX) += zx-reboot.o
 obj-$(CONFIG_REBOOT_MODE) += reboot-mode.o
 obj-$(CONFIG_SYSCON_REBOOT_MODE) += syscon-reboot-mode.o
diff --git a/drivers/power/reset/uart-restart.c 
b/drivers/power/reset/uart-restart.c
new file mode 100644
index ..be4dcbbb826e
--- /dev/null
+++ b/drivers/power/reset/uart-restart.c
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Restart for boards with UART-based PM MCUs
+ * such as WD My Cloud NAS, QNAP Turbo NAS, Synology devices.
+ *
+ * Copyright (C) 2019 Evgeny Kolesnikov 
+ *
+ * Based on the code from:
+ *
+ * Copyright (C) 2016 Martin Mueller 
+ * Copyright (C) 2012 Andrew Lunn 
+ * Copyright (C) 2009 Martin Michlmayr 
+ * Copyright (C) 2008 Byron Bradley 
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#ifdef CONFIG_ARM
+#include 
+#endif
+
+#define UART_REG(b, x) (b + ((UART_##x) << 2))
+
+
+struct uart_restart {
+   struct notifier_block restart_handler;
+   const u8 *cmd;
+   int cmd_len;
+   void __iomem *base;
+   unsigned int divisor;
+   u32 byte_delay_ms;
+   u32 timeout_ms;
+   void *pm_restart_org;
+};
+
+static int uart_restart_notify(struct notifier_block *this,
+   unsigned long mode, void *cmd)
+{
+   struct uart_restart *uart_restart =
+   container_of(this, struct uart_restart, restart_handler);
+   int i;
+
+   /* Hijack UART and reset into sane state */
+   writel(0x83, UART_REG(uart_restart->base, LCR));
+   writel(uart_restart->divisor & 0xFF, UART_REG(uart_restart->base, DLL));
+   writel((uart_restart->divisor >> 8) & 0xFF, 
UART_REG(uart_restart->base, DLM));
+   writel(0x03, UART_REG(uart_restart->base, LCR));
+   writel(0x00, UART_REG(uart_restart->base, IER));
+   writel(0x00, UART_REG(uart_restart->base, FCR));
+   writel(0x00, UART_REG(uart_restart->base, MCR));
+
+   /* Send the command */
+   for (i = 0; i < uart_restart->cmd_len; i++) {
+   writel(uart_restart->cmd[i], UART_REG(uart_restart->base, TX));
+   mdelay(uart_restart->byte_delay_ms);
+   }
+   mdelay(uart_restart->timeout_ms);
+   WARN_ON(1);
+
+   return NOTIFY_DONE;
+}
+
+static int uart_restart_probe(struct platform_device *pdev)
+{
+   struct uart_restart *uart_restart;
+   struct resource *res;
+   void __iomem *base;
+   struct clk *clk;
+   u32 baud;
+   bool override;
+   int err;
+
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   if (!res) {
+   dev_err(>dev, "Missing resource\n");
+   return -EINVAL;
+   }
+
+   base = devm_ioremap(>dev, res->start, resource_size(res));
+   if (!base) {
+   dev_err(>dev, "Unable to map resource\n");
+   return -EINVAL;
+   }
+
+   /* We need to know tclk in order to calculate the UART divisor */
+   clk = devm_clk_get(>dev, NULL);
+   if (IS_ERR(clk)) {
+   dev_err(>dev, "Clk missing\n");
+   return PTR_ERR(clk);
+   }
+
+   uart_restart = devm_kzalloc(>dev, sizeof(*uart_restart),
+   GFP_KERNEL);
+   if (!uart_restart)
+   return -ENOMEM;
+
+   uart_restart->cmd = 

[PATCH 3/5] power/reset: Add a power off driver for UART-based PM MCUs

2019-07-22 Thread Evgeny Kolesnikov
This adds the poweroff driver for power managing
micro controller units that are connected to a board
via the UART interface.

Signed-off-by: Evgeny Kolesnikov 
---
 drivers/power/reset/Kconfig |   7 ++
 drivers/power/reset/Makefile|   1 +
 drivers/power/reset/uart-poweroff.c | 155 
 3 files changed, 163 insertions(+)
 create mode 100644 drivers/power/reset/uart-poweroff.c

diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index a564237278ff..02fdf45e3988 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -216,6 +216,13 @@ config POWER_RESET_RMOBILE
help
  Reboot support for Renesas R-Mobile and SH-Mobile SoCs.
 
+config POWER_RESET_UART_POWEROFF
+   tristate "UART-based PM MCU power off driver"
+   depends on OF_GPIO
+   help
+ Power off support for boards with UART-based PM MCU
+ such as WD My Cloud NAS, QNAP Turbo NAS, Synology devices.
+
 config POWER_RESET_ZX
tristate "ZTE SoCs reset driver"
depends on ARCH_ZX || COMPILE_TEST
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 85da3198e4e0..efe8f25f463d 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_POWER_RESET_KEYSTONE) += keystone-reset.o
 obj-$(CONFIG_POWER_RESET_SYSCON) += syscon-reboot.o
 obj-$(CONFIG_POWER_RESET_SYSCON_POWEROFF) += syscon-poweroff.o
 obj-$(CONFIG_POWER_RESET_RMOBILE) += rmobile-reset.o
+obj-$(CONFIG_POWER_RESET_UART_POWEROFF) += uart-poweroff.o
 obj-$(CONFIG_POWER_RESET_ZX) += zx-reboot.o
 obj-$(CONFIG_REBOOT_MODE) += reboot-mode.o
 obj-$(CONFIG_SYSCON_REBOOT_MODE) += syscon-reboot-mode.o
diff --git a/drivers/power/reset/uart-poweroff.c 
b/drivers/power/reset/uart-poweroff.c
new file mode 100644
index ..8122a6b306d7
--- /dev/null
+++ b/drivers/power/reset/uart-poweroff.c
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Power off for boards with UART-based PM MCUs
+ * such as WD My Cloud NAS, QNAP Turbo NAS, Synology devices.
+ *
+ * Copyright (C) 2019 Evgeny Kolesnikov 
+ *
+ * Based on the code from:
+ *
+ * Copyright (C) 2016 Martin Mueller 
+ * Copyright (C) 2012 Andrew Lunn 
+ * Copyright (C) 2009 Martin Michlmayr 
+ * Copyright (C) 2008 Byron Bradley 
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define UART_REG(b, x) (b + ((UART_##x) << 2))
+
+struct uart_poweroff {
+   const u8 *cmd;
+   int cmd_len;
+   void __iomem *base;
+   unsigned int divisor;
+   u32 byte_delay_ms;
+   u32 timeout_ms;
+};
+
+static void *pm_power_off_org;
+static struct uart_poweroff uart_poweroff;
+
+static void uart_power_off(void)
+{
+   int i;
+
+   /* Hijack UART and reset into sane state */
+   writel(0x83, UART_REG(uart_poweroff.base, LCR));
+   writel(uart_poweroff.divisor & 0xFF, UART_REG(uart_poweroff.base, DLL));
+   writel((uart_poweroff.divisor >> 8) & 0xFF, 
UART_REG(uart_poweroff.base, DLM));
+   writel(0x03, UART_REG(uart_poweroff.base, LCR));
+   writel(0x00, UART_REG(uart_poweroff.base, IER));
+   writel(0x00, UART_REG(uart_poweroff.base, FCR));
+   writel(0x00, UART_REG(uart_poweroff.base, MCR));
+
+   /* Send the command */
+   for (i = 0; i < uart_poweroff.cmd_len; i++) {
+   writel(uart_poweroff.cmd[i], UART_REG(uart_poweroff.base, TX));
+   mdelay(uart_poweroff.byte_delay_ms);
+   }
+
+   mdelay(uart_poweroff.timeout_ms);
+   WARN_ON(1);
+}
+
+static int uart_poweroff_probe(struct platform_device *pdev)
+{
+   struct resource *res;
+   static void __iomem *base;
+   struct clk *clk;
+   u32 baud;
+   bool override;
+   char symname[KSYM_NAME_LEN];
+
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   if (!res) {
+   dev_err(>dev, "Missing resource\n");
+   return -EINVAL;
+   }
+
+   base = devm_ioremap(>dev, res->start, resource_size(res));
+   if (!base) {
+   dev_err(>dev, "Unable to map resource\n");
+   return -EINVAL;
+   }
+
+   /* We need to know tclk in order to calculate the UART divisor */
+   clk = devm_clk_get(>dev, NULL);
+   if (IS_ERR(clk)) {
+   dev_err(>dev, "Clk missing\n");
+   return PTR_ERR(clk);
+   }
+
+   uart_poweroff.cmd = of_get_property(pdev->dev.of_node, "cmd",
+   _poweroff.cmd_len);
+   if (uart_poweroff.cmd == NULL || uart_poweroff.cmd_len < 1) {
+   dev_err(>dev, "Cmd is missing or empty\n");
+   return -EINVAL;
+   }
+
+   of_property_read_u32(pdev->dev.of_node, "baud", );
+   if (baud < 75 || baud > 460800) {
+   dev_err(>dev, "Baud rate is missing or invalid\n");
+   return -EINVAL;
+   }
+
+   

[PATCH 2/5] power: reset: Add UART-based MCU restart DT bindings

2019-07-22 Thread Evgeny Kolesnikov
This adds device tree bindings of the restart driver
for power managing micro controller units that are connected
to a board via the UART interface.

Signed-off-by: Evgeny Kolesnikov 
---
 .../bindings/power/reset/uart-restart.txt | 39 +++
 1 file changed, 39 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/power/reset/uart-restart.txt

diff --git a/Documentation/devicetree/bindings/power/reset/uart-restart.txt 
b/Documentation/devicetree/bindings/power/reset/uart-restart.txt
new file mode 100644
index ..bf831d9bdff8
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/reset/uart-restart.txt
@@ -0,0 +1,39 @@
+* UART-based PM MCU restart driver
+
+Some devices have a microcontroller controlling the main power
+supply. This microcontroller is connected to UART of the SoC.
+Sending a sequence of characters tells the MCU to reset the SoC
+and/or MCU itself.
+
+The length of the sequence, baud rate and the timeout to process
+the command may vary from device to device.
+
+This driver could be used for WD My Cloud (Marvell SoCs), QNAP
+(Kirkwood and Orion5x SoCs) and Synology NAS devices.
+
+Required properties:
+- compatible: Should be "uart-restart"
+- reg: Address and length of the register set for UART
+- clocks: The tclk clock
+- cmd: Array of bytes, the command to send to the MCU
+- baud: Baud rate [75..460800]
+
+Optional properties:
+- byte-delay: A delay after each byte of a command, could be useful
+  for sloppy MCUs [ms], default value is 5
+- timeout: A timeout to wait for the MCU to process the command [ms],
+   default value is 1000
+- override: Boolean flag that indicates if the driver should
+prioritize itself over any existing restart driver,
+default behaviour is not to interfere
+
+Example:
+   restart@12100 {
+   compatible = "uart-restart";
+   reg = <0x12100 0x100>;
+   clocks = < 0>;
+   baud = <19200>;
+   cmd = [fa 03 03 02 00 00 fb];
+   override;
+   status = "okay";
+   };
-- 
2.21.0



[PATCH 5/5] ARM: dts: armada385-wd-mcex2u: Add DTS file for WD My Cloud EX2 Ultra

2019-07-22 Thread Evgeny Kolesnikov
Add the DTS file to describe the Western Digital My Cloud EX2 Ultra NAS.

Signed-off-by: Evgeny Kolesnikov 
---
 arch/arm/boot/dts/armada-385-wd-mcex2u.dts | 313 +
 1 file changed, 313 insertions(+)
 create mode 100644 arch/arm/boot/dts/armada-385-wd-mcex2u.dts

diff --git a/arch/arm/boot/dts/armada-385-wd-mcex2u.dts 
b/arch/arm/boot/dts/armada-385-wd-mcex2u.dts
new file mode 100644
index ..018e66adbb93
--- /dev/null
+++ b/arch/arm/boot/dts/armada-385-wd-mcex2u.dts
@@ -0,0 +1,313 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Device Tree file for Western Digital My Cloud EX2 Ultra
+ * (BVBZ/Ranger Peak)
+ *
+ * Copyright (C) 2019 Evgeny Kolesnikov 
+ *
+ * Based on the code from:
+ *
+ * Copyright (C) 2016 Martin Mueller 
+ * Copyright (C) 2013 Gregory CLEMENT 
+ * Copyright (C) 2013 Thomas Petazzoni 
+ */
+
+/dts-v1/;
+#include 
+#include 
+#include "armada-385.dtsi"
+
+/ {
+   model = "WD My Cloud EX2 Ultra (BVBZ/Ranger Peak)";
+   compatible = "wd,mcex2u", "marvell,armada385", "marvell,armada380";
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   bootargs = "console=ttyS0,115200";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x 0x4000>; /* 1024 MB */
+   };
+
+   soc {
+   ranges = ;
+
+   internal-regs {
+   timer@c200 {
+   status = "disabled";
+   };
+
+   i2c0: i2c@11000 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   i2c1: i2c@11100 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   serial@12000 {
+   status = "okay";
+   };
+
+   /* Connected to Welltrend 6703F-OG240WT MCU
+* which controls power, fan and other things
+*/
+   serial@12100 {
+   status = "okay";
+   };
+
+   poweroff@12100 {
+   compatible = "uart-poweroff";
+   reg = <0x12100 0x100>;
+   clocks = < 0>;
+   baud = <19200>;
+   cmd = [fa 03 03 01 00 00 fb];
+   status = "okay";
+   };
+
+   restart@12100 {
+   compatible = "uart-restart";
+   reg = <0x12100 0x100>;
+   clocks = < 0>;
+   baud = <19200>;
+   cmd = [fa 03 03 02 00 00 fb];
+   override;
+   status = "okay";
+   };
+
+   pinctrl@18000 {
+   uart1_pins: uart-pins-1 {
+   marvell,pins = "mpp19";
+   marvell,function = "ua1";
+   };
+
+   xhci0_vbus_pins: xhci0-vbus-pins {
+   marvell,pins = "mpp26";
+   marvell,function = "gpio";
+   };
+
+   xhci1_vbus_pins: xhci1-vbus-pins {
+   marvell,pins = "mpp27";
+   marvell,function = "gpio";
+   };
+
+   sata0_pins: sata-pins-0 {
+   marvell,pins = "mpp55";
+   marvell,function = "sata0";
+   };
+
+   sata1_pins: sata-pins-1 {
+   marvell,pins = "mpp56";
+   marvell,function = "sata1";
+   };
+
+   sata_leds: sata-leds {
+   marvell,pins = "mpp43", "mpp52",
+  "mpp53", "mpp54";
+   marvell,function = "gpio";
+   };
+
+   btn_pins: btn-pins {
+   marvell,pins = "mpp50";
+   marvell,function = "gpio";
+   };
+   };
+
+   ethernet@34000 {
+   phy = <>;
+   phy-mode = "sgmii";
+   

[PATCH 0/5] Add support for WD MyCloud EX2 Ultra (+ versatile UART-based restart/poweroff drivers)

2019-07-22 Thread Evgeny Kolesnikov
This patchset consists of the DTS, which describes the WD MyCloud EX2 Ultra 
device,
'poweroff' and 'resert' drivers for power-managing MCUs connected to a board 
via UART
(these drivers are more versatile than qnap-poweroff and could be used as a 
substitude),
and DT bindings for these drivers.

The difference between uart-poweroff and qnap-poweroff is small, but important:
uart-poweroff is able to send to an MCU a command of arbitrary length, and the 
command
itself is defined in a DTS file for a specific device/board, thus making this 
driver
applicable to wider range of devices.

Evgeny Kolesnikov (5):
  power: reset: Add UART-based MCU poweroff DT bindings
  power: reset: Add UART-based MCU restart DT bindings
  power/reset: Add a power off driver for UART-based PM MCUs
  power/reset: Add a restart driver for UART-based PM MCUs
  ARM: dts: armada385-wd-mcex2u: Add DTS file for WD My Cloud EX2 Ultra

 .../bindings/power/reset/uart-poweroff.txt|  38 +++
 .../bindings/power/reset/uart-restart.txt |  39 +++
 arch/arm/boot/dts/armada-385-wd-mcex2u.dts| 313 ++
 drivers/power/reset/Kconfig   |  14 +
 drivers/power/reset/Makefile  |   2 +
 drivers/power/reset/uart-poweroff.c   | 155 +
 drivers/power/reset/uart-restart.c| 204 
 7 files changed, 765 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/power/reset/uart-poweroff.txt
 create mode 100644 
Documentation/devicetree/bindings/power/reset/uart-restart.txt
 create mode 100644 arch/arm/boot/dts/armada-385-wd-mcex2u.dts
 create mode 100644 drivers/power/reset/uart-poweroff.c
 create mode 100644 drivers/power/reset/uart-restart.c

-- 
2.21.0



[PATCH 1/5] power: reset: Add UART-based MCU poweroff DT bindings

2019-07-22 Thread Evgeny Kolesnikov
This adds device tree bindings of the poweroff driver
for power managing micro controller units that are connected
to a board via the UART interface.

Signed-off-by: Evgeny Kolesnikov 
---
 .../bindings/power/reset/uart-poweroff.txt| 38 +++
 1 file changed, 38 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/power/reset/uart-poweroff.txt

diff --git a/Documentation/devicetree/bindings/power/reset/uart-poweroff.txt 
b/Documentation/devicetree/bindings/power/reset/uart-poweroff.txt
new file mode 100644
index ..86d036271b51
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/reset/uart-poweroff.txt
@@ -0,0 +1,38 @@
+* UART-based PM MCU power off driver
+
+Some devices have a microcontroller controlling the main power
+supply. This microcontroller is connected to UART of the SoC.
+Sending a sequence of characters tells the MCU to turn
+the power off.
+
+The length of the sequence, baud rate and the timeout to process
+the command may vary from device to device.
+
+This driver could be used for WD My Cloud (Marvell SoCs), QNAP
+(Kirkwood and Orion5x SoCs) and Synology NAS devices.
+
+Required properties:
+- compatible: Should be "uart-poweroff"
+- reg: Address and length of the register set for UART
+- clocks: The tclk clock
+- cmd: Array of bytes, the command to send to the MCU
+- baud: Baud rate [75..460800]
+
+Optional properties:
+- byte-delay: A delay after each byte of a command, could be useful
+  for sloppy MCUs [ms], default value is 5
+- timeout: A timeout to wait for the MCU to process the command [ms],
+   default value is 1000
+- override: Boolean flag that indicates if the driver should
+prioritize itself over any existing power off driver,
+default behaviour is not to interfere
+
+Example:
+   poweroff@12100 {
+   compatible = "uart-poweroff";
+   reg = <0x12100 0x100>;
+   clocks = < 0>;
+   baud = <19200>;
+   cmd = [fa 03 03 01 00 00 fb];
+   status = "okay";
+   };
-- 
2.21.0



Re: [PATCH v3 3/9] x86/mm/tlb: Open-code on_each_cpu_cond_mask() for tlb_is_not_lazy()

2019-07-22 Thread Nadav Amit
> On Jul 22, 2019, at 12:47 PM, Rasmus Villemoes  
> wrote:
> 
> On 19/07/2019 02.58, Nadav Amit wrote:
> 
>> /*
>> @@ -865,7 +893,7 @@ void arch_tlbbatch_flush(struct 
>> arch_tlbflush_unmap_batch *batch)
>>  if (cpumask_test_cpu(cpu, >cpumask)) {
>>  lockdep_assert_irqs_enabled();
>>  local_irq_disable();
>> -flush_tlb_func_local(_flush_tlb_info);
>> +flush_tlb_func_local((void *)_flush_tlb_info);
>>  local_irq_enable();
>>  }
> 
> I think the confusion could be cleared up if you moved this hunk to
> patch 2 where it belongs - i.e. where you change the prototype of
> flush_tlb_func_local() and hence introduce the warning.

Yes, there is a small mess here - the constification should actually go
to a different patch… I’ll fix it.

Re: [PATCH v3 3/9] x86/mm/tlb: Open-code on_each_cpu_cond_mask() for tlb_is_not_lazy()

2019-07-22 Thread Rasmus Villemoes
On 19/07/2019 02.58, Nadav Amit wrote:

>  /*
> @@ -865,7 +893,7 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch 
> *batch)
>   if (cpumask_test_cpu(cpu, >cpumask)) {
>   lockdep_assert_irqs_enabled();
>   local_irq_disable();
> - flush_tlb_func_local(_flush_tlb_info);
> + flush_tlb_func_local((void *)_flush_tlb_info);
>   local_irq_enable();
>   }

I think the confusion could be cleared up if you moved this hunk to
patch 2 where it belongs - i.e. where you change the prototype of
flush_tlb_func_local() and hence introduce the warning.

Rasmus


RE: warning: objtool: fn1 uses BP as a scratch register

2019-07-22 Thread Topper, Craig
The framepointer thing may have been fixed by this  
https://reviews.llvm.org/D64294 

-Original Message-
From: Arnd Bergmann  
Sent: Friday, July 19, 2019 12:44 PM
To: Nick Desaulniers 
Cc: Josh Poimboeuf ; clang-built-linux 
; Linux Kernel Mailing List 
; Peter Zijlstra ; Topper, 
Craig ; Simon Pilgrim 
Subject: Re: warning: objtool: fn1 uses BP as a scratch register

On Fri, Jul 19, 2019 at 8:50 PM 'Nick Desaulniers' via Clang Built Linux 
 wrote:
> On Fri, Jul 19, 2019 at 11:44 AM Arnd Bergmann  wrote:
> > On Fri, Jul 19, 2019 at 8:31 PM Josh Poimboeuf  wrote:
> > Actually the reproducer may be wrong. I reduced the test case using 
> > 9.0.0-svn363902-1~exp1+0~20190620001509.2315~1.gbp76e756,
> > and this contains a link
> >
> >  testl %ebp, %ebp
> >
> > I get the same thing with clang-8, but godbolt.org shows it only 
> > with clang-8 (see https://godbolt.org/z/g1lZO0) , not with trunk.
>
> (Sorry for sending a blank email just now)
> + Craig and Simon, in case they recall this being a recent fix in
> LLVM's x86 backend.
> Sounds like this is fixing in upstream LLVM.  Guessing this could 
> result in improper unwinding w/ clang-8, but that's kind of irrelevant 
> for x86 as there's no asm goto (though we don't need CONFIG_JUMP_LABEL 
> in LTS branches :P)

Maybe you can try the attached .config file with a more recent clang build. 
This showed a few hundred warnings like this one for me, so if it was not a 
bugfix but a random change in clang-9 that changed my reproducer.

Ignoring the 'uses BP as a scratch' warnings and the reiserfs 'unreachable 
instruction' ones, this is what else I got with today's
linux-next:

arch/x86/events/intel/core.o: warning: objtool:
intel_pmu_nhm_workaround()+0x103: unreachable instruction
arch/x86/ia32/ia32_signal.o: warning: objtool:
ia32_setup_rt_frame()+0x151: call to memset() with UACCESS enabled
arch/x86/kernel/cpu/mtrr/generic.o: warning: objtool:
get_fixed_ranges()+0x144: unreachable instruction
arch/x86/kernel/process.o: warning: objtool: get_tsc_mode()+0x20: call without 
frame pointer save/setup
arch/x86/kernel/signal.o: warning: objtool: __setup_rt_frame()+0x1a0:
call to memset() with UACCESS enabled
arch/x86/kernel/signal.o: warning: objtool:
x32_setup_rt_frame()+0x1da: call to memset() with UACCESS enabled
arch/x86/kernel/tsc.o: warning: objtool: sched_clock()+0x0: call without frame 
pointer save/setup
arch/x86/mm/fault.o: warning: objtool: do_user_addr_fault()+0x53:
unreachable instruction
drivers/ata/sata_dwc_460ex.o: warning: objtool:
sata_dwc_bmdma_start_by_tag()+0x259: can't find switch jump table
drivers/gpu/drm/amd/amdgpu/atom.o: warning: objtool: atom_op_move() falls 
through to next function atom_op_and()
drivers/gpu/drm/radeon/atom.o: warning: objtool: atom_op_move()+0xce:
sibling call from callable instruction with modified stack frame
drivers/gpu/drm/radeon/atom.o: warning: objtool: atom_op_move() falls through 
to next function atom_op_and() modified stack frame
drivers/gpu/drm/radeon/evergreen_cs.o: warning: objtool:
evergreen_cs_parse()+0xbcf: sibling call from callable instruction with 
modified stack frame
drivers/gpu/drm/radeon/evergreen_cs.o: warning: objtool:
evergreen_cs_parse() falls through to next function
evergreen_dma_cs_parse()
drivers/hwmon/pmbus/adm1275.o: warning: objtool:
adm1275_probe()+0x949: unreachable instruction
drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd_dvbt2.o: warning:
objtool: x_tune_dvbt2_demod_setting()+0x92a: can't find switch jump table
drivers/pinctrl/pinctrl-ingenic.o: warning: objtool:
ingenic_pinconf_set()+0x93: sibling call from callable instruction with 
modified stack frame
drivers/platform/x86/intel_speed_select_if/isst_if_common.o: warning:
objtool: isst_restore_msr_local()+0x13d: unreachable instruction
drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.o:
warning: objtool: isst_if_send_mbox_cmd()+0x80: unreachable instruction
fs/hfsplus/xattr.o: warning: objtool:
hfsplus_create_attributes_file()+0x4f7: unreachable instruction
kernel/trace/ring_buffer.o: warning: objtool:
ring_buffer_nest_end()+0x1b: call without frame pointer save/setup
kernel/trace/trace.o: warning: objtool: saved_cmdlines_stop()+0x13:
call without frame pointer save/setup
lib/iov_iter.o: warning: objtool: .altinstr_replacement+0x30: call without 
frame pointer save/setup
lib/ubsan.o: warning: objtool: __ubsan_handle_type_mismatch()+0x25:
call to memcpy() with UACCESS enabled
lib/ubsan.o: warning: objtool: __ubsan_handle_type_mismatch_v1()+0xbd:
call to __stack_chk_fail() with UACCESS enabled
lib/ubsan.o: warning: objtool: ubsan_type_mismatch_common()+0x448:
call to __stack_chk_fail() with UACCESS enabled
mm/kasan/common.o: warning: objtool: kasan_report()+0x43: call to
__stack_chk_fail() with UACCESS enabled
mm/page_alloc.o: warning: objtool: .altinstr_replacement+0x47: call without 
frame pointer save/setup
mm/workingset.o: warning: objtool: count_shadow_nodes()+0x126:
unreachable instruction

Any 

Re: [PATCH 1/2] drivers: qcom: rpmh-rsc: simplify TCS locking

2019-07-22 Thread Lina Iyer

On Mon, Jul 22 2019 at 12:18 -0600, Stephen Boyd wrote:

Quoting Lina Iyer (2019-07-22 09:20:03)

On Fri, Jul 19 2019 at 12:20 -0600, Stephen Boyd wrote:
>Quoting Lina Iyer (2019-07-01 08:29:06)
>> From: "Raju P.L.S.S.S.N" 
>>
>> tcs->lock was introduced to serialize access with in TCS group. But
>> even without tcs->lock, drv->lock is serving the same purpose. So
>> use a single drv->lock.
>
>Isn't the downside now that we're going to be serializing access to the
>different TCSes when two are being written in parallel or waited on? I
>thought that was the whole point of splitting the lock into a TCS lock
>and a general "driver" lock that protects the global driver state vs.
>the specific TCS state.
>
Yes but we were holding the drv->lock as well as tcs->lock for the most
critical of the path anyways (writing to TCS). The added complexity
doesn't seem to help reduce the latency that it expected to reduce.


Ok. That sort of information should be in the commit text to explain why
it's not helping with reducing the latency or throughput of the API.


Will add.

--Lina


Re: [PATCH] sched/cputime: make scale_stime() more precise

2019-07-22 Thread Peter Zijlstra
On Fri, Jul 19, 2019 at 04:03:25PM +0200, Oleg Nesterov wrote:
> On 07/19, Peter Zijlstra wrote:
> > Included below is also an x86_64 implementation in 2 instructions.
> 
> But we need the arch-neutral implementation anyway, the code above
> is the best I could invent.

Agreed; we do. Depending on the cost of division and if the arch has a
64x64->128 mult, it might be better to compute a reciprocal and multiply
that, but yes, long staring didn't get me much better ideas either.

> But see below!
> 
> > I'm still trying see if there's anything saner we can do...
> 
> Oh, please, it is not that I like my solution very much, I would like
> to see something more clever.
> 
> > static noinline u64 mul_u64_u64_div_u64(u64 a, u64 b, u64 c)
> > {
> > u64 q;
> > asm ("mulq %2; divq %3" : "=a" (q) : "a" (a), "rm" (b), "rm" (c) : 
> > "rdx");
> > return q;
> > }
> 
> Heh. I have to admit that I didn't know that divq divides 128bit by
> 64bit. gcc calls the __udivti3 intrinsic in this case so I wrongly
> came to conclusion this is not simple even on x86_64. Plus the fact
> that linux/math64.h only has mul_u64_u64_shr()...

C wants to promote the dividend and divisor to the same type (int128)
and then it runs into trouble.

But yeah, I don't know how many other 64bit archs can pull off that
trick. I asked, and ARGH64 cannot do that 128/64 (although it can do a
64x64->128 in two instructions).



Re: [PATCH 1/2] doc:it_IT: align translation to mainline

2019-07-22 Thread Jonathan Corbet
On Thu, 18 Jul 2019 09:47:24 +0200
Federico Vaga  wrote:

> The patch translates the following patches in Italian:
> 
> d9d7c0c497b8 docs: Note that :c:func: should no longer be used
> 83e8b971f81c sphinx.rst: Add note about code snippets embedded in the text
> cca5e0b8a430 Documentation: PGP: update for newer HW devices
> 
> Signed-off-by: Federico Vaga 

Applied (and the second one as well), thanks.

jon


Re: [PATCH] net/mlx5: fix -Wtype-limits compilation warnings

2019-07-22 Thread Saeed Mahameed
On Mon, Jul 22, 2019 at 12:09 PM David Miller  wrote:
>
> From: Qian Cai 
> Date: Mon, 22 Jul 2019 14:34:42 -0400
>
> > The commit b9a7ba556207 ("net/mlx5: Use event mask based on device
> > capabilities") introduced a few compilation warnings due to it bumps
> > MLX5_EVENT_TYPE_MAX from 0x27 to 0x100 which is always greater than
> > an "struct {mlx5_eqe|mlx5_nb}.type" that is an "u8".
> >
> > drivers/net/ethernet/mellanox/mlx5/core/eq.c: In function
> > 'mlx5_eq_notifier_register':
> > drivers/net/ethernet/mellanox/mlx5/core/eq.c:948:21: warning: comparison
> > is always false due to limited range of data type [-Wtype-limits]
> >   if (nb->event_type >= MLX5_EVENT_TYPE_MAX)
> >  ^~
> > drivers/net/ethernet/mellanox/mlx5/core/eq.c: In function
> > 'mlx5_eq_notifier_unregister':
> > drivers/net/ethernet/mellanox/mlx5/core/eq.c:959:21: warning: comparison
> > is always false due to limited range of data type [-Wtype-limits]
> >   if (nb->event_type >= MLX5_EVENT_TYPE_MAX)
> >
> > Fix them by removing unnecessary checkings.
> >
> > Fixes: b9a7ba556207 ("net/mlx5: Use event mask based on device 
> > capabilities")
> > Signed-off-by: Qian Cai 
>
> Saeed, I am assuming that you will take this.

Yes, will take it.
The patch LGTM, though not applying it yet so others get the chance to
review it.
will apply it in a couple of days.

Thanks,
Saeed.


Re: [RFC PATCH v4 2/6] vfio: Introduce vGPU display irq type

2019-07-22 Thread Alex Williamson
On Mon, 22 Jul 2019 05:28:35 +
"Lu, Kechen"  wrote:

> Hi, 
> 
> > -Original Message-
> > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > Sent: Saturday, July 20, 2019 12:25 AM
> > To: Lu, Kechen 
> > Cc: intel-gvt-...@lists.freedesktop.org; k...@vger.kernel.org; linux-
> > ker...@vger.kernel.org; Zhang, Tina ;
> > kra...@redhat.com; zhen...@linux.intel.com; Lv, Zhiyuan
> > ; Wang, Zhi A ; Tian, Kevin
> > ; Yuan, Hang 
> > Subject: Re: [RFC PATCH v4 2/6] vfio: Introduce vGPU display irq type
> > 
> > On Thu, 18 Jul 2019 23:56:36 +0800
> > Kechen Lu  wrote:
> >   
> > > From: Tina Zhang 
> > >
> > > Introduce vGPU specific irq type VFIO_IRQ_TYPE_GFX, and
> > > VFIO_IRQ_SUBTYPE_GFX_DISPLAY_IRQ as the subtype for vGPU display
> > >
> > > Signed-off-by: Tina Zhang 
> > > ---
> > >  include/uapi/linux/vfio.h | 3 +++
> > >  1 file changed, 3 insertions(+)
> > >
> > > diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
> > > index be6adab4f759..df28b17a6e2e 100644
> > > --- a/include/uapi/linux/vfio.h
> > > +++ b/include/uapi/linux/vfio.h
> > > @@ -469,6 +469,9 @@ struct vfio_irq_info_cap_type {
> > >   __u32 subtype;  /* type specific */
> > >  };
> > >
> > > +#define VFIO_IRQ_TYPE_GFX(1)
> > > +#define VFIO_IRQ_SUBTYPE_GFX_DISPLAY_IRQ (1)
> > > +  
> > 
> > Please include a description defining exactly what this IRQ is intended to 
> > signal.
> > For instance, if another vGPU vendor wanted to implement this in their 
> > driver
> > and didn't have the QEMU code for reference to what it does with the IRQ, 
> > what
> > would they need to know?  Thanks,
> > 
> > Alex
> >   
> 
> Yes, that makes more sense. I'll add the description for it at next version 
> patch.
> 
> BTW, may I have one more question? In the current design ideas, we 
> partitioned 
> the vGPU display eventfd counted 8-byte value into at most 8 events to 
> deliver 
> multiple display events, so we need different increasement counter value to 
> differentiate the events. As this is the exposed thing the QEMU has to know, 
> we
> plan adds a macro here VFIO_IRQ_SUBTYPE_GFX_DISPLAY_EVENTFD_BASE_SHIFT to
> make sure the partitions shift in 1 byte, does it make sense putting here? 
> Looking  
> forward to your and Gerd's comments. Thanks!

Couldn't you expose this as another capability within the IRQ_INFO
return data?  If you were to define it as a macro, I assume that means
it would be hard coded, in which case this probably becomes an Intel
specific IRQ, rather than what appears to be framed as a generic
graphics IRQ extension.  A new capability could instead allow the
vendor to specify their own value, where we could define how userspace
should interpret and make use of this value.  Thanks,

Alex


[PATCH v2 1/2] mmc: core: Add sdio_trigger_replug() API

2019-07-22 Thread Douglas Anderson
When using Marvell WiFi SDIO cards, it is not uncommon for Linux WiFi
driver to fully lose the communication channel to the firmware running
on the card.  Presumably the firmware on the card has a bug or two in
it and occasionally crashes.

The Marvell WiFi driver attempts to recover from this problem.
Specifically the driver has the function mwifiex_sdio_card_reset()
which is called when communcation problems are found.  That function
attempts to reset the state of things by utilizing the mmc_hw_reset()
function.

The current solution is a bit complex because the Marvell WiFi driver
needs to manually deinit and reinit the WiFi driver around the reset
call.  This means it's going through a bunch of code paths that aren't
normally tested.  However, complexity isn't our only problem.  The
other (bigger) problem is that Marvell WiFi cards are often combo
WiFi/Bluetooth cards and Bluetooth runs on a second SDIO func.  While
the WiFi driver knows that it should re-init its own state around the
mmc_hw_reset() call there is no good way to inform the Bluetooth
driver.  That means that in Linux today when you reset the Marvell
WiFi driver you lose all Bluetooth communication.  Doh!

One way to fix the above problems is to leverage a more standard way
to reset the Marvell WiFi card where we go through the same code paths
as card unplug and the card plug.  In this patch we introduce a new
API call for doing just that: sdio_trigger_replug().  This API call
will trigger an unplug of the SDIO card followed by a plug of the
card.  As part of this the card will be nicely reset.

Signed-off-by: Douglas Anderson 
Reviewed-by: Matthias Kaehlcke 
---

Changes in v2:
- s/routnine/routine (Brian Norris, Matthias Kaehlcke).
- s/contining/containing (Matthias Kaehlcke).
- Add Matthias Reviewed-by tag.

 drivers/mmc/core/core.c   | 28 ++--
 drivers/mmc/core/sdio_io.c| 20 
 include/linux/mmc/host.h  | 15 ++-
 include/linux/mmc/sdio_func.h |  2 ++
 4 files changed, 62 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 221127324709..5da365b1fdb4 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -2161,6 +2161,12 @@ int mmc_sw_reset(struct mmc_host *host)
 }
 EXPORT_SYMBOL(mmc_sw_reset);
 
+void mmc_trigger_replug(struct mmc_host *host)
+{
+   host->trigger_replug_state = MMC_REPLUG_STATE_UNPLUG;
+   _mmc_detect_change(host, 0, false);
+}
+
 static int mmc_rescan_try_freq(struct mmc_host *host, unsigned freq)
 {
host->f_init = freq;
@@ -2214,6 +2220,11 @@ int _mmc_detect_card_removed(struct mmc_host *host)
if (!host->card || mmc_card_removed(host->card))
return 1;
 
+   if (host->trigger_replug_state == MMC_REPLUG_STATE_UNPLUG) {
+   mmc_card_set_removed(host->card);
+   return 1;
+   }
+
ret = host->bus_ops->alive(host);
 
/*
@@ -2326,8 +2337,21 @@ void mmc_rescan(struct work_struct *work)
mmc_bus_put(host);
 
mmc_claim_host(host);
-   if (mmc_card_is_removable(host) && host->ops->get_cd &&
-   host->ops->get_cd(host) == 0) {
+
+   /*
+* Move through the state machine if we're triggering an unplug
+* followed by a re-plug.
+*/
+   if (host->trigger_replug_state == MMC_REPLUG_STATE_UNPLUG) {
+   host->trigger_replug_state = MMC_REPLUG_STATE_PLUG;
+   _mmc_detect_change(host, 0, false);
+   } else if (host->trigger_replug_state == MMC_REPLUG_STATE_PLUG) {
+   host->trigger_replug_state = MMC_REPLUG_STATE_NONE;
+   }
+
+   if (host->trigger_replug_state == MMC_REPLUG_STATE_PLUG ||
+   (mmc_card_is_removable(host) && host->ops->get_cd &&
+   host->ops->get_cd(host) == 0)) {
mmc_power_off(host);
mmc_release_host(host);
goto out;
diff --git a/drivers/mmc/core/sdio_io.c b/drivers/mmc/core/sdio_io.c
index 2ba00acf64e6..9b96267ac855 100644
--- a/drivers/mmc/core/sdio_io.c
+++ b/drivers/mmc/core/sdio_io.c
@@ -811,3 +811,23 @@ void sdio_retune_release(struct sdio_func *func)
mmc_retune_release(func->card->host);
 }
 EXPORT_SYMBOL_GPL(sdio_retune_release);
+
+/**
+ * sdio_trigger_replug - trigger an "unplug" + "plug" of the card
+ * @func: SDIO function attached to host
+ *
+ * When you call this function we will schedule events that will
+ * make it look like the card containing the given SDIO func was
+ * unplugged and then re-plugged-in.  This is as close as possible
+ * to a full reset of the card that can be achieved.
+ *
+ * NOTE: routine will temporarily make the card look as if it is
+ * removable even if it is marked non-removable.
+ *
+ * This function should be called while the host is claimed.
+ */
+void sdio_trigger_replug(struct sdio_func *func)
+{
+   

[PATCH v2 2/2] mwifiex: Make use of the new sdio_trigger_replug() API to reset

2019-07-22 Thread Douglas Anderson
As described in the patch ("mmc: core: Add sdio_trigger_replug()
API"), the current mwifiex_sdio_card_reset() is broken in the cases
where we're running Bluetooth on a second SDIO func on the same card
as WiFi.  The problem goes away if we just use the
sdio_trigger_replug() API call.

NOTE: Even though with this new solution there is less of a reason to
do our work from a workqueue (the unplug / plug mechanism we're using
is possible for a human to perform at any time so the stack is
supposed to handle it without it needing to be called from a special
context), we still need a workqueue because the Marvell reset function
could called from a context where sleeping is invalid and thus we
can't claim the host.  One example is Marvell's wakeup_timer_fn().

Cc: Andreas Fenkart 
Cc: Brian Norris 
Fixes: b4336a282db8 ("mwifiex: sdio: reset adapter using mmc_hw_reset")
Signed-off-by: Douglas Anderson 
Reviewed-by: Brian Norris 
---

Changes in v2:
- Removed clear_bit() calls and old comment (Brian Norris).
- Explicit CC of Andreas Fenkart.
- Explicit CC of Brian Norris.
- Add "Fixes" pointing at the commit Brian talked about.
- Add Brian's Reviewed-by tag.

 drivers/net/wireless/marvell/mwifiex/sdio.c | 16 +---
 1 file changed, 1 insertion(+), 15 deletions(-)

diff --git a/drivers/net/wireless/marvell/mwifiex/sdio.c 
b/drivers/net/wireless/marvell/mwifiex/sdio.c
index 24c041dad9f6..7ec5068f6ffd 100644
--- a/drivers/net/wireless/marvell/mwifiex/sdio.c
+++ b/drivers/net/wireless/marvell/mwifiex/sdio.c
@@ -2218,24 +2218,10 @@ static void mwifiex_sdio_card_reset_work(struct 
mwifiex_adapter *adapter)
 {
struct sdio_mmc_card *card = adapter->card;
struct sdio_func *func = card->func;
-   int ret;
-
-   mwifiex_shutdown_sw(adapter);
 
-   /* power cycle the adapter */
sdio_claim_host(func);
-   mmc_hw_reset(func->card->host);
+   sdio_trigger_replug(func);
sdio_release_host(func);
-
-   /* Previous save_adapter won't be valid after this. We will cancel
-* pending work requests.
-*/
-   clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, >work_flags);
-   clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, >work_flags);
-
-   ret = mwifiex_reinit_sw(adapter);
-   if (ret)
-   dev_err(>dev, "reinit failed: %d\n", ret);
 }
 
 /* This function read/write firmware */
-- 
2.22.0.657.g960e92d24f-goog



[PATCH v2 0/2] mmc: core: Fix Marvell WiFi reset by adding SDIO API to replug card

2019-07-22 Thread Douglas Anderson
As talked about in the thread at:

http://lkml.kernel.org/r/CAD=FV=X7P2F1k_zwHc0mbtfk55-rucTz_GoDH=pl6zwqkyc...@mail.gmail.com

...when the Marvell WiFi card tries to reset itself it kills
Bluetooth.  It was observed that we could re-init the card properly by
unbinding / rebinding the host controller.  It was also observed that
in the downstream Chrome OS codebase the solution used was
mmc_remove_host() / mmc_add_host(), which is similar to the solution
in this series.

So far I've only done testing of this series using the reset test
source that can be simulated via sysfs.  Specifically I ran this test:

for i in $(seq 1000); do
  echo "LOOP $i "
  echo 1 > /sys/kernel/debug/mwifiex/mlan0/reset

  while true; do
if ! ping -w15 -c1 "${GW}" >/dev/null 2>&1; then
  fail=$(( fail + 1 ))
  echo "Fail WiFi ${fail}"
  if [[ ${fail} == 3 ]]; then
exit 1
  fi
else
  fail=0
  break
fi
  done

  hciconfig hci0 down
  sleep 1
  if ! hciconfig hci0 up; then
echo "Fail BT"
exit 1
  fi
done

I ran this several times and got several hundred iterations each
before a failure.  When I saw failures:

* Once I saw a "Fail BT"; manually resetting the card again fixed it.
  I didn't give it time to see if it would have detected this
  automatically.
* Once I saw the ping fail because (for some reason) my device only
  got an IPv6 address from my router and the IPv4 ping failed.  I
  changed my script to use 'ping6' to see if that would help.
* Once I saw the ping fail because the higher level network stack
  ("shill" in my case) seemed to crash.  A few minutes later the
  system recovered itself automatically.  https://crbug.com/984593 if
  you want more details.
* Sometimes while I was testing I saw "Fail WiFi 1" indicating a
  transitory failure.  Usually this was an association failure, but in
  one case I saw the device do "Firmware wakeup failed" after I
  triggered the reset.  This caused the driver to trigger a re-reset
  of itself which eventually recovered things.  This was good because
  it was an actual test of the normal reset flow (not the one
  triggered via sysfs).

Changes in v2:
- s/routnine/routine (Brian Norris, Matthias Kaehlcke).
- s/contining/containing (Matthias Kaehlcke).
- Add Matthias Reviewed-by tag.
- Removed clear_bit() calls and old comment (Brian Norris).
- Explicit CC of Andreas Fenkart.
- Explicit CC of Brian Norris.
- Add "Fixes" pointing at the commit Brian talked about.
- Add Brian's Reviewed-by tag.

Douglas Anderson (2):
  mmc: core: Add sdio_trigger_replug() API
  mwifiex: Make use of the new sdio_trigger_replug() API to reset

 drivers/mmc/core/core.c | 28 +++--
 drivers/mmc/core/sdio_io.c  | 20 +++
 drivers/net/wireless/marvell/mwifiex/sdio.c | 16 +---
 include/linux/mmc/host.h| 15 ++-
 include/linux/mmc/sdio_func.h   |  2 ++
 5 files changed, 63 insertions(+), 18 deletions(-)

-- 
2.22.0.657.g960e92d24f-goog



Re: [PATCH 38/79] libperf: Add perf_evlist__init function

2019-07-22 Thread Arnaldo Carvalho de Melo
Em Sun, Jul 21, 2019 at 01:24:25PM +0200, Jiri Olsa escreveu:
> Adding perf_evlist__init function to initialize
> perf_evlist struct.
> 
> Link: http://lkml.kernel.org/n/tip-uhs894b98iiydutjgr1z5...@git.kernel.org
> Signed-off-by: Jiri Olsa 
> ---
>  tools/perf/lib/evlist.c  | 5 +
>  tools/perf/lib/include/perf/evlist.h | 4 
>  tools/perf/lib/libperf.map   | 1 +
>  tools/perf/util/evlist.c | 3 ++-
>  4 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/tools/perf/lib/evlist.c b/tools/perf/lib/evlist.c
> index 646bdd518793..fdc8c1894b37 100644
> --- a/tools/perf/lib/evlist.c
> +++ b/tools/perf/lib/evlist.c
> @@ -2,3 +2,8 @@
>  #include 
>  #include 
>  #include 
> +
> +void perf_evlist__init(struct perf_evlist *evlist)
> +{
> + INIT_LIST_HEAD(>entries);
> +}
> diff --git a/tools/perf/lib/include/perf/evlist.h 
> b/tools/perf/lib/include/perf/evlist.h
> index 92b0eb39caec..1ddfcca0bd01 100644
> --- a/tools/perf/lib/include/perf/evlist.h
> +++ b/tools/perf/lib/include/perf/evlist.h
> @@ -2,6 +2,10 @@
>  #ifndef __LIBPERF_EVLIST_H
>  #define __LIBPERF_EVLIST_H
>  
> +#include 
> +
>  struct perf_evlist;
>  
> +LIBPERF_API void perf_evlist__init(struct perf_evlist *evlist);
> +
>  #endif /* __LIBPERF_EVLIST_H */
> diff --git a/tools/perf/lib/libperf.map b/tools/perf/lib/libperf.map
> index 54f8503c6d82..5ca6ff6fcdfa 100644
> --- a/tools/perf/lib/libperf.map
> +++ b/tools/perf/lib/libperf.map
> @@ -10,6 +10,7 @@ LIBPERF_0.0.1 {
>   perf_thread_map__get;
>   perf_thread_map__put;
>   perf_evsel__init;
> + perf_evlist__init;
>   local:
>   *;
>  };
> diff --git a/tools/perf/util/evlist.c b/tools/perf/util/evlist.c
> index faf3ffd81d4c..aacddd9b2d64 100644
> --- a/tools/perf/util/evlist.c
> +++ b/tools/perf/util/evlist.c
> @@ -33,6 +33,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #ifdef LACKS_SIGQUEUE_PROTOTYPE
>  int sigqueue(pid_t pid, int sig, const union sigval value);
> @@ -48,11 +49,11 @@ void evlist__init(struct evlist *evlist, struct 
> perf_cpu_map *cpus,
>  
>   for (i = 0; i < PERF_EVLIST__HLIST_SIZE; ++i)
>   INIT_HLIST_HEAD(>heads[i]);
> - INIT_LIST_HEAD(>core.entries);
>   perf_evlist__set_maps(evlist, cpus, threads);
>   fdarray__init(>pollfd, 64);
>   evlist->workload.pid = -1;
>   evlist->bkw_mmap_state = BKW_MMAP_NOTREADY;
> + perf_evlist__init(>core);
>  }

This causes a segfault, since perf_evlist__set_maps() will touch stuff
that you now moved to the end of this function, applying the patch at
the end of this message fixes the issue, i.e. keeps the existing init
ordering and avoids the segfault:

gdb) run stat sleep 1
Starting program: /root/bin/perf stat sleep 1
Program received signal SIGSEGV, Segmentation fault.
0x004f6b55 in __perf_evlist__propagate_maps (evlist=0xbb34c0, 
evsel=0x0) at util/evlist.c:161
161 if (!evsel->own_cpus || evlist->has_user_cpus) {
Missing separate debuginfos, use: dnf debuginfo-install 
bzip2-libs-1.0.6-29.fc30.x86_64 elfutils-libelf-0.176-3.fc30.x86_64 
elfutils-libs-0.176-3.fc30.x86_64 glib2-2.60.4-1.fc30.x86_64 
libbabeltrace-1.5.6-2.fc30.x86_64 libgcc-9.1.1-1.fc30.x86_64 
libunwind-1.3.1-2.fc30.x86_64 libuuid-2.33.2-1.fc30.x86_64 
libxcrypt-4.4.6-2.fc30.x86_64 libzstd-1.4.0-1.fc30.x86_64 
numactl-libs-2.0.12-2.fc30.x86_64 pcre-8.43-2.fc30.x86_64 
perl-libs-5.28.2-436.fc30.x86_64 popt-1.16-17.fc30.x86_64 
python2-libs-2.7.16-2.fc30.x86_64 slang-2.3.2-5.fc30.x86_64 
xz-libs-5.2.4-5.fc30.x86_64 zlib-1.2.11-15.fc30.x86_64
(gdb) bt
#0  0x004f6b55 in __perf_evlist__propagate_maps (evlist=0xbb34c0, 
evsel=0x0) at util/evlist.c:161
#1  0x004f6c7a in perf_evlist__propagate_maps (evlist=0xbb34c0) at 
util/evlist.c:178
#2  0x004f955e in perf_evlist__set_maps (evlist=0xbb34c0, cpus=0x0, 
threads=0x0) at util/evlist.c:1128
#3  0x004f66f8 in evlist__init (evlist=0xbb34c0, cpus=0x0, threads=0x0) 
at util/evlist.c:52
#4  0x004f6790 in evlist__new () at util/evlist.c:64
#5  0x00456071 in cmd_stat (argc=3, argv=0x7fffd670) at 
builtin-stat.c:1705
#6  0x004dd0fa in run_builtin (p=0xa21e00 , argc=3, 
argv=0x7fffd670) at perf.c:304
#7  0x004dd367 in handle_internal_command (argc=3, argv=0x7fffd670) 
at perf.c:356
#8  0x004dd4ae in run_argv (argcp=0x7fffd4cc, argv=0x7fffd4c0) 
at perf.c:400
#9  0x004dd81a in main (argc=3, argv=0x7fffd670) at perf.c:522
(gdb) bt

I'm applying it to fix this issue and avoid a bisection break. I'm now
going to run 'perf test' after each cset too. And probably the next cset
has this issue as well, i.e. reordering of initialization in the
perf_evsel__init() case.

diff --git a/tools/perf/util/evlist.c b/tools/perf/util/evlist.c
index aacddd9b2d64..f4aa6cf80559 100644
--- a/tools/perf/util/evlist.c
+++ b/tools/perf/util/evlist.c
@@ -49,11 +49,11 @@ void 

Re: [PATCH v2 6/7] dt-bindings: net: realtek: Add property to configure LED mode

2019-07-22 Thread Andrew Lunn
> as of now it isn't even an API, the phy_device populates a new array
> in its struct with the values from the DT. PHY drivers access the
> array directly. Is it still preferable to post everything together?
> 
> (maybe I'm too concerned about 'noise' from the driver patches while
>  we are figuring out what exactly the binding should be).

We should try to have the DT parsing made generic in phylib, and add
new driver API calls to actually configure the LEDs.

Please also take a look at the Linux generic LED binding. It would be
nice to have something compatible with that. With time, the code could
morph into being part of the generic LED subsystem. So we are mostly
talking about triggers. But we offload the trigger to the hardware,
rather than have software trigger the blinking of the LEDs. So
something like:

ethernet-phy0  {
reg = <0>;

leds {
phy-led@0 {
  reg = <0>
  label = "left:green";
  linux,default-trigger = "phy_link_1000_active";
}
phy-led@1 {
  reg = <1>
  label = "right:red";
  linux,default-trigger = "phy_collision";
}
}
}

  Andrew



Re: [v5.3-rc1 regression] Hitting a kernel BUG() when trying to load a module on DaVinci SoC

2019-07-22 Thread David Lechner

On 7/22/19 11:10 AM, Jessica Yu wrote:

+++ Bartosz Golaszewski [22/07/19 14:12 +0200]:

Hi,

with v5.3-rc1 I'm hitting the following BUG() when trying to load the
gpio-backlight module:

kernel BUG at kernel/module.c:1919!
Internal error: Oops - BUG: 0 [#1] PREEMPT ARM
Modules linked in:
CPU: 0 PID: 1 Comm: systemd Tainted: G    W
5.2.0-rc2-5-g7dabaa5ce05a #19
Hardware name: DaVinci DA850/OMAP-L138/AM18x EVM
PC is at frob_text.constprop.16+0x2c/0x34
LR is at load_module+0x1888/0x21b4
pc : []    lr : []    psr: 2013
sp : c6837e58  ip : c6b4fa80  fp : bf00574c
r10: c0601008  r9 : bf005740  r8 : c0493e38
r7 : c00807f8  r6 :   r5 : 0001  r4 : c6837f38
r3 : 0fff  r2 : bf00  r1 : 4b80  r0 : bf005818
Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
Control: 0005317f  Table: c6b78000  DAC: 0051
Process systemd (pid: 1, stack limit = 0x(ptrval))
Stack: (0xc6837e58 to 0xc6838000)
7e40:   bf005740 c6492a90
7e60: 0001 c6bf5788 0003 c6837f38 bf0058c0 bf0058a8 bf00a495 c0493e38
7e80:  c05368c0 0001  c0580030 c0574b28  
7ea0:     6e72656b 6c65  
7ec0:        
7ee0:    aefb2bb8 7fff c0601008  0004
7f00: b6cee714 c00091e4 c6836000  005bc668 c00847b0 7fff 
7f20: 0003  b2d0 c884e000 b2d0  c8852dcb c88533a0
7f40: c884e000 b2d0 c8858cb8 c8858b34 c88568d4 58c0 6190 23b8
7f60: 6713    23a8 0024 0025 0019
7f80: 001d 0011  aefb2bb8    
7fa0: 017b c0009000   0004 b6cee714  
7fc0:    017b   0001 005bc668
7fe0: be907b00 be907af0 b6ce66b0 b6c3fac0 6010 0004  
[] (frob_text.constprop.16) from []
(load_module+0x1888/0x21b4)
[] (load_module) from [] (sys_finit_module+0xbc/0xdc)
[] (sys_finit_module) from [] (ret_fast_syscall+0x0/0x50)
Exception stack(0xc6837fa8 to 0xc6837ff0)
7fa0:     0004 b6cee714  
7fc0:    017b   0001 005bc668
7fe0: be907b00 be907af0 b6ce66b0 b6c3fac0
Code: e1a01621 e1a2 eafe4531 e7f001f2 (e7f001f2)
---[ end trace 2cbefb0005882c52 ]---
Kernel panic - not syncing: Attempted to kill init! exitcode=0x000b
---[ end Kernel panic - not syncing: Attempted to kill init!
exitcode=0x000b ]---

I bisected it to commit 06bd260e836d ("modules: fix BUG when load
module with rodata=n") with commit 7dabaa5ce05a ("modules: fix compile
error if don't have strict module rwx") on top to make it build.

Let me know if you need me to provide more info.

Best regards,
Bartosz Golaszewski


Hi Bartosz,

Thanks for reporting this, I was able to reproduce this on qemu.

This is due to hitting the BUG_ON() in frob_text() due to layout->base
and/or layout->text_size not being page-aligned. These values are
always page-aligned when CONFIG_STRICT_MODULE_RWX=y, but in commit
2eef1399a86 ("modules: fix BUG when load module with rodata=n"), the
frob_text()+set_memory_x() calls got moved *outside* of the
STRICT_MODULE_RWX block since some arches (like x86 and arm64)
allocate non-executable module memory via module_alloc(), so naturally
the module text needed to be made executable at a later stage of
load_module(), regardless of whether STRICT_MODULE_RWX is set or not.
In your case, you must've had CONFIG_STRICT_MODULE_RWX=n and so we
were calling frob_text() with non-page-aligned values, triggering the
BUG_ON().

In any case, could you please try and see if the following patch fixes
the issue for you?

diff --git a/kernel/module.c b/kernel/module.c
index 5933395af9a0..cd8df51d 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -64,14 +64,9 @@

/*
  * Modules' sections will be aligned on page boundaries
- * to ensure complete separation of code and data, but
- * only when CONFIG_STRICT_MODULE_RWX=y
+ * to ensure complete separation of code and data
  */
-#ifdef CONFIG_STRICT_MODULE_RWX
# define debug_align(X) ALIGN(X, PAGE_SIZE)
-#else
-# define debug_align(X) (X)
-#endif

/* If this is set, the section belongs in the init part of the module */
#define INIT_OFFSET_MASK (1UL << (BITS_PER_LONG-1))


Works for me.

Tested-by: David Lechner 


Re: [PATCH 1/2] mmc: core: Add sdio_trigger_replug() API

2019-07-22 Thread Matthias Kaehlcke
On Tue, Jul 16, 2019 at 09:42:08AM -0700, Douglas Anderson wrote:
> When using Marvell WiFi SDIO cards, it is not uncommon for Linux WiFi
> driver to fully lose the communication channel to the firmware running
> on the card.  Presumably the firmware on the card has a bug or two in
> it and occasionally crashes.
> 
> The Marvell WiFi driver attempts to recover from this problem.
> Specifically the driver has the function mwifiex_sdio_card_reset()
> which is called when communcation problems are found.  That function
> attempts to reset the state of things by utilizing the mmc_hw_reset()
> function.
> 
> The current solution is a bit complex because the Marvell WiFi driver
> needs to manually deinit and reinit the WiFi driver around the reset
> call.  This means it's going through a bunch of code paths that aren't
> normally tested.  However, complexity isn't our only problem.  The
> other (bigger) problem is that Marvell WiFi cards are often combo
> WiFi/Bluetooth cards and Bluetooth runs on a second SDIO func.  While
> the WiFi driver knows that it should re-init its own state around the
> mmc_hw_reset() call there is no good way to inform the Bluetooth
> driver.  That means that in Linux today when you reset the Marvell
> WiFi driver you lose all Bluetooth communication.  Doh!
> 
> One way to fix the above problems is to leverage a more standard way
> to reset the Marvell WiFi card where we go through the same code paths
> as card unplug and the card plug.  In this patch we introduce a new
> API call for doing just that: sdio_trigger_replug().  This API call
> will trigger an unplug of the SDIO card followed by a plug of the
> card.  As part of this the card will be nicely reset.
> 
> Signed-off-by: Douglas Anderson 
> ---
> 
>  drivers/mmc/core/core.c   | 28 ++--
>  drivers/mmc/core/sdio_io.c| 20 
>  include/linux/mmc/host.h  | 15 ++-
>  include/linux/mmc/sdio_func.h |  2 ++
>  4 files changed, 62 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
> index 9020cb2490f7..48a7d23aed26 100644
> --- a/drivers/mmc/core/core.c
> +++ b/drivers/mmc/core/core.c
> @@ -2164,6 +2164,12 @@ int mmc_sw_reset(struct mmc_host *host)
>  }
>  EXPORT_SYMBOL(mmc_sw_reset);
>  
> +void mmc_trigger_replug(struct mmc_host *host)
> +{
> + host->trigger_replug_state = MMC_REPLUG_STATE_UNPLUG;
> + _mmc_detect_change(host, 0, false);
> +}
> +
>  static int mmc_rescan_try_freq(struct mmc_host *host, unsigned freq)
>  {
>   host->f_init = freq;
> @@ -2217,6 +2223,11 @@ int _mmc_detect_card_removed(struct mmc_host *host)
>   if (!host->card || mmc_card_removed(host->card))
>   return 1;
>  
> + if (host->trigger_replug_state == MMC_REPLUG_STATE_UNPLUG) {
> + mmc_card_set_removed(host->card);
> + return 1;
> + }
> +
>   ret = host->bus_ops->alive(host);
>  
>   /*
> @@ -2329,8 +2340,21 @@ void mmc_rescan(struct work_struct *work)
>   mmc_bus_put(host);
>  
>   mmc_claim_host(host);
> - if (mmc_card_is_removable(host) && host->ops->get_cd &&
> - host->ops->get_cd(host) == 0) {
> +
> + /*
> +  * Move through the state machine if we're triggering an unplug
> +  * followed by a re-plug.
> +  */
> + if (host->trigger_replug_state == MMC_REPLUG_STATE_UNPLUG) {
> + host->trigger_replug_state = MMC_REPLUG_STATE_PLUG;
> + _mmc_detect_change(host, 0, false);
> + } else if (host->trigger_replug_state == MMC_REPLUG_STATE_PLUG) {
> + host->trigger_replug_state = MMC_REPLUG_STATE_NONE;
> + }
> +
> + if (host->trigger_replug_state == MMC_REPLUG_STATE_PLUG ||
> + (mmc_card_is_removable(host) && host->ops->get_cd &&
> + host->ops->get_cd(host) == 0)) {

at first I was concerned there could be race conditions with the
different invocations of mmc_rescan(), but IIUC all calls are through
the host->detect work, so only one instance should be running at any
time.

>   mmc_power_off(host);
>   mmc_release_host(host);
>   goto out;
> diff --git a/drivers/mmc/core/sdio_io.c b/drivers/mmc/core/sdio_io.c
> index 2ba00acf64e6..1c5c2a3ebe5e 100644
> --- a/drivers/mmc/core/sdio_io.c
> +++ b/drivers/mmc/core/sdio_io.c
> @@ -811,3 +811,23 @@ void sdio_retune_release(struct sdio_func *func)
>   mmc_retune_release(func->card->host);
>  }
>  EXPORT_SYMBOL_GPL(sdio_retune_release);
> +
> +/**
> + *   sdio_trigger_replug - trigger an "unplug" + "plug" of the card
> + *   @func: SDIO function attached to host
> + *
> + *   When you call this function we will schedule events that will
> + *   make it look like the card contining the given SDIO func was

nit: containing

> + *   unplugged and then re-plugged-in.  This is as close as possible
> + *   to a full reset of the card that can be achieved.
> + *
> + *   NOTE: routnine 

Re: [PATCH v2 3/6] pwm: jz4740: Apply configuration atomically

2019-07-22 Thread Uwe Kleine-König
Hello Paul,

On Fri, Jun 07, 2019 at 05:44:07PM +0200, Paul Cercueil wrote:
> -static int jz4740_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
> -  int duty_ns, int period_ns)
> +static int jz4740_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
> + struct pwm_state *state)
>  {
>   struct jz4740_pwm_chip *jz4740 = to_jz4740(pwm->chip);
>   unsigned long long tmp;
>   unsigned long period, duty;
>   unsigned int prescaler = 0;
>   uint16_t ctrl;
> - bool is_enabled;
>  
> - tmp = (unsigned long long)clk_get_rate(jz4740->clk) * period_ns;
> + tmp = (unsigned long long)clk_get_rate(jz4740->clk) * state->period;
>   do_div(tmp, 10);
>   period = tmp;
>  
> @@ -96,16 +95,14 @@ static int jz4740_pwm_config(struct pwm_chip *chip, 
> struct pwm_device *pwm,
>   if (prescaler == 6)
>   return -EINVAL;
>  
> - tmp = (unsigned long long)period * duty_ns;
> - do_div(tmp, period_ns);
> + tmp = (unsigned long long)period * state->duty_cycle;
> + do_div(tmp, state->period);
>   duty = period - tmp;
>  
>   if (duty >= period)
>   duty = period - 1;
>  
> - is_enabled = jz4740_timer_is_enabled(pwm->hwpwm);
> - if (is_enabled)
> - jz4740_pwm_disable(chip, pwm);
> + jz4740_pwm_disable(chip, pwm);

I assume this stops the PWM. Does this complete the currently running
period? How does the PWM behave then? (Does it still drive the output?
If so, on which level?)

>  
>   jz4740_timer_set_count(pwm->hwpwm, 0);
>   jz4740_timer_set_duty(pwm->hwpwm, duty);

Best regards
Uwe

-- 
Pengutronix e.K.   | Uwe Kleine-König|
Industrial Linux Solutions | http://www.pengutronix.de/  |


Re: [PATCH v3 1/9] smp: Run functions concurrently in smp_call_function_many()

2019-07-22 Thread Peter Zijlstra
On Mon, Jul 22, 2019 at 06:41:44PM +, Nadav Amit wrote:
> > On Jul 22, 2019, at 11:16 AM, Peter Zijlstra  wrote:
> > 
> > On Fri, Jul 19, 2019 at 11:23:06AM -0700, Dave Hansen wrote:
> >> On 7/18/19 5:58 PM, Nadav Amit wrote:
> >>> @@ -624,16 +622,11 @@ EXPORT_SYMBOL(on_each_cpu);
> >>> void on_each_cpu_mask(const struct cpumask *mask, smp_call_func_t func,
> >>>   void *info, bool wait)
> >>> {
> >>> - int cpu = get_cpu();
> >>> + preempt_disable();
> >>> 
> >>> - smp_call_function_many(mask, func, info, wait);
> >>> - if (cpumask_test_cpu(cpu, mask)) {
> >>> - unsigned long flags;
> >>> - local_irq_save(flags);
> >>> - func(info);
> >>> - local_irq_restore(flags);
> >>> - }
> >>> - put_cpu();
> >>> + __smp_call_function_many(mask, func, func, info, wait);
> >>> +
> >>> + preempt_enable();
> >>> }
> >> 
> >> The get_cpu() was missing it too, but it would be nice to add some
> >> comments about why preempt needs to be off.  I was also thinking it
> >> might make sense to do:
> >> 
> >>cfd = get_cpu_var(cfd_data);
> >>__smp_call_function_many(cfd, ...);
> >>put_cpu_var(cfd_data);
> >>
> >> instead of the explicit preempt_enable/disable(), but I don't feel too
> >> strongly about it.
> > 
> > It is also required for cpu hotplug.
> 
> But then smpcfd_dead_cpu() will not respect the “cpu” argument. Do you still
> prefer it this way (instead of the current preempt_enable() /
> preempt_disable())?

I just meant that the preempt_disable() (either form) is required for
hotplug (we must not send IPIs to offline CPUs, that gets things upset).

Personally I don't mind the bare preempt_disable() as you have; but I
think Dave's idea of a comment has merrit.


Re: [PATCH v3 4/9] x86/mm/tlb: Flush remote and local TLBs concurrently

2019-07-22 Thread Peter Zijlstra
On Mon, Jul 22, 2019 at 07:27:09PM +, Nadav Amit wrote:
> > On Jul 22, 2019, at 12:14 PM, Peter Zijlstra  wrote:

> > But then we can still do something like the below, which doesn't change
> > things and still gets rid of that dual function crud, simplifying
> > smp_call_function_many again.

> Nice! I will add it on top, if you don’t mind (instead squashing it).

Not at all.

> The original decision to have local/remote functions was mostly to provide
> the generality.
> 
> I would change the last argument of __smp_call_function_many() from “wait”
> to “flags” that would indicate whether to run the function locally, since I
> don’t want to change the semantics of smp_call_function_many() and decide
> whether to run the function locally purely based on the mask. Let me know if
> you disagree.

Agreed.


Re: [PATCH v4 7/8] dt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board

2019-07-22 Thread Maxime Ripard
On Sat, Jul 20, 2019 at 07:39:08PM +0800, Icenowy Zheng wrote:
>
>
> 于 2019年7月20日 GMT+08:00 下午6:13:18, Maxime Ripard  
> 写到:
> >On Sat, Jul 13, 2019 at 11:46:33AM +0800, Icenowy Zheng wrote:
> >> The Lichee Zero Plus is a core board made by Sipeed, with a microUSB
> >> connector on it, TF slot or WSON8 SD chip, optional eMMC or SPI
> >Flash.
> >> It has a gold finger connector for expansion, and UART is available
> >from
> >> reserved pins w/ 2.54mm pitch. The board can use either SoChip S3 or
> >> Allwinner V3L SoCs.
> >>
> >> Add the device tree binding of the basic version of the core board --
> >> w/o eMMC or SPI Flash, w/ TF slot or WSON8 SD, and use S3 SoC.
> >>
> >> Signed-off-by: Icenowy Zheng 
> >> ---
> >> No changes since v3.
> >>
> >> Patch introduced in v2.
> >>
> >>  Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
> >>  1 file changed, 5 insertions(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml
> >b/Documentation/devicetree/bindings/arm/sunxi.yaml
> >> index 000a00d12d6a..48c126a7a848 100644
> >> --- a/Documentation/devicetree/bindings/arm/sunxi.yaml
> >> +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
> >> @@ -353,6 +353,11 @@ properties:
> >>- const: licheepi,licheepi-zero
> >>- const: allwinner,sun8i-v3s
> >>
> >> +  - description: Lichee Zero Plus (with S3, without eMMC/SPI
> >Flash)
> >> +items:
> >> +  - const: sipeed,lichee-zero-plus
> >> +  - const: allwinner,sun8i-s3
> >
> >If the S3 is just a rebranded V3, then we should have the v3 compatile
> >in that list too.
>
> S3 is V3 with copackaged DDR3 DRAM.
>
> It's pin incompatible w/ V3.

Does it matter though?

If the only thing that changes is the package, we're not manipulating
that, and any software that deals with the v3 can deal with the
s3. Which is what the compatible is about.

Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com


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Re: [PATCH 1/4][V3] spi: Add optional stall delay between cs_change transfers

2019-07-22 Thread Alexandru Ardelean
On Mon, Jul 22, 2019 at 8:42 PM Mark Brown  wrote:
>
> On Mon, Jul 22, 2019 at 03:47:44PM +0300, Alexandru Ardelean wrote:
> > Some devices like the ADIS16460 IMU require a longer period between
> > transfers, i.e. between when the CS is de-asserted and re-asserted. The
> > default value of 10us is not enough. This change makes the delay
> > configurable for when the next CS change goes active, allowing the default
> > to remain 10us is case it is unspecified.
>
> For the third time:
>
> | This looks like cs_change_delay.
>
> >  #define  SPI_NBITS_QUAD  0x04 /* 4bits transfer */
> >   u8  bits_per_word;
> >   u8  word_delay_usecs;
> > + u8  cs_change_delay;
> >   u16 delay_usecs;
> >   u32 speed_hz;
> >   u16 word_delay;
>
> This patch doesn't apply and even if it did it won't compile because you
> are trying to add a field with the same name as an existing one.


now i see;

well, my fault here;
i was basing my patchset on top of branch iio/togreg from Jonathan's
tree for the IMU:
https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git/log/?h=togreg
[ typically that's the base branch for new IIO drivers ]

that one is a bit behind, and does not contain the cs_change_delay
stuff you mentioned;
also, i will admit that sometimes, some review comments are not
completely obvious to me;
i should have checked the SPI tree before opening my mouth, but this
will [hopefully] serve me as a learning experience when sending
multi-subsystem patches
when sending to a single subsystem, it's clear; when sending to 2, i
get a bit lost

i do feel a bit bad for the noise i caused, but it's not the worst
thing i did today

anyway: disregard this, and i will sync with Jonathan about how to
proceed with this patch just for IIO;

thanks for your time and sorry for the noise
Alex


Re: [PATCH v3 4/9] x86/mm/tlb: Flush remote and local TLBs concurrently

2019-07-22 Thread Nadav Amit
> On Jul 22, 2019, at 12:14 PM, Peter Zijlstra  wrote:
> 
> On Thu, Jul 18, 2019 at 05:58:32PM -0700, Nadav Amit wrote:
>> @@ -709,8 +716,9 @@ void native_flush_tlb_others(const struct cpumask 
>> *cpumask,
>>   * doing a speculative memory access.
>>   */
>>  if (info->freed_tables) {
>> -smp_call_function_many(cpumask, flush_tlb_func_remote,
>> -   (void *)info, 1);
>> +__smp_call_function_many(cpumask, flush_tlb_func_remote,
>> + flush_tlb_func_local,
>> + (void *)info, 1);
>>  } else {
>>  /*
>>   * Although we could have used on_each_cpu_cond_mask(),
>> @@ -737,7 +745,8 @@ void native_flush_tlb_others(const struct cpumask 
>> *cpumask,
>>  if (tlb_is_not_lazy(cpu))
>>  __cpumask_set_cpu(cpu, cond_cpumask);
>>  }
>> -smp_call_function_many(cond_cpumask, flush_tlb_func_remote,
>> +__smp_call_function_many(cond_cpumask, flush_tlb_func_remote,
>> + flush_tlb_func_local,
>>   (void *)info, 1);
>>  }
>> }
> 
> Do we really need that _local/_remote distinction? ISTR you had a patch
> that frobbed flush_tlb_info into the csd and that gave space
> constraints, but I'm not seeing that here (probably a wise, get stuff
> merged etc..).
> 
> struct __call_single_data {
>struct llist_node  llist;/* 0 8 */
>smp_call_func_tfunc; /* 8 8 */
>void * info; /*16 8 */
>unsigned int   flags;/*24 4 */
> 
>/* size: 32, cachelines: 1, members: 4 */
>/* padding: 4 */
>/* last cacheline: 32 bytes */
> };
> 
> struct flush_tlb_info {
>struct mm_struct * mm;   /* 0 8 */
>long unsigned int  start;/* 8 8 */
>long unsigned int  end;  /*16 8 */
>u64new_tlb_gen;  /*24 8 */
>unsigned int   stride_shift; /*32 4 */
>bool   freed_tables; /*36 1 */
> 
>/* size: 40, cachelines: 1, members: 6 */
>/* padding: 3 */
>/* last cacheline: 40 bytes */
> };
> 
> IIRC what you did was make void *__call_single_data::info the last
> member and a union until the full cacheline size (64). Given the above
> that would get us 24 bytes for csd, leaving us 40 for that
> flush_tlb_info.
> 
> But then we can still do something like the below, which doesn't change
> things and still gets rid of that dual function crud, simplifying
> smp_call_function_many again.
> 
> Index: linux-2.6/arch/x86/include/asm/tlbflush.h
> ===
> --- linux-2.6.orig/arch/x86/include/asm/tlbflush.h
> +++ linux-2.6/arch/x86/include/asm/tlbflush.h
> @@ -546,8 +546,9 @@ struct flush_tlb_info {
>   unsigned long   start;
>   unsigned long   end;
>   u64 new_tlb_gen;
> - unsigned intstride_shift;
> - boolfreed_tables;
> + unsigned intcpu;
> + unsigned short  stride_shift;
> + unsigned char   freed_tables;
> };
> 
> #define local_flush_tlb() __flush_tlb()
> Index: linux-2.6/arch/x86/mm/tlb.c
> ===
> --- linux-2.6.orig/arch/x86/mm/tlb.c
> +++ linux-2.6/arch/x86/mm/tlb.c
> @@ -659,6 +659,27 @@ static void flush_tlb_func_remote(void *
>   flush_tlb_func_common(f, false, TLB_REMOTE_SHOOTDOWN);
> }
> 
> +static void flush_tlb_func(void *info)
> +{
> + const struct flush_tlb_info *f = info;
> + enum tlb_flush_reason reason = TLB_REMOTE_SHOOTDOWN;
> + bool local = false;
> +
> + if (f->cpu == smp_processor_id()) {
> + local = true;
> + reason = (f->mm == NULL) ? TLB_LOCAL_SHOOTDOWN : 
> TLB_LOCAL_MM_SHOOTDOWN;
> + } else {
> + inc_irq_stat(irq_tlb_count);
> +
> + if (f->mm && f->mm != this_cpu_read(cpu_tlbstate.loaded_mm))
> + return;
> +
> + count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED);
> + }
> +
> + flush_tlb_func_common(f, local, reason);
> +}
> +
> static bool tlb_is_not_lazy(int cpu)
> {
>   return !per_cpu(cpu_tlbstate_shared.is_lazy, cpu);

Nice! I will add it on top, if you don’t mind (instead squashing it).

The original decision to have local/remote functions was mostly to provide
the generality.

I would change the last argument of __smp_call_function_many() from “wait”
to “flags” that would indicate whether to run the function locally, 

Re: [PATCH] .gitignore: Add compilation database files

2019-07-22 Thread Nick Desaulniers
On Sun, Jul 21, 2019 at 1:54 AM Toru Komatsu  wrote:
>
> This file is used by clangd to use language server protocol.
> It can be generated at each compile using scripts/gen_compile_commands.py.
> Therefore it is different depending on the environment and should be
> ignored.
>
> Signed-off-by: Toru Komatsu 
> ---
>  .gitignore | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/.gitignore b/.gitignore
> index 8f5422cba6e2..025d887f64f1 100644
> --- a/.gitignore
> +++ b/.gitignore
> @@ -142,3 +142,6 @@ x509.genkey
>
>  # Kdevelop4
>  *.kdev4
> +
> +# Clang's compilation database files
> +/compile_commands.json

Thanks for the patch!
Reviewed-by: Nick Desaulniers 
Also, if you're doing anything exciting with compile_commands.json,
I'd love to know.  We're using it for static analyses.

-- 
Thanks,
~Nick Desaulniers


Re: [PATCH v8 0/7] Unify CPU topology across ARM & RISC-V

2019-07-22 Thread Paul Walmsley
On Fri, 12 Jul 2019, Paul Walmsley wrote:

> On Thu, 27 Jun 2019, Atish Patra wrote:
> 
> > The cpu-map DT entry in ARM can describe the CPU topology in much better
> > way compared to other existing approaches. RISC-V can easily adopt this
> > binding to represent its own CPU topology. Thus, both cpu-map DT
> > binding and topology parsing code can be moved to a common location so
> > that RISC-V or any other architecture can leverage that.
> > different config for the architectures that do not support them.
>
> Once v5.3-rc1 is released, let's plan to get these patches rebased and 
> reposted and into linux-next as soon as possible.

These CPU topology patches are now queued for v5.4-rc1.  They should enter 
linux-next shortly.


- Paul


Re: [PATCH v3 1/9] smp: Run functions concurrently in smp_call_function_many()

2019-07-22 Thread Peter Zijlstra
On Mon, Jul 22, 2019 at 06:34:22PM +, Nadav Amit wrote:
> > On Jul 22, 2019, at 11:21 AM, Peter Zijlstra  wrote:
> > 
> > On Thu, Jul 18, 2019 at 05:58:29PM -0700, Nadav Amit wrote:
> >> +/*
> >> + * Call a function on all processors.  May be used during early boot while
> >> + * early_boot_irqs_disabled is set.
> >> + */
> >> +static inline void on_each_cpu(smp_call_func_t func, void *info, int wait)
> >> +{
> >> +  on_each_cpu_mask(cpu_online_mask, func, info, wait);
> >> +}
> > 
> > I'm thinking that one if buggy, nothing protects online mask here.
> 
> on_each_cpu_mask() calls __on_each_cpu_mask() which would disable preemption.
> The mask might change, but anyhow __smp_call_function_many() would “and” it,
> after disabling preemption, with (the potentially updated) cpu_online_mask.

Ah, indeed, as long as we double check the state after disabling
preemption things should be fine.

> What is your concern?

Pavlov reaction to seeing a naked cpu_online_mask :-)



Re: [5.2 REGRESSION] Generic vDSO breaks seccomp-enabled userspace on i386

2019-07-22 Thread Andy Lutomirski
On Mon, Jul 22, 2019 at 11:39 AM Kees Cook  wrote:
>
> On Mon, Jul 22, 2019 at 08:31:32PM +0200, Thomas Gleixner wrote:
> > On Mon, 22 Jul 2019, Kees Cook wrote:
> > > Just so I'm understanding: the vDSO change introduced code to make an
> > > actual syscall on i386, which for most seccomp filters would be rejected?
> >
> > No. The old x86 specific VDSO implementation had a fallback syscall as
> > well, i.e. clock_gettime(). On 32bit clock_gettime() uses the y2038
> > endangered timespec.
> >
> > So when the VDSO was made generic we changed the internal data structures
> > to be 2038 safe right away. As a consequence the fallback syscall is not
> > clock_gettime(), it's clock_gettime64(). which seems to surprise seccomp.
>
> Okay, it's didn't add a syscall, it just changed it. Results are the
> same: conservative filters suddenly start breaking due to the different
> call. (And now I see why Andy's alias suggestion would help...)
>
> I'm not sure which direction to do with this. It seems like an alias
> list is a large hammer for this case, and a "seccomp-bypass when calling
> from vDSO" solution seems too fragile?
>

I don't like the seccomp bypass at all.  If someone uses seccomp to
disallow all clock_gettime() variants, there shouldn't be a back door
to learn the time.

Here's the restart_syscall() logic that makes me want aliases: we have
different syscall numbers for restart_syscall() on 32-bit and 64-bit.
The logic to decide which one to use is dubious at best.  I'd like to
introduce a restart_syscall2() that is identical to restart_syscall()
except that it has the same number on both variants.

--Andy


[PATCH 3/3] uio: remove netx driver

2019-07-22 Thread Arnd Bergmann
The netx platform got removed, so this driver is now
useless.

Signed-off-by: Arnd Bergmann 
---
 drivers/uio/Kconfig|  11 ---
 drivers/uio/Makefile   |   1 -
 drivers/uio/uio_netx.c | 178 -
 3 files changed, 190 deletions(-)
 delete mode 100644 drivers/uio/uio_netx.c

diff --git a/drivers/uio/Kconfig b/drivers/uio/Kconfig
index 202ee81cfc2b..abc8dd97b474 100644
--- a/drivers/uio/Kconfig
+++ b/drivers/uio/Kconfig
@@ -94,17 +94,6 @@ config UIO_PCI_GENERIC
  primarily, for virtualization scenarios.
  If you compile this as a module, it will be called uio_pci_generic.
 
-config UIO_NETX
-   tristate "Hilscher NetX Card driver"
-   depends on PCI
-   help
- Driver for Hilscher NetX based fieldbus cards (cifX, comX).
- This driver requires a userspace component that comes with the card
- or is available from Hilscher (http://www.hilscher.com).
-
- To compile this driver as a module, choose M here; the module
- will be called uio_netx.
-
 config UIO_FSL_ELBC_GPCM
tristate "eLBC/GPCM driver"
depends on FSL_LBC
diff --git a/drivers/uio/Makefile b/drivers/uio/Makefile
index c285dd2a4539..d94012263a42 100644
--- a/drivers/uio/Makefile
+++ b/drivers/uio/Makefile
@@ -6,7 +6,6 @@ obj-$(CONFIG_UIO_DMEM_GENIRQ)   += uio_dmem_genirq.o
 obj-$(CONFIG_UIO_AEC)  += uio_aec.o
 obj-$(CONFIG_UIO_SERCOS3)  += uio_sercos3.o
 obj-$(CONFIG_UIO_PCI_GENERIC)  += uio_pci_generic.o
-obj-$(CONFIG_UIO_NETX) += uio_netx.o
 obj-$(CONFIG_UIO_PRUSS) += uio_pruss.o
 obj-$(CONFIG_UIO_MF624) += uio_mf624.o
 obj-$(CONFIG_UIO_FSL_ELBC_GPCM)+= uio_fsl_elbc_gpcm.o
diff --git a/drivers/uio/uio_netx.c b/drivers/uio/uio_netx.c
deleted file mode 100644
index 9ae29ffde410..
--- a/drivers/uio/uio_netx.c
+++ /dev/null
@@ -1,178 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * UIO driver for Hilscher NetX based fieldbus cards (cifX, comX).
- * See http://www.hilscher.com for details.
- *
- * (C) 2007 Hans J. Koch 
- * (C) 2008 Manuel Traut 
- *
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#define PCI_VENDOR_ID_HILSCHER 0x15CF
-#define PCI_DEVICE_ID_HILSCHER_NETX0x
-#define PCI_DEVICE_ID_HILSCHER_NETPLC  0x0010
-#define PCI_SUBDEVICE_ID_NETPLC_RAM0x
-#define PCI_SUBDEVICE_ID_NETPLC_FLASH  0x0001
-#define PCI_SUBDEVICE_ID_NXSB_PCA  0x3235
-#define PCI_SUBDEVICE_ID_NXPCA 0x3335
-
-#define DPM_HOST_INT_EN0   0xfff0
-#define DPM_HOST_INT_STAT0 0xffe0
-
-#define DPM_HOST_INT_MASK  0xe600
-#define DPM_HOST_INT_GLOBAL_EN 0x8000
-
-static irqreturn_t netx_handler(int irq, struct uio_info *dev_info)
-{
-   void __iomem *int_enable_reg = dev_info->mem[0].internal_addr
-   + DPM_HOST_INT_EN0;
-   void __iomem *int_status_reg = dev_info->mem[0].internal_addr
-   + DPM_HOST_INT_STAT0;
-
-   /* Is one of our interrupts enabled and active ? */
-   if (!(ioread32(int_enable_reg) & ioread32(int_status_reg)
-   & DPM_HOST_INT_MASK))
-   return IRQ_NONE;
-
-   /* Disable interrupt */
-   iowrite32(ioread32(int_enable_reg) & ~DPM_HOST_INT_GLOBAL_EN,
-   int_enable_reg);
-   return IRQ_HANDLED;
-}
-
-static int netx_pci_probe(struct pci_dev *dev,
-   const struct pci_device_id *id)
-{
-   struct uio_info *info;
-   int bar;
-
-   info = kzalloc(sizeof(struct uio_info), GFP_KERNEL);
-   if (!info)
-   return -ENOMEM;
-
-   if (pci_enable_device(dev))
-   goto out_free;
-
-   if (pci_request_regions(dev, "netx"))
-   goto out_disable;
-
-   switch (id->device) {
-   case PCI_DEVICE_ID_HILSCHER_NETX:
-   bar = 0;
-   info->name = "netx";
-   break;
-   case PCI_DEVICE_ID_HILSCHER_NETPLC:
-   bar = 0;
-   info->name = "netplc";
-   break;
-   default:
-   bar = 2;
-   info->name = "netx_plx";
-   }
-
-   /* BAR0 or 2 points to the card's dual port memory */
-   info->mem[0].addr = pci_resource_start(dev, bar);
-   if (!info->mem[0].addr)
-   goto out_release;
-   info->mem[0].internal_addr = ioremap(pci_resource_start(dev, bar),
-   pci_resource_len(dev, bar));
-
-   if (!info->mem[0].internal_addr)
-   goto out_release;
-
-   info->mem[0].size = pci_resource_len(dev, bar);
-   info->mem[0].memtype = UIO_MEM_PHYS;
-   info->irq = dev->irq;
-   info->irq_flags = IRQF_SHARED;
-   info->handler = netx_handler;
-   info->version = "0.0.1";
-
-   /* Make sure all interrupts are disabled */
-   iowrite32(0, info->mem[0].internal_addr + DPM_HOST_INT_EN0);
-
-   if 

[PATCH 2/3] serial: remove netx serial driver

2019-07-22 Thread Arnd Bergmann
The netx platform got removed, so this driver is now
useless.

Signed-off-by: Arnd Bergmann 
---
 drivers/tty/serial/Kconfig   |  19 -
 drivers/tty/serial/Makefile  |   1 -
 drivers/tty/serial/netx-serial.c | 733 ---
 include/uapi/linux/serial_core.h |   2 +-
 4 files changed, 1 insertion(+), 754 deletions(-)
 delete mode 100644 drivers/tty/serial/netx-serial.c

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 6393e5960813..bdacaa5c1618 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1035,25 +1035,6 @@ config SERIAL_VT8500_CONSOLE
depends on SERIAL_VT8500=y
select SERIAL_CORE_CONSOLE
 
-config SERIAL_NETX
-   tristate "NetX serial port support"
-   depends on ARCH_NETX
-   select SERIAL_CORE
-   help
- If you have a machine based on a Hilscher NetX SoC you
- can enable its onboard serial port by enabling this option.
-
-  To compile this driver as a module, choose M here: the
-  module will be called netx-serial.
-
-config SERIAL_NETX_CONSOLE
-   bool "Console on NetX serial port"
-   depends on SERIAL_NETX=y
-   select SERIAL_CORE_CONSOLE
-   help
- If you have enabled the serial port on the Hilscher NetX SoC
- you can make it the console by answering Y to this option.
-
 config SERIAL_OMAP
tristate "OMAP serial port support"
depends on ARCH_OMAP2PLUS
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index 12fd93cc7b0f..ca520d8774cf 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -59,7 +59,6 @@ obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o
 obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
 obj-$(CONFIG_SERIAL_MSM) += msm_serial.o
 obj-$(CONFIG_SERIAL_QCOM_GENI) += qcom_geni_serial.o
-obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
 obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
 obj-$(CONFIG_SERIAL_OMAP) += omap-serial.o
 obj-$(CONFIG_SERIAL_ALTERA_UART) += altera_uart.o
diff --git a/drivers/tty/serial/netx-serial.c b/drivers/tty/serial/netx-serial.c
deleted file mode 100644
index b3556863491f..
--- a/drivers/tty/serial/netx-serial.c
+++ /dev/null
@@ -1,733 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2005 Sascha Hauer , Pengutronix
- */
-
-#if defined(CONFIG_SERIAL_NETX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
-#define SUPPORT_SYSRQ
-#endif
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-
-/* We've been assigned a range on the "Low-density serial ports" major */
-#define SERIAL_NX_MAJOR204
-#define MINOR_START170
-
-enum uart_regs {
-   UART_DR  = 0x00,
-   UART_SR  = 0x04,
-   UART_LINE_CR = 0x08,
-   UART_BAUDDIV_MSB = 0x0c,
-   UART_BAUDDIV_LSB = 0x10,
-   UART_CR  = 0x14,
-   UART_FR  = 0x18,
-   UART_IIR = 0x1c,
-   UART_ILPR= 0x20,
-   UART_RTS_CR  = 0x24,
-   UART_RTS_LEAD= 0x28,
-   UART_RTS_TRAIL   = 0x2c,
-   UART_DRV_ENABLE  = 0x30,
-   UART_BRM_CR  = 0x34,
-   UART_RXFIFO_IRQLEVEL = 0x38,
-   UART_TXFIFO_IRQLEVEL = 0x3c,
-};
-
-#define SR_FE (1<<0)
-#define SR_PE (1<<1)
-#define SR_BE (1<<2)
-#define SR_OE (1<<3)
-
-#define LINE_CR_BRK   (1<<0)
-#define LINE_CR_PEN   (1<<1)
-#define LINE_CR_EPS   (1<<2)
-#define LINE_CR_STP2  (1<<3)
-#define LINE_CR_FEN   (1<<4)
-#define LINE_CR_5BIT  (0<<5)
-#define LINE_CR_6BIT  (1<<5)
-#define LINE_CR_7BIT  (2<<5)
-#define LINE_CR_8BIT  (3<<5)
-#define LINE_CR_BITS_MASK (3<<5)
-
-#define CR_UART_EN (1<<0)
-#define CR_SIREN   (1<<1)
-#define CR_SIRLP   (1<<2)
-#define CR_MSIE(1<<3)
-#define CR_RIE (1<<4)
-#define CR_TIE (1<<5)
-#define CR_RTIE(1<<6)
-#define CR_LBE (1<<7)
-
-#define FR_CTS  (1<<0)
-#define FR_DSR  (1<<1)
-#define FR_DCD  (1<<2)
-#define FR_BUSY (1<<3)
-#define FR_RXFE (1<<4)
-#define FR_TXFF (1<<5)
-#define FR_RXFF (1<<6)
-#define FR_TXFE (1<<7)
-
-#define IIR_MIS (1<<0)
-#define IIR_RIS (1<<1)
-#define IIR_TIS (1<<2)
-#define IIR_RTIS (1<<3)
-#define IIR_MASK 0xf
-
-#define RTS_CR_AUTO (1<<0)
-#define RTS_CR_RTS  (1<<1)
-#define RTS_CR_COUNT (1<<2)
-#define RTS_CR_MOD2  (1<<3)
-#define RTS_CR_RTS_POL (1<<4)
-#define RTS_CR_CTS_CTR (1<<5)
-#define RTS_CR_CTS_POL (1<<6)
-#define RTS_CR_STICK   (1<<7)
-
-#define UART_PORT_SIZE 0x40
-#define DRIVER_NAME "netx-uart"
-
-struct netx_port {
-   struct uart_portport;
-};
-
-static void netx_stop_tx(struct uart_port *port)
-{
-   unsigned int val;
-   val = readl(port->membase + UART_CR);
-   writel(val & ~CR_TIE,  port->membase + UART_CR);
-}
-
-static void netx_stop_rx(struct uart_port *port)
-{
-   unsigned int val;
-   val = 

[PATCH 1/3] [net-next] net: remove netx ethernet driver

2019-07-22 Thread Arnd Bergmann
The ARM netx platform got removed in 5.3, so this driver
is now useless.

Signed-off-by: Arnd Bergmann 
---
 drivers/net/ethernet/Kconfig   |  11 -
 drivers/net/ethernet/Makefile  |   1 -
 drivers/net/ethernet/netx-eth.c| 497 -
 include/linux/platform_data/eth-netx.h |  13 -
 4 files changed, 522 deletions(-)
 delete mode 100644 drivers/net/ethernet/netx-eth.c
 delete mode 100644 include/linux/platform_data/eth-netx.h

diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index 93a2d4deb27c..4a7ab1c2e22c 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -140,17 +140,6 @@ source "drivers/net/ethernet/neterion/Kconfig"
 source "drivers/net/ethernet/netronome/Kconfig"
 source "drivers/net/ethernet/ni/Kconfig"
 source "drivers/net/ethernet/8390/Kconfig"
-
-config NET_NETX
-   tristate "NetX Ethernet support"
-   select MII
-   depends on ARCH_NETX
-   ---help---
- This is support for the Hilscher netX builtin Ethernet ports
-
- To compile this driver as a module, choose M here. The module
- will be called netx-eth.
-
 source "drivers/net/ethernet/nuvoton/Kconfig"
 source "drivers/net/ethernet/nvidia/Kconfig"
 source "drivers/net/ethernet/nxp/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index fb9155cffcff..36fca4563201 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -64,7 +64,6 @@ obj-$(CONFIG_NET_VENDOR_NATSEMI) += natsemi/
 obj-$(CONFIG_NET_VENDOR_NETERION) += neterion/
 obj-$(CONFIG_NET_VENDOR_NETRONOME) += netronome/
 obj-$(CONFIG_NET_VENDOR_NI) += ni/
-obj-$(CONFIG_NET_NETX) += netx-eth.o
 obj-$(CONFIG_NET_VENDOR_NUVOTON) += nuvoton/
 obj-$(CONFIG_NET_VENDOR_NVIDIA) += nvidia/
 obj-$(CONFIG_LPC_ENET) += nxp/
diff --git a/drivers/net/ethernet/netx-eth.c b/drivers/net/ethernet/netx-eth.c
deleted file mode 100644
index cf6e7eb1b1e1..
--- a/drivers/net/ethernet/netx-eth.c
+++ /dev/null
@@ -1,497 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * drivers/net/ethernet/netx-eth.c
- *
- * Copyright (c) 2005 Sascha Hauer , Pengutronix
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-/* XC Fifo Offsets */
-#define EMPTY_PTR_FIFO(xcno)(0 + ((xcno) << 3))/* Index of the empty 
pointer FIFO */
-#define IND_FIFO_PORT_HI(xcno)  (1 + ((xcno) << 3))/* Index of the FIFO 
where received */
-   /* Data packages are 
indicated by XC */
-#define IND_FIFO_PORT_LO(xcno)  (2 + ((xcno) << 3))/* Index of the FIFO 
where received */
-   /* Data packages are 
indicated by XC */
-#define REQ_FIFO_PORT_HI(xcno)  (3 + ((xcno) << 3))/* Index of the FIFO 
where Data packages */
-   /* have to be indicated 
by ARM which */
-   /* shall be sent */
-#define REQ_FIFO_PORT_LO(xcno)  (4 + ((xcno) << 3))/* Index of the FIFO 
where Data packages */
-   /* have to be indicated 
by ARM which shall */
-   /* be sent */
-#define CON_FIFO_PORT_HI(xcno)  (5 + ((xcno) << 3))/* Index of the FIFO 
where sent Data packages */
-   /* are confirmed */
-#define CON_FIFO_PORT_LO(xcno)  (6 + ((xcno) << 3))/* Index of the FIFO 
where sent Data */
-   /* packages are 
confirmed */
-#define PFIFO_MASK(xcno)(0x7f << (xcno*8))
-
-#define FIFO_PTR_FRAMELEN_SHIFT 0
-#define FIFO_PTR_FRAMELEN_MASK  (0x7ff << 0)
-#define FIFO_PTR_FRAMELEN(len)  (((len) << 0) & FIFO_PTR_FRAMELEN_MASK)
-#define FIFO_PTR_TIMETRIG   (1<<11)
-#define FIFO_PTR_MULTI_REQ
-#define FIFO_PTR_ORIGIN (1<<14)
-#define FIFO_PTR_VLAN   (1<<15)
-#define FIFO_PTR_FRAMENO_SHIFT  16
-#define FIFO_PTR_FRAMENO_MASK   (0x3f << 16)
-#define FIFO_PTR_FRAMENO(no)(((no) << 16) & FIFO_PTR_FRAMENO_MASK)
-#define FIFO_PTR_SEGMENT_SHIFT  22
-#define FIFO_PTR_SEGMENT_MASK   (0xf << 22)
-#define FIFO_PTR_SEGMENT(seg)   (((seg) & 0xf) << 22)
-#define FIFO_PTR_ERROR_SHIFT28
-#define FIFO_PTR_ERROR_MASK (0xf << 28)
-
-#define ISR_LINK_STATUS_CHANGE (1<<4)
-#define ISR_IND_LO (1<<3)
-#define ISR_CON_LO (1<<2)
-#define ISR_IND_HI (1<<1)
-#define ISR_CON_HI (1<<0)
-
-#define ETH_MAC_LOCAL_CONFIG 0x1560
-#define ETH_MAC_4321 0x1564
-#define ETH_MAC_65   0x1568
-
-#define MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT 16
-#define MAC_TRAFFIC_CLASS_ARRANGEMENT_MASK 
(0xflen;
-
-   

Re: [PATCH] drm/amdgpu/gfx10: Fix missing break in switch statement

2019-07-22 Thread Gustavo A. R. Silva



On 7/22/19 2:12 PM, Alex Deucher wrote:
> On Sun, Jul 21, 2019 at 6:39 PM Gustavo A. R. Silva
>  wrote:
>>
>> Add missing break statement in order to prevent the code from falling
>> through to case AMDGPU_IRQ_STATE_ENABLE.
>>
>> This bug was found thanks to the ongoing efforts to enable
>> -Wimplicit-fallthrough.
>>
>> Fixes: a644d85a5cd4 ("drm/amdgpu: add gfx v10 implementation (v10)")
>> Cc: sta...@vger.kernel.org
>> Signed-off-by: Gustavo A. R. Silva 
> 
> Applied.  Thanks!
> 

Awesome! Glad to help. :)

Thanks
--
Gustavo


Re: [PATCH v3 4/9] x86/mm/tlb: Flush remote and local TLBs concurrently

2019-07-22 Thread Peter Zijlstra
On Thu, Jul 18, 2019 at 05:58:32PM -0700, Nadav Amit wrote:
> @@ -709,8 +716,9 @@ void native_flush_tlb_others(const struct cpumask 
> *cpumask,
>* doing a speculative memory access.
>*/
>   if (info->freed_tables) {
> - smp_call_function_many(cpumask, flush_tlb_func_remote,
> -(void *)info, 1);
> + __smp_call_function_many(cpumask, flush_tlb_func_remote,
> +  flush_tlb_func_local,
> +  (void *)info, 1);
>   } else {
>   /*
>* Although we could have used on_each_cpu_cond_mask(),
> @@ -737,7 +745,8 @@ void native_flush_tlb_others(const struct cpumask 
> *cpumask,
>   if (tlb_is_not_lazy(cpu))
>   __cpumask_set_cpu(cpu, cond_cpumask);
>   }
> - smp_call_function_many(cond_cpumask, flush_tlb_func_remote,
> + __smp_call_function_many(cond_cpumask, flush_tlb_func_remote,
> +  flush_tlb_func_local,
>(void *)info, 1);
>   }
>  }

Do we really need that _local/_remote distinction? ISTR you had a patch
that frobbed flush_tlb_info into the csd and that gave space
constraints, but I'm not seeing that here (probably a wise, get stuff
merged etc..).

struct __call_single_data {
struct llist_node  llist;/* 0 8 */
smp_call_func_tfunc; /* 8 8 */
void * info; /*16 8 */
unsigned int   flags;/*24 4 */

/* size: 32, cachelines: 1, members: 4 */
/* padding: 4 */
/* last cacheline: 32 bytes */
};

struct flush_tlb_info {
struct mm_struct * mm;   /* 0 8 */
long unsigned int  start;/* 8 8 */
long unsigned int  end;  /*16 8 */
u64new_tlb_gen;  /*24 8 */
unsigned int   stride_shift; /*32 4 */
bool   freed_tables; /*36 1 */

/* size: 40, cachelines: 1, members: 6 */
/* padding: 3 */
/* last cacheline: 40 bytes */
};

IIRC what you did was make void *__call_single_data::info the last
member and a union until the full cacheline size (64). Given the above
that would get us 24 bytes for csd, leaving us 40 for that
flush_tlb_info.

But then we can still do something like the below, which doesn't change
things and still gets rid of that dual function crud, simplifying
smp_call_function_many again.

Index: linux-2.6/arch/x86/include/asm/tlbflush.h
===
--- linux-2.6.orig/arch/x86/include/asm/tlbflush.h
+++ linux-2.6/arch/x86/include/asm/tlbflush.h
@@ -546,8 +546,9 @@ struct flush_tlb_info {
unsigned long   start;
unsigned long   end;
u64 new_tlb_gen;
-   unsigned intstride_shift;
-   boolfreed_tables;
+   unsigned intcpu;
+   unsigned short  stride_shift;
+   unsigned char   freed_tables;
 };
 
 #define local_flush_tlb() __flush_tlb()
Index: linux-2.6/arch/x86/mm/tlb.c
===
--- linux-2.6.orig/arch/x86/mm/tlb.c
+++ linux-2.6/arch/x86/mm/tlb.c
@@ -659,6 +659,27 @@ static void flush_tlb_func_remote(void *
flush_tlb_func_common(f, false, TLB_REMOTE_SHOOTDOWN);
 }
 
+static void flush_tlb_func(void *info)
+{
+   const struct flush_tlb_info *f = info;
+   enum tlb_flush_reason reason = TLB_REMOTE_SHOOTDOWN;
+   bool local = false;
+
+   if (f->cpu == smp_processor_id()) {
+   local = true;
+   reason = (f->mm == NULL) ? TLB_LOCAL_SHOOTDOWN : 
TLB_LOCAL_MM_SHOOTDOWN;
+   } else {
+   inc_irq_stat(irq_tlb_count);
+
+   if (f->mm && f->mm != this_cpu_read(cpu_tlbstate.loaded_mm))
+   return;
+
+   count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED);
+   }
+
+   flush_tlb_func_common(f, local, reason);
+}
+
 static bool tlb_is_not_lazy(int cpu)
 {
return !per_cpu(cpu_tlbstate_shared.is_lazy, cpu);



Re: [PATCH v2 6/7] dt-bindings: net: realtek: Add property to configure LED mode

2019-07-22 Thread Matthias Kaehlcke
Hi Andrew,

On Mon, Jul 22, 2019 at 09:01:33PM +0200, Andrew Lunn wrote:
> On Mon, Jul 22, 2019 at 10:14:18AM -0700, Matthias Kaehlcke wrote:
> > I'm working on a generic binding.
> > 
> > I wonder what is the best process for reviewing/landing it, I'm
> > doubting between two options:
> > 
> > a) only post the binding doc and the generic PHY code that reads
> >the configuration from the DT. Post Realtek patches once
> >the binding/generic code has been acked.
> > 
> >pros: no churn from Realtek specific patches
> >cons: initially no (real) user of the new binding
> > 
> > b) post generic and Realtek changes together
> > 
> >pros: the binding has a user initially
> >cons: churn from Realtek specific patches
> > 
> > I can do either, depending on what maintainers/reviewers prefer. I'm
> > slightly inclined towards a)
> 
> Hi Matthias
> 
> It is normal to include one user of any generic API which is added,
> just to make is clear how an API should be used.

as of now it isn't even an API, the phy_device populates a new array
in its struct with the values from the DT. PHY drivers access the
array directly. Is it still preferable to post everything together?

(maybe I'm too concerned about 'noise' from the driver patches while
 we are figuring out what exactly the binding should be).

Thanks

Matthias


Re: [PATCH] drm/amdkfd/kfd_mqd_manager_v10: Avoid fall-through warning

2019-07-22 Thread Alex Deucher
Applied.  Thanks!

Alex

On Mon, Jul 22, 2019 at 2:14 PM Liu, Shaoyun  wrote:
>
> Reviewed-by:  shaoyunl 
>
> On 2019-07-22 1:47 p.m., Gustavo A. R. Silva wrote:
> > In preparation to enabling -Wimplicit-fallthrough, this patch silences
> > the following warning:
> >
> > drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v10.c: In function 
> > ‘mqd_manager_init_v10’:
> > ./include/linux/dynamic_debug.h:122:52: warning: this statement may fall 
> > through [-Wimplicit-fallthrough=]
> >   #define __dynamic_func_call(id, fmt, func, ...) do { \
> >  ^
> > ./include/linux/dynamic_debug.h:143:2: note: in expansion of macro 
> > ‘__dynamic_func_call’
> >__dynamic_func_call(__UNIQUE_ID(ddebug), fmt, func, ##__VA_ARGS__)
> >^~~
> > ./include/linux/dynamic_debug.h:153:2: note: in expansion of macro 
> > ‘_dynamic_func_call’
> >_dynamic_func_call(fmt, __dynamic_pr_debug,  \
> >^~
> > ./include/linux/printk.h:336:2: note: in expansion of macro 
> > ‘dynamic_pr_debug’
> >dynamic_pr_debug(fmt, ##__VA_ARGS__)
> >^~~~
> > drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v10.c:432:3: note: in 
> > expansion of macro ‘pr_debug’
> > pr_debug("%s@%i\n", __func__, __LINE__);
> > ^~~~
> > drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v10.c:433:2: note: here
> >case KFD_MQD_TYPE_COMPUTE:
> >^~~~
> >
> > by removing the call to pr_debug() in KFD_MQD_TYPE_CP:
> >
> > "The mqd init for CP and COMPUTE will have the same  routine." [1]
> >
> > This bug was found thanks to the ongoing efforts to enable
> > -Wimplicit-fallthrough.
> >
> > [1] 
> > https://lore.kernel.org/lkml/c735a1cc-a545-50fb-44e7-c0ad93ee8...@amd.com/
> >
> > Signed-off-by: Gustavo A. R. Silva 
> > ---
> >   drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c | 1 -
> >   1 file changed, 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c 
> > b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
> > index 4f8a6ffc5775..9cd3eb2d90bd 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
> > @@ -429,7 +429,6 @@ struct mqd_manager *mqd_manager_init_v10(enum 
> > KFD_MQD_TYPE type,
> >
> >   switch (type) {
> >   case KFD_MQD_TYPE_CP:
> > - pr_debug("%s@%i\n", __func__, __LINE__);
> >   case KFD_MQD_TYPE_COMPUTE:
> >   pr_debug("%s@%i\n", __func__, __LINE__);
> >   mqd->allocate_mqd = allocate_mqd;
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel


[PATCH 1/3] [net-next] net: remove netx ethernet driver

2019-07-22 Thread Arnd Bergmann
The ARM netx platform got removed in 5.3, so this driver
is now useless.

Signed-off-by: Arnd Bergmann 
---
 drivers/net/ethernet/Kconfig   |  11 -
 drivers/net/ethernet/Makefile  |   1 -
 drivers/net/ethernet/netx-eth.c| 497 -
 include/linux/platform_data/eth-netx.h |  13 -
 4 files changed, 522 deletions(-)
 delete mode 100644 drivers/net/ethernet/netx-eth.c
 delete mode 100644 include/linux/platform_data/eth-netx.h

diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index 93a2d4deb27c..4a7ab1c2e22c 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -140,17 +140,6 @@ source "drivers/net/ethernet/neterion/Kconfig"
 source "drivers/net/ethernet/netronome/Kconfig"
 source "drivers/net/ethernet/ni/Kconfig"
 source "drivers/net/ethernet/8390/Kconfig"
-
-config NET_NETX
-   tristate "NetX Ethernet support"
-   select MII
-   depends on ARCH_NETX
-   ---help---
- This is support for the Hilscher netX builtin Ethernet ports
-
- To compile this driver as a module, choose M here. The module
- will be called netx-eth.
-
 source "drivers/net/ethernet/nuvoton/Kconfig"
 source "drivers/net/ethernet/nvidia/Kconfig"
 source "drivers/net/ethernet/nxp/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index fb9155cffcff..36fca4563201 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -64,7 +64,6 @@ obj-$(CONFIG_NET_VENDOR_NATSEMI) += natsemi/
 obj-$(CONFIG_NET_VENDOR_NETERION) += neterion/
 obj-$(CONFIG_NET_VENDOR_NETRONOME) += netronome/
 obj-$(CONFIG_NET_VENDOR_NI) += ni/
-obj-$(CONFIG_NET_NETX) += netx-eth.o
 obj-$(CONFIG_NET_VENDOR_NUVOTON) += nuvoton/
 obj-$(CONFIG_NET_VENDOR_NVIDIA) += nvidia/
 obj-$(CONFIG_LPC_ENET) += nxp/
diff --git a/drivers/net/ethernet/netx-eth.c b/drivers/net/ethernet/netx-eth.c
deleted file mode 100644
index cf6e7eb1b1e1..
--- a/drivers/net/ethernet/netx-eth.c
+++ /dev/null
@@ -1,497 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * drivers/net/ethernet/netx-eth.c
- *
- * Copyright (c) 2005 Sascha Hauer , Pengutronix
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-/* XC Fifo Offsets */
-#define EMPTY_PTR_FIFO(xcno)(0 + ((xcno) << 3))/* Index of the empty 
pointer FIFO */
-#define IND_FIFO_PORT_HI(xcno)  (1 + ((xcno) << 3))/* Index of the FIFO 
where received */
-   /* Data packages are 
indicated by XC */
-#define IND_FIFO_PORT_LO(xcno)  (2 + ((xcno) << 3))/* Index of the FIFO 
where received */
-   /* Data packages are 
indicated by XC */
-#define REQ_FIFO_PORT_HI(xcno)  (3 + ((xcno) << 3))/* Index of the FIFO 
where Data packages */
-   /* have to be indicated 
by ARM which */
-   /* shall be sent */
-#define REQ_FIFO_PORT_LO(xcno)  (4 + ((xcno) << 3))/* Index of the FIFO 
where Data packages */
-   /* have to be indicated 
by ARM which shall */
-   /* be sent */
-#define CON_FIFO_PORT_HI(xcno)  (5 + ((xcno) << 3))/* Index of the FIFO 
where sent Data packages */
-   /* are confirmed */
-#define CON_FIFO_PORT_LO(xcno)  (6 + ((xcno) << 3))/* Index of the FIFO 
where sent Data */
-   /* packages are 
confirmed */
-#define PFIFO_MASK(xcno)(0x7f << (xcno*8))
-
-#define FIFO_PTR_FRAMELEN_SHIFT 0
-#define FIFO_PTR_FRAMELEN_MASK  (0x7ff << 0)
-#define FIFO_PTR_FRAMELEN(len)  (((len) << 0) & FIFO_PTR_FRAMELEN_MASK)
-#define FIFO_PTR_TIMETRIG   (1<<11)
-#define FIFO_PTR_MULTI_REQ
-#define FIFO_PTR_ORIGIN (1<<14)
-#define FIFO_PTR_VLAN   (1<<15)
-#define FIFO_PTR_FRAMENO_SHIFT  16
-#define FIFO_PTR_FRAMENO_MASK   (0x3f << 16)
-#define FIFO_PTR_FRAMENO(no)(((no) << 16) & FIFO_PTR_FRAMENO_MASK)
-#define FIFO_PTR_SEGMENT_SHIFT  22
-#define FIFO_PTR_SEGMENT_MASK   (0xf << 22)
-#define FIFO_PTR_SEGMENT(seg)   (((seg) & 0xf) << 22)
-#define FIFO_PTR_ERROR_SHIFT28
-#define FIFO_PTR_ERROR_MASK (0xf << 28)
-
-#define ISR_LINK_STATUS_CHANGE (1<<4)
-#define ISR_IND_LO (1<<3)
-#define ISR_CON_LO (1<<2)
-#define ISR_IND_HI (1<<1)
-#define ISR_CON_HI (1<<0)
-
-#define ETH_MAC_LOCAL_CONFIG 0x1560
-#define ETH_MAC_4321 0x1564
-#define ETH_MAC_65   0x1568
-
-#define MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT 16
-#define MAC_TRAFFIC_CLASS_ARRANGEMENT_MASK 
(0xflen;
-
-   

Re: [PATCH] ax88179_178a: Merge memcpy + le32_to_cpus to get_unaligned_le32

2019-07-22 Thread David Miller
From: Chuhong Yuan 
Date: Fri, 19 Jul 2019 17:07:15 +0800

> Merge the combo use of memcpy and le32_to_cpus.
> Use get_unaligned_le32 instead.
> This simplifies the code.
> 
> Signed-off-by: Chuhong Yuan 

Applied.


Re: [PATCH] usbnet: smsc75xx: Merge memcpy + le32_to_cpus to get_unaligned_le32

2019-07-22 Thread David Miller
From: Chuhong Yuan 
Date: Fri, 19 Jul 2019 16:27:31 +0800

> Merge the combo use of memcpy and le32_to_cpus.
> Use get_unaligned_le32 instead.
> This simplifies the code.
> 
> Signed-off-by: Chuhong Yuan 

Applied.


Re: [PATCH] pwm: sifive: remove redundant dev_err message

2019-07-22 Thread Uwe Kleine-König
On Thu, Jul 18, 2019 at 03:51:11PM +0800, Ding Xiang wrote:
> devm_ioremap_resource already contains error message, so remove
> the redundant dev_err message
> 
> Signed-off-by: Ding Xiang 
Acked-by: Uwe Kleine-König 

Thanks
Uwe

-- 
Pengutronix e.K.   | Uwe Kleine-König|
Industrial Linux Solutions | http://www.pengutronix.de/  |


Re: [PATCH 39/79] libperf: Add perf_evlist__add function

2019-07-22 Thread Arnaldo Carvalho de Melo
Em Sun, Jul 21, 2019 at 01:24:26PM +0200, Jiri Olsa escreveu:
> Adding perf_evlist__add function to add perf_evsel
> in perf_evlist struct.
> 
> Link: http://lkml.kernel.org/n/tip-pnfovrqcgxquioroelzfz...@git.kernel.org
> Signed-off-by: Jiri Olsa 
> ---
>  tools/perf/lib/evlist.c  | 7 +++
>  tools/perf/lib/include/perf/evlist.h | 3 +++
>  tools/perf/lib/libperf.map   | 1 +
>  tools/perf/util/evlist.c | 2 +-
>  4 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/tools/perf/lib/evlist.c b/tools/perf/lib/evlist.c
> index fdc8c1894b37..e5f187fa4e57 100644
> --- a/tools/perf/lib/evlist.c
> +++ b/tools/perf/lib/evlist.c
> @@ -2,8 +2,15 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  void perf_evlist__init(struct perf_evlist *evlist)
>  {
>   INIT_LIST_HEAD(>entries);
>  }
> +
> +void perf_evlist__add(struct perf_evlist *evlist,
> +   struct perf_evsel *evsel)
> +{
> + list_add_tail(>node, >entries);
> +}
> diff --git a/tools/perf/lib/include/perf/evlist.h 
> b/tools/perf/lib/include/perf/evlist.h
> index 1ddfcca0bd01..6992568b14a0 100644
> --- a/tools/perf/lib/include/perf/evlist.h
> +++ b/tools/perf/lib/include/perf/evlist.h
> @@ -5,7 +5,10 @@
>  #include 
>  
>  struct perf_evlist;
> +struct perf_evsel;
>  
>  LIBPERF_API void perf_evlist__init(struct perf_evlist *evlist);
> +LIBPERF_API void perf_evlist__add(struct perf_evlist *evlist,
> +   struct perf_evsel *evsel);
>  
>  #endif /* __LIBPERF_EVLIST_H */
> diff --git a/tools/perf/lib/libperf.map b/tools/perf/lib/libperf.map
> index 5ca6ff6fcdfa..06ccf31eb24d 100644
> --- a/tools/perf/lib/libperf.map
> +++ b/tools/perf/lib/libperf.map
> @@ -11,6 +11,7 @@ LIBPERF_0.0.1 {
>   perf_thread_map__put;
>   perf_evsel__init;
>   perf_evlist__init;
> + perf_evlist__add;
>   local:
>   *;
>  };
> diff --git a/tools/perf/util/evlist.c b/tools/perf/util/evlist.c
> index aacddd9b2d64..ea25c7b49a4c 100644
> --- a/tools/perf/util/evlist.c
> +++ b/tools/perf/util/evlist.c
> @@ -180,8 +180,8 @@ static void perf_evlist__propagate_maps(struct evlist 
> *evlist)
>  
>  void evlist__add(struct evlist *evlist, struct evsel *entry)
>  {
> + perf_evlist__add(>core, >core);
>   entry->evlist = evlist;
> - list_add_tail(>core.node, >core.entries);
>   entry->idx = evlist->nr_entries;
>   entry->tracking = !entry->idx;

Right after applying this patch my alias for building perf crashes:

I.e. I have:

alias m='perf stat -e cycles:u,instructions:u make -k O=/tmp/build/perf  -C 
tools/perf install-bin'

And I'm applyin your series patch by patch, it stopped working when I
tried to build the next patch in this series, as the previous one caused
the segfault below, investigating...

(gdb) run stat sleep 1
Starting program: /root/bin/perf stat sleep 1
Missing separate debuginfos, use: dnf debuginfo-install 
glibc-2.29-15.fc30.x86_64
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib64/libthread_db.so.1".

Program received signal SIGSEGV, Segmentation fault.
0x004f6b55 in __perf_evlist__propagate_maps (evlist=0xbb34c0, 
evsel=0x0) at util/evlist.c:161
161 if (!evsel->own_cpus || evlist->has_user_cpus) {
Missing separate debuginfos, use: dnf debuginfo-install 
bzip2-libs-1.0.6-29.fc30.x86_64 elfutils-libelf-0.176-3.fc30.x86_64 
elfutils-libs-0.176-3.fc30.x86_64 glib2-2.60.4-1.fc30.x86_64 
libbabeltrace-1.5.6-2.fc30.x86_64 libgcc-9.1.1-1.fc30.x86_64 
libunwind-1.3.1-2.fc30.x86_64 libuuid-2.33.2-1.fc30.x86_64 
libxcrypt-4.4.6-2.fc30.x86_64 libzstd-1.4.0-1.fc30.x86_64 
numactl-libs-2.0.12-2.fc30.x86_64 pcre-8.43-2.fc30.x86_64 
perl-libs-5.28.2-436.fc30.x86_64 popt-1.16-17.fc30.x86_64 
python2-libs-2.7.16-2.fc30.x86_64 slang-2.3.2-5.fc30.x86_64 
xz-libs-5.2.4-5.fc30.x86_64 zlib-1.2.11-15.fc30.x86_64
(gdb) p evsel
$1 = (struct evsel *) 0x0
(gdb) p evlist
$2 = (struct evlist *) 0xbb34c0
(gdb) bt
#0  0x004f6b55 in __perf_evlist__propagate_maps (evlist=0xbb34c0, 
evsel=0x0) at util/evlist.c:161
#1  0x004f6c7a in perf_evlist__propagate_maps (evlist=0xbb34c0) at 
util/evlist.c:178
#2  0x004f955e in perf_evlist__set_maps (evlist=0xbb34c0, cpus=0x0, 
threads=0x0) at util/evlist.c:1128
#3  0x004f66f8 in evlist__init (evlist=0xbb34c0, cpus=0x0, threads=0x0) 
at util/evlist.c:52
#4  0x004f6790 in evlist__new () at util/evlist.c:64
#5  0x00456071 in cmd_stat (argc=3, argv=0x7fffd670) at 
builtin-stat.c:1705
#6  0x004dd0fa in run_builtin (p=0xa21e00 , argc=3, 
argv=0x7fffd670) at perf.c:304
#7  0x004dd367 in handle_internal_command (argc=3, argv=0x7fffd670) 
at perf.c:356
#8  0x004dd4ae in run_argv (argcp=0x7fffd4cc, argv=0x7fffd4c0) 
at perf.c:400
#9  0x004dd81a in main (argc=3, argv=0x7fffd670) at perf.c:522
(gdb)


Re: [PATCH] net/mlx5: fix -Wtype-limits compilation warnings

2019-07-22 Thread David Miller
From: Qian Cai 
Date: Mon, 22 Jul 2019 14:34:42 -0400

> The commit b9a7ba556207 ("net/mlx5: Use event mask based on device
> capabilities") introduced a few compilation warnings due to it bumps
> MLX5_EVENT_TYPE_MAX from 0x27 to 0x100 which is always greater than
> an "struct {mlx5_eqe|mlx5_nb}.type" that is an "u8".
> 
> drivers/net/ethernet/mellanox/mlx5/core/eq.c: In function
> 'mlx5_eq_notifier_register':
> drivers/net/ethernet/mellanox/mlx5/core/eq.c:948:21: warning: comparison
> is always false due to limited range of data type [-Wtype-limits]
>   if (nb->event_type >= MLX5_EVENT_TYPE_MAX)
>  ^~
> drivers/net/ethernet/mellanox/mlx5/core/eq.c: In function
> 'mlx5_eq_notifier_unregister':
> drivers/net/ethernet/mellanox/mlx5/core/eq.c:959:21: warning: comparison
> is always false due to limited range of data type [-Wtype-limits]
>   if (nb->event_type >= MLX5_EVENT_TYPE_MAX)
> 
> Fix them by removing unnecessary checkings.
> 
> Fixes: b9a7ba556207 ("net/mlx5: Use event mask based on device capabilities")
> Signed-off-by: Qian Cai 

Saeed, I am assuming that you will take this.


HELLO

2019-07-22 Thread Salah Ibrahim
I have a business proposal of  $35 Million USD which i want to
transact with you  get back for more details.Best Regards I am Dr.
Salah Ibrahim


Re: [PATCH v3 1/9] smp: Run functions concurrently in smp_call_function_many()

2019-07-22 Thread Nadav Amit
> On Jul 22, 2019, at 11:51 AM, Thomas Gleixner  wrote:
> 
> On Mon, 22 Jul 2019, Nadav Amit wrote:
>>> On Jul 22, 2019, at 11:37 AM, Thomas Gleixner  wrote:
>>> 
>>> On Mon, 22 Jul 2019, Peter Zijlstra wrote:
>>> 
 On Thu, Jul 18, 2019 at 05:58:29PM -0700, Nadav Amit wrote:
> +/*
> + * Call a function on all processors.  May be used during early boot 
> while
> + * early_boot_irqs_disabled is set.
> + */
> +static inline void on_each_cpu(smp_call_func_t func, void *info, int 
> wait)
> +{
> + on_each_cpu_mask(cpu_online_mask, func, info, wait);
> +}
 
 I'm thinking that one if buggy, nothing protects online mask here.
>>> 
>>> The current implementation has preemption disabled before touching
>>> cpu_online_mask which at least protects against a CPU going away as that
>>> prevents the stomp machine thread from getting on the CPU. But it's not
>>> protected against a CPU coming online concurrently.
>> 
>> I still don’t understand. If you called cpu_online_mask() and did not
>> disable preemption before calling it, you are already (today) not protected
>> against another CPU coming online. Disabling preemption in on_each_cpu()
>> will not solve it.
> 
> Disabling preemption _cannot_ protect against a CPU coming online. It only
> can protect against a CPU being offlined.
> 
> The current implementation of on_each_cpu() disables preemption _before_
> touching cpu_online_mask.
> 
> void on_each_cpu(void (*func) (void *info), void *info, int wait)
> {
>unsigned long flags;
> 
>preempt_disable();
>   smp_call_function(func, info, wait);
> 
> smp_call_function() has another preempt_disable as it can be called
> separately and it does:
> 
>preempt_disable();
>smp_call_function_many(cpu_online_mask, func, info, wait);
> 
> Your new on_each_cpu() implementation does not. So there is a
> difference. Whether it matters or not is a different question, but that
> needs to be explained and documented.

Thanks for explaining - so your concern is for CPUs being offlined.

But unless I am missing something: on_each_cpu() calls __on_each_cpu_mask(),
which disables preemption and calls __smp_call_function_many().

Then  __smp_call_function_many() runs:

cpumask_and(cfd->cpumask, mask, cpu_online_mask);

… before choosing which remote CPUs should run the function. So the only
case that I was missing is if the current CPU goes away and the function is
called locally.

Can it happen? I can add documentation and a debug assertion for this case.



Re: [PATCH v2 6/7] dt-bindings: net: realtek: Add property to configure LED mode

2019-07-22 Thread Andrew Lunn
On Mon, Jul 22, 2019 at 10:14:18AM -0700, Matthias Kaehlcke wrote:
> I'm working on a generic binding.
> 
> I wonder what is the best process for reviewing/landing it, I'm
> doubting between two options:
> 
> a) only post the binding doc and the generic PHY code that reads
>the configuration from the DT. Post Realtek patches once
>the binding/generic code has been acked.
> 
>pros: no churn from Realtek specific patches
>cons: initially no (real) user of the new binding
> 
> b) post generic and Realtek changes together
> 
>pros: the binding has a user initially
>cons: churn from Realtek specific patches
> 
> I can do either, depending on what maintainers/reviewers prefer. I'm
> slightly inclined towards a)

Hi Matthias

It is normal to include one user of any generic API which is added,
just to make is clear how an API should be used.

 Andrew


[RFC/RFT 5/5] phy: exynos5-usbdrd: drop duplicate setting PIPE3 tune signal

2019-07-22 Thread Anand Moon
Drop duplicate configuration setting of PIPE tune signal.

Signed-off-by: Anand Moon 
---
 drivers/phy/samsung/phy-exynos5-usbdrd.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c 
b/drivers/phy/samsung/phy-exynos5-usbdrd.c
index 4f16c4f82ae5..f6d2f359d88a 100644
--- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
+++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
@@ -410,12 +410,6 @@ static void exynos5_usbdrd_utmi_init(struct 
exynos5_usbdrd_phy *phy_drd)
PHYPARAM0_COMPDISTUNE(0x6));
writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
 
-   reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
-   /* Set Tx De-Emphasis level */
-   reg &= ~PHYPARAM1_PCS_TXDEEMPH_MASK;
-   reg |=  PHYPARAM1_PCS_TXDEEMPH;
-   writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
-
/* UTMI Power Control */
writel(PHYUTMI_OTGDISABLE, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI);
 
-- 
2.22.0



[RFC/RFT 3/5] phy: exynos5-usbdrd: UTMI tune signal

2019-07-22 Thread Anand Moon
Tune USB2.0 (UTMI+) TX signal for high speed data transfer.

Signed-off-by: Anand Moon 
---
 drivers/phy/samsung/phy-exynos5-usbdrd.c | 42 +---
 1 file changed, 37 insertions(+), 5 deletions(-)

diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c 
b/drivers/phy/samsung/phy-exynos5-usbdrd.c
index 135114d51bc1..54a513ca15e4 100644
--- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
+++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
@@ -33,6 +33,8 @@
 #define EXYNOS5_FSEL_24MHZ 0x5
 #define EXYNOS5_FSEL_50MHZ 0x7
 
+#define __set(v, a, b)  (((v) << (b)) & GENMASK(a, b))
+
 /* EXYNOS5: USB 3.0 DRD PHY registers */
 #define EXYNOS5_DRD_LINKSYSTEM 0x04
 
@@ -108,8 +110,17 @@
 #define EXYNOS5_DRD_PHYPARAM0  0x1c
 
 #define PHYPARAM0_REF_USE_PAD  BIT(31)
-#define PHYPARAM0_REF_LOSLEVEL_MASK(0x1f << 26)
-#define PHYPARAM0_REF_LOSLEVEL (0x9 << 26)
+#define PHYPARAM0_REF_LOSLEVEL(x)  __set(x, 30, 26)
+#define PHYPARAM0_TXVREFTUNE(x)__set(x, 25, 22)
+#define PHYPARAM0_TXISETUNE(x) __set(x, 21, 20)
+#define PHYPARAM0_TXRESTUNE(x) __set(x, 19, 18)
+#define PHYPARAM0_TXPREEMPPULSETUNEBIT(17)
+#define PHYPARAM0_TXPREEMPAMPTUNE(x)   __set(x, 16, 15)
+#define PHYPARAM0_TXHSXVTUNE(x)__set(x, 14, 13)
+#define PHYPARAM0_TXFSLSTUNE(x)__set(x, 12, 9)
+#define PHYPARAM0_SQRXTUNE(x)  __set(x, 8, 6)
+#define PHYPARAM0_OTGTUNE(x)   __set(x, 5, 3)
+#define PHYPARAM0_COMPDISTUNE(x)   __set(x, 2, 0)
 
 #define EXYNOS5_DRD_PHYPARAM1  0x20
 
@@ -365,9 +376,30 @@ static void exynos5_usbdrd_utmi_init(struct 
exynos5_usbdrd_phy *phy_drd)
u32 reg;
 
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
-   /* Set Loss-of-Signal Detector sensitivity */
-   reg &= ~PHYPARAM0_REF_LOSLEVEL_MASK;
-   reg |=  PHYPARAM0_REF_LOSLEVEL;
+   /* Set Loss-of-Signal Detector sensitivity */
+   reg |= (PHYPARAM0_REF_USE_PAD |
+   /* Sets the sensitivity level for the Loss-of-Signal detector */
+   PHYPARAM0_REF_LOSLEVEL(0x9) |
+   /* Adjusts the high-speed DC level voltage */
+   PHYPARAM0_TXVREFTUNE(0x3) |
+   /* Adjust the rise/fal timie of the high-speed waveform */
+   PHYPARAM0_TXISETUNE(0x1) |
+   /* Adjusts the driver source impedance */
+   PHYPARAM0_TXRESTUNE(0x1) |
+   /* HS Transmitter Pre-Emphasis Duration Control */
+   PHYPARAM0_TXPREEMPPULSETUNE |
+   /* HS Transmitter Pre-Emphasis Current Control */
+   PHYPARAM0_TXPREEMPAMPTUNE(0x0) |
+   /* Transmitter High-Speed Crossover Adjustment */
+   PHYPARAM0_TXHSXVTUNE(0x3) |
+   /* FS/LS Source Impedance Adjustment */
+   PHYPARAM0_TXFSLSTUNE(0x3) |
+   /* Squelch Threshold Adjustment */
+   PHYPARAM0_SQRXTUNE(0x3) |
+   /* VBUS Valid Threshold Adjustment */
+   PHYPARAM0_OTGTUNE(0x6) |
+   /* Disconnect Threshold Adjustment */
+   PHYPARAM0_COMPDISTUNE(0x6));
writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
 
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
-- 
2.22.0



[RFC/RFT 4/5] phy: exynos5-usbdrd: PIPE3 tune signal

2019-07-22 Thread Anand Moon
Tune USB3.0 (PIPE3) PHY TX signal for high and supper
speed data transfer.

Signed-off-by: Anand Moon 
---
 drivers/phy/samsung/phy-exynos5-usbdrd.c | 18 +-
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c 
b/drivers/phy/samsung/phy-exynos5-usbdrd.c
index 54a513ca15e4..4f16c4f82ae5 100644
--- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
+++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
@@ -124,8 +124,10 @@
 
 #define EXYNOS5_DRD_PHYPARAM1  0x20
 
-#define PHYPARAM1_PCS_TXDEEMPH_MASK(0x1f << 0)
-#define PHYPARAM1_PCS_TXDEEMPH (0x1c)
+#define PHYPARAM1_TX0_TERM_OFFSET(x)   __set(x, 30, 26)
+#define PHYPARAM1_TX_SWING_FULL(x) __set(x, 18, 12)
+#define PHYPRAAM1_PCS_TX_DEEMPH_6DB(x) __set(x, 11, 6)
+#define PHYPRAAM1_PCS_TX_DEEMPH_3P5DB(x)   __set(x, 5, 0)
 
 #define EXYNOS5_DRD_PHYTERM0x24
 
@@ -360,10 +362,16 @@ static void exynos5_usbdrd_pipe3_init(struct 
exynos5_usbdrd_phy *phy_drd)
 {
u32 reg;
 
-   reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
/* Set Tx De-Emphasis level */
-   reg &= ~PHYPARAM1_PCS_TXDEEMPH_MASK;
-   reg |=  PHYPARAM1_PCS_TXDEEMPH;
+   reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
+   /* Transmitter Termination Offset */
+   reg |=  PHYPARAM1_TX0_TERM_OFFSET(0x5) |
+   /* Tx Amplitude (Full Swing mode) */
+   PHYPARAM1_TX_SWING_FULL(0x3F) |
+   /* Tx De-Emphasis at 6 dB */
+   PHYPRAAM1_PCS_TX_DEEMPH_6DB(0x20) |
+   /* Tx De-Emphasis at 3.5 dB */
+   PHYPRAAM1_PCS_TX_DEEMPH_3P5DB(0x15);
writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
 
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
-- 
2.22.0



[RFC/RFT 2/5] phy: exynos5-usbdrd: add missing tuning of the phyutmi signal

2019-07-22 Thread Anand Moon
Add missing tuning of phyutmi controls to enter suspend and
resume state.

Signed-off-by: Anand Moon 
---
 drivers/phy/samsung/phy-exynos5-usbdrd.c | 32 ++--
 1 file changed, 30 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c 
b/drivers/phy/samsung/phy-exynos5-usbdrd.c
index 3c14bf7718c1..135114d51bc1 100644
--- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
+++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
@@ -42,7 +42,13 @@
 
 #define EXYNOS5_DRD_PHYUTMI0x08
 
+#define PHYUTMI_TXBITSTUFFENH  BIT(8)
+#define PHYUTMI_TXBITSTUFFEN   BIT(7)
 #define PHYUTMI_OTGDISABLE BIT(6)
+#define PHYUTMI_IDPULLUP   BIT(5)
+#define PHYUTMI_DRVVBUSBIT(4)
+#define PHYUTMI_DPPULLDOWN  BIT(3)
+#define PHYUTMI_DMPULLDOWN  BIT(2)
 #define PHYUTMI_FORCESUSPEND   BIT(1)
 #define PHYUTMI_FORCESLEEP BIT(0)
 
@@ -402,6 +408,23 @@ static int exynos5_usbdrd_phy_init(struct phy *phy)
LINKSYSTEM_FLADJ(0x20);
writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_LINKSYSTEM);
 
+   reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI);
+   /* High-Byte Transmit Bit-Stuffing Enable */
+   reg |= PHYUTMI_TXBITSTUFFENH;
+   /* Low-Byte Transmit Bit-Stuffing Enable */
+   reg |= PHYUTMI_TXBITSTUFFEN;
+   /* release force_sleep & force_suspend */
+   reg &= ~(PHYUTMI_FORCESLEEP | PHYUTMI_FORCESUSPEND);
+   /* DP/DM Pull Down Disable */
+   reg &= ~(PHYUTMI_DMPULLDOWN | PHYUTMI_DPPULLDOWN);
+   /* drvvbus controller signal controls the VBUS valid comparator */
+   reg &= ~PHYUTMI_OTGDISABLE;
+   /* controller signal controls the VBUS Valid comparator */
+   reg |= PHYUTMI_DRVVBUS;
+   /* Enable ID Sampling */
+   reg |= PHYUTMI_IDPULLUP;
+   writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI);
+
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
/* Select PHY CLK source */
reg &= ~PHYPARAM0_REF_USE_PAD;
@@ -452,9 +475,14 @@ static int exynos5_usbdrd_phy_exit(struct phy *phy)
if (ret)
return ret;
 
-   reg =   PHYUTMI_OTGDISABLE |
+   reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI);
+   reg |=  PHYUTMI_OTGDISABLE |
PHYUTMI_FORCESUSPEND |
-   PHYUTMI_FORCESLEEP;
+   PHYUTMI_FORCESLEEP |
+   PHYUTMI_DMPULLDOWN |
+   PHYUTMI_DPPULLDOWN;
+   reg &= ~(PHYUTMI_DRVVBUS | PHYUTMI_IDPULLUP |
+   PHYUTMI_TXBITSTUFFENH | PHYUTMI_TXBITSTUFFEN);
writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI);
 
/* Resetting the PHYCLKRST enable bits to reduce leakage current */
-- 
2.22.0



[RFC/RFT 1/5] phy: exynos5-usbdrd: read from correct offset of xhci linksystem

2019-07-22 Thread Anand Moon
Read from linksystem offset to update the xhci version.

Signed-off-by: Anand Moon 
---
 drivers/phy/samsung/phy-exynos5-usbdrd.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c 
b/drivers/phy/samsung/phy-exynos5-usbdrd.c
index 646259bee909..3c14bf7718c1 100644
--- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
+++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
@@ -397,7 +397,8 @@ static int exynos5_usbdrd_phy_init(struct phy *phy)
 * Setting the Frame length Adj value[6:1] to default 0x20
 * See xHCI 1.0 spec, 5.2.4
 */
-   reg =   LINKSYSTEM_XHCI_VERSION_CONTROL |
+   reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_LINKSYSTEM);
+   reg |=  LINKSYSTEM_XHCI_VERSION_CONTROL |
LINKSYSTEM_FLADJ(0x20);
writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_LINKSYSTEM);
 
-- 
2.22.0



[RFC/RFT 0/5] Exynos USB 3.0 PHY tune setting

2019-07-22 Thread Anand Moon
Dear All,

Here are some patches which help tune USB 3.0 phy.
changes have been testing on Odroid XU3 / XU4 / HC1.
with suspend and resume working with usb hdd device connected.

These patches have been build on top on Marek Szyprowski
Fix USB3.0 DRD PHY calibration issues.

[0] https://patchwork.kernel.org/cover/11049823/

Anand Moon (5):
  phy: exynos5-usbdrd: read from correct offset of xhci linksystem
  phy: exynos5-usbdrd: add missing tuning of the phyutmi signal
  phy: exynos5-usbdrd: UTMI tune signal
  phy: exynos5-usbdrd: PIPE3 tune signal
  phy: exynos5-usbdrd: drop duplicate setting PIPE3 tune signal

 drivers/phy/samsung/phy-exynos5-usbdrd.c | 101 ++-
 1 file changed, 82 insertions(+), 19 deletions(-)

-- 
2.22.0



Re: RFC: call_rcu_outstanding (was Re: WARNING in __mmdrop)

2019-07-22 Thread Paul E. McKenney
On Mon, Jul 22, 2019 at 12:32:17PM -0400, Michael S. Tsirkin wrote:
> On Mon, Jul 22, 2019 at 09:25:51AM -0700, Paul E. McKenney wrote:
> > On Mon, Jul 22, 2019 at 12:13:40PM -0400, Michael S. Tsirkin wrote:
> > > On Mon, Jul 22, 2019 at 08:55:34AM -0700, Paul E. McKenney wrote:
> > > > On Mon, Jul 22, 2019 at 11:47:24AM -0400, Michael S. Tsirkin wrote:
> > > > > On Mon, Jul 22, 2019 at 11:14:39AM -0400, Joel Fernandes wrote:
> > > > > > [snip]
> > > > > > > > Would it make sense to have call_rcu() check to see if there 
> > > > > > > > are many
> > > > > > > > outstanding requests on this CPU and if so process them before 
> > > > > > > > returning?
> > > > > > > > That would ensure that frequent callers usually ended up doing 
> > > > > > > > their
> > > > > > > > own processing.
> > > > > > 
> > > > > > Other than what Paul already mentioned about deadlocks, I am not 
> > > > > > sure if this
> > > > > > would even work for all cases since call_rcu() has to wait for a 
> > > > > > grace
> > > > > > period.
> > > > > > 
> > > > > > So, if the number of outstanding requests are higher than a certain 
> > > > > > amount,
> > > > > > then you *still* have to wait for some RCU configurations for the 
> > > > > > grace
> > > > > > period duration and cannot just execute the callback in-line. Did I 
> > > > > > miss
> > > > > > something?
> > > > > > 
> > > > > > Can waiting in-line for a grace period duration be tolerated in the 
> > > > > > vhost case?
> > > > > > 
> > > > > > thanks,
> > > > > > 
> > > > > >  - Joel
> > > > > 
> > > > > No, but it has many other ways to recover (try again later, drop a
> > > > > packet, use a slower copy to/from user).
> > > > 
> > > > True enough!  And your idea of taking recovery action based on the 
> > > > number
> > > > of callbacks seems like a good one while we are getting RCU's callback
> > > > scheduling improved.
> > > > 
> > > > By the way, was this a real problem that you could make happen on real
> > > > hardware?
> > > 
> > > >  If not, I would suggest just letting RCU get improved over
> > > > the next couple of releases.
> > > 
> > > So basically use kfree_rcu but add a comment saying e.g. "WARNING:
> > > in the future callers of kfree_rcu might need to check that
> > > not too many callbacks get queued. In that case, we can
> > > disable the optimization, or recover in some other way.
> > > Watch this space."
> > 
> > That sounds fair.
> > 
> > > > If it is something that you actually made happen, please let me know
> > > > what (if anything) you need from me for your callback-counting EBUSY
> > > > scheme.
> > > 
> > > If you mean kfree_rcu causing OOM then no, it's all theoretical.
> > > If you mean synchronize_rcu stalling to the point where guest will OOPs,
> > > then yes, that's not too hard to trigger.
> > 
> > Is synchronize_rcu() being stalled by the userspace loop that is invoking
> > your ioctl that does kfree_rcu()?  Or instead by the resulting callback
> > invocation?
> 
> Sorry, let me clarify.  We currently have synchronize_rcu in a userspace
> loop. I have a patch replacing that with kfree_rcu.  This isn't the
> first time synchronize_rcu is stalling a VM for a long while so I didn't
> investigate further.

Ah, so a bunch of synchronize_rcu() calls within a single system call
inside the host is stalling the guest, correct?

If so, one straightforward approach is to do an rcu_barrier() every
(say) 1000 kfree_rcu() calls within that loop in the system call.
This will decrease the overhead by almost a factor of 1000 compared to
a synchronize_rcu() on each trip through that loop, and will prevent
callback overload.

Or if the situation is different (for example, the guest does a long
sequence of system calls, each of which does a single kfree_rcu() or
some such), please let me know what the situation is.

Thanx, Paul



[patch V3 09/25] x86/apic: Consolidate the apic local headers

2019-07-22 Thread Thomas Gleixner
Now there are three small local headers. Some contain functions which are
only used in one source file.

Move all the inlines and declarations into a single local header and the
inlines which are only used in one source file into that.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/kernel/apic/apic_flat_64.c   |3 -
 arch/x86/kernel/apic/apic_flat_64.h   |8 ---
 arch/x86/kernel/apic/apic_numachip.c  |3 -
 arch/x86/kernel/apic/bigsmp_32.c  |2 
 arch/x86/kernel/apic/ipi.c|   14 -
 arch/x86/kernel/apic/ipi.h|   90 --
 arch/x86/kernel/apic/local.h  |   63 +++
 arch/x86/kernel/apic/probe_32.c   |3 -
 arch/x86/kernel/apic/probe_64.c   |2 
 arch/x86/kernel/apic/x2apic.h |9 ---
 arch/x86/kernel/apic/x2apic_cluster.c |2 
 arch/x86/kernel/apic/x2apic_phys.c|3 -
 12 files changed, 83 insertions(+), 119 deletions(-)

--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -15,8 +15,7 @@
 #include 
 #include 
 
-#include "apic_flat_64.h"
-#include "ipi.h"
+#include "local.h"
 
 static struct apic apic_physflat;
 static struct apic apic_flat;
--- a/arch/x86/kernel/apic/apic_flat_64.h
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_X86_APIC_FLAT_64_H
-#define _ASM_X86_APIC_FLAT_64_H
-
-extern void flat_init_apic_ldr(void);
-
-#endif
-
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -18,8 +18,7 @@
 
 #include 
 
-#include "apic_flat_64.h"
-#include "ipi.h"
+#include "local.h"
 
 u8 numachip_system __read_mostly;
 static const struct apic apic_numachip1;
--- a/arch/x86/kernel/apic/bigsmp_32.c
+++ b/arch/x86/kernel/apic/bigsmp_32.c
@@ -10,7 +10,7 @@
 
 #include 
 
-#include "ipi.h"
+#include "local.h"
 
 static unsigned bigsmp_get_apic_id(unsigned long x)
 {
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -1,10 +1,20 @@
 // SPDX-License-Identifier: GPL-2.0
 
 #include 
+#include 
 
-#include 
+#include "local.h"
 
-#include "ipi.h"
+static inline int __prepare_ICR2(unsigned int mask)
+{
+   return SET_APIC_DEST_FIELD(mask);
+}
+
+static inline void __xapic_wait_icr_idle(void)
+{
+   while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)
+   cpu_relax();
+}
 
 void __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned 
int dest)
 {
--- a/arch/x86/kernel/apic/ipi.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-#ifndef _ASM_X86_IPI_H
-#define _ASM_X86_IPI_H
-
-#ifdef CONFIG_X86_LOCAL_APIC
-
-/*
- * Copyright 2004 James Cleverdon, IBM.
- *
- * Generic APIC InterProcessor Interrupt code.
- *
- * Moved to include file by James Cleverdon from
- * arch/x86-64/kernel/smp.c
- *
- * Copyrights from kernel/smp.c:
- *
- * (c) 1995 Alan Cox, Building #3 
- * (c) 1998-99, 2000 Ingo Molnar 
- * (c) 2002,2003 Andi Kleen, SuSE Labs.
- */
-
-#include 
-#include 
-#include 
-
-/*
- * the following functions deal with sending IPIs between CPUs.
- *
- * We use 'broadcast', CPU->CPU IPIs and self-IPIs too.
- */
-
-static inline unsigned int __prepare_ICR(unsigned int shortcut, int vector,
-unsigned int dest)
-{
-   unsigned int icr = shortcut | dest;
-
-   switch (vector) {
-   default:
-   icr |= APIC_DM_FIXED | vector;
-   break;
-   case NMI_VECTOR:
-   icr |= APIC_DM_NMI;
-   break;
-   }
-   return icr;
-}
-
-static inline int __prepare_ICR2(unsigned int mask)
-{
-   return SET_APIC_DEST_FIELD(mask);
-}
-
-static inline void __xapic_wait_icr_idle(void)
-{
-   while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)
-   cpu_relax();
-}
-
-void __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned 
int dest);
-
-/*
- * This is used to send an IPI with no shorthand notation (the destination is
- * specified in bits 56 to 63 of the ICR).
- */
-void __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int 
dest);
-
-extern void default_send_IPI_single(int cpu, int vector);
-extern void default_send_IPI_single_phys(int cpu, int vector);
-extern void default_send_IPI_mask_sequence_phys(const struct cpumask *mask,
-int vector);
-extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
-int vector);
-
-extern int no_broadcast;
-
-#ifdef CONFIG_X86_32
-extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
-int vector);
-extern void default_send_IPI_mask_allbutself_logical(const struct cpumask 
*mask,
-int vector);
-extern void default_send_IPI_mask_logical(const struct cpumask *mask,
- 

[patch V3 12/25] x86/cpu: Move arch_smt_update() to a neutral place

2019-07-22 Thread Thomas Gleixner
arch_smt_update() will be used to control IPI/NMI broadcasting via the
shorthand mechanism. Keeping it in the bugs file and calling the apic
function from there is possible, but not really intuitive.

Move it to a neutral place and invoke the bugs function from there.

No functional change.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/bugs.h  |2 ++
 arch/x86/kernel/cpu/bugs.c   |2 +-
 arch/x86/kernel/cpu/common.c |9 +
 3 files changed, 12 insertions(+), 1 deletion(-)

--- a/arch/x86/include/asm/bugs.h
+++ b/arch/x86/include/asm/bugs.h
@@ -18,4 +18,6 @@ int ppro_with_ram_bug(void);
 static inline int ppro_with_ram_bug(void) { return 0; }
 #endif
 
+extern void cpu_bugs_smt_update(void);
+
 #endif /* _ASM_X86_BUGS_H */
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -700,7 +700,7 @@ static void update_mds_branch_idle(void)
 
 #define MDS_MSG_SMT "MDS CPU bug present and SMT on, data leak possible. See 
https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/mds.html for more 
details.\n"
 
-void arch_smt_update(void)
+void cpu_bugs_smt_update(void)
 {
/* Enhanced IBRS implies STIBP. No update required. */
if (spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED)
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1905,3 +1905,12 @@ void microcode_check(void)
pr_warn("x86/CPU: CPU features have changed after loading microcode, 
but might not take effect.\n");
pr_warn("x86/CPU: Please consider either early loading through 
initrd/built-in or a potential BIOS update.\n");
 }
+
+/*
+ * Invoked from core CPU hotplug code after hotplug operations
+ */
+void arch_smt_update(void)
+{
+   /* Handle the speculative execution misfeatures */
+   cpu_bugs_smt_update();
+}




[patch V3 07/25] x86/apic: Move ipi header into apic directory

2019-07-22 Thread Thomas Gleixner
Only used locally.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/ipi.h   |   90 ---
 arch/x86/kernel/apic/apic_flat_64.c  |3 -
 arch/x86/kernel/apic/apic_numachip.c |3 -
 arch/x86/kernel/apic/bigsmp_32.c |9 ---
 arch/x86/kernel/apic/ipi.c   |3 -
 arch/x86/kernel/apic/ipi.h   |   90 +++
 arch/x86/kernel/apic/probe_32.c  |3 -
 arch/x86/kernel/apic/probe_64.c  |3 -
 arch/x86/kernel/apic/x2apic_phys.c   |3 -
 9 files changed, 103 insertions(+), 104 deletions(-)

--- a/arch/x86/include/asm/ipi.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-#ifndef _ASM_X86_IPI_H
-#define _ASM_X86_IPI_H
-
-#ifdef CONFIG_X86_LOCAL_APIC
-
-/*
- * Copyright 2004 James Cleverdon, IBM.
- *
- * Generic APIC InterProcessor Interrupt code.
- *
- * Moved to include file by James Cleverdon from
- * arch/x86-64/kernel/smp.c
- *
- * Copyrights from kernel/smp.c:
- *
- * (c) 1995 Alan Cox, Building #3 
- * (c) 1998-99, 2000 Ingo Molnar 
- * (c) 2002,2003 Andi Kleen, SuSE Labs.
- */
-
-#include 
-#include 
-#include 
-
-/*
- * the following functions deal with sending IPIs between CPUs.
- *
- * We use 'broadcast', CPU->CPU IPIs and self-IPIs too.
- */
-
-static inline unsigned int __prepare_ICR(unsigned int shortcut, int vector,
-unsigned int dest)
-{
-   unsigned int icr = shortcut | dest;
-
-   switch (vector) {
-   default:
-   icr |= APIC_DM_FIXED | vector;
-   break;
-   case NMI_VECTOR:
-   icr |= APIC_DM_NMI;
-   break;
-   }
-   return icr;
-}
-
-static inline int __prepare_ICR2(unsigned int mask)
-{
-   return SET_APIC_DEST_FIELD(mask);
-}
-
-static inline void __xapic_wait_icr_idle(void)
-{
-   while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)
-   cpu_relax();
-}
-
-void __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned 
int dest);
-
-/*
- * This is used to send an IPI with no shorthand notation (the destination is
- * specified in bits 56 to 63 of the ICR).
- */
-void __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int 
dest);
-
-extern void default_send_IPI_single(int cpu, int vector);
-extern void default_send_IPI_single_phys(int cpu, int vector);
-extern void default_send_IPI_mask_sequence_phys(const struct cpumask *mask,
-int vector);
-extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
-int vector);
-
-extern int no_broadcast;
-
-#ifdef CONFIG_X86_32
-extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
-int vector);
-extern void default_send_IPI_mask_allbutself_logical(const struct cpumask 
*mask,
-int vector);
-extern void default_send_IPI_mask_logical(const struct cpumask *mask,
-int vector);
-extern void default_send_IPI_allbutself(int vector);
-extern void default_send_IPI_all(int vector);
-extern void default_send_IPI_self(int vector);
-#endif
-
-#endif
-
-#endif /* _ASM_X86_IPI_H */
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -15,7 +15,8 @@
 #include 
 #include 
 #include 
-#include 
+
+#include "ipi.h"
 
 static struct apic apic_physflat;
 static struct apic apic_flat;
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -18,7 +18,8 @@
 
 #include 
 #include 
-#include 
+
+#include "ipi.h"
 
 u8 numachip_system __read_mostly;
 static const struct apic apic_numachip1;
--- a/arch/x86/kernel/apic/bigsmp_32.c
+++ b/arch/x86/kernel/apic/bigsmp_32.c
@@ -4,18 +4,13 @@
  *
  * Drives the local APIC in "clustered mode".
  */
-#include 
 #include 
-#include 
-#include 
 #include 
 #include 
 
-#include 
-#include 
-#include 
 #include 
-#include 
+
+#include "ipi.h"
 
 static unsigned bigsmp_get_apic_id(unsigned long x)
 {
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -3,7 +3,8 @@
 #include 
 
 #include 
-#include 
+
+#include "ipi.h"
 
 void __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned 
int dest)
 {
--- /dev/null
+++ b/arch/x86/kernel/apic/ipi.h
@@ -0,0 +1,90 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _ASM_X86_IPI_H
+#define _ASM_X86_IPI_H
+
+#ifdef CONFIG_X86_LOCAL_APIC
+
+/*
+ * Copyright 2004 James Cleverdon, IBM.
+ *
+ * Generic APIC InterProcessor Interrupt code.
+ *
+ * Moved to include file by James Cleverdon from
+ * arch/x86-64/kernel/smp.c
+ *
+ * Copyrights from kernel/smp.c:
+ *
+ * (c) 1995 Alan Cox, Building #3 
+ * (c) 1998-99, 2000 Ingo Molnar 
+ * (c) 2002,2003 Andi Kleen, SuSE Labs.
+ */
+
+#include 
+#include 

[patch V3 06/25] x86/apic: Cleanup the include maze

2019-07-22 Thread Thomas Gleixner
All of these APIC files include the world and some more. Remove the
unneeded cruft.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/kernel/apic/apic_flat_64.c   |   15 ---
 arch/x86/kernel/apic/apic_noop.c  |   18 +-
 arch/x86/kernel/apic/apic_numachip.c  |6 +++---
 arch/x86/kernel/apic/ipi.c|   15 +--
 arch/x86/kernel/apic/probe_32.c   |   18 ++
 arch/x86/kernel/apic/probe_64.c   |   11 ---
 arch/x86/kernel/apic/x2apic_cluster.c |   14 ++
 arch/x86/kernel/apic/x2apic_phys.c|9 +++--
 arch/x86/kernel/apic/x2apic_uv_x.c|   28 
 9 files changed, 24 insertions(+), 110 deletions(-)

--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -8,21 +8,14 @@
  * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
  * James Cleverdon.
  */
-#include 
-#include 
-#include 
 #include 
-#include 
-#include 
-#include 
-#include 
 #include 
+#include 
 
-#include 
-#include 
-#include 
-#include 
 #include 
+#include 
+#include 
+#include 
 
 static struct apic apic_physflat;
 static struct apic apic_flat;
--- a/arch/x86/kernel/apic/apic_noop.c
+++ b/arch/x86/kernel/apic/apic_noop.c
@@ -9,25 +9,9 @@
  * to not uglify the caller's code and allow to call (some) apic routines
  * like self-ipi, etc...
  */
-
-#include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
 
-#include 
-#include 
-
-#include 
-#include 
-#include 
+#include 
 
 static void noop_init_apic_ldr(void) { }
 static void noop_send_IPI(int cpu, int vector) { }
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -10,15 +10,15 @@
  * Send feedback to 
  *
  */
-
+#include 
 #include 
 
 #include 
 #include 
-#include 
+
 #include 
 #include 
-#include 
+#include 
 
 u8 numachip_system __read_mostly;
 static const struct apic apic_numachip1;
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -1,21 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0
-#include 
-#include 
 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
+#include 
 
-#include 
-#include 
-#include 
-#include 
 #include 
-#include 
 #include 
 
 void __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned 
int dest)
--- a/arch/x86/kernel/apic/probe_32.c
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -6,26 +6,12 @@
  *
  * Generic x86 APIC driver probe layer.
  */
-#include 
-#include 
 #include 
-#include 
-#include 
-#include 
-#include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
 
-#include 
+#include 
 #include 
-#include 
+#include 
 
 #ifdef CONFIG_HOTPLUG_CPU
 #define DEFAULT_SEND_IPI   (1)
--- a/arch/x86/kernel/apic/probe_64.c
+++ b/arch/x86/kernel/apic/probe_64.c
@@ -8,19 +8,8 @@
  * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
  * James Cleverdon.
  */
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
 #include 
 #include 
-#include 
 
 /*
  * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode.
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -1,14 +1,12 @@
 // SPDX-License-Identifier: GPL-2.0
-#include 
+
+#include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
+#include 
+#include 
+
+#include 
 
-#include 
 #include "x2apic.h"
 
 struct cluster_mask {
--- a/arch/x86/kernel/apic/x2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -1,13 +1,10 @@
 // SPDX-License-Identifier: GPL-2.0
-#include 
+
 #include 
-#include 
-#include 
-#include 
-#include 
+#include 
 
-#include 
 #include 
+
 #include "x2apic.h"
 
 int x2apic_phys;
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -7,40 +7,20 @@
  *
  * Copyright (C) 2007-2014 Silicon Graphics, Inc. All rights reserved.
  */
+#include 
+#include 
 #include 
-#include 
 #include 
-#include 
-#include 
+#include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
 
+#include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
 
 DEFINE_PER_CPU(int, x2apic_extra_bits);
 




[patch V3 15/25] x86/apic: Add NMI_VECTOR wait to IPI shorthand

2019-07-22 Thread Thomas Gleixner
To support NMI shorthand broadcasts add the safe wait for ICR idle for NMI
vector delivery.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/kernel/apic/ipi.c |5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -30,7 +30,10 @@ void __default_send_IPI_shortcut(unsigne
/*
 * Wait for idle.
 */
-   __xapic_wait_icr_idle();
+   if (unlikely(vector == NMI_VECTOR))
+   safe_apic_wait_icr_idle();
+   else
+   __xapic_wait_icr_idle();
 
/*
 * No need to touch the target chip field. Also the destination




Re: [PATCH v2] dma-mapping: Use dma_get_mask in dma_addressing_limited

2019-07-22 Thread Michael S. Tsirkin
On Mon, Jul 22, 2019 at 06:56:49PM +0200, Auger Eric wrote:
> Hi Christoph,
> 
> On 7/22/19 6:51 PM, Eric Auger wrote:
> > We currently have cases where the dma_addressing_limited() gets
> > called with dma_mask unset. This causes a NULL pointer dereference.
> > 
> > Use dma_get_mask() accessor to prevent the crash.
> > 
> > Fixes: b866455423e0 ("dma-mapping: add a dma_addressing_limited helper")
> > Signed-off-by: Eric Auger 
> 
> As a follow-up of my last email, here is a patch featuring
> dma_get_mask(). But you don't have the WARN_ON_ONCE anymore, pointing
> out suspect users.

OTOH these users then simply become okay so no need for WARN_ON_ONCE
then :)

> Feel free to pick up your preferred approach
> 
> Thanks
> 
> Eric
> > 
> > ---
> > 
> > v1 -> v2:
> > - was [PATCH 1/2] dma-mapping: Protect dma_addressing_limited
> >   against NULL dma_mask
> > - Use dma_get_mask
> > ---
> >  include/linux/dma-mapping.h | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
> > index e11b115dd0e4..f7d1eea32c78 100644
> > --- a/include/linux/dma-mapping.h
> > +++ b/include/linux/dma-mapping.h
> > @@ -689,8 +689,8 @@ static inline int dma_coerce_mask_and_coherent(struct 
> > device *dev, u64 mask)
> >   */
> >  static inline bool dma_addressing_limited(struct device *dev)
> >  {
> > -   return min_not_zero(*dev->dma_mask, dev->bus_dma_mask) <
> > -   dma_get_required_mask(dev);
> > +   return min_not_zero(dma_get_mask(dev), dev->bus_dma_mask) <
> > +   dma_get_required_mask(dev);
> >  }
> >  
> >  #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
> > 


[patch V3 00/25] x86/apic: Support for IPI shorthands

2019-07-22 Thread Thomas Gleixner
This is merily a refresh of V2.

Changes vs. V2 
(https://lkml.kernel.org/r/20190704155145.617706...@linutronix.de)

  - Fix the NMI_VECTOR/VECTOR_NMI typo in kgdb

  - Remove the misleading vector 0-31 wording

It applies on top of:

   git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/apic

The series is also available from git:

   git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.x86/ipi

Thanks,

tglx

8<
 a/arch/x86/include/asm/apic_flat_64.h |8 -
 a/arch/x86/include/asm/ipi.h  |  109 -
 a/arch/x86/kernel/apic/x2apic.h   |9 -
 arch/x86/include/asm/apic.h   |   11 +-
 arch/x86/include/asm/bugs.h   |2 
 arch/x86/include/asm/processor.h  |2 
 arch/x86/include/asm/smp.h|1 
 arch/x86/kernel/apic/apic.c   |  157 +++
 arch/x86/kernel/apic/apic_flat_64.c   |   66 ++---
 arch/x86/kernel/apic/apic_noop.c  |   18 ---
 arch/x86/kernel/apic/apic_numachip.c  |8 -
 arch/x86/kernel/apic/bigsmp_32.c  |9 -
 arch/x86/kernel/apic/ipi.c|  170 +-
 arch/x86/kernel/apic/probe_32.c   |   41 
 arch/x86/kernel/apic/probe_64.c   |   21 
 arch/x86/kernel/apic/x2apic_cluster.c |   20 +---
 arch/x86/kernel/apic/x2apic_phys.c|   25 ++---
 arch/x86/kernel/apic/x2apic_uv_x.c|   30 +-
 arch/x86/kernel/cpu/bugs.c|2 
 arch/x86/kernel/cpu/common.c  |   11 ++
 arch/x86/kernel/kgdb.c|2 
 arch/x86/kernel/nmi.c |3 
 arch/x86/kernel/reboot.c  |7 -
 arch/x86/kernel/smp.c |   44 
 arch/x86/kernel/smpboot.c |   13 ++
 b/arch/x86/kernel/apic/local.h|   68 +
 include/linux/bitmap.h|   23 
 include/linux/cpumask.h   |   16 +++
 kernel/cpu.c  |   11 +-
 lib/bitmap.c  |   20 
 30 files changed, 450 insertions(+), 477 deletions(-)





[patch V3 01/25] x86/kgbd: Use NMI_VECTOR not APIC_DM_NMI

2019-07-22 Thread Thomas Gleixner
apic->send_IPI_allbutself() takes a vector number as argument.

APIC_DM_NMI is clearly not a vector number. It's defined to 0x400 which is
outside the vector space.

Use NMI_VECTOR instead as that's what it is intended to be.

Fixes: 82da3ff89dc2 ("x86: kgdb support")
Signed-off-by: Thomas Gleixner 
Link: https://lkml.kernel.org/r/20190704155608.347938...@linutronix.de

---
V2: New patch
---
 arch/x86/kernel/kgdb.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -416,7 +416,7 @@ static void kgdb_disable_hw_debug(struct
  */
 void kgdb_roundup_cpus(void)
 {
-   apic->send_IPI_allbutself(APIC_DM_NMI);
+   apic->send_IPI_allbutself(NMI_VECTOR);
 }
 #endif
 




[patch V3 14/25] x86/apic: Remove dest argument from __default_send_IPI_shortcut()

2019-07-22 Thread Thomas Gleixner
The SDM states:

  "The destination shorthand field of the ICR allows the delivery mode to be
   by-passed in favor of broadcasting the IPI to all the processors on the
   system bus and/or back to itself (see Section 10.6.1, Interrupt Command
   Register (ICR)). Three destination shorthands are supported: self, all
   excluding self, and all including self. The destination mode is ignored
   when a destination shorthand is used."

So there is no point to supply the destination mode to the shorthand
delivery function.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/kernel/apic/apic_flat_64.c |6 ++
 arch/x86/kernel/apic/ipi.c  |   15 +++
 arch/x86/kernel/apic/local.h|2 +-
 arch/x86/kernel/apic/probe_64.c |2 +-
 4 files changed, 11 insertions(+), 14 deletions(-)

--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -90,8 +90,7 @@ static void flat_send_IPI_allbutself(int
_flat_send_IPI_mask(mask, vector);
}
} else if (num_online_cpus() > 1) {
-   __default_send_IPI_shortcut(APIC_DEST_ALLBUT,
-   vector, apic->dest_logical);
+   __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
}
 }
 
@@ -100,8 +99,7 @@ static void flat_send_IPI_all(int vector
if (vector == NMI_VECTOR) {
flat_send_IPI_mask(cpu_online_mask, vector);
} else {
-   __default_send_IPI_shortcut(APIC_DEST_ALLINC,
-   vector, apic->dest_logical);
+   __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector);
}
 }
 
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -16,7 +16,7 @@ static inline void __xapic_wait_icr_idle
cpu_relax();
 }
 
-void __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned 
int dest)
+void __default_send_IPI_shortcut(unsigned int shortcut, int vector)
 {
/*
 * Subtle. In the case of the 'never do double writes' workaround
@@ -33,9 +33,10 @@ void __default_send_IPI_shortcut(unsigne
__xapic_wait_icr_idle();
 
/*
-* No need to touch the target chip field
+* No need to touch the target chip field. Also the destination
+* mode is ignored when a shorthand is used.
 */
-   cfg = __prepare_ICR(shortcut, vector, dest);
+   cfg = __prepare_ICR(shortcut, vector, 0);
 
/*
 * Send the IPI. The write to APIC_ICR fires this off.
@@ -202,8 +203,7 @@ void default_send_IPI_allbutself(int vec
if (no_broadcast || vector == NMI_VECTOR) {
apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
} else {
-   __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector,
-   apic->dest_logical);
+   __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
}
 }
 
@@ -212,14 +212,13 @@ void default_send_IPI_all(int vector)
if (no_broadcast || vector == NMI_VECTOR) {
apic->send_IPI_mask(cpu_online_mask, vector);
} else {
-   __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector,
-   apic->dest_logical);
+   __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector);
}
 }
 
 void default_send_IPI_self(int vector)
 {
-   __default_send_IPI_shortcut(APIC_DEST_SELF, vector, apic->dest_logical);
+   __default_send_IPI_shortcut(APIC_DEST_SELF, vector);
 }
 
 /* must come after the send_IPI functions above for inlining */
--- a/arch/x86/kernel/apic/local.h
+++ b/arch/x86/kernel/apic/local.h
@@ -38,7 +38,7 @@ static inline unsigned int __prepare_ICR
return icr;
 }
 
-void __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned 
int dest);
+void __default_send_IPI_shortcut(unsigned int shortcut, int vector);
 
 /*
  * This is used to send an IPI with no shorthand notation (the destination is
--- a/arch/x86/kernel/apic/probe_64.c
+++ b/arch/x86/kernel/apic/probe_64.c
@@ -40,7 +40,7 @@ void __init default_setup_apic_routing(v
 
 void apic_send_IPI_self(int vector)
 {
-   __default_send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
+   __default_send_IPI_shortcut(APIC_DEST_SELF, vector);
 }
 
 int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)




[patch V3 05/25] x86/apic: Move IPI inlines into ipi.c

2019-07-22 Thread Thomas Gleixner
No point in having them in an header file.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/ipi.h |   19 ---
 arch/x86/kernel/apic/ipi.c |   16 +---
 2 files changed, 13 insertions(+), 22 deletions(-)

--- a/arch/x86/include/asm/ipi.h
+++ b/arch/x86/include/asm/ipi.h
@@ -71,27 +71,8 @@ extern void default_send_IPI_mask_sequen
 extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
 int vector);
 
-/* Avoid include hell */
-#define NMI_VECTOR 0x02
-
 extern int no_broadcast;
 
-static inline void __default_local_send_IPI_allbutself(int vector)
-{
-   if (no_broadcast || vector == NMI_VECTOR)
-   apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
-   else
-   __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector, 
apic->dest_logical);
-}
-
-static inline void __default_local_send_IPI_all(int vector)
-{
-   if (no_broadcast || vector == NMI_VECTOR)
-   apic->send_IPI_mask(cpu_online_mask, vector);
-   else
-   __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector, 
apic->dest_logical);
-}
-
 #ifdef CONFIG_X86_32
 extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
 int vector);
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -198,15 +198,25 @@ void default_send_IPI_allbutself(int vec
 * if there are no other CPUs in the system then we get an APIC send
 * error if we try to broadcast, thus avoid sending IPIs in this case.
 */
-   if (!(num_online_cpus() > 1))
+   if (num_online_cpus() < 2)
return;
 
-   __default_local_send_IPI_allbutself(vector);
+   if (no_broadcast || vector == NMI_VECTOR) {
+   apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
+   } else {
+   __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector,
+   apic->dest_logical);
+   }
 }
 
 void default_send_IPI_all(int vector)
 {
-   __default_local_send_IPI_all(vector);
+   if (no_broadcast || vector == NMI_VECTOR) {
+   apic->send_IPI_mask(cpu_online_mask, vector);
+   } else {
+   __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector,
+   apic->dest_logical);
+   }
 }
 
 void default_send_IPI_self(int vector)




[patch V3 18/25] x86/apic: Provide and use helper for send_IPI_allbutself()

2019-07-22 Thread Thomas Gleixner
To support IPI shorthands wrap invocations of apic->send_IPI_allbutself()
in a helper function, so the static key controlling the shorthand mode is
only in one place.

Fixup all callers.

Signed-off-by: Thomas Gleixner 
---
V2: New patch
---
 arch/x86/include/asm/apic.h |2 ++
 arch/x86/kernel/apic/ipi.c  |   12 
 arch/x86/kernel/kgdb.c  |2 +-
 arch/x86/kernel/reboot.c|7 +--
 arch/x86/kernel/smp.c   |4 ++--
 5 files changed, 18 insertions(+), 9 deletions(-)

--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -177,6 +177,8 @@ extern void lapic_online(void);
 extern void lapic_offline(void);
 extern bool apic_needs_pit(void);
 
+extern void apic_send_IPI_allbutself(unsigned int vector);
+
 #else /* !CONFIG_X86_LOCAL_APIC */
 static inline void lapic_shutdown(void) { }
 #define local_apic_timer_c2_ok 1
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -50,6 +50,18 @@ void apic_smt_update(void)
static_branch_enable(_use_ipi_shorthand);
}
 }
+
+void apic_send_IPI_allbutself(unsigned int vector)
+{
+   if (num_online_cpus() < 2)
+   return;
+
+   if (static_branch_likely(_use_ipi_shorthand))
+   apic->send_IPI_allbutself(vector);
+   else
+   apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
+}
+
 #endif /* CONFIG_SMP */
 
 static inline int __prepare_ICR2(unsigned int mask)
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -416,7 +416,7 @@ static void kgdb_disable_hw_debug(struct
  */
 void kgdb_roundup_cpus(void)
 {
-   apic->send_IPI_allbutself(NMI_VECTOR);
+   apic_send_IPI_allbutself(NMI_VECTOR);
 }
 #endif
 
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -828,11 +828,6 @@ static int crash_nmi_callback(unsigned i
return NMI_HANDLED;
 }
 
-static void smp_send_nmi_allbutself(void)
-{
-   apic->send_IPI_allbutself(NMI_VECTOR);
-}
-
 /*
  * Halt all other CPUs, calling the specified function on each of them
  *
@@ -861,7 +856,7 @@ void nmi_shootdown_cpus(nmi_shootdown_cb
 */
wmb();
 
-   smp_send_nmi_allbutself();
+   apic_send_IPI_allbutself(NMI_VECTOR);
 
/* Kick CPUs looping in NMI context. */
WRITE_ONCE(crash_ipi_issued, 1);
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -209,7 +209,7 @@ static void native_stop_other_cpus(int w
/* sync above data before sending IRQ */
wmb();
 
-   apic->send_IPI_allbutself(REBOOT_VECTOR);
+   apic_send_IPI_allbutself(REBOOT_VECTOR);
 
/*
 * Don't wait longer than a second if the caller
@@ -233,7 +233,7 @@ static void native_stop_other_cpus(int w
 
pr_emerg("Shutting down cpus with NMI\n");
 
-   apic->send_IPI_allbutself(NMI_VECTOR);
+   apic_send_IPI_allbutself(NMI_VECTOR);
 
/*
 * Don't wait longer than a 10 ms if the caller




[patch V3 03/25] x86/apic: Soft disable APIC before initializing it

2019-07-22 Thread Thomas Gleixner
If the APIC was already enabled on entry of setup_local_APIC() then
disabling it soft via the SPIV register makes a lot of sense.

That masks all LVT entries and brings it into a well defined state.

Otherwise previously enabled LVTs which are not touched in the setup
function stay unmasked and might surprise the just booting kernel.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/kernel/apic/apic.c |8 
 1 file changed, 8 insertions(+)

--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1522,6 +1522,14 @@ static void setup_local_APIC(void)
return;
}
 
+   /*
+* If this comes from kexec/kcrash the APIC might be enabled in
+* SPIV. Soft disable it before doing further initialization.
+*/
+   value = apic_read(APIC_SPIV);
+   value &= ~APIC_SPIV_APIC_ENABLED;
+   apic_write(APIC_SPIV, value);
+
 #ifdef CONFIG_X86_32
/* Pound the ESR really hard over the head with a big hammer - mbligh */
if (lapic_is_integrated() && apic->disable_esr) {




[patch V3 21/25] x86/smp: Enhance native_send_call_func_ipi()

2019-07-22 Thread Thomas Gleixner
Nadav noticed that the cpumask allocations in native_send_call_func_ipi()
are noticeable in microbenchmarks.

Use the new cpumask_or_equal() function to simplify the decision whether
the supplied target CPU mask is either equal to cpu_online_mask or equal to
cpu_online_mask except for the CPU on which the function is invoked.

cpumask_or_equal() or's the target mask and the cpumask of the current CPU
together and compares it to cpu_online_mask.

If the result is false, use the mask based IPI function, otherwise check
whether the current CPU is set in the target mask and invoke either the
send_IPI_all() or the send_IPI_allbutselt() APIC callback.

Make the shorthand decision also depend on the static key which enables
shorthand mode. That allows to remove the extra cpumask comparison with
cpu_callout_mask.

Reported-by: Nadav Amit 
Signed-off-by: Thomas Gleixner 
---
V2: New patch
---
 arch/x86/kernel/apic/ipi.c |   24 +++-
 1 file changed, 11 insertions(+), 13 deletions(-)

--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -83,23 +83,21 @@ void native_send_call_func_single_ipi(in
 
 void native_send_call_func_ipi(const struct cpumask *mask)
 {
-   cpumask_var_t allbutself;
+   if (static_branch_likely(_use_ipi_shorthand)) {
+   unsigned int cpu = smp_processor_id();
 
-   if (!alloc_cpumask_var(, GFP_ATOMIC)) {
-   apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
+   if (!cpumask_or_equal(mask, cpumask_of(cpu), cpu_online_mask))
+   goto sendmask;
+
+   if (cpumask_test_cpu(cpu, mask))
+   apic->send_IPI_all(CALL_FUNCTION_VECTOR);
+   else if (num_online_cpus() > 1)
+   apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR);
return;
}
 
-   cpumask_copy(allbutself, cpu_online_mask);
-   __cpumask_clear_cpu(smp_processor_id(), allbutself);
-
-   if (cpumask_equal(mask, allbutself) &&
-   cpumask_equal(cpu_online_mask, cpu_callout_mask))
-   apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR);
-   else
-   apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
-
-   free_cpumask_var(allbutself);
+sendmask:
+   apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
 }
 
 #endif /* CONFIG_SMP */




[patch V3 17/25] x86/apic: Add static key to Control IPI shorthands

2019-07-22 Thread Thomas Gleixner
The IPI shorthand functionality delivers IPI/NMI broadcasts to all CPUs in
the system. This can have similar side effects as the MCE broadcasting when
CPUs are waiting in the BIOS or are offlined.

The kernel tracks already the state of offlined CPUs whether they have been
brought up at least once so that the CR4 MCE bit is set to make sure that
MCE broadcasts can't brick the machine.

Utilize that information and compare it to the cpu_present_mask. If all
present CPUs have been brought up at least once then the broadcast side
effect is mitigated by disabling regular interrupt/IPI delivery in the APIC
itself and by the cpu_ignore_nmi check at the begin of the NMI handler.

Use a static key to switch between broadcasting via shorthands or sending
the IPI/NMI one by one.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/apic.h  |2 ++
 arch/x86/kernel/apic/ipi.c   |   24 +++-
 arch/x86/kernel/apic/local.h |6 ++
 arch/x86/kernel/cpu/common.c |2 ++
 4 files changed, 33 insertions(+), 1 deletion(-)

--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -505,8 +505,10 @@ extern int default_check_phys_apicid_pre
 
 #ifdef CONFIG_SMP
 bool apic_id_is_primary_thread(unsigned int id);
+void apic_smt_update(void);
 #else
 static inline bool apic_id_is_primary_thread(unsigned int id) { return false; }
+static inline void apic_smt_update(void) { }
 #endif
 
 extern void irq_enter(void);
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -5,6 +5,8 @@
 
 #include "local.h"
 
+DEFINE_STATIC_KEY_FALSE(apic_use_ipi_shorthand);
+
 #ifdef CONFIG_SMP
 #ifdef CONFIG_HOTPLUG_CPU
 #define DEFAULT_SEND_IPI   (1)
@@ -28,7 +30,27 @@ static int __init print_ipi_mode(void)
return 0;
 }
 late_initcall(print_ipi_mode);
-#endif
+
+void apic_smt_update(void)
+{
+   /*
+* Do not switch to broadcast mode if:
+* - Disabled on the command line
+* - Only a single CPU is online
+* - Not all present CPUs have been at least booted once
+*
+* The latter is important as the local APIC might be in some
+* random state and a broadcast might cause havoc. That's
+* especially true for NMI broadcasting.
+*/
+   if (apic_ipi_shorthand_off || num_online_cpus() == 1 ||
+   !cpumask_equal(cpu_present_mask, _booted_once_mask)) {
+   static_branch_disable(_use_ipi_shorthand);
+   } else {
+   static_branch_enable(_use_ipi_shorthand);
+   }
+}
+#endif /* CONFIG_SMP */
 
 static inline int __prepare_ICR2(unsigned int mask)
 {
--- a/arch/x86/kernel/apic/local.h
+++ b/arch/x86/kernel/apic/local.h
@@ -7,6 +7,9 @@
  * (c) 1998-99, 2000 Ingo Molnar 
  * (c) 2002,2003 Andi Kleen, SuSE Labs.
  */
+
+#include 
+
 #include 
 
 /* APIC flat 64 */
@@ -22,6 +25,9 @@ int x2apic_phys_pkg_id(int initial_apici
 void x2apic_send_IPI_self(int vector);
 
 /* IPI */
+
+DECLARE_STATIC_KEY_FALSE(apic_use_ipi_shorthand);
+
 static inline unsigned int __prepare_ICR(unsigned int shortcut, int vector,
 unsigned int dest)
 {
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1913,4 +1913,6 @@ void arch_smt_update(void)
 {
/* Handle the speculative execution misfeatures */
cpu_bugs_smt_update();
+   /* Check whether IPI broadcasting can be enabled */
+   apic_smt_update();
 }




[patch V3 25/25] x86/apic/x2apic: Implement IPI shorthands support

2019-07-22 Thread Thomas Gleixner
All callers of apic->send_IPI_all() and apic->send_IPI_allbutself() contain
the decision logic for shorthand invocation already and invoke
send_IPI_mask() if the prereqisites are not satisfied.

Implement shorthand support for x2apic.

Signed-off-by: Thomas Gleixner 
---
V2: Remove the decision logic now that it is already done in the callers
---
 arch/x86/kernel/apic/local.h  |1 +
 arch/x86/kernel/apic/x2apic_cluster.c |4 ++--
 arch/x86/kernel/apic/x2apic_phys.c|   12 ++--
 3 files changed, 13 insertions(+), 4 deletions(-)

--- a/arch/x86/kernel/apic/local.h
+++ b/arch/x86/kernel/apic/local.h
@@ -23,6 +23,7 @@ unsigned int x2apic_get_apic_id(unsigned
 u32 x2apic_set_apic_id(unsigned int id);
 int x2apic_phys_pkg_id(int initial_apicid, int index_msb);
 void x2apic_send_IPI_self(int vector);
+void __x2apic_send_IPI_shorthand(int vector, u32 which);
 
 /* IPI */
 
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -82,12 +82,12 @@ x2apic_send_IPI_mask_allbutself(const st
 
 static void x2apic_send_IPI_allbutself(int vector)
 {
-   __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
+   __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT);
 }
 
 static void x2apic_send_IPI_all(int vector)
 {
-   __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
+   __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC);
 }
 
 static u32 x2apic_calc_apicid(unsigned int cpu)
--- a/arch/x86/kernel/apic/x2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -75,12 +75,12 @@ static void
 
 static void x2apic_send_IPI_allbutself(int vector)
 {
-   __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
+   __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT);
 }
 
 static void x2apic_send_IPI_all(int vector)
 {
-   __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
+   __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC);
 }
 
 static void init_x2apic_ldr(void)
@@ -112,6 +112,14 @@ void __x2apic_send_IPI_dest(unsigned int
native_x2apic_icr_write(cfg, apicid);
 }
 
+void __x2apic_send_IPI_shorthand(int vector, u32 which)
+{
+   unsigned long cfg = __prepare_ICR(which, vector, 0);
+
+   x2apic_wrmsr_fence();
+   native_x2apic_icr_write(cfg, 0);
+}
+
 unsigned int x2apic_get_apic_id(unsigned long id)
 {
return id;




[patch V3 19/25] cpumask: Implement cpumask_or_equal()

2019-07-22 Thread Thomas Gleixner
The IPI code of x86 needs to evaluate whether the target cpumask is equal
to the cpu_online_mask or equal except for the calling CPU.

To replace the current implementation which requires the usage of a
temporary cpumask, which might involve allocations, add a new function
which compares a cpumask to the result of two other cpumasks which are
or'ed together before comparison.

This allows to make the required decision in one go and the calling code
then can check for the calling CPU being set in the target mask with
cpumask_test_cpu().

Signed-off-by: Thomas Gleixner 
---
V2: New patch
---
 include/linux/bitmap.h  |   23 +++
 include/linux/cpumask.h |   14 ++
 lib/bitmap.c|   20 
 3 files changed, 57 insertions(+)

--- a/include/linux/bitmap.h
+++ b/include/linux/bitmap.h
@@ -120,6 +120,10 @@ extern int __bitmap_empty(const unsigned
 extern int __bitmap_full(const unsigned long *bitmap, unsigned int nbits);
 extern int __bitmap_equal(const unsigned long *bitmap1,
  const unsigned long *bitmap2, unsigned int nbits);
+extern bool __pure __bitmap_or_equal(const unsigned long *src1,
+const unsigned long *src2,
+const unsigned long *src3,
+unsigned int nbits);
 extern void __bitmap_complement(unsigned long *dst, const unsigned long *src,
unsigned int nbits);
 extern void __bitmap_shift_right(unsigned long *dst, const unsigned long *src,
@@ -321,6 +325,25 @@ static inline int bitmap_equal(const uns
return __bitmap_equal(src1, src2, nbits);
 }
 
+/**
+ * bitmap_or_equal - Check whether the or of two bitnaps is equal to a third
+ * @src1:  Pointer to bitmap 1
+ * @src2:  Pointer to bitmap 2 will be or'ed with bitmap 1
+ * @src3:  Pointer to bitmap 3. Compare to the result of *@src1 | *@src2
+ *
+ * Returns: True if (*@src1 | *@src2) == *@src3, false otherwise
+ */
+static inline bool bitmap_or_equal(const unsigned long *src1,
+  const unsigned long *src2,
+  const unsigned long *src3,
+  unsigned int nbits)
+{
+   if (!small_const_nbits(nbits))
+   return __bitmap_or_equal(src1, src2, src3, nbits);
+
+   return !(((*src1 | *src2) ^ *src3) & BITMAP_LAST_WORD_MASK(nbits));
+}
+
 static inline int bitmap_intersects(const unsigned long *src1,
const unsigned long *src2, unsigned int nbits)
 {
--- a/include/linux/cpumask.h
+++ b/include/linux/cpumask.h
@@ -476,6 +476,20 @@ static inline bool cpumask_equal(const s
 }
 
 /**
+ * cpumask_or_equal - *src1p | *src2p == *src3p
+ * @src1p: the first input
+ * @src2p: the second input
+ * @src3p: the third input
+ */
+static inline bool cpumask_or_equal(const struct cpumask *src1p,
+   const struct cpumask *src2p,
+   const struct cpumask *src3p)
+{
+   return bitmap_or_equal(cpumask_bits(src1p), cpumask_bits(src2p),
+  cpumask_bits(src3p), nr_cpumask_bits);
+}
+
+/**
  * cpumask_intersects - (*src1p & *src2p) != 0
  * @src1p: the first input
  * @src2p: the second input
--- a/lib/bitmap.c
+++ b/lib/bitmap.c
@@ -59,6 +59,26 @@ int __bitmap_equal(const unsigned long *
 }
 EXPORT_SYMBOL(__bitmap_equal);
 
+bool __bitmap_or_equal(const unsigned long *bitmap1,
+  const unsigned long *bitmap2,
+  const unsigned long *bitmap3,
+  unsigned int bits)
+{
+   unsigned int k, lim = bits / BITS_PER_LONG;
+   unsigned long tmp;
+
+   for (k = 0; k < lim; ++k) {
+   if ((bitmap1[k] | bitmap2[k]) != bitmap3[k])
+   return false;
+   }
+
+   if (!(bits % BITS_PER_LONG))
+   return true;
+
+   tmp = (bitmap1[k] | bitmap2[k]) ^ bitmap3[k];
+   return (tmp & BITMAP_LAST_WORD_MASK(bits)) == 0;
+}
+
 void __bitmap_complement(unsigned long *dst, const unsigned long *src, 
unsigned int bits)
 {
unsigned int k, lim = BITS_TO_LONGS(bits);




[patch V3 08/25] x86/apic: Move apic_flat_64 header into apic directory

2019-07-22 Thread Thomas Gleixner
Only used locally.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/apic_flat_64.h  |8 
 arch/x86/kernel/apic/apic_flat_64.c  |2 +-
 arch/x86/kernel/apic/apic_flat_64.h  |8 
 arch/x86/kernel/apic/apic_numachip.c |2 +-
 4 files changed, 10 insertions(+), 10 deletions(-)

--- a/arch/x86/include/asm/apic_flat_64.h
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_X86_APIC_FLAT_64_H
-#define _ASM_X86_APIC_FLAT_64_H
-
-extern void flat_init_apic_ldr(void);
-
-#endif
-
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -13,9 +13,9 @@
 #include 
 
 #include 
-#include 
 #include 
 
+#include "apic_flat_64.h"
 #include "ipi.h"
 
 static struct apic apic_physflat;
--- /dev/null
+++ b/arch/x86/kernel/apic/apic_flat_64.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_X86_APIC_FLAT_64_H
+#define _ASM_X86_APIC_FLAT_64_H
+
+extern void flat_init_apic_ldr(void);
+
+#endif
+
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -16,9 +16,9 @@
 #include 
 #include 
 
-#include 
 #include 
 
+#include "apic_flat_64.h"
 #include "ipi.h"
 
 u8 numachip_system __read_mostly;




[patch V3 24/25] x86/apic/flat64: Remove the IPI shorthand decision logic

2019-07-22 Thread Thomas Gleixner
All callers of apic->send_IPI_all() and apic->send_IPI_allbutself() contain
the decision logic for shorthand invocation already and invoke
send_IPI_mask() if the prereqisites are not satisfied.

Remove the now redundant decision logic in the APIC code and the duplicate
helper in probe_64.c.

Signed-off-by: Thomas Gleixner 
---
V2: Remove the decision logic now that it is already done in the callers
Drop the duplicate helper
---
 arch/x86/include/asm/apic.h |4 --
 arch/x86/kernel/apic/apic_flat_64.c |   49 
 arch/x86/kernel/apic/probe_64.c |7 -
 3 files changed, 6 insertions(+), 54 deletions(-)

--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -468,10 +468,6 @@ static inline unsigned default_get_apic_
 #define TRAMPOLINE_PHYS_LOW0x467
 #define TRAMPOLINE_PHYS_HIGH   0x469
 
-#ifdef CONFIG_X86_64
-extern void apic_send_IPI_self(int vector);
-#endif
-
 extern void generic_bigsmp_probe(void);
 
 #ifdef CONFIG_X86_LOCAL_APIC
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -76,33 +76,6 @@ flat_send_IPI_mask_allbutself(const stru
_flat_send_IPI_mask(mask, vector);
 }
 
-static void flat_send_IPI_allbutself(int vector)
-{
-   int cpu = smp_processor_id();
-
-   if (IS_ENABLED(CONFIG_HOTPLUG_CPU) || vector == NMI_VECTOR) {
-   if (!cpumask_equal(cpu_online_mask, cpumask_of(cpu))) {
-   unsigned long mask = cpumask_bits(cpu_online_mask)[0];
-
-   if (cpu < BITS_PER_LONG)
-   __clear_bit(cpu, );
-
-   _flat_send_IPI_mask(mask, vector);
-   }
-   } else if (num_online_cpus() > 1) {
-   __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
-   }
-}
-
-static void flat_send_IPI_all(int vector)
-{
-   if (vector == NMI_VECTOR) {
-   flat_send_IPI_mask(cpu_online_mask, vector);
-   } else {
-   __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector);
-   }
-}
-
 static unsigned int flat_get_apic_id(unsigned long x)
 {
return (x >> 24) & 0xFF;
@@ -164,9 +137,9 @@ static struct apic apic_flat __ro_after_
.send_IPI   = default_send_IPI_single,
.send_IPI_mask  = flat_send_IPI_mask,
.send_IPI_mask_allbutself   = flat_send_IPI_mask_allbutself,
-   .send_IPI_allbutself= flat_send_IPI_allbutself,
-   .send_IPI_all   = flat_send_IPI_all,
-   .send_IPI_self  = apic_send_IPI_self,
+   .send_IPI_allbutself= default_send_IPI_allbutself,
+   .send_IPI_all   = default_send_IPI_all,
+   .send_IPI_self  = default_send_IPI_self,
 
.inquire_remote_apic= default_inquire_remote_apic,
 
@@ -216,16 +189,6 @@ static void physflat_init_apic_ldr(void)
 */
 }
 
-static void physflat_send_IPI_allbutself(int vector)
-{
-   default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
-}
-
-static void physflat_send_IPI_all(int vector)
-{
-   default_send_IPI_mask_sequence_phys(cpu_online_mask, vector);
-}
-
 static int physflat_probe(void)
 {
if (apic == _physflat || num_possible_cpus() > 8 ||
@@ -267,9 +230,9 @@ static struct apic apic_physflat __ro_af
.send_IPI   = default_send_IPI_single_phys,
.send_IPI_mask  = default_send_IPI_mask_sequence_phys,
.send_IPI_mask_allbutself   = default_send_IPI_mask_allbutself_phys,
-   .send_IPI_allbutself= physflat_send_IPI_allbutself,
-   .send_IPI_all   = physflat_send_IPI_all,
-   .send_IPI_self  = apic_send_IPI_self,
+   .send_IPI_allbutself= default_send_IPI_allbutself,
+   .send_IPI_all   = default_send_IPI_all,
+   .send_IPI_self  = default_send_IPI_self,
 
.inquire_remote_apic= default_inquire_remote_apic,
 
--- a/arch/x86/kernel/apic/probe_64.c
+++ b/arch/x86/kernel/apic/probe_64.c
@@ -36,13 +36,6 @@ void __init default_setup_apic_routing(v
x86_platform.apic_post_init();
 }
 
-/* Same for both flat and physical. */
-
-void apic_send_IPI_self(int vector)
-{
-   __default_send_IPI_shortcut(APIC_DEST_SELF, vector);
-}
-
 int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 {
struct apic **drv;




[patch V3 02/25] x86/apic: Invoke perf_events_lapic_init() after enabling APIC

2019-07-22 Thread Thomas Gleixner
If the APIC is soft disabled then unmasking an LVT entry does not work and
the write is ignored. perf_events_lapic_init() tries to do so.

Move the invocation after the point where the APIC has been enabled.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/kernel/apic/apic.c |5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1517,7 +1517,6 @@ static void setup_local_APIC(void)
int logical_apicid, ldr_apicid;
 #endif
 
-
if (disable_apic) {
disable_ioapic_support();
return;
@@ -1532,8 +1531,6 @@ static void setup_local_APIC(void)
apic_write(APIC_ESR, 0);
}
 #endif
-   perf_events_lapic_init();
-
/*
 * Double-check whether this APIC is really registered.
 * This is meaningless in clustered apic mode, so we skip it.
@@ -1614,6 +1611,8 @@ static void setup_local_APIC(void)
value |= SPURIOUS_APIC_VECTOR;
apic_write(APIC_SPIV, value);
 
+   perf_events_lapic_init();
+
/*
 * Set up LVT0, LVT1:
 *




[patch V3 13/25] x86/hotplug: Silence APIC and NMI when CPU is dead

2019-07-22 Thread Thomas Gleixner
In order to support IPI/NMI broadcasting via the shorthand mechanism side
effects of shorthands need to be mitigated:

 Shorthand IPIs and NMIs hit all CPUs including unplugged CPUs

Neither of those can be handled on unplugged CPUs for obvious reasons.

It would be trivial to just fully disable the APIC via the enable bit in
MSR_APICBASE. But that's not possible because clearing that bit on systems
based on the 3 wire APIC bus would require a hardware reset to bring it
back as the APIC would lose track of bus arbitration. On systems with FSB
delivery APICBASE could be disabled, but it has to be guaranteed that no
interrupt is sent to the APIC while in that state and it's not clear from
the SDM whether it still responds to INIT/SIPI messages.

Therefore stay on the safe side and switch the APIC into soft disabled mode
so it won't deliver any regular vector to the CPU.

NMIs are still propagated to the 'dead' CPUs. To mitigate that add a per
cpu variable which tells the NMI handler to ignore NMIs. Note, this cannot
use the stop/restart_nmi() magic which is used in the alternatives code. A
dead CPU cannot invoke nmi_enter() or anything else due to RCU and other
reasons.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/apic.h  |1 +
 arch/x86/include/asm/processor.h |2 ++
 arch/x86/kernel/apic/apic.c  |   35 ---
 arch/x86/kernel/nmi.c|3 +++
 arch/x86/kernel/smpboot.c|   13 -
 5 files changed, 42 insertions(+), 12 deletions(-)

--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -136,6 +136,7 @@ extern int lapic_get_maxlvt(void);
 extern void clear_local_APIC(void);
 extern void disconnect_bsp_APIC(int virt_wire_setup);
 extern void disable_local_APIC(void);
+extern void apic_soft_disable(void);
 extern void lapic_shutdown(void);
 extern void sync_Arb_IDs(void);
 extern void init_bsp_APIC(void);
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -428,6 +428,8 @@ DECLARE_PER_CPU_ALIGNED(struct stack_can
 DECLARE_PER_CPU(struct irq_stack *, softirq_stack_ptr);
 #endif /* X86_64 */
 
+DECLARE_PER_CPU(bool, cpu_ignore_nmi);
+
 extern unsigned int fpu_kernel_xstate_size;
 extern unsigned int fpu_user_xstate_size;
 
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1182,25 +1182,38 @@ void clear_local_APIC(void)
 }
 
 /**
- * disable_local_APIC - clear and disable the local APIC
+ * apic_soft_disable - Clears and software disables the local APIC on hotplug
+ *
+ * Contrary to disable_local_APIC() this does not touch the enable bit in
+ * MSR_IA32_APICBASE. Clearing that bit on systems based on the 3 wire APIC
+ * bus would require a hardware reset as the APIC would lose track of bus
+ * arbitration. On systems with FSB delivery APICBASE could be disabled,
+ * but it has to be guaranteed that no interrupt is sent to the APIC while
+ * in that state and it's not clear from the SDM whether it still responds
+ * to INIT/SIPI messages. Stay on the safe side and use software disable.
  */
-void disable_local_APIC(void)
+void apic_soft_disable(void)
 {
-   unsigned int value;
-
-   /* APIC hasn't been mapped yet */
-   if (!x2apic_mode && !apic_phys)
-   return;
+   u32 value;
 
clear_local_APIC();
 
-   /*
-* Disable APIC (implies clearing of registers
-* for 82489DX!).
-*/
+   /* Soft disable APIC (implies clearing of registers for 82489DX!). */
value = apic_read(APIC_SPIV);
value &= ~APIC_SPIV_APIC_ENABLED;
apic_write(APIC_SPIV, value);
+}
+
+/**
+ * disable_local_APIC - clear and disable the local APIC
+ */
+void disable_local_APIC(void)
+{
+   /* APIC hasn't been mapped yet */
+   if (!x2apic_mode && !apic_phys)
+   return;
+
+   apic_soft_disable();
 
 #ifdef CONFIG_X86_32
/*
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -512,6 +512,9 @@ NOKPROBE_SYMBOL(is_debug_stack);
 dotraplinkage notrace void
 do_nmi(struct pt_regs *regs, long error_code)
 {
+   if (IS_ENABLED(CONFIG_SMP) && this_cpu_read(cpu_ignore_nmi))
+   return;
+
if (this_cpu_read(nmi_state) != NMI_NOT_RUNNING) {
this_cpu_write(nmi_state, NMI_LATCHED);
return;
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -81,6 +81,9 @@
 #include 
 #include 
 
+/* Flag for the NMI path telling it to ignore the NMI */
+DEFINE_PER_CPU(bool, cpu_ignore_nmi);
+
 /* representing HT siblings of each logical CPU */
 DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map);
 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
@@ -263,6 +266,8 @@ static void notrace start_secondary(void
unlock_vector_lock();
cpu_set_state_online(smp_processor_id());
x86_platform.nmi_init();
+   /* Reenable NMI handling */
+   this_cpu_write(cpu_ignore_nmi, false);
 
/* enable local interrupts */
  

[patch V3 16/25] x86/apic: Move no_ipi_broadcast() out of 32bit

2019-07-22 Thread Thomas Gleixner
For the upcoming shorthand support for all APIC incarnations the command
line option needs to be available for 64 bit as well.

While at it, rename the control variable, make it static and mark it
__ro_after_init.

Signed-off-by: Thomas Gleixner 
---
 arch/x86/kernel/apic/ipi.c  |   29 +++--
 arch/x86/kernel/apic/local.h|2 --
 arch/x86/kernel/apic/probe_32.c |   25 -
 3 files changed, 27 insertions(+), 29 deletions(-)

--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -5,6 +5,31 @@
 
 #include "local.h"
 
+#ifdef CONFIG_SMP
+#ifdef CONFIG_HOTPLUG_CPU
+#define DEFAULT_SEND_IPI   (1)
+#else
+#define DEFAULT_SEND_IPI   (0)
+#endif
+
+static int apic_ipi_shorthand_off __ro_after_init = DEFAULT_SEND_IPI;
+
+static __init int apic_ipi_shorthand(char *str)
+{
+   get_option(, _ipi_shorthand_off);
+   return 1;
+}
+__setup("no_ipi_broadcast=", apic_ipi_shorthand);
+
+static int __init print_ipi_mode(void)
+{
+   pr_info("IPI shorthand broadcast: %s\n",
+   apic_ipi_shorthand_off ? "disabled" : "enabled");
+   return 0;
+}
+late_initcall(print_ipi_mode);
+#endif
+
 static inline int __prepare_ICR2(unsigned int mask)
 {
return SET_APIC_DEST_FIELD(mask);
@@ -203,7 +228,7 @@ void default_send_IPI_allbutself(int vec
if (num_online_cpus() < 2)
return;
 
-   if (no_broadcast || vector == NMI_VECTOR) {
+   if (apic_ipi_shorthand_off || vector == NMI_VECTOR) {
apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
} else {
__default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
@@ -212,7 +237,7 @@ void default_send_IPI_allbutself(int vec
 
 void default_send_IPI_all(int vector)
 {
-   if (no_broadcast || vector == NMI_VECTOR) {
+   if (apic_ipi_shorthand_off || vector == NMI_VECTOR) {
apic->send_IPI_mask(cpu_online_mask, vector);
} else {
__default_send_IPI_shortcut(APIC_DEST_ALLINC, vector);
--- a/arch/x86/kernel/apic/local.h
+++ b/arch/x86/kernel/apic/local.h
@@ -51,8 +51,6 @@ void default_send_IPI_single_phys(int cp
 void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int 
vector);
 void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask, int 
vector);
 
-extern int no_broadcast;
-
 #ifdef CONFIG_X86_32
 void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, int 
vector);
 void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, int 
vector);
--- a/arch/x86/kernel/apic/probe_32.c
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -15,31 +15,6 @@
 
 #include "local.h"
 
-#ifdef CONFIG_HOTPLUG_CPU
-#define DEFAULT_SEND_IPI   (1)
-#else
-#define DEFAULT_SEND_IPI   (0)
-#endif
-
-int no_broadcast = DEFAULT_SEND_IPI;
-
-static __init int no_ipi_broadcast(char *str)
-{
-   get_option(, _broadcast);
-   pr_info("Using %s mode\n",
-   no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
-   return 1;
-}
-__setup("no_ipi_broadcast=", no_ipi_broadcast);
-
-static int __init print_ipi_mode(void)
-{
-   pr_info("Using IPI %s mode\n",
-   no_broadcast ? "No-Shortcut" : "Shortcut");
-   return 0;
-}
-late_initcall(print_ipi_mode);
-
 static int default_x86_32_early_logical_apicid(int cpu)
 {
return 1 << cpu;




[patch V3 11/25] smp/hotplug: Track booted once CPUs in a cpumask

2019-07-22 Thread Thomas Gleixner
The booted once information which is required to deal with the MCE
broadcast issue on X86 correctly is stored in the per cpu hotplug state,
which is perfectly fine for the intended purpose.

X86 needs that information for supporting NMI broadcasting via shortcuts,
but retrieving it from per cpu data is cumbersome.

Move it to a cpumask so the information can be checked against the
cpu_present_mask quickly.

No functional change intended.

Signed-off-by: Thomas Gleixner 
---
 include/linux/cpumask.h |2 ++
 kernel/cpu.c|   11 +++
 2 files changed, 9 insertions(+), 4 deletions(-)

--- a/include/linux/cpumask.h
+++ b/include/linux/cpumask.h
@@ -115,6 +115,8 @@ extern struct cpumask __cpu_active_mask;
 #define cpu_active(cpu)((cpu) == 0)
 #endif
 
+extern cpumask_t cpus_booted_once_mask;
+
 static inline void cpu_max_bits_warn(unsigned int cpu, unsigned int bits)
 {
 #ifdef CONFIG_DEBUG_PER_CPU_MAPS
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
@@ -62,7 +62,6 @@ struct cpuhp_cpu_state {
boolrollback;
boolsingle;
boolbringup;
-   boolbooted_once;
struct hlist_node   *node;
struct hlist_node   *last;
enum cpuhp_statecb_state;
@@ -76,6 +75,10 @@ static DEFINE_PER_CPU(struct cpuhp_cpu_s
.fail = CPUHP_INVALID,
 };
 
+#ifdef CONFIG_SMP
+cpumask_t cpus_booted_once_mask;
+#endif
+
 #if defined(CONFIG_LOCKDEP) && defined(CONFIG_SMP)
 static struct lockdep_map cpuhp_state_up_map =
STATIC_LOCKDEP_MAP_INIT("cpuhp_state-up", _state_up_map);
@@ -433,7 +436,7 @@ static inline bool cpu_smt_allowed(unsig
 * CPU. Otherwise, a broadacasted MCE observing CR4.MCE=0b on any
 * core will shutdown the machine.
 */
-   return !per_cpu(cpuhp_state, cpu).booted_once;
+   return !cpumask_test_cpu(cpu, _booted_once_mask);
 }
 #else
 static inline bool cpu_smt_allowed(unsigned int cpu) { return true; }
@@ -1066,7 +1069,7 @@ void notify_cpu_starting(unsigned int cp
int ret;
 
rcu_cpu_starting(cpu);  /* Enables RCU usage on this CPU. */
-   st->booted_once = true;
+   cpumask_set_cpu(cpu, _booted_once_mask);
while (st->state < target) {
st->state++;
ret = cpuhp_invoke_callback(cpu, st->state, true, NULL, NULL);
@@ -2334,7 +2337,7 @@ void __init boot_cpu_init(void)
 void __init boot_cpu_hotplug_init(void)
 {
 #ifdef CONFIG_SMP
-   this_cpu_write(cpuhp_state.booted_once, true);
+   cpumask_set_cpu(smp_processor_id(), _booted_once_mask);
 #endif
this_cpu_write(cpuhp_state.state, CPUHP_ONLINE);
 }




[patch V3 20/25] x86/smp: Move smp_function_call implementations into IPI code

2019-07-22 Thread Thomas Gleixner
Move it where it belongs. That allows to keep all the shorthand logic in
one place.

No functional change.

Signed-off-by: Thomas Gleixner 
---
V2: New patch
---
 arch/x86/include/asm/smp.h |1 +
 arch/x86/kernel/apic/ipi.c |   40 
 arch/x86/kernel/smp.c  |   40 
 3 files changed, 41 insertions(+), 40 deletions(-)

--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -143,6 +143,7 @@ void play_dead_common(void);
 void wbinvd_on_cpu(int cpu);
 int wbinvd_on_all_cpus(void);
 
+void native_smp_send_reschedule(int cpu);
 void native_send_call_func_ipi(const struct cpumask *mask);
 void native_send_call_func_single_ipi(int cpu);
 void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle);
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -62,6 +62,46 @@ void apic_send_IPI_allbutself(unsigned i
apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
 }
 
+/*
+ * Send a 'reschedule' IPI to another CPU. It goes straight through and
+ * wastes no time serializing anything. Worst case is that we lose a
+ * reschedule ...
+ */
+void native_smp_send_reschedule(int cpu)
+{
+   if (unlikely(cpu_is_offline(cpu))) {
+   WARN(1, "sched: Unexpected reschedule of offline CPU#%d!\n", 
cpu);
+   return;
+   }
+   apic->send_IPI(cpu, RESCHEDULE_VECTOR);
+}
+
+void native_send_call_func_single_ipi(int cpu)
+{
+   apic->send_IPI(cpu, CALL_FUNCTION_SINGLE_VECTOR);
+}
+
+void native_send_call_func_ipi(const struct cpumask *mask)
+{
+   cpumask_var_t allbutself;
+
+   if (!alloc_cpumask_var(, GFP_ATOMIC)) {
+   apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
+   return;
+   }
+
+   cpumask_copy(allbutself, cpu_online_mask);
+   __cpumask_clear_cpu(smp_processor_id(), allbutself);
+
+   if (cpumask_equal(mask, allbutself) &&
+   cpumask_equal(cpu_online_mask, cpu_callout_mask))
+   apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR);
+   else
+   apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
+
+   free_cpumask_var(allbutself);
+}
+
 #endif /* CONFIG_SMP */
 
 static inline int __prepare_ICR2(unsigned int mask)
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -115,46 +115,6 @@
 static atomic_t stopping_cpu = ATOMIC_INIT(-1);
 static bool smp_no_nmi_ipi = false;
 
-/*
- * this function sends a 'reschedule' IPI to another CPU.
- * it goes straight through and wastes no time serializing
- * anything. Worst case is that we lose a reschedule ...
- */
-static void native_smp_send_reschedule(int cpu)
-{
-   if (unlikely(cpu_is_offline(cpu))) {
-   WARN(1, "sched: Unexpected reschedule of offline CPU#%d!\n", 
cpu);
-   return;
-   }
-   apic->send_IPI(cpu, RESCHEDULE_VECTOR);
-}
-
-void native_send_call_func_single_ipi(int cpu)
-{
-   apic->send_IPI(cpu, CALL_FUNCTION_SINGLE_VECTOR);
-}
-
-void native_send_call_func_ipi(const struct cpumask *mask)
-{
-   cpumask_var_t allbutself;
-
-   if (!alloc_cpumask_var(, GFP_ATOMIC)) {
-   apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
-   return;
-   }
-
-   cpumask_copy(allbutself, cpu_online_mask);
-   __cpumask_clear_cpu(smp_processor_id(), allbutself);
-
-   if (cpumask_equal(mask, allbutself) &&
-   cpumask_equal(cpu_online_mask, cpu_callout_mask))
-   apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR);
-   else
-   apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
-
-   free_cpumask_var(allbutself);
-}
-
 static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs)
 {
/* We are registered on stopping cpu too, avoid spurious NMI */




[patch V3 22/25] x86/apic: Remove the shorthand decision logic

2019-07-22 Thread Thomas Gleixner
All callers of apic->send_IPI_all() and apic->send_IPI_allbutself() contain
the decision logic for shorthand invocation already and invoke
send_IPI_mask() if the prereqisites are not satisfied.

Remove the now redundant decision logic in the 32bit implementation.

Signed-off-by: Thomas Gleixner 
---
V2: Remove the decision logic now that it is already done in the callers
---
 arch/x86/kernel/apic/ipi.c |   27 +++
 1 file changed, 3 insertions(+), 24 deletions(-)

--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -8,13 +8,7 @@
 DEFINE_STATIC_KEY_FALSE(apic_use_ipi_shorthand);
 
 #ifdef CONFIG_SMP
-#ifdef CONFIG_HOTPLUG_CPU
-#define DEFAULT_SEND_IPI   (1)
-#else
-#define DEFAULT_SEND_IPI   (0)
-#endif
-
-static int apic_ipi_shorthand_off __ro_after_init = DEFAULT_SEND_IPI;
+static int apic_ipi_shorthand_off __ro_after_init;
 
 static __init int apic_ipi_shorthand(char *str)
 {
@@ -293,27 +287,12 @@ void default_send_IPI_mask_logical(const
 
 void default_send_IPI_allbutself(int vector)
 {
-   /*
-* if there are no other CPUs in the system then we get an APIC send
-* error if we try to broadcast, thus avoid sending IPIs in this case.
-*/
-   if (num_online_cpus() < 2)
-   return;
-
-   if (apic_ipi_shorthand_off || vector == NMI_VECTOR) {
-   apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
-   } else {
-   __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
-   }
+   __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
 }
 
 void default_send_IPI_all(int vector)
 {
-   if (apic_ipi_shorthand_off || vector == NMI_VECTOR) {
-   apic->send_IPI_mask(cpu_online_mask, vector);
-   } else {
-   __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector);
-   }
+   __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector);
 }
 
 void default_send_IPI_self(int vector)




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