[linux-yocto][linux-yocto v6.6/standard/nxp-sdk-6.6/nxp-soc & v6.6/standard/preempt-rt/nxp-sdk-6.6/nxp-soc][PATCH 6/6] Revert "arm64: dts: imx8-ss-lsio: fix pwm lpcg indices"
This reverts commit e9e44fc88abadc52ca6b0f1f8307e6967ddbec22.
The clock driver clk-imx8qxp-lpcg still uses LPCG bit-offset instead of
clock-indices for clock-controller dts properties, so it can not switch
to use lpcg indices.
Signed-off-by: Xulin Sun
---
arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
index 8475b7a37316..0677cbef8f2b 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
@@ -32,8 +32,8 @@ lsio_pwm0: pwm@5d00 {
compatible = "fsl,imx27-pwm";
reg = <0x5d00 0x1>;
clock-names = "ipg", "per";
- clocks = <_lpcg IMX_LPCG_CLK_6>,
-<_lpcg IMX_LPCG_CLK_1>;
+ clocks = <_lpcg 4>,
+<_lpcg 1>;
assigned-clocks = < IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <2400>;
#pwm-cells = <3>;
@@ -45,8 +45,8 @@ lsio_pwm1: pwm@5d01 {
compatible = "fsl,imx27-pwm";
reg = <0x5d01 0x1>;
clock-names = "ipg", "per";
- clocks = <_lpcg IMX_LPCG_CLK_6>,
-<_lpcg IMX_LPCG_CLK_1>;
+ clocks = <_lpcg 4>,
+<_lpcg 1>;
assigned-clocks = < IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <2400>;
#pwm-cells = <3>;
@@ -58,8 +58,8 @@ lsio_pwm2: pwm@5d02 {
compatible = "fsl,imx27-pwm";
reg = <0x5d02 0x1>;
clock-names = "ipg", "per";
- clocks = <_lpcg IMX_LPCG_CLK_6>,
-<_lpcg IMX_LPCG_CLK_1>;
+ clocks = <_lpcg 4>,
+<_lpcg 1>;
assigned-clocks = < IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <2400>;
#pwm-cells = <3>;
@@ -71,8 +71,8 @@ lsio_pwm3: pwm@5d03 {
compatible = "fsl,imx27-pwm";
reg = <0x5d03 0x1>;
clock-names = "ipg", "per";
- clocks = <_lpcg IMX_LPCG_CLK_6>,
-<_lpcg IMX_LPCG_CLK_1>;
+ clocks = <_lpcg 4>,
+<_lpcg 1>;
assigned-clocks = < IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <2400>;
#pwm-cells = <3>;
--
2.34.1
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[linux-yocto][linux-yocto v6.6/standard/nxp-sdk-6.6/nxp-soc & v6.6/standard/preempt-rt/nxp-sdk-6.6/nxp-soc][PATCH 5/6] Revert "arm64: dts: imx8qm-ss-dma: fix can lpcg indices"
This reverts commit 20ceb2b50fd5a59825daba5fb82021768afe9f71.
The clock driver clk-imx8qxp-lpcg still uses LPCG bit-offset instead of
clock-indices for clock-controller dts properties, so it can not switch
to use lpcg indices.
Signed-off-by: Xulin Sun
---
arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
index b3a5ab539573..b4eda76d435c 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
@@ -92,15 +92,15 @@ {
};
{
- clocks = <_lpcg IMX_LPCG_CLK_4>,
-<_lpcg IMX_LPCG_CLK_0>;
+ clocks = <_lpcg 1>,
+<_lpcg 0>;
assigned-clocks = < IMX_SC_R_CAN_1 IMX_SC_PM_CLK_PER>;
fsl,clk-source = /bits/ 8 <1>;
};
{
- clocks = <_lpcg IMX_LPCG_CLK_4>,
-<_lpcg IMX_LPCG_CLK_0>;
+ clocks = <_lpcg 1>,
+<_lpcg 0>;
assigned-clocks = < IMX_SC_R_CAN_2 IMX_SC_PM_CLK_PER>;
fsl,clk-source = /bits/ 8 <1>;
};
--
2.34.1
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[linux-yocto][linux-yocto v6.6/standard/nxp-sdk-6.6/nxp-soc & v6.6/standard/preempt-rt/nxp-sdk-6.6/nxp-soc][PATCH 4/6] Revert "arm64: dts: imx8-ss-dma: fix can lpcg indices"
This reverts commit 19a8492473b0afe7340fcf6b764d1c22b8f21ae3.
The clock driver clk-imx8qxp-lpcg still uses LPCG bit-offset instead of
clock-indices for clock-controller dts properties, so it can not switch
to use lpcg indices.
Signed-off-by: Xulin Sun
---
arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 496501086584..0ae1a8123c63 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -389,8 +389,8 @@ flexcan1: can@5a8d {
reg = <0x5a8d 0x1>;
interrupts = ;
interrupt-parent = <>;
- clocks = <_lpcg IMX_LPCG_CLK_4>,
-<_lpcg IMX_LPCG_CLK_0>;
+ clocks = <_lpcg 1>,
+<_lpcg 0>;
clock-names = "ipg", "per";
assigned-clocks = < IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <4000>;
@@ -410,8 +410,8 @@ flexcan2: can@5a8e {
* CAN1 shares CAN0's clock and to enable CAN0's clock it
* has to be powered on.
*/
- clocks = <_lpcg IMX_LPCG_CLK_4>,
-<_lpcg IMX_LPCG_CLK_0>;
+ clocks = <_lpcg 1>,
+<_lpcg 0>;
clock-names = "ipg", "per";
assigned-clocks = < IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <4000>;
@@ -431,8 +431,8 @@ flexcan3: can@5a8f {
* CAN2 shares CAN0's clock and to enable CAN0's clock it
* has to be powered on.
*/
- clocks = <_lpcg IMX_LPCG_CLK_4>,
-<_lpcg IMX_LPCG_CLK_0>;
+ clocks = <_lpcg 1>,
+<_lpcg 0>;
clock-names = "ipg", "per";
assigned-clocks = < IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <4000>;
--
2.34.1
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[linux-yocto][linux-yocto v6.6/standard/nxp-sdk-6.6/nxp-soc & v6.6/standard/preempt-rt/nxp-sdk-6.6/nxp-soc][PATCH 1/6] Revert "arm64: dts: imx8-ss-conn: fix usb lpcg indices"
This reverts commit 16c2dd96e479440306eee96932400739a0930611.
The clock driver clk-imx8qxp-lpcg still uses LPCG bit-offset instead of
clock-indices for clock-controller dts properties, so it can not switch
to use lpcg indices.
Signed-off-by: Xulin Sun
---
arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
index 5c02bfbe9c25..26d03654372c 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
@@ -48,7 +48,7 @@ usbotg1: usb@5b0d {
interrupts = ;
fsl,usbphy = <>;
fsl,usbmisc = < 0>;
- clocks = <_lpcg IMX_LPCG_CLK_6>;
+ clocks = <_lpcg 0>;
ahb-burst-config = <0x0>;
tx-burst-size-dword = <0x10>;
rx-burst-size-dword = <0x10>;
@@ -65,7 +65,7 @@ usbmisc1: usbmisc@5b0d0200 {
usbphy1: usbphy@5b10 {
compatible = "fsl,imx7ulp-usbphy";
reg = <0x5b10 0x1000>;
- clocks = <_lpcg IMX_LPCG_CLK_7>;
+ clocks = <_lpcg 1>;
power-domains = < IMX_SC_R_USB_0_PHY>;
status = "disabled";
};
--
2.34.1
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[linux-yocto][linux-yocto v6.6/standard/nxp-sdk-6.6/nxp-soc & v6.6/standard/preempt-rt/nxp-sdk-6.6/nxp-soc][PATCH 3/6] Revert "arm64: dts: imx8-ss-dma: fix adc lpcg indices"
This reverts commit 7c4285471c03f9d873421598e2878a99c41def9f.
The clock driver clk-imx8qxp-lpcg still uses LPCG bit-offset instead of
clock-indices for clock-controller dts properties, so it can not switch
to use lpcg indices.
Signed-off-by: Xulin Sun
---
arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 4a0deb184657..496501086584 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -360,8 +360,8 @@ adc0: adc@5a88 {
reg = <0x5a88 0x1>;
interrupts = ;
interrupt-parent = <>;
- clocks = <_lpcg IMX_LPCG_CLK_0>,
-<_lpcg IMX_LPCG_CLK_4>;
+ clocks = <_lpcg 0>,
+<_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = < IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <2400>;
@@ -375,8 +375,8 @@ adc1: adc@5a89 {
reg = <0x5a89 0x1>;
interrupts = ;
interrupt-parent = <>;
- clocks = <_lpcg IMX_LPCG_CLK_0>,
-<_lpcg IMX_LPCG_CLK_4>;
+ clocks = <_lpcg 0>,
+<_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = < IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <2400>;
--
2.34.1
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[linux-yocto][linux-yocto v6.6][PATCH 0/6]: nxp-soc: Revert " * lpcg indices"
Hi Bruce, This patch series is to revert " * lpcg indices". Please help me merge these into the following two branches: v6.6/standard/nxp-sdk-6.6/nxp-soc v6.6/standard/preempt-rt/nxp-sdk-6.6/nxp-soc arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 4 ++-- arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 36 ++-- arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 16 arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi | 8 4 files changed, 32 insertions(+), 32 deletions(-) Thanks Xulin -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#14014): https://lists.yoctoproject.org/g/linux-yocto/message/14014 Mute This Topic: https://lists.yoctoproject.org/mt/106607413/21656 Group Owner: linux-yocto+ow...@lists.yoctoproject.org Unsubscribe: https://lists.yoctoproject.org/g/linux-yocto/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[linux-yocto][linux-yocto v6.6/standard/nxp-sdk-6.6/nxp-soc & v6.6/standard/preempt-rt/nxp-sdk-6.6/nxp-soc][PATCH 2/6] Revert "arm64: dts: imx8-ss-dma: fix spi lpcg indices"
This reverts commit a156f37b8e3ca7afbccb3f1b6507e150a20ac892.
The clock driver clk-imx8qxp-lpcg still uses LPCG bit-offset instead of
clock-indices for clock-controller dts properties, so it can not switch
to use lpcg indices.
Signed-off-by: Xulin Sun
---
arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 8eb12b75573e..4a0deb184657 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -62,8 +62,8 @@ lpspi0: spi@5a00 {
#size-cells = <0>;
interrupts = ;
interrupt-parent = <>;
- clocks = <_lpcg IMX_LPCG_CLK_0>,
-<_lpcg IMX_LPCG_CLK_4>;
+ clocks = <_lpcg 0>,
+<_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = < IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <6000>;
@@ -80,8 +80,8 @@ lpspi1: spi@5a01 {
#size-cells = <0>;
interrupts = ;
interrupt-parent = <>;
- clocks = <_lpcg IMX_LPCG_CLK_0>,
-<_lpcg IMX_LPCG_CLK_4>;
+ clocks = <_lpcg 0>,
+<_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = < IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <6000>;
@@ -98,8 +98,8 @@ lpspi2: spi@5a02 {
#size-cells = <0>;
interrupts = ;
interrupt-parent = <>;
- clocks = <_lpcg IMX_LPCG_CLK_0>,
-<_lpcg IMX_LPCG_CLK_4>;
+ clocks = <_lpcg 0>,
+<_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = < IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <6000>;
@@ -116,8 +116,8 @@ lpspi3: spi@5a03 {
#size-cells = <0>;
interrupts = ;
interrupt-parent = <>;
- clocks = <_lpcg IMX_LPCG_CLK_0>,
-<_lpcg IMX_LPCG_CLK_4>;
+ clocks = <_lpcg 0>,
+<_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = < IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <6000>;
--
2.34.1
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[linux-yocto] [yocto-kernel-cache][yocto-6.6][PATCH] bsp: add new bsp amd-zynqmp
From: Quanyang Wang Add support for amd-zynqmp bsp with standard and preempt-rt kernel. Signed-off-by: Quanyang Wang --- Hi Bruce, Would you please help merge this patch to the branch: yocto-6.6 Thanks, Quanyang --- bsp/amd-zynqmp/amd-zynqmp-preempt-rt.scc | 8 + bsp/amd-zynqmp/amd-zynqmp-standard.scc | 9 + bsp/amd-zynqmp/amd-zynqmp.cfg| 278 +++ bsp/amd-zynqmp/amd-zynqmp.scc| 11 + 4 files changed, 306 insertions(+) create mode 100644 bsp/amd-zynqmp/amd-zynqmp-preempt-rt.scc create mode 100644 bsp/amd-zynqmp/amd-zynqmp-standard.scc create mode 100644 bsp/amd-zynqmp/amd-zynqmp.cfg create mode 100644 bsp/amd-zynqmp/amd-zynqmp.scc diff --git a/bsp/amd-zynqmp/amd-zynqmp-preempt-rt.scc b/bsp/amd-zynqmp/amd-zynqmp-preempt-rt.scc new file mode 100644 index 00..69db8cefc6 --- /dev/null +++ b/bsp/amd-zynqmp/amd-zynqmp-preempt-rt.scc @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: MIT +define KMACHINE amd-zynqmp +define KTYPE preempt-rt +define KARCH arm64 + +include ktypes/preempt-rt/preempt-rt.scc + +include amd-zynqmp.scc diff --git a/bsp/amd-zynqmp/amd-zynqmp-standard.scc b/bsp/amd-zynqmp/amd-zynqmp-standard.scc new file mode 100644 index 00..e994876228 --- /dev/null +++ b/bsp/amd-zynqmp/amd-zynqmp-standard.scc @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: MIT +define KMACHINE amd-zynqmp +define KTYPE standard +define KARCH arm64 + +include ktypes/standard/standard.scc +branch amd-zynqmp + +include amd-zynqmp.scc diff --git a/bsp/amd-zynqmp/amd-zynqmp.cfg b/bsp/amd-zynqmp/amd-zynqmp.cfg new file mode 100644 index 00..0ac82831c1 --- /dev/null +++ b/bsp/amd-zynqmp/amd-zynqmp.cfg @@ -0,0 +1,278 @@ +# SPDX-License-Identifier: MIT +CONFIG_ARM64=y +CONFIG_ARCH_ZYNQMP=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_SMP=y + +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCIE_XILINX_NWL=y +CONFIG_PCIEPORTBUS=y + +# CAN Device Drivers +# +CONFIG_CAN=y +CONFIG_CAN_DEV=y +CONFIG_CAN_XILINXCAN=y + +CONFIG_MTD=y +CONFIG_MTD_OF_PARTS=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_SPI_NOR=y +CONFIG_JFFS2_FS_WRITEBUFFER=n +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=n + +CONFIG_BLK_DEV_SD=y +CONFIG_ATA=y +CONFIG_SATA_AHCI=y +CONFIG_AHCI_CEVA=y +CONFIG_NETDEVICES=y + +CONFIG_OF=y +CONFIG_OF_MDIO=y +CONFIG_ETHERNET=y +CONFIG_NET_VENDOR_CADENCE=y +CONFIG_MACB=y +CONFIG_XILINX_EMACLITE=y +CONFIG_XILINX_AXI_EMAC=y + +CONFIG_PHYLIB=y +CONFIG_XILINX_PHY=y +CONFIG_DP83867_PHY=y + +CONFIG_PHY_XILINX_ZYNQMP=y +CONFIG_PHY_XILINX_HDMIPHY=y +CONFIG_FIXED_PHY=y +CONFIG_DEVMEM=y + +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# +CONFIG_I2C=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_MUX_REG +CONFIG_I2C_CADENCE=y +CONFIG_I2C_XILINX=y +CONFIG_EEPROM_AT24=y + + +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_CADENCE=y +CONFIG_SPI_XILINX=y +CONFIG_SPI_ZYNQMP_GQSPI=y + +CONFIG_PINCTRL=y + +CONFIG_GPIOLIB=y +CONFIG_OF_GPIO=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_XILINX=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GPIO_ZYNQ=y +CONFIG_GPIO_ZYNQMP_MODEPIN=y + +CONFIG_POWER_RESET=y +CONFIG_SENSORS_INA2XX=y +CONFIG_WATCHDOG=y +CONFIG_CADENCE_WATCHDOG=y +CONFIG_XILINX_WATCHDOG=y + +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_ULPI=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_OTG=y +CONFIG_USB_OTG_FSM=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_XILINX=y +CONFIG_USB_ULPI_BUS=y + +CONFIG_INPUT=y +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_EVDEV=y + +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y + +CONFIG_RAS=y +CONFIG_EDAC=y +CONFIG_EDAC_SYNOPSYS=y + +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_DRV_ZYNQMP=y + +CONFIG_DMADEVICES=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +CONFIG_CMA=y +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=256 + +CONFIG_XILINX_ZYNQMP_DMA=y +CONFIG_XILINX_DMA=y + +CONFIG_UIO=y +CONFIG_UIO_XILINX_APM=y +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_SI570=y +CONFIG_COMMON_CLK_SI5324=y +CONFIG_COMMON_CLK_SI5341=y +CONFIG_COMMON_CLK_ZYNQMP=y +CONFIG_COMMON_CLK_XLNX_CLKWZRD=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y +CONFIG_OF_IOMMU=y +CONFIG_ARM_SMMU=y +CONFIG_ARM_SMMU_V3=y +# +CONFIG_RPMSG=m +CONFIG_REMOTEPROC=y +CONFIG_ZYNQMP_R5_REMOTEPROC=m + +CONFIG_STAGING=y +CONFIG_ZYNQMP_PM_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y + +CONFIG_IIO=y +CONFIG_SENSORS_IIO_HWMON=y +CONFIG_XILINX_XADC=y +CONFIG_XILINX_AMS=y +CONFIG_XILINX_FCLK=y + +CONFIG_FPGA=y +CONFIG_FPGA_MGR_ZYNQMP_FPGA=y +CONFIG_NVMEM_ZYNQMP=y +CONFIG_FPGA_REGION=y +CONFIG_FPGA_BRIDGE=y +CONFIG_OF_FPGA_REGION=y + +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y + +CONFIG_FB=y +CONFIG_FB_XILINX=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y
