Re: linux-next: build failure after merge of the final tree (powerpc tree related)
On Fri, Dec 03, 2010 at 04:59:58PM +1100, Benjamin Herrenschmidt wrote: On Fri, 2010-12-03 at 16:32 +1100, Stephen Rothwell wrote: After merging the tree, today's linux-next build (powerpc allmodconfig) failed like this: arch/powerpc/lib/hweight_64.S: Assembler messages: arch/powerpc/lib/hweight_64.S:52: Error: Unrecognized opcode: `popcntw' arch/powerpc/lib/hweight_64.S:77: Error: Unrecognized opcode: `popcntw' arch/powerpc/lib/hweight_64.S:106: Error: Unrecognized opcode: `popcntd' This is with: powerpc64-linux-gcc (GCC) 4.4.0 GNU assembler (GNU Binutils) 2.19.1 Caused by commit 64ff31287693c1f325cb9cb049569c1611438ef1 (powerpc: Add support for popcnt instructions). This toolchain is a bit ancient I suppose... Anton, do you reckon we SLES 11 SP1 still uses gcc 4.3. 4.4.0 is not ancient by any means. Neither is binutils 2.19.1. should use .long based macros for these for the time being or just require a newer binutils ? .long macros sound like the proper solution. josh ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 1/7] powerpc/85xx: re-enable timebase sync disabled by KEXEC patch
The timebase sync is not only necessary when using KEXEC. It should also
be used by normal boot up and cpu hotplug. Remove the ifdef added by
the KEXEC patch. Fix a problem that cpu hotplugging freezes the whole system.
Signed-off-by: Jin Qing b24...@freescale.com
Singed-off-by: Li Yang le...@freescale.com
---
arch/powerpc/platforms/85xx/smp.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/smp.c
b/arch/powerpc/platforms/85xx/smp.c
index 5c91a99..1e8aec8 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -2,7 +2,7 @@
* Author: Andy Fleming aflem...@freescale.com
*Kumar Gala ga...@kernel.crashing.org
*
- * Copyright 2006-2008 Freescale Semiconductor Inc.
+ * Copyright 2006-2010 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -115,10 +115,8 @@ smp_85xx_setup_cpu(int cpu_nr)
struct smp_ops_t smp_85xx_ops = {
.kick_cpu = smp_85xx_kick_cpu,
-#ifdef CONFIG_KEXEC
.give_timebase = smp_generic_give_timebase,
.take_timebase = smp_generic_take_timebase,
-#endif
};
#ifdef CONFIG_KEXEC
--
1.6.6-rc1.GIT
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[PATCH 2/7] powerpc/85xx: add HOTPLUG_CPU support
Add support to disable and re-enable individual cores at runtime on MPC85xx/QorIQ SMP machines. This makes suspend/resume possible for SMP systems, as the power management code on SMP always disable non-boot cpus on suspend. MPC85xx machines use ePAPR spin-table in boot page for CPU kick-off. This patch brings the bootpage and spin-table from bootloader into kernel because the bootpage in bootloader might have been lost at runtime. Also add support to boot from physical address larger than 32-bit. Signed-off-by: Yutaka Ando y.a...@freescale.com Signed-off-by: Li Yang le...@freescale.com --- arch/powerpc/Kconfig |2 +- arch/powerpc/kernel/Makefile |2 +- arch/powerpc/kernel/head_fsl_booke.S | 32 + arch/powerpc/kernel/smp.c |4 +- arch/powerpc/platforms/85xx/Makefile |4 +- arch/powerpc/platforms/85xx/bootpage.S | 206 + arch/powerpc/platforms/85xx/smp.c | 222 ++-- 7 files changed, 428 insertions(+), 44 deletions(-) create mode 100644 arch/powerpc/platforms/85xx/bootpage.S diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index e625e9e..b1982dd 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -320,7 +320,7 @@ config SWIOTLB config HOTPLUG_CPU bool Support for enabling/disabling CPUs - depends on SMP HOTPLUG EXPERIMENTAL (PPC_PSERIES || PPC_PMAC) + depends on SMP HOTPLUG EXPERIMENTAL (PPC_PSERIES || PPC_PMAC || E500) ---help--- Say Y here to be able to disable and re-enable individual CPUs at runtime on SMP machines. diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 36c30f3..bb20496 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile @@ -56,7 +56,7 @@ obj-$(CONFIG_IBMEBUS) += ibmebus.o obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o obj-$(CONFIG_CRASH_DUMP) += crash_dump.o ifeq ($(CONFIG_PPC32),y) -obj-$(CONFIG_E500) += idle_e500.o +obj-$(CONFIG_E500) += idle_e500.o l2cr_85xx.o endif obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o obj-$(CONFIG_TAU) += tau_6xx.o diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 529b817..61d9c46 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -23,6 +23,7 @@ * PowerPC 44x support, Matt Porter mpor...@kernel.crashing.org *Copyright 2004 Freescale Semiconductor, Inc * PowerPC e500 modifications, Kumar Gala ga...@kernel.crashing.org + *Copyright 2008, 2010 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -254,6 +255,37 @@ _ENTRY(__early_start) lwz r11, 0(r12);/* Get Linux PTE */ #endif +_GLOBAL(flush_disable_L1) +/* + * Flush L1 d-cache, invalidate and disable d-cache, + * invalidate and disable i-cache + */ + mflrr10 + bl flush_dcache_L1 /* Flush L1 d-cache */ + mtlrr10 + + mfspr r4, SPRN_L1CSR0 /* Invalidate and disable d-cache */ + li r5, 2 + rlwimi r4, r5, 0, 3 + + msync + isync + mtspr SPRN_L1CSR0, r4 + isync + +1: mfspr r4, SPRN_L1CSR0 /* Wait for the invalidate to finish */ + andi. r4, r4, 2 + bne 1b + + mfspr r4, SPRN_L1CSR1 /* Invalidate and disable i-cache */ + li r5, 2 + rlwimi r4, r5, 0, 3 + + mtspr SPRN_L1CSR1, r4 + isync + + blr + /* * Interrupt vector entry code * diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 68034bb..321cf2e 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -317,6 +317,8 @@ int generic_cpu_disable(void) set_cpu_online(cpu, false); #ifdef CONFIG_PPC64 vdso_data-processorCount--; +#endif +#if defined(CONFIG_PPC64) || defined(CONFIG_E500) fixup_irqs(cpu_online_mask); #endif return 0; @@ -336,7 +338,7 @@ int generic_cpu_enable(unsigned int cpu) while (!cpu_online(cpu)) cpu_relax(); -#ifdef CONFIG_PPC64 +#if defined(CONFIG_PPC64) || defined(CONFIG_E500) fixup_irqs(cpu_online_mask); /* counter the irq disable in fixup_irqs */ local_irq_enable(); diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index dd70db7..6bbcf22 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile @@ -1,7 +1,9 @@ # # Makefile for the PowerPC 85xx linux kernel. # -obj-$(CONFIG_SMP) += smp.o +obj-$(CONFIG_SMP) += smp.o +obj-$(CONFIG_HOTPLUG_CPU) += bootpage.o +obj-$(CONFIG_SUSPEND) += suspend-asm.o obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o obj-$(CONFIG_MPC8560_ADS) +=
[PATCH 7/7] P2020ds: add event button handler
This can be used as a wakeup source for power management.
Signed-off-by: Li Yang le...@freescale.com
---
arch/powerpc/boot/dts/p2020ds.dts|9 -
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 26 +-
2 files changed, 33 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/p2020ds.dts
b/arch/powerpc/boot/dts/p2020ds.dts
index 1101914..f4c6520 100644
--- a/arch/powerpc/boot/dts/p2020ds.dts
+++ b/arch/powerpc/boot/dts/p2020ds.dts
@@ -1,7 +1,7 @@
/*
* P2020 DS Device Tree Source
*
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2010 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -155,6 +155,13 @@
compatible = fsl,elbc-fcm-nand;
reg = 0x6 0x0 0x4;
};
+
+ ngpi...@3,0 {
+ compatible = fsl,p2020ds-fpga;
+ reg = 0x3 0 0x30;
+ interrupt-parent = mpic;
+ interrupts = 0 0;
+ };
};
s...@ffe0 {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 8190bc2..a8807fe 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -4,7 +4,7 @@
* Author Xianghua Xiao (x.x...@freescale.com)
* Roy Zang tie-fei.z...@freescale.com
* - Add PCI/PCI Exprees support
- * Copyright 2007 Freescale Semiconductor Inc.
+ * Copyright 2007-2010 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -200,6 +200,30 @@ static void __init mpc85xx_ds_setup_arch(void)
printk(MPC85xx DS board from Freescale Semiconductor\n);
}
+static irqreturn_t event_isr(int irq, void *dev_id)
+{
+
+ printk(KERN_INFO MPC85xxDS: Event button been pushed.\n);
+ return IRQ_HANDLED;
+}
+
+static int __init p2020ds_ngpixis_init(void)
+{
+ int event_irq, ret;
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, fsl,p2020ds-fpga);
+ if (np) {
+ event_irq = irq_of_parse_and_map(np, 0);
+ ret = request_irq(event_irq, event_isr, 0, event, NULL);
+ if (ret)
+ printk(KERN_ERR Can't request board event int\n);
+ of_node_put(np);
+ }
+ return 0;
+}
+machine_device_initcall(p2020_ds, p2020ds_ngpixis_init);
+
/*
* Called very early, device-tree isn't unflattened
*/
--
1.6.6-rc1.GIT
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[PATCH 3/7] powerpc/85xx: add the deep sleep support
Some Freescale chips like MPC8536 and P1022 has deep sleep PM mode in addtion to the sleep PM mode. In sleep power management mode, the clock of e500 core is turned off, the clocks of most IP blocks are shut off, only the modules clocks which allows to wake up the processor are still running. While in deep sleep PM mode, additionally, the power supply is removed for e500 core and most devices. Only the blocks needed to detect wakeup and sequence the chip out of deep sleep are ON. Also add APIs for setting wakeup source and lossless Ethernet in low power modes. The deep sleep mode is equal to the Suspend-to-RAM state of Linux Power Management. echo mem /sys/power/state to enter deep sleep mode. Signed-off-by: Dave Liu dave...@freescale.com Signed-off-by: Li Yang le...@freescale.com Signed-off-by: Jin Qing b24...@freescale.com Cc: Scott Wood scottw...@freescale.com --- arch/powerpc/kernel/l2cr_85xx.S | 53 +++ arch/powerpc/platforms/85xx/suspend-asm.S | 625 + arch/powerpc/sysdev/fsl_pmc.c | 153 ++- arch/powerpc/sysdev/fsl_soc.h | 11 + 4 files changed, 823 insertions(+), 19 deletions(-) create mode 100644 arch/powerpc/kernel/l2cr_85xx.S create mode 100644 arch/powerpc/platforms/85xx/suspend-asm.S diff --git a/arch/powerpc/kernel/l2cr_85xx.S b/arch/powerpc/kernel/l2cr_85xx.S new file mode 100644 index 000..5283d31 --- /dev/null +++ b/arch/powerpc/kernel/l2cr_85xx.S @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All rights reserved. + * Scott Wood scottw...@freescale.com + * Dave Liu dave...@freescale.com + * implement the L2 cache operations of e500 based L2 controller + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include asm/reg.h +#include asm/cputable.h +#include asm/ppc_asm.h +#include asm/asm-offsets.h + + .section .text + + /* r3 = virtual address of L2 controller, WIMG = 01xx */ +_GLOBAL(flush_disable_L2) + /* It's a write-through cache, so only invalidation is needed. */ + mbar + isync + lwz r4, 0(r3) + li r5, 1 + rlwimi r4, r5, 30, 0xc000 + stw r4, 0(r3) + + /* Wait for the invalidate to finish */ +1: lwz r4, 0(r3) + andis. r4, r4, 0x4000 + bne 1b + mbar + + blr + + /* r3 = virtual address of L2 controller, WIMG = 01xx */ +_GLOBAL(invalidate_enable_L2) + mbar + isync + lwz r4, 0(r3) + li r5, 3 + rlwimi r4, r5, 30, 0xc000 + stw r4, 0(r3) + + /* Wait for the invalidate to finish */ +1: lwz r4, 0(r3) + andis. r4, r4, 0x4000 + bne 1b + mbar + + blr diff --git a/arch/powerpc/platforms/85xx/suspend-asm.S b/arch/powerpc/platforms/85xx/suspend-asm.S new file mode 100644 index 000..99de481 --- /dev/null +++ b/arch/powerpc/platforms/85xx/suspend-asm.S @@ -0,0 +1,625 @@ +/* + * Enter and leave deep sleep/sleep state on MPC85xx + * + * Author: Scott Wood scottw...@freescale.com + * + * Copyright (C) 2006-2010 Freescale Semiconductor, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include asm/page.h +#include asm/ppc_asm.h +#include asm/reg.h +#include asm/asm-offsets.h + +#define SS_TB 0x00 +#define SS_HID 0x08 /* 2 HIDs */ +#define SS_IAC 0x10 /* 2 IACs */ +#define SS_DAC 0x18 /* 2 DACs */ +#define SS_DBCR0x20 /* 3 DBCRs */ +#define SS_PID 0x2c /* 3 PIDs */ +#define SS_SPRG0x38 /* 8 SPRGs */ +#define SS_IVOR0x58 /* 20 interrupt vectors */ +#define SS_TCR 0xa8 +#define SS_BUCSR 0xac +#define SS_L1CSR 0xb0 /* 2 L1CSRs */ +#define SS_MSR 0xb8 +#define SS_USPRG 0xbc +#define SS_GPREG 0xc0 /* r12-r31 */ +#define SS_LR 0x110 +#define SS_CR 0x114 +#define SS_SP 0x118 +#define SS_CURRENT 0x11c +#define SS_IVPR0x120 +#define SS_BPTR0x124 + +#define STATE_SAVE_SIZE 0x128 + + .section .data + .align 5 +mpc85xx_sleep_save_area: + .space STATE_SAVE_SIZE +ccsrbase: + .long 0 +powmgtreq: + .long 0 + + .section .text + .align 12 + + /* +* r3 = physical address of CCSR +* r4 = JOG or deep sleep request +* JOG-0x0020, deep sleep-0x0010 +*/ +_GLOBAL(mpc85xx_enter_deep_sleep) + lis r5, ccsrb...@ha + stw r3, ccsrb...@l(r5) + + lis r5, powmgt...@ha + stw r4,
[PATCH 5/7] powerpc: add the mpic timer support
There are global timers in the MPIC interrupt controller. The patch
adds support to the timers.
The timer can generate interrupt which can be used as a wakeup event.
Signed-off-by: Dave Liu dave...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
arch/powerpc/include/asm/mpic.h |1 +
arch/powerpc/sysdev/Makefile |2 +-
arch/powerpc/sysdev/mpic.c | 88 +-
arch/powerpc/sysdev/mpic_timer.c | 258 ++
4 files changed, 346 insertions(+), 3 deletions(-)
create mode 100644 arch/powerpc/sysdev/mpic_timer.c
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index e000cce..4272111 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -263,6 +263,7 @@ struct mpic
#ifdef CONFIG_SMP
struct irq_chip hc_ipi;
#endif
+ struct irq_chip hc_tm;
const char *name;
/* Flags */
unsigned intflags;
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 0bef9da..d95a417 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -3,7 +3,7 @@ subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
ccflags-$(CONFIG_PPC64):= -mno-minimal-toc
mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o
-obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y)
+obj-$(CONFIG_MPIC) += mpic.o mpic_timer.o $(mpic-msi-obj-y)
fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o
obj-$(CONFIG_PPC_MSI_BITMAP) += msi_bitmap.o
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 7c13426..107549d 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -6,6 +6,7 @@
* with various broken implementations of this HW.
*
* Copyright (C) 2004 Benjamin Herrenschmidt, IBM Corp.
+ * Copyright (C) 2006, 2008-2010 Freescale Semiconductor Inc.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
@@ -36,6 +37,7 @@
#include asm/machdep.h
#include asm/mpic.h
#include asm/smp.h
+#include asm/prom.h
#include mpic.h
@@ -208,6 +210,22 @@ static inline void _mpic_ipi_write(struct mpic *mpic,
unsigned int ipi, u32 valu
_mpic_write(mpic-reg_type, mpic-gregs, offset, value);
}
+static inline u32 _mpic_tm_read(struct mpic *mpic, unsigned int tm)
+{
+ unsigned int offset = MPIC_INFO(TIMER_VECTOR_PRI) +
+ (tm * MPIC_INFO(TIMER_STRIDE));
+
+ return _mpic_read(mpic-reg_type, mpic-tmregs, offset);
+}
+
+static inline void _mpic_tm_write(struct mpic *mpic, unsigned int tm, u32
value)
+{
+ unsigned int offset = MPIC_INFO(TIMER_VECTOR_PRI) +
+ (tm * MPIC_INFO(TIMER_STRIDE));
+
+ _mpic_write(mpic-reg_type, mpic-tmregs, offset, value);
+}
+
static inline u32 _mpic_cpu_read(struct mpic *mpic, unsigned int reg)
{
unsigned int cpu = 0;
@@ -263,6 +281,8 @@ static inline void _mpic_irq_write(struct mpic *mpic,
unsigned int src_no,
#define mpic_write(b,r,v) _mpic_write(mpic-reg_type,(b),(r),(v))
#define mpic_ipi_read(i) _mpic_ipi_read(mpic,(i))
#define mpic_ipi_write(i,v)_mpic_ipi_write(mpic,(i),(v))
+#define mpic_tm_read(i)_mpic_tm_read(mpic,(i))
+#define mpic_tm_write(i,v) _mpic_tm_write(mpic,(i),(v))
#define mpic_cpu_read(i) _mpic_cpu_read(mpic,(i))
#define mpic_cpu_write(i,v)_mpic_cpu_write(mpic,(i),(v))
#define mpic_irq_read(s,r) _mpic_irq_read(mpic,(s),(r))
@@ -622,6 +642,13 @@ static unsigned int mpic_is_ipi(struct mpic *mpic,
unsigned int irq)
return (src = mpic-ipi_vecs[0] src = mpic-ipi_vecs[3]);
}
+/* Determine if the linux irq is an timer IPI */
+static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int irq)
+{
+ unsigned int src = mpic_irq_to_hw(irq);
+
+ return (src = mpic-timer_vecs[0] src = mpic-timer_vecs[3]);
+}
/* Convert a cpu mask from logical to physical cpu numbers. */
static inline u32 mpic_physmask(u32 cpumask)
@@ -642,6 +669,12 @@ static inline struct mpic * mpic_from_ipi(unsigned int ipi)
}
#endif
+/* Get the mpic structure from the tm number */
+static inline struct mpic * mpic_from_tm(unsigned int tm)
+{
+ return irq_to_desc(tm)-chip_data;
+}
+
/* Get the mpic structure from the irq number */
static inline struct mpic * mpic_from_irq(unsigned int irq)
{
@@ -800,6 +833,32 @@ static void mpic_end_ipi(unsigned int irq)
#endif /* CONFIG_SMP */
+static void mpic_unmask_tm(unsigned int irq)
+{
+ struct mpic *mpic = mpic_from_tm(irq);
+ unsigned int src = mpic_irq_to_hw(irq) - mpic-timer_vecs[0];
+
+ DBG(%s: enable_tm: %d (tm %d)\n, mpic-name, irq, src);
+ mpic_tm_write(src, mpic_tm_read(src) ~MPIC_VECPRI_MASK);
+ mpic_tm_read(src);
+}
+
+static void
[PATCH 6/7] fsl_pmc: update device bindings
Signed-off-by: Li Yang le...@freescale.com
---
Documentation/powerpc/dts-bindings/fsl/pmc.txt | 63 +--
1 files changed, 36 insertions(+), 27 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/pmc.txt
b/Documentation/powerpc/dts-bindings/fsl/pmc.txt
index 07256b7..d84b4f8 100644
--- a/Documentation/powerpc/dts-bindings/fsl/pmc.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/pmc.txt
@@ -9,22 +9,27 @@ Properties:
fsl,mpc8548-pmc should be listed for any chip whose PMC is
compatible. fsl,mpc8536-pmc should also be listed for any chip
- whose PMC is compatible, and implies deep-sleep capability.
+ whose PMC is compatible, and implies deep-sleep capability and
+ wake on user defined packet(wakeup on ARP).
+
+ fsl,p1022-pmc should be listed for any chip whose PMC is
+ compatible, and implies lossless Ethernet capability during sleep.
fsl,mpc8641d-pmc should be listed for any chip whose PMC is
compatible; all statements below that apply to fsl,mpc8548-pmc also
apply to fsl,mpc8641d-pmc.
Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these
- bit assignments are indicated via the sleep specifier in each device's
- sleep property.
+ bit assignments are indicated via the clock nodes. Device which has a
+ controllable clock source should have a clk-handle property pointing
+ to the clock node.
- reg: For devices compatible with fsl,mpc8349-pmc, the first resource
is the PMC block, and the second resource is the Clock Configuration
block.
- For devices compatible with fsl,mpc8548-pmc, the first resource
- is a 32-byte block beginning with DEVDISR.
+ For devices compatible with fsl,mpc8548-pmc, the second resource
+ is a 32-byte block beginning with DEVDISR if supported.
- interrupts: For fsl,mpc8349-pmc-compatible devices, the first
resource is the PMC block interrupt.
@@ -33,31 +38,35 @@ Properties:
this is a phandle to an fsl,gtm node on which timer 4 can be used as
a wakeup source from deep sleep.
-Sleep specifiers:
+Clock nodes:
+The clock nodes are to describe the masks in PM controller registers for each
+soc clock.
+- fsl,pmcdr-mask: For fsl,mpc8548-pmc-compatible devices, the mask will be
+ ORed into PMCDR before suspend if the device using this clock is the wake-up
+ source and need to be running during low power mode; clear the mask if
+ otherwise.
- fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit
- that is set in the cell, the corresponding bit in SCCR will be saved
- and cleared on suspend, and restored on resume. This sleep controller
- supports disabling and resuming devices at any time.
+- fsl,sccr-mask: For fsl,mpc8349-pmc-compatible devices, the corresponding
+ bit specified by the mask in SCCR will be saved and cleared on suspend, and
+ restored on resume.
- fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of
- which will be ORed into PMCDR upon suspend, and cleared from PMCDR
- upon resume. The first two cells are as described for fsl,mpc8578-pmc.
- This sleep controller only supports disabling devices during system
- sleep, or permanently.
-
- fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the
- first of which will be ORed into DEVDISR (and the second into
- DEVDISR2, if present -- this cell should be zero or absent if the
- hardware does not have DEVDISR2) upon a request for permanent device
- disabling. This sleep controller does not support configuring devices
- to disable during system sleep (unless supported by another compatible
- match), or dynamically.
+- fsl,devdisr-mask: Contain one or two cells, depending on the availability of
+ DEVDISR2 register. For compatible devices, the mask will be ORed into
DEVDISR
+ or DEVDISR2 when the clock should be permenently disabled.
Example:
- po...@b00 {
- compatible = fsl,mpc8313-pmc, fsl,mpc8349-pmc;
- reg = 0xb00 0x100 0xa00 0x100;
- interrupts = 80 8;
+ po...@e0070 {
+ compatible = fsl,mpc8536-pmc, fsl,mpc8548-pmc;
+ reg = 0xe0070 0x20;
+
+ etsec1_clk: soc-...@24 {
+ fsl,pmcdr-mask = 0x0080;
+ };
+ etsec2_clk: soc-...@25 {
+ fsl,pmcdr-mask = 0x0040;
+ };
+ etsec3_clk: soc-...@26 {
+ fsl,pmcdr-mask = 0x0020;
+ };
};
--
1.6.6-rc1.GIT
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[PATCH 4/7] powerpc/85xx: add support to JOG feature using cpufreq interface
Some 85xx silicons like MPC8536 and P1022 has the JOG PM feature.
The patch adds the support to change CPU frequency using the standard
cpufreq interface.
Signed-off-by: Dave Liu dave...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85xx/cpufreq.c | 236 +
arch/powerpc/platforms/Kconfig|8 +
3 files changed, 245 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/85xx/cpufreq.c
diff --git a/arch/powerpc/platforms/85xx/Makefile
b/arch/powerpc/platforms/85xx/Makefile
index 6bbcf22..11cedde 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -4,6 +4,7 @@
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_HOTPLUG_CPU) += bootpage.o
obj-$(CONFIG_SUSPEND) += suspend-asm.o
+obj-$(CONFIG_MPC85xx_CPUFREQ) += cpufreq.o
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
diff --git a/arch/powerpc/platforms/85xx/cpufreq.c
b/arch/powerpc/platforms/85xx/cpufreq.c
new file mode 100644
index 000..f729c3d
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/cpufreq.c
@@ -0,0 +1,236 @@
+/*
+ * Copyright (C) 2008-2010 Freescale Semiconductor, Inc.
+ * Dave Liu dave...@freescale.com
+ *
+ * The cpufreq driver is for Freescale 85xx processor,
+ * based on arch/powerpc/platforms/cell/cbe_cpufreq.c
+ * (C) Copyright IBM Deutschland Entwicklung GmbH 2005-2007
+ * Christian Krafft kra...@de.ibm.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include linux/cpufreq.h
+#include linux/of_platform.h
+
+#include asm/prom.h
+#include asm/time.h
+#include asm/reg.h
+#include asm/io.h
+
+#include sysdev/fsl_soc.h
+
+static DEFINE_MUTEX(mpc85xx_switch_mutex);
+
+static void __iomem *guts;
+
+#define PORPLLSR 0x0
+#define PMJCR 0x7c
+#define POWMGTCSR 0x80
+
+static struct cpufreq_frequency_table mpc85xx_freqs[] = {
+ {2, 0},
+ {3, 0},
+ {4, 0},
+ {0, CPUFREQ_TABLE_END},
+};
+
+/*
+ * hardware specific functions
+ */
+static int get_pll(int cpu)
+{
+ int ret, shift;
+ u32 pll = in_be32(guts + PORPLLSR);
+ shift = (cpu == 1) ? 24 : 16;
+ ret = (pll shift) 0x3f;
+
+ return ret;
+}
+
+static void set_pll(unsigned int pll, int cpu)
+{
+ int shift;
+ u32 busfreq, corefreq, val;
+ u32 core_spd, mask, tmp;
+
+ tmp = in_be32(guts + PMJCR);
+ shift = (cpu == 1) ? 24 : 16;
+ busfreq = fsl_get_sys_freq();
+ val = (pll 0x3f) shift;
+
+ corefreq = ((busfreq * pll) 1);
+ /* must set the bit[18/19] if the requested core freq 533 MHz */
+ core_spd = (cpu == 1) ? 0x2000 : 0x1000;
+ if (corefreq 53300)
+ val |= core_spd;
+
+ mask = (cpu == 1) ? 0x3f002000 : 0x003f1000;
+ tmp = ~mask;
+ tmp |= val;
+ out_be32(guts + PMJCR, tmp);
+ val = in_be32(guts + PMJCR);
+ out_be32(guts + POWMGTCSR, 0x0060);
+ printk(PMJCR request %08x at CPU %d\n, tmp, cpu);
+}
+
+static void verify_pll(int cpu)
+{
+ int shift;
+ u32 busfreq, pll, corefreq;
+
+ shift = (cpu == 1) ? 24 : 16;
+ busfreq = fsl_get_sys_freq();
+ pll = (in_be32(guts + PORPLLSR) shift) 0x3f;
+
+ corefreq = (busfreq * pll) 1;
+ corefreq /= 100;
+ printk(PORPLLSR core freq %dMHz at CPU %d\n, corefreq, cpu);
+}
+
+/*
+ * cpufreq functions
+ */
+
+static int mpc85xx_cpufreq_cpu_init(struct cpufreq_policy *policy)
+{
+ u32 busfreq = fsl_get_sys_freq();
+ int i, cur_pll;
+
+ /* we need the freq unit with kHz */
+ busfreq /= 1000;
+
+ /* initialize frequency table */
+ for (i = 0; mpc85xx_freqs[i].frequency != CPUFREQ_TABLE_END; i++) {
+ mpc85xx_freqs[i].frequency = (busfreq * mpc85xx_freqs[i].index)
1;
+ printk(%d: %dkHz\n, i, mpc85xx_freqs[i].frequency);
+ }
+
+ /* the latency of a transition, the unit is ns */
+ policy-cpuinfo.transition_latency = 2000;
+
+ cur_pll = get_pll(policy-cpu);
+ pr_debug(current pll is at %d\n, cur_pll);
+
+ for (i = 0; mpc85xx_freqs[i].frequency != CPUFREQ_TABLE_END; i++) {
+ if
Please pull 'next' branch of 4xx tree
Hi Ben Some 4xx power management patches from Victor. I would have liked to include the PCI-e and Canyonlands USB phy fix patches as well, but they still need rework. I might include those in a later pull request if they show up relatively soon. josh The following changes since commit 46f5221049bb46b0188aad6b6dfab5dbc778be22: powerpc: Remove second definition of STACK_FRAME_OVERHEAD (2010-11-29 15:48:23 +1100) are available in the git repository at: ssh://master.kernel.org/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx.git next Victor Gallardo (3): powerpc/4xx: Add suspend and idle support powerpc/4xx: Add Kilauea suspend and idle support powerpc/4xx: Add Canyonlands suspend and idle support Documentation/powerpc/dts-bindings/4xx/cpm.txt | 52 arch/powerpc/Kconfig | 13 +- arch/powerpc/boot/dts/canyonlands.dts | 31 +-- arch/powerpc/boot/dts/kilauea.dts |9 + arch/powerpc/configs/40x/kilauea_defconfig |5 + arch/powerpc/configs/44x/canyonlands_defconfig |3 + arch/powerpc/platforms/44x/Makefile|5 +- arch/powerpc/sysdev/Makefile |1 + arch/powerpc/sysdev/ppc4xx_cpm.c | 346 9 files changed, 439 insertions(+), 26 deletions(-) create mode 100644 Documentation/powerpc/dts-bindings/4xx/cpm.txt create mode 100644 arch/powerpc/sysdev/ppc4xx_cpm.c ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Getting the IRQ number (Was: Basic driver devel questions ?)
No. of_platform_drivers are more/less obsolete. Normal platform drivers
can now be associated with a device-tree node just fine.
OK.
If my dts definition is thus:
xps_acqui_data_0: xps-acqui-d...@c980 {
compatible = xlnx,xps-acqui-data-3.00.a;
interrupt-parent = xps_intc_0;
interrupts = 0 2 ;
reg = 0xc980 0x1 ;
xlnx,family = virtex4;
xlnx,include-dphase-timer = 0x1;
xlnx,mplb-awidth = 0x20;
xlnx,mplb-clk-period-ps = 0x2710;
xlnx,mplb-dwidth = 0x40;
xlnx,mplb-native-dwidth = 0x40;
xlnx,mplb-p2p = 0x0;
xlnx,mplb-smallest-slave = 0x20;
} ;
What are the names I need to pass to platform_driver_register and
platform_device_register_simple ? xps_acqui_data_0, xps-acqui-data or xps-
acqui-data-3.00.a ? None seem to call any init functions...
Why is there not a word about the functions platform_*_register in my various
driver books ? LDD 3rd ed (O'Reilly), Writing LDD (Cooperstein) or LKD
(Love)... Is it something specific to powerpc and the books are oriented x86 ?
What's a good source, besides grepping the kernel to no end ?
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Re: Getting the IRQ number (Was: Basic driver devel questions ?)
On 03/12/10 14:58, Guillaume Dargaud wrote: Why is there not a word about the functions platform_*_register in my various driver books ? LDD 3rd ed (O'Reilly), Writing LDD (Cooperstein) or LKD (Love)... Is it something specific to powerpc and the books are oriented x86 ? What's a good source, besides grepping the kernel to no end ? I have yet to find a Linux Device Driver book that isn't heavily skewed towards x86. Some of this stuff is either specific to powerpc or relevant a subset of non-x86 platforms. I think Google, the linuxppc-dev mailing list, related IRC channel and lxr.linux.no have been the sources I've mostly used learning about Linux on powerpc. -- Martyn Welch (Principal Software Engineer) | Registered in England and GE Intelligent Platforms | Wales (3828642) at 100 T +44(0)127322748| Barbirolli Square, Manchester, E martyn.we...@ge.com| M2 3AB VAT:GB 927559189 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: UIO / of_genirq driver
Wolfram, On Thursday 28 January 2010 11:45:45 Wolfram Sang wrote: I guess I'd like to just open up a discussion, see if there's been any progress towards a general solution. I decided to wait for the outcome of the of_platform-removal-idea. Though, I have to admit that in the last weeks I haven't followed of-related things due to other commitments. Is there any update on this in the meantime? Do you know of any plans to re- work/-push this patchset? Just checking... Thanks, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: UIO / of_genirq driver
Is there any update on this in the meantime? Do you know of any plans to re- work/-push this patchset? Just checking... I had another look recently; I wouldn't like to just copy/paste the new_id-mechanism from PCI because the code would then exist three times in the kernel (PCMCIA being the third user I am aware of). I wondered if it was feasible to make the new-id-code generic and make those subsystems just use it. I haven't started working on it, though. Kind regards, Wolfram -- Pengutronix e.K. | Wolfram Sang| Industrial Linux Solutions | http://www.pengutronix.de/ | signature.asc Description: Digital signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 1/7] powerpc/85xx: re-enable timebase sync disabled by KEXEC patch
On Dec 3, 2010, at 6:34 AM, Li Yang wrote:
The timebase sync is not only necessary when using KEXEC. It should also
be used by normal boot up and cpu hotplug. Remove the ifdef added by
the KEXEC patch. Fix a problem that cpu hotplugging freezes the whole system.
Signed-off-by: Jin Qing b24...@freescale.com
Singed-off-by: Li Yang le...@freescale.com
---
arch/powerpc/platforms/85xx/smp.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
But we have problems with KEXEC w/o this? What is the issue with hotplugging
and the generic timebase code? When do we freeze?
diff --git a/arch/powerpc/platforms/85xx/smp.c
b/arch/powerpc/platforms/85xx/smp.c
index 5c91a99..1e8aec8 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -2,7 +2,7 @@
* Author: Andy Fleming aflem...@freescale.com
* Kumar Gala ga...@kernel.crashing.org
*
- * Copyright 2006-2008 Freescale Semiconductor Inc.
+ * Copyright 2006-2010 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -115,10 +115,8 @@ smp_85xx_setup_cpu(int cpu_nr)
struct smp_ops_t smp_85xx_ops = {
.kick_cpu = smp_85xx_kick_cpu,
-#ifdef CONFIG_KEXEC
.give_timebase = smp_generic_give_timebase,
.take_timebase = smp_generic_take_timebase,
-#endif
};
#ifdef CONFIG_KEXEC
--
1.6.6-rc1.GIT
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[PATCH] watchdog: add CONFIG_WATCHDOG_NOWAYOUT support to PowerPC Book-E watchdog driver
Normally, the watchdog is disabled when dev/watchdog is closed, but if
CONFIG_WATCHDOG_NOWAYOUT is defined, then it means that the watchdog should
remain enabled. So we should disable it only if CONFIG_WATCHDOG_NOWAYOUT is
not defined.
Also ensure that /dev/watchdog is only opened by one process at a time. That
way, a second process can't accidentally disable the watchdog while the first
process has it open. There shouldn't be any need for more than one process to
open /dev/watchdog anyway.
Signed-off-by: Timur Tabi ti...@freescale.com
---
Kumar, please pick up this patch for 2.6.37.
drivers/watchdog/booke_wdt.c | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
index d11ffb0..636e013 100644
--- a/drivers/watchdog/booke_wdt.c
+++ b/drivers/watchdog/booke_wdt.c
@@ -193,8 +193,15 @@ static long booke_wdt_ioctl(struct file *file,
return 0;
}
+/* wdt_is_active stores wether or not the /dev/watchdog device is opened */
+static unsigned long wdt_is_active;
+
static int booke_wdt_open(struct inode *inode, struct file *file)
{
+ /* /dev/watchdog can only be opened once */
+ if (test_and_set_bit(0, wdt_is_active))
+ return -EBUSY;
+
spin_lock(booke_wdt_lock);
if (booke_wdt_enabled == 0) {
booke_wdt_enabled = 1;
@@ -210,8 +217,17 @@ static int booke_wdt_open(struct inode *inode, struct file
*file)
static int booke_wdt_release(struct inode *inode, struct file *file)
{
+#ifndef CONFIG_WATCHDOG_NOWAYOUT
+ /* Normally, the watchdog is disabled when /dev/watchdog is closed, but
+* if CONFIG_WATCHDOG_NOWAYOUT is defined, then it means that the
+* watchdog should remain enabled. So we disable it only if
+* CONFIG_WATCHDOG_NOWAYOUT is not defined.
+*/
on_each_cpu(__booke_wdt_disable, NULL, 0);
booke_wdt_enabled = 0;
+#endif
+
+ clear_bit(0, wdt_is_active);
return 0;
}
--
1.7.2.3
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[PATCH] powerpc/85xx: fix compatible properties of the P1022DS DMA nodes used for audio
In order to prevent the fsl_dma driver from claiming the DMA channels that the
P1022DS audio driver needs, the compatible properties for those nodes must say
fsl,ssi-dma-channel instead of fsl,eloplus-dma-channel.
Signed-off-by: Timur Tabi ti...@freescale.com
---
Kumar, please pick up this patch for 2.6.37.
arch/powerpc/boot/dts/p1022ds.dts |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1022ds.dts
b/arch/powerpc/boot/dts/p1022ds.dts
index 2bbecbb..69422eb 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -291,13 +291,13 @@
ranges = 0x0 0xc100 0x200;
cell-index = 1;
dma00: dma-chan...@0 {
- compatible = fsl,eloplus-dma-channel;
+ compatible = fsl,ssi-dma-channel;
reg = 0x0 0x80;
cell-index = 0;
interrupts = 76 2;
};
dma01: dma-chan...@80 {
- compatible = fsl,eloplus-dma-channel;
+ compatible = fsl,ssi-dma-channel;
reg = 0x80 0x80;
cell-index = 1;
interrupts = 77 2;
--
1.7.2.3
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Re: [PATCH] watchdog: add CONFIG_WATCHDOG_NOWAYOUT support to PowerPC Book-E watchdog driver
On Fri, Dec 03, 2010 at 10:51:43AM -0600, Timur Tabi wrote:
Normally, the watchdog is disabled when dev/watchdog is closed, but if
CONFIG_WATCHDOG_NOWAYOUT is defined, then it means that the watchdog should
remain enabled. So we should disable it only if CONFIG_WATCHDOG_NOWAYOUT is
not defined.
Also ensure that /dev/watchdog is only opened by one process at a time. That
way, a second process can't accidentally disable the watchdog while the first
process has it open. There shouldn't be any need for more than one process to
open /dev/watchdog anyway.
Signed-off-by: Timur Tabi ti...@freescale.com
---
Kumar, please pick up this patch for 2.6.37.
drivers/watchdog/booke_wdt.c | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
index d11ffb0..636e013 100644
--- a/drivers/watchdog/booke_wdt.c
+++ b/drivers/watchdog/booke_wdt.c
@@ -193,8 +193,15 @@ static long booke_wdt_ioctl(struct file *file,
return 0;
}
+/* wdt_is_active stores wether or not the /dev/watchdog device is opened */
+static unsigned long wdt_is_active;
+
static int booke_wdt_open(struct inode *inode, struct file *file)
{
+ /* /dev/watchdog can only be opened once */
+ if (test_and_set_bit(0, wdt_is_active))
+ return -EBUSY;
+
spin_lock(booke_wdt_lock);
if (booke_wdt_enabled == 0) {
booke_wdt_enabled = 1;
I'm confused why you can't use booke_wdt_enabled for the purposes of the
device having been opened. It seems the use of the wdt_is_active
basically duplicates this functionalit (and oddly with the bit
manipulation instead of just atomic_inc/dec).
@@ -210,8 +217,17 @@ static int booke_wdt_open(struct inode *inode, struct
file *file)
static int booke_wdt_release(struct inode *inode, struct file *file)
{
+#ifndef CONFIG_WATCHDOG_NOWAYOUT
+ /* Normally, the watchdog is disabled when /dev/watchdog is closed, but
+ * if CONFIG_WATCHDOG_NOWAYOUT is defined, then it means that the
+ * watchdog should remain enabled. So we disable it only if
+ * CONFIG_WATCHDOG_NOWAYOUT is not defined.
+ */
on_each_cpu(__booke_wdt_disable, NULL, 0);
booke_wdt_enabled = 0;
+#endif
+
+ clear_bit(0, wdt_is_active);
If you were to keep this variable instead of just using
booke_wdt_enabled, wouldn't it be more correct to have the clear_bit
only done inside the #ifndef? The timer is very much still active if
NOWAYOUT is set...
josh
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Re: [PATCH 1/7] powerpc/85xx: re-enable timebase sync disabled by KEXEC patch
On Sat, Dec 4, 2010 at 12:40 AM, Kumar Gala ga...@kernel.crashing.org wrote:
On Dec 3, 2010, at 6:34 AM, Li Yang wrote:
The timebase sync is not only necessary when using KEXEC. It should also
be used by normal boot up and cpu hotplug. Remove the ifdef added by
the KEXEC patch. Fix a problem that cpu hotplugging freezes the whole
system.
Signed-off-by: Jin Qing b24...@freescale.com
Singed-off-by: Li Yang le...@freescale.com
---
arch/powerpc/platforms/85xx/smp.c | 4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
But we have problems with KEXEC w/o this? What is the issue with hotplugging
and the generic timebase code? When do we freeze?
Actually the KEXEC patch disables timebase sync when KEXEC is not
defined. If the timebase sync is disabled, the timebase on non-boot
cpu will become non-consistent. And thus ruins the scheduler when
hot-plugged.
diff --git a/arch/powerpc/platforms/85xx/smp.c
b/arch/powerpc/platforms/85xx/smp.c
index 5c91a99..1e8aec8 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -2,7 +2,7 @@
* Author: Andy Fleming aflem...@freescale.com
* Kumar Gala ga...@kernel.crashing.org
*
- * Copyright 2006-2008 Freescale Semiconductor Inc.
+ * Copyright 2006-2010 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -115,10 +115,8 @@ smp_85xx_setup_cpu(int cpu_nr)
struct smp_ops_t smp_85xx_ops = {
.kick_cpu = smp_85xx_kick_cpu,
-#ifdef CONFIG_KEXEC
.give_timebase = smp_generic_give_timebase,
.take_timebase = smp_generic_take_timebase,
-#endif
};
#ifdef CONFIG_KEXEC
--
1.6.6-rc1.GIT
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--
- Leo
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Re: [PATCH] watchdog: add CONFIG_WATCHDOG_NOWAYOUT support to PowerPC Book-E watchdog driver
Josh Boyer wrote: I'm confused why you can't use booke_wdt_enabled for the purposes of the device having been opened. It seems the use of the wdt_is_active basically duplicates this functionalit (and oddly with the bit manipulation instead of just atomic_inc/dec). Because the watchdog can be enabled even when the driver is not open. booke_wdt_enabled is also initialized in setup_32.c. So booke_wdt_enabled represents the watchdog hardwre, whereas wdt_is_active represents the open condition of /dev/watchdog. However, now that I think about it, maybe that just causes confusion. If the watchdog is already running because of a command-line parameter, should we prevent /dev/watchdog from ever being opened? If you're okay with that, then I can combine the two variables. If you were to keep this variable instead of just using booke_wdt_enabled, wouldn't it be more correct to have the clear_bit only done inside the #ifndef? The timer is very much still active if NOWAYOUT is set... In this case, yes. -- Timur Tabi Linux kernel developer at Freescale ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] watchdog: add CONFIG_WATCHDOG_NOWAYOUT support to PowerPC Book-E watchdog driver
On Fri, Dec 03, 2010 at 12:22:30PM -0600, Timur Tabi wrote: Josh Boyer wrote: I'm confused why you can't use booke_wdt_enabled for the purposes of the device having been opened. It seems the use of the wdt_is_active basically duplicates this functionalit (and oddly with the bit manipulation instead of just atomic_inc/dec). Because the watchdog can be enabled even when the driver is not open. booke_wdt_enabled is also initialized in setup_32.c. So booke_wdt_enabled represents the watchdog hardwre, whereas wdt_is_active represents the open condition of /dev/watchdog. Doh! The big fat comment right above the variable would have told me that had I bothered to read it. (As an aside, the For E500 cpus.. part of that comment also applies to 4xx.) However, now that I think about it, maybe that just causes confusion. If the watchdog is already running because of a command-line parameter, should we prevent /dev/watchdog from ever being opened? If you're okay with that, then I can combine the two variables. No, you definitely want to allow something to open it. If it's running and nothing opens the device and calls write, then you have no way of preventing the watchdog from just resetting your board every time. I had a driver for a different mechanism that would do the equivalent of booke_wdt_ping internally to the kernel until somthing opened the device. That way you could have the watchdog active during bootup and allow userspace to takeover control when it was ready. Then NOWAYOUT dictated what happened if the userspace process exited or died (or otherwise closed the device). I'm not sure we want to do that for this hardware, but it does illustrate the main use of a watchdog on a number of boards. I guess I don't really care either way if multiple processes have the device open, as long as none of them can disable the watchdog if NOWAYOUT is set. If you were to keep this variable instead of just using booke_wdt_enabled, wouldn't it be more correct to have the clear_bit only done inside the #ifndef? The timer is very much still active if NOWAYOUT is set... In this case, yes. ok. josh ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] watchdog: add CONFIG_WATCHDOG_NOWAYOUT support to PowerPC Book-E watchdog driver
Josh Boyer wrote: No, you definitely want to allow something to open it. If it's running and nothing opens the device and calls write, then you have no way of preventing the watchdog from just resetting your board every time. Now it's my turn to go Doh! Of course you have to be able to open the driver in order to ping the timer. I had a driver for a different mechanism that would do the equivalent of booke_wdt_ping internally to the kernel until somthing opened the device. That way you could have the watchdog active during bootup and allow userspace to takeover control when it was ready. Then NOWAYOUT dictated what happened if the userspace process exited or died (or otherwise closed the device). I'm not sure we want to do that for this hardware, but it does illustrate the main use of a watchdog on a number of boards. I guess I don't really care either way if multiple processes have the device open, as long as none of them can disable the watchdog if NOWAYOUT is set. Well, this patch takes care of that problem. So just to be clear, do you still have any issues with my patch? -- Timur Tabi Linux kernel developer at Freescale ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 2/2][v3] rapidio, powerpc/85xx: Error interrupt handler for sRIO.
I think they should follow the previous two that are in Kumar's tree. Probably Kumar may give you a better timeline estimate for this. Alex. From: linuxppc-dev-bounces+alexandre.bounine=idt@lists.ozlabs.org [mailto:linuxppc-dev-bounces+alexandre.bounine=idt@lists.ozlabs.org] On Behalf Of Xie Shaohui-B21989 Sent: Thursday, December 02, 2010 10:29 PM To: Bounine, Alexandre; linuxppc-dev@lists.ozlabs.org Cc: a...@linux-foundation.org; Gala Kumar-B11780; Li Yang-R58472; Zang Roy-R61911 Subject: RE: [PATCH 2/2][v3] rapidio,powerpc/85xx: Error interrupt handler for sRIO. Hi Alex, May I ask when would these patches be applied to mainline? Best Regards, Shaohui Xie From: Bounine, Alexandre [mailto:alexandre.boun...@idt.com] Sent: Wednesday, December 01, 2010 4:49 AM To: Xie Shaohui-B21989; linuxppc-dev@lists.ozlabs.org Cc: a...@linux-foundation.org; Li Yang-R58472; Gala Kumar-B11780; Zang Roy-R61911 Subject: RE: [PATCH 2/2][v3] rapidio, powerpc/85xx: Error interrupt handler for sRIO. Applies correctly now. Lab tested on 8548/RIO setup. Alex. -Original Message- From: Shaohui Xie [mailto:b21...@freescale.com] Sent: Thursday, November 18, 2010 1:58 AM To: linuxppc-dev@lists.ozlabs.org Cc: a...@linux-foundation.org; Shaohui Xie; Li Yang; Kumar Gala; Roy Zang; Bounine, Alexandre Subject: [PATCH 2/2][v3] rapidio, powerpc/85xx: Error interrupt handler for sRIO. The sRIO controller reports errors to the core with one signal, it uses register EPWISR to provides the core quick access to where the error occurred. The EPWISR indicates that there are 4 interrupts sources, port1, port2, message unit and port write receive, but the sRIO driver does not support port2 for now, still the handler takes care of port2. Currently the handler only clear error status without any recovery. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] watchdog: add CONFIG_WATCHDOG_NOWAYOUT support to PowerPC Book-E watchdog driver
On Fri, Dec 03, 2010 at 01:10:02PM -0600, Timur Tabi wrote: I guess I don't really care either way if multiple processes have the device open, as long as none of them can disable the watchdog if NOWAYOUT is set. Well, this patch takes care of that problem. So just to be clear, do you still have any issues with my patch? Just the moving of the clear_bit inside the #ifndef CONFIG_WATCHDOG_NOWAYOUT. josh ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] watchdog: add CONFIG_WATCHDOG_NOWAYOUT support to PowerPC Book-E watchdog driver
Josh Boyer wrote: Just the moving of the clear_bit inside the #ifndef CONFIG_WATCHDOG_NOWAYOUT. If I move the clear_bit() call inside the #ifndef, then when CONFIG_WATCHDOG_NOWAYOUT is defined, after a process closes /dev/watchdog, no process will ever be able to open it again. Are you saying that once wd_keepalive exits, you don't want anyone to be able to open /dev/watchdog and ping the timer again? -- Timur Tabi Linux kernel developer at Freescale ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] watchdog: add CONFIG_WATCHDOG_NOWAYOUT support to PowerPC Book-E watchdog driver
On Fri, Dec 03, 2010 at 01:43:37PM -0600, Timur Tabi wrote: Josh Boyer wrote: Just the moving of the clear_bit inside the #ifndef CONFIG_WATCHDOG_NOWAYOUT. If I move the clear_bit() call inside the #ifndef, then when CONFIG_WATCHDOG_NOWAYOUT is defined, after a process closes /dev/watchdog, no process will ever be able to open it again. Are you saying that once wd_keepalive exits, you don't want anyone to be able to open /dev/watchdog and ping the timer again? Oh, good point. No, I don't think we want that. So in that case: Acked-by: Josh Boyer jwbo...@linux.vnet.ibm.com and sorry for the hassle. josh ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH RFCv3 0/2] CARMA Board Support
Hello everyone, This is the third posting of these drivers, taking into account comments from earlier postings. The DMAEngine patches are in mainline now, and therefore are not part of this series anymore. RFCv2 - RFCv3: - use miscdevice framework (removing the carma class) - add bitfile readback capability to the programmer RFCv1 - RFCv2: - change comments to kerneldoc format - Kconfig improvements - use the videobuf_dma_sg API in the programmer - updates for Freescale DMAEngine DMA_SLAVE API changes Information about the CARMA board: The CARMA board is essentially an MPC8349EA MDS reference design with a 1GHz ADC and 4 high powered data processing FPGAs connected to the local bus. It is all packed into a compact PCI form factor. It is used at the Owens Valley Radio Observatory as the main component in the correlator system. For more information, see this webpage, maintained by the board's hardware engineer: http://www.mmarray.org/~dwh/carma_board/index.html These drivers are the necessary pieces to get the data processing FPGAs working and producing data. Despite the fact that the hardware is custom and we are the only users, I'd still like to get the drivers upstream. Several people have suggested that this is possible. Some further patches will be forthcoming. I have a driver for the LED subsystem and the PPS subsystem. The LED register layout is expected to change soon, so I won't post the driver until that is finished. The PPS driver will be posted seperately from this patch series; it is very generic. Thanks to everyone who has provided comments on earlier versions! Ira W. Snyder (2): misc: add CARMA DATA-FPGA Access Driver misc: add CARMA DATA-FPGA Programmer support drivers/misc/Kconfig|1 + drivers/misc/Makefile |1 + drivers/misc/carma/Kconfig | 18 + drivers/misc/carma/Makefile |2 + drivers/misc/carma/carma-fpga-program.c | 1084 +++ drivers/misc/carma/carma-fpga.c | 1433 +++ 6 files changed, 2539 insertions(+), 0 deletions(-) create mode 100644 drivers/misc/carma/Kconfig create mode 100644 drivers/misc/carma/Makefile create mode 100644 drivers/misc/carma/carma-fpga-program.c create mode 100644 drivers/misc/carma/carma-fpga.c -- 1.7.2.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH RFCv3 2/2] misc: add CARMA DATA-FPGA Programmer support
This adds support for programming the data processing FPGAs on the OVRO
CARMA board. These FPGAs have a special programming sequence that
requires that we program the Freescale DMA engine, which is only
available inside the kernel.
Signed-off-by: Ira W. Snyder i...@ovro.caltech.edu
---
drivers/misc/carma/Kconfig |9 +
drivers/misc/carma/Makefile |1 +
drivers/misc/carma/carma-fpga-program.c | 1084 +++
3 files changed, 1094 insertions(+), 0 deletions(-)
create mode 100644 drivers/misc/carma/carma-fpga-program.c
diff --git a/drivers/misc/carma/Kconfig b/drivers/misc/carma/Kconfig
index 4be183f..e57a9d3 100644
--- a/drivers/misc/carma/Kconfig
+++ b/drivers/misc/carma/Kconfig
@@ -7,3 +7,12 @@ config CARMA_FPGA
Say Y here to include support for communicating with the data
processing FPGAs on the OVRO CARMA board.
+config CARMA_FPGA_PROGRAM
+ tristate CARMA DATA-FPGA Programmer
+ depends on FSL_SOC PPC_83xx MEDIA_SUPPORT HAS_DMA FSL_DMA
+ select VIDEOBUF_DMA_SG
+ default n
+ help
+ Say Y here to include support for programming the data processing
+ FPGAs on the OVRO CARMA board.
+
diff --git a/drivers/misc/carma/Makefile b/drivers/misc/carma/Makefile
index 0b69fa7..ff36ac2 100644
--- a/drivers/misc/carma/Makefile
+++ b/drivers/misc/carma/Makefile
@@ -1 +1,2 @@
obj-$(CONFIG_CARMA_FPGA) += carma-fpga.o
+obj-$(CONFIG_CARMA_FPGA_PROGRAM) += carma-fpga-program.o
diff --git a/drivers/misc/carma/carma-fpga-program.c
b/drivers/misc/carma/carma-fpga-program.c
new file mode 100644
index 000..ef16cb3
--- /dev/null
+++ b/drivers/misc/carma/carma-fpga-program.c
@@ -0,0 +1,1084 @@
+/*
+ * CARMA Board DATA-FPGA Programmer
+ *
+ * Copyright (c) 2009-2010 Ira W. Snyder i...@ovro.caltech.edu
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include linux/dma-mapping.h
+#include linux/of_platform.h
+#include linux/completion.h
+#include linux/miscdevice.h
+#include linux/dmaengine.h
+#include linux/interrupt.h
+#include linux/highmem.h
+#include linux/kernel.h
+#include linux/module.h
+#include linux/mutex.h
+#include linux/delay.h
+#include linux/init.h
+#include linux/leds.h
+#include linux/slab.h
+#include linux/fs.h
+#include linux/io.h
+
+#include media/videobuf-dma-sg.h
+
+/* MPC8349EMDS specific get_immrbase() */
+#include sysdev/fsl_soc.h
+
+static const char drv_name[] = carma-fpga-program;
+
+/*
+ * Maximum firmware size
+ *
+ * 12849552 bytes for a CARMA Digitizer Board
+ * 18662880 bytes for a CARMA Correlator Board
+ */
+#define FW_SIZE_EP2S90 12849552
+#define FW_SIZE_EP2S13018662880
+
+struct fpga_dev {
+ struct miscdevice miscdev;
+
+ /* Device Registers */
+ struct device *dev;
+ void __iomem *regs;
+ void __iomem *immr;
+
+ /* Freescale DMA Device */
+ struct dma_chan *chan;
+
+ /* Interrupts */
+ int irq, status;
+ struct completion completion;
+
+ /* FPGA Bitfile */
+ struct mutex lock;
+
+ struct videobuf_dmabuf vb;
+ bool vb_allocated;
+
+ /* max size and written bytes */
+ size_t fw_size;
+ size_t bytes;
+};
+
+/*
+ * FPGA Bitfile Helpers
+ */
+
+/**
+ * fpga_drop_firmware_data() - drop the bitfile image from memory
+ * @priv: the driver's private data structure
+ *
+ * LOCKING: must hold priv-lock
+ */
+static void fpga_drop_firmware_data(struct fpga_dev *priv)
+{
+ videobuf_dma_free(priv-vb);
+ priv-vb_allocated = false;
+ priv-bytes = 0;
+}
+
+/*
+ * LED Trigger (could be a seperate module)
+ */
+
+/*
+ * NOTE: this whole thing does have the problem that whenever the led's are
+ * NOTE: first set to use the fpga trigger, they could be in the wrong state
+ */
+
+DEFINE_LED_TRIGGER(ledtrig_fpga);
+
+static void ledtrig_fpga_programmed(bool enabled)
+{
+ if (enabled)
+ led_trigger_event(ledtrig_fpga, LED_FULL);
+ else
+ led_trigger_event(ledtrig_fpga, LED_OFF);
+}
+
+/*
+ * FPGA Register Helpers
+ */
+
+/* Register Definitions */
+#define FPGA_CONFIG_CONTROL0x40
+#define FPGA_CONFIG_STATUS 0x44
+#define FPGA_CONFIG_FIFO_SIZE 0x48
+#define FPGA_CONFIG_FIFO_USED 0x4C
+#define FPGA_CONFIG_TOTAL_BYTE_COUNT 0x50
+#define FPGA_CONFIG_CUR_BYTE_COUNT 0x54
+
+#define FPGA_FIFO_ADDRESS 0x3000
+
+static int fpga_fifo_size(void __iomem *regs)
+{
+ return ioread32be(regs + FPGA_CONFIG_FIFO_SIZE);
+}
+
+static int fpga_config_error(void __iomem *regs)
+{
+ return ioread32be(regs + FPGA_CONFIG_STATUS) 0xFFFE;
+}
+
+static int fpga_fifo_empty(void __iomem *regs)
+{
+ return
[PATCH RFCv3 1/2] misc: add CARMA DATA-FPGA Access Driver
This driver allows userspace to access the data processing FPGAs on the OVRO CARMA board. It has two modes of operation: 1) random access This allows users to poke any DATA-FPGA registers by using mmap to map the address region directly into their memory map. 2) correlation dumping When correlating, the DATA-FPGA's have special requirements for getting the data out of their memory before the next correlation. This nominally happens at 64Hz (every 15.625ms). If the data is not dumped before the next correlation, data is lost. The data dumping driver handles buffering up to 1 second worth of correlation data from the FPGAs. This lowers the realtime scheduling requirements for the userspace process reading the device. Signed-off-by: Ira W. Snyder i...@ovro.caltech.edu --- drivers/misc/Kconfig|1 + drivers/misc/Makefile |1 + drivers/misc/carma/Kconfig |9 + drivers/misc/carma/Makefile |1 + drivers/misc/carma/carma-fpga.c | 1433 +++ 5 files changed, 1445 insertions(+), 0 deletions(-) create mode 100644 drivers/misc/carma/Kconfig create mode 100644 drivers/misc/carma/Makefile create mode 100644 drivers/misc/carma/carma-fpga.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 4d073f1..f457f14 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -457,5 +457,6 @@ source drivers/misc/eeprom/Kconfig source drivers/misc/cb710/Kconfig source drivers/misc/iwmc3200top/Kconfig source drivers/misc/ti-st/Kconfig +source drivers/misc/carma/Kconfig endif # MISC_DEVICES diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 98009cc..2c1610e 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -42,3 +42,4 @@ obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o obj-$(CONFIG_PCH_PHUB) += pch_phub.o obj-y += ti-st/ obj-$(CONFIG_AB8500_PWM) += ab8500-pwm.o +obj-y += carma/ diff --git a/drivers/misc/carma/Kconfig b/drivers/misc/carma/Kconfig new file mode 100644 index 000..4be183f --- /dev/null +++ b/drivers/misc/carma/Kconfig @@ -0,0 +1,9 @@ +config CARMA_FPGA + tristate CARMA DATA-FPGA Access Driver + depends on FSL_SOC PPC_83xx MEDIA_SUPPORT HAS_DMA FSL_DMA + select VIDEOBUF_DMA_SG + default n + help + Say Y here to include support for communicating with the data + processing FPGAs on the OVRO CARMA board. + diff --git a/drivers/misc/carma/Makefile b/drivers/misc/carma/Makefile new file mode 100644 index 000..0b69fa7 --- /dev/null +++ b/drivers/misc/carma/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_CARMA_FPGA) += carma-fpga.o diff --git a/drivers/misc/carma/carma-fpga.c b/drivers/misc/carma/carma-fpga.c new file mode 100644 index 000..55b98e5 --- /dev/null +++ b/drivers/misc/carma/carma-fpga.c @@ -0,0 +1,1433 @@ +/* + * CARMA DATA-FPGA Access Driver + * + * Copyright (c) 2009-2010 Ira W. Snyder i...@ovro.caltech.edu + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/* + * FPGA Memory Dump Format + * + * FPGA #0 control registers (32 x 32-bit words) + * FPGA #1 control registers (32 x 32-bit words) + * FPGA #2 control registers (32 x 32-bit words) + * FPGA #3 control registers (32 x 32-bit words) + * SYSFPGA control registers (32 x 32-bit words) + * FPGA #0 correlation array (NUM_CORL0 correlation blocks) + * FPGA #1 correlation array (NUM_CORL1 correlation blocks) + * FPGA #2 correlation array (NUM_CORL2 correlation blocks) + * FPGA #3 correlation array (NUM_CORL3 correlation blocks) + * + * Each correlation array consists of: + * + * Correlation Data (2 x NUM_LAGSn x 32-bit words) + * Pipeline Metadata (2 x NUM_METAn x 32-bit words) + * Quantization Counters (2 x NUM_QCNTn x 32-bit words) + * + * The NUM_CORLn, NUM_LAGSn, NUM_METAn, and NUM_QCNTn values come from + * the FPGA configuration registers. They do not change once the FPGA's + * have been programmed, they only change on re-programming. + */ + +/* + * Basic Description: + * + * This driver is used to capture correlation spectra off of the four data + * processing FPGAs. The FPGAs are often reprogrammed at runtime, therefore + * this driver supports dynamic enable/disable of capture while the device + * remains open. + * + * The nominal capture rate is 64Hz (every 15.625ms). To facilitate this fast + * capture rate, all buffers are pre-allocated to avoid any potentially long + * running memory allocations while capturing. + * + * There are three lists which are used to keep track of the different states + * of data buffers. + * + * 1) free list + * This list holds all empty data buffers which are ready to receive data. + * + * 2) inflight list + * This list holds data
Re: [RFC PATCH 3/7 v2] ppc: do not search for dma-window property on dlpar remove
On 29.11.2010 [12:38:41 +1100], Benjamin Herrenschmidt wrote: On Tue, 2010-10-26 at 20:35 -0700, Nishanth Aravamudan wrote: The iommu_table pointer in the pci auxiliary struct of device_node has not been used by the iommu ops since the dma refactor of 12d04eef927bf61328af2c7cbe756c96f98ac3bf, however this code still uses it to find tables for dlpar. By only setting the PCI_DN iommu_table pointer on nodes with dma window properties, we will be able to quickly find the node for later checks, and can remove the table without looking for the the dma window property on dlpar remove. The answer might well be yes but are we sure this works with busses devices that don't have a dma,window ? ie. we always properly look for parents when assigning pci devices arch_data iommu table ? Did you test it ? :-) (Best way is to find a card with a P2P bridge on it). So I spent quite a while looking for some device or bus that didn't have ibm,dma-window and the boxes I have access to didn't contain any :/ I did test dlpar remove now on p6 and it worked fine. Thanks, Nish -- Nishanth Aravamudan n...@us.ibm.com IBM Linux Technology Center ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v3] PPC4xx: Adding PCI(E) MSI support
From: Tirumala Marri tma...@apm.com
This patch adds MSI support for 440SPe, 460Ex, 460Sx and 405Ex.
Signed-off-by: Tirumala R Marri tma...@apm.com
---
v3:
* Rebased to Josh next tree
* Cleanup and remove some unwanted log msg.
* Remove list member and its references.
* Keep msi_data local reference.
v2:
* Remove or add blank lines at appropriate places.
* Added BITMAP as it is easy to request and free the MSIs
* Removed UPPER_4BITS_OF36BIT LOWER_32BITS_OF36BIT;
* Remove unused feature variable.
* Remove initialization of virq.
* remove static int_no varaible and replace with bitmap.
* Eliminated reading count from DTS tree and added a macro.
* Remove printK.
* Remove else in setup_irqs.
* Free interrupts in teardown_msi_interrupts().
* Print contraints in check_device().
* Replace ioremap with of_iomap().
* Use msi_data in setup_pcieh_hw().
* Don't unmap in the setup_pcieh_hw().
* don't use WARN_ON.
* Remove ppc4xx_msi_ids[].
---
arch/powerpc/boot/dts/canyonlands.dts | 18 ++
arch/powerpc/boot/dts/katmai.dts | 18 ++
arch/powerpc/boot/dts/kilauea.dts | 28 +++
arch/powerpc/boot/dts/redwood.dts | 20 +++
arch/powerpc/platforms/40x/Kconfig|2 +
arch/powerpc/platforms/44x/Kconfig|6 +
arch/powerpc/sysdev/Kconfig |7 +
arch/powerpc/sysdev/Makefile |1 +
arch/powerpc/sysdev/ppc4xx_msi.c | 291 +
9 files changed, 391 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/sysdev/ppc4xx_msi.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index 5b27a4b..5142a4a 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -506,5 +506,23 @@
0x0 0x0 0x0 0x3 UIC3 0x12 0x4 /* swizzled int
C */
0x0 0x0 0x0 0x4 UIC3 0x13 0x4 /* swizzled int
D */;
};
+
+ MSI: ppc4xx-...@c1000 {
+ compatible = amcc,ppc4xx-msi, ppc4xx-msi;
+ reg = 0xC 0x1000 0x100;
+ sdr-base = 0x36C;
+ msi-data = 0x;
+ msi-mask = 0x;
+ interrupt-count = 3;
+ interrupts = 0 1 2 3;
+ interrupt-parent = UIC3;
+ #interrupt-cells = 1;
+ #address-cells = 0;
+ #size-cells = 0;
+ interrupt-map = 0 UIC3 0x18 1
+ 1 UIC3 0x19 1
+ 2 UIC3 0x1A 1
+ 3 UIC3 0x1B 1;
+ };
};
};
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts
index 7c3be5e..f913dbe 100644
--- a/arch/powerpc/boot/dts/katmai.dts
+++ b/arch/powerpc/boot/dts/katmai.dts
@@ -442,6 +442,24 @@
0x0 0x0 0x0 0x4 UIC3 0xb 0x4 /* swizzled int D
*/;
};
+ MSI: ppc4xx-...@40030 {
+ compatible = amcc,ppc4xx-msi, ppc4xx-msi;
+ reg = 0x4 0x0030 0x100;
+ sdr-base = 0x3B0;
+ msi-data = 0x;
+ msi-mask = 0x;
+ interrupt-count = 3;
+ interrupts =0 1 2 3;
+ interrupt-parent = UIC0;
+ #interrupt-cells = 1;
+ #address-cells = 0;
+ #size-cells = 0;
+ interrupt-map = 0 UIC0 0xC 1
+ 1 UIC0 0x0D 1
+ 2 UIC0 0x0E 1
+ 3 UIC0 0x0F 1;
+ };
+
I2O: i...@40010 {
compatible = ibm,i2o-440spe;
reg = 0x0004 0x0010 0x100;
diff --git a/arch/powerpc/boot/dts/kilauea.dts
b/arch/powerpc/boot/dts/kilauea.dts
index 89edb16..1613d6e 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -403,5 +403,33 @@
0x0 0x0 0x0 0x3 UIC2 0xd 0x4 /* swizzled int C
*/
0x0 0x0 0x0 0x4 UIC2 0xe 0x4 /* swizzled int D
*/;
};
+
+ MSI: ppc4xx-...@c1000 {
+ compatible = amcc,ppc4xx-msi, ppc4xx-msi;
+ reg = 0x0 0xEF62 0x100;
+ sdr-base = 0x4B0;
+ msi-data = 0x;
+ msi-mask = 0x;
+ interrupt-count = 12;
+ interrupts = 0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD;
+
Re: [PATCH v2] PPC4xx: Adding PCI(E) MSI support
+ msi_mask = of_get_property(dev-dev.of_node, msi-mask, NULL);
+ if (!msi_mask) {
+ err = -1;
+ goto error_out;
+ }
This will return non zero value to probe function which would call
ppc4xx_msi_remove() function. In the ppc4xx_msi_remove() function there is
iounamp() fuction.
Thanks,
Marri
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