Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e24049da630d6a6aaacb240e99f495e1549f4b8a
Author: Samuel Pitoiset 
Date:   Tue Dec 15 11:54:31 2020 +0100

radv: advertise attachmentFragmentShadingRate on GFX10.3

Layered VRS attachments is for later.
The CTS failures are similar to the existing ones, I will investigate
soon.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ee77dde39684686b4bda2e031894848c27ba3374
Author: Samuel Pitoiset 
Date:   Fri Apr 9 13:58:53 2021 +0200

radv: configure the VRS combiners when an attachment is used

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea370f45b4f857f899f01f1de711389889fd2bce
Author: Samuel Pitoiset 
Date:   Thu Apr 8 19:10:00 2021 +0200

radv: copy VRS rates to HTILE when beginning a subpass

The global VRS image is created on-demand to avoid wasting space.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b7e3462039d671e320298247e974185275352dd
Author: Samuel Pitoiset 
Date:   Tue Dec 8 15:36:22 2020 +0100

radv: add support for copying VRS rates into HTILE

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=164b1884c0d414aa558777813a3e040d694b0a75
Author: Samuel Pitoiset 
Date:   Thu Apr 8 11:43:00 2021 +0200

radv: bind our internal depth buffer when not provided by the app

When a subpass uses a VRS attachment without binding a depth/stencil
attachment (yes, this is allowed by the Vulkan spec), we have to bind
our internal depth buffer that contains the VRS data.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=513a166a7bb5020d9cd16b6184a2cecc99a825ba
Author: Samuel Pitoiset 
Date:   Fri Apr 9 13:57:21 2021 +0200

radv: handle the VRS attachment subpass

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb88f73ad3b6e6684f3fe19f5ca875f666393173
Author: Samuel Pitoiset 
Date:   Wed Apr 7 17:55:00 2021 +0200

radv: create an image for VRS if no depth/stencil attachment is bound

The Vulkan spec doesn't require the application to always binds
a depth/stencil attachment when a VRS attachment is used inside the
same subpass.

To handle this situation, the driver creates a global 4096x4096
VRS image that will be bind at draw-time if needed. This isn't
super ideal but we have to do that unfortunately.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba7c510e1f1a06a55e7bb9355c2c3c78e408511f
Author: Samuel Pitoiset 
Date:   Mon Apr 12 15:01:24 2021 +0200

radv: allow HTILE for very small images if VRS attachment is used

We need a HTILE buffer to store the VRS rates.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7bd3a9f5029657ccc7dea87f0a52af562f46fda2
Author: Samuel Pitoiset 
Date:   Mon Mar 22 18:15:26 2021 +0100

radv: update the HTILE clear word when VRS is used

SR1 is the VRS x-rate.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d075711b0e8e94fab17e0320f74eff241be52972
Author: Samuel Pitoiset 
Date:   Fri Apr 9 13:26:30 2021 +0200

radv: do not use the whole HTILE buffer for depth when VRS is used

The stencil data needs to be included for storing the VRS rates
into the HTILE buffer.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=73dac68cb813cb9a9e16035e636d228069dfe28e
Author: Samuel Pitoiset 
Date:   Fri Apr 9 13:30:01 2021 +0200

radv: configure the VRS HTILE encoding size

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0dfc5b51967ea9645e22cf35f459a153dd85473d
Author: Ilia Mirkin 
Date:   Mon Mar 1 18:59:27 2021 -0500

nv50/ir: fix emission of ld/st lock/unlock

This is necessary to implement shared atomics.

Signed-off-by: Ilia Mirkin 
Acked-by: Pierre Moreau 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0fa6e066b3c91be7196dc392b95dbf97445ac96
Author: Ilia Mirkin 
Date:   Mon Mar 1 18:57:56 2021 -0500

nv50/ir: avoid inlining results of a locked load

These are a bit special. Among other things, removing them will cause us
to potentially remove the load itself, defeating the purpose of the
locking. Also it's unclear whether it's legal to access the shared
memory directly when it's locked like this.

This only comes up on nv50, since on nvc0+, shared memory can't be
loaded from random ops.

Signed-off-by: Ilia Mirkin 
Acked-by: Pierre Moreau 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7052927ee4420ead8b03f8e6489d2a92b14efc7f
Author: Ilia Mirkin 
Date:   Fri Feb 26 20:45:21 2021 -0500

nv50: fix expression for ucp offset

It doesn't matter since it's 0, but all the offsets are in bytes whereas
the method expects words. So adjust by 2.

Signed-off-by: Ilia Mirkin 
Reviewed-by: Pierre Moreau 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=52172fded5640d5f6257766275a7b4cf01ce7017
Author: Ilia Mirkin 
Date:   Sat Feb 27 18:24:44 2021 -0500

nv50/ir: fix emission of cas without a destination

We were previously dumping $r127 in there. This has a bad effect on
nv50, so make sure we allocate an actual register for it, even if
there's nothing using the result.

Signed-off-by: Ilia Mirkin 
Acked-by: Pierre Moreau 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3b02fea7e54bb44f87a5986727fab8b1c4da641
Author: Ilia Mirkin 
Date:   Sun Feb 28 20:08:25 2021 -0500

nv50/ir: fix emission of 16-bit add

Signed-off-by: Ilia Mirkin 
Acked-by: Pierre Moreau 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe93723aaa16be29cc5b679e39fddd9683bf2839
Author: Ilia Mirkin 
Date:   Wed Feb 24 22:21:24 2021 -0500

nv50/ir: add support for 16-bit immediates

Signed-off-by: Ilia Mirkin 
Reviewed-by: Pierre Moreau 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a69efa171f25524668cea78c19b38d237494e42
Author: Ilia Mirkin 
Date:   Wed Feb 24 22:18:37 2021 -0500

nv50/ir: logic ops on half-regs can't take an immediate

There does not appear to be an instruction form for this. Prevent an
immediate from being loaded into place.

Signed-off-by: Ilia Mirkin 
Reviewed-by: Pierre Moreau 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=afcd296b1b8e93060b211ab59949eaff4c332bb8
Author: Ilia Mirkin 
Date:   Wed Feb 24 22:15:32 2021 -0500

nv50/ir: fix emission of shifts on half-regs

Signed-off-by: Ilia Mirkin 
Acked-by: Pierre Moreau 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=af8665c3a5bc91b2132c31e8ff619592f9472140
Author: Ilia Mirkin 
Date:   Wed Feb 24 22:15:04 2021 -0500

nv50/ir: fix emission of logic ops on half-regs

Signed-off-by: Ilia Mirkin 
Acked-by: Pierre Moreau 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=96e8e74813b142a1681c9eef49ca71d49db0502b
Author: Ilia Mirkin 
Date:   Wed Feb 24 22:14:16 2021 -0500

nv50/ir: fix emission of cvt with half-reg destinations

Signed-off-by: Ilia Mirkin 
Acked-by: Pierre Moreau 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6b02c097f7657e48a43da7c5f39b7b8baeff040
Author: Ilia Mirkin 
Date:   Wed Feb 24 14:17:55 2021 -0500

nv50/ir: fix emitting movs from imm to short registers

Signed-off-by: Ilia Mirkin 
Acked-by: Pierre Moreau 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ff2d65799e4a8351e99bab306bc49c01062ac19
Author: Ilia Mirkin 
Date:   Mon Feb 15 12:24:54 2021 -0500

nv50/ir: lower buffer to global

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=40792790517d09b641bd0666d9e6cda1f027f6a1
Author: Jason Ekstrand 
Date:   Tue Mar 16 10:08:21 2021 -0500

anv/apply_pipeline_layout: Add support for A64 descriptor access

Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b704d03efd47678613248fce3d63954f1fae61f8
Author: Jason Ekstrand 
Date:   Fri Jan 15 16:44:44 2021 -0600

anv: Do UBO loads with global addresses for bindless

This makes UBO loads in the variable pointers or bindless case work just
like SSBO loads in the sense that they use A64 messages and 64-bit
global addresses.  The primary difference is that we have an
optimization in anv_nir_lower_ubo_loads which uses a (possibly
predicated) block load message when the offset is constant so we get
roughly the same performance as we would from plumbing load_ubo all the
way to the back-end.

Reviewed-by: Kenneth Graunke 
Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=61749b5a1513888767c39b2099be3e82f8d91871
Author: Jason Ekstrand 
Date:   Fri Jan 15 14:59:42 2021 -0600

anv: Add a pass for lowering A64 UBO access

Instead of load_global_constant_offset/bounded, we want to use the
Intel-specific block load intrinsic whenever we can.  This way we get
the same wide block loads that we usually use for constant offset UBO
pulls with a binding table.

Reviewed-by: Kenneth Graunke 
Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c8748771bb68951a2921e76ceab61b68fca9417d
Author: Jason Ekstrand 
Date:   Fri Jan 15 00:35:19 2021 -0600

nir/lower_io: Support global addresses for UBOs in nir_lower_explicit_io

For nir_address_format_64bit_global_32bit_offset and
nir_address_format_64bit_bounded_global, we use a new intrinsics which
take the base address and offset as separate parameters.  For bounds-
checked access, the bound is also included in the intrinsic.  This gives
the drive more control over the bounds checking so that UBOs don't
suddenly become massively more expensive.

Reviewed-by: Kenneth Graunke 
Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bd65e4d19923be87e94a5a4eca6cc5285a3c3d40
Author: Jason Ekstrand 
Date:   Sat Mar 13 23:58:13 2021 -0600

anv/apply_pipeline_layout: Use the new helpers for images

Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4113a3750cf5f2b72cf75dd74e6af0ba2b0b67ee
Author: Jason Ekstrand 
Date:   Fri Mar 12 17:35:32 2021 -0600

anv/apply_pipeline_layout: Use the new helpers for early lowering

This also means that some of the newly added helpers need to grow a bit
to support VK_DESCRIPTOR_TYPE_INLINE_UNIFORM_DATA_EXT.

Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=93126b641c61717264464b36b3e72b0a9330cdde
Author: Jason Ekstrand 
Date:   Fri Mar 12 17:49:40 2021 -0600

anv/apply_pipeline_layout: Rework the desc_addr_format helper

We're about to add a new helper which is more detailed.

Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f95134a0fe7a8fb5bf02e5419926bbfebaca1e73
Author: Jason Ekstrand 
Date:   Fri Mar 12 15:25:13 2021 -0600

anv/apply_pipeline_layout: Refactor all our descriptor address builders

Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=42de744155b801c45c80dbaa69ea280c4a5612ba
Author: Jason Ekstrand 
Date:   Wed Jan 20 15:59:23 2021 -0600

anv/apply_pipeline_layout: Apply dynamic offsets in load_ssbo_descriptor

This function has exactly two call sites.  The first is where we had
these calculations before.  The second only cares about the size of the
SSBO so all the extra code we emit will be dead.  However, NIR should
easily clean that up and this lets us consolidate things a bit better.

Reviewed-by: Kenneth Graunke 
Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=856b71bef097c2354feac5358286e502312ae721
Author: Alyssa Rosenzweig 
Date:   Thu Feb 18 16:21:43 2021 -0500

pan/bi: Do copyprop in linear-time

Per discussion with Daniel Schürmann on IRC about the joys of SSA form
and why you don't actually need use-def chains. Indeed, I didn't. No
shader-db changes, time difference in shader-db is neglible since the
win from this is particularly for large shaders.

Total runtime of

dEQP-GLES31.functional.ssbo.layout.single_struct_array.single_buffer.std430_instance_array
reduced from 1.04s to 0.77s (25%)

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=07456bcde2c915610b531b3134b0e3acb829414b
Author: Alyssa Rosenzweig 
Date:   Fri Feb 19 10:45:57 2021 -0500

pan/bi: Remove unused definitions

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Boris Brezillon 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f71801aa21c9e8ec1795d4ba0850cf854cf8bb0
Author: Alyssa Rosenzweig 
Date:   Thu Feb 18 14:58:50 2021 -0500

pan/bi: Adapt builder to dest count

If there are no destinations, don't produce a _to version, and let the
bare version return the bi_instr.

If there are multiple destinations, take each in the _to version and
don't produce a bare version.

Both cares are probably what you wanted anyway.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Boris Brezillon 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac3722fd83d8a0563eae31517fc24e3815c49b4d
Author: Alyssa Rosenzweig 
Date:   Thu Feb 18 14:15:02 2021 -0500

pan/bi: Annotate instructions by destination count

Allows for better builders.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Boris Brezillon 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4ed4cbf142ba894b0c334f2144ed6387a7c5feb
Author: Alyssa Rosenzweig 
Date:   Fri Feb 19 08:56:17 2021 -0500

pan/bi: Allow spilling with multiple destinations

Now that we fixed this.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Boris Brezillon 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8cbded63fba06263eee0c231eca3594d0d35a1c6
Author: Alyssa Rosenzweig 
Date:   Thu Feb 18 16:56:16 2021 -0500

pan/bi: Make bi_writemask take a destination

Assuming it's only the first destination breaks assumptions across the
compiler. Add a destination source and fix up the many corresponding
issues. Nothing to backport as far as I understand since multidest
instruction are new.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Boris Brezillon 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=35e24aef6f7680280f97728f69c9cfe27070539f
Author: Alyssa Rosenzweig 
Date:   Fri Feb 19 09:28:52 2021 -0500

pan/bi: Mark DISCARD as having side effects

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Boris Brezillon 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=25da85880e1cdeffa070e395ca5de8c08b9ea2ed
Author: Alyssa Rosenzweig 
Date:   Fri Feb 19 09:17:48 2021 -0500

pan/bi: Mark branches as having side effects

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Boris Brezillon 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=11fbe5aeb5916b705ad4cdc31545d870106d3f6e
Author: Alyssa Rosenzweig 
Date:   Thu Feb 18 16:26:02 2021 -0500

pan/bi: Inline `bytemask of read components`

Only used in one place (and should never be used elsewhere -- even this
use is questionable). By inlining we avoid O(N^2) behaviour on the
number of sources in liveness updates.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Boris Brezillon 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9882a59a2f2cc36d900d332337a307ba627020c4
Author: Alyssa Rosenzweig 
Date:   Thu Feb 18 16:11:38 2021 -0500

pan/bi: Reduce liveness calculations in DCE

Forward port of fc06b8b7 ("pan/mdg: Optimize liveness computation in
DCE")

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eec2d4e466a89ece98b2c0e3947db41d84d08a95
Author: Lionel Landwerlin 
Date:   Thu Sep 10 11:54:55 2020 +0300

anv: switch intel perf queries to query layout

Apart from the single additional marker field, these queries will now
use the same layout as all other drivers.

This should allow us to modify a single component to add an additional
register for new metrics.

v2: Capture the query beging registers in reverse order to ensure
timestamp is as close as possible from measured draw call.

Signed-off-by: Lionel Landwerlin 
Reviewed-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ca1f488e6f6a5796173307a474b7fc22a2f7766
Author: Lionel Landwerlin 
Date:   Wed Aug 26 15:44:07 2020 +0300

anv: switch khr perf query code to use query layout

This unifies performance data gathering between the GL & Vulkan
drivers.

v2: Also move all NOOPs to before the query, leaving none inside

v3: Capture the query beging registers in reverse order to ensure
timestamp is as close as possible from measured draw call.

Signed-off-by: Lionel Landwerlin 
Reviewed-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76bba61e0be7c0e4448e3a4bd732e1e62645843d
Author: Lionel Landwerlin 
Date:   Tue Sep 15 11:22:17 2020 +0300

anv: compute commands required to implement perf queries

We'll use this later to try to limit the number of NOOPs emitted for
self modifying batches.

Signed-off-by: Lionel Landwerlin 
Reviewed-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=185df6ac9cfb8cad9c925bfba249f8479890cdad
Author: Lionel Landwerlin 
Date:   Thu Oct 8 15:15:51 2020 +0300

intel/perf: drop the special READ_REG operator

Makes things a bit more uniform.

Signed-off-by: Lionel Landwerlin 
Reviewed-by: Marcin Ślusarz 
Reviewed-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f721f2ad05f70f1e2ef069f52f21b30fcbd56cf7
Author: Lionel Landwerlin 
Date:   Wed Aug 26 16:39:13 2020 +0300

intel/perf: add DG1 support

Signed-off-by: Lionel Landwerlin 
Acked-by: Marcin Ślusarz 
Acked-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b335bc55ab1b9e90334807dc6463ef5f07633a9
Author: Lionel Landwerlin 
Date:   Wed Aug 26 16:36:40 2020 +0300

intel/perf: add RKL support

Signed-off-by: Lionel Landwerlin 
Acked-by: Marcin Ślusarz 
Acked-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d6741b11b1e189fa163e590590b4d1b04cebb7c
Author: Lionel Landwerlin 
Date:   Wed Aug 26 15:48:36 2020 +0300

intel/dev: identify rocketlake

Signed-off-by: Lionel Landwerlin 
Reviewed-by: Marcin Ślusarz 
Reviewed-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b3443fbd974fa776462ad7e097029fafd47ba3f
Author: Lionel Landwerlin 
Date:   Tue Aug 25 16:12:16 2020 +0300

intel/perf: break TGL perf configs in GT1/2

Programming and equations are different enough that we really need 2
files.

Signed-off-by: Lionel Landwerlin 
Acked-by: Marcin Ślusarz 
Acked-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f97fc0ff8b33fbf24a664962c51391a3a51e7e5d
Author: Lionel Landwerlin 
Date:   Wed Aug 26 15:44:23 2020 +0300

intel/dev: identify tigerlake

We'll need that to pick the right query sets between TGL/RKL/DG1.

Signed-off-by: Lionel Landwerlin 
Reviewed-by: Marcin Ślusarz 
Reviewed-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6afe5d3624eb2e5025378d55968a824b6b89425c
Author: Lionel Landwerlin 
Date:   Thu Oct 8 14:48:24 2020 +0300

intel/perf: add async compute metrics

Signed-off-by: Lionel Landwerlin 
Acked-by: Marcin Ślusarz 
Acked-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7335faa1a9cec997c2289db915b7972b4158f196
Author: Lionel Landwerlin 
Date:   Thu 

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a51aa6feb4dab07e29b9834f7ad431cc0dd6f9fe
Author: Alyssa Rosenzweig 
Date:   Thu Sep 10 13:26:57 2020 -0400

pan/bi: Drop *FMIN reference

Even on G72, it's unsupported.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Daniel Stone 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=865e252dd0185313cbf06cca782fc3b3c3867239
Author: Alyssa Rosenzweig 
Date:   Fri Jul 31 19:55:12 2020 -0400

pan/bi: Remove unused packing data structures

Replaced by metaprogrammed variants.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Daniel Stone 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec43629e8c03f759e446018d56e4adece3dc913c
Author: Alyssa Rosenzweig 
Date:   Wed Sep 2 09:12:27 2020 -0400

pan/bi: Remove unused prints

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Daniel Stone 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ff53879f214700def92fd2cc3ead89119cd2fef
Author: Alyssa Rosenzweig 
Date:   Mon Aug 3 12:48:44 2020 -0400

pan/bi: Use new packing

...and remove the old manual code.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Daniel Stone 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3fadd8234611837798311ff1ace7a39c1cc3adc4
Author: Alyssa Rosenzweig 
Date:   Mon Sep 14 13:44:52 2020 -0400

pan/bi: Move packing helpers to dedicated file

We'll need to access them from the autogenerated section.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Daniel Stone 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d2158a5b3016bf4e6593ba4f0fc4de653323bf87
Author: Alyssa Rosenzweig 
Date:   Wed Sep 9 17:46:58 2020 -0400

pan/bi: Use src1/dest_invert instead of src_invert[]

This maps more closely to the hardware, which makes for easier packing.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Daniel Stone 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=08b105d78254612ad64fe7aec825c3fbe102cc90
Author: Alyssa Rosenzweig 
Date:   Wed Sep 9 17:40:22 2020 -0400

pan/bi: Use 8-bit shifts

Logically, it doesn't matter, but we want the IR to accurately reflect
the hardware behaviour.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Daniel Stone 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d63a476f7a05eaa7810b86405381285fb6672ad
Author: Alyssa Rosenzweig 
Date:   Mon Aug 3 12:48:25 2020 -0400

pan/bi: Pass blend descriptor explicitly in IR

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Daniel Stone 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=67d89568af22c77df6d63e6c5dd405692a846ab3
Author: Alyssa Rosenzweig 
Date:   Mon Aug 3 12:47:57 2020 -0400

pan/bi: Track compute_lod in IR

We'll need to differentiate tex and txl.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Daniel Stone 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8dd3a81c1d7fd43218a4d206259dbc1cd6fc0a17
Author: Alyssa Rosenzweig 
Date:   Fri Jul 31 18:48:27 2020 -0400

pan/bi: Add format field to IR

To make register_format packing explicit, and possibly in the future
support the auto mode.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Daniel Stone 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f5b78874ab34095dd55d6020d3d63318b7336d8
Author: Alyssa Rosenzweig 
Date:   Fri Jul 31 17:29:50 2020 -0400

pan/bi: Introduce segments into the IR

Needed to select between global, UBO, TLS, and WLS addressing modes,
required to implement loads/stores correctly.

Signed-off-by: Alyssa Rosenzweig 
Reviewed-by: Daniel Stone 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=33710ff8953c5112b88ae8f0f2ff55b021815ca6
Author: Alyssa Rosenzweig 
Date:   Fri Jul 31 16:47:05 2020 -0400

pan/bi: Add dummy carry/borrow argument for iadd/isub

On FMA, a carry/borrow is required for iaddc/isubb (whereas the ADD
counterparts don't support carrying/borrowing). The trick is to model

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d9d549ff8837b488f76981f23fa56c42164ee683
Author: Alyssa Rosenzweig 
Date:   Sat Mar 21 21:19:43 2020 -0400

pan/bi: Pack csel4 opcodes

These are pretty straightforward but there's a lot of details to keep
straight. In the IR, we keep a general logical comparator and types
separately; in the hardware, the type gets fused with a (much more)
limited number of comparators. So there's a fair bit of code here to
account for these differences, fusing in the type information, and
changing up argument order as necessary to make it actually correct.
Anything to save a bit!

Signed-off-by: Alyssa Rosenzweig 
Tested-by: Marge Bot 

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5cdc31abd63302e3da82a1bfee625019e818fc3f
Author: Alyssa Rosenzweig 
Date:   Sat Mar 21 21:19:14 2020 -0400

pan/bi: Default csel to "!= 0" mode

This way we always have regular csel conditions instead of a weird
.always special case for 3-src CSEL mode.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=46f526eb1e4a3ca2d7f04c50f61523a680c383a4
Author: Alyssa Rosenzweig 
Date:   Sat Mar 21 20:54:24 2020 -0400

pan/bi: Use bi_lookup_immediate when packing

This gets us part of the way there to packing lo/hi separately. A little
more work is needed to do this "properly", but hey.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=11bccb0564d9e24e50238fb257dd6f724ec31712
Author: Alyssa Rosenzweig 
Date:   Sat Mar 21 18:42:58 2020 -0400

pan/bi: Respect shift when printing immediates

We allow packing multiple immediates in, but we were missing this in the
print.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f786ed10b14ca054e299679af2bfbe8a2dcd5c3
Author: Alyssa Rosenzweig 
Date:   Sat Mar 21 18:13:49 2020 -0400

pan/bi: Implement csel fusing

When generating csel instructions, we can peak to see what condition is
being used. If we're using a "nice" condition, we can fuse it in with
the csel itself, ideally letting the condition itself be DCE'd away.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a02c871f2367abf7d87569819d7ae4ebb1336d4
Author: Alyssa Rosenzweig 
Date:   Sat Mar 21 18:12:31 2020 -0400

pan/bi: Add `soft` NIR->BIR condition translation

We would like to use this routine opportunistically when fusing
conditions into csels and branches, so let's add a mode where we don't
abort.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd7fec782edd3c6d2e154994c15ceee65c3c0dc9
Author: Alyssa Rosenzweig 
Date:   Sat Mar 21 17:41:34 2020 -0400

pan/bi: Remove hacks for 1-bit booleans in IR

Now that we lower them away, a bunch of special cases disappear.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=12299dead7ee589ee4a84af6058762381ef44c2c
Author: Alyssa Rosenzweig 
Date:   Sat Mar 21 17:37:47 2020 -0400

pan/bi: Lower bool to ints

Currently we lower to int32, but once mediump lands we'll be ready for
that too.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1097c69087d0a9a0ce3548550232f6475d18ac43
Author: Alyssa Rosenzweig 
Date:   Sat Mar 21 15:25:54 2020 -0400

pan/bi: Pack LD_ATTR

Also requires the usual R61/62 games.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0be1116b818edd56351d0415172015771eea1f44
Author: Alyssa Rosenzweig 
Date:   Fri Mar 20 12:39:29 2020 -0400

pan/bi: Pack st_vary

This should let varying writes go through finally.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9213b2520cdafefbb83f8f495281b0db419f85a8
Author: Alyssa Rosenzweig 
Date:   Fri Mar 20 12:38:53 

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b76b3bc09c6db2e218f903e0d1c7fb68c9e6458
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 15:17:25 2020 -0400

pan/bi: Fix swizzle for second argument to ST_VARY

Off-by-one.

Signed-off-by: Alyssa Rosenzweig 
Tested-by: Marge Bot 

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f6d96aa962d5497a3fb12b02a47ff9777e5cbfd8
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 15:15:41 2020 -0400

pan/bi: Implement nir_op_ffma

We have native FMA which works for graphics usage (unlike Midgard where
it's really reserved for compute for various reasons), let's use it.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=58f91718944a0cabdd907ed87efe7a239e69a55d
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 15:10:32 2020 -0400

pan/bi: Add dead code elimination pass

Now that we have liveness analysis, we can cleanup the IR considerably.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=56e1c606f89134e7033e25ca65a23478e13365b8
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 14:54:49 2020 -0400

pan/bi: Add liveness analysis pass

Now that all the guts are shared with Midgard, it's just a matter of
wiring it in.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0bff6e5e076e5ae7f188b07ce069647ef7eff0c6
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 14:51:57 2020 -0400

pan/bi: Add bi_max_temp helper

Instead of trying to reindex all the times, just be okay with consistent
but sparse indices, then figuring out the max index is easy enough.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e0479a6a88656205a1907c8987666f415a7c4a5
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 14:48:55 2020 -0400

pan/bi: Add bi_next/prev_op helpers

From Midgard. These are surprisingly helpful.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e623007eb786ddc5fb06133f3d7c27f9a2eb18f9
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 14:46:01 2020 -0400

pan/bi: Add bi_bytemask_of_read_components helpers

Same purpose as the Midgard version, but the implementation is
*dramatically* simpler thanks to our more regular IR.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e94754a7c47bd59526de72115576519e015f4d76
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 14:40:01 2020 -0400

pan/bi: Paste over bi_has_arg

While we're at it, cleanup the Midgard one.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b75f410c44053a4fc84715dec473dadedf7aa14
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 14:35:38 2020 -0400

panfrost: Sync Midgard/Bifrost control flow

We can move e v e n more code to be shared and let bi_block inherit from
pan_block, which will allow us to use the shared data flow analysis.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=933e44dd435f285e652d29389456dbafca121482
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 13:58:10 2020 -0400

panfrost: Move liveness analysis to root panfrost/

This way we can share the code with Bifrost.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5aaaf7b12c037b25f4c0a06af4744a8893c25e50
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 08:36:31 2020 -0400

pan/midgard: Subclass midgard_block from pan_block

Promote as much as we feasibly can while keeping it Midgard/Bifrost
agnostic.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c5dd1d542dea49a19ad3686d26a895395f7f7849
Author: Alyssa Rosenzweig 
Date:   Wed Mar 11 08:22:08 2020 -0400

pan/midgard: Sync midgard_block 

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de30a7ae6ea3d1fa90977229bc71afed595a4d5d
Author: Alyssa Rosenzweig 
Date:   Fri Mar 6 19:31:49 2020 -0500

pan/bi: Fix Android.mk

Files listed in Makefile.sources did not exist, this affects the android
build for other drivers as well.

[Patch by Tapani manually cherrypicked into this branch]

Signed-off-by: Tapani Pälli 
Signed-off-by: Alyssa Rosenzweig 
Tested-by: Marge Bot 

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b0be49005bf7d66d8f8fc8a9bb39dd5e29ab243
Author: Alyssa Rosenzweig 
Date:   Fri Mar 6 19:27:25 2020 -0500

pan/bi: Rename next-wait to simply 'wait'

next-wait is from a quirk of packing that the dependency indices are
"off by one"; we don't emulate this quirk in the IR since it's easy
enough to patch over in the disassembler. Let's not confuse anybody with
it.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b329f8c750af96f9efb968045dcf03b0fad1b34e
Author: Alyssa Rosenzweig 
Date:   Fri Mar 6 19:25:00 2020 -0500

pan/bi: Add dummy scheduler

Do the absolute simplest possible thing -- create a clause for every
instruction, and just pick whichever slot we can, nopping the other,
copying whatever constant we have whether it's used or not.

To be clear - this is not to be used in a production compiler. But this
lets actual bundles and clauses show up in the BIR, which unblocks work
on final code generation and packing (which can happen more or less in
parallel to NIR->BIR, optimization, register allocation, and writing an
actual scheduling).

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=51e537c9fa4d10bc5b065a60095bf2d85080d3c5
Author: Alyssa Rosenzweig 
Date:   Fri Mar 6 16:29:35 2020 -0500

pan/bi: Implement load_const

In the laziest possible way...  We can just emit worst case moves which
DCE will eat for breakfast anyway, and inline constants on instructions
where that is supported directly. This approach eliminates a lot of
nasty corner cases that Midgard's crazy cache scheme has hit, at the
expense of slightly more work for DCE (but it's only a single iteration
of an O(N) pass that has to run anyway..)

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ead0d3488bba096bd697048edf85470d1c5cf20
Author: Alyssa Rosenzweig 
Date:   Fri Mar 6 09:52:09 2020 -0500

pan/bi: Add preliminary LOAD_UNIFORM implementation

Lots of things are missing (indirect access, UBOs) but we have this
stubbed out for now.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=48910e83889a0736f61aca7c4b196d7c6420db9a
Author: Alyssa Rosenzweig 
Date:   Fri Mar 6 09:44:19 2020 -0500

pan/bi: Implement store_vary for vertex shaders

As far as I/O goes, these four should hold us over for a while.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d86659ca57ebe9d1752e33ed6ffe1e1b70c5f50d
Author: Alyssa Rosenzweig 
Date:   Fri Mar 6 09:43:43 2020 -0500

pan/bi: Add helpers for creating temporaries

Also from Midgard, adapted to our addressing scheme.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=59b476e11adf1ad2ddfc597a8f742fb23fd1ab80
Author: Alyssa Rosenzweig 
Date:   Fri Mar 6 09:33:52 2020 -0500

pan/bi: Implement load_input for vertex shaders

Corresponds to a single LD_ATTR instruction, easy enough.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dabb6c6b9fd473b10ae9d63b96e7ef248b1a7ed1
Author: Alyssa Rosenzweig 
Date:   Fri Mar 6 09:26:44 2020 -0500

pan/bi: Implement store_output for fragment shaders

Corresponds to a BLEND instruction, possibly preceded by an ATEST
instruction.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=79c1af062341266d7ad64a0ac221394d6cbfdfdc
Author: Alyssa Rosenzweig 
Date:   Fri 

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c4a70b64d6f916ecdf9055b52078bf4f63e7a97
Author: Alyssa Rosenzweig 
Date:   Tue Feb 11 21:50:04 2020 -0500

pan/decode: Remove extraneous newline

pandecode_log already does this.

Signed-off-by: Alyssa Rosenzweig 
Tested-by: Marge Bot 

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ab0bf1f939af480997fafd8bf562644a60df08a
Author: Alyssa Rosenzweig 
Date:   Thu Feb 13 17:14:05 2020 -0500

pan/midgard: Use fprintf instead of printf for constants

I was wondering where those constants disappeared to :-)

Signed-off-by: Alyssa Rosenzweig 
Fixes: 968f36d1fc0 ("pan/midgard: Support disassembling to a file")
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6af14d3685fac433193b92f9ad6c9f8a3eaf87ff
Author: Alyssa Rosenzweig 
Date:   Thu Feb 13 17:12:51 2020 -0500

pan/midgard: Don't crash with constants on unknown ops

Just use a dummy name instead.. we can't know a priori what type an
unknown op will consume, but we don't want to dereference a null
pointer.

Signed-off-by: Alyssa Rosenzweig 
Fixes: 24360966ab3 ("panfrost/midgard: Prettify embedded constant
prints")

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c06ecd2c64a36496f7a0a1d2811d8a90b1a0620
Author: Alyssa Rosenzweig 
Date:   Thu Feb 13 07:41:38 2020 -0500

pan/midgard: Identify stack barrier flag

In case thread local storage is used.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3747fb1ebbb1c3d6f62abaf92b100f7f52d0f6b
Author: Alyssa Rosenzweig 
Date:   Wed Feb 12 08:39:29 2020 -0500

pan/midgard: Set xyzx swizzle for load_compute_arg

Probably harmless but the w component doesn't appear valid so let's
match the blob... one less bit to be nervous about.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0ee55ad2a4e63cce88c9d68bfdf7d1c0e7e88b0
Author: Alyssa Rosenzweig 
Date:   Tue Feb 11 21:43:43 2020 -0500

pan/midgard: Infer tags entirely

We're so close, again marking off a few edge cases is enough to allow us
to omit this data entirely. Woot!

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=57a84278fda2ce556905f800409658639d642962
Author: Alyssa Rosenzweig 
Date:   Tue Feb 11 21:37:18 2020 -0500

pan/midgard: Imply next tags

As long as we can disambiguate a few edge cases, we can imply next tags
entirely which cleans up the disassembly a fair bit (though not as much
as implying tags entirely would -- we'll get there!)

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=453c64663ce938952588325ba4c960bc63297582
Author: Alyssa Rosenzweig 
Date:   Tue Feb 11 21:20:30 2020 -0500

pan/midgard: Overhaul tag handling

We unify disparate metadata about tags into a single structure to ensure
information is not left out.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9168e7a65deefae7bb8a40c583c205c408cbecab
Author: Alyssa Rosenzweig 
Date:   Tue Feb 11 15:58:18 2020 -0500

pan/midgard: Improve barrier disassembly

Just move some state from unknowns to actual keywords.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d208212f80effe4e2831fa408e976099317230b0
Author: Alyssa Rosenzweig 
Date:   Tue Feb 4 09:34:11 2020 -0500

pan/midgard: Use dummy tag for empty shaders

Fixes INSTR_INVALID_ENC in dEQP-GLES31.functional.compute.basic.empty

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b2cab6b6db4244cb95abb5bf13734360df8391ea
Author: Alyssa Rosenzweig 
Date:   Tue Feb 4 09:29:59 2020 -0500

pan/midgard: Fix 32/64 mixed swizzle packing

Occurs in SSBO address computation.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b065d8fb8cf55373bfdd80994417f1ac60976158
Author: Ian Romanick 
Date:   Wed Nov 27 16:26:03 2019 -0800

nir/algebraic: Optimize some 64-bit integer comparisons involving zero

I noticed that we can do better for these kinds of comparisons while
working on the lowering for iadd_sat@64 and isub_sat@64.  This
eliminated 11 instruction from the fs-addSaturate-int64.shader_test.

My hope is that this will improve the run-time of int64 tests on Ice
Lake.  I have no data to support or refute this.

Unsurprisingly, no changes on shader-db.

v2: Condition the min and max patterns with nir_lower_minmax64.
Suggested by Caio.  Very long discussion in the MR. :)

Reviewed-by: Caio Marcelo de Oliveira Filho 
Tested-by: Marge Bot 

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c57338b924710b93193f921cd1e95d6de6b398ef
Author: Ian Romanick 
Date:   Wed Jan 2 16:07:59 2019 -0800

anv: Enable SPV_INTEL_shader_integer_functions2 and 
VK_INTEL_shader_integer_functions2

Currently only implemented in the scalar backend, so only enable for
Gen8+.  If support for the other opcodes is added to the vec4 backend,
Gen7 could be supported.

Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76970940a6b22d25fcff42ab6c779dc646b2d9d4
Author: Ian Romanick 
Date:   Thu Nov 14 14:20:48 2019 -0800

iris: Enable INTEL_shader_integer_functions2

Reviewed-by: Caio Marcelo de Oliveira Filho 
Reviewed-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b14e718e68019019ea241d7e7a7f1bbdb8fcf21e
Author: Ian Romanick 
Date:   Thu Nov 14 14:16:26 2019 -0800

gallium: Add a cap bit for integer multiplication between 32-bit and 16-bit

Driver supports integer multiplication between a 32-bit integer and a
16-bit integer.  If the second operand is 32-bits, the upper 16-bits are
ignored, and the low 16-bits are possibly sign extended as necessary.

Iris will eventually enable this.  Not sure about other drivers.

v2: Add default value to u_screen.c.  Suggested by Caio.

Reviewed-by: Caio Marcelo de Oliveira Filho 
Reviewed-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9db20748fd1af930920424a95321ee11b6eae16e
Author: Ian Romanick 
Date:   Thu Nov 14 14:12:30 2019 -0800

gallium: Add a cap bit for OpenCL-style extended integer functions

Iris will eventually enable this.  Looking at the header files, it looks
like Midgard could also enable it.  Basically, any GPU that fully
supports OpenCL can.

v2: Add default value to u_screen.c.  Suggested by Caio.

Reviewed-by: Caio Marcelo de Oliveira Filho 
Reviewed-by: Kenneth Graunke 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e9079d0c71e42e152a00678bbe2665882849a43
Author: Ian Romanick 
Date:   Tue Sep 11 16:50:06 2018 -0700

i965: Enable INTEL_shader_integer_functions2 on Gen8+

v2: Use new lower_hadd64 and lower_usub_sat64 flags.

v3: Enable SPIR-V capability.

v4: Move lowering options to COMMON_SCALAR_OPTIONS.  Suggested by Caio.

Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4fcddb55f27e29d78c6937c20d91e7f9962ce875
Author: Ian Romanick 
Date:   Mon Sep 24 06:46:48 2018 -0700

spirv: Add support for IntegerFunctions2INTEL capability

Reviewed-by: Caio Marcelo de Oliveira Filho 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa56934e2ae75b31fbc22a5e03f95628c38f8d84
Author: Ian Romanick 
Date:   Mon Sep 24 06:44:38 2018 -0700

spirv: Silence a bunch of unused parameter warnings

The change to get_uniform_nir_atomic_op make it look like the other
get_*_nir_atomic_op functions.  The rest just add UNUSED or ASSERTED
to parameters required for some of the interfaces.

src/compiler/spirv/spirv_to_nir.c: In function 
‘struct_member_decoration_cb’:
src/compiler/spirv/spirv_to_nir.c:673:47: warning: unused parameter ‘val’ 
[-Wunused-parameter]
 struct vtn_value *val, int member,
   ^~~
src/compiler/spirv/spirv_to_nir.c: In 

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ce7c29724082431ed23ced9ec9130bb62c370d2
Author: Jason Ekstrand 
Date:   Thu Apr 18 12:08:57 2019 -0500

anv/nir: Add a central helper for figuring out SSBO address formats

Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=470422870a2cd3a235261b8628689c8e93ff3191
Author: Jason Ekstrand 
Date:   Thu Apr 18 12:08:34 2019 -0500

nir: Add helpers for getting the type of an address format

Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e230d7607f9b3e082d00859bd7725c4dc87e5cf
Author: Jason Ekstrand 
Date:   Wed Feb 27 16:08:20 2019 -0600

anv: Implement VK_EXT_descriptor_indexing

Now that everything is in place to do bindless for all resource types
except input attachments and UBOs, VK_EXT_descriptor_indexing is
"trivial".

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d6c9bd6e01b4d593f362a3b5518a71acf2e83ca1
Author: Jason Ekstrand 
Date:   Tue Oct 2 15:35:59 2018 -0500

anv: Put binding flags in descriptor set layouts

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c0d9926df7d33ab72b386444569fd0c384b115b8
Author: Jason Ekstrand 
Date:   Tue Feb 12 01:02:28 2019 -0600

anv: Use bindless handles for images

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=83af92e593ccb316f33fc6a9a7cf8ea0f8ea3486
Author: Jason Ekstrand 
Date:   Tue Feb 12 00:47:54 2019 -0600

intel/fs: Add support for bindless image load/store/atomic

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6803f6b6f06e805fe162d76aad5e25d2510232a
Author: Jason Ekstrand 
Date:   Thu Feb 7 14:10:33 2019 -0600

anv: Use bindless textures and samplers

This commit changes anv to put bindless handles and sampler pointers
into the descriptor buffer and use those instead of bindful when we run
out of binding table space.  This "spilling" of descriptors allows to to
advertise an almost unbounded number of images and samplers.

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bf61f057f72b57e977440ff66dc557d1140fede3
Author: Jason Ekstrand 
Date:   Fri Feb 8 17:04:07 2019 -0600

anv: Pass the plane into lower_tex_deref

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f16fcb9db779bd9b48a79df144358ac50428e6e8
Author: Jason Ekstrand 
Date:   Thu Feb 7 22:34:57 2019 -0600

anv: Use write_image_view to initialize immutable samplers

Instead of setting it manually, call the helper.  When setting
descriptor sets becomes more complicated than just setting some struct
values, this will keep immutable sampler handling correct.

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e612c3b9bfd5c9bfb6ece9e2b3c88f787d742d85
Author: Jason Ekstrand 
Date:   Thu Feb 7 10:16:24 2019 -0600

anv: Count the number of planes in each descriptor binding

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=843286d324c833198f4f5bd6d548ab3612968169
Author: Jason Ekstrand 
Date:   Wed Feb 6 15:42:17 2019 -0600

intel/fs: Add support for bindless texture ops

We add two new texture sources for bindless surface and sampler handles.
Bindless surface handles are expected to be pre-shifted so that the
20-bit surface state table index is in the top 20 bits of the 32-bit
handle.  This lets us avoid any extra shifts in the shader.  Bindless
sampler handles are 32-byte aligned byte offsets from general state base
address.  We use 32-byte aligned instead of 16-byte aligned to avoid
having to use more indirect messages than needed.  It means we can't
tightly pack samplers but that's probably not a big deal.

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Caio Marcelo de Oliveira Filho 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2edf29b933564d4f1aae80b91f674f1175f91625
Author: Jason Ekstrand 
Date:   Fri Feb 8 17:56:52 2019 -0600

intel,nir: Lower TXD with a bindless sampler

When we have a bindless sampler, we need an instruction header.  Even in
SIMD8, this pushes the instruction over the sampler message size maximum
of 11 registers.  Instead, we have to lower TXD 

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3e905052248a6e9c0e1ce6b7f32ad5aeff28a7c8
Author: Kristian H. Kristensen 
Date:   Fri Sep 21 12:24:47 2018 -0700

freedreno/a6xx: Build up draw dword0 outside visibilty if statement

Pulling this logic out means we can share the logic and avoid a couple
of temporary variables that helped make things clearer before. Note
that in either vismode case, we always program vismode 0.

Signed-off-by: Kristian H. Kristensen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=74a87cdaa6ff47256abc68fc5ff5662397986e80
Author: Kristian H. Kristensen 
Date:   Fri Sep 21 12:07:22 2018 -0700

freedreno/a6xx: Simplify draw_emit() branches a bit

Now that we've copied the emit logic into each branch of the
if (info->index_size) statement, we can simplify the logic a bit
according to which case we're in.

Signed-off-by: Kristian H. Kristensen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2516073cb654c8997955b0a21854649115945995
Author: Kristian H. Kristensen 
Date:   Fri Sep 21 12:02:34 2018 -0700

freedreno/a6xx: Copy OUT_RING() part into each branch of the index if

Signed-off-by: Kristian H. Kristensen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c3d58d9ffc7abbd7f60edfb8b323e2385e244a81
Author: Kristian H. Kristensen 
Date:   Fri Sep 21 11:37:36 2018 -0700

freedreno/a6xx: Split fd6_draw_emit into direct and indirect paths

This splits the two code paths into separate functions and moves the
"if (info->indirect)" test into draw_impl().

Signed-off-by: Kristian H. Kristensen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=adcd83fb22670622ed6362ca30697c9ee990af27
Author: Kristian H. Kristensen 
Date:   Thu Sep 20 21:25:27 2018 -0700

freedreno/a6xx: Inline fd6_draw()

Simplify the code a bit by inlining this helper.

Signed-off-by: Kristian H. Kristensen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb1c6b89a212852691dd4f497da2d7bf5af2f3c8
Author: Kristian H. Kristensen 
Date:   Thu Sep 20 21:19:57 2018 -0700

freedreno/a6xx: Move emit_marker and wfi to draw_impl()

This way the markers clearly bracket the draw call and isn't
duplicated for both direct and indirect draw code.

Signed-off-by: Kristian H. Kristensen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=055905055707fce4b0b9cb2c2e8992f4e71cf938
Author: Kristian H. Kristensen 
Date:   Thu Sep 20 21:09:04 2018 -0700

freedreno/a6xx: Move inline functions out of fd6_draw.h

Only used in fd6_draw.c so put them there.

Signed-off-by: Kristian H. Kristensen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a40faa864f29bbde9b12abe31a062918a90e1a5
Author: Hyunjun Ko 
Date:   Thu Sep 20 11:39:49 2018 +0900

freedreno: fix a typo in launch_grid

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aef410f31ed9a36275d4a66c1578ca48b6f8d0eb
Author: Hyunjun Ko 
Date:   Fri Sep 7 17:11:45 2018 +0900

freedreno/ir3: fix the param order of cmpxchg

According to the following definition,
int AtomicCompSwap(inout int mem, uint compare, uint data);

the preceding one in atomic_comp_swap of NIR is compare and data is
followed, while src0 for cmpxchg needs vec2(data, compare)
So for ssbo/image deref comp_swap, that should be reversed.

Fixes: dEQP-GLES31.functional.image_load_store.*.atomic.comp_swap*

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=49d22c2dfcebb794a0bc7d481ac11f8817e214b6
Author: Rob Clark 
Date:   Wed Sep 12 15:54:47 2018 -0400

freedreno/a6xx: fix shaders w/ >= 24 regs

Possibly these bits mean something else now.  Blob always seems to use
FOUR_QUADS, and changing to TWO_QUADS seems to cause different threads
to overlap registers.

Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6530fcc4a7fe6fa0d67ebc33b213e4497f634169
Author: Rob Clark 
Date:   Thu Sep 13 18:35:22 2018 -0400

freedreno/a6xx: fix gl_FragCoord.w

Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=919741b8d5357b2a061a48f7142c1e24be8656d4
Author: Rob Clark 
Date:   Tue Sep 11 16:21:29 2018 -0400

freedreno: handle invalidated buffers harder

Do a better job of skipping mem2gmem/gmem2mem..

Signed-off-by: Rob Clark 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=19e9d286464d1941f731f0d84402725f918623d6
Author: Rob Clark 
Date:   Wed Sep 26 16:29:46 2018 -0400

freedreno/a6xx: fix constlen

Fix a few bits of confusion, as with previous gen's constlen is aligned
to 4, and value in bitfield is left-shifted by 2 (ie. divided by 4).
But this is done by the CONSTLEN() accessor/builder fxn, so don't do it
twice.  Also HLSQ_FS_CNTL.CONSTLEN is not special.

Signed-off-by: Rob Clark 

URL:   

Mesa (master): 23 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a6e3f0c5daa196f39adbf842b356bfb00a8fd13
Author: Gert Wollny 
Date:   Tue Jun 5 13:59:06 2018 +0200

gallium/aux/util/u_cpu_detect.h: Fix -Wsign-compare warning in 
u_cpu_detect.c

Change the type of util_cpu_caps::nr_cpus to int because sysconfig
returns a signed value, fixes:

u_cpu_detect.c: In function 'util_cpu_detect':
u_cpu_detect.c:317:30: warning: comparison between signed and unsigned
integer expressions [-Wsign-compare]
if (util_cpu_caps.nr_cpus == -1)

Signed-off-by: Gert Wollny 
Reviewed-by: Emil Velikov 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=33f4e8a04396e3b2b3a8fd79e79fc6f268ee9653
Author: Gert Wollny 
Date:   Tue Jun 5 13:59:05 2018 +0200

gallium/aux/util/u_debug.h: Fix "noreturn" warnings in debug mode

Only decorate function as noreturn when DEBUG is not defined, because
when compiled in DEBUG mode the function actually executes an int3 and
may return, fixes:
u_debug.c: In function '_debug_assert_fail':
u_debug.c:309:1: warning: 'noreturn' function does return

Signed-off-by: Gert Wollny 
Reviewed-by: Emil Velikov 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=70f632962ac6d42f39ae762065caa049fc6352fd
Author: Gert Wollny 
Date:   Tue Jun 5 13:59:04 2018 +0200

gallium/aux/util: Fix some warnings

util/u_cpu_detect.c: In function 'util_cpu_detect':
util/u_cpu_detect.c:377:30: warning: comparison between signed and
unsigned integer expressions [-Wsign-compare]
if (util_cpu_caps.nr_cpus == ~0u)
  ^~

util/u_hash_table.c:274:21: warning: unused parameter 'k' [-Wunused-
parameter]
 util_hash_inc(void *k, void *v, void *d)
 ^
util/u_hash_table.c:274:30: warning: unused parameter 'v' [-Wunused-
parameter]
 util_hash_inc(void *k, void *v, void *d)
  ^

util/u_tests.c: In function 'test_texture_barrier':
util/u_tests.c:652:25: warning: comparison between signed and unsigned
integer expressions [-Wsign-compare]
   for (int i = 0; i < num_samples / 2; i++) {
 ^

Signed-off-by: Gert Wollny 
Reviewed-by: Emil Velikov 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3e091d5a7ad03897fab01be0f3af8a8c1b98a0e2
Author: Gert Wollny 
Date:   Tue Jun 5 13:59:03 2018 +0200

gallium/aux/tgsi_ureg.c: remove unused parameter from 
match_or_expand_immediate64

remove "type" from "match_or_expand_immediate64", fixes:

tgsi/tgsi_ureg.c: In function 'match_or_expand_immediate64':
tgsi/tgsi_ureg.c:837:34: warning: unused parameter 'type' [-Wunused-
parameter]
  int type,
  ^~~~

Signed-off-by: Gert Wollny 
Reviewed-by: Emil Velikov 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f79b9804862e61a93a60498d7360d991b332cb2c
Author: Gert Wollny 
Date:   Tue Jun 5 13:59:02 2018 +0200

gallium/aux/tgsi_two_side.c: Fix -Wsign-compare warnings

Integer propagation rules can sometimes be irritating. With
"unsigned x" "x + 1" gets propagated to a signed integer, so explicitely
assign the sum to an unsigned and use that for comaprison.

In file included from tgsi/tgsi_two_side.c:41:0:
tgsi/tgsi_two_side.c: In function 'xform_decl':
./util/u_math.h:660:29: warning: comparison between signed and unsigned
integer expressions [-Wsign-compare]
 #define MAX2( A, B )   ( (A)>(B) ? (A) : (B) )
 ^
tgsi/tgsi_two_side.c:86:24: note: in expansion of macro 'MAX2'
   ts->num_inputs = MAX2(ts->num_inputs, decl->Range.Last + 1);
^~~~
./util/u_math.h:660:40: warning: signed and unsigned type in conditional
expression [-Wsign-compare]
 #define MAX2( A, B )   ( (A)>(B) ? (A) : (B) )
^
tgsi/tgsi_two_side.c:86:24: note: in expansion of macro 'MAX2'
   ts->num_inputs = MAX2(ts->num_inputs, decl->Range.Last + 1);
^~~~
./util/u_math.h:660:29: warning: comparison between signed and unsigned
integer expressions [-Wsign-compare]
 #define MAX2( A, B )   ( (A)>(B) ? (A) : (B) )
 ^
tgsi/tgsi_two_side.c:89:23: note: in expansion of macro 'MAX2'
   ts->num_temps = MAX2(ts->num_temps, decl->Range.Last + 1);
   ^~~~
./util/u_math.h:660:40: warning: signed and unsigned type in conditional
expression [-Wsign-compare]
 #define MAX2( A, B )   ( (A)>(B) ? (A) : (B) )
^
tgsi/tgsi_two_side.c:89:23: note: in expansion of macro 'MAX2'
   ts->num_temps = MAX2(ts->num_temps, decl->Range.Last + 1);
 

Mesa (master): 23 new commits

[Jason Ekstrand]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f20cf166ed434092242dba05a09f682df3028d8
Author: Jason Ekstrand 
Date:   Fri Jan 19 15:14:37 2018 -0800

intel/blorp: Use isl_aux_op instead of blorp_hiz_op

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e941a05283b6873d2501f17944e545f6c76166f
Author: Jason Ekstrand 
Date:   Fri Jan 19 15:02:07 2018 -0800

intel/blorp: Use isl_aux_op instead of blorp_fast_clear_op

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1810f965c8e490eac164732883d5242748b5911f
Author: Jason Ekstrand 
Date:   Fri Jan 19 12:07:12 2018 -0800

anv: Allow fast-clearing the first slice of a multi-slice image

Now that we're tracking aux properly per-slice, we can enable this for
applications which actually care.

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de3be6180169f95b781308398b31fbdd3db319e1
Author: Jason Ekstrand 
Date:   Tue Nov 21 08:46:25 2017 -0800

anv/cmd_buffer: Rework aux tracking

This commit completely reworks aux tracking.  This includes a number of
somewhat distinct changes:

 1) Since we are no longer fast-clearing multiple slices, we only need
to track one fast clear color and one fast clear type.

 2) We store two bits for fast clear instead of one to let us
distinguish between zero and non-zero fast clear colors.  This is
needed so that we can do full resolves when transitioning to
PRESENT_SRC_KHR with gen9 CCS images where we allow zero clear
values in all sorts of places we wouldn't normally.

 3) We now track compression state as a boolean separate from fast clear
type and this is tracked on a per-slice granularity.

The previous scheme had some issues when it came to individual slices of
a multi-LOD images.  In particular, we only tracked "needs resolve"
per-LOD but you could do a vkCmdPipelineBarrier that would only resolve
a portion of the image and would set "needs resolve" to false anyway.
Also, any transition from an undefined layout would reset the clear
color for the entire LOD regardless of whether or not there was some
clear color on some other slice.

As far as full/partial resolves go, he assumptions of the previous
scheme held because the one case where we do need a full resolve when
CCS_E is enabled is for window-system images.  Since we only ever
allowed X-tiled window-system images, CCS was entirely disabled on gen9+
and we never got CCS_E.  With the advent of Y-tiled window-system
buffers, we now need to properly support doing a full resolve of images
marked CCS_E.

v2 (Jason Ekstrand):
 - Fix an bug in the compressed flag offset calculation
 - Treat 3D images as multi-slice for the purposes of resolve tracking

v3 (Jason Ekstrand):
 - Set the compressed flag whenever we fast-clear
 - Simplify the resolve predicate computation logic

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2cbfcb205ef777cb6e17ebca3ff658f9f2cb915f
Author: Jason Ekstrand 
Date:   Thu Jan 18 16:08:31 2018 -0800

anv/cmd_buffer: Move the mi_alu helper higher up

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e69045c4d37f5ddd56b284b225a7f11a374381c
Author: Jason Ekstrand 
Date:   Thu Jan 18 09:17:17 2018 -0800

anv/image: Simplify some verbose commennts

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0523f70ef4e3788a4510581c641dcea51640417
Author: Jason Ekstrand 
Date:   Mon Nov 27 18:09:48 2017 -0800

anv: Use blorp_ccs_ambiguate instead of fast-clears

Even though the blorp pass looks a bit on the sketchy side, the end
result in the Vulkan driver is very nice.  Instead of having this weird
case where you do a fast clear and then maybe have to resolve, we just
do the ambiguate and are done with it.  The ambiguate does exactly what
we want of setting all the CCS values to 0 which puts it into the
pass-through state.

This should also 

Mesa (master): 23 new commits

[Emil Velikov]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f9a0cb5f55b432f58c9adbb9b1c63c748d1dfd0
Author: Emil Velikov 
Date:   Tue Feb 28 13:29:06 2017 +

glcpp/tests/glcpp-test-cr-lf: error out if we cannot find any tests

Signed-off-by: Emil Velikov 
Acked-by: Kenneth Graunke 
Reviewed-by: Eric Engestrom 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8096b75aa15fdda8433c2c8614ca0bf5de2c150
Author: Emil Velikov 
Date:   Tue Feb 28 13:24:55 2017 +

glcpp/tests/glcpp-test-cr-lf: correctly set/use srcdir/abs_builddir

Otherwise manual invokation of the script from elsewhere than
`dirname $0` will fail.

With these all the artefacts should be created in the correct location,
and thus we can remove the old (and slighly strange) clean-local line.

Signed-off-by: Emil Velikov 
Acked-by: Kenneth Graunke 
Reviewed-by: Eric Engestrom 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cf77cdce839a06097b5f995118261eb98285ffc7
Author: Emil Velikov 
Date:   Tue Feb 28 12:13:58 2017 +

glcpp/tests: update testname in help string

Rather than hardcoding glcpp/other use `basename "$0"` which expands
appropriatelly.

Signed-off-by: Emil Velikov 
Acked-by: Kenneth Graunke 
Reviewed-by: Eric Engestrom 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ea4fbf93a5a2229af3d48dc7fb23a43c90adb7f
Author: Emil Velikov 
Date:   Tue Feb 28 12:10:41 2017 +

glcpp/tests/glcpp-test: error out if we cannot find any tests

Signed-off-by: Emil Velikov 
Acked-by: Kenneth Graunke 
Reviewed-by: Eric Engestrom 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=182d48ceb9e58eb53b52436b2cd6010de072d29b
Author: Emil Velikov 
Date:   Tue Feb 28 12:08:52 2017 +

glcpp/tests/glcpp-test: print only the test basename

Signed-off-by: Emil Velikov 
Acked-by: Kenneth Graunke 
Reviewed-by: Eric Engestrom 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=addf62946d6c73885dd261099cddc06d3c910f17
Author: Emil Velikov 
Date:   Tue Feb 28 12:02:35 2017 +

glcpp/tests/glcpp-test: set srcdir/abs_builddir variables

Current definitions work fine for the manual invokation of the script,
although the whole script does not consider that one can run it OOT.

The latter will be handled with latter patches, although it will be
extensively using the two variables.

Signed-off-by: Emil Velikov 
Acked-by: Kenneth Graunke 
Reviewed-by: Eric Engestrom 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ee8aea35725e4b582ed8af2866d0feffa2d13c6e
Author: Emil Velikov 
Date:   Mon Feb 27 18:58:06 2017 +

glsl/tests/optimization-test: 'echo' only folders which has generators

The current "let's print any folder which exists" is simply confusing.

Signed-off-by: Emil Velikov 
Acked-by: Kenneth Graunke 
Reviewed-by: Eric Engestrom 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=79a95f19e64a1d2f855e3f8194b86dc0b2a78c3f
Author: Emil Velikov 
Date:   Mon Feb 27 18:56:38 2017 +

glsl/tests/optimization-test: print only the test basedir/name

The relative/absolute path brings little to no benefit in being printed
as testname. Trim it out.

Signed-off-by: Emil Velikov 
Acked-by: Kenneth Graunke 
Reviewed-by: Eric Engestrom 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=33cd136fa267a44931b8f0230c5d68259ebec2d5
Author: Emil Velikov 
Date:   Sun Feb 26 20:43:05 2017 +

glsl/tests/optimization-test: error if zero tests were executed

We don't want to lie ourselves that 'everything is fine' when no tests
were found/ran.

Signed-off-by: Emil Velikov 
Acked-by: Kenneth Graunke 
Reviewed-by: Eric Engestrom 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=421115a72939b7dbcdc9f714d85f3e7616323a3e
Author: Emil Velikov 
Date:   Sun Feb 

Mesa (master): 23 new commits

[Matt Turner]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7499bc7fd79bdcc3f0c46425dec18495dbcbdfe6
Author: Matt Turner 
Date:   Thu Mar 9 11:40:17 2017 -0800

i965: Replace OPT_V() with OPT().

We want to be able to check the progress of each pass and dump the NIR
for debugging purposes if it changed.

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1be91bd9d8e44986aacd91755f357cbf84d6599a
Author: Matt Turner 
Date:   Thu Mar 9 11:13:52 2017 -0800

i965/fs: Return progress from demote_sample_qualifiers().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd3351246ca6243a45df6d3790cff14ab9a9b529
Author: Matt Turner 
Date:   Thu Mar 9 11:05:08 2017 -0800

i965/fs: Return progress from move_interpolation_to_top().

And mark as static at the same time.

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0f8daeb86df73cdd76e7ae4b06203d84367d6e0
Author: Matt Turner 
Date:   Thu Mar 9 11:01:53 2017 -0800

i965: Return progress from brw_nir_lower_uniforms().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ef71af7356ae5d19a90b3bb5e83f14341173b8f3
Author: Matt Turner 
Date:   Thu Mar 9 11:49:57 2017 -0800

nir: Return progress from nir_convert_from_ssa().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=abc8a702d0f01852f85705a87c9d624300c1efec
Author: Matt Turner 
Date:   Thu Mar 9 11:01:22 2017 -0800

nir: Return progress from nir_lower_io().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a934b002221eb9ad8c15cfe5ab2ff39e7432c2c6
Author: Matt Turner 
Date:   Thu Mar 9 10:56:20 2017 -0800

nir: Return progress from nir_lower_regs_to_ssa().

And from nir_lower_regs_to_ssa_impl() as well.

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0e72defc2a0687cec8bf731c6b897ff293a26da
Author: Matt Turner 
Date:   Thu Mar 2 11:28:14 2017 -0800

nir: Return progress from nir_lower_samplers().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=01548f9f01644623ff7eb9778fc78f2eb90fc99a
Author: Matt Turner 
Date:   Thu Mar 2 11:24:19 2017 -0800

nir: Return progress from nir_lower_atomics().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0bd615d961d117f8ae0354df813cc98ea0df4755
Author: Matt Turner 
Date:   Thu Mar 2 11:18:04 2017 -0800

nir: Return progress from nir_lower_clamp_color_outputs().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9dbf91f5c03fdfb77496fa67db48662a3829296a
Author: Matt Turner 
Date:   Thu Mar 2 11:15:53 2017 -0800

nir: Return progress from nir_lower_clip_fs().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e4927cd9552b6fa40ef526029215a3d57dd6df9
Author: Matt Turner 
Date:   Thu Mar 2 11:14:36 2017 -0800

nir: Return progress from nir_lower_clip_vs().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6077cc75aa6d8460c6c79380800e9a4fd1072a5f
Author: Matt Turner 
Date:   Mon Feb 27 16:28:43 2017 -0800

nir: Return progress from nir_move_vec_src_uses_to_dest().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a539e05d00d94d8ea1d73327e9adf4d2606534d5
Author: Matt Turner 
Date:   Fri Feb 24 15:45:09 2017 -0800

nir: Return progress from nir_lower_to_source_mods().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a7e4ae23d686566aee38290bc87f9ceee927d5b
Author: Matt Turner 
Date:   Fri Feb 24 15:38:28 2017 -0800

nir: Return progress from nir_lower_clip_cull_distance_arrays().

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=19345fc160e1cd6d8176068f9919b1f0e7f5164c
Author: Matt Turner 
Date:   Fri Feb 24 15:34:40 2017 -0800

nir: Return progress from nir_lower_var_copies().

Reviewed-by: Jason Ekstrand 

URL:

Mesa (master): 23 new commits

[Marek Olšák]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8f3b00742eab6ee1868407b876f69195a51f3b6
Author: Marek Olšák 
Date:   Sat Feb 11 21:21:10 2017 +0100

gallium/radeon: include SDMA in the GPU load query

Reviewed-by: Samuel Pitoiset 
Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=579ffe81f1365d5cbe785283b2a7f96ccaabafcc
Author: Marek Olšák 
Date:   Sat Feb 11 20:46:02 2017 +0100

gallium/hud: add monitoring of API thread busy status

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=626e4ef18f1ffc521ab3e6faef3173abedd52dbf
Author: Marek Olšák 
Date:   Sat Feb 11 20:51:41 2017 +0100

gallium/u_queue: add util_queue_get_thread_time_nano

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6c61a8bfc6cb30e30b806a30f30c0e9b01b0d673
Author: Marek Olšák 
Date:   Sat Feb 11 20:48:13 2017 +0100

gallium/os: add per-thread time clock queries

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d19b503af41b8ad3d0ca9e2a279dca7106403be
Author: Marek Olšák 
Date:   Fri Feb 10 01:12:22 2017 +0100

st/mesa: tell u_vbuf that GL core doesn't have user VBOs

I think this only affects radeonsi - VI, because all other drivers using
u_vbuf probably don't support GL_DOUBLE, so they won't be affected by this.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0f95ddd3e1217e5710cdd12e733b6440592cc7d
Author: Marek Olšák 
Date:   Fri Feb 10 01:09:27 2017 +0100

gallium: let state trackers tell u_vbuf whether user VBOs are possible

This can affect whether u_vbuf will be enabled or not.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0561b3c75af2e4bb216b686bf62ae9d89c584dc8
Author: Marek Olšák 
Date:   Sun Feb 12 15:48:48 2017 +0100

vdpau: skip vlVdpOutputSurfacePutBitsNative with a zero-area rectangle

This prevents errors:
"EE r600_texture.c:1571 r600_texture_transfer_map - failed to create
 temporary texture to hold untiled copy"

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99542

Tested-by: Kai Wasserbäch 
Reviewed-by: Kai Wasserbäch 
Reviewed-by: Christian König 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c196efcf034279a9d55dce3a7f02807ac803f5f4
Author: Marek Olšák 
Date:   Sun Feb 12 15:48:31 2017 +0100

gallium/radeon: add an assertion to texture_transfer_map for app bugs

Tested-by: Kai Wasserbäch 
Reviewed-by: Kai Wasserbäch 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4c36553a46b14f5485140bbb51d3aa35d2b79e14
Author: Marek Olšák 
Date:   Fri Feb 10 01:16:34 2017 +0100

radeonsi: implement legacy GL_DOUBLE vertex formats

so that we can disable u_vbuf for GL core profiles.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2c8ee2e825dd748ff6affd2b465d83b40f76f45a
Author: Marek Olšák 
Date:   Sat Feb 11 17:21:04 2017 +0100

radeonsi: clean up si_get_param

has_streamout is always true

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4fe1fd4df40ac91b2783e3604fd81e6a6faf0cd2
Author: Marek Olšák 
Date:   Sat Feb 11 23:43:20 2017 +0100

gallium/hud: don't use user vertex buffers

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=00d170a5c3b6d373124bb241dbb5c67cabb2597b
Author: Marek Olšák 
Date:   Sat Feb 11 23:20:37 2017 +0100

gallium/hud: call u_upload_alloc only once

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5699c8a2f704ff03b03efdcd15d1644595a288b8
Author: Marek Olšák 
Date:   Wed Feb 8 20:36:26 2017 +0100

gallium/u_upload_mgr: remove deprecated function u_upload_buffer

Reviewed-by: Nicolai Hähnle 
Tested-by: Charmaine Lee 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ca3548eb926e0c89a3ef72bb07dedf85d3c250a
Author: Marek Olšák 
Date:   Fri Jan 27 01:42:41 2017 +0100

gallium/radeon: remove 

Mesa (master): 23 new commits

[Timothy Arceri]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=076ab157ff2ed7a98b09363bce355247f4ed71e6
Author: Timothy Arceri 
Date:   Wed Nov 9 09:49:59 2016 +1100

st/mesa/glsl: move SamplerTargets to gl_program

This will help allow us to simplify the handling of samplers by
storing them in a single location rather than duplicating them in
both gl_linked_shader and gl_program.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=937523971f42f37b40badb962e575ecd8258b2d5
Author: Timothy Arceri 
Date:   Wed Nov 9 10:00:09 2016 +1100

st/mesa/glsl: set SamplersUsed directly in gl_program

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=53a509723ff10ae1494e611de3823f17b7e9f225
Author: Timothy Arceri 
Date:   Fri Nov 4 17:05:22 2016 +1100

mesa/glsl: set sampler units directly in gl_program

Now that we create gl_program earlier there is no need to mess about
copying things to gl_linked_shader then to gl_program.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cc61cf706e857e27ea3ce9578b9c480bfbc94a1
Author: Timothy Arceri 
Date:   Fri Nov 4 16:41:30 2016 +1100

mesa: simplify sampler setting code

There is no need to loop over active samplers the code above this
would have already exited if the sampler was inactive, or errored
if the count was larger than the uniforms array size.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4807a83da0e0f5e3272e85504ee3b2213ef1910a
Author: Timothy Arceri 
Date:   Fri Nov 4 11:40:10 2016 +1100

mesa/glsl: set num_textures per stage directly in shader_info

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c46a63a2539e38a448f24a456397ce201a2e
Author: Timothy Arceri 
Date:   Fri Nov 4 09:25:36 2016 +1100

mesa: make _CurrentFragmentProgram a gl_program struct pointer

Making this point to a gl_program struct rather than a gl_shader_program
struct will allow use to later also make the CurrentProgram array hold
gl_program structs which in turn will allow for code simpilifcation.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e3f6097c995a74d4ce52f542413b01ff819c203
Author: Timothy Arceri 
Date:   Fri Nov 4 16:04:01 2016 +1100

i965: stop passing gl_shader_program to the precompile and codegen functions

We no longer need it.

While we are at it we mark the vs, gs, and wm codegen functions as static.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ceedefd6c32fa31e6a35831a8a7a315e009ccc3
Author: Timothy Arceri 
Date:   Wed Nov 9 23:50:07 2016 +1100

mesa/glsl: remove hack to reset sampler units to zero

Now that we have the is_arb_asm flag we can just skip the
initialisation.

V2: remove hack from standalone compiler where it was never
needed since it only compiles glsl shaders.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=238486884e74888d32d64ea9d934ba6b07e79eb2
Author: Timothy Arceri 
Date:   Wed Nov 9 23:44:39 2016 +1100

i965: make use of new is_arb_asm flag

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f584f3821426955b94f36c77191edcfe1b1cc7d5
Author: Timothy Arceri 
Date:   Wed Nov 9 23:38:46 2016 +1100

st/mesa/glsl: add new is_arb_asm flag in gl_program

Set the flag via the _mesa_init_gl_program() and NewProgram()
helpers.

In i965 we currently check for the existance of gl_shader_program
to decide if this is an ARB assembly style program or not.

Adding a flag makes the code clearer and will help removes a
dependency on gl_shader_program in the i965 codegen functions.

Also this will allow use to skip initialising sampler units for
linked shaders, we currently memset it to zero again during linking.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2784128398e405405f0263d318ebe4121d1baf4c
Author: Timothy Arceri 
Date:   Tue Nov 8 12:07:12 2016 +1100

i965: pass gl_program directly to brw_compile_tes()

This is the only thing we use from gl_shader_program so pass it directly.

Reviewed-by: Lionel Landwerlin 

Mesa (master): 23 new commits

[Bas Nieuwenhuizen]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6229994ab75cab2565c3df7b47b8fb32e4b31d45
Author: Dave Airlie 
Date:   Wed Nov 30 04:08:10 2016 +

radv: expose the compute queue

v2: Don't expose the SDMA queue and use the CIK check also in the
second if. (Bas)

Reviewed-by: Bas Nieuwenhuizen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=442735d35d6f2bbb7ef1e4c003025ddf02528e36
Author: Bas Nieuwenhuizen 
Date:   Sun Dec 18 14:05:19 2016 +0100

radv: Only emit PFP ME syncs for DMA on the GFX queue.

Signed-off-by: Bas Nieuwenhuizen 
Reviewed-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2523ebf52a4ed1e9a90ce527398d13ee493cb22
Author: Bas Nieuwenhuizen 
Date:   Sat Dec 17 21:53:38 2016 +0100

radv: Create an empty CS per ring type.

Signed-off-by: Bas Nieuwenhuizen 
Reviewed-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=accc5fc026ec45171c458334bdee16747fbe7824
Author: Bas Nieuwenhuizen 
Date:   Sat Dec 17 21:25:32 2016 +0100

radv: Don't enable CMASK on compute queues.

We can't fast clear on compute queues.

Signed-off-by: Bas Nieuwenhuizen 
Reviewed-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfee9866ea87fb0a81b3165f968ac45a4f5a25c3
Author: Bas Nieuwenhuizen 
Date:   Sat Dec 17 13:27:37 2016 +0100

radv: Use RELEASE_MEM packet for MEC timestamp query.

Signed-off-by: Bas Nieuwenhuizen 
Reviewed-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b0efc98ba00467681a72107f1f2eb9025536540
Author: Bas Nieuwenhuizen 
Date:   Mon Dec 12 08:45:21 2016 +0100

radv: Implement indirect dispatch for the MEC.

Signed-off-by: Bas Nieuwenhuizen 
Reviewed-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3a559029e2d1a285afdc761453acd6ab35d8d1ca
Author: Bas Nieuwenhuizen 
Date:   Mon Dec 12 08:42:44 2016 +0100

radv: update vkCmdUpdateBuffer for the MEC.

Signed-off-by: Bas Nieuwenhuizen 
Reviewed-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b3499557a2b83269602c021c5c250e448c2aae93
Author: Bas Nieuwenhuizen 
Date:   Mon Dec 12 08:38:00 2016 +0100

radv: Implement cache flushing for the MEC.

Signed-off-by: Bas Nieuwenhuizen 
Reviewed-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=72aaa83f4b5ba193cd4570da610893cd7b054332
Author: Dave Airlie 
Date:   Thu Dec 1 01:52:31 2016 +

radv: add semaphore support

Reviewed-by: Bas Nieuwenhuizen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d270b5fac3c97f9a19ad27393aca7daccfd0bced
Author: Dave Airlie 
Date:   Thu Dec 1 01:14:49 2016 +

radv: pass queue index into winsys submission

This is so we can submit on separate queues if needed

Reviewed-by: Bas Nieuwenhuizen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0e6fb057444df3b165ea02fe5b063a7b24f2010
Author: Dave Airlie 
Date:   Thu Dec 1 00:15:23 2016 +

radv: init compute queue and avoid initing transfer queues

Reviewed-by: Bas Nieuwenhuizen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=71dabe1c16f5a6ae5784c1de46cf965fb3d8b753
Author: Bas Nieuwenhuizen 
Date:   Sat Dec 17 19:10:35 2016 +0100

radv/winsys: Make WaitIdle queue aware.

Signed-off-by: Bas Nieuwenhuizen 
Reviewed-by: Dave Airlie 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d028bd7b55c39fa714a48998bbcbb04ec86afe48
Author: Dave Airlie 
Date:   Wed Nov 30 03:10:28 2016 +

radv/meta: update header info

Reviewed-by: Bas Nieuwenhuizen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4bd666a319c48006f25b85793179bedfc8d1948d
Author: Dave Airlie 
Date:   Wed Nov 30 03:09:01 2016 +

radv: hook compute clears into clear image api.

These aren't used yet but we will want to use them when we
implement a separate compute queue.

Signed-off-by: Dave Airlie 
Reviewed-by: Bas Nieuwenhuizen 

URL:

Mesa (master): 23 new commits

[Jason Ekstrand]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6c4d46a580df5e1c9c21adae70fc0879190d53a
Author: Jason Ekstrand 
Date:   Mon May 16 11:02:57 2016 -0700

anv/formats: Add support for VK_FORMAT_B4G4R4A4_UNORM pre-gen8

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=45c93384e519aefba1d28388955b2638f4d26ea3
Author: Jason Ekstrand 
Date:   Mon May 16 10:25:54 2016 -0700

anv: Add a devinfo argument to the get_format functions

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=100db3d31c1fd9284fc96132dccde1fa289a88c3
Author: Jason Ekstrand 
Date:   Sun May 15 21:50:47 2016 -0700

anv/formats: Set the swizzle to RGB1 when using an RGBA format to fake RGB

This way we get correct sampling from RGB formats that are faked as RGBA.
This should also cause it to disable rendering and blending on those
formats.  We should be able to render to them and, on Broadwell and above,
we can blend on them with work-arounds.  However, we'll add support for
that more properly later when it's deemed useful.  For now, disabling
rendering and blending should be safe.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ce375fba413a803f264335c7dd6e72b0003021f9
Author: Jason Ekstrand 
Date:   Sun May 15 21:46:05 2016 -0700

anv/formats: Refactor anv_get_format

The new code removes the switch statement and instead handles depth/stencil
as up-front special cases.  This allows for potentially more complicated
color format handling in the future.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=34198d798c003d45fd52ce88e56dbfac450afd91
Author: Jason Ekstrand 
Date:   Sun May 15 21:41:55 2016 -0700

anv: Use 16 bits for the isl_format in anv_format

This way the entire anv_format structure fits in 32 bits

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cae59012d98959a997ef96c217adba0dc8b3ed7
Author: Jason Ekstrand 
Date:   Sun May 15 21:31:38 2016 -0700

anv/formats: Use the isl_channel_select enum for the swizzle

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ed429a4f0d58eafe3e3212552af6fb0cb78feeb
Author: Jason Ekstrand 
Date:   Sun May 15 21:15:59 2016 -0700

anv/formats: Add an anv_get_format helper

This commit removes anv_format_for_vk_format and adds an anv_get_format
helper.  The anv_get_format helper returns the anv_format by-value.  Unlike
anv_format_for_vk_format the format returned by anv_get_format is 100%
accurate and includes any tweaks needed for tiled vs. linear.
anv_get_isl_format is now just a wrapper around anv_get_format that picks
off just the isl_format.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=13f5cee663f693bc2cafeda9c3d6fc3537334dde
Author: Jason Ekstrand 
Date:   Fri May 13 17:24:39 2016 -0700

anv/format: Simplify anv_format

Now that we have VkFormat introspection and we've removed everything that
tried to use anv_format for introspection, we no longer need most of what
was in anv_format.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1c004e5b2b3fc64b1d2525b6148389d2148f8f4
Author: Jason Ekstrand 
Date:   Fri May 13 17:08:16 2016 -0700

anv/formats: Delete validate_GetPhysicalDeviceFormatProperties

All it ever did was some extra logging that was useful when initially
bringing up Dota2.  We don't need it anymore.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aad56f3ee782d3c2682172e5b068119fd2fa7c32
Author: Jason Ekstrand 
Date:   Fri May 13 17:00:58 2016 -0700

anv/image: Use aspects for computing full usage

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fbc23d93e08165e74ad40915bd3ead68b454d4d3
Author: Jason Ekstrand 
Date:   Fri May 13 16:52:15 2016 -0700

anv: Remove the anv_format member from anv_image

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=be94a23b4402e1562eebc6aa6c485be2a2506a79
Author: Jason Ekstrand 
Date:   Fri May 13 16:55:08 2016 -0700

anv/wsi: Use vk_format_info for asserts rather than anv_format

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=63dbb2c60aae593717159e53003cf8adac207aad
Author: Jason Ekstrand 
Date:   Fri May 13 16:54:00 2016 -0700

anv/copy: Use the linear format from the image for the buffer block size

Because the buffer is exposed to the user, the block size is defined to
always exactly be the size of the actual vulkan format.  This is the same
size (it had better be) as the linaer image format.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c87429c5f1d31d8a95e1173c432775001f8b38a0
Author: Jason Ekstrand 

Mesa (master): 23 new commits

[Nicolai Hähnle]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b74784638df4c6b1d25aa04044946e380ee61c28
Author: Nicolai Hähnle 
Date:   Tue Mar 15 13:08:21 2016 -0500

docs: mark GL_ARB_shader_image_load_store/_size as done for radeonsi

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5219eb15e12903a10c0aea22a7460bb6867a958e
Author: Edward O'Callaghan 
Date:   Mon Jan 11 00:50:32 2016 +1100

radeonsi: Set PIPE_SHADER_CAP_MAX_SHADER_IMAGES

This enables ARB_shader_image_load_store and ARB_shader_image_size.

Signed-off-by: Edward O'Callaghan 
[allow the same number of images for all shader stages and require LLVM 3.9]

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f942ac5eedec5b5517618c52434d7c0794163c2
Author: Nicolai Hähnle 
Date:   Tue Mar 15 20:58:12 2016 -0500

radeonsi: disable early Z if the fragment shader writes to memory

Empirically, both the EXEC_ON_* flags and LATE_Z are necessary.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=79762e877cd9b439d5f7697d3fea8d930ab05646
Author: Nicolai Hähnle 
Date:   Tue Mar 15 20:54:30 2016 -0500

tgsi/scan: add writes_memory to flag presence of stores or atomics

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9d935ed0e2839d2f07220a9f10477ab3cc79486
Author: Nicolai Hähnle 
Date:   Sun Mar 13 14:44:46 2016 -0500

radeonsi: force the DCC enable bit off in image descriptors for writing (v2)

This avoids a lockup at least on Tonga.

v2: only force DCC off on VI+ (Marek)

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=43f5ce1d20dac94d83d6d6c31b88b4227316877d
Author: Nicolai Hähnle 
Date:   Sun Mar 13 11:37:27 2016 -0500

radeonsi: implement MemoryBarrier (v2)

v2: invalidate both constant and VMEM/TC L1 for constant buffers (Marek)

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=97352aa50af87b50271bc632abfb971caca46e2b
Author: Nicolai Hähnle 
Date:   Mon Mar 14 10:22:21 2016 -0500

radeonsi: implement volatile memory access

Prevent loads from being re-ordered or coalesced.

Atomics don't need special handling by definition, and stores don't need
special handling because LLVM is unable to detect dead image or buffer
stores.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a61b428f477e7eef9f18f2fd43f661f193ece39
Author: Nicolai Hähnle 
Date:   Sat Mar 12 21:32:34 2016 -0500

radeonsi: implement coherent memory access (v2)

v2: set glc=1 for volatile also on buffers

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d6fa650454db5e3308a5c3618e4586a2c8f537cb
Author: Nicolai Hähnle 
Date:   Thu Mar 10 18:12:44 2016 -0500

radeonsi: Lower TGSI_OPCODE_MEMBAR down to LLVM op

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7a85a8a0aae692303601c5359ba8e76d78e1c28
Author: Nicolai Hähnle 
Date:   Thu Feb 11 20:54:25 2016 -0500

radeonsi: Lower TGSI_OPCODE_ATOM* down to LLVM op

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfcefcb3c77ad734d3deee888b6881b4c20f28a3
Author: Nicolai Hähnle 
Date:   Tue Feb 9 11:51:31 2016 -0500

radeonsi: Lower TGSI_OPCODE_STORE down to LLVM op

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e82dedeca9670012a24b3d5da0832ca2c5c0861
Author: Nicolai Hähnle 
Date:   Tue Feb 9 10:59:14 2016 -0500

radeonsi: Lower TGSI_OPCODE_LOAD down to LLVM op (v3)

v2: new signature style for buffer intrinsics (offsets)
v3: new signature style for llvm.amdgcn.buffer.load.format (overloaded 
return)

Reviewed-by: Marek Olšák  (v2)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=136686a51dd5f92c3905253d7abf7ad40f717016
Author: Nicolai Hähnle 
Date:   Tue Feb 9 15:01:35 2016 -0500

radeonsi: extract the LLVM type name construction into its own function

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=02bd0cd7b108dd903ae40af1f70a36f7553bfa7e

Mesa (master): 23 new commits

[Marek Olšák]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=329181ae3329dc7d6f0aac62a86c4209444d5725
Author: Marek Olšák 
Date:   Fri Feb 5 22:49:12 2016 +0100

radeonsi: enable denorms for 64-bit and 16-bit floats

This fixes FP16 conversion instructions for VI, which has 16-bit floats,
but not SI & CI, which can't disable denorms for those instructions.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=17fe3fa312d26db58b1c441519a92cd029e03727
Author: Marek Olšák 
Date:   Sat Feb 6 17:13:07 2016 +0100

gallium: pass the robust buffer access context flag to drivers

radeonsi will not do bounds checking for loads if this is not set.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d611fce23dce77e674a3fca6e7ed70efbedb
Author: Marek Olšák 
Date:   Wed Jan 6 21:21:07 2016 +0100

gallium/radeon: add a function for adding llvm function attributes

This will be used for setting the new InitialPSInputAddr attribute.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de2e28366a4b43b7c47373d3bbe17243a4dbb3ba
Author: Marek Olšák 
Date:   Thu Jan 28 02:26:59 2016 +0100

radeonsi: compile geometry shaders immediately

they have only 1 variant

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7a8b6fff5ae23546ed92aad4ad67470355ed919
Author: Marek Olšák 
Date:   Thu Jan 28 01:29:25 2016 +0100

radeonsi: split out code for deleting si_shader

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e21142087c43627a8b4bdf5aefac8efb58bb5aad
Author: Marek Olšák 
Date:   Tue Jan 26 17:07:29 2016 +0100

radeonsi: move code writing tess factors into a separate function

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc5fc3c2f60b4c208369e0eddbf416af059d88c7
Author: Marek Olšák 
Date:   Tue Jan 26 23:32:23 2016 +0100

radeonsi: make LLVM IR dumping less messy

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1041366db7a8af64db5d426f48e253796b77e84
Author: Marek Olšák 
Date:   Tue Jan 26 22:39:24 2016 +0100

radeonsi: move a few r600_can_dump_shader calls to where they're needed

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6d5666fbf2a4196462db7ea82918feae883daae
Author: Marek Olšák 
Date:   Tue Jan 26 17:27:54 2016 +0100

radeonsi: remove useless code that handles dx10_clamp_mode

"enable-no-nans-fp-math" is a wrong string and there was a disagreement
about fixing it.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=57271d5364bb84fd5c6b6a6baaf8d81bae8c53c1
Author: Marek Olšák 
Date:   Tue Jan 26 22:16:55 2016 +0100

radeonsi: dump SPI_PS_INPUT values along with shader stats

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a53628f45787370636b3b0a0c7d29cb80e1ada7
Author: Marek Olšák 
Date:   Wed Jan 6 16:03:38 2016 +0100

radeonsi: read SPI_PS_INPUT_ADDR from LLVM if it returns it

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9483fcc7f24d7e144530084bc38e5c325013a130
Author: Marek Olšák 
Date:   Sat Jan 9 14:33:38 2016 +0100

radeonsi: don't force gl_SampleMaskIn to 1 for smoothing

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c379c2540b7343b02a4c1b4d3cad3c194729d617
Author: Marek Olšák 
Date:   Sat Jan 2 00:41:43 2016 +0100

radeonsi: split PS input interpolation code into its own function

This will be used by the fragment shader prolog.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9126dcda834ba9cf58af32e97f4b5d93c9817a3
Author: Marek Olšák 
Date:   Sun Jan 3 19:00:29 2016 +0100

radeonsi: implement forcing per-sample_interpolation using the shader key 
only

It was partly a state and partly emulated by shader code, but since we want
to do this in a fragment shader prolog, we need to put it into the shader
key, which will be used to generate the prolog.

This also removes 

Mesa (master): 23 new commits

[Matt Turner]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=49d0a36bd6593ce09486678a7bf3d500af5e265c
Author: Thomas Helland thomashellan...@gmail.com
Date:   Thu Aug 6 13:36:05 2015 +0200

nir: Simplify feq(fneg(a), a)) - feq(a, 0.0)

The positive and negative value of a float can only
be equal to each other if it is -0.0f and 0.0f.
This is safe for Nan and Inf, as -Nan != Nan, and -Inf != Inf
This gives no changes in my shader-db

Signed-off-by: Thomas Helland thomashellan...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a39167d5949c76dfb48994caead4b59ab5f80318
Author: Thomas Helland thomashellan...@gmail.com
Date:   Thu Aug 6 13:36:04 2015 +0200

nir: Simplify fne(fneg(a), a) - fne(a, 0.0)

-NaN != NaN, and -Inf != Inf, so this should be safe.
Found while working on my VRP pass.

Shader-db results on my IVB:
total instructions in shared programs: 1698267 - 1698067 (-0.01%)
instructions in affected programs: 15785 - 15585 (-1.27%)
helped:36
HURT:  0
GAINED:0
LOST:  0

Some shaders was found to have the following pattern in NIR:
vec1 ssa_26 = fneg ssa_21
vec1 ssa_27 = fne ssa_21, ssa_26

Make that:
vec1 ssa_27 = fne ssa_21, 0.0f

This is found in Dota2 and Brutal Legend.
One shader is cut by 8%, from 323 - 296 instructons in SIMD8

Signed-off-by: Thomas Helland thomashellan...@gmail.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=29264d0d0cd5ca24314630d9dc22b3f971344a34
Author: Rhys Kidd rhysk...@gmail.com
Date:   Thu Aug 6 16:34:17 2015 +1000

i965/gen7: Resolve GCC sign-compare warning.

mesa/src/mesa/drivers/dri/i965/gen7_sol_state.c: In function 
'gen7_upload_3dstate_so_decl_list':
mesa/src/mesa/drivers/dri/i965/gen7_sol_state.c:119:22: warning: comparison 
between signed and unsigned integer expressions [-Wsign-compare]
for (int i = 0; i  linked_xfb_info-NumOutputs; i++) {
  ^

Signed-off-by: Rhys Kidd rhysk...@gmail.com
Reviewed-by: Thomas Helland thomashellan...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=94bdb50c0b02160d0b391eafc68259ab78310d37
Author: Rhys Kidd rhysk...@gmail.com
Date:   Thu Aug 6 16:34:16 2015 +1000

i965/gen6: Resolve GCC sign-compare warning.

mesa/src/mesa/drivers/dri/i965/gen6_vs_state.c: In function 
'gen6_upload_push_constants':
mesa/src/mesa/drivers/dri/i965/gen6_vs_state.c:85:21: warning: comparison 
between signed and unsigned integer expressions [-Wsign-compare]
   for (i = 0; i  prog_data-nr_params; i++) {
 ^
mesa/src/mesa/drivers/dri/i965/gen6_vs_state.c:92:17: warning: comparison 
between signed and unsigned integer expressions [-Wsign-compare]
   for (i = 0; i  prog_data-nr_params; i++) {
 ^

Signed-off-by: Rhys Kidd rhysk...@gmail.com
Reviewed-by: Thomas Helland thomashellan...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1d1056c4e3b7125a5092730837fff2a9585e99ab
Author: Rhys Kidd rhysk...@gmail.com
Date:   Thu Aug 6 16:34:15 2015 +1000

i965: Resolve GCC sign-compare warning.

mesa/src/mesa/drivers/dri/i965/brw_vs_surface_state.c: In function 
'brw_upload_pull_constants':
mesa/src/mesa/drivers/dri/i965/brw_vs_surface_state.c:84:18: warning: 
comparison between signed and unsigned integer expressions [-Wsign-compare]
for (i = 0; i  prog_data-nr_pull_params; i++) {
  ^
mesa/src/mesa/drivers/dri/i965/brw_vs_surface_state.c:89:21: warning: 
comparison between signed and unsigned integer expressions [-Wsign-compare]
   for (i = 0; i  ALIGN(prog_data-nr_pull_params, 4) / 4; i++) {
 ^

Signed-off-by: Rhys Kidd rhysk...@gmail.com
Reviewed-by: Thomas Helland thomashellan...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=30694b3f42d0da4fb106561fc898279babb498ad
Author: Rhys Kidd rhysk...@gmail.com
Date:   Thu Aug 6 16:34:14 2015 +1000

i965: Resolve GCC sign-compare warning.

mesa/src/mesa/drivers/dri/i965/brw_wm_surface_state.c: In function 
'brw_upload_abo_surfaces':
mesa/src/mesa/drivers/dri/i965/brw_wm_surface_state.c:961:22: warning: 
comparison between signed and unsigned integer expressions [-Wsign-compare]
for (int i = 0; i  prog-NumAtomicBuffers; i++) {
  ^

Signed-off-by: Rhys Kidd rhysk...@gmail.com
Reviewed-by: Thomas Helland thomashellan...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5fb58012be6f783d735ded79582aa46a2c71e0fd
Author: Rhys Kidd rhysk...@gmail.com
Date:   Thu Aug 6 16:34:13 

Mesa (master): 23 new commits

[Francisco Jerez]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c04a90e91a64a4a09d77c76c6ddcaca949e9b0e
Author: Francisco Jerez curroje...@riseup.net
Date:   Fri May 1 17:00:02 2015 +0300

docs: Mark ARB_shader_image_load_store as done on i965.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d03c65793a5ee31f1138cbd0fba6fac6cd942428
Author: Francisco Jerez curroje...@riseup.net
Date:   Thu May 7 18:56:01 2015 +0300

i965: Expose ARB_shader_image_load_store.

Reviewed-by: Paul Berry stereotype...@gmail.com
Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=13a04abc277089275217dce119e18acf4d4ce52d
Author: Francisco Jerez curroje...@riseup.net
Date:   Mon Jul 27 14:33:06 2015 +0300

i965/fs: Clamp image array indices to the array bounds on IVB.

This fixes the spec@arb_shader_image_load_store@invalid index bounds
piglit tests on IVB, which were causing a GPU hang and then a crash
due to the invalid binding table index result of the array index
calculation.  Other generations seem to behave sensibly when an
invalid surface is provided so it doesn't look like we need to care.

Reviewed-by: Jordan Justen jordan.l.jus...@intel.com
Reviewed-by: Chris Forbes chr...@ijw.co.nz

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a47ae8de2cf30fbe45318a18a2ea032f30ab7d10
Author: Francisco Jerez curroje...@riseup.net
Date:   Mon Jul 27 16:26:52 2015 +0300

i965/fs: Translate image load, store and atomic NIR intrinsics.

v2: Move array coordinate workaround into the surface builder.

Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=912ef52c29fdc373889594b963cc93c89fa9e3f7
Author: Francisco Jerez curroje...@riseup.net
Date:   Sun Jun 28 21:16:31 2015 +0300

i965/fs: Handle image uniforms in NIR programs.

v2: Move the image_params array back to brw_stage_prog_data.

Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4af27145fe2fec6586ce95e80a76cdcbfe933db1
Author: Francisco Jerez curroje...@riseup.net
Date:   Tue May 5 21:07:15 2015 +0300

i965: Implement logic to set up and upload an image uniform.

v2: Move the image_params array back to brw_stage_prog_data.

Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=84431c1f1d343c85f3b7fa265293a1d245ba9cf3
Author: Francisco Jerez curroje...@riseup.net
Date:   Tue May 5 21:05:45 2015 +0300

i965: Teach type_size() about the size of an image uniform.

Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=caae52561dabb2d20f2369c547e660d078974285
Author: Francisco Jerez curroje...@riseup.net
Date:   Thu Jul 30 15:46:40 2015 +0300

i965/fs: Implement image load, store and atomic.

v2: Drop VEC4 suport.
v3: Rebase.
v4: Move array coordinate workaround into the surface builder.

Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7e8be000101cc6fe3846745b559f2d785430e253
Author: Francisco Jerez curroje...@riseup.net
Date:   Thu Jul 30 15:51:58 2015 +0300

i965/fs: Import image format conversion primitives.

Define bitfield packing, unpacking and type conversion operations in
terms of which the image format conversion code will be implemented.
These don't directly know about image formats: The packing and
unpacking functions take a 4-tuple of bit shifts and a 4-tuple of bit
widths as arguments, determining the bitfield position of each
component.  Most of the remaining functions perform integer, fixed
point normalized, and floating point type conversions, mapping between
a target type with per-component bit widths given by a parameter and a
matching native representation of the same type.

v2: Drop VEC4 suport.
v3: Rebase.
v4: Fix clamping of negative floats in the unsigned case of
emit_convert_to_scaled().

Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=26ca81ce3029cbd2531f52635258aecae19bf185
Author: Francisco Jerez curroje...@riseup.net
Date:   Wed Apr 22 16:45:28 2015 +0300

i965/fs: Import image format metadata queries.

Define some utility functions to query the bitfield layout of a given
image format and whether it satisfies a number of more or less
hardware-specific properties.

v2: Drop VEC4 suport.
v3: Add SKL support.

Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=86dbd8af40deaa99aedf011e863b908173e63012
Author: Francisco Jerez curroje...@riseup.net
Date:   Thu Jul 23 19:32:08 2015 +0300

Mesa (master): 23 new commits

[Dave Airlie]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=65d84daf29adb0da779e9b49291cb4e26f021e1e
Author: Dave Airlie airl...@redhat.com
Date:   Wed Jul 22 11:04:52 2015 +1000

docs/GL3.txt: update ARB_shader_subroutine status.

Acked-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Dave Airlie airl...@redhat.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c3fad009c54fb526d236fd10f4377ce7fbb54459
Author: Dave Airlie airl...@redhat.com
Date:   Mon Apr 20 10:30:53 2015 +1000

st/mesa: enable shader subroutine

since this touches drivers, only enable it on gallium
for now for drivers reporting GLSL 1.30 or above.

Signed-off-by: Dave Airlie airl...@redhat.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a922c279930ec1ab34506ca2e24d8a62a297ea33
Author: Dave Airlie airl...@redhat.com
Date:   Mon Apr 20 10:29:42 2015 +1000

st/mesa: add subroutine bits (v1.1)

Just add support for the subroutine type to the
glsl-tgsi convertor.

v1.1: add subroutine to int support.

Acked-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Dave Airlie airl...@redhat.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f57fda494a6b4ccf30cab000ca28154fbabcb78
Author: Dave Airlie airl...@redhat.com
Date:   Mon Apr 20 10:29:12 2015 +1000

mesa: fill out the ARB_shader_subroutine APIs

This fleshes out the APIs, using the program resource
APIs where they should match.

It also sets the default values to valid subroutines.

Acked-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Dave Airlie airl...@redhat.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f4f3e2d4877e1e2bda064cc323fb7b3667e12fe
Author: Dave Airlie airl...@redhat.com
Date:   Mon Apr 20 10:28:40 2015 +1000

program: add subroutine uniform support (v1.1)

Add support for the subroutine uniform type ir-mesa.cpp

v1.1: add subroutine to int to switch

Acked-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Dave Airlie airl...@redhat.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a18f160159b93c57943e5cb4d9d9a78a5b72996
Author: Dave Airlie airl...@redhat.com
Date:   Mon Apr 20 10:27:58 2015 +1000

program_resource: add subroutine support (v3.1)

This fleshes out the ARB_program_query support for the
APIs that ARB_shader_subroutine introduces, leaving
some TODOs for later addition.

v2: reworked for lots of the ARB_program_interface_query
entry points and tests
v3: use common function to test for subroutine support
v3.1: add tess, fix missing breaks

Acked-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Dave Airlie airl...@redhat.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=60266863d80bb2af94fa5c189ccd23ee20607ea9
Author: Dave Airlie airl...@redhat.com
Date:   Mon Apr 20 10:27:36 2015 +1000

glsl: add uniform and program resource support (v2)

This adds linker support for subroutine uniforms, they
have some subtle differences from real uniforms, we also hide
them and they are given internal uniform names.

This also adds the subroutine locations and subroutine uniforms
to the program resource tracking for later use.

v1.1: drop is_subroutine_def

v2: handle explicit location properly, ARB_explicit_location
has a lot of language for subroutine shaders.
Calculate a link time the number of compatible subroutines
for a uniform, to make program resource easier later.

Acked-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Dave Airlie airl...@redhat.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=44ea8b9b8edc5f59da546683fe64129a1c1be449
Author: Dave Airlie airl...@redhat.com
Date:   Tue Jul 21 14:59:01 2015 +1000

mesa/mtypes: add gl_subroutine_function and uniform storage to shader (v2)

This adds the necessary storage for subroutine info to gl_shader.

v2: add comments, rename one member
Acked-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Dave Airlie airl...@redhat.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7dd429e8f74302d44af00d051e59911439152369
Author: Dave Airlie airl...@redhat.com
Date:   Thu Apr 23 13:34:14 2015 +1000

glsl/ir: add subroutine lowering pass (v2.3)

This lowers the enhanced ir_call using the lookaside table
of subroutines into an if ladder. This initially was done
at the AST level but it caused some ordering issues so a separate
pass was required.

v2: clone return value derefs.
v2.1: update for subroutine-int convert.
v2.2: add a clone for the array index

Reviewed-by: Chris Forbes chr...@ijw.co.nz
Signed-off-by: Dave Airlie airl...@redhat.com

URL:

Mesa (master): 23 new commits

[Marek Olšák]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac319d94d38cf3145990002c8216426fe297cd28
Author: Marek Olšák marek.ol...@amd.com
Date:   Wed Dec 10 19:59:53 2014 +0100

docs/relnotes: document the removal of GALLIUM_MSAA

Cc: 10.2.10.3 10.4 mesa-sta...@lists.freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=15186607bb99c637d2ab28d65e033d470a84b51c
Author: Marek Olšák marek.ol...@amd.com
Date:   Mon Dec 8 15:58:42 2014 +0100

radeonsi: take into account NULL colorbuffers when computing CB_TARGET_MASK

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3291eedfe601b9d09023fb24987ae7d2c7e977c3
Author: Marek Olšák marek.ol...@amd.com
Date:   Mon Dec 8 13:35:36 2014 +0100

radeonsi: only emit line stippling and provoking vertex state when it 
changes

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=acda2e113a020f9ab32d6d38a07d74f77520f462
Author: Marek Olšák marek.ol...@amd.com
Date:   Mon Dec 8 12:51:59 2014 +0100

radeonsi: fix SPI state dependency on sprite_coord_enable

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7991d602f370a1bf7ff5040ea3ee2572ee1c76ca
Author: Marek Olšák marek.ol...@amd.com
Date:   Mon Dec 8 12:41:37 2014 +0100

radeonsi: fix line stippling and provoking vertex state for GS primitives

I'm not sure if GS hw outputs line lists or line strips.

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=834bee42ed45b1f993694c27aedd2f24d77d35f1
Author: Marek Olšák marek.ol...@amd.com
Date:   Sun Dec 7 20:23:56 2014 +0100

radeonsi: emit DRAW_PREAMBLE only if it changes

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4660935125a428ee7a108acc29b46d2801682a8
Author: Marek Olšák marek.ol...@amd.com
Date:   Mon Dec 8 15:17:20 2014 +0100

radeonsi: remove setting of VGT_DISPATCH_DRAW_INDEX

It's used only if VGT_SHADER_STAGES_EN.DISPATCH_DRAW_EN is 1, which we don't
set.

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6fde19491038074eb2d5ddb1bae48276530f9d74
Author: Marek Olšák marek.ol...@amd.com
Date:   Sun Dec 7 20:15:49 2014 +0100

radeonsi: emit GS_OUT_PRIM_TYPE only if it changes

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=34350131ded27e7584cfde273675a9a99b1ba7db
Author: Marek Olšák marek.ol...@amd.com
Date:   Sun Dec 7 20:14:41 2014 +0100

radeonsi: emit primitive restart only if it changes

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3382036946cf7c7859c9027c4ffe4881e30ead56
Author: Marek Olšák marek.ol...@amd.com
Date:   Sun Dec 7 20:04:40 2014 +0100

radeonsi: emit base vertex and start instance only if they change

v2: added a helper function for invalidation of the sh constants

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b472709090c10d17686b0ae5a5112e43ba8ac0c6
Author: Marek Olšák marek.ol...@amd.com
Date:   Sun Dec 7 19:40:44 2014 +0100

radeonsi: emit clip registers only if VS, GS, or rasterizer is changed

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=161534737c643e15bacf77b389daa18da325b74f
Author: Marek Olšák marek.ol...@amd.com
Date:   Sun Dec 7 19:30:08 2014 +0100

radeonsi: get info about VS outputs from tgsi_shader_info

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=20e570d1156b76916cd6bf2a0113f548de8c4644
Author: Marek Olšák marek.ol...@amd.com
Date:   Sun Dec 7 17:53:56 2014 +0100

radeonsi: move all shader-related functions to a new file si_state_shaders.c

This huge amount of code deserves its own file.

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ca7f1cf8b554334d165b4d81f34f365a2d726181
Author: Marek Olšák marek.ol...@amd.com
Date:   Sun Dec 7 16:40:09 2014 +0100

radeonsi: generate derived and draw-related registers directly in the CS

The big function is split into 3 smaller functions.

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=508c1ca6af665a93d7e3f20203e9fb5d59975832
Author: Marek Olšák marek.ol...@amd.com
Date:   Sun Dec 7 16:02:07 2014 +0100

radeonsi: si_conv_pipe_prim shouldn't fail

An assertion should suffice.

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:

Mesa (master): 23 new commits

[Kenneth Graunke]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ccae4fe28999f6353e188d6aa5834d24cc9f378
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jul 26 20:30:58 2014 -0700

i965: Delete sampler state structures.

We've moved to using bitshifts (like we did for surface state); nothing
uses the structures anymore.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8c2538e17cd3e0a2fa8f6f80f76eee4a293a90a
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jul 26 20:36:49 2014 -0700

i965: Replace sizeof(struct gen7_sampler_state) with the size itself.

These are the last users of struct gen7_sampler_state.

v2: Use a local sampler_state_size variable, to help distinguish the
various 16s (suggested by Topi Pohjolainen).

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7da612e8d02d41eeb04935a41b20c66da103cc16
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jul 26 20:32:41 2014 -0700

i965: Drop sizeof(struct brw_sampler_state) from estimated prim size.

This is the last user of the structure.

v2: Use a local variable with a sensible name so people know what 16 is.
(Suggested by Topi Pohjolainen).

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d1a4d1f5b26400878fa99c723759a2c54721de2
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jul 26 20:49:32 2014 -0700

i965: Make BLORP use brw_emit_sampler_state().

This simplifies the code, removes use of the old structures, and also
allows us to combine the Gen6 and Gen7+ code.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6b5b78b518c2b55bffec25f794de043a408976e0
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jul 26 20:43:40 2014 -0700

i965: Delete redundant sampler state dumping code.

Although the Gen4-6 and Gen7+ variants used different structure types,
they didn't use any of the fields - only the size, which is identical.
So both decoders did exactly the same thing.

Someday we should implement useful decoders for SAMPLER_STATE.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f3e0be666339b7b2377123db1d6f09463c64bbd
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jul 26 18:10:53 2014 -0700

i965: Make some brw_sampler_state.c functions static again.

Now that gen7_sampler_state.c is gone, everything is once again in a
single file.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2fe2fe1fcea5c41edbbf30b1424ad2ac4ffeef43
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jul 26 13:15:56 2014 -0700

i965: Stop using gen7_update_sampler_state; rm gen7_sampler_state.c.

The code in brw_sampler_state.c now handles all generations; we don't
need the extra Gen7+ only code anymore.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7679393f561ca4f0e9c9587d4b208b035b7b9098
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jul 26 13:12:37 2014 -0700

i965: Make brw_update_sampler_state use 8 bits for LOD fields on Gen7+.

This was the only actual difference between Gen4-6 and Gen7+ in terms of
the values we program.  The rest was just mechanical structure
rearrangement.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Topi Pohjolainen topi.pohjolai...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a50b640dfe3580049e07bfdafb2e69410844359d
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jul 26 03:04:12 2014 -0700

i965: Make brw_update_sampler_state() use brw_emit_sampler_state().

Instead of stuffing bits directly into the brw_sampler_state structure,
we now store them in local variables, then use brw_emit_sampler_state()
to assemble the packet.  This separates the decision about what values
to use from the actual packet emission, which makes the code more
reusable across generations.

v2: Put const on a bunch of local variables and move declarations,
as suggested by Topi Pohjolainen.

Signed-off-by: Kenneth 

Mesa (master): 23 new commits

[Iago Toral Quiroga]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3c5b2f7d08f8a2a41df0a224cd6600ce4260fa1
Author: Samuel Iglesias Gonsalvez sigles...@igalia.com
Date:   Fri Jun 13 10:24:40 2014 +0200

docs: mark Geometry shader multiple streams as done for i965

Signed-off-by: Samuel Iglesias Gonsalvez sigles...@igalia.com
Reviewed-by: Chris Forbes chr...@ijw.co.nz

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5b3492fa3ff1738fffbc8d05cf39b6e10da3dc39
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Fri Jun 13 11:13:24 2014 +0200

i965: Enable vertex streams up to MAX_VERTEX_STREAMS.

Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b84fa2c52cbaff5963b7d7aa4f27c316fe0a89c
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Tue Jun 10 13:50:32 2014 +0200

mesa: Enable simultaneous queries on different streams.

It should be possible to query the number of primitives written to each
individual stream by a geometry shader in a single draw call. For that
we need to have up to MAX_VERTEX_STREAM separate query objects.

Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3178d2474ae5bdd1102fb3d76a60d1d63c961ff5
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Tue Jun 17 13:45:18 2014 +0200

i965: Implement GL_PRIMITIVES_GENERATED with non-zero streams.

So far we have been using CL_INVOCATION_COUNT to resolve this query but this
is no good with streams, as only stream 0 reaches the clipping stage. 
Instead
we will use SO_PRIM_STORAGE_NEEDED which can keep track of the primitives 
sent
to each individual stream.

Since SO_PRIM_STORAGE_NEEDED is related to the SOL stage and according to
ARB_transform_feedback3 we need to be able to query primitives generated in
each stream whether transform feedback is active or not what we do is to
enable the SOL unit even if transform feedback is not active but disable all
output buffers in that case. This effectively disables transform feedback
but permits activation of statistics enabling SO_PRIM_STORAGE_NEEDED even
when transform feedback is not active.

Reviewed-by: Chris Forbes chr...@ijw.co.nz

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a374685f092cbe57aae89e6977b8bdde0c8ec623
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Tue Jun 10 13:29:40 2014 +0200

i965: Implement GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN with non-zero 
streams.

Reviewed-by: Chris Forbes chr...@ijw.co.nz

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ecd9960430a52cfea624cd836d68ee2c39738410
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Tue Jun 10 13:28:38 2014 +0200

mesa: Include stream information in indexed queries.

Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e58a3ef2a6dd029e730c7d0dd14e29a5210b3c9
Author: Samuel Iglesias Gonsalvez sigles...@igalia.com
Date:   Tue Jun 10 08:45:44 2014 +0200

glsl: include streamId when reading/printing ir_variable IR.

Signed-off-by: Samuel Iglesias Gonsalvez sigles...@igalia.com
Reviewed-by: Chris Forbes chr...@ijw.co.nz
Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a16043ba57501d3d91d50291135775e6650818fa
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Sun Jun 8 13:16:26 2014 +0200

glsl: include streamId when reading/printing emit-vertex and end-primitive 
IR.

Reviewed-by: Ian Romanick ian.d.roman...@intel.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d562588a5a1067cf80148ddad3815fdba816151
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Tue Jun 3 16:38:44 2014 +0200

i965/gs: Set control data bits for vertices emitted in stream mode.

In stream mode we have to set control data bits with the StreamID
information for every vertex.

Reviewed-by: Chris Forbes chr...@ijw.co.nz

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7589683c97442239295e700cbea17e82736f1f27
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Mon Jun 16 16:09:53 2014 +0200

glsl: Validate vertex emission in geometry shaders.

Check if non-zero streams are used. Fail to link if emitting to unsupported
streams or emitting to non-zero streams with output type other than 
GL_POINTS.

Reviewed-by: Chris Forbes chr...@ijw.co.nz

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e877aadde065de567da53f67ea8d60e19825693d
Author: Iago Toral Quiroga ito...@igalia.com
Date:   Fri Jun 20 10:43:57 2014 +0200

glsl: Add support for EmitStreamVertex() and EndStreamPrimitive().

Reviewed-by: Chris Forbes chr...@ijw.co.nz

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b3fc21032a63f483d381c36c8e41bf3540ebfcc
Author: 

Mesa (master): 23 new commits

[Kenneth Graunke]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c60a4ba7e36f069d6829948ee14d87970f5f39a1
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jun 28 21:16:06 2014 -0700

i965/disasm: Fix INTEL_DEBUG=fs on Broadwell for ARB_fp applications.

Apparently INTEL_DEBUG=fs has crashed on Broadwell for anything using
ARB_fragment_program since commit 9cee3ff5.  We need to NULL-check the
right field.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Kristian Høgsberg k...@bitplanet.net
Cc: 10.2 mesa-sta...@lists.freedesktop.org

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5dfbfd17e06fa8ce21e9c94034e199769ee740e3
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jun 28 20:39:24 2014 -0700

i965/disasm: Delete gen8_disasm.c.

The functionality has been merged into brw_disasm.c; use that instead.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Kristian Høgsberg k...@bitplanet.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e59a9ecc98a9715307ae42f8e267b2f09129d690
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jun 28 20:37:56 2014 -0700

i965/disasm: Stop using gen8_disassemble in favor of brw_disassemble.

At this point, brw_disassemble can do everything gen8_disassemble can
do - and, thanks to the new brw_inst API, it supports all generations.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Kristian Høgsberg k...@bitplanet.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7b7f95b95236747233feb8de5781a72e357a8dc4
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jun 28 20:25:57 2014 -0700

i965/disasm: Improve render target write message disassembly.

Previously, we decoded render target write messages as:

   render ( RT write, 0, 16, 12, 0) mlen 8 rlen 0

which made you remember (or look up) what the numbers meant:

1. The binding table index
2. The raw message control, undecoded:
   - Last Render Target Select
   - Slot Group Select
   - Message Type (SIMD8, normal SIMD16, SIMD16 replicate data, ...)
3. The dataport message type, again (already decoded as RT write)
4. The write commit bit (0 or 1)

Needless to say, having to decipher that yourself is annoying.  Now, we
do:

   render RT write SIMD16 LastRT Surface = 0 mlen 8 rlen 0

with optional Hi and WriteCommit for slot group/write commit.

Thanks to the new brw_inst API, we can also stop duplicating code on a
per-generation basis.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Kristian Høgsberg k...@bitplanet.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e5b52e35da17a4cef77e00fdcf65048ca6c9695
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jun 28 19:49:57 2014 -0700

i965/disasm: Rename msg_target to SFID.

We haven't used the name message target in a while - there are a lot
of things called target, and it gets confusing.  SFID (Shared
Function ID) is the term commonly used in the modern documentation.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Kristian Høgsberg k...@bitplanet.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4cf088f43dc52d61661970324e7850b6c07c55b
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jun 28 19:41:38 2014 -0700

i965/disasm: Fix typo in RT UNORM write message.

The name of this message is Render Target UNORM Write (Sandybridge
PRM, Volume 4 Part 1, Page 210).  Drop the bogus 'c'.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Kristian Høgsberg k...@bitplanet.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3603dfff6fc4d03f2c691eb9019d0ade1d5dfa3b
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jun 28 19:36:26 2014 -0700

i965/disasm: Use Gen6+ SFID case labels.

Most developers will recognize the Gen6+ SFID names more quickly than
the Gen4-5 ones.  Given that they're the same values, just use the new
names.

Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Kristian Høgsberg k...@bitplanet.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4fe78f4cc2fac1781a315151add77793adc61669
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sat Jun 28 19:29:08 2014 -0700

i965/disasm: Handle Gen8+ HF/DF immediate cases.

We should print something properly, but I'm not sure how to properly
print an HF, and 

Mesa (master): 23 new commits

[Francisco Jerez]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76f95ba2721ec3214e39711a991b510bdb3c5a36
Author: Francisco Jerez curroje...@riseup.net
Date:   Fri Nov 22 19:59:48 2013 -0800

mesa: Handle binding of uniforms to image units with glUniform*().

v2: Set driver-specified flag in NewDriverState when glUniform* is
used to bind an image unit.
v3: Abbreviate argument type check.

Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=212122543b5eb69613853bf03f0c4fd5494c06a0
Author: Francisco Jerez curroje...@riseup.net
Date:   Sat Nov 23 21:56:56 2013 -0800

glsl/linker: Propagate image uniform access qualifiers to the driver.

Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c318a677dd20a5a9d891f0891363b4811aa7b04f
Author: Francisco Jerez curroje...@riseup.net
Date:   Fri Nov 22 15:53:52 2013 -0800

glsl/linker: Assign image uniform indices.

Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e51158f2e77155bcfc6ba5f42d1cf9b9c9810930
Author: Francisco Jerez curroje...@riseup.net
Date:   Fri Nov 22 15:53:26 2013 -0800

glsl/linker: Count and check image resources.

v2: Add comment about the reason why image variables take up space
from the default uniform block.

Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e8dbe430aa77d6a775e087938bd19002f2a39e18
Author: Francisco Jerez curroje...@riseup.net
Date:   Mon Nov 25 20:29:57 2013 -0800

glsl: Add image built-in function generator.

Because of the combinatorial explosion of different image built-ins
with different image dimensionalities and base data types, enumerating
all the 242 possibilities would be annoying and a waste of .text
space.  Instead use a special path in the built-in builder that loops
over all the known image types.

v2: Generate built-ins on GLSL version 4.20 too.  Rename
'_has_float_data_type' to '_supports_float_data_type'.  Avoid
duplicating enumeration of image built-ins in create_intrinsics()
and create_builtins().
v3: Use a more orthodox approach for passing image built-in generator
parameters.
v4: Cosmetic changes.

Acked-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=87acc7c650e765751eb787db7d23cc242670c68a
Author: Francisco Jerez curroje...@riseup.net
Date:   Wed Feb 12 17:15:21 2014 +0100

glsl: Add built-in constants for ARB_shader_image_load_store.

v2: Add them on GLSL version 4.20 too.

Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6057300ec68be3cbccdd3e6512aba833c63c2bb8
Author: Francisco Jerez curroje...@riseup.net
Date:   Wed Feb 12 17:12:24 2014 +0100

glcpp: Add built-in define for ARB_shader_image_load_store.

Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=60c89f8bff360dd79dea487eb197949381a72868
Author: Francisco Jerez curroje...@riseup.net
Date:   Mon Nov 25 14:09:13 2013 -0800

glsl: Add built-in types defined by ARB_shader_image_load_store.

Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7af167d2becc3ff7274350d8d29424ebf89aa6a9
Author: Francisco Jerez curroje...@riseup.net
Date:   Mon Nov 25 19:38:37 2013 -0800

glsl/ast: Generalize some sampler variable restrictions to all opaque types.

No opaque types may be statically initialized in the shader, all
opaque variables must be declared uniform or be part of an in
function parameter declaration, no opaque types may be used as the
return type of a function.

v2: Add explicit check for opaque types in interface blocks.  Check
for opaque types in ir_dereference::is_lvalue().

Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2158749e522cb62d961d64d7b887cd730f915faa
Author: Francisco Jerez curroje...@riseup.net
Date:   Fri Nov 22 15:17:05 2013 -0800

glsl/ast: Forbid declaration of image variables in structures and uniform 
blocks.

Aggregating images inside uniform blocks is explicitly disallowed by
the standard, aggregating them inside structures is not (as of GL
4.4), but there is a similar problem as with atomic counters: image
uniform declarations require either a writeonly memory qualifier or
an explicit format qualifier, which are explicitly forbidden in
structure member declarations.  In the resolution of Khronos bug
#10903 the same wording applied to atomic counters was decided to mean
that they're not allowed inside structures -- Rejecting image member

Mesa (master): 23 new commits

[Topi Pohjolainen]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bda88f121b36ffb5b8276a3d25791d2c5f9e1fd6
Author: Topi Pohjolainen topi.pohjolai...@intel.com
Date:   Tue Dec 10 15:12:30 2013 +0200

i965/blorp: switch eu-emitter to use FS IR and fs_generator

No regressions on IVB (piglit quick + unit tests).

v2 (Paul):
  - no need to patch the unit tests anymore. Original logic
was altered and unit tests updated to match the
fs-generator
  - lrp emission moves from the blorp compiler core into the
emitter here (previously there was a separate refactoring
patch which is not really needed anymore as the lrp logic
got refactored when the original lrp logic got fixed).
  - pass 'BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX' to the
generator in fs_inst::target instead of hardcoding it

Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f3e5363ade53f300036660ff49b367fb282cc06
Author: Topi Pohjolainen topi.pohjolai...@intel.com
Date:   Tue Dec 17 16:39:16 2013 +0200

i965/fs: add support for BRW_OPCODE_AVG in fs_generator

Needed for compiling blorp blit programs.

Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9927d7ae6883e2a5569130ed48ca0537ca3e07c3
Author: Topi Pohjolainen topi.pohjolai...@intel.com
Date:   Tue Dec 17 14:00:50 2013 +0200

i965/fs: introduce blorp specific rt-write for fs_generator

The compiler for blorp programs likes to emit instructions for
the message construction itself meaning that the generator needs
to skip any such when blorp programs are translated for the hw.
In addition, the binding table control is special for blorp
programs and the generator does not need to update the binding
tables associated with the compiler bookkeeping (this in fact
gets thrown away as the blorp compiler sets the program data
in its own way).

v2 (Paul): do not hardcode the binding table index but use
   fs_inst::target instead.

Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=85fc724df5403ffb7d8eac071962824d9303d24f
Author: Topi Pohjolainen topi.pohjolai...@intel.com
Date:   Wed Dec 11 10:58:38 2013 +0200

i965/fs: allow unit tests to dump the final patched assembly

Unit tests comparing generated blorp programs to known good need
to have the dump in designated file instead of in default
standard output. The comparison also expects the jump counters
of if-else-instructions to be correctly set and hence the dump
needs to be taken _after_ 'patch_IF_ELSE()' is run (the default
dump of the fs_generator does this before).

v2 (Paul): dropped the redundant 'dump_enabled' argument

Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=757b4cf011ac832895ad2ee470587d26f3e4c6d3
Author: Topi Pohjolainen topi.pohjolai...@intel.com
Date:   Mon Dec 2 10:48:59 2013 +0200

i965/blorp: wrap brw_IF/ELSE/ENDIF() into eu-emitter

v2 (Paul): renamed emit_if() to emit_cmp_if()

Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c0030678aa39b4e2c080887023818eed6c1f5a0
Author: Topi Pohjolainen topi.pohjolai...@intel.com
Date:   Fri Nov 29 13:29:56 2013 +0200

i965/blorp: wrap RNDD (/brw_RNDD(func, /emit_rndd(/)

Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=44524cb42f9a2ce6571b8ca344cd5a7c6afd5702
Author: Topi Pohjolainen topi.pohjolai...@intel.com
Date:   Fri Nov 29 13:27:58 2013 +0200

i965/blorp: wrap FRC (/brw_FRC(func, /emit_frc(/)

Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f9d875926e47e30c8c57ee3e0491f5d720789d6c
Author: Topi Pohjolainen topi.pohjolai...@intel.com
Date:   Fri Nov 29 13:20:11 2013 +0200

i965/blorp: wrap MUL (/brw_MUL(func, /emit_mul(/)

Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
Reviewed-by: Paul Berry stereotype...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bbab8068d2adb2dd9c09882cc8a19e62cf0ea8f0
Author: Topi Pohjolainen topi.pohjolai...@intel.com
Date:   Fri Nov 29 13:05:57 2013 +0200

i965/blorp: wrap OR (/brw_OR(func, /emit_or(/)

Mesa (master): 23 new commits

[Chia-I Wu]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=09f62a13fcddd237e7a3aef6185377f9a585a332
Author: Chia-I Wu olva...@gmail.com
Date:   Tue Jun 4 16:20:05 2013 +0800

ilo: clean up states upon context destroy

We need to unreference resources that we referenced.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cbf0a410e565b6a02c4b45f73364d3537780105
Author: Chia-I Wu olva...@gmail.com
Date:   Tue Jun 4 13:25:38 2013 +0800

ilo: unmap cp bo before destroying it

The BOs are mapped in their entire life times for the chipsets we support so
do not forget to unmap it.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=27804b2fc705bdcd3ff3d4ffd12534bc42f70805
Author: Chia-I Wu olva...@gmail.com
Date:   Thu Jun 6 02:41:21 2013 +0800

ilo: enable bo reuse

This magical line of code must have got lost at some point in the history...

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=20d23b227500566d4a2b6db791619d476fe3b078
Author: Chia-I Wu olva...@gmail.com
Date:   Wed Jun 5 12:04:46 2013 +0800

ilo: construct 3DSTATE_SF in create_rasterizer_state()

Add ilo_rasterizer_sf and initialize it in create_rasterizer_state().

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c2fea206fa279f40ecca6a1dba00251857e1029
Author: Chia-I Wu olva...@gmail.com
Date:   Tue Jun 4 18:37:23 2013 +0800

ilo: construct 3DSTATE_CLIP in create_rasterizer_state()

Add ilo_rasterizer_clip and initialize it in create_rasterizer_state().

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4006f4ce265199b1ad8dfc9e8ca7fb5176a44527
Author: Chia-I Wu olva...@gmail.com
Date:   Mon Jun 3 15:34:13 2013 +0800

ilo: use emit_SURFACE_STATE() for render targets

Introduce ilo_surface_cso and initialize it in create_surface().  With the
change, we can emit SURFACE_STATE directly from the CSO and remove
emit_surf_SURFACE_STATE().  We do not deal with depth/stencil surfaces yet.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5354dc742899c498a97fe6f64cc5d9237beb1e9f
Author: Chia-I Wu olva...@gmail.com
Date:   Mon Jun 3 15:25:48 2013 +0800

ilo: use emit_SURFACE_STATE() for constant buffers

Introduce ilo_cbuf_cso and initialize it in set_constant_buffer().  As
ilo_view_surface is embedded in ilo_cbuf_cso, switch to emit_SURFACE_STATE()
for constant buffers and remove emit_cbuf_SURFACE_STATE().

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d82885d3cd9c5ab90e4777da8dfd723da273cd8
Author: Chia-I Wu olva...@gmail.com
Date:   Thu Jun 6 11:28:02 2013 +0800

ilo: add emit_SURFACE_STATE() for sampler views

Introduce ilo_view_cso and initialize it in create_sampler_view().  Add
emit_SURFACE_STATE() to GPE, which can emit SURFACE_STATE from
ilo_view_surface.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=39e947569e5c0e159045aa5771e0ee5509eedee4
Author: Chia-I Wu olva...@gmail.com
Date:   Thu Jun 6 11:16:13 2013 +0800

ilo: add ilo_view_surface for SURFACE_STATE

Define struct ilo_view_surface for SURFACE_STATE construction and emission.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6983ea035d6bef345517a13fed6abc1441407cf
Author: Courtney Goeltzenleuchter court...@lunarg.com
Date:   Fri May 31 13:43:11 2013 -0600

ilo: convert generic depth-stencil-alpha pipe state to ilo pipe state

Moving the work to create time reduces the work at emit time.
Saves time overall as create work is only done once.
Fix compiler warning in gen7_pipeline_sol.

[olv: remember pipe_alpha_state instead of pipe_depth_stencil_alpha_state in
  ilo_dsa_state]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=70e78211d6c09b3076ac261d2cde9d0037540065
Author: Chia-I Wu olva...@gmail.com
Date:   Sat Jun 1 02:00:55 2013 +0800

ilo: introduce vertex element CSO

Introduce ilo_ve_cso and initialize it in create_vertex_elements_state().
This commit goes a step further by setting up mappings from HW VB to PIPE 
VB,
which we failed to do previously.  That allows us to support instanced
rendering.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4fa98db0c9a5d640fee946c713c8d06597e47f3
Author: Chia-I Wu olva...@gmail.com
Date:   Mon Jun 3 12:35:01 2013 +0800

ilo: simplify emit_3DSTATE_DEPTH_BUFFER()

Remove hiz and dsa from the parameters.  We would know whether HiZ buffer
exists from ilo_texture once it is supported.  DSA state should not affect
3DSTATE_DEPTH_BUFFER.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eea1be2072a1c980871d80df71d3e39a67fdfb0a
Author: Chia-I Wu olva...@gmail.com
Date:   Fri May 31 16:11:38 2013 +0800

ilo: introduce blend CSO

Introduce ilo_blend_cso and initialize it in create_blend_state().  This 
saves
us from having to construct hardware blend states in draw_vbo().

URL:

Mesa (master): 23 new commits

[Kenneth Graunke]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b2e0293213dcff24e26a4968a19262bfe7a781b9
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sun Oct 14 17:04:01 2012 -0700

mesa: Remove PROGRAM_WRITE_ONLY register type.

More dead code.  I'm not sure what it was for.

Reviewed-by: Brian Paul bri...@vmware.com
Reviewed-by: Eric Anholt e...@anholt.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=01d2bd34f47fc79579808f20b21ad46d43fe8fc2
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Wed Oct 10 17:07:53 2012 -0700

mesa: Remove dead _mesa_num_parameters_of_type() function.

Reviewed-by: Brian Paul bri...@vmware.com
Reviewed-by: Eric Anholt e...@anholt.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1366db2ef605e063f949acb31b63bd603ea6e6b4
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Wed Oct 10 17:06:41 2012 -0700

mesa: Remove dead _mesa_add_attribute() function.

Reviewed-by: Brian Paul bri...@vmware.com
Reviewed-by: Eric Anholt e...@anholt.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0021cb0fb7c28ff9f496f02b7bb3b2ab0722304
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sun Oct 14 16:56:42 2012 -0700

mesa: Remove remnants of PROGRAM_VARYING.

The previous patch removed the producer of things in this file.
Since there aren't any, we can remove it.

Reviewed-by: Brian Paul bri...@vmware.com
Reviewed-by: Eric Anholt e...@anholt.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eda4a4ae81481c4b0a300ad91e607a18a8d81cb3
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Wed Oct 10 17:04:33 2012 -0700

mesa: Remove dead _mesa_add_varying() function.

Reviewed-by: Brian Paul bri...@vmware.com
Reviewed-by: Eric Anholt e...@anholt.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7cfe3fc708ce7d90699ec3144691371740d62e6
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Wed Oct 10 17:02:45 2012 -0700

mesa: Remove dead program_parameter::Flags field.

All flags are now gone, so we can stop storing and passing this around.

Reviewed-by: Brian Paul bri...@vmware.com
Reviewed-by: Eric Anholt e...@anholt.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5bb6f15f79a58e145817edf4894d53402ebdd5ba
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Mon Oct 15 11:10:47 2012 -0700

st/mesa: Remove the PROG_PARAM_BIT_CYL_WRAP flag. [v2]

Nobody ever set the flag, which makes this dead code.

v2: Leave the ureg_DECL_fs_input_cyl function in place, even though it's
unused, since VMWare uses it for their internal projects.

Reviewed-by: Eric Anholt e...@anholt.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b13252bba7e0f6f70adf7036874988b810a67a3
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Wed Oct 10 16:52:23 2012 -0700

mesa: Remove GLSL-related PROG_PARAM_BIT flags.

GLSL doesn't use the program code anymore.  Accordingly, there were no
consumers of these flags, so there's no need to define them.

Reviewed-by: Brian Paul bri...@vmware.com
Reviewed-by: Eric Anholt e...@anholt.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d418d16165624a59b2049d4097b4ab0dc82ffa9
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sun Oct 14 16:43:15 2012 -0700

mesa: Remove support for named parameters.

These were only part of NV_fragment_program, so we can kill them.

The fact that PROGRAM_NAMED_PARAM appears in r200_vertprog.c is rather
comedic, but also demonstrates that people just spam the various types
of parameters everywhere because they're confusing.

Reviewed-by: Brian Paul bri...@vmware.com
Reviewed-by: Eric Anholt e...@anholt.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d67e52b0271a0abf44a68cfd5968f75334f6a06d
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sun Oct 14 16:36:21 2012 -0700

driconf: Remove force enable for NV_vertex_program.

Reviewed-by: Brian Paul bri...@vmware.com
Reviewed-by: Eric Anholt e...@anholt.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=58c466519d82fe040e9e20263058a03395a7b95b
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sun Oct 14 16:27:51 2012 -0700

mesa: Remove yet more remnants of NV_fragment_program.

Reviewed-by: Brian Paul bri...@vmware.com
Reviewed-by: Eric Anholt e...@anholt.net

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e5f03f23a049c7d7960b75b1aaa2d0d1fb1e2d48
Author: Kenneth Graunke kenn...@whitecape.org
Date:   Sun Oct 14 16:12:47 2012 -0700

mesa: Remove some miscellaneous NV program stuff from arbprogram.c.

Reviewed-by: Brian Paul bri...@vmware.com
Reviewed-by: Eric Anholt e...@anholt.net

URL:

Mesa (master): 23 new commits

[Marek Olšák]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0cc61bd91f5ef84bacaf5e7c6cda9eeefed478d
Author: Marek Olšák mar...@gmail.com
Date:   Mon Aug 13 23:37:30 2012 +0200

gallium/u_blitter: document custom meta helpers

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b3b5bb9ddb05989b2dc5fc17f88491bbd0e6ecac
Author: Marek Olšák mar...@gmail.com
Date:   Wed Aug 15 19:11:51 2012 +0200

r600g: disable handling of DISCARD_RANGE

https://bugs.freedesktop.org/show_bug.cgi?id=53130

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=44f14ebd7b9ba7186342039d2602fdd6ea5077f5
Author: Marek Olšák mar...@gmail.com
Date:   Thu Jul 5 20:06:41 2012 +0200

r600g: implement timestamp query and get_timestamp hook

Reviewed-by: Alex Deucher alexander.deuc...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1932bc8aaeb59287a7f769b0cb9a55f49dd6d553
Author: Marek Olšák mar...@gmail.com
Date:   Thu Aug 9 17:22:35 2012 +0200

r600g: enable MSAA on evergreen by default

v2: add the DRM version check

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=870af19d70bf985a253f1ea8398fb7ec8704cf9c
Author: Marek Olšák mar...@gmail.com
Date:   Thu Aug 9 17:21:56 2012 +0200

r600g: implement copying between MSAA textures

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f86915c5322b096b7154b6c84e21288074b775d
Author: Marek Olšák mar...@gmail.com
Date:   Thu Aug 9 17:21:10 2012 +0200

r600g: implement MSAA color resolve

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=94b634eca0e2bd32d4b5bd92d06d510eae8a5625
Author: Marek Olšák mar...@gmail.com
Date:   Thu Aug 9 17:17:18 2012 +0200

r600g: implement MSAA depth-stencil decompression and resolve

and integer textures, which are resolved the same as depth, I think.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d3ad2dd2ba3ccdd211dbc618404519930631be2
Author: Marek Olšák mar...@gmail.com
Date:   Thu Aug 9 17:01:46 2012 +0200

r600g: implement TXQ_LZ opcode

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b78df9c81f1ca8af2b750616de8ff440e99c3c1
Author: Marek Olšák mar...@gmail.com
Date:   Thu Aug 9 16:48:45 2012 +0200

r600g: implement MSAA rendering and texturing for evergreen and cayman

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a01791add08fbcb5386e0e9209ba21ed58fbdc42
Author: Marek Olšák mar...@gmail.com
Date:   Sun Jul 22 07:48:52 2012 +0200

r600g: implement set_sample_mask

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6517225078a6a56c9fb3c1ea9f310992e6400b77
Author: Marek Olšák mar...@gmail.com
Date:   Sun Jul 22 06:36:58 2012 +0200

r600g: implement alpha-to-coverage

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=26cb887ea213be2445e0fd64364d9264ed4fbfd2
Author: Marek Olšák mar...@gmail.com
Date:   Sat Aug 4 01:50:10 2012 +0200

r600g: implement alpha-to-one

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f215952760b2e5a92b25ddfa89469c1ec110160
Author: Marek Olšák mar...@gmail.com
Date:   Sat Aug 4 14:29:25 2012 +0200

r600g: remove support for 3-channel colorbuffers

We have no sampler support for them.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f14202f52c9f61f5bb5bfb6beaf954ef5c18de9
Author: Marek Olšák mar...@gmail.com
Date:   Sun Aug 12 17:18:23 2012 +0200

configure.ac: bump libdrm_radeon requirement to 2.6.38

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a7f4d3b740d4c85b0dc2b006c30c2bc4a3ed8597
Author: Marek Olšák mar...@gmail.com
Date:   Sat Aug 4 20:02:30 2012 +0200

winsys/radeon: print error if CS is overflowed

and don't submit the CS to the kernel.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc5e61d8842501e0b67907e360392eb355c8b73d
Author: Marek Olšák mar...@gmail.com
Date:   Sat Aug 4 03:15:29 2012 +0200

gallium/u_blitter: implement X and Y texture flipping

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=825b45366d5308fd3e8e71c0c1943cb6ca8f69ea
Author: Marek Olšák mar...@gmail.com
Date:   Wed Jul 25 12:38:22 2012 +0200

gallium/u_blitter: implement blitting multisample resources

It can blit only one sample at a time (it should be called in a loop).

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dacf5dc9ac1a700b86e0dc385513afaff41e7aea
Author: Marek Olšák mar...@gmail.com
Date:   Sat Jul 28 13:29:02 2012 +0200

gallium: add TGSI support for multisample textures

The only allowed instructions are TXQ_LZ and TXF.

TXQ_LZ is like TXQ, but without the LOD parameter (which is always zero
with MSAA textures)

The 3rd or the 4th texcoord component in TXF should contain the sample index
for a 2D_MSAA or 2D_ARRAY_MSAA texture, respectively.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba53573a8b14a7ab41307a38710610611dfa1cc5
Author: Marek Olšák mar...@gmail.com
Date:   Sat Aug 4 19:11:44 2012 +0200

Mesa (master): 23 new commits

[Tom Stellard]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fdd8df20e4a730f80bf4c331012d832bffd7072e
Author: Tom Stellard thomas.stell...@amd.com
Date:   Tue Jul 24 16:59:05 2012 +

r600g: Emit dispatch state for compute directly to the cs

We no longer rely on an evergreen_compute_resource for emitting dispatch
state.

Reviewed-by: Marek Olšák mar...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc0b8a46289d0e6b10c542df0856d51a0aabf9b0
Author: Tom Stellard thomas.stell...@amd.com
Date:   Tue Jul 24 14:49:25 2012 +

r600g: Initialize VGT_PRIMITIVE_TYPE in the start_cs_cmd atom

The value of this register will always be DI_PT_POINTLIST for compute
shaders.

Reviewed-by: Marek Olšák mar...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3b013049126fb44d65a0a67001b04acbe778613
Author: Tom Stellard thomas.stell...@amd.com
Date:   Tue Jul 24 14:23:12 2012 +

r600g: Atomize compute shader state

Reviewed-by: Marek Olšák mar...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=54973910676951050092c096046b213f6a6944b5
Author: Tom Stellard thomas.stell...@amd.com
Date:   Tue Jul 24 17:33:19 2012 +

r600g: Add helper functions for emitting compute SET_CONTEXT packets

Reviewed-by: Marek Olšák mar...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c9ef27276f83b021221fb7e2c7397719e143709c
Author: Tom Stellard thomas.stell...@amd.com
Date:   Wed Jul 25 08:56:08 2012 -0400

radeon/llvm: Add instruction defs for branches on SI

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ee0f0f03c6c174a160e5fb3882ec5c03cdfcd163
Author: Tom Stellard thomas.stell...@amd.com
Date:   Thu Jul 26 08:41:00 2012 -0400

radeon/llvm: Fix VOPC and V_CNDMASK encoding

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4bdd09d4714ae51b9f5675f7f5c678d431061e8
Author: Tom Stellard thomas.stell...@amd.com
Date:   Wed Jul 25 08:46:35 2012 -0400

radeon/llvm: Assert if we try to copy SCC reg

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd1f19a191c648e7c6fdaac3167e900e4fed4a6d
Author: Tom Stellard thomas.stell...@amd.com
Date:   Wed Jul 25 08:40:30 2012 -0400

radeon/llvm: Add SI DAG optimizations for setcc, select_cc

These are needed for correctly lowering branch instructions in some
cases.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd5d4c50738b15c4885105ef4dcc89a1ea9e02fb
Author: Tom Stellard thomas.stell...@amd.com
Date:   Wed Jul 25 08:32:43 2012 -0400

radeon/llvm: Add support for encoding SI branch instructions

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=50ff2dc0a4f553eb8d634d6f081fe5e4e25f6f48
Author: Tom Stellard thomas.stell...@amd.com
Date:   Wed Jul 25 08:30:32 2012 -0400

radeon/llvm: Add special nodes for SALU operations on VCC

The VCC register is tricky because the SALU views it as 64-bit, but the
VALU views it as 1-bit.  In order to deal with this we've added some
special bitcast and binary operations to help convert from the 64-bit
SALU view to the 1-bit VALU view and vice versa.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c424975572af2edd46863e5bb9fe3c51c96b4f9b
Author: Tom Stellard thomas.stell...@amd.com
Date:   Wed Jul 25 08:27:50 2012 -0400

radeon/llvm: Add i1 registers for SI.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bdda1cb914a291f42cb2221b42e922f22dccb777
Author: Tom Stellard thomas.stell...@amd.com
Date:   Wed Jul 25 08:33:34 2012 -0400

radeon/llvm: Fix CCReg definitions on SI

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae9be358f2d1e177648fb1803f152ff0b0bb9893
Author: Tom Stellard thomas.stell...@amd.com
Date:   Wed Jul 25 08:22:30 2012 -0400

radeonsi: Enable PIPE_SHADER_CAP_INTEGERS

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=022b54359a0c8cc0a219b19b1f381cce66b35d35
Author: Tom Stellard thomas.stell...@amd.com
Date:   Wed Jul 25 08:23:52 2012 -0400

radeonsi: Add support for loading integers from constant memory

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ad95bcb31fcf49015446f5158dfaf97fefac75cd
Author: Tom Stellard thomas.stell...@amd.com
Date:   Thu Jul 19 13:29:15 2012 -0400

radeon/llvm: Add bitconvert patterns for SI

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4cab682184640242d1e6f034f2b6bd7c4378c162
Author: Tom Stellard thomas.stell...@amd.com
Date:   Thu Jul 19 13:28:25 2012 -0400

radeon/llvm: Add custom lowering for SELECT_CC nodes on SI

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba76684292e568c164cb7cbe7537181af4b452b8
Author: Tom Stellard thomas.stell...@amd.com
Date:   Thu Jul 19 13:26:41 2012 -0400

radeon/llvm: Move conditional pattern leafs to common tablegen file

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d36455ba2c3febe5da6fc6f53e4acd98f771532a
Author: Tom Stellard 

Mesa (master): 23 new commits

[Christian König]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de3335dba8718efab8b80475f3fd78645def4e1c
Author: Christian König deathsim...@vodafone.de
Date:   Wed Jul 18 12:10:24 2012 +0200

radeonsi: remove old state handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b213c871a080472660eff271c72a3fcc5d3f578
Author: Christian König deathsim...@vodafone.de
Date:   Fri Jul 20 11:46:01 2012 +0200

radeonsi: move everything else into the new handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=53d47889e67b3de5267d55b90b2110802a6e7dc0
Author: Christian König deathsim...@vodafone.de
Date:   Fri Jul 20 11:08:22 2012 +0200

radeonsi: move format handling into si_state.c

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=73dd906ba0ef06ba03f1a05b08dbca3122016bac
Author: Christian König deathsim...@vodafone.de
Date:   Thu Jul 19 15:53:01 2012 +0200

radeonsi: move remaining sampler state into si_state.c

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ca9cf611b63e5576b596c21b73b1b639d250d649
Author: Christian König deathsim...@vodafone.de
Date:   Thu Jul 19 15:20:45 2012 +0200

radeonsi: move draw state into new handling

Split it out into si_state_draw.c

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d6b0b512acadbc5d64039063b5649fc401b3367
Author: Christian König deathsim...@vodafone.de
Date:   Thu Jul 19 14:45:00 2012 +0200

radeonsi: move constants to new state handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=baf20397569fb499f736e5ad2350b008b8207fad
Author: Christian König deathsim...@vodafone.de
Date:   Thu Jul 19 10:31:44 2012 +0200

radeonsi: move sampler states into new handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c09f11e5cefd437bb8185539430786dc245c96f
Author: Christian König deathsim...@vodafone.de
Date:   Wed Jul 18 17:39:15 2012 +0200

radeonsi: move shaders to new handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bd2a5cf328c21f2d5b243442ee2eac73a996b15c
Author: Christian König deathsim...@vodafone.de
Date:   Wed Jul 18 14:36:10 2012 +0200

radeonsi: move spi into new handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=840f05da6b92ba5266385836533842b9a9fc5da9
Author: Christian König deathsim...@vodafone.de
Date:   Wed Jul 18 13:11:03 2012 +0200

radeonsi: move init state to new handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e4e6f954ae8c83251c39da4327c29ba12fca8236
Author: Christian König deathsim...@vodafone.de
Date:   Wed Jul 18 12:07:20 2012 +0200

radeonsi: move draw_info to new state handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76660dfccede74782ac0d409da171ddbd61fae41
Author: Christian König deathsim...@vodafone.de
Date:   Wed Jul 18 11:36:28 2012 +0200

radeonsi: move CB_TARGET_MASK into fb/blend state

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6937211da019223ca3b8fd0be6ed5a5fe35c706
Author: Christian König deathsim...@vodafone.de
Date:   Wed Jul 18 11:03:32 2012 +0200

radeonsi: move stencil_ref to new handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b41b3eb9893b9bac8df363fef4d10c68798616e2
Author: Christian König deathsim...@vodafone.de
Date:   Wed Jul 18 10:46:36 2012 +0200

radeonsi: move dsa state to new handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bd18a316e1495f501911d89c8b373382d1f8c8c2
Author: Christian König deathsim...@vodafone.de
Date:   Wed Jul 18 10:03:34 2012 +0200

radeonsi: move infeered fb/rs state to new handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f67fae0e43fa0909b57b8a07858d37caecd5cbb1
Author: Christian König deathsim...@vodafone.de
Date:   Tue Jul 17 23:43:00 2012 +0200

radeonsi: move rasterizer state into new handling

Signed-off-by: Christian König deathsim...@vodafone.de

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=835098a5290e59bb7b468eb987db67b0e1913c67
Author: Christian König 

Mesa (master): 23 new commits

[Jose Fonseca]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6171a9dd99713266091982215bf1008c9ac8e64
Merge: 49ba607abab17cc07e9f163f5415636474fd7940 
3dcdca433a5d6cde1c0b4d69ff0aa3a5eee26473
Author: José Fonseca jfons...@vmware.com
Date:   Tue Apr 20 11:07:08 2010 +0200

Merge branch 'gallium-index-bias'

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3dcdca433a5d6cde1c0b4d69ff0aa3a5eee26473
Author: José Fonseca jfons...@vmware.com
Date:   Tue Apr 20 11:06:05 2010 +0200

draw: No need to rebase for elt_bias.

As we are rebasing to min_index + elt_bias, and the vertex buffer has no
elt_bias.

I still don't know how to exercise this code. I hope this is now right.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e8154e8666ec9375936bbe3fa2ca925ff9be5df
Author: José Fonseca jfons...@vmware.com
Date:   Tue Apr 20 10:32:06 2010 +0200

draw: Fix cache elt_bias implementation.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=493a1bb822f80f48cf284cb572acb5dd393a07e1
Author: José Fonseca jfons...@vmware.com
Date:   Tue Apr 20 10:22:28 2010 +0200

gallium/docs: Make it clear that minIndex, maxIndex is exclusively a index 
buffer characteristic.

Unlike the indexBias which is specific to a draw call.

This are the semantics of both D3D and GL ARB_draw_elements_base_vertex
extension.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1d3f42c47ee0d3c5f13f5b30e6b113d6b542f64
Author: José Fonseca jfons...@vmware.com
Date:   Tue Apr 20 10:19:42 2010 +0200

draw: Fix typo resulting from bad regular expression in index bias addition.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dfadf5a579281c6dd4ecdd4ecd5568fbbb1de17e
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:18:45 2010 +0200

r300g: Adapt for index bias interface change.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c785c0d2c2b5f3ead4b3cf31ad6af02bd90f3a5
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:18:28 2010 +0200

nvfx: Adapt for index bias interface change.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f6f7324bbf03494dc26e266d96919fec6a1f08ba
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:17:45 2010 +0200

nv50: Adapt for index bias interface change.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=583f51ba4bb1029d9d4f338ca3c8f4702abc
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:17:11 2010 +0200

retrace: Support index bias.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=17a43c1718605e4c95bcd7f554b0a5b8293d2578
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:16:57 2010 +0200

mesa/st: Update for index bias interface change.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5620216c984cdbc8983bc1861ebb09380f3467e4
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:16:34 2010 +0200

st/python: Use index bias.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b658580ee2ad33aa9c7438b1efc6c35d6bfab00
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:16:20 2010 +0200

trace: Implement index bias.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9515b78859b52b4532cc9e06366428f2c49c7869
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:16:08 2010 +0200

svga: Implement index bias.

Untested.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=989861fc5ea1792e7ea1be07389db7c3e3b8e383
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:15:39 2010 +0200

softpipe: Implement index bias.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d27a53d46931d2286c90b21ff7f06f44a7a726bc
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:15:11 2010 +0200

llvmpipe: Implement index bias.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=382e9cc07b9193924b0eaf840a4d34cade2c7d92
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:15:05 2010 +0200

identity: Implement index bias.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ca0f45d8af5aa3152350594093797210d052b6e
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:14:58 2010 +0200

i965g: Implement index bias.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e7facdd8fbbccbf6f384a4c9bbb394c176f2c4b
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:14:48 2010 +0200

i915: Implement index bias.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8d4638a092d44c0746ff124d3414c20c735e9f6
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:14:35 2010 +0200

failover: Implement index bias.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=150d12679d4d2550e0e54d76a43d153c4254ddfe
Author: José Fonseca jfons...@vmware.com
Date:   Mon Apr 19 18:14:23 2010 +0200

cell: Implement index bias.

URL:

Mesa (master): 23 new commits

[Zack Rusin]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae69f9fbf0a1aab7186e5b644085a5fe5aea99af
Merge: fe130a7e5e3e7cc31e070d8088203706c687e6e8 
695a029e9b8c70a34c5cde01ab32ac377e513707
Author: Zack Rusin za...@vmware.com
Date:   Tue Apr 6 20:09:08 2010 -0400

Merge branch 'gallium_draw_llvm'

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=695a029e9b8c70a34c5cde01ab32ac377e513707
Author: Zack Rusin za...@vmware.com
Date:   Tue Apr 6 17:14:30 2010 -0400

llvmpipe: use a define to decide whether to use draw llvm paths

right now disabled by default

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=06bda76c08618eaf68de70f4f776329e6ef1f196
Author: Zack Rusin za...@vmware.com
Date:   Tue Apr 6 17:14:13 2010 -0400

draw llvm: disable debugging output

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=323fdd8ae5baf16df6c57754e58adc8e22d28e10
Author: Zack Rusin za...@vmware.com
Date:   Tue Apr 6 16:28:48 2010 -0400

draw llvm: implement simple pipeline caching using variants

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e0bf24139f6047f505b138392fc0f1d6584d6bc
Author: Zack Rusin za...@vmware.com
Date:   Tue Apr 6 12:37:31 2010 -0400

draw llvm: fix iteration for larger vertex arrays

we were trying to store the outputs starting at the same offset we
were using for the input arrays, which was writing beyond the end of
the output array.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de0647dbad96db222b5643d03b3f61b093e7ef76
Author: Zack Rusin za...@vmware.com
Date:   Tue Apr 6 12:07:33 2010 -0400

draw llvm: iterate with the correct stop over the outputs

it's whatever the var step is (4 usually) not an unconditional 1

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aeaf2cf18fc74f2d65fcadfad8c19f244ccd4206
Author: Zack Rusin za...@vmware.com
Date:   Tue Apr 6 11:00:35 2010 -0400

draw llvm: fix draw arrays

we don't index within the outputs but only within the inputs

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9dd70e7b85ddbc73bd976c4dab81476aa36c557e
Author: Zack Rusin za...@vmware.com
Date:   Tue Apr 6 00:13:20 2010 -0400

draw llvm: fix loop iteration and vertex header offsets

the loop was doing a NE comparison which we could have skipped if the prim
was triangles (3 verts) and our step was 4 verts. also fix offsets in 
conversion
to aos.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b0bab167cd541f70c32249ca3e70da88b8c93c5
Author: Zack Rusin za...@vmware.com
Date:   Mon Apr 5 16:43:53 2010 -0400

draw llvm: when generating the vertex_header struct adjust its name

change the name to not clash and accuretly represent the number of inputs
we store in the data member

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb31d3b5fec6260142ed27cc37f7155915ecfe89
Author: Zack Rusin za...@vmware.com
Date:   Fri Apr 2 18:52:32 2010 -0400

draw llvm: fix storing of outputs for the rest of the pipeline

there's no good way of aligning the output's, and since the vertex_header
is variable sized in the first place we need to extract elements from a 
vector
and store them individually into an array. this gets the basic examples 
working
again

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=557b75248a3ebc6daabe3c2b69ac24d409aaa1e0
Author: Zack Rusin za...@vmware.com
Date:   Fri Apr 2 15:56:34 2010 -0400

draw llvm: fix translation of formats with variable components

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab5c09738760bc1b665b9809eaf921f4ac27057e
Author: Zack Rusin za...@vmware.com
Date:   Thu Apr 1 18:58:51 2010 -0400

draw llvm: a lot better storing implementation

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6d052e4fd83d923776320cf5fef66abcd4bf3d0
Merge: ae5487d4276007e466b6a7c783d6fb740f9539c5 
2fb655d1dbb3f8425aeff1597271262661ef206b
Author: Zack Rusin za...@vmware.com
Date:   Wed Mar 31 22:16:09 2010 -0400

Merge remote branch 'origin/master' into gallium_draw_llvm

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae5487d4276007e466b6a7c783d6fb740f9539c5
Author: Zack Rusin za...@vmware.com
Date:   Wed Mar 31 22:15:12 2010 -0400

draw llvm: fix iteration over buffers

fetching was converting garbage

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=880e3fb09b538f6f0b6fad2db7e0e10e9df43555
Merge: 93e342574f5fc95789028dbe7cf637257562e9bb 
4afed821baa6993d85a07c67d42ea40d4e9a600a
Author: Zack Rusin za...@vmware.com
Date:   Tue Mar 30 21:10:33 2010 -0400

Merge remote branch 'origin/master' into gallium_draw_llvm

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=93e342574f5fc95789028dbe7cf637257562e9bb
Author: Zack Rusin za...@vmware.com
Date:   Tue Mar 30 21:09:51 2010 -0400

draw llvm: fix a warning

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0f946e90069f34e69a0492caa7a2867ae184e9a

Mesa (master): 23 new commits

[Michał Król]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7855fcb63ba0594cdaee15f8579b66af651828e0
Merge: 465333ab7078daf878ad34ab172ebb15f8a003b3 
b1ed72ebe2599ec178f51d86fd42f26486b9a19b
Author: Michal Krol mic...@vmware.com
Date:   Fri Dec 18 09:08:26 2009 +0100

Merge branch 'pipe-format-simplify'

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b1ed72ebe2599ec178f51d86fd42f26486b9a19b
Author: Michal Krol mic...@vmware.com
Date:   Thu Dec 17 23:41:57 2009 +0100

Move the remaining format pf_get_* functions to u_format.h.

Previously they depended on format blocks, but after removing those
they started depending on format encoding.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec5577a83da18890a4f334af2241aca41b6ed31b
Author: Michal Krol mic...@vmware.com
Date:   Thu Dec 17 22:39:03 2009 +0100

util: Remove util_format_get_block().

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=16c6dce013f089d072256652f012b3b604781bfd
Merge: 440fc5bf788201a265892ff2e12bf102e63a2896 
294bd53d4b6b15a6890599c46f14b205a3c738bf
Author: Michal Krol mic...@vmware.com
Date:   Thu Dec 17 22:37:15 2009 +0100

Merge branch 'master' into pipe-format-simplify

Conflicts:
src/gallium/auxiliary/draw/draw_pipe_aaline.c
src/gallium/auxiliary/draw/draw_pipe_pstipple.c
src/gallium/auxiliary/util/u_blit.c
src/gallium/auxiliary/util/u_gen_mipmap.c
src/gallium/auxiliary/util/u_surface.c
src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c
src/gallium/drivers/cell/ppu/cell_texture.c
src/gallium/drivers/llvmpipe/lp_texture.c
src/gallium/drivers/r300/r300_emit.c
src/gallium/drivers/r300/r300_texture.c
src/gallium/drivers/softpipe/sp_texture.c
src/gallium/drivers/softpipe/sp_tile_cache.c
src/gallium/drivers/svga/svga_state_vs.c
src/gallium/include/pipe/p_format.h
src/gallium/state_trackers/dri/dri_drawable.c
src/gallium/state_trackers/egl/egl_surface.c
src/gallium/state_trackers/python/p_device.i
src/gallium/state_trackers/python/st_softpipe_winsys.c
src/gallium/state_trackers/vega/api_filters.c
src/gallium/state_trackers/vega/image.c
src/gallium/state_trackers/vega/mask.c
src/gallium/state_trackers/vega/paint.c
src/gallium/state_trackers/vega/renderer.c
src/gallium/state_trackers/vega/vg_tracker.c
src/gallium/state_trackers/xorg/xorg_crtc.c
src/gallium/state_trackers/xorg/xorg_dri2.c
src/gallium/state_trackers/xorg/xorg_exa.c
src/gallium/state_trackers/xorg/xorg_renderer.c
src/gallium/state_trackers/xorg/xorg_xv.c
src/gallium/state_trackers/xorg/xvmc/surface.c
src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
src/gallium/winsys/drm/radeon/core/radeon_buffer.c
src/gallium/winsys/egl_xlib/sw_winsys.c
src/gallium/winsys/g3dvl/xlib/xsp_winsys.c
src/gallium/winsys/gdi/gdi_llvmpipe_winsys.c
src/gallium/winsys/gdi/gdi_softpipe_winsys.c
src/gallium/winsys/xlib/xlib_cell.c
src/gallium/winsys/xlib/xlib_llvmpipe.c
src/gallium/winsys/xlib/xlib_softpipe.c
src/mesa/state_tracker/st_cb_fbo.c
src/mesa/state_tracker/st_cb_texture.c
src/mesa/state_tracker/st_texture.c

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=440fc5bf788201a265892ff2e12bf102e63a2896
Author: Michal Krol mic...@vmware.com
Date:   Thu Dec 17 21:57:24 2009 +0100

util/format: Fix bogus assertion.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3af2ddbe943f0fe0d6b0ba9e627cbb82d0cc79f2
Author: Michal Krol mic...@vmware.com
Date:   Thu Dec 17 21:25:47 2009 +0100

s/desc-type/desc-channel[0].type/

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dfdf83d714c0d32d9182eb3001cf642aa6cb5c87
Author: Michal Krol mic...@vmware.com
Date:   Wed Dec 9 14:22:30 2009 +0100

Revert Simplify the redundant meaning of format layout.

This reverts commit eb926ddf9eee1095c7fc12013f0b8375bbaeca6f.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb926ddf9eee1095c7fc12013f0b8375bbaeca6f
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 8 20:48:47 2009 +0100

Simplify the redundant meaning of format layout.

We really just need to know whether the format is compressed or not.
For more detailed information format colorspace should suffice.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=876a785a182d7987786377ff0a44ee40628254f3
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 8 19:58:13 2009 +0100

Format layout cannot be used to distinguish scaled/normalised formats.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ddbd2d08b7c5b5653981db8fec58d5c3244049cd
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 8 15:46:15 2009 +0100

util/format: Take advantage of sequential nature of pipe_format enum.

Mesa (master): 23 new commits

[Michał Król]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7a43c39d202333a74745e7724a76f36d66d8763b
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 10:07:15 2009 +0100

cso: Fix function prototype.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=57ed791305ded187c455b07e6c6a5b916f37a293
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 09:50:38 2009 +0100

trace: Implement separate vertex sampler state.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8969db2f8410fd3b653734948251ada4284a3c6
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 09:39:08 2009 +0100

fo: Implement separate vertex sampler state.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2f7bd855af49752b1c77746542c62f1c529e953
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 09:01:27 2009 +0100

id: Implement separate vertex sampler state.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f900c33ae6ede1c6f309628b1369a1b968a115d
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:54:30 2009 +0100

trace: Reduce double semicolons to single ones.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f884ed993500171ad91fc9f2552574face9ee17
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:52:37 2009 +0100

sp: Do not falsely advertise support for some SNORM formats.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a619e62bffa6f21330df747940e322909937806
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:51:20 2009 +0100

sp: Implement separate vertex sampler state.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ee86b1b58dce4c8416b5333d0ed43d059ba2a200
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:47:00 2009 +0100

python: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e197652ce08cacf0fdbf0509db5eb26500d556c5
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:44:18 2009 +0100

st: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eeb8dd12b48c6ad3f466cf0ea88472fca576ebd4
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:43:51 2009 +0100

trace: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8eecd3bafb759df3f1853490cf149d053c8fcbce
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:40:53 2009 +0100

svga: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1bcedc4ce48031c9e5d2a2430d27c7a9aaa8b37
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:40:31 2009 +0100

r300: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d15bb1cba3fd2d36c48e33e14cc3c548cf40d555
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:40:21 2009 +0100

nv: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=551b2db82b5e5093dc19bde130785aceb92868a6
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:40:04 2009 +0100

lp: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0d3abf3834d3ae6107e66b61d8660e6c09a0a99
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:39:49 2009 +0100

id: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=25bb04a1ee9b3f28bfa6e60d7ce71ff23726c5b6
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:39:19 2009 +0100

i915: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e04324b8f93919d75f224644a160a32405740860
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:39:07 2009 +0100

fo: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd3409ce059e46b4b675d2ad6f1f3b75939aa2ab
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:38:32 2009 +0100

cell: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=204e586c5648c384041a6cf1d095e160ef474019
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:38:06 2009 +0100

vl: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f33c064f32bf3635becd1b2019f670abe7a35ab3
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:37:15 2009 +0100

draw: Update for renamed sampler/texture state setters.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd4aa4f32365a5f054e7fc36b558680dcac66d1b
Author: Michal Krol mic...@vmware.com
Date:   Tue Dec 1 08:35:43 2009 +0100

cso: Add support for separate vertex sampler state.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=15d1b406afd733b5f46b16dc933e29c218cdca39

Mesa (master): 23 new commits

[Brian Paul]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d58724c51c387c360d2423e29b80ddc0bfa66b7
Merge: 81a0ef3f2068448a8b544826eaa7d3382b9c769b 
9424d81d18770f0c436f0876dffe07cf7c094db4
Author: Brian Paul bri...@vmware.com
Date:   Thu Jun 4 13:16:13 2009 -0600

Merge branch 'mesa_7_5_branch'

Conflicts:

src/mesa/main/context.c

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9424d81d18770f0c436f0876dffe07cf7c094db4
Author: Brian Paul bri...@vmware.com
Date:   Thu Jun 4 13:13:14 2009 -0600

softpipe: separate case for PIPE_PRIM_POLYGON in sp_vbuf_draw()

Because of flat shading, we can't use same code as PIPE_PRIM_TRIANGLE_FAN.
This is a follow-on to commit a59575d8fbe8b0ca053cc8366ce7a42bc660158a.

(cherry picked from commit 086ecea179ed572c89aa77c5f465671a5cef87a7)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6907650211d136ee7cb5a8914c32196d35a75bf3
Author: Brian Paul bri...@vmware.com
Date:   Thu Jun 4 13:12:13 2009 -0600

softpipe: fix incorrect tri vertex order for PIPE_PRIM_POLYGON rendering

This fixes incorrect front/back-face orientation.

(cherry picked from commit a64bbdaa3e0b036a880d6db65ceb4a66205062f1)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d37795c45334010c70b2e1c23fca0e49ff607a6e
Author: Brian Paul bri...@vmware.com
Date:   Thu Jun 4 13:10:19 2009 -0600

st/mesa: increase ST_MAX_SHADER_TOKENS to 8k

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=45e744dddc8a8f3b42610bfa512bc296bd5264bc
Author: Brian Paul bri...@vmware.com
Date:   Thu Jun 4 13:08:52 2009 -0600

tgsi: increase MAX_LABELS to 4096

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc7f92478286041a018ac4e72d2ccedeea7c0eca
Author: José Fonseca jfons...@vmware.com
Date:   Tue Jun 2 18:41:12 2009 -0700

scons: Less aggressive optimizations for MSVC 64bit compiler.

MSVC 64bit compiler takes forever on some of the files.

Might want to revisit this again later.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f50c4fab8acfe291ddd426f331eea5eec66ba13
Author: José Fonseca jfons...@vmware.com
Date:   Tue Jun 2 18:23:12 2009 -0700

scons: Output nice summary messages instead of long command lines.

You can still get the old behavior by passing the option quiet=no to scons.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=273117ceed47bff58a0f475dd36b37721e997f91
Author: José Fonseca jfons...@vmware.com
Date:   Tue Jun 2 16:41:45 2009 -0700

util: Unsaved change missing from last commit.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=840af5fd62edc01769cc3818702ea399a0c68c40
Author: José Fonseca jfons...@vmware.com
Date:   Tue Jun 2 11:46:53 2009 -0700

util: Support Z24S8/Z24X8 - unsigned conversion.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c91df4c1534e2db2274b6d08e90470bf21a49e2a
Author: José Fonseca jfons...@vmware.com
Date:   Tue Jun 2 11:46:06 2009 -0700

util: Fix 24 to 32 bit expansion binary arithmetic expression.

When approaching y = x * 0x / 0xff with bit arithmetic, the
8 least significant bits of y should come from the
8 most significant bits of x.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=12e94d892e3322be5c8a1594702d69e7a02d5274
Author: Brian Paul bri...@vmware.com
Date:   Tue Jun 2 10:27:05 2009 -0600

mesa: release VBO and PBO references upon context destruction

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb3a9f984de6b1a167c60c345d51d55b8c0ca80b
Author: Brian Paul bri...@vmware.com
Date:   Tue Jun 2 10:26:50 2009 -0600

mesa: add #define FEATURE_ARB_pixel_buffer_object

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=16fbd391291de8eddcd01a1a10e6801da299209b
Author: Ian Romanick ian.d.roman...@intel.com
Date:   Mon May 18 13:26:16 2009 -0700

intel: Clip to window after calling Driver.TexImage2D

This prevents the width / height from being clipped to the window size 
before
the texture is allocated.  This matches intelCopyTexImage1D.

This should fix bug #21227

Signed-off-by: Ian Romanick ian.roman...@intel.com
(cherry picked from commit 129f311673c99eb912d659023e50bc5f0ef53249)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1aef032d438aaa40ec28bf279ad5c089370773f0
Author: Keith Whitwell kei...@vmware.com
Date:   Mon Jun 1 20:16:20 2009 -0700

gallium/draw: Free specialized versions of driver shaders

The pstipple, aaline and aapoint code would create specialized versions
of shaders and upload them to the driver -- but never free them.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=003cfd4dd2491675058c53a8f59553f2443be349
Author: Keith Whitwell kei...@vmware.com
Date:   Mon Jun 1 20:15:28 2009 -0700

draw: free more token arrays

The AA line and point code also needs to free token arrays after
building driver shaders.

URL: