[pypy-commit] pypy s390x-backend: disabled blocking tests
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82053:074033f70453
Date: 2016-02-03 11:01 +0100
http://bitbucket.org/pypy/pypy/changeset/074033f70453/
Log:disabled blocking tests
diff --git a/pypy/module/__pypy__/test/test_signal.py
b/pypy/module/__pypy__/test/test_signal.py
--- a/pypy/module/__pypy__/test/test_signal.py
+++ b/pypy/module/__pypy__/test/test_signal.py
@@ -71,6 +71,8 @@
def test_thread_fork_signals(self):
import __pypy__
import os, thread, signal
+if os.uname()[4] == 's390x':
+skip("skip for now s390x")
if not hasattr(os, 'fork'):
skip("No fork on this platform")
diff --git a/pypy/module/select/test/test_select.py
b/pypy/module/select/test/test_select.py
--- a/pypy/module/select/test/test_select.py
+++ b/pypy/module/select/test/test_select.py
@@ -329,6 +329,10 @@
"usemodules": ["select", "_socket", "time", "thread"],
}
+import os
+if os.uname()[4] == 's390x':
+py.test.skip("build bot for s390x cannot open sockets")
+
def w_make_server(self):
import socket
if hasattr(self, 'sock'):
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[pypy-commit] pypy s390x-backend: modified test to see if an empty print differs from a print with newline
Author: Richard Plangger Branch: s390x-backend Changeset: r82052:18bd2d236f85 Date: 2016-02-03 10:52 +0100 http://bitbucket.org/pypy/pypy/changeset/18bd2d236f85/ Log:modified test to see if an empty print differs from a print with newline diff --git a/pypy/module/select/test/test_select.py b/pypy/module/select/test/test_select.py --- a/pypy/module/select/test/test_select.py +++ b/pypy/module/select/test/test_select.py @@ -287,7 +287,8 @@ t = thread.start_new_thread(pollster.poll, ()) try: time.sleep(0.3) -for i in range(5): print '', # to release GIL untranslated +# TODO restore print '', if this is not the reason +for i in range(5): print 'release gil select' # to release GIL untranslated # trigger ufds array reallocation for fd in rfds: pollster.unregister(fd) ___ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit
[pypy-commit] pypy s390x-backend: added zEC12 to assembler command for test
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82055:a32a0a3922a4
Date: 2016-02-03 15:00 +0100
http://bitbucket.org/pypy/pypy/changeset/a32a0a3922a4/
Log:added zEC12 to assembler command for test
diff --git a/rpython/jit/backend/zarch/assembler.py
b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -1359,7 +1359,7 @@
mc.AGHIK(r.RSZ, lengthloc, l.imm(constsize))
if force_realignment:
# "& ~(WORD-1)"
-mc.RISBGN(r.RSZ, r.RSZ, loc.imm(0), loc.imm(0x80 | 60), loc.imm(0))
+mc.RISBGN(r.RSZ, r.RSZ, l.imm(0), l.imm(0x80 | 60), l.imm(0))
mc.AGRK(r.RSZ, r.RES, r.RSZ)
# now RSZ contains the total size in bytes, rounded up to a multiple
diff --git a/rpython/jit/backend/zarch/test/test_auto_encoding.py
b/rpython/jit/backend/zarch/test/test_auto_encoding.py
--- a/rpython/jit/backend/zarch/test/test_auto_encoding.py
+++ b/rpython/jit/backend/zarch/test/test_auto_encoding.py
@@ -205,7 +205,7 @@
g.write('%s\n' % op)
oplist.append(op)
g.write('\t.string "%s"\n' % END_TAG)
-proc = subprocess.Popen(['as', '-m64', '-mzarch',
+proc = subprocess.Popen(['as', '-m64', '-mzarch', '-march=zEC12',
inputname, '-o', filename],
stdout=subprocess.PIPE,
stderr=subprocess.PIPE)
diff --git a/rpython/translator/platform/linux.py
b/rpython/translator/platform/linux.py
--- a/rpython/translator/platform/linux.py
+++ b/rpython/translator/platform/linux.py
@@ -23,7 +23,7 @@
if platform.machine() == 's390x':
# force the right target arch for s390x
-cflags = ('-march=zEC12',) + cflags
+cflags = ('-march=zEC12','-m64','-mzarch') + cflags
def _args_for_shared(self, args):
return ['-shared'] + args
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[pypy-commit] pypy s390x-backend: do not execute auto assembler on 5 args + (takes far too long)
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82056:e9fe4f2225ca
Date: 2016-02-03 15:08 +0100
http://bitbucket.org/pypy/pypy/changeset/e9fe4f2225ca/
Log:do not execute auto assembler on 5 args + (takes far too long)
diff --git a/rpython/jit/backend/zarch/test/test_auto_encoding.py
b/rpython/jit/backend/zarch/test/test_auto_encoding.py
--- a/rpython/jit/backend/zarch/test/test_auto_encoding.py
+++ b/rpython/jit/backend/zarch/test/test_auto_encoding.py
@@ -237,6 +237,8 @@
return mode
def make_all_tests(self, methname, modes, args=[]):
+if methname.startswith("RIS"):
+return []
arg_types = self.get_func_arg_types(methname)
combinations = []
for i,m in enumerate(arg_types):
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[pypy-commit] pypy s390x-backend: big endian issue in cppyy test case
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82057:f49815ceed3a
Date: 2016-02-03 15:19 +0100
http://bitbucket.org/pypy/pypy/changeset/f49815ceed3a/
Log:big endian issue in cppyy test case
diff --git a/pypy/module/cppyy/src/dummy_backend.cxx
b/pypy/module/cppyy/src/dummy_backend.cxx
--- a/pypy/module/cppyy/src/dummy_backend.cxx
+++ b/pypy/module/cppyy/src/dummy_backend.cxx
@@ -390,7 +390,7 @@
((dummy::cppyy_test_data*)self)->destroy_arrays();
} else if (idx == s_methods["cppyy_test_data::set_bool"]) {
assert(self && nargs == 1);
-
((dummy::cppyy_test_data*)self)->set_bool((bool)((CPPYY_G__value*)args)[0].obj.in);
+
((dummy::cppyy_test_data*)self)->set_bool((bool)((CPPYY_G__value*)args)[0].obj.i);
} else if (idx == s_methods["cppyy_test_data::set_char"]) {
assert(self && nargs == 1);
((dummy::cppyy_test_data*)self)->set_char(((CPPYY_G__value*)args)[0].obj.ch);
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[pypy-commit] pypy s390x-backend: disabled more in test signal (bbot seems to still timeout...), simplifications in the malloc assembly operations
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82054:b2ed3adc63e7
Date: 2016-02-03 13:55 +0100
http://bitbucket.org/pypy/pypy/changeset/b2ed3adc63e7/
Log:disabled more in test signal (bbot seems to still timeout...),
simplifications in the malloc assembly operations
diff --git a/pypy/module/__pypy__/test/test_signal.py
b/pypy/module/__pypy__/test/test_signal.py
--- a/pypy/module/__pypy__/test/test_signal.py
+++ b/pypy/module/__pypy__/test/test_signal.py
@@ -2,6 +2,11 @@
from pypy.module.thread.test.support import GenericTestThread
+import os
+if os.uname()[4] == 's390x':
+# TMP!!!
+import py
+py.test.skip("skip for now s390x")
class AppTestMinimal:
spaceconfig = dict(usemodules=['__pypy__'])
@@ -71,8 +76,6 @@
def test_thread_fork_signals(self):
import __pypy__
import os, thread, signal
-if os.uname()[4] == 's390x':
-skip("skip for now s390x")
if not hasattr(os, 'fork'):
skip("No fork on this platform")
diff --git a/rpython/jit/backend/zarch/assembler.py
b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -1258,16 +1258,15 @@
mc.load_imm(r.r1, nursery_free_adr)
mc.load(r.RES, r.r1, 0) # load nursery_free
+mc.load(r.r14, r.r1, diff)# load nursery_top
-mc.LGR(r.RSZ, r.RES)
if check_imm_value(size):
mc.AGHI(r.RSZ, l.imm(size))
else:
-mc.load_imm(r.SCRATCH2, size)
-mc.AGR(r.RSZ, r.SCRATCH2)
+mc.load_imm(r.RSZ, size)
+mc.AGRK(r.RSZ, r.RES, r.RSZ)
-mc.load(r.SCRATCH2, r.r1, diff) # load nursery_top
-mc.cmp_op(r.RSZ, r.SCRATCH2, signed=False)
+mc.cmp_op(r.RSZ, r.r14, signed=False)
fast_jmp_pos = mc.currpos()
mc.reserve_cond_jump(short=True) # conditional jump, patched later
@@ -1276,7 +1275,6 @@
# new value of nursery_free_adr in RSZ and the adr of the new object
# in RES.
self.load_gcmap(mc, r.r1, gcmap)
-# no frame needed, r14 is saved on the jitframe
mc.branch_absolute(self.malloc_slowpath)
# here r1 holds nursery_free_addr
@@ -1301,14 +1299,11 @@
sizeloc = r.RSZ
mc.load(r.RES, r.r1, 0) # load nursery_free
+mc.load(r.r0, r.r1, diff)# load nursery_top
-mc.LGR(r.SCRATCH2, r.RES)
-mc.AGR(r.SCRATCH2, sizeloc) # sizeloc can be RSZ
-mc.LGR(r.RSZ, r.SCRATCH2)
+mc.AGRK(RSZ, r.RES, sizeloc)
-mc.load(r.SCRATCH2, r.r1, diff) # load nursery_top
-
-mc.cmp_op(r.RSZ, r.SCRATCH2, signed=False)
+mc.cmp_op(r.RSZ, r.r0, signed=False)
fast_jmp_pos = mc.currpos()
mc.reserve_cond_jump(short=True)# conditional jump, patched
later
@@ -1354,6 +1349,7 @@
# item size
mc.load(r.RES, r.r1, 0) # load nursery_free
+mc.load(r.SCRATCH2, r.r1, diff) # load nursery_top
assert arraydescr.basesize >= self.gc_minimal_size_in_nursery
constsize = arraydescr.basesize + self.gc_size_of_header
@@ -1363,14 +1359,12 @@
mc.AGHIK(r.RSZ, lengthloc, l.imm(constsize))
if force_realignment:
# "& ~(WORD-1)"
-mc.LGHI(r.SCRATCH2, l.imm(~(WORD-1)))
-mc.NGR(r.RSZ, r.SCRATCH2)
+mc.RISBGN(r.RSZ, r.RSZ, loc.imm(0), loc.imm(0x80 | 60), loc.imm(0))
mc.AGRK(r.RSZ, r.RES, r.RSZ)
# now RSZ contains the total size in bytes, rounded up to a multiple
# of WORD, plus nursery_free_adr
-mc.load(r.SCRATCH2, r.r1, diff) # load nursery_top
mc.cmp_op(r.RSZ, r.SCRATCH2, signed=False)
jmp_adr1 = mc.currpos()
diff --git a/rpython/jit/backend/zarch/instruction_builder.py
b/rpython/jit/backend/zarch/instruction_builder.py
--- a/rpython/jit/backend/zarch/instruction_builder.py
+++ b/rpython/jit/backend/zarch/instruction_builder.py
@@ -479,6 +479,7 @@
bt = argtypes[1] if len(argtypes) >= 2 else '-'
ct = argtypes[2] if len(argtypes) >= 3 else '-'
dt = argtypes[3] if len(argtypes) >= 4 else '-'
+et = argtypes[4] if len(argtypes) >= 5 else '-'
def function0(self):
return func(self)
def function1(self, a):
@@ -511,6 +512,13 @@
f = unpack_arg(b, bt)
g = unpack_arg(c, ct)
return func(self, e, f, g, 0)
+def function5(self, a, b, c, d, e):
+f = unpack_arg(a, at)
+g = unpack_arg(b, bt)
+h = unpack_arg(c, ct)
+i = unpack_arg(d, dt)
+j = unpack_arg(e, et)
+return func(self, f, g, h, i, j)
if len(argtypes) == 0:
function = function0
elif len(argtypes) == 1:
@@ -530,6 +538,8 @@
if argtypes[3] == '-':
# e.g. FIEBR or CGEBR ignore the last element
function = function4_last_default
+el
[pypy-commit] pypy s390x-backend: fixed translation issue.
Author: Richard Plangger Branch: s390x-backend Changeset: r82058:9fabf4399c18 Date: 2016-02-03 16:13 +0100 http://bitbucket.org/pypy/pypy/changeset/9fabf4399c18/ Log:fixed translation issue. diff --git a/rpython/jit/backend/zarch/assembler.py b/rpython/jit/backend/zarch/assembler.py --- a/rpython/jit/backend/zarch/assembler.py +++ b/rpython/jit/backend/zarch/assembler.py @@ -1301,7 +1301,7 @@ mc.load(r.RES, r.r1, 0) # load nursery_free mc.load(r.r0, r.r1, diff)# load nursery_top -mc.AGRK(RSZ, r.RES, sizeloc) +mc.AGRK(r.RSZ, r.RES, sizeloc) mc.cmp_op(r.RSZ, r.r0, signed=False) ___ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit
[pypy-commit] pypy s390x-backend: critical bugfix in gc writebarrier fastpath, simplifications and a test
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82059:822ac80ddd23
Date: 2016-02-03 17:43 +0100
http://bitbucket.org/pypy/pypy/changeset/822ac80ddd23/
Log:critical bugfix in gc writebarrier fastpath, simplifications and a
test
diff --git a/rpython/jit/backend/zarch/assembler.py
b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -205,7 +205,7 @@
saved_regs = None
saved_fp_regs = None
else:
-# push all volatile registers, push RCS1, and sometimes push RCS2
+# push all volatile registers, sometimes push RCS2
if withcards:
saved_regs = r.VOLATILES + [RCS2]
else:
@@ -223,8 +223,9 @@
# since the call to write barrier can't collect
# (and this is assumed a bit left and right here, like lack
# of _reload_frame_if_necessary)
-# This trashes r0 and r2, which is fine in this case
+# This trashes r0 and r1, which is fine in this case
assert argument_loc is not r.r0
+assert argument_loc is not r.r1
self._store_and_reset_exception(mc, RCS2, RCS3)
if withcards:
diff --git a/rpython/jit/backend/zarch/instructions.py
b/rpython/jit/backend/zarch/instructions.py
--- a/rpython/jit/backend/zarch/instructions.py
+++ b/rpython/jit/backend/zarch/instructions.py
@@ -100,6 +100,7 @@
# OR operations
'OGR':('rre', ['\xB9','\x81']),
+'OGRK': ('rrf_a',['\xB9','\xE6']),
'OG': ('rxy', ['\xE3','\x81']),
# or one byte and store it back at the op2 position
'OI': ('si', ['\x96']),
diff --git a/rpython/jit/backend/zarch/opassembler.py
b/rpython/jit/backend/zarch/opassembler.py
--- a/rpython/jit/backend/zarch/opassembler.py
+++ b/rpython/jit/backend/zarch/opassembler.py
@@ -535,8 +535,7 @@
# So here, we can simply write again a beq, which will be
# taken if GCFLAG_CARDS_SET is still not set.
jns_location = mc.get_relative_pos()
-mc.trap()
-mc.write('\x00'*4)
+mc.reserve_cond_jump()
#
# patch the 'NE' above
currpos = mc.currpos()
@@ -560,25 +559,23 @@
# compute in SCRATCH the index of the bit inside the byte:
# (index >> card_page_shift) & 7
-# not supported on the development s390x :(, extension is not
installed
-# 0x80 sets zero flag. will store 0 into all selected bits
-# mc.RISBGN(r.SCRATCH, loc_index, l.imm(3), l.imm(0x80 | 63),
l.imm(61))
-mc.SRAG(r.SCRATCH, loc_index, l.addr(n))
-mc.NILL(r.SCRATCH, l.imm(0x7))
+# 0x80 sets zero flag. will store 0 into all not selected bits
+mc.RISBGN(r.SCRATCH, loc_index, l.imm(61), l.imm(0x80 | 63),
l.imm(64-n))
# invert the bits of tmp_loc
-mc.XIHF(tmp_loc, l.imm(0x))
-mc.XILF(tmp_loc, l.imm(0x))
+mc.LCGR(tmp_loc, tmp_loc)
+#mc.XIHF(tmp_loc, l.imm(0x))
+#mc.XILF(tmp_loc, l.imm(0x))
-# set SCRATCH to 1 << r2
+# set SCRATCH to 1 << r1
mc.LGHI(r.SCRATCH2, l.imm(1))
-mc.SLAG(r.SCRATCH2, r.SCRATCH2, l.addr(0,r.SCRATCH))
+mc.SLAG(r.SCRATCH, r.SCRATCH2, l.addr(0,r.SCRATCH))
# set this bit inside the byte of interest
addr = l.addr(0, loc_base, tmp_loc)
mc.LLGC(r.SCRATCH, addr)
-mc.OGR(r.SCRATCH, r.SCRATCH2)
-mc.STCY(r.SCRATCH, addr)
+mc.OGRK(r.SCRATCH, r.SCRATCH, r.SCRATCH2)
+mc.STC(r.SCRATCH, addr)
# done
else:
byte_index = loc_index.value >> descr.jit_wb_card_page_shift
@@ -589,7 +586,7 @@
addr = l.addr(byte_ofs, loc_base)
mc.LLGC(r.SCRATCH, addr)
mc.OILL(r.SCRATCH, l.imm(byte_val))
-mc.STCY(r.SCRATCH, addr)
+mc.STC(r.SCRATCH, addr)
#
# patch the beq just above
currpos = mc.currpos()
diff --git a/rpython/jit/backend/zarch/test/test_assembler.py
b/rpython/jit/backend/zarch/test/test_assembler.py
--- a/rpython/jit/backend/zarch/test/test_assembler.py
+++ b/rpython/jit/backend/zarch/test/test_assembler.py
@@ -193,6 +193,16 @@
self.a.mc.BCR(con.ANY, r.r14)
assert run_asm(self.a) == rffi.cast(rffi.ULONG,p) & ~(7)
+def test_nill(self):
+self.a.mc.load_imm(r.r2, 1)
+self.a.mc.load_imm(r.r3, 0x010001)
+self.a.mc.NILL(r.r3, loc.imm(0x))
+self.a.mc.BCR(con.EQ, r.r14) # should not branch
+self.a.mc
[pypy-commit] pypy default: Kill randomly vendored obsolete version of pytest_cov
Author: Ronan Lamy Branch: Changeset: r82060:643912e63967 Date: 2016-02-03 16:56 + http://bitbucket.org/pypy/pypy/changeset/643912e63967/ Log:Kill randomly vendored obsolete version of pytest_cov diff --git a/pypy/test_all.py b/pypy/test_all.py --- a/pypy/test_all.py +++ b/pypy/test_all.py @@ -26,11 +26,10 @@ #Add toplevel repository dir to sys.path sys.path.insert(0,os.path.dirname(os.path.dirname(os.path.realpath(__file__ import pytest -import pytest_cov if sys.platform == 'win32': #Try to avoid opeing a dialog box if one of the tests causes a system error # We do this in runner.py, but buildbots run twisted which ruins inheritance -# in windows subprocesses. +# in windows subprocesses. import ctypes winapi = ctypes.windll.kernel32 SetErrorMode = winapi.SetErrorMode @@ -44,4 +43,4 @@ old_mode = SetErrorMode(flags) SetErrorMode(old_mode | flags) -sys.exit(pytest.main(plugins=[pytest_cov])) +sys.exit(pytest.main()) diff --git a/pytest_cov.py b/pytest_cov.py deleted file mode 100644 --- a/pytest_cov.py +++ /dev/null @@ -1,353 +0,0 @@ -"""produce code coverage reports using the 'coverage' package, including support for distributed testing. - -This plugin produces coverage reports. It supports centralised testing and distributed testing in -both load and each modes. It also supports coverage of subprocesses. - -All features offered by the coverage package should be available, either through pytest-cov or -through coverage's config file. - - -Installation - - -The `pytest-cov`_ package may be installed with pip or easy_install:: - -pip install pytest-cov -easy_install pytest-cov - -.. _`pytest-cov`: http://pypi.python.org/pypi/pytest-cov/ - - -Uninstallation --- - -Uninstalling packages is supported by pip:: - -pip uninstall pytest-cov - -However easy_install does not provide an uninstall facility. - -.. IMPORTANT:: - -Ensure that you manually delete the init_cov_core.pth file in your site-packages directory. - -This file starts coverage collection of subprocesses if appropriate during site initialisation -at python startup. - - -Usage -- - -Centralised Testing -~~~ - -Centralised testing will report on the combined coverage of the main process and all of it's -subprocesses. - -Running centralised testing:: - -py.test --cov myproj tests/ - -Shows a terminal report:: - - coverage: platform linux2, python 2.6.4-final-0 - -Name Stmts Miss Cover - -myproj/__init__ 2 0 100% -myproj/myproj 257 1394% -myproj/feature4286 94 792% - -TOTAL 353 2094% - - -Distributed Testing: Load -~ - -Distributed testing with dist mode set to load will report on the combined coverage of all slaves. -The slaves may be spread out over any number of hosts and each slave may be located anywhere on the -file system. Each slave will have it's subprocesses measured. - -Running distributed testing with dist mode set to load:: - -py.test --cov myproj -n 2 tests/ - -Shows a terminal report:: - - coverage: platform linux2, python 2.6.4-final-0 - -Name Stmts Miss Cover - -myproj/__init__ 2 0 100% -myproj/myproj 257 1394% -myproj/feature4286 94 792% - -TOTAL 353 2094% - - -Again but spread over different hosts and different directories:: - -py.test --cov myproj --dist load ---tx ssh=memedough@host1//chdir=testenv1 ---tx ssh=memedough@host2//chdir=/tmp/testenv2//python=/tmp/env1/bin/python ---rsyncdir myproj --rsyncdir tests --rsync examples -tests/ - -Shows a terminal report:: - - coverage: platform linux2, python 2.6.4-final-0 - -Name Stmts Miss Cover - -myproj/__init__ 2 0 100% -myproj/myproj 257 1394% -myproj/feature4286 94 792% - -TOTAL 353 2094% - - -Distributed Testing: Each -~ - -Distributed testing with dist mode set to each will report on the combined coverage of all slaves. -Since each slave is running all tests this allows generating a combined coverage report for multiple -environments. - -Running distributed testing with dist mode set to each:: - -py.test --cov myproj --dist each ---tx
[pypy-commit] pypy default: first stab at fixing embedding for win32
Author: mattip
Branch:
Changeset: r82061:338d32e89981
Date: 2016-01-29 16:06 +0200
http://bitbucket.org/pypy/pypy/changeset/338d32e89981/
Log:first stab at fixing embedding for win32 (grafted from
237a8c5c0202731866a958c900235d68ff739912)
diff --git a/pypy/module/_cffi_backend/embedding.py
b/pypy/module/_cffi_backend/embedding.py
--- a/pypy/module/_cffi_backend/embedding.py
+++ b/pypy/module/_cffi_backend/embedding.py
@@ -84,11 +84,68 @@
return rffi.cast(rffi.INT, res)
#
+if os.name == 'nt':
+do_startup = r'''
+#include
+#define WIN32_LEAN_AND_MEAN
+#include
+RPY_EXPORTED void rpython_startup_code(void);
+RPY_EXPORTED int pypy_setup_home(char *, int);
+static unsigned char _cffi_ready = 0;
+static const char *volatile _cffi_module_name;
-eci = ExternalCompilationInfo(separate_module_sources=[
-r"""
-/* XXX Windows missing */
+static void _cffi_init_error(const char *msg, const char *extra)
+{
+fprintf(stderr,
+"\nPyPy initialization failure when loading module '%s':\n%s%s\n",
+_cffi_module_name, msg, extra);
+}
+
+BOOL CALLBACK _cffi_init(PINIT_ONCE InitOnce, PVOID Parameter, PVOID *lpContex)
+{
+
+HMODULE hModule;
+TCHAR home[_MAX_PATH];
+rpython_startup_code();
+RPyGilAllocate();
+
+GetModuleHandleEx(GET_MODULE_HANDLE_EX_FLAG_FROM_ADDRESS |
+ GET_MODULE_HANDLE_EX_FLAG_UNCHANGED_REFCOUNT,
+ (LPCTSTR)&_cffi_init, &hModule);
+if (hModule == 0 ) {
+/* TODO turn the int into a string with FormatMessage */
+
+_cffi_init_error("dladdr() failed: ", "");
+return TRUE;
+}
+GetModuleFileName(hModule, home, _MAX_PATH);
+if (pypy_setup_home(home, 1) != 0) {
+_cffi_init_error("pypy_setup_home() failed", "");
+return TRUE;
+}
+_cffi_ready = 1;
+fprintf(stderr, "startup succeeded, home %s\n", home);
+return TRUE;
+}
+
+RPY_EXPORTED
+int pypy_carefully_make_gil(const char *name)
+{
+/* For CFFI: this initializes the GIL and loads the home path.
+ It can be called completely concurrently from unrelated threads.
+ It assumes that we don't hold the GIL before (if it exists), and we
+ don't hold it afterwards.
+*/
+static INIT_ONCE s_init_once;
+
+_cffi_module_name = name;/* not really thread-safe, but better than
+nothing */
+InitOnceExecuteOnce(&s_init_once, _cffi_init, NULL, NULL);
+return (int)_cffi_ready - 1;
+}'''
+else:
+do_startup = r"""
#include
#include
#include
@@ -141,6 +198,7 @@
pthread_once(&once_control, _cffi_init);
return (int)_cffi_ready - 1;
}
-"""])
+"""
+eci = ExternalCompilationInfo(separate_module_sources=[do_startup])
declare_c_function = rffi.llexternal_use_eci(eci)
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[pypy-commit] pypy s390x-backend: give the saved registers r10, r11, r12, r2, f0 some space on the stack. this prevents overwriting of values if they are set in the calling function
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82062:38a946dc43e3
Date: 2016-02-03 18:49 +0100
http://bitbucket.org/pypy/pypy/changeset/38a946dc43e3/
Log:give the saved registers r10,r11,r12,r2,f0 some space on the stack.
this prevents overwriting of values if they are set in the calling
function
diff --git a/rpython/jit/backend/zarch/assembler.py
b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -182,9 +182,8 @@
RCS2 = r.r10
RCS3 = r.r12
-LOCAL_VARS_OFFSET = 0
-extra_stack_size = LOCAL_VARS_OFFSET + 4 * WORD + 8
-extra_stack_size = (extra_stack_size + 15) & ~15
+# r10,r11,r12,r2,f0 -> makes exactly 4 words + 8 byte
+extra_stack_size = 4 * WORD + 8
if for_frame:
# NOTE: don't save registers on the jitframe here! It might
# override already-saved values that will be restored
@@ -199,9 +198,10 @@
# the RPython exception that occurred in the CALL, if any).
#
off = STD_FRAME_SIZE_IN_BYTES
-mc.STMG(r.r10, r.r12, l.addr(off+10*WORD, r.SP))
-mc.STG(r.r2, l.addr(off+2*WORD, r.SP))
-mc.STD(r.f0, l.addr(off+16*WORD, r.SP))
+mc.LAY(r.SP, l.addr(-extra_stack_size, r.SP))
+mc.STMG(r.r10, r.r12, l.addr(off, r.SP))
+mc.STG(r.r2, l.addr(off+3*WORD, r.SP))
+mc.STD(r.f0, l.addr(off+4*WORD, r.SP))
saved_regs = None
saved_fp_regs = None
else:
@@ -250,9 +250,10 @@
if for_frame:
off = STD_FRAME_SIZE_IN_BYTES
-mc.LMG(r.r10, r.r12, l.addr(off+10*WORD, r.SP))
-mc.LG(r.r2, l.addr(off+2*WORD, r.SP))
-mc.LD(r.f0, l.addr(off+16*WORD, r.SP))
+mc.LMG(r.r10, r.r12, l.addr(off, r.SP))
+mc.LG(r.r2, l.addr(off+3*WORD, r.SP))
+mc.LD(r.f0, l.addr(off+4*WORD, r.SP))
+mc.LAY(r.SP, l.addr(extra_stack_size, r.SP))
else:
self._pop_core_regs_from_jitframe(mc, saved_regs)
self._pop_fp_regs_from_jitframe(mc, saved_fp_regs)
@@ -1259,15 +1260,15 @@
mc.load_imm(r.r1, nursery_free_adr)
mc.load(r.RES, r.r1, 0) # load nursery_free
-mc.load(r.r14, r.r1, diff)# load nursery_top
+mc.load(r.r0, r.r1, diff)# load nursery_top
if check_imm_value(size):
-mc.AGHI(r.RSZ, l.imm(size))
+mc.AGHIK(r.RSZ, r.RES, l.imm(size))
else:
mc.load_imm(r.RSZ, size)
mc.AGRK(r.RSZ, r.RES, r.RSZ)
-mc.cmp_op(r.RSZ, r.r14, signed=False)
+mc.cmp_op(r.RSZ, r.r0, signed=False)
fast_jmp_pos = mc.currpos()
mc.reserve_cond_jump(short=True) # conditional jump, patched later
diff --git a/rpython/jit/backend/zarch/instructions.py
b/rpython/jit/backend/zarch/instructions.py
--- a/rpython/jit/backend/zarch/instructions.py
+++ b/rpython/jit/backend/zarch/instructions.py
@@ -175,6 +175,7 @@
'STG': ('rxy', ['\xE3','\x24']),
'STY': ('rxy', ['\xE3','\x50']),
'STHY':('rxy', ['\xE3','\x70']),
+'STC': ('rx',['\x42']),
'STCY':('rxy', ['\xE3','\x72']),
# store float
diff --git a/rpython/jit/backend/zarch/opassembler.py
b/rpython/jit/backend/zarch/opassembler.py
--- a/rpython/jit/backend/zarch/opassembler.py
+++ b/rpython/jit/backend/zarch/opassembler.py
@@ -567,9 +567,9 @@
#mc.XIHF(tmp_loc, l.imm(0x))
#mc.XILF(tmp_loc, l.imm(0x))
-# set SCRATCH to 1 << r1
+# set SCRATCH2 to 1 << r1
mc.LGHI(r.SCRATCH2, l.imm(1))
-mc.SLAG(r.SCRATCH, r.SCRATCH2, l.addr(0,r.SCRATCH))
+mc.SLAG(r.SCRATCH2, r.SCRATCH2, l.addr(0,r.SCRATCH))
# set this bit inside the byte of interest
addr = l.addr(0, loc_base, tmp_loc)
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[pypy-commit] pypy s390x-backend: cond_call_gc_wb_array can now not trash a volatile register. wrong allocation now takes a non volatile register!
Author: Richard Plangger Branch: s390x-backend Changeset: r82063:621a42ebea23 Date: 2016-02-03 20:19 +0100 http://bitbucket.org/pypy/pypy/changeset/621a42ebea23/ Log:cond_call_gc_wb_array can now not trash a volatile register. wrong allocation now takes a non volatile register! diff --git a/rpython/jit/backend/zarch/assembler.py b/rpython/jit/backend/zarch/assembler.py --- a/rpython/jit/backend/zarch/assembler.py +++ b/rpython/jit/backend/zarch/assembler.py @@ -241,7 +241,7 @@ self._restore_exception(mc, RCS2, RCS3) if withcards: -# A final andix before the blr, for the caller. Careful to +# A final NILL before the return to the caller. Careful to # not follow this instruction with another one that changes # the status of the condition code card_marking_mask = descr.jit_wb_cards_set_singlebyte diff --git a/rpython/jit/backend/zarch/opassembler.py b/rpython/jit/backend/zarch/opassembler.py --- a/rpython/jit/backend/zarch/opassembler.py +++ b/rpython/jit/backend/zarch/opassembler.py @@ -495,7 +495,7 @@ mc.NILL(r.SCRATCH, l.imm(mask & 0xFF)) jz_location = mc.get_relative_pos() -mc.reserve_cond_jump() # patched later with 'EQ' +mc.reserve_cond_jump(short=True) # patched later with 'EQ' # for cond_call_gc_wb_array, also add another fast path: # if GCFLAG_CARDS_SET, then we can just set one bit and be done @@ -535,7 +535,7 @@ # So here, we can simply write again a beq, which will be # taken if GCFLAG_CARDS_SET is still not set. jns_location = mc.get_relative_pos() -mc.reserve_cond_jump() +mc.reserve_cond_jump(short=True) # # patch the 'NE' above currpos = mc.currpos() @@ -547,6 +547,8 @@ # directly the card flag setting loc_index = arglocs[1] if loc_index.is_reg(): +# must a register that is preserved across function calls +assert loc_index.value >= 6 tmp_loc = arglocs[2] n = descr.jit_wb_card_page_shift @@ -562,15 +564,16 @@ # 0x80 sets zero flag. will store 0 into all not selected bits mc.RISBGN(r.SCRATCH, loc_index, l.imm(61), l.imm(0x80 | 63), l.imm(64-n)) +# set SCRATCH2 to 1 << r1 # invert the bits of tmp_loc -mc.LCGR(tmp_loc, tmp_loc) #mc.XIHF(tmp_loc, l.imm(0x)) #mc.XILF(tmp_loc, l.imm(0x)) - -# set SCRATCH2 to 1 << r1 +mc.LG(r.SCRATCH2, l.pool(self.pool.constant_64_ones)) +mc.XGR(tmp_loc, r.SCRATCH2) mc.LGHI(r.SCRATCH2, l.imm(1)) mc.SLAG(r.SCRATCH2, r.SCRATCH2, l.addr(0,r.SCRATCH)) + # set this bit inside the byte of interest addr = l.addr(0, loc_base, tmp_loc) mc.LLGC(r.SCRATCH, addr) @@ -591,13 +594,13 @@ # patch the beq just above currpos = mc.currpos() pmc = OverwritingBuilder(mc, jns_location, 1) -pmc.BRCL(c.EQ, l.imm(currpos - jns_location)) +pmc.BRC(c.EQ, l.imm(currpos - jns_location)) pmc.overwrite() # patch the JZ above currpos = mc.currpos() pmc = OverwritingBuilder(mc, jz_location, 1) -pmc.BRCL(c.EQ, l.imm(currpos - jz_location)) +pmc.BRC(c.EQ, l.imm(currpos - jz_location)) pmc.overwrite() def emit_cond_call_gc_wb(self, op, arglocs, regalloc): diff --git a/rpython/jit/backend/zarch/regalloc.py b/rpython/jit/backend/zarch/regalloc.py --- a/rpython/jit/backend/zarch/regalloc.py +++ b/rpython/jit/backend/zarch/regalloc.py @@ -99,9 +99,9 @@ forbidden_vars=self.temp_boxes) return loc -def get_scratch_reg(self,): +def get_scratch_reg(self, selected_reg=None): box = TempFloat() -reg = self.force_allocate_reg(box, forbidden_vars=self.temp_boxes) +reg = self.force_allocate_reg(box, forbidden_vars=self.temp_boxes, selected_reg=selected_reg) self.temp_boxes.append(box) return reg @@ -151,9 +151,9 @@ selected_reg=selected_reg) return loc -def get_scratch_reg(self): +def get_scratch_reg(self, selected_reg=None): box = TempInt() -reg = self.force_allocate_reg(box, forbidden_vars=self.temp_boxes) +reg = self.force_allocate_reg(box, forbidden_vars=self.temp_boxes, selected_reg=selected_reg) self.temp_boxes.append(box) return reg @@ -583,13 +583,13 @@ else: return self.rm.ensure_reg(box, force_in_reg) -def ensure_reg_or_16bit_imm(self, box): +def ensure_reg_or_16bit_imm(self, box, selected_reg=None): if box.type == FLOAT:
[pypy-commit] pypy s390x-backend: minor fix. loading from pool does not work
Author: Richard Plangger Branch: s390x-backend Changeset: r82064:0ef7606ff55f Date: 2016-02-03 22:21 +0100 http://bitbucket.org/pypy/pypy/changeset/0ef7606ff55f/ Log:minor fix. loading from pool does not work diff --git a/rpython/jit/backend/zarch/opassembler.py b/rpython/jit/backend/zarch/opassembler.py --- a/rpython/jit/backend/zarch/opassembler.py +++ b/rpython/jit/backend/zarch/opassembler.py @@ -566,10 +566,10 @@ # set SCRATCH2 to 1 << r1 # invert the bits of tmp_loc -#mc.XIHF(tmp_loc, l.imm(0x)) -#mc.XILF(tmp_loc, l.imm(0x)) -mc.LG(r.SCRATCH2, l.pool(self.pool.constant_64_ones)) -mc.XGR(tmp_loc, r.SCRATCH2) +mc.XIHF(tmp_loc, l.imm(0x)) +mc.XILF(tmp_loc, l.imm(0x)) +#mc.LG(r.SCRATCH2, l.pool(self.pool.constant_64_ones)) +#mc.XGR(tmp_loc, r.SCRATCH2) mc.LGHI(r.SCRATCH2, l.imm(1)) mc.SLAG(r.SCRATCH2, r.SCRATCH2, l.addr(0,r.SCRATCH)) ___ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit
[pypy-commit] pypy s390x-backend: STC can only tak 12 bits imm, this is wrong (use STCY again), fixed pool issue
Author: Richard Plangger Branch: s390x-backend Changeset: r82065:785c6853c253 Date: 2016-02-03 22:44 +0100 http://bitbucket.org/pypy/pypy/changeset/785c6853c253/ Log:STC can only tak 12 bits imm, this is wrong (use STCY again), fixed pool issue diff --git a/rpython/jit/backend/zarch/opassembler.py b/rpython/jit/backend/zarch/opassembler.py --- a/rpython/jit/backend/zarch/opassembler.py +++ b/rpython/jit/backend/zarch/opassembler.py @@ -563,13 +563,14 @@ # (index >> card_page_shift) & 7 # 0x80 sets zero flag. will store 0 into all not selected bits mc.RISBGN(r.SCRATCH, loc_index, l.imm(61), l.imm(0x80 | 63), l.imm(64-n)) +#mc.SRAG(r.SCRATCH, loc_index, l.addr(n)) +#mc.NILL(r.SCRATCH, l.imm(0x7)) # set SCRATCH2 to 1 << r1 # invert the bits of tmp_loc -mc.XIHF(tmp_loc, l.imm(0x)) -mc.XILF(tmp_loc, l.imm(0x)) -#mc.LG(r.SCRATCH2, l.pool(self.pool.constant_64_ones)) -#mc.XGR(tmp_loc, r.SCRATCH2) +#mc.XIHF(tmp_loc, l.imm(0x)) +#mc.XILF(tmp_loc, l.imm(0x)) +mc.XG(tmp_loc, l.pool(self.pool.constant_64_ones)) mc.LGHI(r.SCRATCH2, l.imm(1)) mc.SLAG(r.SCRATCH2, r.SCRATCH2, l.addr(0,r.SCRATCH)) @@ -589,7 +590,7 @@ addr = l.addr(byte_ofs, loc_base) mc.LLGC(r.SCRATCH, addr) mc.OILL(r.SCRATCH, l.imm(byte_val)) -mc.STC(r.SCRATCH, addr) +mc.STCY(r.SCRATCH, addr) # # patch the beq just above currpos = mc.currpos() diff --git a/rpython/jit/backend/zarch/pool.py b/rpython/jit/backend/zarch/pool.py --- a/rpython/jit/backend/zarch/pool.py +++ b/rpython/jit/backend/zarch/pool.py @@ -88,6 +88,8 @@ if arg.is_constant(): self.reserve_literal(8, arg) return +elif opnum == rop.COND_CALL_GC_WB_ARRAY: +self.constant_64_ones = 1 # we need constant ones!!! for arg in op.getarglist(): if arg.is_constant(): self.reserve_literal(8, arg) ___ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit
[pypy-commit] pypy default: importing clibffi has side effects on win32, causing nested external function calls if not imported early
Author: mattip Branch: Changeset: r82066:cbfc796b3af3 Date: 2016-02-03 23:58 +0200 http://bitbucket.org/pypy/pypy/changeset/cbfc796b3af3/ Log:importing clibffi has side effects on win32, causing nested external function calls if not imported early a deeper solution would be to replace clibffi with cffi diff --git a/rpython/rlib/test/test_rzipfile.py b/rpython/rlib/test/test_rzipfile.py --- a/rpython/rlib/test/test_rzipfile.py +++ b/rpython/rlib/test/test_rzipfile.py @@ -4,6 +4,7 @@ from rpython.tool.udir import udir from zipfile import ZIP_STORED, ZIP_DEFLATED, ZipInfo, ZipFile from rpython.rtyper.test.tool import BaseRtypingTest +from rpython.rlib import clibffi # for side effect of testing lib_c_name on win32 import os import time diff --git a/rpython/rlib/test/test_rzlib.py b/rpython/rlib/test/test_rzlib.py --- a/rpython/rlib/test/test_rzlib.py +++ b/rpython/rlib/test/test_rzlib.py @@ -6,6 +6,7 @@ import py from rpython.rlib import rzlib from rpython.rlib.rarithmetic import r_uint +from rpython.rlib import clibffi # for side effect of testing lib_c_name on win32 import zlib expanded = 'some bytes which will be compressed' ___ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit
[pypy-commit] cffi default: Issue #245: __stdcall not generated correctly on extern "Python" functions
Author: Armin Rigo
Branch:
Changeset: r2618:465ce534fc8a
Date: 2016-02-04 07:40 +0100
http://bitbucket.org/cffi/cffi/changeset/465ce534fc8a/
Log:Issue #245: __stdcall not generated correctly on extern "Python"
functions
diff --git a/cffi/_cffi_include.h b/cffi/_cffi_include.h
--- a/cffi/_cffi_include.h
+++ b/cffi/_cffi_include.h
@@ -231,6 +231,12 @@
((got_nonpos) == (expected <= 0) && \
(got) == (unsigned long long)expected)
+#ifdef MS_WIN32
+# define _cffi_stdcall __stdcall
+#else
+# define _cffi_stdcall /* nothing */
+#endif
+
#ifdef __cplusplus
}
#endif
diff --git a/cffi/recompiler.py b/cffi/recompiler.py
--- a/cffi/recompiler.py
+++ b/cffi/recompiler.py
@@ -1170,6 +1170,8 @@
repr_arguments = ', '.join(arguments)
repr_arguments = repr_arguments or 'void'
name_and_arguments = '%s(%s)' % (name, repr_arguments)
+if tp.abi == "__stdcall":
+name_and_arguments = '_cffi_stdcall ' + name_and_arguments
#
def may_need_128_bits(tp):
return (isinstance(tp, model.PrimitiveType) and
diff --git a/testing/cffi1/test_recompiler.py b/testing/cffi1/test_recompiler.py
--- a/testing/cffi1/test_recompiler.py
+++ b/testing/cffi1/test_recompiler.py
@@ -1713,3 +1713,33 @@
# a case where 'onerror' is not callable
py.test.raises(TypeError, ffi.def_extern(name='bar', onerror=42),
lambda x: x)
+
+def test_extern_python_stdcall():
+ffi = FFI()
+ffi.cdef("""
+extern "Python" int __stdcall foo(int);
+extern "Python" int WINAPI bar(int);
+int (__stdcall * mycb1)(int);
+int indirect_call(int);
+""")
+lib = verify(ffi, 'test_extern_python_stdcall', """
+#ifndef _MSC_VER
+# define __stdcall
+#endif
+static int (__stdcall * mycb1)(int);
+static int indirect_call(int x) {
+return mycb1(x);
+}
+""")
+#
+@ffi.def_extern()
+def foo(x):
+return x + 42
+@ffi.def_extern()
+def bar(x):
+return x + 43
+assert lib.foo(100) == 142
+assert lib.bar(100) == 143
+lib.mycb1 = lib.foo
+assert lib.mycb1(200) == 242
+assert lib.indirect_call(300) == 342
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