CVS commit: [matt-nb5-mips64] src/sys/arch/arm/arm32
Module Name:src
Committed By: matt
Date: Thu Aug 13 00:07:15 UTC 2015
Modified Files:
src/sys/arch/arm/arm32 [matt-nb5-mips64]: arm32_kvminit.c
Log Message:
Make sure the amount of direct mapped memory doesn't cross over into the
mappable KVA range.
To generate a diff of this commit:
cvs rdiff -u -r1.22.2.3 -r1.22.2.4 src/sys/arch/arm/arm32/arm32_kvminit.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/arm32_kvminit.c
diff -u src/sys/arch/arm/arm32/arm32_kvminit.c:1.22.2.3 src/sys/arch/arm/arm32/arm32_kvminit.c:1.22.2.4
--- src/sys/arch/arm/arm32/arm32_kvminit.c:1.22.2.3 Mon Mar 24 07:37:39 2014
+++ src/sys/arch/arm/arm32/arm32_kvminit.c Thu Aug 13 00:07:15 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: arm32_kvminit.c,v 1.22.2.3 2014/03/24 07:37:39 matt Exp $ */
+/* $NetBSD: arm32_kvminit.c,v 1.22.2.4 2015/08/13 00:07:15 matt Exp $ */
/*
* Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
@@ -122,7 +122,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: arm32_kvminit.c,v 1.22.2.3 2014/03/24 07:37:39 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm32_kvminit.c,v 1.22.2.4 2015/08/13 00:07:15 matt Exp $");
#include
#include
@@ -773,6 +773,14 @@ arm32_kernel_vm_init(vaddr_t kernel_vm_b
}
}
+ // The amount we can direct is limited by the start of the
+ // virtual part of the kernel address space. Don't overrun
+ // into it.
+ if (mapallmem_p && cur_pv.pv_va + cur_pv.pv_size > kernel_vm_base) {
+ cur_pv.pv_size = kernel_vm_base - cur_pv.pv_va;
+ }
+
+
/*
* Now we map the final chunk.
*/
CVS commit: [matt-nb5-mips64] src/sys/arch/evbarm/bcm53xx
Module Name:src
Committed By: matt
Date: Fri Jul 17 20:32:27 UTC 2015
Modified Files:
src/sys/arch/evbarm/bcm53xx [matt-nb5-mips64]: bcm53xx_machdep.c
Log Message:
Deal with > 1GB of memory.
To generate a diff of this commit:
cvs rdiff -u -r1.7.4.3 -r1.7.4.4 \
src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c
diff -u src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c:1.7.4.3 src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c:1.7.4.4
--- src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c:1.7.4.3 Wed Mar 26 02:15:02 2014
+++ src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c Fri Jul 17 20:32:27 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm53xx_machdep.c,v 1.7.4.3 2014/03/26 02:15:02 matt Exp $ */
+/* $NetBSD: bcm53xx_machdep.c,v 1.7.4.4 2015/07/17 20:32:27 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
#define IDM_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: bcm53xx_machdep.c,v 1.7.4.3 2014/03/26 02:15:02 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm53xx_machdep.c,v 1.7.4.4 2015/07/17 20:32:27 matt Exp $");
#include "opt_evbarm_boardtype.h"
#include "opt_broadcom.h"
@@ -258,6 +258,20 @@ initarm(void *arg)
#endif
const bool bigmem_p = (memsize >> PGSHIFT) > bp_first256.bp_pages;
+#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
+ const bool mapallmem_p = true;
+#ifndef PMAP_NEED_ALLOC_POOLPAGE
+ if (memsize > KERNEL_VM_BASE - KERNEL_BASE) {
+ printf("%s: dropping RAM size from %luMB to %uMB\n",
+ __func__, (unsigned long) (ram_size >> 20),
+ (KERNEL_VM_BASE - KERNEL_BASE) >> 20);
+ memsize = KERNEL_VM_BASE - KERNEL_BASE;
+ }
+#endif
+#else
+ const bool mapallmem_p = false;
+#endif
+ KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
arm32_bootmem_init(KERN_VTOPHYS(KERNEL_BASE), memsize,
(paddr_t)KERNEL_BASE_phys);
@@ -273,7 +287,8 @@ initarm(void *arg)
* abtstack, undstack, kernelstack, msgbufphys will be set to point to
* the memory that was allocated for them.
*/
- arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap, true);
+ arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap,
+ mapallmem_p);
cpu_reset_address = bcm53xx_system_reset;
/* we've a specific device_register routine */
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Mon Jun 9 21:03:20 UTC 2014 Modified Files: src/sys/arch/arm/arm [matt-nb5-mips64]: cpufunc.c Log Message: Fix tpyo. To generate a diff of this commit: cvs rdiff -u -r1.89.10.2 -r1.89.10.3 src/sys/arch/arm/arm/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc.c diff -u src/sys/arch/arm/arm/cpufunc.c:1.89.10.2 src/sys/arch/arm/arm/cpufunc.c:1.89.10.3 --- src/sys/arch/arm/arm/cpufunc.c:1.89.10.2 Wed Mar 26 02:00:45 2014 +++ src/sys/arch/arm/arm/cpufunc.c Mon Jun 9 21:03:19 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc.c,v 1.89.10.2 2014/03/26 02:00:45 matt Exp $ */ +/* $NetBSD: cpufunc.c,v 1.89.10.3 2014/06/09 21:03:19 matt Exp $ */ /* * arm7tdmi support code Copyright (c) 2001 John Fremlin @@ -49,7 +49,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.89.10.2 2014/03/26 02:00:45 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.89.10.3 2014/06/09 21:03:19 matt Exp $"); #include "opt_compat_netbsd.h" #include "opt_cpuoptions.h" @@ -3057,7 +3057,7 @@ armv7_setup(char *args) #ifdef __ARMEB__ | CPU_CONTROL_EX_BEND #endif -#ifdef ARM32_DISABLE_ALIGNMENT_FAULTS +#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS | CPU_CONTROL_AFLT_ENABLE #endif | CPU_CONTROL_UNAL_ENABLE;
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/cortex
Module Name:src Committed By: matt Date: Thu Mar 27 23:21:36 UTC 2014 Modified Files: src/sys/arch/arm/cortex [matt-nb5-mips64]: a9_mpsubr.S Log Message: Don't = since that isn't BE8 friendly To generate a diff of this commit: cvs rdiff -u -r1.12.2.5 -r1.12.2.6 src/sys/arch/arm/cortex/a9_mpsubr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/cortex/a9_mpsubr.S diff -u src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.5 src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.6 --- src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.5 Wed Mar 26 02:13:54 2014 +++ src/sys/arch/arm/cortex/a9_mpsubr.S Thu Mar 27 23:21:36 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: a9_mpsubr.S,v 1.12.2.5 2014/03/26 02:13:54 matt Exp $ */ +/* $NetBSD: a9_mpsubr.S,v 1.12.2.6 2014/03/27 23:21:36 matt Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. * All rights reserved. @@ -341,7 +341,7 @@ cortex_init: bl _C_LABEL(armv7_icache_inv_all) @ invalidate i-cache #else adr ip, cortex_init - ldr r0, =armv7_icache_inv_all + ldr r0, .Larmv7_icache_inv_all bfi ip, r0, #0, #28 blx ip #endif @@ -370,7 +370,7 @@ cortex_init: bl _C_LABEL(armv7_dcache_wbinv_all) @ writeback/invalidate d-cache #else adr ip, cortex_init - ldr r0, =armv7_dcache_wbinv_all + ldr r0, .Larmv7_dcache_wbinv_all bfi ip, r0, #0, #28 blx ip #endif @@ -401,7 +401,7 @@ cortex_init: bl _C_LABEL(armv7_icache_inv_all) @ invalidate i-cache #else adr ip, cortex_init - ldr r0, =armv7_icache_inv_all + ldr r0, .Larmv7_icache_inv_all bfi ip, r0, #0, #28 blx ip #endif @@ -432,6 +432,13 @@ cortex_init: #endif bx r10 + +#ifndef KERNEL_BASES_EQUAL +.Larmv7_icache_inv_all: + .word armv7_icache_inv_all +.Larmv7_dcache_wbinv_all: + .word armv7_dcache_wbinv_all +#endif ASEND(a9_start) /*
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/include
Module Name:src Committed By: matt Date: Thu Mar 27 21:11:11 UTC 2014 Modified Files: src/sys/arch/arm/include [matt-nb5-mips64]: param.h Log Message: #define ALIGNBYTES __ALIGNBYTES To generate a diff of this commit: cvs rdiff -u -r1.12.12.3 -r1.12.12.4 src/sys/arch/arm/include/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/param.h diff -u src/sys/arch/arm/include/param.h:1.12.12.3 src/sys/arch/arm/include/param.h:1.12.12.4 --- src/sys/arch/arm/include/param.h:1.12.12.3 Thu Mar 27 01:04:39 2014 +++ src/sys/arch/arm/include/param.h Thu Mar 27 21:11:11 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.12.12.3 2014/03/27 01:04:39 matt Exp $ */ +/* $NetBSD: param.h,v 1.12.12.4 2014/03/27 21:11:11 matt Exp $ */ /* * Copyright (c) 1994,1995 Mark Brinicombe. @@ -148,7 +148,7 @@ #define MID_MACHINE MID_ARM6 /* ARM-specific macro to align a stack pointer (downwards). */ -#define ALIGNBYTES (__ALIGNBYTES + 1) +#define ALIGNBYTES __ALIGNBYTES #define ALIGN(p) (((uintptr_t)(p) + ALIGNBYTES) & ~ALIGNBYTES) #define ALIGNED_POINTER(p,t) (((uintptr_t)(p) % sizeof(t)) == 0) #define STACKALIGNBYTES (8 - 1)
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/include
Module Name:src Committed By: matt Date: Thu Mar 27 01:04:39 UTC 2014 Modified Files: src/sys/arch/arm/include [matt-nb5-mips64]: param.h Log Message: Make ALIGNBYTES use __ALIGNBYTES To generate a diff of this commit: cvs rdiff -u -r1.12.12.2 -r1.12.12.3 src/sys/arch/arm/include/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/param.h diff -u src/sys/arch/arm/include/param.h:1.12.12.2 src/sys/arch/arm/include/param.h:1.12.12.3 --- src/sys/arch/arm/include/param.h:1.12.12.2 Sat Feb 15 16:30:23 2014 +++ src/sys/arch/arm/include/param.h Thu Mar 27 01:04:39 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.12.12.2 2014/02/15 16:30:23 matt Exp $ */ +/* $NetBSD: param.h,v 1.12.12.3 2014/03/27 01:04:39 matt Exp $ */ /* * Copyright (c) 1994,1995 Mark Brinicombe. @@ -148,7 +148,7 @@ #define MID_MACHINE MID_ARM6 /* ARM-specific macro to align a stack pointer (downwards). */ -#define ALIGNBYTES 3 +#define ALIGNBYTES (__ALIGNBYTES + 1) #define ALIGN(p) (((uintptr_t)(p) + ALIGNBYTES) & ~ALIGNBYTES) #define ALIGNED_POINTER(p,t) (((uintptr_t)(p) % sizeof(t)) == 0) #define STACKALIGNBYTES (8 - 1)
CVS commit: [matt-nb5-mips64] src/sys/arch/evbarm/conf
Module Name:src Committed By: matt Date: Thu Mar 27 00:28:48 UTC 2014 Modified Files: src/sys/arch/evbarm/conf [matt-nb5-mips64]: std.bcm53xx Log Message: Add ARM_HAS_VBAR To generate a diff of this commit: cvs rdiff -u -r1.13.2.3 -r1.13.2.4 src/sys/arch/evbarm/conf/std.bcm53xx Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/evbarm/conf/std.bcm53xx diff -u src/sys/arch/evbarm/conf/std.bcm53xx:1.13.2.3 src/sys/arch/evbarm/conf/std.bcm53xx:1.13.2.4 --- src/sys/arch/evbarm/conf/std.bcm53xx:1.13.2.3 Sat Feb 15 17:50:02 2014 +++ src/sys/arch/evbarm/conf/std.bcm53xx Thu Mar 27 00:28:48 2014 @@ -1,4 +1,4 @@ -# $NetBSD: std.bcm53xx,v 1.13.2.3 2014/02/15 17:50:02 matt Exp $ +# $NetBSD: std.bcm53xx,v 1.13.2.4 2014/03/27 00:28:48 matt Exp $ # # standard NetBSD/evbarm for BCM5301X options @@ -14,6 +14,7 @@ options CORTEX_PMC options _ARM32_NEED_BUS_DMA_BOUNCE options PMAP_NEED_ALLOC_POOLPAGE options __HAVE_FAST_SOFTINTS # should be in types.h +options ARM_HAS_VBAR options __HAVE_CPU_UAREA_ALLOC_IDLELWP options __HAVE_CPU_COUNTER options __HAVE_PCI_CONF_HOOK
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/broadcom
Module Name:src Committed By: matt Date: Wed Mar 26 23:43:45 UTC 2014 Modified Files: src/sys/arch/arm/broadcom [matt-nb5-mips64]: bcm53xx_cca.c Log Message: Only 5301X has GPIO via CCA To generate a diff of this commit: cvs rdiff -u -r1.1.16.3 -r1.1.16.4 src/sys/arch/arm/broadcom/bcm53xx_cca.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/broadcom/bcm53xx_cca.c diff -u src/sys/arch/arm/broadcom/bcm53xx_cca.c:1.1.16.3 src/sys/arch/arm/broadcom/bcm53xx_cca.c:1.1.16.4 --- src/sys/arch/arm/broadcom/bcm53xx_cca.c:1.1.16.3 Wed Mar 26 02:02:29 2014 +++ src/sys/arch/arm/broadcom/bcm53xx_cca.c Wed Mar 26 23:43:45 2014 @@ -43,7 +43,7 @@ #include -__KERNEL_RCSID(1, "$NetBSD: bcm53xx_cca.c,v 1.1.16.3 2014/03/26 02:02:29 matt Exp $"); +__KERNEL_RCSID(1, "$NetBSD: bcm53xx_cca.c,v 1.1.16.4 2014/03/26 23:43:45 matt Exp $"); #include #include @@ -177,7 +177,7 @@ bcmcca_mainbus_attach(device_t parent, d aprint_normal_dev(sc->sc_dev, "interrupting at irq %d\n", IRQ_CCA); bcmcca_uart_attach(sc); -#if NGPIO > 0 +#if NGPIO > 0 && defined(BCM5301X) bcmcca_gpio_attach(sc); #endif }
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/include
Module Name:src Committed By: matt Date: Wed Mar 26 22:44:42 UTC 2014 Modified Files: src/sys/arch/arm/include [matt-nb5-mips64]: cdefs.h Log Message: Make the minimal alignment 8 if EABI or ldrd/strd are supported. To generate a diff of this commit: cvs rdiff -u -r1.3.38.1 -r1.3.38.2 src/sys/arch/arm/include/cdefs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cdefs.h diff -u src/sys/arch/arm/include/cdefs.h:1.3.38.1 src/sys/arch/arm/include/cdefs.h:1.3.38.2 --- src/sys/arch/arm/include/cdefs.h:1.3.38.1 Thu Dec 19 01:17:06 2013 +++ src/sys/arch/arm/include/cdefs.h Wed Mar 26 22:44:41 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cdefs.h,v 1.3.38.1 2013/12/19 01:17:06 matt Exp $ */ +/* $NetBSD: cdefs.h,v 1.3.38.2 2014/03/26 22:44:41 matt Exp $ */ #ifndef _ARM_CDEFS_H_ #define _ARM_CDEFS_H_ @@ -40,8 +40,8 @@ #define _ARM_ARCH_DWORD_OK #endif -#ifdef __ARM_EABI__ -#define __ALIGNBYTES (8 - 1) +#if defined(__ARM_EABI__) || defined(_ARM_ARCH_DWORD_OK) +#define __ALIGNBYTES (sizeof(long long) - 1) #else #define __ALIGNBYTES (sizeof(int) - 1) #endif
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/broadcom
Module Name:src Committed By: matt Date: Wed Mar 26 03:20:18 UTC 2014 Modified Files: src/sys/arch/arm/broadcom [matt-nb5-mips64]: bcm53xx_reg.h Log Message: Sync with HEAD. To generate a diff of this commit: cvs rdiff -u -r1.14.2.2 -r1.14.2.3 src/sys/arch/arm/broadcom/bcm53xx_reg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/broadcom/bcm53xx_reg.h diff -u src/sys/arch/arm/broadcom/bcm53xx_reg.h:1.14.2.2 src/sys/arch/arm/broadcom/bcm53xx_reg.h:1.14.2.3 --- src/sys/arch/arm/broadcom/bcm53xx_reg.h:1.14.2.2 Sat Feb 15 16:18:36 2014 +++ src/sys/arch/arm/broadcom/bcm53xx_reg.h Wed Mar 26 03:20:18 2014 @@ -45,183 +45,196 @@ * 0x_..0x_043f 1088B Internal SKU ROM Region * 0x_1000..0x_1fff 4KB Enumeration ROM Register Region */ -#define BCM53XX_PCIE0_OWIN_PBASE 0x0800 -#define BCM53XX_PCIE0_OWIN_SIZE 0x0400 -#define BCM53XX_PCIE0_OWIN_MAX 0x0800 +#define BCM53XX_PCIE0_OWIN_PBASE 0x0800 +#define BCM53XX_PCIE0_OWIN_SIZE 0x0400 +#define BCM53XX_PCIE0_OWIN_MAX 0x0800 -#define BCM53XX_IOREG_PBASE 0x1800 -#define BCM53XX_IOREG_SIZE 0x0020 +#define BCM53XX_IOREG_PBASE 0x1800 +#define BCM53XX_IOREG_SIZE 0x0020 -#define BCM53XX_ARMCORE_PBASE 0x1900 -#define BCM53XX_ARMCORE_SIZE 0x0010 +#define BCM53XX_ARMCORE_PBASE 0x1900 +#define BCM53XX_ARMCORE_SIZE 0x0010 -#define BCM53XX_NAND_PBASE 0x1c00 -#define BCM53XX_NAND_SIZE 0x0100 +#define BCM53XX_NAND_PBASE 0x1c00 +#define BCM53XX_NAND_SIZE 0x0100 -#define BCM53XX_SPIFLASH_PBASE 0x1d00 -#define BCM53XX_SPIFLASH_SIZE 0x0100 +#define BCM53XX_SPIFLASH_PBASE 0x1d00 +#define BCM53XX_SPIFLASH_SIZE 0x0100 -#define BCM53XX_PCIE1_OWIN_PBASE 0x4000 -#define BCM53XX_PCIE1_OWIN_SIZE 0x0400 -#define BCM53XX_PCIE1_OWIN_MAX 0x0800 +#define BCM53XX_PCIE1_OWIN_PBASE 0x4000 +#define BCM53XX_PCIE1_OWIN_SIZE 0x0400 +#define BCM53XX_PCIE1_OWIN_MAX 0x0800 -#define BCM53XX_PCIE2_OWIN_PBASE 0x4800 -#define BCM53XX_PCIE2_OWIN_SIZE 0x0400 -#define BCM53XX_PCIE2_OWIN_MAX 0x0800 +#define BCM53XX_PCIE2_OWIN_PBASE 0x4800 +#define BCM53XX_PCIE2_OWIN_SIZE 0x0400 +#define BCM53XX_PCIE2_OWIN_MAX 0x0800 -#define BCM53XX_IO_SIZE (BCM53XX_IOREG_SIZE \ +#define BCM53XX_IO_SIZE (BCM53XX_IOREG_SIZE \ + BCM53XX_ARMCORE_SIZE \ + BCM53XX_PCIE0_OWIN_SIZE \ + BCM53XX_PCIE1_OWIN_SIZE \ + BCM53XX_PCIE2_OWIN_SIZE) -#define BCM53XX_REF_CLK (25*1000*1000) +#define BCM53XX_REF_CLK (25*1000*1000) -#define CCA_UART_FREQ BCM53XX_REF_CLK +#define CCA_UART_FREQ BCM53XX_REF_CLK /* Chip Common A */ -#define CCA_MISC_BASE 0x00 -#define CCA_MISC_SIZE 0x001000 -#define CCA_UART0_BASE 0x000300 -#define CCA_UART1_BASE 0x000400 +#define CCA_MISC_BASE 0x00 +#define CCA_MISC_SIZE 0x001000 +#define CCA_UART0_BASE 0x000300 +#define CCA_UART1_BASE 0x000400 /* Chip Common B */ -#define CCB_BASE 0x00 -#define CCB_SIZE 0x03 -#define PWM_BASE 0x002000 -#define MII_BASE 0x003000 -#define RNG_BASE 0x004000 -#define TIMER0_BASE 0x005000 -#define TIMER1_BASE 0x006000 -#define SRAB_BASE 0x007000 +#define CCB_BASE 0x00 +#ifdef BCM5301X +#define CCB_SIZE 0x03 +#define PWM_BASE 0x002000 +#define MII_BASE 0x003000 +#define RNG_BASE 0x004000 +#define TIMER0_BASE 0x005000 +#define TIMER1_BASE 0x006000 +#define SRAB_BASE 0x007000 +#define UART2_BASE 0x008000 +#define SMBUS1_BASE 0x009000 + +#define CRU_BASE 0x00b000 +#define DMU_BASE 0x00c000 +#elif defined(BCM563XX) +#define CCB_SIZE 0x04 +#define GPIO_BASE 0x03 +#define PWM_BASE 0x031000 +#define MII_BASE 0x032000 +#define RNG_BASE 0x033000 +#define TIMER0_BASE 0x034000 +#define TIMER1_BASE 0x035000 +#define UART2_BASE 0x037000 +#define SMBUS0_BASE 0x038000 +#define WDT_BASE 0x039000 +#define PKA_BASE 0x03a000 +#define SMBUS1_BASE 0x03b000 -#define CRU_BASE 0x00b000 -#define DMU_BASE 0x00c000 +#define CRU_BASE 0x03e000 +#define DMU_BASE 0x03f000 +#endif -#define DDR_BASE 0x01 +#define DDR_BASE 0x01 -#define PCIE0_BASE 0x012000 -#define PCIE1_BASE 0x013000 +#define PCIE0_BASE 0x012000 +#define PCIE1_BASE 0x013000 #ifdef BCM5301X -#define UART2_BASE 0x008000 -#define SMBUS1_BASE 0x009000 -#define PCIE2_BASE 0x014000 +#define PCIE2_BASE 0x014000 #define SDIO_BASE 0x02 -#define EHCI_BASE 0x021000 -#define OHCI_BASE 0x022000 -#define GMAC0_BASE 0x024000 -#define GMAC1_BASE 0x025000 -#define GMAC2_BASE 0x026000 -#define GMAC3_BASE 0x027000 -#define NAND_BASE 0x028000 +#define EHCI_BASE 0x021000 +#define OHCI_BASE 0x022000 +#define GMAC0_BASE 0x024000 +#define GMAC1_BASE 0x025000 +#define GMAC2_BASE 0x026000 +#define GMAC3_BASE 0x027000 +#define NAND_BASE 0x028000 #define QSPI_BASE 0x029000 #define I2S_BASE 0x02A000 #define DMAC_BASE 0x
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/broadcom
Module Name:src
Committed By: matt
Date: Wed Mar 26 03:19:32 UTC 2014
Modified Files:
src/sys/arch/arm/broadcom [matt-nb5-mips64]: bcm53xx_board.c
bcm53xx_ccb.c
Log Message:
Allow SRAB to be optional
To generate a diff of this commit:
cvs rdiff -u -r1.17.2.3 -r1.17.2.4 src/sys/arch/arm/broadcom/bcm53xx_board.c
cvs rdiff -u -r1.5.2.2 -r1.5.2.3 src/sys/arch/arm/broadcom/bcm53xx_ccb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm53xx_board.c
diff -u src/sys/arch/arm/broadcom/bcm53xx_board.c:1.17.2.3 src/sys/arch/arm/broadcom/bcm53xx_board.c:1.17.2.4
--- src/sys/arch/arm/broadcom/bcm53xx_board.c:1.17.2.3 Wed Feb 19 23:19:57 2014
+++ src/sys/arch/arm/broadcom/bcm53xx_board.c Wed Mar 26 03:19:32 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm53xx_board.c,v 1.17.2.3 2014/02/19 23:19:57 matt Exp $ */
+/* $NetBSD: bcm53xx_board.c,v 1.17.2.4 2014/03/26 03:19:32 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -35,7 +35,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.17.2.3 2014/02/19 23:19:57 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.17.2.4 2014/03/26 03:19:32 matt Exp $");
#include
#include
@@ -640,6 +640,7 @@ bcm53xx_device_register(device_t self, v
}
}
+#ifdef SRAB_BASE
static kmutex_t srab_lock __cacheline_aligned;
void
@@ -742,3 +743,4 @@ bcm53xx_srab_write_8(u_int pageoffset, u
bcm53xx_srab_busywait(bst, bsh);
mutex_spin_exit(&srab_lock);
}
+#endif /* SRAB_BASE */
Index: src/sys/arch/arm/broadcom/bcm53xx_ccb.c
diff -u src/sys/arch/arm/broadcom/bcm53xx_ccb.c:1.5.2.2 src/sys/arch/arm/broadcom/bcm53xx_ccb.c:1.5.2.3
--- src/sys/arch/arm/broadcom/bcm53xx_ccb.c:1.5.2.2 Sat Feb 15 16:18:36 2014
+++ src/sys/arch/arm/broadcom/bcm53xx_ccb.c Wed Mar 26 03:19:32 2014
@@ -34,7 +34,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: bcm53xx_ccb.c,v 1.5.2.2 2014/02/15 16:18:36 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bcm53xx_ccb.c,v 1.5.2.3 2014/03/26 03:19:32 matt Exp $");
#include
#include
@@ -99,7 +99,9 @@ static const struct bcm_locators bcmccb_
{ "bcmrng", RNG_BASE, 0x1000, BCMCCBCF_PORT_DEFAULT, 1, { IRQ_RNG } },
{ "bcmtmr", TIMER0_BASE, 0x1000, BCMCCBCF_PORT_DEFAULT, 2, { IRQ_TIMER0_1, IRQ_TIMER0_2 } },
{ "bcmtmr", TIMER1_BASE, 0x1000, BCMCCBCF_PORT_DEFAULT, 2, { IRQ_TIMER1_1, IRQ_TIMER1_2 } },
+#ifdef SRAB_BASE
{ "bcmsw", SRAB_BASE, 0x1000, BCMCCBCF_PORT_DEFAULT, },
+#endif
{ "bcmcom", UART2_BASE, 0x1000, BCMCCBCF_PORT_DEFAULT, 1, { IRQ_UART2 } },
#ifdef BCM5301X
{ "bcmi2c", SMBUS1_BASE, 0x1000, BCMCCBCF_PORT_DEFAULT, 1, { IRQ_SMBUS1 } },
CVS commit: [matt-nb5-mips64] src/sys/arch/evbarm/bcm53xx
Module Name:src
Committed By: matt
Date: Wed Mar 26 02:16:05 UTC 2014
Modified Files:
src/sys/arch/evbarm/bcm53xx [matt-nb5-mips64]: bcm53xx_start.S
Log Message:
Use adr/bfi to access kernel variables.
To generate a diff of this commit:
cvs rdiff -u -r1.10.2.2 -r1.10.2.3 \
src/sys/arch/evbarm/bcm53xx/bcm53xx_start.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbarm/bcm53xx/bcm53xx_start.S
diff -u src/sys/arch/evbarm/bcm53xx/bcm53xx_start.S:1.10.2.2 src/sys/arch/evbarm/bcm53xx/bcm53xx_start.S:1.10.2.3
--- src/sys/arch/evbarm/bcm53xx/bcm53xx_start.S:1.10.2.2 Sat Feb 15 16:18:37 2014
+++ src/sys/arch/evbarm/bcm53xx/bcm53xx_start.S Wed Mar 26 02:16:05 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm53xx_start.S,v 1.10.2.2 2014/02/15 16:18:37 matt Exp $ */
+/* $NetBSD: bcm53xx_start.S,v 1.10.2.3 2014/03/26 02:16:05 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -45,7 +45,7 @@
#define CONADDR 0x18000300
#endif
-RCSID("$NetBSD: bcm53xx_start.S,v 1.10.2.2 2014/02/15 16:18:37 matt Exp $")
+RCSID("$NetBSD: bcm53xx_start.S,v 1.10.2.3 2014/03/26 02:16:05 matt Exp $")
#undef VERBOSE_INIT_ARM
#define VERBOSE_INIT_ARM
@@ -74,10 +74,14 @@ _C_LABEL(bcm53xx_start):
/*
* Save any arguments u-boot passed us.
*/
- ldr r4, .Luboot_args_pic0
- add r4, r4, pc
+#ifdef KERNEL_BASES_EQUAL
+ ldr r4, .Luboot_args
+#else
+ adr r4, bcm53xx_start
+ ldr r5, .Luboot_args
+ bfi r4, r5, #0, #28
+#endif
stmia r4, {r0-r3}
-.LPIC0:
/*
* Let's turn on the CCA watchdog in case something goes horribly wrong.
@@ -121,15 +125,6 @@ _C_LABEL(bcm53xx_start):
XPUTC(#89)
- ldr r0, .Luboot_args
- ldr r2, [r0]
- ldr r1, .Luboot_args_pic1
- add r1, r1, pc
- ldr r1, [r1]
-.LPIC1:
- cmp r1, r2
-1: bne 1b
-
XPUTC(#90)
/*
@@ -153,10 +148,6 @@ _C_LABEL(bcm53xx_start):
nop
/* NOTREACHED */
-.Luboot_args_pic0:
- .word uboot_args - .LPIC0
-.Luboot_args_pic1:
- .word uboot_args - .LPIC0
.Luboot_args:
.word uboot_args
.Lstart:
CVS commit: [matt-nb5-mips64] src/sys/arch/evbarm/bcm53xx
Module Name:src
Committed By: matt
Date: Wed Mar 26 02:15:02 UTC 2014
Modified Files:
src/sys/arch/evbarm/bcm53xx [matt-nb5-mips64]: bcm53xx_machdep.c
Log Message:
Use apb/4 for the com freq on !BCM5301X
To generate a diff of this commit:
cvs rdiff -u -r1.7.4.2 -r1.7.4.3 \
src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c
diff -u src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c:1.7.4.2 src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c:1.7.4.3
--- src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c:1.7.4.2 Sat Feb 15 16:18:37 2014
+++ src/sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c Wed Mar 26 02:15:02 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm53xx_machdep.c,v 1.7.4.2 2014/02/15 16:18:37 matt Exp $ */
+/* $NetBSD: bcm53xx_machdep.c,v 1.7.4.3 2014/03/26 02:15:02 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
#define IDM_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: bcm53xx_machdep.c,v 1.7.4.2 2014/02/15 16:18:37 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm53xx_machdep.c,v 1.7.4.3 2014/03/26 02:15:02 matt Exp $");
#include "opt_evbarm_boardtype.h"
#include "opt_broadcom.h"
@@ -330,14 +330,20 @@ consinit(void)
/*
* Switch to the reference clock
*/
+#ifdef BCM5301X
+ const int comfreq = BCM53XX_REF_CLK;
v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
CCA_MISC_BASE + MISC_CORECTL);
v &= ~CORECTL_UART_CLK_OVERRIDE;
bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
CCA_MISC_BASE + MISC_CORECTL, v);
+#else
+ const struct cpu_softc * const cpu = curcpu()->ci_softc;
+ const int comfreq = cpu->cpu_clk.clk_apb / 4;
+#endif
if (comcnattach(bcm53xx_ioreg_bst, comcnaddr, comcnspeed,
-BCM53XX_REF_CLK, COM_TYPE_NORMAL, comcnmode))
+comfreq, COM_TYPE_NORMAL, comcnmode))
panic("Serial console can not be initialized.");
}
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/cortex
Module Name:src Committed By: matt Date: Wed Mar 26 02:13:54 UTC 2014 Modified Files: src/sys/arch/arm/cortex [matt-nb5-mips64]: a9_mpsubr.S Log Message: flush the icache after enabling the SCU To generate a diff of this commit: cvs rdiff -u -r1.12.2.4 -r1.12.2.5 src/sys/arch/arm/cortex/a9_mpsubr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/cortex/a9_mpsubr.S diff -u src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.4 src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.5 --- src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.4 Mon Mar 24 18:44:13 2014 +++ src/sys/arch/arm/cortex/a9_mpsubr.S Wed Mar 26 02:13:54 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: a9_mpsubr.S,v 1.12.2.4 2014/03/24 18:44:13 matt Exp $ */ +/* $NetBSD: a9_mpsubr.S,v 1.12.2.5 2014/03/26 02:13:54 matt Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. * All rights reserved. @@ -397,13 +397,23 @@ cortex_init: isb XPUTC(#50) +#ifdef KERNEL_BASES_EQUAL + bl _C_LABEL(armv7_icache_inv_all) @ invalidate i-cache +#else + adr ip, cortex_init + ldr r0, =armv7_icache_inv_all + bfi ip, r0, #0, #28 + blx ip +#endif + XPUTC(#51) + /* * Step 4a, enable the data cache */ orr r2, r2, #CPU_CONTROL_DC_ENABLE @ set data cache enable mcr p15, 0, r2, c1, c0, 0 @ reenable caches isb - XPUTC(#51) + XPUTC(#52) #endif /*
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/broadcom
Module Name:src Committed By: matt Date: Wed Mar 26 02:02:29 UTC 2014 Modified Files: src/sys/arch/arm/broadcom [matt-nb5-mips64]: bcm53xx_cca.c Log Message: For non-BCM5301X, set frequency to 1/4 of the apb clock. To generate a diff of this commit: cvs rdiff -u -r1.1.16.2 -r1.1.16.3 src/sys/arch/arm/broadcom/bcm53xx_cca.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/broadcom/bcm53xx_cca.c diff -u src/sys/arch/arm/broadcom/bcm53xx_cca.c:1.1.16.2 src/sys/arch/arm/broadcom/bcm53xx_cca.c:1.1.16.3 --- src/sys/arch/arm/broadcom/bcm53xx_cca.c:1.1.16.2 Sat Feb 15 16:18:36 2014 +++ src/sys/arch/arm/broadcom/bcm53xx_cca.c Wed Mar 26 02:02:29 2014 @@ -43,7 +43,7 @@ #include -__KERNEL_RCSID(1, "$NetBSD: bcm53xx_cca.c,v 1.1.16.2 2014/02/15 16:18:36 matt Exp $"); +__KERNEL_RCSID(1, "$NetBSD: bcm53xx_cca.c,v 1.1.16.3 2014/03/26 02:02:29 matt Exp $"); #include #include @@ -279,7 +279,13 @@ com_cca_attach(device_t parent, device_t bus_space_handle_t bsh; sc->sc_dev = self; + +#ifdef BCM5301X sc->sc_frequency = BCM53XX_REF_CLK; +#else + const struct cpu_softc * const cpu = curcpu()->ci_softc; + sc->sc_frequency = cpu->cpu_clk.clk_apb / 4; +#endif sc->sc_type = COM_TYPE_NORMAL; if (com_is_console(ccaaa->ccaaa_bst, addr, &bsh) == 0 &&
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Wed Mar 26 02:01:10 UTC 2014 Modified Files: src/sys/arch/arm/arm [matt-nb5-mips64]: arm_machdep.c Log Message: If BE on armv7, set PSR_E_BIT To generate a diff of this commit: cvs rdiff -u -r1.21.8.1 -r1.21.8.2 src/sys/arch/arm/arm/arm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/arm_machdep.c diff -u src/sys/arch/arm/arm/arm_machdep.c:1.21.8.1 src/sys/arch/arm/arm/arm_machdep.c:1.21.8.2 --- src/sys/arch/arm/arm/arm_machdep.c:1.21.8.1 Sat Feb 15 16:18:35 2014 +++ src/sys/arch/arm/arm/arm_machdep.c Wed Mar 26 02:01:10 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: arm_machdep.c,v 1.21.8.1 2014/02/15 16:18:35 matt Exp $ */ +/* $NetBSD: arm_machdep.c,v 1.21.8.2 2014/03/26 02:01:10 matt Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -79,7 +79,7 @@ #include -__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.21.8.1 2014/02/15 16:18:35 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.21.8.2 2014/03/26 02:01:10 matt Exp $"); #include #include @@ -173,12 +173,20 @@ setregs(struct lwp *l, struct exec_packa tf->tf_svc_lr = 0x; /* Something we can see */ tf->tf_pc = pack->ep_entry; #ifdef __PROG32 +#if defined(__ARMEB__) + /* + * If we are running on ARMv7, we need to set the E bit to force + * programs to start as big endian. + */ + tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0); +#else tf->tf_spsr = PSR_USR32_MODE; +#endif /* __ARMEB__ */ #ifdef THUMB_CODE if (pack->ep_entry & 1) tf->tf_spsr |= PSR_T_bit; #endif -#endif +#endif /* __PROG32 */ l->l_md.md_flags = 0; #ifdef EXEC_AOUT
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Wed Mar 26 02:00:46 UTC 2014 Modified Files: src/sys/arch/arm/arm [matt-nb5-mips64]: cpufunc.c Log Message: For armv7, enable BE properly. Make sure UNAL is always set. To generate a diff of this commit: cvs rdiff -u -r1.89.10.1 -r1.89.10.2 src/sys/arch/arm/arm/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc.c diff -u src/sys/arch/arm/arm/cpufunc.c:1.89.10.1 src/sys/arch/arm/arm/cpufunc.c:1.89.10.2 --- src/sys/arch/arm/arm/cpufunc.c:1.89.10.1 Sat Feb 15 16:18:35 2014 +++ src/sys/arch/arm/arm/cpufunc.c Wed Mar 26 02:00:45 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc.c,v 1.89.10.1 2014/02/15 16:18:35 matt Exp $ */ +/* $NetBSD: cpufunc.c,v 1.89.10.2 2014/03/26 02:00:45 matt Exp $ */ /* * arm7tdmi support code Copyright (c) 2001 John Fremlin @@ -49,7 +49,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.89.10.1 2014/02/15 16:18:35 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.89.10.2 2014/03/26 02:00:45 matt Exp $"); #include "opt_compat_netbsd.h" #include "opt_cpuoptions.h" @@ -3053,20 +3053,15 @@ armv7_setup(char *args) int cpuctrl; cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_IC_ENABLE - | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_BPRD_ENABLE ; -#if 0 - int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE - | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE - | CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_BPRD_ENABLE - | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE - | CPU_CONTROL_ROUNDROBIN | CPU_CONTROL_CPCLK; + | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_BPRD_ENABLE +#ifdef __ARMEB__ + | CPU_CONTROL_EX_BEND #endif - #ifdef ARM32_DISABLE_ALIGNMENT_FAULTS - cpuctrl |= CPU_CONTROL_UNAL_ENABLE; -#else - cpuctrl |= CPU_CONTROL_AFLT_ENABLE; + | CPU_CONTROL_AFLT_ENABLE #endif + | CPU_CONTROL_UNAL_ENABLE; + const int cpuctrlmask = cpuctrl | CPU_CONTROL_AFLT_ENABLE; cpuctrl = parse_cpu_options(args, armv7_options, cpuctrl); @@ -3080,7 +3075,7 @@ armv7_setup(char *args) /* Set the control register */ curcpu()->ci_ctrl = cpuctrl; - cpu_control(0x, cpuctrl); + cpu_control(cpuctrlmask, cpuctrl); } #endif /* CPU_CORTEX */
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/cortex
Module Name:src
Committed By: matt
Date: Wed Mar 26 01:59:08 UTC 2014
Modified Files:
src/sys/arch/arm/cortex [matt-nb5-mips64]: gic.c
Log Message:
Let bus_space so the endian conversion if needed
To generate a diff of this commit:
cvs rdiff -u -r1.5.2.2 -r1.5.2.3 src/sys/arch/arm/cortex/gic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gic.c
diff -u src/sys/arch/arm/cortex/gic.c:1.5.2.2 src/sys/arch/arm/cortex/gic.c:1.5.2.3
--- src/sys/arch/arm/cortex/gic.c:1.5.2.2 Sat Feb 15 16:18:36 2014
+++ src/sys/arch/arm/cortex/gic.c Wed Mar 26 01:59:08 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: gic.c,v 1.5.2.2 2014/02/15 16:18:36 matt Exp $ */
+/* $NetBSD: gic.c,v 1.5.2.3 2014/03/26 01:59:08 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -31,7 +31,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.5.2.2 2014/02/15 16:18:36 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.5.2.3 2014/03/26 01:59:08 matt Exp $");
#include
#include
@@ -109,28 +109,24 @@ __CTASSERT(NIPL == 8);
static inline uint32_t
gicc_read(struct armgic_softc *sc, bus_size_t o)
{
- uint32_t v = bus_space_read_4(sc->sc_memt, sc->sc_gicch, o);
- return le32toh(v);
+ return bus_space_read_4(sc->sc_memt, sc->sc_gicch, o);
}
static inline void
gicc_write(struct armgic_softc *sc, bus_size_t o, uint32_t v)
{
- v = htole32(v);
bus_space_write_4(sc->sc_memt, sc->sc_gicch, o, v);
}
static inline uint32_t
gicd_read(struct armgic_softc *sc, bus_size_t o)
{
- uint32_t v = bus_space_read_4(sc->sc_memt, sc->sc_gicdh, o);
- return le32toh(v);
+ return bus_space_read_4(sc->sc_memt, sc->sc_gicdh, o);
}
static inline void
gicd_write(struct armgic_softc *sc, bus_size_t o, uint32_t v)
{
- v = htole32(v);
bus_space_write_4(sc->sc_memt, sc->sc_gicdh, o, v);
}
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/include
Module Name:src Committed By: matt Date: Wed Mar 26 01:15:48 UTC 2014 Modified Files: src/sys/arch/arm/include [matt-nb5-mips64]: armreg.h Log Message: sync with HEAD To generate a diff of this commit: cvs rdiff -u -r1.41.12.2 -r1.41.12.3 src/sys/arch/arm/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/armreg.h diff -u src/sys/arch/arm/include/armreg.h:1.41.12.2 src/sys/arch/arm/include/armreg.h:1.41.12.3 --- src/sys/arch/arm/include/armreg.h:1.41.12.2 Mon Mar 24 18:43:40 2014 +++ src/sys/arch/arm/include/armreg.h Wed Mar 26 01:15:48 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.41.12.2 2014/03/24 18:43:40 matt Exp $ */ +/* $NetBSD: armreg.h,v 1.41.12.3 2014/03/26 01:15:48 matt Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -58,13 +58,24 @@ #define PSR_V_bit (1 << 28) /* overflow */ #define PSR_Q_bit (1 << 27) /* saturation */ +#define PSR_IT1_bit (1 << 26) +#define PSR_IT0_bit (1 << 25) +#define PSR_J_bit (1 << 24) /* Jazelle mode */ +#define PSR_GE_bits (15 << 16) /* SIMD GE bits */ +#define PSR_IT7_bit (1 << 15) +#define PSR_IT6_bit (1 << 14) +#define PSR_IT5_bit (1 << 13) +#define PSR_IT4_bit (1 << 12) +#define PSR_IT3_bit (1 << 11) +#define PSR_IT2_bit (1 << 10) +#define PSR_E_BIT (1 << 9) /* Endian state */ +#define PSR_A_BIT (1 << 8) /* Async abort disable */ #define I32_bit (1 << 7) /* IRQ disable */ #define F32_bit (1 << 6) /* FIQ disable */ -#define IF32_bits (3 << 6) /* IRQ/FIQ disable */ +#define IF32_bits (3 << 6) /* IRQ/FIQ disable */ #define PSR_T_bit (1 << 5) /* Thumb state */ -#define PSR_J_bit (1 << 24) /* Java mode */ #define PSR_MODE 0x001f /* mode mask */ #define PSR_USR26_MODE 0x @@ -258,6 +269,11 @@ #define CPU_ID_ARM_88SV584X_V6 0x410fb020 /* Marvell Sheeva 88SV584x v6 Core */ /* CPUID registers */ +#define ARM_ISA3_SYNCHPRIM_MASK 0xf000 +#define ARM_ISA4_SYNCHPRIM_MASK 0x00f0 +#define ARM_ISA3_SYNCHPRIM_LDREX 0x10 // LDREX +#define ARM_ISA3_SYNCHPRIM_LDREXPLUS 0x13 // +CLREX/LDREXB/LDREXH +#define ARM_ISA3_SYNCHPRIM_LDREXD 0x20 // +LDREXD #define ARM_PFR0_THUMBEE_MASK 0xf000 #define ARM_PFR1_GTIMER_MASK 0x000f #define ARM_PFR1_VIRT_MASK 0xf000 @@ -347,6 +363,9 @@ #define CPU_CONTROL_VECRELOC 0x2000 /* V: Vector relocation */ #define CPU_CONTROL_ROUNDROBIN 0x4000 /* RR: Predictable replacement */ #define CPU_CONTROL_V4COMPAT 0x8000 /* L4: ARMv4 compat LDR R15 etc */ +#define CPU_CONTROL_HA_ENABLE 0x0002 /* HA: Hardware Access flag enable */ +#define CPU_CONTROL_WXN_ENABLE 0x0008 /* WXN: Write Execute Never */ +#define CPU_CONTROL_UWXN_ENABLE 0x0010 /* UWXN: User Write eXecute Never */ #define CPU_CONTROL_FI_ENABLE 0x0020 /* FI: Low interrupt latency */ #define CPU_CONTROL_UNAL_ENABLE 0x0040 /* U: unaligned data access */ #define CPU_CONTROL_XP_ENABLE 0x0080 /* XP: extended page table */ @@ -368,6 +387,13 @@ #define CPACR_RESERVED 2 #define CPACR_ALL 3 /* Privileged and User mode access */ +/* ARMv6/ARMv7 Non-Secure Access Control Register (CP15, 0, c1, c1, 2) */ +#define NSACR_SMP 0x0004 /* ACTRL.SMP is writeable (!A8) */ +#define NSACR_L2ERR 0x0002 /* L2ECTRL is writeable (!A8) */ +#define NSACR_ASEDIS 0x8000 /* Deny Advanced SIMD Ext. */ +#define NSACR_D32DIS 0x4000 /* Deny VFP regs 15-31 */ +#define NSACR_CPn(n) (1 << (n)) /* NonSecure access allowed */ + /* ARM11x6 Auxiliary Control Register (CP15 register 1, opcode2 1) */ #define ARM11X6_AUXCTL_RS 0x0001 /* return stack */ #define ARM11X6_AUXCTL_DB 0x0002 /* dynamic branch prediction */ @@ -521,7 +547,11 @@ #define FAULT_PERM_S0x0d /* Permission -- Section */ #define FAULT_PERM_P0x0f /* Permission -- Page */ -#define FAULT_IMPRECISE 0x400 /* Imprecise exception (XSCALE) */ +#define FAULT_LPAE 0x0200 /* (SW) used long descriptors */ +#define FAULT_IMPRECISE 0x0400 /* Imprecise exception (XSCALE) */ +#define FAULT_WRITE 0x0800 /* fault was due to write (ARMv6+) */ +#define FAULT_EXT 0x1000 /* fault was due to external abort (ARMv6+) */ +#define FAULT_CM 0x2000 /* fault was due to cache maintenance (ARMv7+) */ /* * Address of the vector page, low and high versions. @@ -542,7 +572,21 @@ #define INSN_SIZE 4 /* Always 4 bytes */ #define INSN_COND_MASK 0xf000 /* Condition mask */ -#define INSN_COND_AL 0xe000 /* Always condition */ +#define INSN_COND_EQ 0 /* Z == 1 */ +#define INSN_COND_NE 1 /* Z == 0 */ +#define INSN_COND_CS 2 /* C == 1 */ +#define INSN_COND_CC 3 /* C == 0 */ +#define INSN_COND_MI 4 /* N == 1 */ +#define INSN_COND_PL 5 /* N == 0 */ +#define INSN_COND_VS 6 /* V == 1 */ +#define INSN_COND_VC 7 /* V == 0 */ +#define INSN_COND_HI 8 /* C == 1 && Z == 0 */ +#define INSN_COND_LS 9 /* C == 0 || Z == 1 */ +#define INSN_COND_GE 10 /* N == V */ +#define INSN_COND_LT 11 /* N
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/cortex
Module Name:src Committed By: matt Date: Mon Mar 24 18:44:13 UTC 2014 Modified Files: src/sys/arch/arm/cortex [matt-nb5-mips64]: a9_mpsubr.S Log Message: Allow A7 to use this. To generate a diff of this commit: cvs rdiff -u -r1.12.2.3 -r1.12.2.4 src/sys/arch/arm/cortex/a9_mpsubr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/cortex/a9_mpsubr.S diff -u src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.3 src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.4 --- src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.3 Thu Feb 20 20:36:29 2014 +++ src/sys/arch/arm/cortex/a9_mpsubr.S Mon Mar 24 18:44:13 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: a9_mpsubr.S,v 1.12.2.3 2014/02/20 20:36:29 matt Exp $ */ +/* $NetBSD: a9_mpsubr.S,v 1.12.2.4 2014/03/24 18:44:13 matt Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. * All rights reserved. @@ -330,15 +330,23 @@ comlock: #endif /* MULTIPROCESSOR */ #endif /* VERBOSE_INIT_ARM */ -#ifdef CPU_CORTEXA9 a9_start: +cortex_init: mov r10, lr@ save lr cpsid if, #PSR_SVC32_MODE XPUTC(#64) +#ifdef KERNEL_BASES_EQUAL bl _C_LABEL(armv7_icache_inv_all) @ invalidate i-cache +#else + adr ip, cortex_init + ldr r0, =armv7_icache_inv_all + bfi ip, r0, #0, #28 + blx ip +#endif +#ifdef CPU_CORTEXA9 /* * Step 1a, invalidate the all cache tags in all ways on the SCU. */ @@ -352,14 +360,23 @@ a9_start: str r1, [r3, #SCU_INV_ALL_REG] @ write scu invalidate all dsb isb +#endif /* * Step 1b, invalidate the data cache */ XPUTC(#66) +#ifdef KERNEL_BASES_EQUAL bl _C_LABEL(armv7_dcache_wbinv_all) @ writeback/invalidate d-cache +#else + adr ip, cortex_init + ldr r0, =armv7_dcache_wbinv_all + bfi ip, r0, #0, #28 + blx ip +#endif XPUTC(#67) +#ifdef CPU_CORTEXA9 /* * Step 2, disable the data cache */ @@ -387,8 +404,8 @@ a9_start: mcr p15, 0, r2, c1, c0, 0 @ reenable caches isb XPUTC(#51) +#endif -#ifdef MULTIPROCESSOR /* * Step 4b, set ACTLR.SMP=1 (and ACTRL.FX=1) */ @@ -396,6 +413,8 @@ a9_start: orr r0, r0, #CORTEXA9_AUXCTL_SMP @ enable SMP mcr p15, 0, r0, c1, c0, 1 @ write aux ctl isb +#ifdef CPU_CORTEXA9 + mrc p15, 0, r0, c1, c0, 1 @ read aux ctl orr r0, r0, #CORTEXA9_AUXCTL_FW @ enable cache/tlb/coherency mcr p15, 0, r0, c1, c0, 1 @ write aux ctl isb @@ -526,4 +545,3 @@ ASEND(a9_mpstart) .Lbcm53xx_cpu_hatch: .word _C_LABEL(bcm53xx_cpu_hatch) #endif /* MULTIPROCESSOR */ -#endif /* CPU_CORTEXA9 */
CVS commit: [matt-nb5-mips64] src/sys/arch/evbarm
Module Name:src
Committed By: matt
Date: Mon Mar 24 18:46:38 UTC 2014
Modified Files:
src/sys/arch/evbarm/conf [matt-nb5-mips64]: Makefile.evbarm.inc
Added Files:
src/sys/arch/evbarm/conf [matt-nb5-mips64]: CUBIEBOARD
CUBIEBOARD_INSTALL files.cubie mk.cubie std.cubie
src/sys/arch/evbarm/cubie [matt-nb5-mips64]: cubie_machdep.c
cubie_start.S genassym.cf platform.h
Log Message:
Add cubie from HEAD
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.10.2.2 src/sys/arch/evbarm/conf/CUBIEBOARD
cvs rdiff -u -r0 -r1.1.2.2 src/sys/arch/evbarm/conf/CUBIEBOARD_INSTALL \
src/sys/arch/evbarm/conf/files.cubie
cvs rdiff -u -r1.19.12.1 -r1.19.12.2 \
src/sys/arch/evbarm/conf/Makefile.evbarm.inc
cvs rdiff -u -r0 -r1.3.2.2 src/sys/arch/evbarm/conf/mk.cubie \
src/sys/arch/evbarm/conf/std.cubie
cvs rdiff -u -r0 -r1.14.2.2 src/sys/arch/evbarm/cubie/cubie_machdep.c
cvs rdiff -u -r0 -r1.6.2.2 src/sys/arch/evbarm/cubie/cubie_start.S
cvs rdiff -u -r0 -r1.1.2.2 src/sys/arch/evbarm/cubie/genassym.cf
cvs rdiff -u -r0 -r1.2.2.2 src/sys/arch/evbarm/cubie/platform.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbarm/conf/Makefile.evbarm.inc
diff -u src/sys/arch/evbarm/conf/Makefile.evbarm.inc:1.19.12.1 src/sys/arch/evbarm/conf/Makefile.evbarm.inc:1.19.12.2
--- src/sys/arch/evbarm/conf/Makefile.evbarm.inc:1.19.12.1 Sat Feb 15 16:18:37 2014
+++ src/sys/arch/evbarm/conf/Makefile.evbarm.inc Mon Mar 24 18:46:38 2014
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.evbarm.inc,v 1.19.12.1 2014/02/15 16:18:37 matt Exp $
+# $NetBSD: Makefile.evbarm.inc,v 1.19.12.2 2014/03/24 18:46:38 matt Exp $
#
# If this is a install kernel and the ramdisk image exists in the object
@@ -22,6 +22,11 @@ SYSTEM_LD_TAIL_EXTRA+=; \
EXTRA_CLEAN+= ldscript tmp ${KERNELS:=.map}
+.if defined(KERNEL_BASE_PHYS) && defined(KERNEL_BASE_VIRT) \
+&& ${KERNEL_BASE_PHYS} == ${KERNEL_BASE_VIRT}
+CPPFLAGS+=-DKERNEL_BASES_EQUAL
+.endif
+
.if defined(KERNEL_BASE_PHYS)
LINKTEXT=
KERNLDSCRIPT= ldscript
Added files:
Index: src/sys/arch/evbarm/conf/CUBIEBOARD
diff -u /dev/null src/sys/arch/evbarm/conf/CUBIEBOARD:1.10.2.2
--- /dev/null Mon Mar 24 18:46:38 2014
+++ src/sys/arch/evbarm/conf/CUBIEBOARD Mon Mar 24 18:46:38 2014
@@ -0,0 +1,297 @@
+#
+# $NetBSD: CUBIEBOARD,v 1.10.2.2 2014/03/24 18:46:38 matt Exp $
+#
+# CUBIEBOARD -- Allwinner A10/A20 Eval Board Kernel
+#
+
+include "arch/evbarm/conf/std.cubie"
+
+# estimated number of users
+
+maxusers 32
+
+# Standard system options
+
+options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
+#options NTP # NTP phase/frequency locked loop
+
+# CPU options
+
+#options UVMHIST,UVMHIST_PRINT
+options CPU_CORTEXA8
+options CPU_CORTEXA7
+options ALLWINNER_A10
+options ALLWINNER_A20
+options PMAPCOUNTERS
+options AWIN_CONSOLE_EARLY
+
+# Architecture options
+
+# File systems
+
+file-system FFS # UFS
+#file-system LFS # log-structured file system
+file-system MFS # memory file system
+file-system NFS # Network file system
+#file-system ADOSFS # AmigaDOS-compatible file system
+#file-system EXT2FS # second extended file system (linux)
+#file-system CD9660 # ISO 9660 + Rock Ridge file system
+file-system MSDOSFS # MS-DOS file system
+#file-system FDESC # /dev/fd
+file-system KERNFS # /kern
+#file-system NULLFS # loopback file system
+file-system PROCFS # /proc
+#file-system PUFFS # Userspace file systems (e.g. ntfs-3g & sshfs)
+#file-system UMAPFS # NULLFS + uid and gid remapping
+#file-system UNION # union file system
+file-system TMPFS # memory file system
+file-system PTYFS # /dev/pts/N support
+
+# File system options
+#options QUOTA # legacy UFS quotas
+#options QUOTA2 # new, in-filesystem UFS quotas
+#options FFS_EI # FFS Endian Independent support
+#options NFSSERVER
+options WAPBL # File system journaling support
+#options FFS_NO_SNAPSHOT # No FFS snapshot support
+
+# Networking options
+
+#options GATEWAY # packet forwarding
+options INET # IP + ICMP + TCP + UDP
+options INET6 # IPV6
+#options IPSEC # IP security
+#options IPSEC_DEBUG # debug for IP security
+#options MROUTING # IP multicast routing
+#options PIM # Protocol Independent Multicast
+#options NETATALK # AppleTalk networking
+#options PPP_BSDCOMP # BSD-Compress compression support for PPP
+#options PPP_DEFLATE # Deflate compression support for PPP
+#options PPP_FILTER # Active filter support for PPP (requires bpf)
+#options TCP_DEBUG # Record last TCP_NDEBUG packets with SO_DEBUG
+
+options NFS_BOOT_BOOTP
+options NFS_BOOT_DHCP
+#options NFS_BOOT_BOOTSTATIC
+#options NFS_BOOTSTATIC_MYIP="\"192.168.1.4\""
+#options NFS_BOOTSTATIC_GWIP="\"192.168.1.1\""
+#options NFS_BOOTSTATIC_MASK="\"255.255.255.0\""
+#options NFS_BOOTSTATIC_SERVADDR="\"192.168.1.1\""
+#options NFS_BOOTSTATIC_SERVER="\"192.168.1.1:/nfs/sdp2430
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/arm32
Module Name:src
Committed By: matt
Date: Mon Mar 24 18:45:16 UTC 2014
Modified Files:
src/sys/arch/arm/arm32 [matt-nb5-mips64]: exception.S
Log Message:
Use the improved undefined method from HEAD
To generate a diff of this commit:
cvs rdiff -u -r1.16.18.1 -r1.16.18.2 src/sys/arch/arm/arm32/exception.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/exception.S
diff -u src/sys/arch/arm/arm32/exception.S:1.16.18.1 src/sys/arch/arm/arm32/exception.S:1.16.18.2
--- src/sys/arch/arm/arm32/exception.S:1.16.18.1 Sat Feb 15 16:18:36 2014
+++ src/sys/arch/arm/arm32/exception.S Mon Mar 24 18:45:16 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: exception.S,v 1.16.18.1 2014/02/15 16:18:36 matt Exp $ */
+/* $NetBSD: exception.S,v 1.16.18.2 2014/03/24 18:45:16 matt Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -51,7 +51,7 @@
#include
- RCSID("$NetBSD: exception.S,v 1.16.18.1 2014/02/15 16:18:36 matt Exp $")
+ RCSID("$NetBSD: exception.S,v 1.16.18.2 2014/03/24 18:45:16 matt Exp $")
.text
.align 0
@@ -218,13 +218,11 @@ ASEND(address_exception_entry)
* look like direct entry from the vector.
*/
ASENTRY_NP(undefined_entry)
- stmfd sp!, {r0, r1}
+ str r0, [sp, #-8]!
GET_CURCPU(r0)
- ldr r1, [sp], #0x0004
- str r1, [r0, #CI_UNDEFSAVE]!
- ldr r1, [sp], #0x0004
- str r1, [r0, #0x0004]
- ldmia r0, {r0, r1, pc}
+ ldr r0, [r0, #CI_UNDEFSAVE+8]
+ str r0, [sp, #4]
+ pop {r0, pc}
ASEND(undefined_entry)
/*
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/arm32
Module Name:src
Committed By: matt
Date: Mon Mar 24 18:44:44 UTC 2014
Modified Files:
src/sys/arch/arm/arm32 [matt-nb5-mips64]: arm32_boot.c
Log Message:
Need to deal with proc0paddr.
To generate a diff of this commit:
cvs rdiff -u -r1.5.2.2 -r1.5.2.3 src/sys/arch/arm/arm32/arm32_boot.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/arm32_boot.c
diff -u src/sys/arch/arm/arm32/arm32_boot.c:1.5.2.2 src/sys/arch/arm/arm32/arm32_boot.c:1.5.2.3
--- src/sys/arch/arm/arm32/arm32_boot.c:1.5.2.2 Sat Feb 15 16:18:36 2014
+++ src/sys/arch/arm/arm32/arm32_boot.c Mon Mar 24 18:44:43 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: arm32_boot.c,v 1.5.2.2 2014/02/15 16:18:36 matt Exp $ */
+/* $NetBSD: arm32_boot.c,v 1.5.2.3 2014/03/24 18:44:43 matt Exp $ */
/*
* Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
@@ -123,7 +123,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.5.2.2 2014/02/15 16:18:36 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.5.2.3 2014/03/24 18:44:43 matt Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -165,7 +165,8 @@ initarm_common(vaddr_t kvm_base, vsize_t
* this during uvm init.
*/
//uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
- lwp0.l_addr = (void *)kernelstack.pv_va;
+ extern struct user *proc0paddr;
+ lwp0.l_addr = proc0paddr = (void *)kernelstack.pv_va;
#ifdef VERBOSE_INIT_ARM
printf("bootstrap done.\n");
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/include
Module Name:src Committed By: matt Date: Mon Mar 24 18:43:40 UTC 2014 Modified Files: src/sys/arch/arm/include [matt-nb5-mips64]: armreg.h Log Message: merge l2ctrl from head To generate a diff of this commit: cvs rdiff -u -r1.41.12.1 -r1.41.12.2 src/sys/arch/arm/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/armreg.h diff -u src/sys/arch/arm/include/armreg.h:1.41.12.1 src/sys/arch/arm/include/armreg.h:1.41.12.2 --- src/sys/arch/arm/include/armreg.h:1.41.12.1 Sat Feb 15 16:18:36 2014 +++ src/sys/arch/arm/include/armreg.h Mon Mar 24 18:43:40 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.41.12.1 2014/02/15 16:18:36 matt Exp $ */ +/* $NetBSD: armreg.h,v 1.41.12.2 2014/03/24 18:43:40 matt Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -597,6 +597,10 @@ #define CORTEX_CNTENC_C __BIT(31) /* Disables the cycle counter */ #define CORTEX_CNTOFL_C __BIT(31) /* Cycle counter overflow flag */ +/* Defines for ARM Cortex A7/A15 L2CTRL */ +#define L2CTRL_NUMCPU __BITS(25,24) // numcpus - 1 +#define L2CTRL_ICPRES __BIT(23) // Interrupt Controller is present + /* Translate Table Base Control Register */ #define TTBCR_S_EAE __BIT(31) // Extended Address Extension #define TTBCR_S_PD1 __BIT(5) // Don't use TTBR1 @@ -765,6 +769,8 @@ ARMREG_WRITE_INLINE(tlbimva, "p15,0,%0,c ARMREG_WRITE_INLINE(tlbiasid, "p15,0,%0,c8,c7,2") /* Invalidate unified TLB by ASID */ ARMREG_WRITE_INLINE(tlbimvaa, "p15,0,%0,c8,c7,3") /* Invalidate unified TLB by MVA, all ASID */ /* cp15 c9 registers */ +ARMREG_READ_INLINE(l2ctrl, "p15,1,%0,c9,c0,2") /* A7/A15 L2 Control Register */ +ARMREG_WRITE_INLINE(l2ctrl, "p15,1,%0,c9,c0,2") /* A7/A15 L2 Control Register */ ARMREG_READ_INLINE(pmcr, "p15,0,%0,c9,c12,0") /* PMC Control Register */ ARMREG_WRITE_INLINE(pmcr, "p15,0,%0,c9,c12,0") /* PMC Control Register */ ARMREG_READ_INLINE(pmcntenset, "p15,0,%0,c9,c12,1") /* PMC Count Enable Set */
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/include/arm32
Module Name:src Committed By: matt Date: Mon Mar 24 18:42:50 UTC 2014 Modified Files: src/sys/arch/arm/include/arm32 [matt-nb5-mips64]: vmparam.h Log Message: Deal with those arms who only need one type of freelist. To generate a diff of this commit: cvs rdiff -u -r1.23.12.1 -r1.23.12.2 src/sys/arch/arm/include/arm32/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/vmparam.h diff -u src/sys/arch/arm/include/arm32/vmparam.h:1.23.12.1 src/sys/arch/arm/include/arm32/vmparam.h:1.23.12.2 --- src/sys/arch/arm/include/arm32/vmparam.h:1.23.12.1 Sat Feb 15 16:18:36 2014 +++ src/sys/arch/arm/include/arm32/vmparam.h Mon Mar 24 18:42:50 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.23.12.1 2014/02/15 16:18:36 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.23.12.2 2014/03/24 18:42:50 matt Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -112,8 +112,12 @@ extern vaddr_t virtual_end; (VM_NFREELIST == 1 \ ? VM_PGCOLOR_BUCKET(pg) : (*arm_page_to_pggroup)((pg), (ncolors))) +#ifdef PMAP_NEED_ALLOC_POOLPAGE #define VM_FREELIST_NORMALOK_P(lcv) \ ((lcv) == VM_FREELIST_DEFAULT || (lcv) != arm_poolpage_vmfreelist) +#else +#define VM_FREELIST_NORMALOK_P(lcv) true +#endif struct vm_page; extern size_t (*arm_page_to_pggroup)(struct vm_page *, size_t);
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/include/arm32
Module Name:src Committed By: matt Date: Mon Mar 24 16:50:57 UTC 2014 Modified Files: src/sys/arch/arm/include/arm32 [matt-nb5-mips64]: pmap.h Log Message: Define PMAP_KMPAGE To generate a diff of this commit: cvs rdiff -u -r1.88.10.1 -r1.88.10.2 src/sys/arch/arm/include/arm32/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/pmap.h diff -u src/sys/arch/arm/include/arm32/pmap.h:1.88.10.1 src/sys/arch/arm/include/arm32/pmap.h:1.88.10.2 --- src/sys/arch/arm/include/arm32/pmap.h:1.88.10.1 Sat Feb 15 16:18:36 2014 +++ src/sys/arch/arm/include/arm32/pmap.h Mon Mar 24 16:50:56 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.88.10.1 2014/02/15 16:18:36 matt Exp $ */ +/* $NetBSD: pmap.h,v 1.88.10.2 2014/03/24 16:50:56 matt Exp $ */ /* * Copyright (c) 2002, 2003 Wasabi Systems, Inc. @@ -305,8 +305,8 @@ void pmap_remove_all(struct pmap *); bool pmap_extract(struct pmap *, vaddr_t, paddr_t *); #define PMAP_NEED_PROCWR -#define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */ -#define PMAP_ENABLE_PMAP_KMPAGE /* enable the PMAP_KMPAGE flag */ +#define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */ +#define PMAP_KMPAGE 0x0800 /* enable the PMAP_KMPAGE flag */ #if (ARM_MMU_V6 + ARM_MMU_V7) > 0 #define PMAP_PREFER(hint, vap, sz, td) pmap_prefer((hint), (vap), (td))
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/arm32
Module Name:src Committed By: matt Date: Mon Mar 24 07:37:39 UTC 2014 Modified Files: src/sys/arch/arm/arm32 [matt-nb5-mips64]: arm32_kvminit.c Log Message: Make sure kernel starts on a page boundary. To generate a diff of this commit: cvs rdiff -u -r1.22.2.2 -r1.22.2.3 src/sys/arch/arm/arm32/arm32_kvminit.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/arm32_kvminit.c diff -u src/sys/arch/arm/arm32/arm32_kvminit.c:1.22.2.2 src/sys/arch/arm/arm32/arm32_kvminit.c:1.22.2.3 --- src/sys/arch/arm/arm32/arm32_kvminit.c:1.22.2.2 Sat Feb 15 16:18:36 2014 +++ src/sys/arch/arm/arm32/arm32_kvminit.c Mon Mar 24 07:37:39 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: arm32_kvminit.c,v 1.22.2.2 2014/02/15 16:18:36 matt Exp $ */ +/* $NetBSD: arm32_kvminit.c,v 1.22.2.3 2014/03/24 07:37:39 matt Exp $ */ /* * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. @@ -122,7 +122,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: arm32_kvminit.c,v 1.22.2.2 2014/02/15 16:18:36 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: arm32_kvminit.c,v 1.22.2.3 2014/03/24 07:37:39 matt Exp $"); #include #include @@ -182,7 +182,7 @@ arm32_bootmem_init(paddr_t memstart, psi /* * Let's record where the kernel lives. */ - bmi->bmi_kernelstart = kernelstart; + bmi->bmi_kernelstart = trunc_page(kernelstart); bmi->bmi_kernelend = KERN_VTOPHYS(bmi, round_page((vaddr_t)_end)); #ifdef VERBOSE_INIT_ARM
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/include
Module Name:src Committed By: matt Date: Wed Feb 26 00:59:27 UTC 2014 Modified Files: src/sys/arch/arm/include [matt-nb5-mips64]: elf_machdep.h Log Message: Use right name To generate a diff of this commit: cvs rdiff -u -r1.7.78.2 -r1.7.78.3 src/sys/arch/arm/include/elf_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/elf_machdep.h diff -u src/sys/arch/arm/include/elf_machdep.h:1.7.78.2 src/sys/arch/arm/include/elf_machdep.h:1.7.78.3 --- src/sys/arch/arm/include/elf_machdep.h:1.7.78.2 Tue Feb 25 00:05:49 2014 +++ src/sys/arch/arm/include/elf_machdep.h Wed Feb 26 00:59:27 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: elf_machdep.h,v 1.7.78.2 2014/02/25 00:05:49 matt Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.7.78.3 2014/02/26 00:59:27 matt Exp $ */ #ifndef _ARM_ELF_MACHDEP_H_ #define _ARM_ELF_MACHDEP_H_ @@ -146,7 +146,7 @@ #ifdef _KERNEL #ifdef ELFSIZE -#define ELF_MD_COREDUMP_FUNC ELFNAME2(arm_netbsd,coredump_setup) +#define ELF_MD_COREDUMP_SETUP ELFNAME2(arm_netbsd,coredump_setup) #endif struct exec_package;
CVS commit: [matt-nb5-mips64] src/sys/arch/arm
Module Name:src
Committed By: matt
Date: Tue Feb 25 00:05:49 UTC 2014
Modified Files:
src/sys/arch/arm/arm [matt-nb5-mips64]: core_machdep.c
src/sys/arch/arm/include [matt-nb5-mips64]: elf_machdep.h
Log Message:
Tag BE8 coredumps properly.
To generate a diff of this commit:
cvs rdiff -u -r1.4.2.2 -r1.4.2.3 src/sys/arch/arm/arm/core_machdep.c
cvs rdiff -u -r1.7.78.1 -r1.7.78.2 src/sys/arch/arm/include/elf_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/core_machdep.c
diff -u src/sys/arch/arm/arm/core_machdep.c:1.4.2.2 src/sys/arch/arm/arm/core_machdep.c:1.4.2.3
--- src/sys/arch/arm/arm/core_machdep.c:1.4.2.2 Sat Feb 15 16:18:35 2014
+++ src/sys/arch/arm/arm/core_machdep.c Tue Feb 25 00:05:49 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: core_machdep.c,v 1.4.2.2 2014/02/15 16:18:35 matt Exp $ */
+/* $NetBSD: core_machdep.c,v 1.4.2.3 2014/02/25 00:05:49 matt Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -37,7 +37,10 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: core_machdep.c,v 1.4.2.2 2014/02/15 16:18:35 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: core_machdep.c,v 1.4.2.3 2014/02/25 00:05:49 matt Exp $");
+
+#include "opt_execfmt.h"
+#include "opt_compat_netbsd32.h"
#include
#include
@@ -49,6 +52,12 @@ __KERNEL_RCSID(0, "$NetBSD: core_machdep
#include /* for MID_* */
+#ifdef EXEC_ELF32
+#include
+#endif
+
+#include
+
#include
@@ -95,3 +104,19 @@ cpu_coredump(struct lwp *l, void *iocook
return coredump_write(iocookie, UIO_SYSSPACE,
&cpustate, sizeof(cpustate));
}
+
+#ifdef EXEC_ELF32
+void
+arm_netbsd_elf32_coredump_setup(struct lwp *l, void *arg)
+{
+#if defined(__ARMEB__)
+ Elf32_Ehdr * const eh = arg;
+
+if (CPU_IS_ARMV7_P()
+ || (CPU_IS_ARMV6_P()
+ && (armreg_sctrl_read() & CPU_CONTROL_BEND_ENABLE) == 0)) {
+ eh->e_flags |= EF_ARM_BE8;
+ }
+#endif
+}
+#endif
Index: src/sys/arch/arm/include/elf_machdep.h
diff -u src/sys/arch/arm/include/elf_machdep.h:1.7.78.1 src/sys/arch/arm/include/elf_machdep.h:1.7.78.2
--- src/sys/arch/arm/include/elf_machdep.h:1.7.78.1 Sat Feb 15 16:18:36 2014
+++ src/sys/arch/arm/include/elf_machdep.h Tue Feb 25 00:05:49 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: elf_machdep.h,v 1.7.78.1 2014/02/15 16:18:36 matt Exp $ */
+/* $NetBSD: elf_machdep.h,v 1.7.78.2 2014/02/25 00:05:49 matt Exp $ */
#ifndef _ARM_ELF_MACHDEP_H_
#define _ARM_ELF_MACHDEP_H_
@@ -144,4 +144,14 @@
/* Processor specific symbol types */
#define STT_ARM_TFUNC STT_LOPROC
+#ifdef _KERNEL
+#ifdef ELFSIZE
+#define ELF_MD_COREDUMP_FUNC ELFNAME2(arm_netbsd,coredump_setup)
+#endif
+
+struct exec_package;
+
+void arm_netbsd_elf32_coredump_setup(struct lwp *, void *);
+#endif
+
#endif /* _ARM_ELF_MACHDEP_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Tue Feb 25 00:05:11 UTC 2014 Modified Files: src/sys/arch/arm/arm [matt-nb5-mips64]: cpu_exec.c Log Message: fix typo To generate a diff of this commit: cvs rdiff -u -r1.8.2.2 -r1.8.2.3 src/sys/arch/arm/arm/cpu_exec.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpu_exec.c diff -u src/sys/arch/arm/arm/cpu_exec.c:1.8.2.2 src/sys/arch/arm/arm/cpu_exec.c:1.8.2.3 --- src/sys/arch/arm/arm/cpu_exec.c:1.8.2.2 Sat Feb 15 16:18:35 2014 +++ src/sys/arch/arm/arm/cpu_exec.c Tue Feb 25 00:05:11 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu_exec.c,v 1.8.2.2 2014/02/15 16:18:35 matt Exp $ */ +/* $NetBSD: cpu_exec.c,v 1.8.2.3 2014/02/25 00:05:11 matt Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: cpu_exec.c,v 1.8.2.2 2014/02/15 16:18:35 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: cpu_exec.c,v 1.8.2.3 2014/02/25 00:05:11 matt Exp $"); #include "opt_compat_netbsd.h" #include "opt_compat_netbsd32.h" @@ -51,7 +51,7 @@ __KERNEL_RCSID(0, "$NetBSD: cpu_exec.c,v #include -#if EXEC_ELF32 +#ifdef EXEC_ELF32 int arm_netbsd_elf32_probe(struct lwp *l, struct exec_package *epp, void *eh0, char *itp, vaddr_t *start_p)
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/cortex
Module Name:src Committed By: matt Date: Thu Feb 20 20:36:29 UTC 2014 Modified Files: src/sys/arch/arm/cortex [matt-nb5-mips64]: a9_mpsubr.S Log Message: Use right register when setting ttbr To generate a diff of this commit: cvs rdiff -u -r1.12.2.2 -r1.12.2.3 src/sys/arch/arm/cortex/a9_mpsubr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/cortex/a9_mpsubr.S diff -u src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.2 src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.3 --- src/sys/arch/arm/cortex/a9_mpsubr.S:1.12.2.2 Sat Feb 15 16:18:36 2014 +++ src/sys/arch/arm/cortex/a9_mpsubr.S Thu Feb 20 20:36:29 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: a9_mpsubr.S,v 1.12.2.2 2014/02/15 16:18:36 matt Exp $ */ +/* $NetBSD: a9_mpsubr.S,v 1.12.2.3 2014/02/20 20:36:29 matt Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. * All rights reserved. @@ -178,7 +178,7 @@ arm_cpuinit: cmp r1, #0 orrlt r10, r10, #0x5b /* MP, cachable (Normal WB) */ orrge r10, r10, #0x1b /* Non-MP, cacheable, normal WB */ - mcr p15, 0, r1, c2, c0, 0 /* Set Translation Table Base */ + mcr p15, 0, r10, c2, c0, 0 /* Set Translation Table Base */ XPUTC(#49) mov r1, #0
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/broadcom
Module Name:src
Committed By: matt
Date: Wed Feb 19 23:19:57 UTC 2014
Modified Files:
src/sys/arch/arm/broadcom [matt-nb5-mips64]: bcm53xx_board.c
Log Message:
Fix dmaranges for BCM563XX
Conditionalize call to arml2cc_init
To generate a diff of this commit:
cvs rdiff -u -r1.17.2.2 -r1.17.2.3 src/sys/arch/arm/broadcom/bcm53xx_board.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm53xx_board.c
diff -u src/sys/arch/arm/broadcom/bcm53xx_board.c:1.17.2.2 src/sys/arch/arm/broadcom/bcm53xx_board.c:1.17.2.3
--- src/sys/arch/arm/broadcom/bcm53xx_board.c:1.17.2.2 Sat Feb 15 16:18:36 2014
+++ src/sys/arch/arm/broadcom/bcm53xx_board.c Wed Feb 19 23:19:57 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm53xx_board.c,v 1.17.2.2 2014/02/15 16:18:36 matt Exp $ */
+/* $NetBSD: bcm53xx_board.c,v 1.17.2.3 2014/02/19 23:19:57 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -29,12 +29,13 @@
*/
#include "opt_broadcom.h"
+#include "arml2cc.h"
#define _ARM32_BUS_DMA_PRIVATE
#include
-__KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.17.2.2 2014/02/15 16:18:36 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.17.2.3 2014/02/19 23:19:57 matt Exp $");
#include
#include
@@ -83,8 +84,8 @@ struct arm32_dma_range bcm53xx_dma_range
.dr_busbase = 0x6000,
.dr_len = 0x2000,
}, [1] = {
- .dr_sysbase = 0xa000,
- .dr_busbase = 0xa000,
+ .dr_sysbase = 0x8000,
+ .dr_busbase = 0x8000,
},
#endif
};
@@ -115,8 +116,8 @@ struct arm32_dma_range bcm53xx_coherent_
.dr_len = 0x2000,
.dr_flags = _BUS_DMAMAP_COHERENT,
}, [1] = {
- .dr_sysbase = 0xa000,
- .dr_busbase = 0xa000,
+ .dr_sysbase = 0x8000,
+ .dr_busbase = 0x8000,
},
#endif
};
@@ -554,8 +555,10 @@ bcm53xx_bootstrap(vaddr_t iobase)
curcpu()->ci_data.cpu_cc_freq = clk->clk_cpu;
+#if NARML2CC > 0
arml2cc_init(bcm53xx_armcore_bst, bcm53xx_armcore_bsh,
ARMCORE_L2C_BASE);
+#endif
}
void
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/cortex
Module Name:src Committed By: matt Date: Wed Feb 19 23:18:40 UTC 2014 Modified Files: src/sys/arch/arm/cortex [matt-nb5-mips64]: files.cortex Log Message: arml2cc -> needs-flag To generate a diff of this commit: cvs rdiff -u -r1.4.6.2 -r1.4.6.3 src/sys/arch/arm/cortex/files.cortex Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/cortex/files.cortex diff -u src/sys/arch/arm/cortex/files.cortex:1.4.6.2 src/sys/arch/arm/cortex/files.cortex:1.4.6.3 --- src/sys/arch/arm/cortex/files.cortex:1.4.6.2 Sat Feb 15 16:18:36 2014 +++ src/sys/arch/arm/cortex/files.cortex Wed Feb 19 23:18:40 2014 @@ -1,4 +1,4 @@ -# $NetBSD: files.cortex,v 1.4.6.2 2014/02/15 16:18:36 matt Exp $ +# $NetBSD: files.cortex,v 1.4.6.3 2014/02/19 23:18:40 matt Exp $ defflag opt_cpu_in_cksum.h NEON_IN_CKSUM @@ -17,7 +17,7 @@ file arch/arm/cortex/gic.c armgic # ARM PL310 L2 Cache Controller(initially on Cortex-A9) device arml2cc attach arml2cc at armperiph -file arch/arm/cortex/pl310.c arml2cc +file arch/arm/cortex/pl310.c arml2cc needs-flag # ARMv7 Generic Timer device armgtmr
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/arm
Module Name:src Committed By: matt Date: Sat Feb 15 19:09:56 UTC 2014 Modified Files: src/sys/arch/arm/arm [matt-nb5-mips64]: sig_machdep.c Log Message: Use STACKALIGNBYTES To generate a diff of this commit: cvs rdiff -u -r1.35.16.1 -r1.35.16.2 src/sys/arch/arm/arm/sig_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/sig_machdep.c diff -u src/sys/arch/arm/arm/sig_machdep.c:1.35.16.1 src/sys/arch/arm/arm/sig_machdep.c:1.35.16.2 --- src/sys/arch/arm/arm/sig_machdep.c:1.35.16.1 Sat Feb 15 16:18:36 2014 +++ src/sys/arch/arm/arm/sig_machdep.c Sat Feb 15 19:09:56 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: sig_machdep.c,v 1.35.16.1 2014/02/15 16:18:36 matt Exp $ */ +/* $NetBSD: sig_machdep.c,v 1.35.16.2 2014/02/15 19:09:56 matt Exp $ */ /* * Copyright (c) 1994-1998 Mark Brinicombe. @@ -44,7 +44,7 @@ #include -__KERNEL_RCSID(0, "$NetBSD: sig_machdep.c,v 1.35.16.1 2014/02/15 16:18:36 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: sig_machdep.c,v 1.35.16.2 2014/02/15 19:09:56 matt Exp $"); #include /* XXX only needed by syscallargs.h */ #include @@ -104,7 +104,7 @@ sendsig_siginfo(const ksiginfo_t *ksi, c fp--; /* make the stack aligned */ - fp = (struct sigframe_siginfo *)STACK_ALIGN(fp, STACK_ALIGNBYTES); + fp = (struct sigframe_siginfo *)STACK_ALIGN(fp, STACKALIGNBYTES); /* populate the siginfo frame */ frame.sf_si._info = ksi->ksi_info;
CVS commit: [matt-nb5-mips64] src/sys/arch/evbarm/conf
Module Name:src Committed By: matt Date: Sat Feb 15 17:50:02 UTC 2014 Modified Files: src/sys/arch/evbarm/conf [matt-nb5-mips64]: std.bcm53xx Log Message: remove __HAVE_ATOMIC64_OPS (it's in types.h now) To generate a diff of this commit: cvs rdiff -u -r1.13.2.2 -r1.13.2.3 src/sys/arch/evbarm/conf/std.bcm53xx Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/evbarm/conf/std.bcm53xx diff -u src/sys/arch/evbarm/conf/std.bcm53xx:1.13.2.2 src/sys/arch/evbarm/conf/std.bcm53xx:1.13.2.3 --- src/sys/arch/evbarm/conf/std.bcm53xx:1.13.2.2 Sat Feb 15 16:18:37 2014 +++ src/sys/arch/evbarm/conf/std.bcm53xx Sat Feb 15 17:50:02 2014 @@ -1,4 +1,4 @@ -# $NetBSD: std.bcm53xx,v 1.13.2.2 2014/02/15 16:18:37 matt Exp $ +# $NetBSD: std.bcm53xx,v 1.13.2.3 2014/02/15 17:50:02 matt Exp $ # # standard NetBSD/evbarm for BCM5301X options @@ -16,7 +16,6 @@ options PMAP_NEED_ALLOC_POOLPAGE options __HAVE_FAST_SOFTINTS # should be in types.h options __HAVE_CPU_UAREA_ALLOC_IDLELWP options __HAVE_CPU_COUNTER -options __HAVE_ATOMIC64_OPS options __HAVE_PCI_CONF_HOOK options TPIDRPRW_IS_CURCPU options KERNEL_BASE_EXT=0x8000
CVS commit: [matt-nb5-mips64] src/sys/arch/evbarm/include
Module Name:src Committed By: matt Date: Sat Feb 15 17:50:31 UTC 2014 Modified Files: src/sys/arch/evbarm/include [matt-nb5-mips64]: vmparam.h Log Message: Export VM_*FREELIST To generate a diff of this commit: cvs rdiff -u -r1.25.18.2 -r1.25.18.3 src/sys/arch/evbarm/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/evbarm/include/vmparam.h diff -u src/sys/arch/evbarm/include/vmparam.h:1.25.18.2 src/sys/arch/evbarm/include/vmparam.h:1.25.18.3 --- src/sys/arch/evbarm/include/vmparam.h:1.25.18.2 Sat Feb 15 16:18:37 2014 +++ src/sys/arch/evbarm/include/vmparam.h Sat Feb 15 17:50:31 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.25.18.2 2014/02/15 16:18:37 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.25.18.3 2014/02/15 17:50:31 matt Exp $ */ /* * Copyright (c) 1988 The Regents of the University of California. @@ -64,6 +64,7 @@ /* virtual sizes (bytes) for various kernel submaps */ #define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE) +#endif /* _KERNEL || _KMEMUSER */ /* * max number of non-contig chunks of physical RAM you can have @@ -90,6 +91,5 @@ #define VM_FREELIST_DEFAULT 0 #define VM_FREELIST_ISADMA 1 -#endif /* _KERNEL || _KMEMUSER */ #endif /* _EVBARM_VMPARAM_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/include
Module Name:src Committed By: matt Date: Sat Feb 15 16:30:24 UTC 2014 Modified Files: src/sys/arch/arm/include [matt-nb5-mips64]: param.h Log Message: Fix typo STACK_ALIGNBYTES -> STACKALIGNBYTES To generate a diff of this commit: cvs rdiff -u -r1.12.12.1 -r1.12.12.2 src/sys/arch/arm/include/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/param.h diff -u src/sys/arch/arm/include/param.h:1.12.12.1 src/sys/arch/arm/include/param.h:1.12.12.2 --- src/sys/arch/arm/include/param.h:1.12.12.1 Sat Feb 15 16:18:36 2014 +++ src/sys/arch/arm/include/param.h Sat Feb 15 16:30:23 2014 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.12.12.1 2014/02/15 16:18:36 matt Exp $ */ +/* $NetBSD: param.h,v 1.12.12.2 2014/02/15 16:30:23 matt Exp $ */ /* * Copyright (c) 1994,1995 Mark Brinicombe. @@ -151,7 +151,7 @@ #define ALIGNBYTES 3 #define ALIGN(p) (((uintptr_t)(p) + ALIGNBYTES) & ~ALIGNBYTES) #define ALIGNED_POINTER(p,t) (((uintptr_t)(p) % sizeof(t)) == 0) -#define STACK_ALIGNBYTES (8 - 1) +#define STACKALIGNBYTES (8 - 1) #define STACKALIGN(p) ((uintptr_t)(p) & ~STACKALIGNBYTES) #define DEV_BSHIFT 9 /* log2(DEV_BSIZE) */
CVS commit: [matt-nb5-mips64] src/sys/arch
Module Name:src Committed By: matt Date: Sat Feb 15 16:18:37 UTC 2014 Modified Files: src/sys/arch/arm/arm [matt-nb5-mips64]: arm_machdep.c ast.c bcopyinout.S bcopyinout_xscale.S blockio.S bootconfig.c bus_space_asm_generic.S bus_space_notimpl.S compat_13_machdep.c compat_16_machdep.c copystr.S cpu_in_cksum.S cpufunc.c cpufunc_asm.S cpufunc_asm_arm10.S cpufunc_asm_arm11.S cpufunc_asm_arm1136.S cpufunc_asm_arm3.S cpufunc_asm_arm67.S cpufunc_asm_arm7tdmi.S cpufunc_asm_arm8.S cpufunc_asm_arm9.S cpufunc_asm_armv4.S cpufunc_asm_armv5.S cpufunc_asm_armv5_ec.S cpufunc_asm_armv6.S cpufunc_asm_fa526.S cpufunc_asm_ixp12x0.S cpufunc_asm_sa1.S cpufunc_asm_sa11x0.S cpufunc_asm_xscale.S db_trace.c disassem.c disksubr.c disksubr_acorn.c disksubr_mbr.c fiq.c fiq_subr.S idle_machdep.c linux_syscall.c linux_trap.c lock_cas.S process_machdep.c sig_machdep.c syscall.c undefined.c vectors.S src/sys/arch/arm/arm32 [matt-nb5-mips64]: arm11_pmc.c arm32_machdep.c bcopy_page.S bus_dma.c cpu.c cpuswitch.S db_interface.c db_machdep.c exception.S fault.c genassym.cf intr.c irq_dispatch.S kgdb_machdep.c kobj_machdep.c locore.S mem.c pmap.c setcpsr.S setstack.S spl.S stubs.c sys_machdep.c vm_machdep.c src/sys/arch/arm/conf [matt-nb5-mips64]: Makefile.arm files.arm kern.ldscript.head kern.ldscript.tail majors.arm32 src/sys/arch/arm/include [matt-nb5-mips64]: armreg.h asm.h bootconfig.h bus.h byte_swap.h cpu.h cpuconf.h cpufunc.h elf_machdep.h frame.h lock.h mutex.h param.h pcb.h pci_machdep.h proc.h sysarch.h types.h src/sys/arch/arm/include/arm32 [matt-nb5-mips64]: db_machdep.h frame.h machdep.h pmap.h psl.h pte.h vmparam.h src/sys/arch/arm/mainbus [matt-nb5-mips64]: cpu_mainbus.c mainbus.c mainbus.h mainbus_io.c mainbus_io_asm.S src/sys/arch/arm/pic [matt-nb5-mips64]: files.pic pic.c picvar.h src/sys/arch/evbarm/conf [matt-nb5-mips64]: Makefile.evbarm.inc files.evbarm src/sys/arch/evbarm/include [matt-nb5-mips64]: autoconf.h intr.h vmparam.h Added Files: src/sys/arch/arm/arm [matt-nb5-mips64]: bus_space_a2x.S bus_space_a4x.S core_machdep.c cpu_exec.c cpu_in_cksum_buffer.S cpu_in_cksum_fold.S cpu_in_cksum_v4hdr.S cpufunc_asm_arm11x6.S cpufunc_asm_armv7.S cpufunc_asm_pj4b.S cpufunc_asm_sheeva.S fusu.S src/sys/arch/arm/arm32 [matt-nb5-mips64]: arm32_boot.c arm32_kvminit.c arm32_reboot.c cortex_pmc.c netbsd32_machdep.c src/sys/arch/arm/broadcom [matt-nb5-mips64]: bcm53xx_board.c bcm53xx_cca.c bcm53xx_ccb.c bcm53xx_eth.c bcm53xx_i2c.c bcm53xx_idm.c bcm53xx_intr.h bcm53xx_mdio.c bcm53xx_nand.c bcm53xx_pax.c bcm53xx_reg.h bcm53xx_rng.c bcm53xx_sdhc.c bcm53xx_usb.c bcm53xx_var.h bcmgen_space.c files.bcm53xx src/sys/arch/arm/cortex [matt-nb5-mips64]: a9_mpsubr.S a9tmr.c a9tmr_intr.h a9tmr_reg.h a9tmr_var.h a9wdt.c armperiph.c cpu_in_cksum_asm_neon.S cpu_in_cksum_neon.c files.cortex gic.c gic_intr.h gic_reg.h gtmr.c gtmr_intr.h gtmr_var.h mpcore_var.h pl310.c pl310_reg.h pl310_var.h scu_reg.h src/sys/arch/arm/include [matt-nb5-mips64]: cpu_counter.h locore.h src/sys/arch/arm/include/arm32 [matt-nb5-mips64]: vmpagemd.h src/sys/arch/arm/pic [matt-nb5-mips64]: pic_splfuncs.c src/sys/arch/evbarm/bcm53xx [matt-nb5-mips64]: bcm53xx_machdep.c bcm53xx_start.S genassym.cf platform.h src/sys/arch/evbarm/conf [matt-nb5-mips64]: BCM5301X BCM5301X_INSTALL BCM56340 BCM56340_INSTALL files.bcm53xx mk.bcm53xx std.bcm53xx std.evbarm src/sys/arch/evbarm/include [matt-nb5-mips64]: cpu_counter.h Removed Files: src/sys/arch/arm/arm [matt-nb5-mips64]: vm_machdep_arm.c src/sys/arch/arm/arm32 [matt-nb5-mips64]: atomic.S fusu.S Log Message: Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels. To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.21.8.1 src/sys/arch/arm/arm/arm_machdep.c cvs rdiff -u -r1.15 -r1.15.8.1 src/sys/arch/arm/arm/ast.c cvs rdiff -u -r1.15 -r1.15.16.1 src/sys/arch/arm/arm/bcopyinout.S cvs rdiff -u -r1.5 -r1.5.16.1 src/sys/arch/arm/arm/bcopyinout_xscale.S \ src/sys/arch/arm/arm/lock_cas.S cvs rdiff -u -r1.5 -r1.5.134.1 src/sys/arch/arm/arm/blockio.S \ src/sys/arch/arm/arm/fiq.c cvs rdiff -u -r1.5 -r1.5.76.1 src/sys/arch/arm/arm/bootconfig.c cvs rdiff -u -r0 -r1.4.2.2 src/sys/arch/arm/arm/bus_space_a2x.S \ src/sys/arch/arm/arm/bus_space_a4x.S src/sys/arch/arm/arm/core_machdep.c \ src/sys/arch/arm/arm/cpufunc_asm_sheeva.S cvs rdiff -u -r1.5 -
CVS commit: [matt-nb5-mips64] src/sys/arch/evbarm/stand/gzboot
Module Name:src
Committed By: matt
Date: Thu Dec 19 01:18:44 UTC 2013
Modified Files:
src/sys/arch/evbarm/stand/gzboot [matt-nb5-mips64]: Makefile
Log Message:
Make endian check more generic
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.9.10.1 src/sys/arch/evbarm/stand/gzboot/Makefile
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbarm/stand/gzboot/Makefile
diff -u src/sys/arch/evbarm/stand/gzboot/Makefile:1.9 src/sys/arch/evbarm/stand/gzboot/Makefile:1.9.10.1
--- src/sys/arch/evbarm/stand/gzboot/Makefile:1.9 Thu Oct 30 15:33:42 2008
+++ src/sys/arch/evbarm/stand/gzboot/Makefile Thu Dec 19 01:18:44 2013
@@ -1,6 +1,6 @@
-# $NetBSD: Makefile,v 1.9 2008/10/30 15:33:42 cliff Exp $
+# $NetBSD: Makefile,v 1.9.10.1 2013/12/19 01:18:44 matt Exp $
-.if ${MACHINE_ARCH} == "arm"
+.if ${MACHINE_ARCH:Marm*eb} == ""
# Little endian platforms
SUBDIR= ADI_BRH_flash_0x0014
SUBDIR+= GEMINI_dram_0x0160
CVS commit: [matt-nb5-mips64] src/sys/arch/evbarm/include
Module Name:src Committed By: matt Date: Thu Dec 19 01:18:01 UTC 2013 Modified Files: src/sys/arch/evbarm/include [matt-nb5-mips64]: vmparam.h Log Message: compat in libc needs some uvm stuff which needs VM_NFREELIST defined. To generate a diff of this commit: cvs rdiff -u -r1.25 -r1.25.18.1 src/sys/arch/evbarm/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/evbarm/include/vmparam.h diff -u src/sys/arch/evbarm/include/vmparam.h:1.25 src/sys/arch/evbarm/include/vmparam.h:1.25.18.1 --- src/sys/arch/evbarm/include/vmparam.h:1.25 Sun Apr 27 18:58:46 2008 +++ src/sys/arch/evbarm/include/vmparam.h Thu Dec 19 01:18:01 2013 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.25 2008/04/27 18:58:46 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.25.18.1 2013/12/19 01:18:01 matt Exp $ */ /* * Copyright (c) 1988 The Regents of the University of California. @@ -32,7 +32,7 @@ #ifndef _ARM32_VMPARAM_H_ #define _ARM32_VMPARAM_H_ -#ifdef _KERNEL +#if defined(_KERNEL) || 1 #include
CVS commit: [matt-nb5-mips64] src/sys/arch/arm/include
Module Name:src Committed By: matt Date: Thu Dec 19 01:17:06 UTC 2013 Modified Files: src/sys/arch/arm/include [matt-nb5-mips64]: cdefs.h Log Message: Pull from HEAD (for post armv6 defines). To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.3.38.1 src/sys/arch/arm/include/cdefs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cdefs.h diff -u src/sys/arch/arm/include/cdefs.h:1.3 src/sys/arch/arm/include/cdefs.h:1.3.38.1 --- src/sys/arch/arm/include/cdefs.h:1.3 Wed Oct 17 19:53:41 2007 +++ src/sys/arch/arm/include/cdefs.h Thu Dec 19 01:17:06 2013 @@ -1,15 +1,31 @@ -/* $NetBSD: cdefs.h,v 1.3 2007/10/17 19:53:41 garbled Exp $ */ +/* $NetBSD: cdefs.h,v 1.3.38.1 2013/12/19 01:17:06 matt Exp $ */ -#ifndef _MACHINE_CDEFS_H_ -#define _MACHINE_CDEFS_H_ +#ifndef _ARM_CDEFS_H_ +#define _ARM_CDEFS_H_ -#if defined (__ARM_ARCH_6__) || defined (__ARM_ARCH_6J__) +#if defined (__ARM_ARCH_7__) || defined (__ARM_ARCH_7A__) || \ +defined (__ARM_ARCH_7R__) || defined (__ARM_ARCH_7M__) || \ +defined (__ARM_ARCH_7EM__) /* 7R, 7M, 7EM are for non MMU arms */ +#define _ARM_ARCH_7 +#endif + +#if defined (_ARM_ARCH_7) || defined (__ARM_ARCH_6T2__) +#define _ARM_ARCH_T2 /* Thumb2 */ +#endif + +#if defined (_ARM_ARCH_T2) || defined (__ARM_ARCH_6__) || \ +defined (__ARM_ARCH_6J__) || defined (__ARM_ARCH_6K__) || \ +defined (__ARM_ARCH_6Z__) || defined (__ARM_ARCH_6ZK__) || \ +defined (__ARM_ARCH_6ZM__) #define _ARM_ARCH_6 #endif -#if defined (_ARM_ARCH_6) || defined (__ARM_ARCH_5__) || \ -defined (__ARM_ARCH_5T__) || defined (__ARM_ARCH_5TE__) || \ -defined (__ARM_ARCH_5TEJ__) +#if defined (_ARM_ARCH_6) || defined (__ARM_ARCH_5T__) || \ +defined (__ARM_ARCH_5TE__) || defined (__ARM_ARCH_5TEJ__) +#define _ARM_ARCH_5T +#endif + +#if defined (_ARM_ARCH_6) || defined (_ARM_ARCH_5T) || defined (__ARM_ARCH_5__) #define _ARM_ARCH_5 #endif @@ -17,4 +33,17 @@ #define _ARM_ARCH_4T #endif -#endif /* !_MACHINE_CDEFS_H_ */ +#if defined (_ARM_ARCH_T2) || \ +(!defined (__thumb__) && \ + (defined (_ARM_ARCH_6) || defined (__ARM_ARCH_5TE__) || \ + defined (__ARM_ARCH_5TEJ__))) +#define _ARM_ARCH_DWORD_OK +#endif + +#ifdef __ARM_EABI__ +#define __ALIGNBYTES (8 - 1) +#else +#define __ALIGNBYTES (sizeof(int) - 1) +#endif + +#endif /* !_ARM_CDEFS_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Nov 14 01:36:00 UTC 2013
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_gpio_pci.c
Log Message:
Deal with new interrupt structure.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.7 -r1.1.2.8 src/sys/arch/mips/rmi/rmixl_gpio_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_gpio_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.7 src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.8
--- src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.7 Sat Dec 15 03:05:56 2012
+++ src/sys/arch/mips/rmi/rmixl_gpio_pci.c Thu Nov 14 01:36:00 2013
@@ -29,7 +29,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rmixl_gpio_pci.c,v 1.1.2.7 2012/12/15 03:05:56 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rmixl_gpio_pci.c,v 1.1.2.8 2013/11/14 01:36:00 matt Exp $");
#include
#include
@@ -93,11 +93,9 @@ static int (* const xlgpio_intrs[])(void
};
struct xlgpio_intrpin {
- int (*gip_func)(void *);
- void *gip_arg;
+ struct rmixl_intrhand_common gip_ihc;
uint8_t gip_ipl;
uint8_t gip_ist;
- bool gip_mpsafe;
char gip_pin_name[sizeof("pin XX")];
};
@@ -142,7 +140,10 @@ static struct xlgpio_softc xlgpio_sc = {
[0 ... 2*PINGROUP-1] = {
.gip_ipl = IPL_NONE,
.gip_ist = IST_NONE,
- .gip_func = xlgpio_stray_intr,
+ .gip_ihc = {
+.ihc_func = xlgpio_stray_intr,
+.ihc_disestablish = gpio_intr_disestablish,
+ },
},
},
.sc_groups = {
@@ -260,7 +261,7 @@ xlgpio_pci_attach(device_t parent, devic
snprintf(gip->gip_pin_name, sizeof(gip->gip_pin_name),
"pin %zu", pin);
- KASSERT(gip->gip_func == xlgpio_stray_intr);
+ KASSERT(gip->gip_ihc.ihc_func == xlgpio_stray_intr);
}
/*
@@ -367,8 +368,8 @@ xlgpio_group_intr(struct xlgpio_softc *s
struct xlgpio_intrpin * const gip = &gg->gg_pins[pin];
KASSERT(gip->gip_ipl == ipl);
- const int nrv = rmixl_intr_deliver(gip->gip_func, gip->gip_arg,
- gip->gip_mpsafe, &evs[pin], ipl);
+ const int nrv = rmixl_intr_deliver(&gip->gip_ihc,
+ &evs[pin], ipl);
if (nrv)
rv = nrv;
sts &= PIN_MASK(pin);
@@ -469,16 +470,18 @@ gpio_intr_establish(size_t pin, int ipl,
return NULL;
KASSERT((*inten_p & mask) == 0);
- KASSERT(gip->gip_func != xlgpio_stray_intr);
+ KASSERT(gip->gip_ihc.ihc_func != xlgpio_stray_intr);
KASSERT(gip->gip_ipl == IPL_NONE);
KASSERT(gip->gip_ist == IST_NONE);
mutex_enter(sc->sc_intr_lock);
gip->gip_ipl = ipl;
- gip->gip_func = func;
- gip->gip_arg = arg;
- gip->gip_mpsafe = mpsafe;
+ gip->gip_ihc.ihc_func = func;
+ gip->gip_ihc.ihc_arg = arg;
+#ifdef MULTIPROCESSOR
+ gip->gip_ihc.ihc_mpsafe = mpsafe;
+#endif
if (ist == IST_EDGE) {
atomic_or_32(&gg->gg_inttype, mask);
@@ -519,7 +522,7 @@ gpio_intr_disestablish(void *v)
KASSERT(&sc->sc_pins[pin] == gip);
KASSERT(pin < __arraycount(sc->sc_pins));
- KASSERT(gip->gip_func != xlgpio_stray_intr);
+ KASSERT(gip->gip_ihc.ihc_func != xlgpio_stray_intr);
*inten_p &= ~mask;
xlgpio_write_4(sc, gg->gg_r_inten[gip->gip_ipl - IPL_VM], *inten_p);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Tue Nov 5 18:44:02 UTC 2013
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_nand_pci.c
Log Message:
Start of a nand for xlp3xx/xlp2xx.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_nand_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_nand_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_nand_pci.c:1.1.2.2 src/sys/arch/mips/rmi/rmixl_nand_pci.c:1.1.2.3
--- src/sys/arch/mips/rmi/rmixl_nand_pci.c:1.1.2.2 Fri Dec 30 06:48:56 2011
+++ src/sys/arch/mips/rmi/rmixl_nand_pci.c Tue Nov 5 18:44:02 2013
@@ -27,16 +27,18 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "locators.h"
+
#include
-__KERNEL_RCSID(1, "$NetBSD: rmixl_nand_pci.c,v 1.1.2.2 2011/12/30 06:48:56 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rmixl_nand_pci.c,v 1.1.2.3 2013/11/05 18:44:02 matt Exp $");
#include
+#include
#include
+#include
#include
-#include "locators.h"
-
#include
#include
#include
@@ -51,27 +53,118 @@ __KERNEL_RCSID(1, "$NetBSD: rmixl_nand_p
static int xlnand_pci_match(device_t, cfdata_t, void *);
static void xlnand_pci_attach(device_t, device_t, void *);
+static int xlnand_pci_detach(device_t, int);
+
+static int xlnand_read_page(device_t, size_t, uint8_t *);
+static int xlnand_program_page(device_t, size_t, const uint8_t *);
+
+static void xlnand_select(device_t, bool);
+static void xlnand_command(device_t, uint8_t);
+static void xlnand_address(device_t, uint8_t);
+static void xlnand_busy(device_t);
+static void xlnand_read_buf(device_t, void *, size_t);
+static void xlnand_write_buf(device_t, const void *, size_t);
+
+static void xlnand_read_1(device_t, uint8_t *);
+static void xlnand_read_2(device_t, uint16_t *);
+static void xlnand_write_1(device_t, uint8_t);
+static void xlnand_write_2(device_t, uint16_t);
+
+static int xlnand_intr(void *);
+
+struct xlnand_chip {
+ device_t xlch_nanddev;
+ kcondvar_t xlch_cv_ready;
+
+ uint32_t xlch_cmds;
+ uint64_t xlch_addrs;
+ uint32_t xlch_data;
+ uint32_t xlch_int_mask;
+ uint8_t xlch_cmdshift;
+ uint8_t xlch_addrshift;
+ uint8_t xlch_num;
+ uint8_t xlch_datalen;
+ uint8_t xlch_chipnum;
+
+ struct nand_interface xlch_nand_if;
+ char xlch_wmesg[16];
+};
struct xlnand_softc {
- device_t sc_dev;
- bus_space_tag_t sc_bst;
- bus_space_handle_t sc_bsh;
+ device_t xlsc_dev;
+ bus_dma_tag_t xlsc_dmat;
+ bus_space_tag_t xlsc_bst;
+ bus_space_handle_t xlsc_bsh;
+ void *xlsc_ih;
+ uint8_t xlsc_buswidth;
+
+ kcondvar_t xlsc_cv_available;
+ struct xlnand_chip *xlsc_active_chip;
+
+ bus_dma_segment_t xlsc_xferseg;
+ bus_dmamap_t xlsc_xfermap;
+ void *xlsc_xferbuf;
+
+ struct xlnand_chip xlsc_chips[8];
+
+ kmutex_t xlsc_intr_lock __aligned(64);
+ kmutex_t xlsc_wait_lock __aligned(64);
+};
+
+#define CMDSEQ1(a,b) (((ONFI_ ## b) << 8) | RMIXLP_NAND_CMD_ ## a)
+#define CMDSEQ2(a,b,c) (((ONFI_ ## c) << 16) | CMDSEQ1(a,b))
+#define CMDSEQ3(a,b,c,d) (((ONFI_ ## d) << 14) | CMDSEQ2(a,b,c))
+
+static const uint32_t xlnand_cmdseqs[] = {
+ CMDSEQ1(SEQ_0, RESET),
+ //CMDSEQ1(SEQ_0, SYNCRONOUS_RESET),
+ CMDSEQ1(SEQ_1, READ_ID),
+ CMDSEQ1(SEQ_2, READ_UNIQUE_ID),
+ CMDSEQ1(SEQ_2, READ_PARAMETER_PAGE),
+ CMDSEQ1(SEQ_2, GET_FEATURES),
+ CMDSEQ1(SEQ_3, SET_FEATURES),
+ //CMDSEQ1(SEQ_17, SET_FEATURES2),
+ CMDSEQ1(SEQ_4, READ_STATUS),
+ //CMDSEQ1(SEQ_5, SELECT_LUN_WITH_STATUS),
+ CMDSEQ2(SEQ_6, CHANGE_READ_COLUMN, CHANGE_READ_COLUMN_START),
+ //CMDSEQ2(SEQ_7, SELECT_CACHE_REGISTER, CHANGE_READ_COLUMN_START),
+ //CMDSEQ1(SEQ_8, CHANGE_WRITE_COLUMN),
+ //CMDSEQ1(SEQ_12, CHANGE_ROW_ADDRESS),
+ CMDSEQ2(SEQ_10, READ, READ_START),
+ CMDSEQ2(SEQ_10, READ, READ_CACHE_RANDOM),
+ CMDSEQ1(SEQ_11, READ_CACHE_SEQUENTIAL),
+ CMDSEQ1(SEQ_11, READ_CACHE_END),
+ CMDSEQ2(SEQ_12, READ, READ_INTERLEAVED),
+ //CMDSEQ2(SEQ_15, READ, READ, READ_START),
+ CMDSEQ2(SEQ_12, PAGE_PROGRAM, PAGE_PROGRAM_START),
+ CMDSEQ1(SEQ_13, PAGE_PROGRAM),
+ CMDSEQ2(SEQ_12, PAGE_PROGRAM, PAGE_CACHE_PROGRAM),
+ CMDSEQ2(SEQ_12, PAGE_PROGRAM, PAGE_PROGRAM_INTERLEAVED),
+ //CMDSEQ1(SEQ_0, WRITE_PAGE),
+ //CMDSEQ1(SEQ_0, WRITE_PAGE_CACHE),
+ //CMDSEQ1(SEQ_0, WRITE_PAGE_INTERLEAVED),
+ CMDSEQ2(SEQ_10, READ, READ_COPYBACK),
+ CMDSEQ2(SEQ_9, COPYBACK_PROGRAM, COPYBACK_PROGRAM_START),
+ CMDSEQ2(SEQ_12, COPYBACK_PROGRAM, COPYBACK_PROGRAM_INTERLEAVED),
+ CMDSEQ1(SEQ_13, COPYBACK_PROGRAM),
+ CMDSEQ2(SEQ_14, BLOCK_ERASE, BLOCK_ERASE_START),
+ CMDSEQ2(SEQ_14, BLOCK_ERASE, BLOCK_ERASE_INTERLEAVED),
};
static inline uint32_t
-xlnand_read_4(struct xlnand_softc *sc, bus_size_t off)
+xlnand_read_4(struct xlnand_softc *xlsc, bus_size_t off)
{
- return bus_space_read_4(sc->sc_bst, sc->sc_bsh, off);
+ return bus_space_read_4(xlsc->xlsc_bst, xlsc->xlsc_bsh, off);
}
static inline void
-xlnand_write_4(struct xlnand_softc *sc, bus_size_t off, uint32_t v)
+xlnand_write_4(struct xlnand_softc *xlsc, bus
CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/conf
Module Name:src Committed By: matt Date: Tue Nov 5 18:41:57 UTC 2013 Modified Files: src/sys/arch/evbmips/conf [matt-nb5-mips64]: XLPEVB Log Message: Add xhci To generate a diff of this commit: cvs rdiff -u -r1.1.2.7 -r1.1.2.8 src/sys/arch/evbmips/conf/XLPEVB Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/evbmips/conf/XLPEVB diff -u src/sys/arch/evbmips/conf/XLPEVB:1.1.2.7 src/sys/arch/evbmips/conf/XLPEVB:1.1.2.8 --- src/sys/arch/evbmips/conf/XLPEVB:1.1.2.7 Fri Feb 10 08:54:18 2012 +++ src/sys/arch/evbmips/conf/XLPEVB Tue Nov 5 18:41:57 2013 @@ -1,8 +1,8 @@ -# $NetBSD: XLPEVB,v 1.1.2.7 2012/02/10 08:54:18 matt Exp $ +# $NetBSD: XLPEVB,v 1.1.2.8 2013/11/05 18:41:57 matt Exp $ include "arch/evbmips/conf/std.rmixlp" -#ident "XLSATX-$Revision: 1.1.2.7 $" +#ident "XLSATX-$Revision: 1.1.2.8 $" #options INCLUDE_CONFIG_FILE # embed config file in kernel binary @@ -153,6 +153,7 @@ ukphy* at mii? phy ? # unknown PHY com* at pci? dev ? function ? ehci* at pci? dev ? function ? ohci* at pci? dev ? function ? +xhci* at pci? dev ? function ? xlsdio* at pci? dev ? function ? sdhc* at xlsdio? slot 0 sdmmc* at sdhc? @@ -195,6 +196,7 @@ wd* at atabus? drive ? flags 0x # USB usb* at ohci? usb* at ehci? +usb* at xhci? uhub* at usb? uhub* at uhub? port ? umass* at uhub? port ? configuration ? interface ?
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Sat Dec 15 03:05:56 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmn.c rmixl_gpio_pci.c
rmixl_intr.c rmixl_machdep.c rmixlp_pcie.c rmixlreg.h rmixlvar.h
Log Message:
Add initial support for XLP II (XLP2XX/XLP1XX).
To generate a diff of this commit:
cvs rdiff -u -r1.74.28.25 -r1.74.28.26 src/sys/arch/mips/include/cpuregs.h
cvs rdiff -u -r1.205.4.1.2.1.2.68 -r1.205.4.1.2.1.2.69 \
src/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -u -r1.1.2.12 -r1.1.2.13 src/sys/arch/mips/rmi/rmixl_fmn.c
cvs rdiff -u -r1.1.2.6 -r1.1.2.7 src/sys/arch/mips/rmi/rmixl_gpio_pci.c
cvs rdiff -u -r1.1.2.36 -r1.1.2.37 src/sys/arch/mips/rmi/rmixl_intr.c
cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/rmi/rmixl_machdep.c
cvs rdiff -u -r1.1.2.8 -r1.1.2.9 src/sys/arch/mips/rmi/rmixlp_pcie.c
cvs rdiff -u -r1.1.2.20 -r1.1.2.21 src/sys/arch/mips/rmi/rmixlreg.h
cvs rdiff -u -r1.1.2.26 -r1.1.2.27 src/sys/arch/mips/rmi/rmixlvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpuregs.h
diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.25 src/sys/arch/mips/include/cpuregs.h:1.74.28.26
--- src/sys/arch/mips/include/cpuregs.h:1.74.28.25 Thu Jan 19 08:28:48 2012
+++ src/sys/arch/mips/include/cpuregs.h Sat Dec 15 03:05:55 2012
@@ -911,10 +911,11 @@
#define MIPS_XLR_C4 0x91 /* RMI XLR Production Rev C4 */
/*
- * CPU processor IDs for company ID == 12 (RMI)
+ * CPU processor IDs for company ID == 12 (RMI, NetLogic, Broadcom)
*/
#define MIPS_XLP8XX 0x10 /* RMI XLP8XX/XLP4XX ISA 64 Rel 2 */
#define MIPS_XLP3XX 0x11 /* RMI XLP3XX ISA 64 Rel 2 */
+#define MIPS_XLP2XX 0x12 /* Broadcom XLP2XX/XLP1XX ISA 64 Rel 2 */
#define MIPS_XLR308B 0x06 /* RMI XLR308-B ISA 64 */
#define MIPS_XLR508B 0x07 /* RMI XLR508-B ISA 64 */
#define MIPS_XLR516B 0x08 /* RMI XLR516-B ISA 64 */
Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.68 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.69
--- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.68 Sat Aug 4 07:20:31 2012
+++ src/sys/arch/mips/mips/mips_machdep.c Sat Dec 15 03:05:55 2012
@@ -630,6 +630,18 @@ static const struct pridtab cputab[] = {
CIDFL_RMI_TYPE_XLS|MIPS_CIDFL_RMI_CPUS(1,4)|MIPS_CIDFL_RMI_L2(256KB),
"XLS104" },
+ { MIPS_PRID_CID_RMI, MIPS_XLP2XX, -1, -1, -1, 0,
+ MIPS64_FLAGS | CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_NO_LLADDR |
+ CPU_MIPS_I_D_CACHE_COHERENT | CPU_MIPS_HAVE_MxCR,
+ MIPS_CP0FL_USE |
+ MIPS_CP0FL_EBASE | MIPS_CP0FL_USERLOCAL | MIPS_CP0FL_HWRENA |
+ MIPS_CP0FL_EIRR | MIPS_CP0FL_EIMR |
+ MIPS_CP0FL_CONFIG | MIPS_CP0FL_CONFIG1 | MIPS_CP0FL_CONFIG2 |
+ MIPS_CP0FL_CONFIG3 | MIPS_CP0FL_CONFIG6 | MIPS_CP0FL_CONFIG7,
+ CIDFL_RMI_TYPE_XLP | MIPS_CIDFL_RMI_CPUS(1,4) |
+ MIPS_CIDFL_RMI_L2(512KB) | MIPS_CIDFL_RMI_L3(2MB),
+ "XLP2XX" },
+
{ MIPS_PRID_CID_RMI, MIPS_XLP3XX, -1, -1, -1, 0,
MIPS64_FLAGS | CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_NO_LLADDR |
CPU_MIPS_I_D_CACHE_COHERENT | CPU_MIPS_HAVE_MxCR,
Index: src/sys/arch/mips/rmi/rmixl_fmn.c
diff -u src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.12 src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.13
--- src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.12 Fri Mar 30 01:04:47 2012
+++ src/sys/arch/mips/rmi/rmixl_fmn.c Sat Dec 15 03:05:56 2012
@@ -364,7 +364,7 @@ fmn_init_xlp(fmn_info_t *fmn)
si->si_qid_first = 1000;
si->si_qid_last = 1019;
} else {
- KASSERT(RMIXLP_3XX_P);
+ KASSERT(RMIXLP_3XX_P || RMIXLP_2XX_P);
si->si_qid_first = 496;
si->si_qid_last = 504;
}
Index: src/sys/arch/mips/rmi/rmixl_gpio_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.6 src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.7
--- src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.6 Thu Jan 19 17:28:50 2012
+++ src/sys/arch/mips/rmi/rmixl_gpio_pci.c Sat Dec 15 03:05:56 2012
@@ -29,7 +29,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rmixl_gpio_pci.c,v 1.1.2.6 2012/01/19 17:28:50 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rmixl_gpio_pci.c,v 1.1.2.7 2012/12/15 03:05:56 matt Exp $");
#include
#include
@@ -81,6 +81,7 @@ static const uint8_t xlgpio_pincnt_by_va
[RMIXLP_3XXL] = RMIXLP_GPIO_3XXL_MAXPINS,
[RMIXLP_3XXH] = RMIXLP_GPIO_3XXL_MAXPINS,
[RMIXLP_3XXQ] = RMIXLP_GPIO_3XXL_MAXPINS,
+[RMIXLP_2XX] = RMIXLP_GPIO_2XXL_MAXPINS,
};
@@ -286,7 +287,7 @@ xlgpio_pci_attach(device_t parent, devic
/*
* These are at different offsets on the 3xx than the 8xx/4xx.
*/
- if (rcp->rc_xlp_variant >= RMIXLP_3XX) {
+ if (RMIXLP_3XX_P || RMIXLP_2XX_P) {
gg->gg_r_intpol = RMIXLP_GPIO_3XX_INTPOL(group);
gg->gg_r_inttype = RMIXLP_GPIO_3XX_INTTYPE(group);
gg->gg_
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Aug 9 19:46:40 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmn_pci.c
Log Message:
Deal with unallocated spill area in the fmn.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_fmn_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_fmn_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_fmn_pci.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_fmn_pci.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_fmn_pci.c:1.1.2.1 Thu Jan 19 17:34:18 2012
+++ src/sys/arch/mips/rmi/rmixl_fmn_pci.c Thu Aug 9 19:46:40 2012
@@ -29,7 +29,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rmixl_fmn_pci.c,v 1.1.2.1 2012/01/19 17:34:18 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rmixl_fmn_pci.c,v 1.1.2.2 2012/08/09 19:46:40 matt Exp $");
#include
#include
@@ -237,10 +237,14 @@ xlfmn_pci_attach(device_t parent, device
* allocated to it.
*/
if (oq_config & RMIXLP_FMN_OQ_CONFIG_SE) {
- if (((64 * sb + ss) << 12) < sc->sc_spill_base)
-sc->sc_spill_base = (64 * sb + ss) << 12;
- if (((64 * sb + sl + 1) << 12) > sc->sc_spill_limit)
-sc->sc_spill_limit = (64 * sb + sl + 1) << 12;
+ paddr_t spill_base = (64 * sb + ss) << 12;
+ paddr_t spill_limit = (64 * sb + sl + 1) << 12;
+ if (spill_base < spill_limit) {
+if (spill_base < sc->sc_spill_base)
+ sc->sc_spill_base = spill_base;
+if (spill_limit > sc->sc_spill_limit)
+ sc->sc_spill_limit = spill_limit;
+ }
}
if ((oq_config & RMIXLP_FMN_OQ_CONFIG_OE) == 0)
@@ -297,15 +301,19 @@ xlfmn_pci_attach(device_t parent, device
"spill area: %s: base=%#"PRIxPADDR", limit=%#"PRIxPADDR"\n",
buf, sc->sc_spill_base, sc->sc_spill_limit);
- /*
- * Let's try to allocate the spill area.
- */
- struct pglist mlist;
- int error = uvm_pglistalloc(sc->sc_spill_limit - sc->sc_spill_base,
- sc->sc_spill_base, sc->sc_spill_limit, 0, 0, &mlist, 1, true);
- if (error)
- aprint_error_dev(sc->sc_dev,
- "failed to allocate spill area: %d\n", error);
+ if (sc->sc_spill_base < sc->sc_spill_limit) {
+ /*
+ * Let's try to allocate the spill area.
+ */
+ struct pglist mlist;
+ int error = uvm_pglistalloc(
+ sc->sc_spill_limit - sc->sc_spill_base,
+ sc->sc_spill_base, sc->sc_spill_limit,
+ 0, 0, &mlist, 1, true);
+ if (error)
+ aprint_error_dev(sc->sc_dev,
+ "failed to allocate spill area: %d\n", error);
+ }
aprint_normal_dev(sc->sc_dev, "active queues: ");
const char *pfx = "";
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Wed Aug 8 22:10:21 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: pmap.h
src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_segtab.c trap.c
Log Message:
Fix some LP64 bugs
To generate a diff of this commit:
cvs rdiff -u -r1.54.26.27 -r1.54.26.28 src/sys/arch/mips/include/pmap.h
cvs rdiff -u -r1.1.2.18 -r1.1.2.19 src/sys/arch/mips/mips/pmap_segtab.c
cvs rdiff -u -r1.217.12.45 -r1.217.12.46 src/sys/arch/mips/mips/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/pmap.h
diff -u src/sys/arch/mips/include/pmap.h:1.54.26.27 src/sys/arch/mips/include/pmap.h:1.54.26.28
--- src/sys/arch/mips/include/pmap.h:1.54.26.27 Sat Aug 4 07:20:31 2012
+++ src/sys/arch/mips/include/pmap.h Wed Aug 8 22:10:21 2012
@@ -113,7 +113,7 @@ union pt_entry;
typedef union pmap_segtab {
union pmap_segtab * seg_seg[NSEGPG];
- union pt_entry * seg_tab[NPTEPG];
+ union pt_entry * seg_tab[NSEGPG];
} pmap_segtab_t;
#else
/*
Index: src/sys/arch/mips/mips/pmap_segtab.c
diff -u src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.18 src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.19
--- src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.18 Sat Aug 4 07:20:31 2012
+++ src/sys/arch/mips/mips/pmap_segtab.c Wed Aug 8 22:10:21 2012
@@ -130,6 +130,7 @@ __KERNEL_RCSID(0, "pmap_segtab.c,v 1.1.2
#include
CTASSERT(NBPG >= sizeof(pmap_segtab_t));
+
#define PMAP_PTP_CACHE
struct pmap_segtab_info {
Index: src/sys/arch/mips/mips/trap.c
diff -u src/sys/arch/mips/mips/trap.c:1.217.12.45 src/sys/arch/mips/mips/trap.c:1.217.12.46
--- src/sys/arch/mips/mips/trap.c:1.217.12.45 Sat Aug 4 07:20:31 2012
+++ src/sys/arch/mips/mips/trap.c Wed Aug 8 22:10:21 2012
@@ -378,9 +378,9 @@ trap(uint32_t status, uint32_t cause, va
*/
struct cpu_info * const ci = curcpu();
if ((va >> XSEGSHIFT) == 0 &&
- __predict_false(ci->ci_pmap_seg0tab == NULL
-&& ci->ci_pmap_segtab->seg_seg[0] != NULL)) {
- ci->ci_pmap_seg0tab = ci->ci_pmap_segtab->seg_seg[0];
+ __predict_false(ci->ci_pmap_seg0tab[0] == NULL
+&& ci->ci_pmap_segtab[0]->seg_seg[0] != NULL)) {
+ ci->ci_pmap_seg0tab[0] = ci->ci_pmap_segtab[0]->seg_seg[0];
kpreempt_enable();
if (type & T_USER) {
userret(l);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Sat Aug 4 07:20:32 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h mips_param.h pmap.h
pte.h vmparam.h
src/sys/arch/mips/mips [matt-nb5-mips64]: cpu_subr.c genassym.cf
mipsX_subr.S mips_machdep.c pmap.c pmap_segtab.c trap.c
vm_machdep.c
Log Message:
Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does). XXX fix mips1
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.45 -r1.90.16.46 src/sys/arch/mips/include/cpu.h
cvs rdiff -u -r1.23.78.12 -r1.23.78.13 src/sys/arch/mips/include/mips_param.h
cvs rdiff -u -r1.54.26.26 -r1.54.26.27 src/sys/arch/mips/include/pmap.h
cvs rdiff -u -r1.19.18.4 -r1.19.18.5 src/sys/arch/mips/include/pte.h
cvs rdiff -u -r1.41.28.27 -r1.41.28.28 src/sys/arch/mips/include/vmparam.h
cvs rdiff -u -r1.1.2.25 -r1.1.2.26 src/sys/arch/mips/mips/cpu_subr.c
cvs rdiff -u -r1.44.12.33 -r1.44.12.34 src/sys/arch/mips/mips/genassym.cf
cvs rdiff -u -r1.26.36.1.2.57 -r1.26.36.1.2.58 \
src/sys/arch/mips/mips/mipsX_subr.S
cvs rdiff -u -r1.205.4.1.2.1.2.67 -r1.205.4.1.2.1.2.68 \
src/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -u -r1.179.16.45 -r1.179.16.46 src/sys/arch/mips/mips/pmap.c
cvs rdiff -u -r1.1.2.17 -r1.1.2.18 src/sys/arch/mips/mips/pmap_segtab.c
cvs rdiff -u -r1.217.12.44 -r1.217.12.45 src/sys/arch/mips/mips/trap.c
cvs rdiff -u -r1.121.6.1.2.29 -r1.121.6.1.2.30 \
src/sys/arch/mips/mips/vm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.45 src/sys/arch/mips/include/cpu.h:1.90.16.46
--- src/sys/arch/mips/include/cpu.h:1.90.16.45 Mon Jul 9 17:23:37 2012
+++ src/sys/arch/mips/include/cpu.h Sat Aug 4 07:20:31 2012
@@ -120,9 +120,9 @@ struct cpu_info {
int ci_tlb_slot; /* reserved tlb entry for cpu_info */
u_int ci_pmap_asid_cur; /* current ASID */
struct pmap_tlb_info *ci_tlb_info; /* tlb information for this cpu */
- union pmap_segtab *ci_pmap_seg0tab;
+ union pmap_segtab *ci_pmap_seg0tab[2];
#ifdef _LP64
- union pmap_segtab *ci_pmap_segtab;
+ union pmap_segtab *ci_pmap_segtab[2];
#else
vaddr_t ci_pmap_srcbase; /* starting VA of ephemeral src space */
vaddr_t ci_pmap_dstbase; /* starting VA of ephemeral dst space */
Index: src/sys/arch/mips/include/mips_param.h
diff -u src/sys/arch/mips/include/mips_param.h:1.23.78.12 src/sys/arch/mips/include/mips_param.h:1.23.78.13
--- src/sys/arch/mips/include/mips_param.h:1.23.78.12 Mon Feb 27 16:57:58 2012
+++ src/sys/arch/mips/include/mips_param.h Sat Aug 4 07:20:31 2012
@@ -87,18 +87,24 @@
#define PGSHIFT PAGE_SHIFT /* LOG2(NBPG) */
#define NBPG (1 << PGSHIFT) /* bytes/page */
#define PGOFSET (NBPG-1) /* byte offset into page */
-#define NPTEPG (NBPG/4)
+#define PTPSHIFT (2)
+#define PTPLENGTH (PGSHIFT-PTPSHIFT)
+#define NPTEPG (1 << PTPLENGTH)
#define NBSEG (NBPG*NPTEPG) /* bytes/segment */
#define SEGOFSET (NBSEG-1) /* byte offset into segment */
-#define SEGSHIFT (PGSHIFT+(PGSHIFT-2)) /* LOG2(NBSEG) */
+#define SEGSHIFT (PGSHIFT+PTPLENGTH) /* LOG2(NBSEG) */
#ifdef _LP64
-#define NSEGPG (NBPG/8)
+#define SEGLENGTH (PGSHIFT-3)
#define NBXSEG ((uint64_t)NSEGPG*NBSEG) /* bytes/xsegment */
#define XSEGOFSET (NBXSEG-1) /* byte offset into xsegment */
-#define XSEGSHIFT (SEGSHIFT+(PGSHIFT-3)) /* LOG2(NBXSEG) */
+#define XSEGSHIFT (SEGSHIFT+SEGLENGTH) /* LOG2(NBXSEG) */
+#define XSEGLENGTH (PGSHIFT-3)
+#else
+#define SEGLENGTH (31-SEGSHIFT)
#endif
+#define NSEGPG (1 << SEGLENGTH)
/*
* Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized
Index: src/sys/arch/mips/include/pmap.h
diff -u src/sys/arch/mips/include/pmap.h:1.54.26.26 src/sys/arch/mips/include/pmap.h:1.54.26.27
--- src/sys/arch/mips/include/pmap.h:1.54.26.26 Mon Jul 9 17:23:37 2012
+++ src/sys/arch/mips/include/pmap.h Sat Aug 4 07:20:31 2012
@@ -109,17 +109,11 @@
#define mips_trunc_seg(x) ((vaddr_t)(x) & ~SEGOFSET)
#define mips_round_seg(x) (((vaddr_t)(x) + SEGOFSET) & ~SEGOFSET)
-#ifdef _LP64
-#define PMAP_SEGTABSIZE NSEGPG
-#else
-#define PMAP_SEGTABSIZE (1 << (31 - SEGSHIFT))
-#endif
-
union pt_entry;
typedef union pmap_segtab {
- union pmap_segtab * seg_seg[PMAP_SEGTABSIZE];
- union pt_entry * seg_tab[PMAP_SEGTABSIZE];
+ union pmap_segtab * seg_seg[NSEGPG];
+ union pt_entry * seg_tab[NPTEPG];
} pmap_segtab_t;
#else
/*
Index: src/sys/arch/mips/include/pte.h
diff -u src/sys/arch/mips/include/pte.h:1.19.18.4 src/sys/arch/mips/include/pte.h:1.19.18.5
--- src/sys/arch/mips/include/pte.h:1.19.18.4 Thu Mar 11 08:13:18 2010
+++ src/sys/arch/mips/include/pte.h Sat Aug 4 07:20:31 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: pte.h,v 1.19.18.4 2010/03/11 08:13:18 matt Exp $ */
+/* pte.h,v 1.19.18.4 2010/03/11 08:13:18 matt Exp */
/*-
* Copyright (c) 19
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Sat Aug 4 07:17:06 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: mips_opcode.h
src/sys/arch/mips/mips [matt-nb5-mips64]: db_disasm.c
Log Message:
disasm special2 and special3 opcodes (and ehb and ssnop too).
To generate a diff of this commit:
cvs rdiff -u -r1.12.96.3 -r1.12.96.4 src/sys/arch/mips/include/mips_opcode.h
cvs rdiff -u -r1.19.62.4 -r1.19.62.5 src/sys/arch/mips/mips/db_disasm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/mips_opcode.h
diff -u src/sys/arch/mips/include/mips_opcode.h:1.12.96.3 src/sys/arch/mips/include/mips_opcode.h:1.12.96.4
--- src/sys/arch/mips/include/mips_opcode.h:1.12.96.3 Fri Apr 29 08:26:21 2011
+++ src/sys/arch/mips/include/mips_opcode.h Sat Aug 4 07:17:05 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_opcode.h,v 1.12.96.3 2011/04/29 08:26:21 matt Exp $ */
+/* mips_opcode.h,v 1.12.96.3 2011/04/29 08:26:21 matt Exp */
/*-
* Copyright (c) 1992, 1993
@@ -145,9 +145,10 @@ typedef union {
#define OP_DADDIU 031 /* MIPS-II, for r4000 port */
#define OP_LDL 032 /* MIPS-II, for r4000 port */
#define OP_LDR 033 /* MIPS-II, for r4000 port */
-
-#define OP_SPECIAL2 034 /* QED opcodes */
-#define OP_SPECIAL3 037 /* QED opcodes */
+#define OP_SPECIAL2 034 /* QED/MIPS{32,64}R{1,2} opcodes */
+#define OP_JALX 035
+#define OP_MDMX 036
+#define OP_SPECIAL3 037 /* QED/MIPS{32,64}R{1,2} opcodes */
#define OP_LB 040
#define OP_LH 041
@@ -156,8 +157,6 @@ typedef union {
#define OP_LBU 044
#define OP_LHU 045
#define OP_LWR 046
-#define OP_LHU 045
-#define OP_LWR 046
#define OP_LWU 047 /* MIPS-II, for r4000 port */
#define OP_SB 050
@@ -262,13 +261,27 @@ typedef union {
#define OP_CLO 041 /* MIPS32/64 */
#define OP_DCLZ 044 /* MIPS32/64 */
#define OP_DCLO 045 /* MIPS32/64 */
+#define OP_SDBBP 077 /* MIPS32/64 */
/*
* Values for the 'func' field when 'op' == OP_SPECIAL3.
*/
+#define OP_EXT 000 /* MIPS32/64 r2 */
+#define OP_DEXTM 001 /* MIPS32/64 r2 */
+#define OP_DEXTU 002 /* MIPS32/64 r2 */
+#define OP_DEXT 003 /* MIPS32/64 r2 */
+#define OP_INS 004 /* MIPS32/64 r2 */
+#define OP_DINSM 004 /* MIPS32/64 r2 */
+#define OP_DINSU 006 /* MIPS32/64 r2 */
+#define OP_DINS 007 /* MIPS32/64 r2 */
+#define OP_BSHFL 040 /* MIPS32/64 r2 */
+#define OP_DBSHFL 044 /* MIPS32/64 r2 */
#define OP_RDHWR 073 /* MIPS32/64 r2 */
-
+#define BSHFL_SBH 002 /* MIPS32/64 r2 */
+#define BSHFL_SHD 005 /* MIPS32/64 r2 */
+#define BSHFL_SEB 020 /* MIPS32/64 r2 */
+#define BSHFL_SEH 030 /* MIPS32/64 r2 */
/*
* Values for the 'func' field when 'op' == OP_BCOND.
*/
Index: src/sys/arch/mips/mips/db_disasm.c
diff -u src/sys/arch/mips/mips/db_disasm.c:1.19.62.4 src/sys/arch/mips/mips/db_disasm.c:1.19.62.5
--- src/sys/arch/mips/mips/db_disasm.c:1.19.62.4 Thu Feb 16 10:45:17 2012
+++ src/sys/arch/mips/mips/db_disasm.c Sat Aug 4 07:17:05 2012
@@ -56,7 +56,7 @@ static const char * const op_name[64] =
/* 0 */ "spec", "bcond","j", "jal", "beq", "bne", "blez", "bgtz",
/* 8 */ "addi", "addiu","slti", "sltiu","andi", "ori", "xori", "lui",
/*16 */ "cop0", "cop1", "cop2", "cop3", "beql", "bnel", "blezl","bgtzl",
-/*24 */ "daddi","daddiu","ldl", "ldr", "op34", "op35", "op36", "op37",
+/*24 */ "daddi","daddiu","ldl", "ldr", "spec2", "jalx", "mdmx", "spec3",
/*32 */ "lb", "lh", "lwl", "lw", "lbu", "lhu", "lwr", "lwu",
/*40 */ "sb", "sh", "swl", "sw", "sdl", "sdr", "swr", "cache",
/*48 */ "ll", "lwc1", "lwc2", "lwc3", "lld", "ldc1", "ldc2", "ld",
@@ -74,8 +74,26 @@ static const char * const spec_name[64]
/*56 */ "dsll","spec71","dsrl","dsra","dsll32","spec75","dsrl32","dsra32"
};
-static const char * const spec2_name[4] = { /* QED RM4650, R5000, etc. */
-/* 0 */ "mad", "madu", "mul", "spec3"
+static const char const spec2_name[64][8] = { /* MIPSxxR{1,2} */
+/* 0 */ "mad", "madu", "mul", "sp2?3", "msub", "msubu", "sp2?6", "sp2?7",
+/* 8 */ "sp2?8", "sp2?9", "sp2?10", "sp2?11", "sp2?12", "sp2?13", "sp2?14", "sp2?15",
+/* 16 */ "sp2?16", "sp2?17", "sp2?18", "sp2?19", "sp2?20", "sp2?21", "sp2?22", "sp2?23",
+/* 24 */ "sp2?24", "sp2?25", "sp2?26", "sp2?27", "sp2?28", "sp2?29", "sp2?30", "sp2?31",
+/* 32 */ "clz", "clo", "sp2?34", "sp2?35", "dclz", "dclo", "sp2?38", "sp2?39",
+/* 40 */ "sp2?40", "sp2?41", "sp2?42", "sp2?43", "sp2?44", "sp2?45", "sp2?46", "sp2?47",
+/* 48 */ "sp2?48", "sp2?49", "sp2?50", "sp2?51", "sp2?52", "sp2?53", "sp2?54", "sp2?55",
+/* 56 */ "sp2?56", "sp2?57", "sp2?58", "sp2?59", "sp2?60", "sp2?61", "sp2?62", "sdbbp",
+};
+
+static const char const spec3_name[64][8] = { /* MIPSxxR2 */
+/* 0 */ "ext", "dextm", "dextu", "dext", "ins", "dinsm", "dinsu", "dins",
+/* 8 */ "sp3?8", "sp3?9", "sp3?10", "sp3?11", "sp3?12", "sp3?13", "sp3?14", "sp3?15",
+/* 16 */ "sp3?16", "sp3?17", "sp3?18", "sp3?19", "sp3?20", "sp3?21", "sp3?
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Mon Jul 9 17:23:37 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h pmap.h
src/sys/arch/mips/mips [matt-nb5-mips64]: pmap.c pmap_segtab.c
pmap_tlb.c
Log Message:
Use a spinlock to protect the segtab queues. Use union pmap_segmap and
pmap_segmap_t to track -HEAD. Use KERNEL_PID for the same reason.
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.44 -r1.90.16.45 src/sys/arch/mips/include/cpu.h
cvs rdiff -u -r1.54.26.25 -r1.54.26.26 src/sys/arch/mips/include/pmap.h
cvs rdiff -u -r1.179.16.44 -r1.179.16.45 src/sys/arch/mips/mips/pmap.c
cvs rdiff -u -r1.1.2.16 -r1.1.2.17 src/sys/arch/mips/mips/pmap_segtab.c
cvs rdiff -u -r1.1.2.23 -r1.1.2.24 src/sys/arch/mips/mips/pmap_tlb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.44 src/sys/arch/mips/include/cpu.h:1.90.16.45
--- src/sys/arch/mips/include/cpu.h:1.90.16.44 Mon Feb 27 17:04:39 2012
+++ src/sys/arch/mips/include/cpu.h Mon Jul 9 17:23:37 2012
@@ -120,9 +120,9 @@ struct cpu_info {
int ci_tlb_slot; /* reserved tlb entry for cpu_info */
u_int ci_pmap_asid_cur; /* current ASID */
struct pmap_tlb_info *ci_tlb_info; /* tlb information for this cpu */
- union segtab *ci_pmap_seg0tab;
+ union pmap_segtab *ci_pmap_seg0tab;
#ifdef _LP64
- union segtab *ci_pmap_segtab;
+ union pmap_segtab *ci_pmap_segtab;
#else
vaddr_t ci_pmap_srcbase; /* starting VA of ephemeral src space */
vaddr_t ci_pmap_dstbase; /* starting VA of ephemeral dst space */
Index: src/sys/arch/mips/include/pmap.h
diff -u src/sys/arch/mips/include/pmap.h:1.54.26.25 src/sys/arch/mips/include/pmap.h:1.54.26.26
--- src/sys/arch/mips/include/pmap.h:1.54.26.25 Mon Feb 27 16:57:05 2012
+++ src/sys/arch/mips/include/pmap.h Mon Jul 9 17:23:37 2012
@@ -104,6 +104,8 @@
* dynamically allocated at boot time.
*/
+#define KERNEL_PID 0
+
#define mips_trunc_seg(x) ((vaddr_t)(x) & ~SEGOFSET)
#define mips_round_seg(x) (((vaddr_t)(x) + SEGOFSET) & ~SEGOFSET)
@@ -115,17 +117,15 @@
union pt_entry;
-union segtab {
-#ifdef _LP64
- union segtab *seg_seg[PMAP_SEGTABSIZE];
-#endif
- union pt_entry *seg_tab[PMAP_SEGTABSIZE];
-};
+typedef union pmap_segtab {
+ union pmap_segtab * seg_seg[PMAP_SEGTABSIZE];
+ union pt_entry * seg_tab[PMAP_SEGTABSIZE];
+} pmap_segtab_t;
#else
/*
* Modules don't need to know this.
*/
-union segtab;
+typedef union pmap_segtab pmap_segtab_t;
#endif
/*
@@ -155,6 +155,7 @@ void pmap_pte_process(struct pmap *, vad
void pmap_segtab_activate(struct pmap *, struct lwp *);
void pmap_segtab_init(struct pmap *);
void pmap_segtab_destroy(struct pmap *, pte_callback_t, uintptr_t);
+extern kmutex_t pmap_segtab_lock;
#endif /* _KERNEL */
/*
@@ -182,7 +183,7 @@ typedef struct pmap {
volatile uint32_t pm_onproc; /* pmap is active on ... */
volatile uint32_t pm_shootdown_pending;
#endif
- union segtab *pm_segtab; /* pointers to pages of PTEs */
+ pmap_segtab_t * pm_segtab; /* pointers to pages of PTEs */
u_int pm_count; /* pmap reference count */
u_int pm_flags;
#define PMAP_DEFERRED_ACTIVATE 0x0001
@@ -304,8 +305,10 @@ struct vm_page *mips_pmap_alloc_poolpage
#define POOL_VTOPHYS(va) (MIPS_KSEG0_P(va) \
? MIPS_KSEG0_TO_PHYS(va) \
: MIPS_XKPHYS_TO_PHYS(va))
+#define POOL_PHYSTOV(pa) MIPS_PHYS_TO_XKPHYS_CACHED((paddr_t)(pa))
#else
#define POOL_VTOPHYS(va) MIPS_KSEG0_TO_PHYS((vaddr_t)(va))
+#define POOL_PHYSTOV(pa) MIPS_PHYS_TO_KSEG0((paddr_t)(pa))
#endif
/*
Index: src/sys/arch/mips/mips/pmap.c
diff -u src/sys/arch/mips/mips/pmap.c:1.179.16.44 src/sys/arch/mips/mips/pmap.c:1.179.16.45
--- src/sys/arch/mips/mips/pmap.c:1.179.16.44 Mon Feb 27 16:57:06 2012
+++ src/sys/arch/mips/mips/pmap.c Mon Jul 9 17:23:37 2012
@@ -760,6 +760,11 @@ pmap_init(void)
#endif
/*
+ * Initialize the segtab lock.
+ */
+ mutex_init(&pmap_segtab_lock, MUTEX_DEFAULT, IPL_HIGH);
+
+ /*
* Set a low water mark on the pv_entry pool, so that we are
* more likely to have these around even in extreme memory
* starvation.
Index: src/sys/arch/mips/mips/pmap_segtab.c
diff -u src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.16 src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.17
--- src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.16 Thu Jul 5 17:28:39 2012
+++ src/sys/arch/mips/mips/pmap_segtab.c Mon Jul 9 17:23:37 2012
@@ -119,13 +119,8 @@ __KERNEL_RCSID(0, "pmap_segtab.c,v 1.1.2
#include
#include
#include
-#include
#include
#include
-#ifdef SYSVSHM
-#include
-#endif
-#include /* XXX: for sock_loan_thresh */
#include
@@ -134,25 +129,29 @@ __KERNEL_RCSID(0, "pmap_segtab.c,v 1.1.2
#include
#include
-CTASSERT(NBPG >= sizeof(union segtab));
+CTASSERT(NBPG >= sizeof(pmap_segtab_t));
+#define PMAP_PTP_CACHE
-union segtab * volatile free_segtab;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Mon Jul 9 17:15:17 UTC 2012 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: locore.h Log Message: Add mips_cpu_switchto prototype. To generate a diff of this commit: cvs rdiff -u -r1.78.36.1.2.35 -r1.78.36.1.2.36 \ src/sys/arch/mips/include/locore.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/locore.h diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.35 src/sys/arch/mips/include/locore.h:1.78.36.1.2.36 --- src/sys/arch/mips/include/locore.h:1.78.36.1.2.35 Tue Feb 14 01:51:11 2012 +++ src/sys/arch/mips/include/locore.h Mon Jul 9 17:15:17 2012 @@ -44,12 +44,15 @@ struct trapframe; void trap(uint32_t, uint32_t, vaddr_t, vaddr_t, struct trapframe *); void ast(void); +struct lwp * + mips_cpu_switchto(struct lwp *, struct lwp *, bool); + /* * Perform a trapsignal, and if cpu_printfataltraps is true, print the trap info * to the console. */ extern bool cpu_printfataltraps; -void cpu_trapsignal(struct lwp *, ksiginfo_t *, struct trapframe *); +void cpu_trapsignal(struct lwp *, ksiginfo_t *, struct trapframe *); void mips_fpu_trap(vaddr_t, struct trapframe *); void mips_fpu_intr(vaddr_t, struct trapframe *);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Mon Jul 9 17:14:47 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: trap.c
Log Message:
It's mips_cpu_switchto now.
To generate a diff of this commit:
cvs rdiff -u -r1.217.12.43 -r1.217.12.44 src/sys/arch/mips/mips/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/trap.c
diff -u src/sys/arch/mips/mips/trap.c:1.217.12.43 src/sys/arch/mips/mips/trap.c:1.217.12.44
--- src/sys/arch/mips/mips/trap.c:1.217.12.43 Mon Feb 27 17:04:39 2012
+++ src/sys/arch/mips/mips/trap.c Mon Jul 9 17:14:47 2012
@@ -1195,7 +1195,7 @@ const static struct { void *addr; const
#endif /* MIPS64R2_RMIXL */
Name(cpu_idle),
- Name(cpu_switchto),
+ Name(mips_cpu_switchto),
{0, 0}
};
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Mon Jul 9 17:13:06 UTC 2012 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: genassym.cf Log Message: Add L_FLAG / LW_SYSTEM To generate a diff of this commit: cvs rdiff -u -r1.44.12.32 -r1.44.12.33 src/sys/arch/mips/mips/genassym.cf Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/genassym.cf diff -u src/sys/arch/mips/mips/genassym.cf:1.44.12.32 src/sys/arch/mips/mips/genassym.cf:1.44.12.33 --- src/sys/arch/mips/mips/genassym.cf:1.44.12.32 Mon Feb 27 17:04:39 2012 +++ src/sys/arch/mips/mips/genassym.cf Mon Jul 9 17:13:06 2012 @@ -109,6 +109,7 @@ define MIPS_XKSEG_START MIPS_XKSEG_START # Important offsets into the lwp and proc structs & associated constants define L_CPU offsetof(struct lwp, l_cpu) define L_CTXSWITCH offsetof(struct lwp, l_ctxswtch) +define L_FLAG offsetof(struct lwp, l_flag) define L_PCB offsetof(struct lwp, l_addr) define L_PRIORITY offsetof(struct lwp, l_priority) define L_PRIVATE offsetof(struct lwp, l_private) @@ -120,6 +121,8 @@ define L_MD_UPTE_1 offsetof(struct lwp, define L_MD_ASTPENDING offsetof(struct lwp, l_md.md_astpending) define L_WCHAN offsetof(struct lwp, l_wchan) +define LW_SYSTEM LW_SYSTEM + define P_RASLIST offsetof(struct proc, p_raslist) define P_MD_SYSCALL offsetof(struct proc, p_md.md_syscall)
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Mon Jul 9 17:12:39 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: cache_r4k_subr.S
Log Message:
Add a .set mips32 so that O32 kernels can compile.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/mips/mips/cache_r4k_subr.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/cache_r4k_subr.S
diff -u src/sys/arch/mips/mips/cache_r4k_subr.S:1.1.2.3 src/sys/arch/mips/mips/cache_r4k_subr.S:1.1.2.4
--- src/sys/arch/mips/mips/cache_r4k_subr.S:1.1.2.3 Thu Feb 16 10:44:30 2012
+++ src/sys/arch/mips/mips/cache_r4k_subr.S Mon Jul 9 17:12:39 2012
@@ -37,7 +37,7 @@
#include
-RCSID("$NetBSD: cache_r4k_subr.S,v 1.1.2.3 2012/02/16 10:44:30 matt Exp $")
+RCSID("$NetBSD: cache_r4k_subr.S,v 1.1.2.4 2012/07/09 17:12:39 matt Exp $")
#include
@@ -45,6 +45,12 @@ RCSID("$NetBSD: cache_r4k_subr.S,v 1.1.2
#error LINE_SHIFT undefined
#endif
+#ifdef __mips_o32
+ .set mips32
+#else
+ .set mips3
+#endif
+
#define LINE_SIZE (1 << LINE_SHIFT)
#ifdef __STDC__
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Mon Jul 9 17:11:32 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: locore_mips1.S mipsX_subr.S
Log Message:
Add code to panic if/when a kthread return to lwp_startup.
Add a workaround for the XLP which requires a EHB at the start of the interrupt
vector.
To generate a diff of this commit:
cvs rdiff -u -r1.64.26.1.2.15 -r1.64.26.1.2.16 \
src/sys/arch/mips/mips/locore_mips1.S
cvs rdiff -u -r1.26.36.1.2.56 -r1.26.36.1.2.57 \
src/sys/arch/mips/mips/mipsX_subr.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/locore_mips1.S
diff -u src/sys/arch/mips/mips/locore_mips1.S:1.64.26.1.2.15 src/sys/arch/mips/mips/locore_mips1.S:1.64.26.1.2.16
--- src/sys/arch/mips/mips/locore_mips1.S:1.64.26.1.2.15 Thu Feb 9 20:01:21 2012
+++ src/sys/arch/mips/mips/locore_mips1.S Mon Jul 9 17:11:32 2012
@@ -1511,6 +1511,15 @@ LEAF(MIPSX(lwp_trampoline))
jalr s0
move a0, s1
+#ifdef DIAGNOSTIC
+ INT_L v0, L_FLAG(MIPS_CURLWP)
+ and v0, LW_SYSTEM
+ beqz v0, 1f
+ nop
+ PANIC("kthread failed to call kthread_exit!")
+1:
+#endif
+
# Return to user (won't happen if a kernel thread)
.set noat
MIPSX(user_return):
Index: src/sys/arch/mips/mips/mipsX_subr.S
diff -u src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.56 src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.57
--- src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.56 Mon Feb 27 17:04:39 2012
+++ src/sys/arch/mips/mips/mipsX_subr.S Mon Jul 9 17:11:32 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: mipsX_subr.S,v 1.26.36.1.2.56 2012/02/27 17:04:39 matt Exp $ */
+/* $NetBSD: mipsX_subr.S,v 1.26.36.1.2.57 2012/07/09 17:11:32 matt Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -601,8 +601,13 @@ _VECTOR_END(MIPSX(exception))
*/
VECTOR(MIPSX(intr), unknown)
.set noat
+#if (MIPS64R2_RMIXL) > 0
+ EHB #work around chip bug
+#endif
mfc0 k1, MIPS_COP_0_STATUS #00: get the status register
+#if (MIPS3) > 0
nop #01: stall
+#endif
and k1, k1, MIPS3_SR_KSU_USER #02: test for user mode
PTR_LA k0, MIPSX(user_intr) #03: assume user mode
bnez k1, 1f#05: yep, do it
@@ -2598,6 +2603,14 @@ LEAF(MIPSX(lwp_trampoline))
jalr s0
move a0, s1
+#ifdef DIAGNOSTIC
+ INT_L v0, L_FLAG(MIPS_CURLWP)
+ and v0, LW_SYSTEM
+ beqz v0, 1f
+ nop
+ PANIC("kthread failed to call kthread_exit!")
+1:
+#endif
#
# Return to user (won't happen if a kernel thread)
#
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Thu Jul 5 17:28:39 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: pmap_segtab.c
Log Message:
Fix typo (assigned wrong variable).
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.15 -r1.1.2.16 src/sys/arch/mips/mips/pmap_segtab.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/pmap_segtab.c
diff -u src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.15 src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.16
--- src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.15 Mon Feb 27 16:57:06 2012
+++ src/sys/arch/mips/mips/pmap_segtab.c Thu Jul 5 17:28:39 2012
@@ -469,7 +469,7 @@ pmap_pte_reserve(pmap_t pmap, vaddr_t va
union segtab *ostp = atomic_cas_ptr(stp_p, NULL, nstp);
if (__predict_false(ostp != NULL)) {
pmap_segtab_free(nstp);
-stp = ostp;
+nstp = ostp;
}
#else
*stp_p = nstp;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Fri Mar 30 01:04:48 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmn.c
Log Message:
Deal with station ids without names (not all XLS have all stations).
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.11 -r1.1.2.12 src/sys/arch/mips/rmi/rmixl_fmn.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_fmn.c
diff -u src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.11 src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.12
--- src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.11 Thu Jan 19 10:29:34 2012
+++ src/sys/arch/mips/rmi/rmixl_fmn.c Fri Mar 30 01:04:47 2012
@@ -790,8 +790,10 @@ rmixl_fmn_cpu_attach(struct cpu_info *ci
KASSERT(xname != NULL);
for (size_t i = 1; i < fmn_info.fmn_nstid; i++) {
- evcnt_attach_dynamic(&sc->sc_fmn_stid_evcnts[i],
- EVCNT_TYPE_MISC, NULL, xname, fmn_stid_ev_names[i]);
+ if (fmn_stid_ev_names[i][0] != '\0') {
+ evcnt_attach_dynamic(&sc->sc_fmn_stid_evcnts[i],
+ EVCNT_TYPE_MISC, NULL, xname, fmn_stid_ev_names[i]);
+ }
}
for (size_t i = 0; i < fmn_info.fmn_nbucket; i++) {
@@ -811,9 +813,11 @@ rmixl_fmn_init_thread(void)
KASSERT(fmn->fmn_stinfo[0].si_name == NULL);
for (size_t i = 1; i < fmn_info.fmn_nstid; i++) {
- KASSERT(fmn->fmn_stinfo[i].si_name != NULL);
- snprintf(fmn_stid_ev_names[i], sizeof(fmn_stid_ev_names[i]),
- "fmn %s rx msgs", fmn->fmn_stinfo[i].si_name);
+ if (fmn->fmn_stinfo[i].si_name != NULL) {
+ snprintf(fmn_stid_ev_names[i],
+ sizeof(fmn_stid_ev_names[i]),
+ "fmn %s rx msgs", fmn->fmn_stinfo[i].si_name);
+ }
}
if (CPU_IS_PRIMARY(ci)) {
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Wed Feb 29 02:02:57 UTC 2012 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_emul.c Log Message: Fix $NetBSD$ To generate a diff of this commit: cvs rdiff -u -r1.14.78.16 -r1.14.78.17 src/sys/arch/mips/mips/mips_emul.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/mips_emul.c diff -u src/sys/arch/mips/mips/mips_emul.c:1.14.78.16 src/sys/arch/mips/mips/mips_emul.c:1.14.78.17 --- src/sys/arch/mips/mips/mips_emul.c:1.14.78.16 Wed Feb 29 01:55:44 2012 +++ src/sys/arch/mips/mips/mips_emul.c Wed Feb 29 02:02:57 2012 @@ -1,4 +1,4 @@ -/* mips_emul.c,v 1.14.78.14 2012/02/13 08:13:42 matt Exp */ +/* $NetBSD: mips_emul.c,v 1.14.78.17 2012/02/29 02:02:57 matt Exp $ */ /* * Copyright (c) 1999 Shuichiro URATA. All rights reserved.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Wed Feb 29 01:55:45 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_emul.c
Log Message:
Improve conditions for send_sigsegv.
To generate a diff of this commit:
cvs rdiff -u -r1.14.78.15 -r1.14.78.16 src/sys/arch/mips/mips/mips_emul.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/mips_emul.c
diff -u src/sys/arch/mips/mips/mips_emul.c:1.14.78.15 src/sys/arch/mips/mips/mips_emul.c:1.14.78.16
--- src/sys/arch/mips/mips/mips_emul.c:1.14.78.15 Mon Feb 27 16:59:42 2012
+++ src/sys/arch/mips/mips/mips_emul.c Wed Feb 29 01:55:44 2012
@@ -45,7 +45,7 @@ __KERNEL_RCSID(0, "mips_emul.c,v 1.14.78
#include /* for VM_MAX_ADDRESS */
#include
-#ifndef NOMIPSEMUL
+#if (!defined(NOMIPSEMUL) && (MIPS1 + MIPS2) > 0) || defined(FPEMUL)
static void send_sigsegv(intptr_t, uint32_t, struct trapframe *, uint32_t);
#endif
static void send_sigill(intptr_t, uint32_t, struct trapframe *, uint32_t,
@@ -263,7 +263,7 @@ mips_emul_inst(uint32_t status, uint32_t
}
}
-#ifndef NOMIPSEMUL
+#if (!defined(NOMIPSEMUL) && (MIPS1 + MIPS2) > 0) || defined(FPEMUL)
static void
send_sigsegv(intptr_t vaddr, uint32_t exccode, struct trapframe *tf,
uint32_t cause)
@@ -821,7 +821,7 @@ mips_emul_lwr(uint32_t inst, struct trap
update_pc(tf, cause);
}
-#if defined(__mips_n32) || defined(__mips_n64) || defined(__mips_o64)
+#if !defined(__mips_o32)
void
mips_emul_lwu(uint32_t inst, struct trapframe *tf, uint32_t cause)
{
@@ -938,7 +938,7 @@ mips_emul_ldr(uint32_t inst, struct trap
update_pc(tf, cause);
}
-#endif /* defined(__mips_n32) || defined(__mips_n64) || defined(__mips_o64) */
+#endif /* !defined(__mips_o32) */
void
mips_emul_sb(uint32_t inst, struct trapframe *tf, uint32_t cause)
@@ -1081,7 +1081,7 @@ mips_emul_swr(uint32_t inst, struct trap
update_pc(tf, cause);
}
-#if defined(__mips_n32) || defined(__mips_n64) || defined(__mips_o64)
+#if !defined(__mips_o32)
void
mips_emul_sd(uint32_t inst, struct trapframe *tf, uint32_t cause)
{
@@ -1178,5 +1178,5 @@ mips_emul_sdr(uint32_t inst, struct trap
update_pc(tf, cause);
}
-#endif /* defined(__mips_n32) || defined(__mips_n64) || defined(__mips_o64) */
+#endif /* !defined(__mips_o32) */
#endif /* defined(FPEMUL) */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Mon Feb 27 17:03:37 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpuvar.h rmixl_intr.c
Log Message:
Add a test for recursive IPIs.
use __builtin_clzll
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/rmi/rmixl_cpuvar.h
cvs rdiff -u -r1.1.2.35 -r1.1.2.36 src/sys/arch/mips/rmi/rmixl_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpuvar.h
diff -u src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.5 src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.6
--- src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.5 Thu Jan 19 08:05:24 2012
+++ src/sys/arch/mips/rmi/rmixl_cpuvar.h Mon Feb 27 17:03:36 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpuvar.h,v 1.1.2.5 2012/01/19 08:05:24 matt Exp $ */
+/* rmixl_cpuvar.h,v 1.1.2.5 2012/01/19 08:05:24 matt Exp */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -49,6 +49,7 @@ struct cpu_softc {
struct evcnt sc_irt_evcnts[160];
struct evcnt sc_fmn_stid_evcnts[RMIXL_FMN_NSTID];
struct evcnt sc_fmn_cpu_evcnts[8];
+ bool sc_in_ipi;
};
#endif /* _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_ */
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.35 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.36
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.35 Thu Jan 19 08:05:24 2012
+++ src/sys/arch/mips/rmi/rmixl_intr.c Mon Feb 27 17:03:36 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp $ */
+/* rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp $");
+__KERNEL_RCSID(0, "rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
@@ -761,16 +761,6 @@ void rmixl_ipl_eimr_map_print(void);
#endif
-static inline u_int
-dclz(uint64_t val)
-{
- u_int nlz;
-
- __asm volatile("dclz %0, %1" : "=r"(nlz) : "r"(val));
-
- return nlz;
-}
-
void
evbmips_intr_init(void)
{
@@ -1412,7 +1402,7 @@ evbmips_iointr(int ipl, vaddr_t pc, uint
if (eirr == 0)
break;
- vec = 63 - dclz(eirr);
+ vec = 63 - __builtin_clzll(eirr);
rmixl_intrvec_t * const iv = &rmixl_intrvec[vec];
vecbit = 1ULL << vec;
KASSERT (iv->iv_ipl == ipl);
@@ -1495,11 +1485,14 @@ rmixl_ipi_intr(void *arg)
KASSERT(ci->ci_cpl >= IPL_SCHED);
KASSERT((uintptr_t)arg < NIPIS);
+ KASSERT(!ci->ci_softc->sc_in_ipi);
/* if the request is clear, it was previously processed */
if ((ci->ci_request_ipis & ipi_mask) == 0)
return 0;
+ ci->ci_softc->sc_in_ipi = true;
+
atomic_or_64(&ci->ci_active_ipis, ipi_mask);
atomic_and_64(&ci->ci_request_ipis, ~ipi_mask);
@@ -1507,6 +1500,7 @@ rmixl_ipi_intr(void *arg)
atomic_and_64(&ci->ci_active_ipis, ~ipi_mask);
+ ci->ci_softc->sc_in_ipi = false;
return 1;
}
#endif /* MULTIPROCESSOR */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Mon Feb 27 17:04:40 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h
src/sys/arch/mips/mips [matt-nb5-mips64]: cpu_subr.c genassym.cf
mipsX_subr.S syscall.c trap.c
Log Message:
Count all traps types.
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.43 -r1.90.16.44 src/sys/arch/mips/include/cpu.h
cvs rdiff -u -r1.1.2.24 -r1.1.2.25 src/sys/arch/mips/mips/cpu_subr.c
cvs rdiff -u -r1.44.12.31 -r1.44.12.32 src/sys/arch/mips/mips/genassym.cf
cvs rdiff -u -r1.26.36.1.2.55 -r1.26.36.1.2.56 \
src/sys/arch/mips/mips/mipsX_subr.S
cvs rdiff -u -r1.37.12.15 -r1.37.12.16 src/sys/arch/mips/mips/syscall.c
cvs rdiff -u -r1.217.12.42 -r1.217.12.43 src/sys/arch/mips/mips/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.43 src/sys/arch/mips/include/cpu.h:1.90.16.44
--- src/sys/arch/mips/include/cpu.h:1.90.16.43 Mon Feb 13 18:20:25 2012
+++ src/sys/arch/mips/include/cpu.h Mon Feb 27 17:04:39 2012
@@ -107,9 +107,12 @@ struct cpu_info {
volatile u_int ci_softints;
struct evcnt ci_ev_fpu_loads; /* fpu load counter */
struct evcnt ci_ev_fpu_saves; /* fpu save counter */
- struct evcnt ci_ev_kern_tlbmisses;
- struct evcnt ci_ev_user_tlbmisses;
+ struct evcnt ci_ev_traps[2][32];
+ struct evcnt ci_ev_kern_tlb_misses;
+ struct evcnt ci_ev_user_tlb_misses;
struct evcnt ci_ev_tlblocked;
+ char ci_ev_kern_trap_group[12];
+ char ci_ev_user_trap_group[12];
/*
* Per-cpu pmap information
Index: src/sys/arch/mips/mips/cpu_subr.c
diff -u src/sys/arch/mips/mips/cpu_subr.c:1.1.2.24 src/sys/arch/mips/mips/cpu_subr.c:1.1.2.25
--- src/sys/arch/mips/mips/cpu_subr.c:1.1.2.24 Thu Feb 16 10:47:06 2012
+++ src/sys/arch/mips/mips/cpu_subr.c Mon Feb 27 17:04:39 2012
@@ -138,18 +138,15 @@ cpu_info_alloc(struct pmap_tlb_info *ti,
* it and its locks.
*/
if (ti == NULL) {
- const size_t ti_size = roundup2(sizeof(*ti), COHERENCY_UNIT)
- + 2*COHERENCY_UNIT;
+ const size_t ti_size = roundup2(sizeof(*ti), COHERENCY_UNIT);
if (cpu_info_offset >= ti_size) {
- ti = (void *) (va + cpu_info_offset - ti_size);
+ ti = (void *) (va + cpu_info_offset);
} else {
KASSERT(PAGE_SIZE - cpu_info_offset + sizeof(*ci) >= ti_size);
ti = (struct pmap_tlb_info *)(va + PAGE_SIZE - ti_size);
}
- ti->ti_lock = (kmutex_t *)
- roundup2((intptr_t)ti + sizeof(*ti), COHERENCY_UNIT);
- ti->ti_hwlock = (kmutex_t *)
- ((intptr_t)ti->ti_lock + COHERENCY_UNIT);
+ ti->ti_lock = (kmutex_t *)((intptr_t)ti - COHERENCY_UNIT);
+ ti->ti_hwlock = (kmutex_t *)((intptr_t)ti - 2*COHERENCY_UNIT);
pmap_tlb_info_init(ti);
}
@@ -225,6 +222,41 @@ cpu_hwrena_setup(void)
#endif
}
+static const char * const ev_trap_names[32] = {
+ "interrupts",
+ "TLB modifications",
+ "load TLB invalid",
+ "store TLB invalid",
+ "load address errors",
+ "store address errors",
+ "I-fetch bus errors",
+ "load/store bus errors",
+ "system calls",
+ "breakpoints",
+ "reserved instructions",
+ "unusable coprocessors",
+ "arithmetic overflows",
+ "trap exceptions",
+ "VCI exceptions",
+ "FP exceptions",
+ "reserved 16",
+ "reserved 17",
+ "COP2 exceptions",
+ "TLB RI exceptions",
+ "TLB XI exceptions",
+ "reserved 21",
+ "MDMX exceptions",
+ "watch exceptions",
+ "machine checks",
+ "thread activations",
+ "DSP exceptions",
+ "reserved 27",
+ "reserved 28",
+ "reserved 29",
+ "cache errors",
+ "VCD exceptions",
+};
+
void
cpu_attach_common(device_t self, struct cpu_info *ci)
{
@@ -249,12 +281,24 @@ cpu_attach_common(device_t self, struct
evcnt_attach_dynamic(&ci->ci_ev_fpu_saves,
EVCNT_TYPE_MISC, NULL, xname,
"fpu saves");
- evcnt_attach_dynamic(&ci->ci_ev_user_tlbmisses,
- EVCNT_TYPE_TRAP, NULL, xname,
- "user tlb misses");
- evcnt_attach_dynamic(&ci->ci_ev_kern_tlbmisses,
- EVCNT_TYPE_TRAP, NULL, xname,
- "kern tlb misses");
+ snprintf(ci->ci_ev_kern_trap_group, sizeof(ci->ci_ev_kern_trap_group),
+ "%s kern", xname);
+ snprintf(ci->ci_ev_user_trap_group, sizeof(ci->ci_ev_user_trap_group),
+ "%s user", xname);
+ evcnt_attach_dynamic(&ci->ci_ev_kern_tlb_misses,
+ EVCNT_TYPE_TRAP, NULL, ci->ci_ev_kern_trap_group,
+ "TLB misses");
+ evcnt_attach_dynamic(&ci->ci_ev_user_tlb_misses,
+ EVCNT_TYPE_TRAP, NULL, ci->ci_ev_user_trap_group,
+ "TLB misses");
+ for (u_int i = 0; i < 32; i++) {
+ evcnt_attach_dynamic(&ci->ci_ev_traps[0][i],
+ EVCNT_TYPE_TRAP, NULL, ci->ci_ev_kern_trap_group,
+ ev_trap_names[i]);
+ evcnt_attach_dynamic(&ci->ci_ev_traps[1][i],
+ EVCNT_TYPE_TRAP, NULL, ci->ci_ev_user_trap_group,
+ ev_trap_names[i]);
+ }
evcnt_attach_dynamic(&ci->ci_ev_tlblocked,
EVCNT_TYPE_MISC, NULL, xname,
"tlb locked");
Index: src/sys/arch/mips/mips/genassym.cf
diff -u src/sys/arch/mips/mips/genassym.cf:1.44.12.31 src/sys/arch/m
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Mon Feb 27 17:00:28 UTC 2012 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: db_interface.c Log Message: Make sure to properly cast pointers. To generate a diff of this commit: cvs rdiff -u -r1.64.16.24 -r1.64.16.25 src/sys/arch/mips/mips/db_interface.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/db_interface.c diff -u src/sys/arch/mips/mips/db_interface.c:1.64.16.24 src/sys/arch/mips/mips/db_interface.c:1.64.16.25 --- src/sys/arch/mips/mips/db_interface.c:1.64.16.24 Thu Feb 16 10:45:17 2012 +++ src/sys/arch/mips/mips/db_interface.c Mon Feb 27 17:00:28 2012 @@ -202,7 +202,7 @@ db_write_bytes(vaddr_t addr, size_t size *p++ = *data++; wbflush(); - mips_icache_sync_range(addr, size); + mips_icache_sync_range((intptr_t)addr, size); } #ifndef KGDB
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Mon Feb 27 16:59:43 UTC 2012
Modified Files:
src/sys/arch/mips/conf [matt-nb5-mips64]: files.mips
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_emul.c
Log Message:
Add option NOMIPSEMUL so disable (almost) all emulation.
To generate a diff of this commit:
cvs rdiff -u -r1.58.24.19 -r1.58.24.20 src/sys/arch/mips/conf/files.mips
cvs rdiff -u -r1.14.78.14 -r1.14.78.15 src/sys/arch/mips/mips/mips_emul.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/conf/files.mips
diff -u src/sys/arch/mips/conf/files.mips:1.58.24.19 src/sys/arch/mips/conf/files.mips:1.58.24.20
--- src/sys/arch/mips/conf/files.mips:1.58.24.19 Tue Dec 27 06:55:38 2011
+++ src/sys/arch/mips/conf/files.mips Mon Feb 27 16:59:42 2012
@@ -14,6 +14,7 @@ defflag opt_cputype.h NOFPU FPEMUL
# ENABLE_MIPS_R4700
# ENABLE_MIPS_R3NKK
defparam opt_cputype.h MIPS_PAGE_SHIFT
+defflag opt_mips_emul.h NOMIPSEMUL
defflag opt_mips_cache.h MIPS3_NO_PV_UNCACHED
ENABLE_MIPS4_CACHE_R10K
defflag opt_mips3_wired.h ENABLE_MIPS3_WIRED_MAP
Index: src/sys/arch/mips/mips/mips_emul.c
diff -u src/sys/arch/mips/mips/mips_emul.c:1.14.78.14 src/sys/arch/mips/mips/mips_emul.c:1.14.78.15
--- src/sys/arch/mips/mips/mips_emul.c:1.14.78.14 Mon Feb 13 08:13:42 2012
+++ src/sys/arch/mips/mips/mips_emul.c Mon Feb 27 16:59:42 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_emul.c,v 1.14.78.14 2012/02/13 08:13:42 matt Exp $ */
+/* mips_emul.c,v 1.14.78.14 2012/02/13 08:13:42 matt Exp */
/*
* Copyright (c) 1999 Shuichiro URATA. All rights reserved.
@@ -27,7 +27,9 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: mips_emul.c,v 1.14.78.14 2012/02/13 08:13:42 matt Exp $");
+__KERNEL_RCSID(0, "mips_emul.c,v 1.14.78.14 2012/02/13 08:13:42 matt Exp");
+
+#include "opt_mips_emul.h"
#include
#include
@@ -43,11 +45,14 @@ __KERNEL_RCSID(0, "$NetBSD: mips_emul.c,
#include /* for VM_MAX_ADDRESS */
#include
+#ifndef NOMIPSEMUL
static void send_sigsegv(intptr_t, uint32_t, struct trapframe *, uint32_t);
+#endif
static void send_sigill(intptr_t, uint32_t, struct trapframe *, uint32_t,
uint32_t);
static void update_pc(struct trapframe *, uint32_t);
+#if (MIPS1 + MIPS2) > 0
/*
* MIPS2 LL instruction emulation state
*/
@@ -56,6 +61,7 @@ struct {
vaddr_t addr;
uint32_t value;
} llstate;
+#endif
/*
* Analyse 'next' PC address taking account of branch/jump instructions
@@ -206,18 +212,24 @@ mips_emul_inst(uint32_t status, uint32_t
inst = ufetch_uint32((uint32_t *)opc);
switch (((InstFmt)inst).FRType.op) {
+#ifndef NOMIPSEMUL
+#if (MIPS1 + MIPS2) > 0
case OP_LWC0:
mips_emul_lwc0(inst, tf, cause);
break;
case OP_SWC0:
mips_emul_swc0(inst, tf, cause);
break;
+#endif
case OP_SPECIAL:
mips_emul_special(inst, tf, cause);
break;
+#endif
+#if (MIPS1 + MIPS2 + MIPS3 + MIPS32 + MIPS64 + MIPS64_RMIXL) > 0
case OP_SPECIAL3:
mips_emul_special3(inst, tf, cause);
break;
+#endif
case OP_COP1:
#if defined(FPEMUL)
mips_emul_fp(inst, tf, cause);
@@ -251,6 +263,7 @@ mips_emul_inst(uint32_t status, uint32_t
}
}
+#ifndef NOMIPSEMUL
static void
send_sigsegv(intptr_t vaddr, uint32_t exccode, struct trapframe *tf,
uint32_t cause)
@@ -266,6 +279,7 @@ send_sigsegv(intptr_t vaddr, uint32_t ex
ksi.ksi_addr = (void *)vaddr;
cpu_trapsignal(curlwp, &ksi, tf);
}
+#endif /* NOMIPSEMUL */
static void
send_sigill(intptr_t vaddr, uint32_t exccode, struct trapframe *tf,
@@ -295,6 +309,7 @@ update_pc(struct trapframe *tf, uint32_t
tf->tf_regs[_R_PC] += 4;
}
+#if !defined(NOMIPSEMUL) && (MIPS1 + MIPS2) > 0
/*
* MIPS2 LL instruction
*/
@@ -381,7 +396,9 @@ mips_emul_swc0(uint32_t inst, struct tra
*t = 0;
update_pc(tf, cause);
}
+#endif /* !defined(NOMIPSEMUL) && (MIPS1 + MIPS2) > 0 */
+#ifndef NOMIPSEMUL
void
mips_emul_special(uint32_t inst, struct trapframe *tf, uint32_t cause)
{
@@ -399,6 +416,9 @@ mips_emul_special(uint32_t inst, struct
update_pc(tf, cause);
}
+#endif /* NOMIPSEMUL */
+
+#if (MIPS1 + MIPS2 + MIPS3 + MIPS32 + MIPS64 + MIPS64_RMIXL) > 0
void
mips_emul_special3(uint32_t inst, struct trapframe *tf, uint32_t cause)
{
@@ -419,6 +439,7 @@ mips_emul_special3(uint32_t inst, struct
update_pc(tf, cause);
}
+#endif
#if defined(FPEMUL)
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Mon Feb 27 16:57:58 UTC 2012 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: mips_param.h Log Message: Make sure we don't overflow a 32-bit integer. To generate a diff of this commit: cvs rdiff -u -r1.23.78.11 -r1.23.78.12 src/sys/arch/mips/include/mips_param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/mips_param.h diff -u src/sys/arch/mips/include/mips_param.h:1.23.78.11 src/sys/arch/mips/include/mips_param.h:1.23.78.12 --- src/sys/arch/mips/include/mips_param.h:1.23.78.11 Tue Dec 27 16:09:36 2011 +++ src/sys/arch/mips/include/mips_param.h Mon Feb 27 16:57:58 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: mips_param.h,v 1.23.78.11 2011/12/27 16:09:36 matt Exp $ */ +/* mips_param.h,v 1.23.78.11 2011/12/27 16:09:36 matt Exp */ #ifdef _KERNEL #include @@ -95,8 +95,8 @@ #ifdef _LP64 #define NSEGPG (NBPG/8) -#define NBXSEG (NSEGPG*NBSEG) /* bytes/xsegment */ -#define XSEGOFSET (NBSEG-1) /* byte offset into segment */ +#define NBXSEG ((uint64_t)NSEGPG*NBSEG) /* bytes/xsegment */ +#define XSEGOFSET (NBXSEG-1) /* byte offset into xsegment */ #define XSEGSHIFT (SEGSHIFT+(PGSHIFT-3)) /* LOG2(NBXSEG) */ #endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Mon Feb 27 16:57:06 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: pmap.h
src/sys/arch/mips/mips [matt-nb5-mips64]: pmap.c pmap_segtab.c
Log Message:
Add a page-table-page cache to keep reuse just released page table tables.
Actually remove the addresses in pmap_remove_all.
To generate a diff of this commit:
cvs rdiff -u -r1.54.26.24 -r1.54.26.25 src/sys/arch/mips/include/pmap.h
cvs rdiff -u -r1.179.16.43 -r1.179.16.44 src/sys/arch/mips/mips/pmap.c
cvs rdiff -u -r1.1.2.14 -r1.1.2.15 src/sys/arch/mips/mips/pmap_segtab.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/pmap.h
diff -u src/sys/arch/mips/include/pmap.h:1.54.26.24 src/sys/arch/mips/include/pmap.h:1.54.26.25
--- src/sys/arch/mips/include/pmap.h:1.54.26.24 Thu Feb 16 23:02:21 2012
+++ src/sys/arch/mips/include/pmap.h Mon Feb 27 16:57:05 2012
@@ -154,7 +154,7 @@ void pmap_pte_process(struct pmap *, vad
uintptr_t);
void pmap_segtab_activate(struct pmap *, struct lwp *);
void pmap_segtab_init(struct pmap *);
-void pmap_segtab_destroy(struct pmap *);
+void pmap_segtab_destroy(struct pmap *, pte_callback_t, uintptr_t);
#endif /* _KERNEL */
/*
Index: src/sys/arch/mips/mips/pmap.c
diff -u src/sys/arch/mips/mips/pmap.c:1.179.16.43 src/sys/arch/mips/mips/pmap.c:1.179.16.44
--- src/sys/arch/mips/mips/pmap.c:1.179.16.43 Thu Feb 16 23:02:22 2012
+++ src/sys/arch/mips/mips/pmap.c Mon Feb 27 16:57:06 2012
@@ -865,7 +865,7 @@ pmap_destroy(pmap_t pmap)
PMAP_COUNT(destroy);
kpreempt_disable();
pmap_tlb_asid_release_all(pmap);
- pmap_segtab_destroy(pmap);
+ pmap_segtab_destroy(pmap, NULL, 0);
pool_put(&pmap_pmap_pool, pmap);
kpreempt_enable();
@@ -1754,6 +1754,7 @@ pmap_remove_all(struct pmap *pmap)
pmap_tlb_asid_deactivate(pmap);
#endif
pmap_tlb_asid_release_all(pmap);
+ pmap_segtab_destroy(pmap, pmap_pte_remove, 0);
pmap->pm_flags |= PMAP_DEFERRED_ACTIVATE;
#ifdef PMAP_FAULTINFO
@@ -2503,6 +2504,10 @@ pmap_pv_page_alloc(struct pool *pp, int
struct vm_page * const pg = PMAP_ALLOC_POOLPAGE(UVM_PGA_USERESERVE);
if (pg == NULL)
return NULL;
+#ifdef UVM_PAGE_TRKOWN
+ pg->owner_tag = NULL;
+#endif
+ UVM_PAGE_OWN(pg, pp->pr_wchan, NULL);
uvm_km_pageclaim(pg);
return (void *)mips_pmap_map_poolpage(VM_PAGE_TO_PHYS(pg));
Index: src/sys/arch/mips/mips/pmap_segtab.c
diff -u src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.14 src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.15
--- src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.14 Mon Feb 13 18:20:26 2012
+++ src/sys/arch/mips/mips/pmap_segtab.c Mon Feb 27 16:57:06 2012
@@ -146,14 +146,27 @@ uint32_t npage_segtab;
#define SEGTAB_ADD(n, v) ((void) 0)
#endif
+/*
+ * Keep a list of idle page tables.
+ */
+#define PMAP_PTP_CACHE
+#ifdef PMAP_PTP_CACHE
+static struct pgflist ptp_pgflist = LIST_HEAD_INITIALIZER(ptp_pgflist);
+#endif
+
static inline struct vm_page *
pmap_pte_pagealloc(void)
{
struct vm_page *pg;
pg = PMAP_ALLOC_POOLPAGE(UVM_PGA_ZERO|UVM_PGA_USERESERVE);
- if (pg)
+ if (pg) {
+#ifdef UVM_PAGE_TRKOWN
+ pg->owner_tag = NULL;
+#endif
+ UVM_PAGE_OWN(pg, "pmap-ptp", NULL);
uvm_km_pageclaim(pg);
+ }
return pg;
}
@@ -199,28 +212,41 @@ pmap_segtab_free(union segtab *stp)
}
static void
-pmap_segtab_release(union segtab *stp, u_int level)
+pmap_segtab_release(pmap_t pmap, union segtab **stp_p, bool free_stp,
+ pte_callback_t callback, uintptr_t flags,
+ vaddr_t va, vsize_t vinc)
{
+ union segtab *stp = *stp_p;
- for (size_t i = 0; i < PMAP_SEGTABSIZE; i++) {
+ for (size_t i = 0; i < PMAP_SEGTABSIZE; i++, va += vinc) {
#ifdef _LP64
- if (level > 0) {
+ if (vinc > NBSEG) {
if (stp->seg_seg[i] != NULL) {
-pmap_segtab_release(stp->seg_seg[i], level - 1);
-stp->seg_seg[i] = NULL;
+pmap_segtab_release(pmap, &stp->seg_seg[i],
+true, callback, flags, va, vinc / NSEGPG);
+KASSERT(stp->seg_seg[i] == NULL);
}
continue;
}
#endif
+ KASSERT(vinc == NBSEG);
/* get pointer to segment map */
pt_entry_t *pte = stp->seg_tab[i];
if (pte == NULL)
continue;
-#ifdef PARANOIADIAG
+
+ /*
+ * If our caller want a callback, do so.
+ */
+ if (callback != NULL) {
+ (*callback)(pmap, va, va + vinc, pte, flags);
+ }
+#ifdef DEBUG
for (size_t j = 0; j < NPTEPG; j++) {
- if ((pte + j)->pt_entry)
-panic("pmap_destroy: segmap not empty");
+ if (pte[j].pt_entry)
+panic("%s: pte entry %p not 0 (%#x)",
+ __func__, &pte[j], pte[j].pt_entry);
}
#endif
@@ -238,12 +264,21 @@ pmap_segtab_release(union segtab *stp, u
#endif /* MIPS3_PLUS */
paddr_t pa = mips_pmap_unmap_poolpage((vaddr_t)pte);
struct vm_page *pg = PHYS_TO_VM_PAGE(pa);
+#ifdef PMAP_PTP_CACHE
+ mutex_spin_enter(&uvm_fpageqlock);
+ LIST_INSERT_HEAD(&ptp_pgflist, pg, listq.list);
+ mutex_spin_exit(&uvm_fpageqlock);
+#else
uvm_km_pag
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Thu Feb 16 23:02:22 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: pmap.h
src/sys/arch/mips/mips [matt-nb5-mips64]: pmap.c pmap_tlb.c
Log Message:
Move the ksegx tlb init code into its own function.
Fix a problem with concurrent shootdowns by tracking what cpus want a
shootdown for a pmap, and if anoter cpu wants a shootdown, perform the
shootdown on ourselves.
To generate a diff of this commit:
cvs rdiff -u -r1.54.26.23 -r1.54.26.24 src/sys/arch/mips/include/pmap.h
cvs rdiff -u -r1.179.16.42 -r1.179.16.43 src/sys/arch/mips/mips/pmap.c
cvs rdiff -u -r1.1.2.22 -r1.1.2.23 src/sys/arch/mips/mips/pmap_tlb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/pmap.h
diff -u src/sys/arch/mips/include/pmap.h:1.54.26.23 src/sys/arch/mips/include/pmap.h:1.54.26.24
--- src/sys/arch/mips/include/pmap.h:1.54.26.23 Thu Jan 19 08:28:48 2012
+++ src/sys/arch/mips/include/pmap.h Thu Feb 16 23:02:21 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.54.26.23 2012/01/19 08:28:48 matt Exp $ */
+/* pmap.h,v 1.54.26.23 2012/01/19 08:28:48 matt Exp */
/*
* Copyright (c) 1992, 1993
@@ -180,7 +180,7 @@ typedef struct pmap {
#ifdef MULTIPROCESSOR
volatile uint32_t pm_active; /* pmap was active on ... */
volatile uint32_t pm_onproc; /* pmap is active on ... */
- volatile u_int pm_shootdown_pending;
+ volatile uint32_t pm_shootdown_pending;
#endif
union segtab *pm_segtab; /* pointers to pages of PTEs */
u_int pm_count; /* pmap reference count */
@@ -254,6 +254,7 @@ extern vaddr_t mips_virtual_end;
* Bootstrap the system enough to run with virtual memory.
*/
void pmap_bootstrap(void);
+void pmap_ksegx_bootstrap(void);
void pmap_remove_all(pmap_t);
void pmap_set_modified(paddr_t);
@@ -262,7 +263,7 @@ void pmap_procwr(struct proc *, vaddr_t,
#ifdef MULTIPROCESSOR
void pmap_tlb_shootdown_process(void);
-bool pmap_tlb_shootdown_bystanders(pmap_t pmap);
+bool pmap_tlb_shootdown_bystanders(pmap_t pmap, uint32_t);
void pmap_tlb_info_attach(struct pmap_tlb_info *, struct cpu_info *);
#endif
void pmap_syncicache_page(struct vm_page *, uint32_t);
Index: src/sys/arch/mips/mips/pmap.c
diff -u src/sys/arch/mips/mips/pmap.c:1.179.16.42 src/sys/arch/mips/mips/pmap.c:1.179.16.43
--- src/sys/arch/mips/mips/pmap.c:1.179.16.42 Tue Feb 14 01:51:11 2012
+++ src/sys/arch/mips/mips/pmap.c Thu Feb 16 23:02:22 2012
@@ -443,6 +443,37 @@ pmap_unmap_ephemeral_page(struct vm_page
#endif
}
+#ifdef ENABLE_MIPS_KSEGX
+void
+pmap_ksegx_bootstrap(void)
+{
+ const vaddr_t kva_inc = 1 << ((VM_KSEGX_SHIFT - 1) & ~1);
+ const uint32_t tlb_mask = (2 * kva_inc - 1) & 0x1c00;
+
+ if (mips_ksegx_tlb_slot < 0) {
+ mips_ksegx_tlb_slot = pmap_tlb0_info.ti_wired;
+ pmap_tlb0_info.ti_wired += VM_KSEGX_SIZE / (2 * kva_inc);
+ mips3_cp0_wired_write(pmap_tlb0_info.ti_wired);
+ }
+
+ u_int tlb_slot = mips_ksegx_tlb_slot;
+ for (vaddr_t kva = 0;
+ kva < VM_KSEGX_SIZE;
+ kva += 2 * kva_inc, tlb_slot++) {
+ extern pt_entry_t mips_ksegx_pte;
+ struct tlbmask tlb = {
+ .tlb_hi = VM_KSEGX_ADDRESS + kva,
+ .tlb_lo0 = mips_ksegx_pte.pt_entry
+ + mips_paddr_to_tlbpfn(kva),
+ .tlb_lo1 = mips_ksegx_pte.pt_entry
+ + mips_paddr_to_tlbpfn(kva + kva_inc),
+ .tlb_mask = tlb_mask,
+ };
+ tlb_write_indexed(tlb_slot, &tlb);
+ }
+}
+#endif
+
/*
* Bootstrap the system enough to run with virtual memory.
* firstaddr is the first unused kseg0 address (not page aligned).
@@ -460,22 +491,7 @@ pmap_bootstrap(void)
pmap_tlb_info_init(&pmap_tlb0_info); /* init the lock */
#ifdef ENABLE_MIPS_KSEGX
- const vaddr_t kva_inc = 1 << ((VM_KSEGX_SHIFT - 1) & ~1);
- const uint32_t tlb_mask = (2 * kva_inc - 1) & 0x1c00;
- for (vaddr_t kva = 0; kva < VM_KSEGX_SIZE; kva += 2 * kva_inc) {
- extern pt_entry_t mips_ksegx_pte;
- struct tlbmask tlb = {
- .tlb_hi = VM_KSEGX_ADDRESS + kva,
- .tlb_lo0 = mips_ksegx_pte.pt_entry
- + mips_paddr_to_tlbpfn(kva),
- .tlb_lo1 = mips_ksegx_pte.pt_entry
- + mips_paddr_to_tlbpfn(kva + kva_inc),
- .tlb_mask = tlb_mask,
- };
- tlb_write_indexed(pmap_tlb0_info.ti_wired, &tlb);
- pmap_tlb0_info.ti_wired++;
- }
- mips3_cp0_wired_write(pmap_tlb0_info.ti_wired);
+ pmap_ksegx_bootstrap();
#endif
/*
@@ -918,7 +934,7 @@ pmap_update(struct pmap *pm)
kpreempt_disable();
#ifdef MULTIPROCESSOR
u_int pending = atomic_swap_uint(&pm->pm_shootdown_pending, 0);
- if (pending && pmap_tlb_shootdown_bystanders(pm))
+ if (pending && pmap_tlb_shootdown_bystanders(pm, pending))
PMAP_COUNT(shootdown_ipis);
#endif
/*
Index: src/sys/arch/mips/mips/pmap_tlb.c
diff -u src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.22 src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.23
--- src/sys/arch/mips/mips/pmap_tlb.c:1.1.2.22 Thu Jan 19 08:28:50 2012
+++ src/sys/arch/mips/mips/pmap_tlb.c Thu Feb 16 23:02:
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Thu Feb 16 18:58:58 UTC 2012 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c vm_machdep.c Log Message: mips_nfreelist is the one past the highest freelist used. To generate a diff of this commit: cvs rdiff -u -r1.205.4.1.2.1.2.66 -r1.205.4.1.2.1.2.67 \ src/sys/arch/mips/mips/mips_machdep.c cvs rdiff -u -r1.121.6.1.2.28 -r1.121.6.1.2.29 \ src/sys/arch/mips/mips/vm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/mips_machdep.c diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.66 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.67 --- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.66 Tue Feb 14 01:51:11 2012 +++ src/sys/arch/mips/mips/mips_machdep.c Thu Feb 16 18:58:57 2012 @@ -2392,7 +2392,7 @@ mips_page_physload(vaddr_t vkernstart, v /* * Now to get the number of freelists in use. */ - mips_nfreelist = popcount32(mips_freelist_mask); + mips_nfreelist = 32 - __builtin_clz(mips_freelist_mask); } /* Index: src/sys/arch/mips/mips/vm_machdep.c diff -u src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1.2.28 src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1.2.29 --- src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1.2.28 Tue Feb 14 01:51:12 2012 +++ src/sys/arch/mips/mips/vm_machdep.c Thu Feb 16 18:58:57 2012 @@ -102,7 +102,7 @@ mips_page_to_pggroup(struct vm_page *pg, lcv = VM_FREELIST_DEFAULT; } KDASSERT(lcv == uvm_page_lookup_freelist(pg)); - KASSERT(lcv < mips_nfreelist); + KASSERT((1 << lcv) & mips_freelist_mask); return lcv * ncolors + color; #endif }
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Thu Feb 16 18:58:01 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]:
bus_space_alignstride_chipdep.c
Log Message:
Allow KSEG1 even on _LP64.
To generate a diff of this commit:
cvs rdiff -u -r1.10.18.15 -r1.10.18.16 \
src/sys/arch/mips/mips/bus_space_alignstride_chipdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/bus_space_alignstride_chipdep.c
diff -u src/sys/arch/mips/mips/bus_space_alignstride_chipdep.c:1.10.18.15 src/sys/arch/mips/mips/bus_space_alignstride_chipdep.c:1.10.18.16
--- src/sys/arch/mips/mips/bus_space_alignstride_chipdep.c:1.10.18.15 Thu Jan 19 08:28:49 2012
+++ src/sys/arch/mips/mips/bus_space_alignstride_chipdep.c Thu Feb 16 18:58:01 2012
@@ -896,8 +896,10 @@ __BS(unmap)(void *v, bus_space_handle_t
#if !defined(_LP64) || defined(CHIP_EXTENT)
bus_addr_t addr = 0; /* initialize to appease gcc */
#endif
+#if defined(CHIP_EXTENT) || !defined(_LP64)
+ bool handle_is_km = false;
+#endif
#ifndef _LP64
- bool handle_is_km;
/* determine if h is addr obtained from uvm_km_alloc */
handle_is_km = !(MIPS_KSEG0_P(h) || MIPS_KSEG1_P(h));
@@ -936,15 +938,11 @@ __BS(unmap)(void *v, bus_space_handle_t
if (acct == 0)
return;
-#ifdef EXTENT_DEBUG
+#if defined(EXTENT_DEBUG) || 1
printf("%s: freeing handle %#"PRIxBSH" for %#"PRIxBUSSIZE"\n",
__S(__BS(unmap)), h, size);
#endif
-#ifdef _LP64
- KASSERT(MIPS_XKPHYS_P(h));
- addr = MIPS_XKPHYS_TO_PHYS(h);
-#else
if (handle_is_km == false) {
if (MIPS_KSEG0_P(h)) {
addr = MIPS_KSEG0_TO_PHYS(h);
@@ -952,11 +950,12 @@ __BS(unmap)(void *v, bus_space_handle_t
} else if (MIPS_XKPHYS_P(h)) {
addr = MIPS_XKPHYS_TO_PHYS(h);
#endif
- } else {
+ } else if (MIPS_KSEG1_P(h)) {
addr = MIPS_KSEG1_TO_PHYS(h);
+ } else {
+ panic("%s: unknown handle %#"PRIxBSH, __func__, h);
}
}
-#endif
#ifdef CHIP_W1_BUS_START
if (addr >= CHIP_W1_SYS_START(v) && addr <= CHIP_W1_SYS_END(v)) {
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Thu Feb 16 18:57:16 UTC 2012 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmnvar.h Log Message: enable_cp2 needs a early clobber To generate a diff of this commit: cvs rdiff -u -r1.1.2.8 -r1.1.2.9 src/sys/arch/mips/rmi/rmixl_fmnvar.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_fmnvar.h diff -u src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.8 src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.9 --- src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.8 Thu Jan 19 10:29:34 2012 +++ src/sys/arch/mips/rmi/rmixl_fmnvar.h Thu Feb 16 18:57:15 2012 @@ -239,7 +239,7 @@ rmixl_cp2_enable(void) "or %[sr],%[mask]" "\n\t" "mtc0 %[sr],$%[c0_status]" "\n\t" ".set pop" "\n\t" - : [rv] "=r" (rv), + : [rv] "=&r" (rv), [sr] "=r" (sr) : [c0_status] "n" (MIPS_COP_0_STATUS), [mask] "r" (MIPS_SR_COP_2_BIT));
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Thu Feb 16 10:52:13 UTC 2012 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h Log Message: Add extern int mips_ksegx_tlb_slot; To generate a diff of this commit: cvs rdiff -u -r1.41.28.26 -r1.41.28.27 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.26 src/sys/arch/mips/include/vmparam.h:1.41.28.27 --- src/sys/arch/mips/include/vmparam.h:1.41.28.26 Thu Feb 9 03:14:45 2012 +++ src/sys/arch/mips/include/vmparam.h Thu Feb 16 10:52:13 2012 @@ -217,6 +217,7 @@ extern int mips_poolpage_vmfreelist; #ifdef ENABLE_MIPS_KSEGX extern paddr_t mips_ksegx_start; +extern int mips_ksegx_tlb_slot; #endif #endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Thu Feb 16 10:51:33 UTC 2012 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: mips_fixup.c Log Message: Use (intptr_t) when casting pointers to get proper sign extension. To generate a diff of this commit: cvs rdiff -u -r1.1.2.13 -r1.1.2.14 src/sys/arch/mips/mips/mips_fixup.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/mips_fixup.c diff -u src/sys/arch/mips/mips/mips_fixup.c:1.1.2.13 src/sys/arch/mips/mips/mips_fixup.c:1.1.2.14 --- src/sys/arch/mips/mips/mips_fixup.c:1.1.2.13 Thu Feb 9 20:01:21 2012 +++ src/sys/arch/mips/mips/mips_fixup.c Thu Feb 16 10:51:33 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: mips_fixup.c,v 1.1.2.13 2012/02/09 20:01:21 matt Exp $ */ +/* mips_fixup.c,v 1.1.2.13 2012/02/09 20:01:21 matt Exp */ /*- * Copyright (c) 2010 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: mips_fixup.c,v 1.1.2.13 2012/02/09 20:01:21 matt Exp $"); +__KERNEL_RCSID(0, "mips_fixup.c,v 1.1.2.13 2012/02/09 20:01:21 matt Exp"); #include "opt_mips3_wired.h" #include "opt_multiprocessor.h" @@ -138,9 +138,9 @@ mips_fixup_exceptions(mips_fixup_callbac } if (fixed) - mips_icache_sync_range((vaddr_t)start, + mips_icache_sync_range((intptr_t)start, sizeof(start[0]) * (end - start)); - + return fixed; }
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Thu Feb 16 10:48:39 UTC 2012 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_machdep.c Log Message: Add mips_ksegx_tlb_slot. When casting pointers, use intptr_t so we get proper sign extension. To generate a diff of this commit: cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/mips/rmi/rmixl_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_machdep.c diff -u src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.3 src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.4 --- src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.3 Thu Feb 2 00:21:00 2012 +++ src/sys/arch/mips/rmi/rmixl_machdep.c Thu Feb 16 10:48:39 2012 @@ -204,6 +204,7 @@ struct rmixl_config rmixl_configuration #ifdef ENABLE_MIPS_KSEGX pt_entry_t mips_ksegx_pte; paddr_t mips_ksegx_start; +int mips_ksegx_tlb_slot = -1; #endif /* @@ -847,7 +848,7 @@ rmixl_fixup_curcpu(void) * just change the instruction bits around it. */ *insnp = insn ^ LOAD_CURCPU ^ MFC0_CURCPU; - mips_icache_sync_range((vaddr_t)insnp, 4); + mips_icache_sync_range((intptr_t)insnp, 4); } } }
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Thu Feb 16 10:47:07 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: cpu_subr.c
Log Message:
When booting a N32 MP kernel, make sure to setup the ksegx mapping.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.23 -r1.1.2.24 src/sys/arch/mips/mips/cpu_subr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/cpu_subr.c
diff -u src/sys/arch/mips/mips/cpu_subr.c:1.1.2.23 src/sys/arch/mips/mips/cpu_subr.c:1.1.2.24
--- src/sys/arch/mips/mips/cpu_subr.c:1.1.2.23 Thu Jan 19 08:28:49 2012
+++ src/sys/arch/mips/mips/cpu_subr.c Thu Feb 16 10:47:06 2012
@@ -141,7 +141,7 @@ cpu_info_alloc(struct pmap_tlb_info *ti,
const size_t ti_size = roundup2(sizeof(*ti), COHERENCY_UNIT)
+ 2*COHERENCY_UNIT;
if (cpu_info_offset >= ti_size) {
- ti = (void *) va;
+ ti = (void *) (va + cpu_info_offset - ti_size);
} else {
KASSERT(PAGE_SIZE - cpu_info_offset + sizeof(*ci) >= ti_size);
ti = (struct pmap_tlb_info *)(va + PAGE_SIZE - ti_size);
@@ -930,6 +930,10 @@ cpu_hatch(struct cpu_info *ci)
tlb_invalidate_all();
mips3_cp0_wired_write(ti->ti_wired);
+#ifdef ENABLE_MIPS_KSEGX
+ pmap_ksegx_bootstrap();
+#endif
+
/*
* Setup HWRENA and USERLOCAL COP0 registers (MIPSxxR2).
*/
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Thu Feb 16 10:45:17 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: db_machdep.h
src/sys/arch/mips/mips [matt-nb5-mips64]: db_disasm.c db_interface.c
db_trace.c
Log Message:
Change db_expr_t to an register_t so we can see the full register contents
on N32 kernels.
To generate a diff of this commit:
cvs rdiff -u -r1.22.62.4 -r1.22.62.5 src/sys/arch/mips/include/db_machdep.h
cvs rdiff -u -r1.19.62.3 -r1.19.62.4 src/sys/arch/mips/mips/db_disasm.c
cvs rdiff -u -r1.64.16.23 -r1.64.16.24 src/sys/arch/mips/mips/db_interface.c
cvs rdiff -u -r1.35.38.5 -r1.35.38.6 src/sys/arch/mips/mips/db_trace.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/db_machdep.h
diff -u src/sys/arch/mips/include/db_machdep.h:1.22.62.4 src/sys/arch/mips/include/db_machdep.h:1.22.62.5
--- src/sys/arch/mips/include/db_machdep.h:1.22.62.4 Fri Apr 29 08:26:21 2011
+++ src/sys/arch/mips/include/db_machdep.h Thu Feb 16 10:45:16 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.h,v 1.22.62.4 2011/04/29 08:26:21 matt Exp $ */
+/* db_machdep.h,v 1.22.62.4 2011/04/29 08:26:21 matt Exp */
/*
* Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
@@ -42,7 +42,7 @@
typedef vaddr_t db_addr_t; /* address - unsigned */
-typedef long db_expr_t; /* expression - signed */
+typedef register_t db_expr_t; /* expression - signed */
typedef struct reg db_regs_t;
Index: src/sys/arch/mips/mips/db_disasm.c
diff -u src/sys/arch/mips/mips/db_disasm.c:1.19.62.3 src/sys/arch/mips/mips/db_disasm.c:1.19.62.4
--- src/sys/arch/mips/mips/db_disasm.c:1.19.62.3 Fri Apr 29 08:26:24 2011
+++ src/sys/arch/mips/mips/db_disasm.c Thu Feb 16 10:45:17 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: db_disasm.c,v 1.19.62.3 2011/04/29 08:26:24 matt Exp $ */
+/* db_disasm.c,v 1.19.62.3 2011/04/29 08:26:24 matt Exp */
/*-
* Copyright (c) 1991, 1993
@@ -35,7 +35,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.19.62.3 2011/04/29 08:26:24 matt Exp $");
+__KERNEL_RCSID(0, "db_disasm.c,v 1.19.62.3 2011/04/29 08:26:24 matt Exp");
#include
#include
@@ -157,7 +157,7 @@ static void print_addr(db_addr_t);
db_addr_t
db_disasm(db_addr_t loc, bool altfmt)
{
- u_int32_t instr;
+ uint32_t instr;
/*
* Take some care with addresses to not UTLB here as it
@@ -172,7 +172,7 @@ db_disasm(db_addr_t loc, bool altfmt)
}
}
else {
- instr = *(u_int32_t *)loc;
+ instr = *(uint32_t *)(intptr_t)loc;
}
return (db_disasm_insn(instr, loc, altfmt));
@@ -596,7 +596,7 @@ print_addr(db_addr_t loc)
if (diff == 0)
db_printf("%s", symname);
else
- db_printf("<%s+%lx>", symname, diff);
+ db_printf("<%s+%#"PRIxREGISTER">", symname, diff);
db_printf("\t[addr:%#"PRIxVADDR"]", loc);
} else {
db_printf("%#"PRIxVADDR, loc);
Index: src/sys/arch/mips/mips/db_interface.c
diff -u src/sys/arch/mips/mips/db_interface.c:1.64.16.23 src/sys/arch/mips/mips/db_interface.c:1.64.16.24
--- src/sys/arch/mips/mips/db_interface.c:1.64.16.23 Thu May 26 19:21:56 2011
+++ src/sys/arch/mips/mips/db_interface.c Thu Feb 16 10:45:17 2012
@@ -266,7 +266,7 @@ db_kvtophys_cmd(db_expr_t addr, bool hav
* Cast the physical address -- some platforms, while
* being ILP32, may be using 64-bit paddr_t's.
*/
- db_printf("0x%lx -> 0x%" PRIx64 "\n", addr,
+ db_printf("%#"PRIxPTR" -> 0x%" PRIx64 "\n", (intptr_t) addr,
(uint64_t) kvtophys(addr));
} else
printf("not a kernel virtual address\n");
@@ -672,7 +672,7 @@ db_mfcr_cmd(db_expr_t addr, bool have_ad
".set pop \n\t" \
: "=r"(value) : "r"(addr));
- db_printf("control reg 0x%lx = 0x%" PRIx64 "\n", addr, value);
+ db_printf("control reg %#"PRIx64" = %#" PRIx64 "\n", addr, value);
}
void
@@ -702,7 +702,7 @@ db_mtcr_cmd(db_expr_t addr, bool have_ad
".set pop \n\t" \
:: "r"(value), "r"(addr));
- db_printf("control reg 0x%lx = 0x%lx\n", addr, value);
+ db_printf("control reg %#"PRIx64" = %#"PRIx64"\n", addr, value);
}
#endif /* (MIPS64_RMIXL + MIPS64R2_RMIXL) > 0 */
Index: src/sys/arch/mips/mips/db_trace.c
diff -u src/sys/arch/mips/mips/db_trace.c:1.35.38.5 src/sys/arch/mips/mips/db_trace.c:1.35.38.6
--- src/sys/arch/mips/mips/db_trace.c:1.35.38.5 Fri Apr 29 08:26:25 2011
+++ src/sys/arch/mips/mips/db_trace.c Thu Feb 16 10:45:17 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: db_trace.c,v 1.35.38.5 2011/04/29 08:26:25 matt Exp $ */
+/* db_trace.c,v 1.35.38.5 2011/04/29 08:26:25 matt Exp */
/*
* Mach Operating System
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.35.38.5 2011/04/29 08:26:25 matt Exp $");
+__KERNEL_RCSID(0, "db_trace.c,v 1.35.38.5 2011/04/29 08:26:25 matt Exp");
#include "opt_ddb.h"
@@ -169,7 +169,7 @@ db_stack_trace_print(db_expr_t addr, boo
}
if (lwpaddr) {
- l = (struct lwp *)addr;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Thu Feb 16 10:44:30 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: cache_r4k_subr.S
Log Message:
PTR_DSRL -> PTR_DSLL typo
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/mips/cache_r4k_subr.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/cache_r4k_subr.S
diff -u src/sys/arch/mips/mips/cache_r4k_subr.S:1.1.2.2 src/sys/arch/mips/mips/cache_r4k_subr.S:1.1.2.3
--- src/sys/arch/mips/mips/cache_r4k_subr.S:1.1.2.2 Thu Jan 19 08:28:49 2012
+++ src/sys/arch/mips/mips/cache_r4k_subr.S Thu Feb 16 10:44:30 2012
@@ -37,7 +37,7 @@
#include
-RCSID("$NetBSD: cache_r4k_subr.S,v 1.1.2.2 2012/01/19 08:28:49 matt Exp $")
+RCSID("$NetBSD: cache_r4k_subr.S,v 1.1.2.3 2012/02/16 10:44:30 matt Exp $")
#include
@@ -103,7 +103,7 @@ STATIC_LEAF_NOPROFILE(OPNAME(doop))
beqz t0, 3f# no more to do?
move ra, ta0# restore return address
2:
- PTR_SRL t0, INT_SCALESHIFT # shift to instruction index
+ PTR_SLL t0, INT_SCALESHIFT # shift to instruction index
PTR_ADDU t9, 32 << INT_SCALESHIFT # point to end of table
PTR_SUBU t9, t0# backup N cacheops
jr t9# and do them.
CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/conf
Module Name:src Committed By: matt Date: Wed Feb 15 17:00:54 UTC 2012 Added Files: src/sys/arch/evbmips/conf [matt-nb5-mips64]: XLSATX32.MP Log Message: Add a N32 MP config. To generate a diff of this commit: cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/evbmips/conf/XLSATX32.MP Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Added files: Index: src/sys/arch/evbmips/conf/XLSATX32.MP diff -u /dev/null src/sys/arch/evbmips/conf/XLSATX32.MP:1.1.2.1 --- /dev/null Wed Feb 15 17:00:54 2012 +++ src/sys/arch/evbmips/conf/XLSATX32.MP Wed Feb 15 17:00:54 2012 @@ -0,0 +1,8 @@ +# XLSATX64.MP,v 1.1.2.1 2010/01/24 05:27:47 cliff Exp +# +include "arch/evbmips/conf/XLSATX32" + +options MULTIPROCESSOR +options LOCKDEBUG + +pseudo-device lockstat
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Tue Feb 14 01:51:12 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: locore.h
src/sys/arch/mips/mips [matt-nb5-mips64]: mem.c mips_machdep.c pmap.c
vm_machdep.c
Log Message:
Fix various LP64 thinkos.
To generate a diff of this commit:
cvs rdiff -u -r1.78.36.1.2.34 -r1.78.36.1.2.35 \
src/sys/arch/mips/include/locore.h
cvs rdiff -u -r1.35.38.11 -r1.35.38.12 src/sys/arch/mips/mips/mem.c
cvs rdiff -u -r1.205.4.1.2.1.2.65 -r1.205.4.1.2.1.2.66 \
src/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -u -r1.179.16.41 -r1.179.16.42 src/sys/arch/mips/mips/pmap.c
cvs rdiff -u -r1.121.6.1.2.27 -r1.121.6.1.2.28 \
src/sys/arch/mips/mips/vm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/locore.h
diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.34 src/sys/arch/mips/include/locore.h:1.78.36.1.2.35
--- src/sys/arch/mips/include/locore.h:1.78.36.1.2.34 Mon Feb 13 18:20:25 2012
+++ src/sys/arch/mips/include/locore.h Tue Feb 14 01:51:11 2012
@@ -424,12 +424,12 @@ paddr_t kvtophys(vaddr_t);
extern struct phys_ram_seg mem_clusters[];
extern u_int mem_cluster_cnt;
-#ifndef _LP64
/*
* Helper routines for kernel coredumps.
*/
-bool mips_kcore_window_vtophys(vaddr_t, paddr_t *);
vaddr_t mips_kcore_window_map(paddr_t, vsize_t *);
+#ifndef _LP64
+bool mips_kcore_window_vtophys(vaddr_t, paddr_t *);
#endif
Index: src/sys/arch/mips/mips/mem.c
diff -u src/sys/arch/mips/mips/mem.c:1.35.38.11 src/sys/arch/mips/mips/mem.c:1.35.38.12
--- src/sys/arch/mips/mips/mem.c:1.35.38.11 Mon Feb 13 18:20:25 2012
+++ src/sys/arch/mips/mips/mem.c Tue Feb 14 01:51:11 2012
@@ -133,10 +133,10 @@ mmrw(dev_t dev, struct uio *uio, int fla
if (c > vs)
c = vs;
if (pa > mips_avail_end
-+ mips_round_page(MSGBUFSIZE) - c)) {
++ mips_round_page(MSGBUFSIZE) - c)
return (EFAULT);
} else if (MIPS_XKSEG_P(va)
- && v < MIPS_KSEG0_START
+ && va < MIPS_KSEG0_START
&& !uvm_kernacc((void *)va, c,
uio->uio_rw == UIO_READ ? B_READ : B_WRITE)) {
return (EFAULT);
Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.65 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.66
--- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.65 Mon Feb 13 18:20:25 2012
+++ src/sys/arch/mips/mips/mips_machdep.c Tue Feb 14 01:51:11 2012
@@ -2052,7 +2052,7 @@ dumpsys(void)
delay(500); /* 5 seconds */
}
-#ifdef MIPS3_PLUS
+#if defined(MIPS3_PLUS) && !defined(_LP64)
static struct mips_kcore_window_info {
struct tlbmask mkwi_tlb;
int mkwi_tlb_slot;
@@ -2063,12 +2063,10 @@ static struct mips_kcore_window_info {
},
.mkwi_tlb_slot = -1,
};
-#endif
bool
mips_kcore_window_vtophys(vaddr_t va, paddr_t *pap)
{
-#ifdef MIPS3_PLUS
struct mips_kcore_window_info * const mkwi = &mips_kcore_window_info;
const vaddr_t tlb_va = mkwi->mkwi_tlb.tlb_hi & -PAGE_SIZE;
psize_t tlb_size = MIPS3_PG_SIZE_MASK_TO_SIZE(mkwi->mkwi_tlb.tlb_mask);
@@ -2078,9 +2076,9 @@ mips_kcore_window_vtophys(vaddr_t va, pa
+ mips_tlbpfn_to_paddr(mkwi->mkwi_tlb.tlb_lo0);
return true;
}
-#endif
return false;
}
+#endif
vaddr_t
mips_kcore_window_map(paddr_t pa, vsize_t *vsp)
@@ -2553,7 +2551,7 @@ mm_md_direct_mapped_phys(paddr_t pa, vad
if (vap != NULL)
*vap = MIPS_PHYS_TO_XKPHYS_CACHED(pa);
if (vsp != NULL)
- *vsp = MIPS_XKPHYS_TO_PHYS(MIPS_XKPHYS_MASK) - pa + 1;
+ *vsp = MIPS_XKPHYS_TO_PHYS(MIPS_XSEG_MASK) - pa + 1;
return true;
#else
#ifdef ENABLE_MIPS_KSEGX
@@ -2585,7 +2583,7 @@ mm_md_direct_mapped_virt(vaddr_t va, pad
if (pap != NULL)
*pap = pa;
if (vsp != NULL)
- *vsp = MIPS_XKPHYS_TO_PHYS(MIPS_XKPHYS_MASK) - pa + 1;
+ *vsp = MIPS_XKPHYS_TO_PHYS(MIPS_XSEG_MASK) - pa + 1;
return true;
}
#endif
Index: src/sys/arch/mips/mips/pmap.c
diff -u src/sys/arch/mips/mips/pmap.c:1.179.16.41 src/sys/arch/mips/mips/pmap.c:1.179.16.42
--- src/sys/arch/mips/mips/pmap.c:1.179.16.41 Mon Feb 13 18:20:26 2012
+++ src/sys/arch/mips/mips/pmap.c Tue Feb 14 01:51:11 2012
@@ -367,6 +367,10 @@ pmap_map_ephemeral_page(struct vm_page *
vaddr_t va;
if (!mm_md_direct_mapped_phys(pa, &va, NULL)) {
+#ifdef _LP64
+ panic("%s: direct_mapped_phys failed for pa %#"PRIxPADDR,
+ __func__, pa);
+#else
KASSERT(pmap_initialized);
/*
* Make sure to use a congruent mapping to the last mapped
@@ -379,6 +383,7 @@ pmap_map_ephemeral_page(struct vm_page *
+ mips_cache_indexof(MIPS_CACHE_VIRTUAL_ALIAS ? pv->pv_va : pa);
*old_pt_entry_p = *kvtopte(va);
pmap_kenter_pa(va, pa, prot);
+#endif
}
if (MIPS_CACHE_VIRTUAL_ALIAS) {
/*
Index: src/sys/arch/mips/mips/vm_machdep.c
diff -u src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1.2.27 src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1.2.28
CVS commit: [matt-nb5-mips64] src/sys/arch
Module Name:src Committed By: matt Date: Tue Feb 14 01:25:53 UTC 2012 Modified Files: src/sys/arch/algor/algor [matt-nb5-mips64]: machdep.c src/sys/arch/arc/arc [matt-nb5-mips64]: machdep.c src/sys/arch/cobalt/cobalt [matt-nb5-mips64]: machdep.c src/sys/arch/evbmips/adm5120 [matt-nb5-mips64]: machdep.c src/sys/arch/evbmips/alchemy [matt-nb5-mips64]: machdep.c src/sys/arch/evbmips/atheros [matt-nb5-mips64]: machdep.c src/sys/arch/evbmips/malta [matt-nb5-mips64]: machdep.c src/sys/arch/evbmips/rasoc [matt-nb5-mips64]: machdep.c src/sys/arch/ews4800mips/ews4800mips [matt-nb5-mips64]: machdep.c src/sys/arch/hpcmips/hpcmips [matt-nb5-mips64]: machdep.c src/sys/arch/mipsco/mipsco [matt-nb5-mips64]: machdep.c src/sys/arch/newsmips/newsmips [matt-nb5-mips64]: machdep.c src/sys/arch/playstation2/playstation2 [matt-nb5-mips64]: machdep.c src/sys/arch/pmax/pmax [matt-nb5-mips64]: machdep.c src/sys/arch/sbmips/sbmips [matt-nb5-mips64]: machdep.c src/sys/arch/sgimips/sgimips [matt-nb5-mips64]: machdep.c Log Message: mem_cluster_cnt on mips is now a u_int. To generate a diff of this commit: cvs rdiff -u -r1.38.10.7 -r1.38.10.8 src/sys/arch/algor/algor/machdep.c cvs rdiff -u -r1.112.10.4 -r1.112.10.5 src/sys/arch/arc/arc/machdep.c cvs rdiff -u -r1.98.10.5 -r1.98.10.6 src/sys/arch/cobalt/cobalt/machdep.c cvs rdiff -u -r1.6.10.6 -r1.6.10.7 src/sys/arch/evbmips/adm5120/machdep.c cvs rdiff -u -r1.37.10.6 -r1.37.10.7 src/sys/arch/evbmips/alchemy/machdep.c cvs rdiff -u -r1.13.10.7 -r1.13.10.8 src/sys/arch/evbmips/atheros/machdep.c cvs rdiff -u -r1.28.10.9 -r1.28.10.10 src/sys/arch/evbmips/malta/machdep.c cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/evbmips/rasoc/machdep.c cvs rdiff -u -r1.14.10.4 -r1.14.10.5 \ src/sys/arch/ews4800mips/ews4800mips/machdep.c cvs rdiff -u -r1.96.10.6 -r1.96.10.7 src/sys/arch/hpcmips/hpcmips/machdep.c cvs rdiff -u -r1.58.10.4 -r1.58.10.5 src/sys/arch/mipsco/mipsco/machdep.c cvs rdiff -u -r1.98.10.6 -r1.98.10.7 src/sys/arch/newsmips/newsmips/machdep.c cvs rdiff -u -r1.23.10.2 -r1.23.10.3 \ src/sys/arch/playstation2/playstation2/machdep.c cvs rdiff -u -r1.223.8.1.2.10 -r1.223.8.1.2.11 \ src/sys/arch/pmax/pmax/machdep.c cvs rdiff -u -r1.38.10.10 -r1.38.10.11 src/sys/arch/sbmips/sbmips/machdep.c cvs rdiff -u -r1.121.8.6 -r1.121.8.7 src/sys/arch/sgimips/sgimips/machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/algor/algor/machdep.c diff -u src/sys/arch/algor/algor/machdep.c:1.38.10.7 src/sys/arch/algor/algor/machdep.c:1.38.10.8 --- src/sys/arch/algor/algor/machdep.c:1.38.10.7 Sun Mar 21 17:38:32 2010 +++ src/sys/arch/algor/algor/machdep.c Tue Feb 14 01:25:50 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: machdep.c,v 1.38.10.7 2010/03/21 17:38:32 cliff Exp $ */ +/* machdep.c,v 1.38.10.7 2010/03/21 17:38:32 cliff Exp */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -106,7 +106,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.38.10.7 2010/03/21 17:38:32 cliff Exp $"); +__KERNEL_RCSID(0, "machdep.c,v 1.38.10.7 2010/03/21 17:38:32 cliff Exp"); #include "opt_algor_p4032.h" #include "opt_algor_p5064.h" @@ -195,7 +195,7 @@ struct vm_map *phys_map = NULL; int physmem; /* # pages of physical memory */ int maxmem; /* max memory per process */ -int mem_cluster_cnt; +u_int mem_cluster_cnt; phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; char algor_ethaddr[ETHER_ADDR_LEN]; Index: src/sys/arch/arc/arc/machdep.c diff -u src/sys/arch/arc/arc/machdep.c:1.112.10.4 src/sys/arch/arc/arc/machdep.c:1.112.10.5 --- src/sys/arch/arc/arc/machdep.c:1.112.10.4 Sun Mar 21 17:38:33 2010 +++ src/sys/arch/arc/arc/machdep.c Tue Feb 14 01:25:50 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: machdep.c,v 1.112.10.4 2010/03/21 17:38:33 cliff Exp $ */ +/* machdep.c,v 1.112.10.4 2010/03/21 17:38:33 cliff Exp */ /* $OpenBSD: machdep.c,v 1.36 1999/05/22 21:22:19 weingart Exp $ */ /* @@ -78,7 +78,7 @@ /* from: Utah Hdr: machdep.c 1.63 91/04/24 */ #include -__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.112.10.4 2010/03/21 17:38:33 cliff Exp $"); +__KERNEL_RCSID(0, "machdep.c,v 1.112.10.4 2010/03/21 17:38:33 cliff Exp"); #include "fs_mfs.h" #include "opt_ddb.h" @@ -198,7 +198,7 @@ char **environment; /* On some arches, int mem_reserved[VM_PHYSSEG_MAX]; /* the cluster is reserved, i.e. not free */ phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; -int mem_cluster_cnt; +u_int mem_cluster_cnt; /* initialize bss, etc. from kernel start, before main() is called. */ void mach_init(int, char *[], u_int, void *); Index: src/sys/arch/cobalt/cobalt/machdep.c diff -u src/sys/arch/cobalt/cobalt/machdep.c:1.98.10.5 src/sys/arch/cobalt/cobalt/machdep.c:1.98.10.6 --- src/sys/arch/cobalt/cobalt/machdep.c:1.98.10.5 Fri Dec 24 07:52:01 2010 +++ src/sys/arch/cobalt
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Mon Feb 13 18:20:26 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h locore.h
src/sys/arch/mips/mips [matt-nb5-mips64]: bus_dma.c mem.c
mips_machdep.c pmap.c pmap_segtab.c vm_machdep.c
Log Message:
Add mm_md_direct_mapped_virt (inverse of mm_md_direct_mapped_phys). Add a
third argument, vsize_t *, which, if not NULL, returns the amount of virtual
space left in that direct mapped segment.
Get rid most of the individual direct_mapped assert and use the above
routines instead.
Improve kernel core dump code.
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.42 -r1.90.16.43 src/sys/arch/mips/include/cpu.h
cvs rdiff -u -r1.78.36.1.2.33 -r1.78.36.1.2.34 \
src/sys/arch/mips/include/locore.h
cvs rdiff -u -r1.22.16.21 -r1.22.16.22 src/sys/arch/mips/mips/bus_dma.c
cvs rdiff -u -r1.35.38.10 -r1.35.38.11 src/sys/arch/mips/mips/mem.c
cvs rdiff -u -r1.205.4.1.2.1.2.64 -r1.205.4.1.2.1.2.65 \
src/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -u -r1.179.16.40 -r1.179.16.41 src/sys/arch/mips/mips/pmap.c
cvs rdiff -u -r1.1.2.13 -r1.1.2.14 src/sys/arch/mips/mips/pmap_segtab.c
cvs rdiff -u -r1.121.6.1.2.26 -r1.121.6.1.2.27 \
src/sys/arch/mips/mips/vm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.42 src/sys/arch/mips/include/cpu.h:1.90.16.43
--- src/sys/arch/mips/include/cpu.h:1.90.16.42 Mon Feb 13 08:13:41 2012
+++ src/sys/arch/mips/include/cpu.h Mon Feb 13 18:20:25 2012
@@ -637,7 +637,8 @@ void fpusave_cpu(struct cpu_info *);
void dumpsys(void);
int savectx(struct pcb *);
void cpu_identify(device_t, const char *);
-bool mm_md_direct_mapped_phys(paddr_t, vaddr_t *);
+bool mm_md_direct_mapped_phys(paddr_t, vaddr_t *, vsize_t *);
+bool mm_md_direct_mapped_virt(vaddr_t, paddr_t *, vsize_t *);
/* locore*.S */
int badaddr(void *, size_t);
Index: src/sys/arch/mips/include/locore.h
diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.33 src/sys/arch/mips/include/locore.h:1.78.36.1.2.34
--- src/sys/arch/mips/include/locore.h:1.78.36.1.2.33 Mon Feb 13 08:13:41 2012
+++ src/sys/arch/mips/include/locore.h Mon Feb 13 18:20:25 2012
@@ -32,6 +32,8 @@
#include "opt_cputype.h"
#endif
+#include
+
#include
#include
#include
@@ -417,6 +419,19 @@ void mips_page_physload(vaddr_t, vaddr_t
const struct phys_ram_seg *, size_t,
const struct mips_vmfreelist *, size_t);
+paddr_t kvtophys(vaddr_t);
+
+extern struct phys_ram_seg mem_clusters[];
+extern u_int mem_cluster_cnt;
+
+#ifndef _LP64
+/*
+ * Helper routines for kernel coredumps.
+ */
+bool mips_kcore_window_vtophys(vaddr_t, paddr_t *);
+vaddr_t mips_kcore_window_map(paddr_t, vsize_t *);
+#endif
+
/*
* CPU identification, from PRID register.
Index: src/sys/arch/mips/mips/bus_dma.c
diff -u src/sys/arch/mips/mips/bus_dma.c:1.22.16.21 src/sys/arch/mips/mips/bus_dma.c:1.22.16.22
--- src/sys/arch/mips/mips/bus_dma.c:1.22.16.21 Tue Dec 6 17:37:55 2011
+++ src/sys/arch/mips/mips/bus_dma.c Mon Feb 13 18:20:25 2012
@@ -1009,18 +1009,22 @@ _bus_dmamem_map(bus_dma_tag_t t, bus_dma
return 0;
}
#else
- if ((nsegs == 1) && (segs[0].ds_addr < MIPS_PHYS_MASK)) {
- if (((mips_options.mips_cpu_flags & CPU_MIPS_D_CACHE_COHERENT) == 0)
- && (flags & BUS_DMA_COHERENT))
+ if (nsegs == 1) {
+ vsize_t vs;
+ if (!(mips_options.mips_cpu_flags & CPU_MIPS_D_CACHE_COHERENT)
+ && segs[0].ds_addr < MIPS_PHYS_MASK
+ && segs[0].ds_addr + segs[0].ds_len <= MIPS_PHYS_MASK + 1
+ && (flags & BUS_DMA_COHERENT)) {
*kvap = (void *)MIPS_PHYS_TO_KSEG1(segs[0].ds_addr);
-#ifdef ENABLE_MIPS_KSEGX
- else if (mips_ksegx_start < segs[0].ds_addr
- && segs[0].ds_addr < mips_ksegx_start + VM_KSEGX_SIZE)
- *kvap = (void *)(vaddr_t)(VM_KSEGX_ADDRESS + segs[0].ds_addr);
-#endif
- else
- *kvap = (void *)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
- return (0);
+ return (0);
+ }
+ if (((mips_options.mips_cpu_flags & CPU_MIPS_D_CACHE_COHERENT)
+ || (flags & BUS_DMA_COHERENT) == 0)
+ && mm_md_direct_mapped_phys(segs[0].ds_addr, &va, &vs)
+ && segs[0].ds_len <= vs) {
+ *kvap = (void *)va;
+ return (0);
+ }
}
#endif /* _LP64 */
@@ -1068,17 +1072,9 @@ _bus_dmamem_unmap(bus_dma_tag_t t, void
* Nothing to do if we mapped it with KSEG0 or KSEG1 (i.e.
* not in KSEG2 or XKSEG).
*/
- if (MIPS_KSEG0_P(kva) || MIPS_KSEG1_P(kva))
- return;
-#ifdef ENABLE_MIPS_KSEGX
- if (VM_KSEGX_ADDRESS <= (vaddr_t)kva
- && (vaddr_t)kva < VM_KSEGX_ADDRESS + VM_KSEGX_SIZE)
+ if (mm_md_direct_mapped_virt((vaddr_t)kva, NULL, NULL)
+ || MIPS_KSEG1_P(kva))
return;
-#endif
-#ifdef _LP64
- if (MIPS_XKPHYS_P((vaddr_t)kva))
- return;
-#endif
size = round_page(size);
pmap_remove(pmap_kernel(), (vaddr_t)kva, (vaddr_t)kva + size);
Index: src/sys/arch
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Mon Feb 13 08:13:42 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h locore.h
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_emul.c mips_machdep.c
trap.c
Log Message:
Fix emulation to not panic when it encounters something it doesn't like.
(so running crashme won't crash the system).
Centralize the trapsignal processing so we can print out the trap info if
so desired.
Add a machdep.printfataltraps sysctl knob.
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.41 -r1.90.16.42 src/sys/arch/mips/include/cpu.h
cvs rdiff -u -r1.78.36.1.2.32 -r1.78.36.1.2.33 \
src/sys/arch/mips/include/locore.h
cvs rdiff -u -r1.14.78.13 -r1.14.78.14 src/sys/arch/mips/mips/mips_emul.c
cvs rdiff -u -r1.205.4.1.2.1.2.63 -r1.205.4.1.2.1.2.64 \
src/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -u -r1.217.12.41 -r1.217.12.42 src/sys/arch/mips/mips/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.41 src/sys/arch/mips/include/cpu.h:1.90.16.42
--- src/sys/arch/mips/include/cpu.h:1.90.16.41 Sat Jan 28 00:56:34 2012
+++ src/sys/arch/mips/include/cpu.h Mon Feb 13 08:13:41 2012
@@ -163,6 +163,7 @@ struct cpu_info {
#define CPU_BOOTED_KERNEL 2 /* string: booted kernel name */
#define CPU_ROOT_DEVICE 3 /* string: root device name */
#define CPU_LLSC 4 /* OS/CPU supports LL/SC instruction */
+#define CPU_PRINTFATALTRAPS 5 /* bool: print fatal traps */
/*
* Platform can override, but note this breaks userland compatibility
Index: src/sys/arch/mips/include/locore.h
diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.32 src/sys/arch/mips/include/locore.h:1.78.36.1.2.33
--- src/sys/arch/mips/include/locore.h:1.78.36.1.2.32 Thu Feb 9 20:01:21 2012
+++ src/sys/arch/mips/include/locore.h Mon Feb 13 08:13:41 2012
@@ -42,6 +42,13 @@ struct trapframe;
void trap(uint32_t, uint32_t, vaddr_t, vaddr_t, struct trapframe *);
void ast(void);
+/*
+ * Perform a trapsignal, and if cpu_printfataltraps is true, print the trap info
+ * to the console.
+ */
+extern bool cpu_printfataltraps;
+void cpu_trapsignal(struct lwp *, ksiginfo_t *, struct trapframe *);
+
void mips_fpu_trap(vaddr_t, struct trapframe *);
void mips_fpu_intr(vaddr_t, struct trapframe *);
Index: src/sys/arch/mips/mips/mips_emul.c
diff -u src/sys/arch/mips/mips/mips_emul.c:1.14.78.13 src/sys/arch/mips/mips/mips_emul.c:1.14.78.14
--- src/sys/arch/mips/mips/mips_emul.c:1.14.78.13 Fri Apr 29 08:26:28 2011
+++ src/sys/arch/mips/mips/mips_emul.c Mon Feb 13 08:13:42 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_emul.c,v 1.14.78.13 2011/04/29 08:26:28 matt Exp $ */
+/* $NetBSD: mips_emul.c,v 1.14.78.14 2012/02/13 08:13:42 matt Exp $ */
/*
* Copyright (c) 1999 Shuichiro URATA. All rights reserved.
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: mips_emul.c,v 1.14.78.13 2011/04/29 08:26:28 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_emul.c,v 1.14.78.14 2012/02/13 08:13:42 matt Exp $");
#include
#include
@@ -43,9 +43,10 @@ __KERNEL_RCSID(0, "$NetBSD: mips_emul.c,
#include /* for VM_MAX_ADDRESS */
#include
-static inline void send_sigsegv(intptr_t, uint32_t, struct trapframe *,
- uint32_t);
-static inline void update_pc(struct trapframe *, uint32_t);
+static void send_sigsegv(intptr_t, uint32_t, struct trapframe *, uint32_t);
+static void send_sigill(intptr_t, uint32_t, struct trapframe *, uint32_t,
+ uint32_t);
+static void update_pc(struct trapframe *, uint32_t);
/*
* MIPS2 LL instruction emulation state
@@ -78,9 +79,11 @@ mips_emul_branch(struct trapframe *tf, v
nextpc = tf->tf_regs[inst.RType.rs];
else if (allowNonBranch)
nextpc = instpc + 4;
- else
- panic("%s: %s instruction %08x at pc 0x%"PRIxVADDR,
- __func__, "non-branch", inst.word, instpc);
+ else {
+ send_sigill(instpc, T_RES_INST, tf,
+ tf->tf_regs[_R_CAUSE], inst.word);
+ nextpc = instpc;
+ }
break;
case OP_BCOND:
@@ -106,8 +109,10 @@ mips_emul_branch(struct trapframe *tf, v
break;
default:
- panic("%s: %s instruction 0x%08x at pc 0x%"PRIxVADDR,
- __func__, "bad branch", inst.word, instpc);
+ send_sigill(instpc, T_RES_INST, tf,
+ tf->tf_regs[_R_CAUSE], inst.word);
+ nextpc = instpc;
+ break;
}
break;
@@ -161,16 +166,22 @@ mips_emul_branch(struct trapframe *tf, v
}
else if (allowNonBranch)
nextpc = instpc + 4;
- else
- panic("%s: %s instruction 0x%08x at pc 0x%"PRIxVADDR,
- __func__, "bad COP1 branch", inst.word, instpc);
+ else {
+ send_sigill(instpc, T_RES_INST, tf,
+ tf->tf_regs[_R_CAUSE], inst.word);
+ nextpc = instpc;
+ }
break;
default:
- if (!allowNonBranch)
- panic("%s: %s instruction 0x%08x at pc 0x%"PRIxVADDR,
- __func__, "non-branch", inst.word,
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Sun Feb 12 07:48:37 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: pmap.c
Log Message:
pmap pv pages can come from KSEGX too.
To generate a diff of this commit:
cvs rdiff -u -r1.179.16.39 -r1.179.16.40 src/sys/arch/mips/mips/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/pmap.c
diff -u src/sys/arch/mips/mips/pmap.c:1.179.16.39 src/sys/arch/mips/mips/pmap.c:1.179.16.40
--- src/sys/arch/mips/mips/pmap.c:1.179.16.39 Fri Feb 10 08:15:58 2012
+++ src/sys/arch/mips/mips/pmap.c Sun Feb 12 07:48:37 2012
@@ -2538,8 +2538,15 @@ pmap_pv_page_free(struct pool *pp, void
KASSERT(MIPS_XKPHYS_P(va));
pa = MIPS_XKPHYS_TO_PHYS(va);
#else
- KASSERT(MIPS_KSEG0_P(va));
- pa = MIPS_KSEG0_TO_PHYS(va);
+#ifdef ENABLE_MIPS_KSEGX
+ if (VM_KSEGX_ADDRESS <= va && va <= VM_KSEGX_ADDRESS + VM_KSEGX_SIZE) {
+ pa = mips_ksegx_start + va - VM_KSEGX_ADDRESS;
+ } else
+#endif
+ {
+ KASSERT(MIPS_KSEG0_P(va));
+ pa = MIPS_KSEG0_TO_PHYS(va);
+ }
#endif
#ifdef MIPS3_PLUS
if (MIPS_CACHE_VIRTUAL_ALIAS)
CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/conf
Module Name:src Committed By: matt Date: Fri Feb 10 08:54:19 UTC 2012 Modified Files: src/sys/arch/evbmips/conf [matt-nb5-mips64]: XLPEVB Log Message: Bump SYMTAB_SPACE. To generate a diff of this commit: cvs rdiff -u -r1.1.2.6 -r1.1.2.7 src/sys/arch/evbmips/conf/XLPEVB Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/evbmips/conf/XLPEVB diff -u src/sys/arch/evbmips/conf/XLPEVB:1.1.2.6 src/sys/arch/evbmips/conf/XLPEVB:1.1.2.7 --- src/sys/arch/evbmips/conf/XLPEVB:1.1.2.6 Thu Jan 19 17:42:26 2012 +++ src/sys/arch/evbmips/conf/XLPEVB Fri Feb 10 08:54:18 2012 @@ -1,8 +1,8 @@ -# $NetBSD: XLPEVB,v 1.1.2.6 2012/01/19 17:42:26 matt Exp $ +# $NetBSD: XLPEVB,v 1.1.2.7 2012/02/10 08:54:18 matt Exp $ include "arch/evbmips/conf/std.rmixlp" -#ident "XLSATX-$Revision: 1.1.2.6 $" +#ident "XLSATX-$Revision: 1.1.2.7 $" #options INCLUDE_CONFIG_FILE # embed config file in kernel binary @@ -41,7 +41,7 @@ options USERCONF # userconf(4) support options DDB # kernel dynamic debugger options DDB_HISTORY_SIZE=100 # enable history editing in DDB makeoptions DEBUG="-g" # compile full symbol table -options SYMTAB_SPACE=50 # size for embedded symbol table +options SYMTAB_SPACE=51 # size for embedded symbol table #options DDB_COMMANDONENTER="trace;show registers" options DB_MAX_LINE=-1
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Fri Feb 10 08:15:58 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: pmap.c
Log Message:
Fix typo.
To generate a diff of this commit:
cvs rdiff -u -r1.179.16.38 -r1.179.16.39 src/sys/arch/mips/mips/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/pmap.c
diff -u src/sys/arch/mips/mips/pmap.c:1.179.16.38 src/sys/arch/mips/mips/pmap.c:1.179.16.39
--- src/sys/arch/mips/mips/pmap.c:1.179.16.38 Fri Feb 10 07:19:44 2012
+++ src/sys/arch/mips/mips/pmap.c Fri Feb 10 08:15:58 2012
@@ -1840,7 +1840,7 @@ pmap_extract(pmap_t pmap, vaddr_t va, pa
}
#elif defined(ENABLE_MIPS_KSEGX)
if (VM_KSEGX_ADDRESS <= va
- && va < VM_KSEGX_ADDRESS + VM_KSEGX_SIZE)
+ && va < VM_KSEGX_ADDRESS + VM_KSEGX_SIZE) {
pa = mips_ksegx_start + va - VM_KSEGX_ADDRESS;
goto done;
}
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Fri Feb 10 07:19:44 UTC 2012 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: pmap.c Log Message: Teach pmap_extract about KSEGX. To generate a diff of this commit: cvs rdiff -u -r1.179.16.37 -r1.179.16.38 src/sys/arch/mips/mips/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/pmap.c diff -u src/sys/arch/mips/mips/pmap.c:1.179.16.37 src/sys/arch/mips/mips/pmap.c:1.179.16.38 --- src/sys/arch/mips/mips/pmap.c:1.179.16.37 Fri Feb 10 07:14:49 2012 +++ src/sys/arch/mips/mips/pmap.c Fri Feb 10 07:19:44 2012 @@ -1838,6 +1838,12 @@ pmap_extract(pmap_t pmap, vaddr_t va, pa pa = MIPS_XKPHYS_TO_PHYS(va); goto done; } +#elif defined(ENABLE_MIPS_KSEGX) + if (VM_KSEGX_ADDRESS <= va + && va < VM_KSEGX_ADDRESS + VM_KSEGX_SIZE) + pa = mips_ksegx_start + va - VM_KSEGX_ADDRESS; + goto done; + } #endif #ifdef DIAGNOSTIC if (MIPS_KSEG1_P(va))
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Fri Feb 10 07:14:49 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: pmap.c pmap_segtab.c
Log Message:
Don't double claim a kmem page.
To generate a diff of this commit:
cvs rdiff -u -r1.179.16.36 -r1.179.16.37 src/sys/arch/mips/mips/pmap.c
cvs rdiff -u -r1.1.2.12 -r1.1.2.13 src/sys/arch/mips/mips/pmap_segtab.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/pmap.c
diff -u src/sys/arch/mips/mips/pmap.c:1.179.16.36 src/sys/arch/mips/mips/pmap.c:1.179.16.37
--- src/sys/arch/mips/mips/pmap.c:1.179.16.36 Thu Feb 9 03:14:45 2012
+++ src/sys/arch/mips/mips/pmap.c Fri Feb 10 07:14:49 2012
@@ -2513,6 +2513,7 @@ pmap_pv_page_alloc(struct pool *pp, int
if (pg == NULL)
return NULL;
+ uvm_km_pageclaim(pg);
return (void *)mips_pmap_map_poolpage(VM_PAGE_TO_PHYS(pg));
}
@@ -2607,9 +2608,6 @@ mips_pmap_alloc_poolpage(int flags)
} else {
pg = uvm_pagealloc(NULL, 0, NULL, flags);
}
- if (pg != NULL) {
- uvm_km_pageclaim(pg);
- }
return pg;
}
Index: src/sys/arch/mips/mips/pmap_segtab.c
diff -u src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.12 src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.13
--- src/sys/arch/mips/mips/pmap_segtab.c:1.1.2.12 Thu Feb 9 03:14:45 2012
+++ src/sys/arch/mips/mips/pmap_segtab.c Fri Feb 10 07:14:49 2012
@@ -149,7 +149,13 @@ uint32_t npage_segtab;
static inline struct vm_page *
pmap_pte_pagealloc(void)
{
- return mips_pmap_alloc_poolpage(UVM_PGA_ZERO|UVM_PGA_USERESERVE);
+ struct vm_page *pg;
+
+ pg = PMAP_ALLOC_POOLPAGE(UVM_PGA_ZERO|UVM_PGA_USERESERVE);
+ if (pg)
+ uvm_km_pageclaim(pg);
+
+ return pg;
}
static inline pt_entry_t *
CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/conf
Module Name:src Committed By: matt Date: Fri Feb 10 06:00:15 UTC 2012 Modified Files: src/sys/arch/evbmips/conf [matt-nb5-mips64]: MALTA MALTA32 MALTA64 Log Message: O32 MALTA uses FPU, N32/N64 MALTA does not. To generate a diff of this commit: cvs rdiff -u -r1.48.8.4 -r1.48.8.5 src/sys/arch/evbmips/conf/MALTA cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/evbmips/conf/MALTA32 cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/evbmips/conf/MALTA64 Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/evbmips/conf/MALTA diff -u src/sys/arch/evbmips/conf/MALTA:1.48.8.4 src/sys/arch/evbmips/conf/MALTA:1.48.8.5 --- src/sys/arch/evbmips/conf/MALTA:1.48.8.4 Fri May 20 16:38:25 2011 +++ src/sys/arch/evbmips/conf/MALTA Fri Feb 10 06:00:15 2012 @@ -10,7 +10,7 @@ maxusers 32 options MIPS32 options MIPS64 -options NOFPU # No FPU +#options NOFPU # No FPU #options FPEMUL # emulate FPU insn # Options for necessary to use MD Index: src/sys/arch/evbmips/conf/MALTA32 diff -u src/sys/arch/evbmips/conf/MALTA32:1.1.2.3 src/sys/arch/evbmips/conf/MALTA32:1.1.2.4 --- src/sys/arch/evbmips/conf/MALTA32:1.1.2.3 Thu Feb 9 03:12:09 2012 +++ src/sys/arch/evbmips/conf/MALTA32 Fri Feb 10 06:00:15 2012 @@ -5,5 +5,6 @@ include "arch/evbmips/conf/MALTA" makeoptions LP64="no" no options MIPS32 +options NOFPU no ath* Index: src/sys/arch/evbmips/conf/MALTA64 diff -u src/sys/arch/evbmips/conf/MALTA64:1.1.2.4 src/sys/arch/evbmips/conf/MALTA64:1.1.2.5 --- src/sys/arch/evbmips/conf/MALTA64:1.1.2.4 Fri Jan 29 00:16:58 2010 +++ src/sys/arch/evbmips/conf/MALTA64 Fri Feb 10 06:00:15 2012 @@ -1,10 +1,11 @@ -# $NetBSD: MALTA64,v 1.1.2.4 2010/01/29 00:16:58 matt Exp $ +# MALTA64,v 1.1.2.4 2010/01/29 00:16:58 matt Exp # include "arch/evbmips/conf/MALTA" makeoptions LP64="yes" no options MIPS32 +options NOFPU options EXEC_ELF64 options COMPAT_NETBSD32 no options SYMTAB_SPACE
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src Committed By: matt Date: Fri Feb 10 00:02:55 UTC 2012 Modified Files: src/sys/arch/mips/mips [matt-nb5-mips64]: locore_mips3.S Log Message: Fix comment. To generate a diff of this commit: cvs rdiff -u -r1.93.38.15 -r1.93.38.16 src/sys/arch/mips/mips/locore_mips3.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/mips/locore_mips3.S diff -u src/sys/arch/mips/mips/locore_mips3.S:1.93.38.15 src/sys/arch/mips/mips/locore_mips3.S:1.93.38.16 --- src/sys/arch/mips/mips/locore_mips3.S:1.93.38.15 Thu Jan 19 08:28:49 2012 +++ src/sys/arch/mips/mips/locore_mips3.S Fri Feb 10 00:02:55 2012 @@ -534,7 +534,7 @@ END(mipsNN_cp0_watchhi_write) #if (MIPS32R2 + MIPS64R2 + MIPS64R2_RMIXL) > 0 /* * void mipsNN_cp0_userlocal_write(void *); - * Set the value of the CP0 USERLOCAL (TLB_CONTEXT, select 2) register. + * Set the value of the CP0 HWRENA register. */ LEAF(mipsNN_cp0_hwrena_write) j ra
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Thu Feb 9 20:01:21 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: locore.h
src/sys/arch/mips/mips [matt-nb5-mips64]: locore.S locore_mips1.S
mipsX_subr.S mips_fixup.c
Log Message:
Update mips_fixup.c to version from -HEAD.
Move cpu_switchto to locore jumpvec and create a stub for it.
To generate a diff of this commit:
cvs rdiff -u -r1.78.36.1.2.31 -r1.78.36.1.2.32 \
src/sys/arch/mips/include/locore.h
cvs rdiff -u -r1.167.38.24 -r1.167.38.25 src/sys/arch/mips/mips/locore.S
cvs rdiff -u -r1.64.26.1.2.14 -r1.64.26.1.2.15 \
src/sys/arch/mips/mips/locore_mips1.S
cvs rdiff -u -r1.26.36.1.2.54 -r1.26.36.1.2.55 \
src/sys/arch/mips/mips/mipsX_subr.S
cvs rdiff -u -r1.1.2.12 -r1.1.2.13 src/sys/arch/mips/mips/mips_fixup.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/locore.h
diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.31 src/sys/arch/mips/include/locore.h:1.78.36.1.2.32
--- src/sys/arch/mips/include/locore.h:1.78.36.1.2.31 Fri Dec 23 08:09:08 2011
+++ src/sys/arch/mips/include/locore.h Thu Feb 9 20:01:21 2012
@@ -111,6 +111,8 @@ struct mips_jump_fixup_info {
void fixup_splcalls(void);/* splstubs.c */
bool mips_fixup_exceptions(mips_fixup_callback_t);
bool mips_fixup_zero_relative(int32_t, uint32_t [2]);
+intptr_t
+ mips_fixup_addr(const uint32_t *);
void mips_fixup_stubs(uint32_t *, uint32_t *);
/*
@@ -348,6 +350,7 @@ typedef struct {
void (*ljv_tlb_enter)(size_t, vaddr_t, uint32_t);
void (*ljv_tlb_read_indexed)(size_t, struct tlbmask *);
void (*ljv_tlb_write_indexed)(size_t, const struct tlbmask *);
+ lwp_t * (*ljv_cpu_switchto)(lwp_t *, lwp_t *, bool);
} mips_locore_jumpvec_t;
typedef struct {
Index: src/sys/arch/mips/mips/locore.S
diff -u src/sys/arch/mips/mips/locore.S:1.167.38.24 src/sys/arch/mips/mips/locore.S:1.167.38.25
--- src/sys/arch/mips/mips/locore.S:1.167.38.24 Thu Jan 19 08:28:49 2012
+++ src/sys/arch/mips/mips/locore.S Thu Feb 9 20:01:21 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.167.38.24 2012/01/19 08:28:49 matt Exp $ */
+/* locore.S,v 1.167.38.24 2012/01/19 08:28:49 matt Exp */
/*
* Copyright (c) 1992, 1993
@@ -172,17 +172,18 @@ _C_LABEL(kernel_text):
_C_LABEL(verylocore):
/*
- * struct lwp *cpu_switchto(struct lwp *cur, struct lwp *next)
+ * lwp_t *mips_cpu_switchto(lwp_t *cur, lwp_t *next, bool returning)
* Switch to the specified next LWP
* Arguments:
* a0 the current LWP
* a1 the LWP to switch to
+ * a2 returning to a softint LWP
* Returns:
* v0 the LWP we have switched from
*
* called at IPL_SCHED
*/
-NESTED(cpu_switchto, CALLFRAME_SIZ, ra)
+NESTED(mips_cpu_switchto, CALLFRAME_SIZ, ra)
#ifdef PARANOIA
/*
* Make sure we are at IPL_SCHED
@@ -299,7 +300,7 @@ NESTED(cpu_switchto, CALLFRAME_SIZ, ra)
#else
JR_HB_RA
#endif /* PARANOIA */
-END(cpu_switchto)
+END(mips_cpu_switchto)
#ifdef __HAVE_FAST_SOFTINTS
/*
Index: src/sys/arch/mips/mips/locore_mips1.S
diff -u src/sys/arch/mips/mips/locore_mips1.S:1.64.26.1.2.14 src/sys/arch/mips/mips/locore_mips1.S:1.64.26.1.2.15
--- src/sys/arch/mips/mips/locore_mips1.S:1.64.26.1.2.14 Fri Dec 23 23:12:34 2011
+++ src/sys/arch/mips/mips/locore_mips1.S Thu Feb 9 20:01:21 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: locore_mips1.S,v 1.64.26.1.2.14 2011/12/23 23:12:34 matt Exp $ */
+/* locore_mips1.S,v 1.64.26.1.2.14 2011/12/23 23:12:34 matt Exp */
/*
* Copyright (c) 1992, 1993
@@ -1735,6 +1735,7 @@ _C_LABEL(MIPSX(locore_vec)):
PTR_WORD _C_LABEL(MIPSX(tlb_enter))
PTR_WORD _C_LABEL(MIPSX(tlb_read_indexed))
PTR_WORD _C_LABEL(MIPSX(tlb_write_indexed))
+ PTR_WORD _C_LABEL(mips_cpu_switchto)
.globl _C_LABEL(MIPSX(locoresw))
_C_LABEL(MIPSX(locoresw)):
Index: src/sys/arch/mips/mips/mipsX_subr.S
diff -u src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.54 src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.55
--- src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.54 Thu Jan 19 08:28:49 2012
+++ src/sys/arch/mips/mips/mipsX_subr.S Thu Feb 9 20:01:21 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: mipsX_subr.S,v 1.26.36.1.2.54 2012/01/19 08:28:49 matt Exp $ */
+/* $NetBSD: mipsX_subr.S,v 1.26.36.1.2.55 2012/02/09 20:01:21 matt Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -2912,6 +2912,7 @@ _C_LABEL(MIPSX(locore_vec)):
PTR_WORD _C_LABEL(MIPSX(tlb_enter))
PTR_WORD _C_LABEL(MIPSX(tlb_read_indexed))
PTR_WORD _C_LABEL(MIPSX(tlb_write_indexed))
+ PTR_WORD _C_LABEL(mips_cpu_switchto)
.globl _C_LABEL(MIPSX(locoresw))
_C_LABEL(MIPSX(locoresw)):
Index: src/sys/arch/mips/mips/mips_fixup.c
diff -u src/sys/arch/mips/mips/mips_fixup.c:1.1.2.12 src/sys/arch/mips/mips/mips_fixup.c:1.1.2.13
--- src/sys/arch/mips/mips/mips_fixup.c:1.1.2.12 Fri Nov 4 07:47:40 2011
+++ src/sys/arch/mips/mips/mips_fixup.c Thu Feb 9 20:01:21 2012
@@ -1,3 +1,5 @@
+/* $NetBSD: mips_fixup
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Thu Feb 9 03:35:59 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: vm_machdep.c
Log Message:
Recognize KSEGX as FIRST512M (even though it isn't in the 512M it is
conceptually part of it since it's direct-mapped).
To generate a diff of this commit:
cvs rdiff -u -r1.121.6.1.2.25 -r1.121.6.1.2.26 \
src/sys/arch/mips/mips/vm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/vm_machdep.c
diff -u src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1.2.25 src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1.2.26
--- src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1.2.25 Thu Feb 9 03:14:45 2012
+++ src/sys/arch/mips/mips/vm_machdep.c Thu Feb 9 03:35:59 2012
@@ -85,6 +85,12 @@ mips_page_to_pggroup(struct vm_page *pg,
&& (mips_freelist_mask & (1 << VM_FREELIST_FIRST512M))) {
lcv = VM_FREELIST_FIRST512M;
} else
+#ifdef ENABLE_MIPS_KSEGX
+ if (mips_ksegx_start <= pa && pa < mips_ksegx_start + VM_KSEGX_SIZE
+ && (mips_freelist_mask & (1 << VM_FREELIST_FIRST512M))) {
+ lcv = VM_FREELIST_FIRST512M;
+ } else
+#endif
#endif
#ifdef VM_FREELIST_FIRST4G
if (VM_FREELIST_FIRST4G_P(pa)
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Thu Feb 9 03:14:46 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c pmap.c
pmap_segtab.c vm_machdep.c
Log Message:
Add mips_page_to_pggroup which return what pggroup a page belongs to.
Eradicate VM_FREELIST_MAX
When adding pages to the system, track what freelists get pages.
To generate a diff of this commit:
cvs rdiff -u -r1.41.28.25 -r1.41.28.26 src/sys/arch/mips/include/vmparam.h
cvs rdiff -u -r1.205.4.1.2.1.2.62 -r1.205.4.1.2.1.2.63 \
src/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -u -r1.179.16.35 -r1.179.16.36 src/sys/arch/mips/mips/pmap.c
cvs rdiff -u -r1.1.2.11 -r1.1.2.12 src/sys/arch/mips/mips/pmap_segtab.c
cvs rdiff -u -r1.121.6.1.2.24 -r1.121.6.1.2.25 \
src/sys/arch/mips/mips/vm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/vmparam.h
diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.25 src/sys/arch/mips/include/vmparam.h:1.41.28.26
--- src/sys/arch/mips/include/vmparam.h:1.41.28.25 Tue Dec 27 16:09:36 2011
+++ src/sys/arch/mips/include/vmparam.h Thu Feb 9 03:14:45 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: vmparam.h,v 1.41.28.25 2011/12/27 16:09:36 matt Exp $ */
+/* vmparam.h,v 1.41.28.25 2011/12/27 16:09:36 matt Exp */
/*
* Copyright (c) 1988 University of Utah.
@@ -208,9 +208,8 @@
#define VM_PHYSSEG_NOADD /* can add RAM after vm_mem_init */
#ifndef VM_NFREELIST
-#define VM_NFREELIST 16 /* 16 distinct memory segments */
+#define VM_NFREELIST 1 /* 16 distinct memory segments */
#define VM_FREELIST_DEFAULT 0
-#define VM_FREELIST_MAX 1
#endif
#ifdef _KERNEL
@@ -287,4 +286,14 @@ do {\
(md)->pvh_attrs = 0; \
} while (/* CONSTCOND */ 0)
+#define VM_NPGGROUP(colors) (mips_nfreelist * (colors))
+#define VM_PAGE_TO_PGGROUP(pg, ncolors) (mips_page_to_pggroup((pg), (ncolors)))
+
+#ifdef _KERNEL
+extern u_int mips_nfreelist;
+extern uint32_t mips_freelist_mask;
+struct vm_page;
+extern size_t mips_page_to_pggroup(struct vm_page *, size_t);
+#endif
+
#endif /* ! _MIPS_VMPARAM_H_ */
Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.62 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.63
--- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.62 Sat Jan 28 08:05:03 2012
+++ src/sys/arch/mips/mips/mips_machdep.c Thu Feb 9 03:14:45 2012
@@ -2126,6 +2126,8 @@ mips_init_lwp0_uarea(void)
}
int mips_poolpage_vmfreelist = VM_FREELIST_DEFAULT;
+u_int mips_nfreelist;
+uint32_t mips_freelist_mask = 0;
#define HALFGIG ((paddr_t)512 * 1024 * 1024)
#define FOURGIG ((paddr_t)4 * 1024 * 1024 * 1024)
@@ -2144,6 +2146,7 @@ mips_page_physload(vaddr_t vkernstart, v
#ifdef VM_FREELIST_FIRST4G
bool need4g = false;
#endif
+ CTASSERT(VM_NFREELIST <= 32);
/*
* Do a first pass and see what ranges memory we have to deal with.
@@ -2152,7 +2155,9 @@ mips_page_physload(vaddr_t vkernstart, v
#ifdef VM_FREELIST_FIRST4G
if (round_page(segs[i].start + segs[i].size) > FOURGIG) {
need4g = true;
+#ifdef _LP64
mips_poolpage_vmfreelist = VM_FREELIST_FIRST4G;
+#endif
}
#endif
#ifdef VM_FREELIST_FIRST512M
@@ -2279,11 +2284,21 @@ mips_page_physload(vaddr_t vkernstart, v
uvm_page_physload(first, last, first, last, freelist);
/*
+ * Mark that we loaded pages of this freelist type.
+ */
+ mips_freelist_mask |= (1 << freelist);
+
+ /*
* Start where we finished.
*/
segstart = segend;
}
}
+
+ /*
+ * Now to get the number of freelists in use.
+ */
+ mips_nfreelist = popcount32(mips_freelist_mask);
}
/*
Index: src/sys/arch/mips/mips/pmap.c
diff -u src/sys/arch/mips/mips/pmap.c:1.179.16.35 src/sys/arch/mips/mips/pmap.c:1.179.16.36
--- src/sys/arch/mips/mips/pmap.c:1.179.16.35 Fri Dec 23 22:31:30 2011
+++ src/sys/arch/mips/mips/pmap.c Thu Feb 9 03:14:45 2012
@@ -2541,7 +2541,7 @@ pmap_pv_page_free(struct pool *pp, void
struct vm_page * const pg = PHYS_TO_VM_PAGE(pa);
KASSERT(pg != NULL);
pmap_clear_mdpage_attributes(VM_PAGE_TO_MD(pg), PG_MD_POOLPAGE);
- uvm_pagefree(pg);
+ uvm_km_pagefree(pg);
}
pt_entry_t *
@@ -2594,17 +2594,23 @@ pmap_prefer(vaddr_t foff, vaddr_t *vap,
struct vm_page *
mips_pmap_alloc_poolpage(int flags)
{
+ struct vm_page *pg;
/*
* On 32bit kernels, we must make sure that we only allocate pages that
* can be mapped via KSEG0. On 64bit kernels, try to allocated from
* the first 4G. If all memory is in KSEG0/4G, then we can just
* use the default freelist otherwise we must use the pool page list.
*/
- if (mips_poolpage_vmfreelist != VM_FREELIST_DEFAULT)
- return uvm_pagealloc_strat(NULL, 0, NULL, flags,
+ if (mips_poolpage_vmfreelist != VM_FREELIST_DEFAULT) {
+ pg = uvm_pagealloc_strat(NULL, 0, NULL, flags,
UVM_PG
CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/conf
Module Name:src Committed By: matt Date: Thu Feb 9 03:12:09 UTC 2012 Modified Files: src/sys/arch/evbmips/conf [matt-nb5-mips64]: MALTA32 Log Message: Get rid of dead lines. To generate a diff of this commit: cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/evbmips/conf/MALTA32 Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/evbmips/conf/MALTA32 diff -u src/sys/arch/evbmips/conf/MALTA32:1.1.2.2 src/sys/arch/evbmips/conf/MALTA32:1.1.2.3 --- src/sys/arch/evbmips/conf/MALTA32:1.1.2.2 Wed Aug 26 04:47:29 2009 +++ src/sys/arch/evbmips/conf/MALTA32 Thu Feb 9 03:12:09 2012 @@ -1,11 +1,9 @@ -# $NetBSD: MALTA32,v 1.1.2.2 2009/08/26 04:47:29 matt Exp $ +# MALTA32,v 1.1.2.2 2009/08/26 04:47:29 matt Exp # include "arch/evbmips/conf/MALTA" makeoptions LP64="no" no options MIPS32 -#options EXEC_ELF64 no ath* -
CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/include
Module Name:src Committed By: matt Date: Thu Feb 9 03:11:39 UTC 2012 Modified Files: src/sys/arch/evbmips/include [matt-nb5-mips64]: vmparam.h Log Message: VM_FREELIST_MAX is not used by anything. Should be VM_NFREELIST Add macros to test a PA to see if it belonds to a VM_FREELIST_* To generate a diff of this commit: cvs rdiff -u -r1.1.142.5 -r1.1.142.6 src/sys/arch/evbmips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/evbmips/include/vmparam.h diff -u src/sys/arch/evbmips/include/vmparam.h:1.1.142.5 src/sys/arch/evbmips/include/vmparam.h:1.1.142.6 --- src/sys/arch/evbmips/include/vmparam.h:1.1.142.5 Tue Nov 29 07:48:32 2011 +++ src/sys/arch/evbmips/include/vmparam.h Thu Feb 9 03:11:39 2012 @@ -1,19 +1,21 @@ -/* $NetBSD: vmparam.h,v 1.1.142.5 2011/11/29 07:48:32 matt Exp $ */ +/* vmparam.h,v 1.1.142.5 2011/11/29 07:48:32 matt Exp */ #ifndef _EVBMIPS_VMPARAM_H_ #define _EVBMIPS_VMPARAM_H_ #include -#define VM_PHYSSEG_MAX 32 +#define VM_PHYSSEG_MAX 32 -#undef VM_FREELIST_MAX -#define VM_FREELIST_MAX 3 +#undef VM_NFREELIST +#define VM_NFREELIST 3 #if defined(_MIPS_PADDR_T_64BIT) || defined(_LP64) -#define VM_FREELIST_FIRST4G 2 +#define VM_FREELIST_FIRST4G 2 +#define VM_FREELIST_FIRST4G_P(pa) (((pa) >> 32) == 0) #endif #if !defined(_LP64) -#define VM_FREELIST_FIRST512M 1 +#define VM_FREELIST_FIRST512M 1 +#define VM_FREELIST_FIRST512M_P(pa) (((pa) >> 29) == 0) #endif #define VM_FREELIST_NORMALOK_P(lcv) \
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Thu Feb 9 03:10:06 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: trap.c
Log Message:
When printing a stack trace, use +0x# so you can c&p easily into gdb.
To generate a diff of this commit:
cvs rdiff -u -r1.217.12.40 -r1.217.12.41 src/sys/arch/mips/mips/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/trap.c
diff -u src/sys/arch/mips/mips/trap.c:1.217.12.40 src/sys/arch/mips/mips/trap.c:1.217.12.41
--- src/sys/arch/mips/mips/trap.c:1.217.12.40 Thu Jan 19 08:28:50 2012
+++ src/sys/arch/mips/mips/trap.c Thu Feb 9 03:10:05 2012
@@ -1083,7 +1083,7 @@ mips3_eret:
done:
if (mask & (1 << _R_RA))
ra = regs[_R_RA];
- (*printfn)("%#"PRIxVADDR": %s+%"PRIxVADDR" (%"PRIxREGISTER",%"PRIxREGISTER",%"PRIxREGISTER",%"PRIxREGISTER") ra %"PRIxVADDR" sz %d\n",
+ (*printfn)("%#"PRIxVADDR": %s+%#"PRIxVADDR" (%"PRIxREGISTER",%"PRIxREGISTER",%"PRIxREGISTER",%"PRIxREGISTER") ra %"PRIxVADDR" sz %d\n",
sp, fn_name(subr), pc - subr,
regs[_R_A0], regs[_R_A1], regs[_R_A2], regs[_R_A3],
ra, stksize);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Feb 2 23:35:35 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcix.c
Log Message:
We use avail_clusters_cnt now.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.12 -r1.1.2.13 src/sys/arch/mips/rmi/rmixl_pcix.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_pcix.c
diff -u src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.12 src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.13
--- src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.12 Wed Jan 4 16:17:54 2012
+++ src/sys/arch/mips/rmi/rmixl_pcix.c Thu Feb 2 23:35:35 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcix.c,v 1.1.2.12 2012/01/04 16:17:54 matt Exp $ */
+/* rmixl_pcix.c,v 1.1.2.12 2012/01/04 16:17:54 matt Exp */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rmixl_pcix.c,v 1.1.2.12 2012/01/04 16:17:54 matt Exp $");
+__KERNEL_RCSID(0, "rmixl_pcix.c,v 1.1.2.12 2012/01/04 16:17:54 matt Exp");
#include "opt_pci.h"
#include "pci.h"
@@ -331,7 +331,7 @@ rmixl_pcix_attach(device_t parent, devic
* HBAR[0,1] if a 64 bit BAR pair
* must cover all RAM
*/
- extern u_quad_t mem_cluster_maxaddr;
+ extern u_quad_t avail_cluster_maxaddr;
uint64_t hbar_addr;
uint64_t hbar_size;
uint32_t hbar_size_lo, hbar_size_hi;
@@ -348,7 +348,7 @@ rmixl_pcix_attach(device_t parent, devic
hbar_addr |= (uint64_t)hbar_addr_hi << 32;
hbar_size |= (uint64_t)hbar_size_hi << 32;
}
- if ((hbar_addr != 0) || (hbar_size < mem_cluster_maxaddr)) {
+ if ((hbar_addr != 0) || (hbar_size < avail_cluster_maxaddr)) {
int error;
aprint_error_dev(self, "HostBAR0 addr %#x, size %#x\n",
@@ -359,7 +359,7 @@ rmixl_pcix_attach(device_t parent, devic
aprint_error_dev(self, "WARNING: firmware PCI-X setup error: "
"RAM %#"PRIx64"..%#"PRIx64" not accessible by Host BAR, "
"enabling DMA bounce buffers\n",
- hbar_size, mem_cluster_maxaddr-1);
+ hbar_size, avail_cluster_maxaddr-1);
/*
* force use of bouce buffers for inaccessible RAM addrs
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Thu Feb 2 00:21:00 UTC 2012 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_machdep.c Log Message: Fix XLP case where we weren't copying mem_clusters to avail_clusters. To generate a diff of this commit: cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_machdep.c diff -u src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.2 src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.3 --- src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.2 Fri Jan 27 21:23:31 2012 +++ src/sys/arch/mips/rmi/rmixl_machdep.c Thu Feb 2 00:21:00 2012 @@ -1122,6 +1122,8 @@ rmixlp_physaddr_dram_init(struct extent } mem_cluster_cnt = mp - mem_clusters; + avail_cluster_cnt = mem_cluster_cnt; + memcpy(avail_clusters, mem_clusters, sizeof(avail_clusters)); return memsize; } #endif /* MIPS64_XLP */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips
Module Name:src
Committed By: matt
Date: Sat Jan 28 08:05:03 UTC 2012
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c
Log Message:
Fix mm_md_direct_mapped_phys
To generate a diff of this commit:
cvs rdiff -u -r1.205.4.1.2.1.2.61 -r1.205.4.1.2.1.2.62 \
src/sys/arch/mips/mips/mips_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.61 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.62
--- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.61 Sat Jan 28 00:56:34 2012
+++ src/sys/arch/mips/mips/mips_machdep.c Sat Jan 28 08:05:03 2012
@@ -2439,21 +2439,20 @@ bool
mm_md_direct_mapped_phys(paddr_t pa, vaddr_t *vap)
{
#ifdef _LP64
- if (MIPS_XKSEG_P(pa)) {
- *vap = MIPS_PHYS_TO_XKPHYS_CACHED(pa);
- return true;
- }
-#endif
+ *vap = MIPS_PHYS_TO_XKPHYS_CACHED(pa);
+ return true;
+#else
#ifdef ENABLE_MIPS_KSEGX
if (mips_ksegx_start <= pa && pa < mips_ksegx_start + VM_KSEGX_SIZE) {
*vap = VM_KSEGX_ADDRESS + pa - mips_ksegx_start;
return true;
}
#endif
- if (MIPS_KSEG0_P(pa)) {
+ if (pa <= MIPS_PHYS_MASK) {
*vap = MIPS_PHYS_TO_KSEG0(pa);
return true;
}
return false;
+#endif
}
CVS commit: [matt-nb5-mips64] src/sys/arch/mips
Module Name:src
Committed By: matt
Date: Sat Jan 28 00:56:35 UTC 2012
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c
Log Message:
Add mm_md_direct_mapped_phys from current.
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.40 -r1.90.16.41 src/sys/arch/mips/include/cpu.h
cvs rdiff -u -r1.205.4.1.2.1.2.60 -r1.205.4.1.2.1.2.61 \
src/sys/arch/mips/mips/mips_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.40 src/sys/arch/mips/include/cpu.h:1.90.16.41
--- src/sys/arch/mips/include/cpu.h:1.90.16.40 Thu Jan 19 08:28:48 2012
+++ src/sys/arch/mips/include/cpu.h Sat Jan 28 00:56:34 2012
@@ -636,6 +636,7 @@ void fpusave_cpu(struct cpu_info *);
void dumpsys(void);
int savectx(struct pcb *);
void cpu_identify(device_t, const char *);
+bool mm_md_direct_mapped_phys(paddr_t, vaddr_t *);
/* locore*.S */
int badaddr(void *, size_t);
Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.60 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.61
--- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.60 Thu Jan 19 08:28:50 2012
+++ src/sys/arch/mips/mips/mips_machdep.c Sat Jan 28 00:56:34 2012
@@ -2434,3 +2434,26 @@ mips_watchpoint_init(void)
curcpu()->ci_cpuwatch_count = cpuwatch_discover();
}
#endif
+
+bool
+mm_md_direct_mapped_phys(paddr_t pa, vaddr_t *vap)
+{
+#ifdef _LP64
+ if (MIPS_XKSEG_P(pa)) {
+ *vap = MIPS_PHYS_TO_XKPHYS_CACHED(pa);
+ return true;
+ }
+#endif
+#ifdef ENABLE_MIPS_KSEGX
+ if (mips_ksegx_start <= pa && pa < mips_ksegx_start + VM_KSEGX_SIZE) {
+ *vap = VM_KSEGX_ADDRESS + pa - mips_ksegx_start;
+ return true;
+ }
+#endif
+ if (MIPS_KSEG0_P(pa)) {
+ *vap = MIPS_PHYS_TO_KSEG0(pa);
+ return true;
+ }
+ return false;
+}
+
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Fri Jan 27 21:23:31 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_machdep.c
Log Message:
Keep mem_clusters as the original amount of memory and add avail_cluster
as the edited version.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_machdep.c
diff -u src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.1 Wed Jan 4 16:17:54 2012
+++ src/sys/arch/mips/rmi/rmixl_machdep.c Fri Jan 27 21:23:31 2012
@@ -252,8 +252,10 @@ int physmem; /* Total physical memory *
int netboot; /* Are we netbooting? */
+phys_ram_seg_t avail_clusters[VM_PHYSSEG_MAX];
+u_int avail_cluster_cnt;
+u_quad_t avail_cluster_maxaddr;
phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
-u_quad_t mem_cluster_maxaddr;
u_int mem_cluster_cnt;
static uint64_t mem_clusters_init(rmixlfw_mmap_t *, rmixlfw_mmap_t *);
@@ -654,28 +656,28 @@ rmixl_mach_init_common(struct rmixl_conf
*/
/* reserve 0..start..kernend pages */
- mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
+ avail_cluster_cnt = ram_seg_resv(avail_clusters, avail_cluster_cnt,
0, round_page(MIPS_KSEG0_TO_PHYS(kernend)));
/* reserve reset exception vector page */
/* should never be in our clusters anyway... */
- mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
+ avail_cluster_cnt = ram_seg_resv(avail_clusters, avail_cluster_cnt,
0x1FC0, 0x1FC0+NBPG);
/* Stop this abomination */
- mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
+ avail_cluster_cnt = ram_seg_resv(avail_clusters, avail_cluster_cnt,
0x1800, 0x2000);
#ifdef MULTIPROCESSOR
/* reserve the cpu_wakeup_info area */
- mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
+ avail_cluster_cnt = ram_seg_resv(avail_clusters, avail_cluster_cnt,
(u_quad_t)trunc_page((vaddr_t)rcp->rc_cpu_wakeup_info),
(u_quad_t)round_page((vaddr_t)rcp->rc_cpu_wakeup_end));
#endif
#ifdef MEMLIMIT
/* reserve everything >= MEMLIMIT */
- mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
+ avail_cluster_cnt = ram_seg_resv(avail_clusters, avail_cluster_cnt,
(u_quad_t)MEMLIMIT, (u_quad_t)~0);
#endif
@@ -684,10 +686,10 @@ rmixl_mach_init_common(struct rmixl_conf
* Now we need to reserve an aligned block of memory for pre-init
* allocations so we don't deplete KSEG0.
*/
- for (u_int i=0; i < mem_cluster_cnt; i++) {
+ for (u_int i=0; i < avail_cluster_cnt; i++) {
u_quad_t finish = round_page(
- mem_clusters[i].start + mem_clusters[i].size);
- u_quad_t start = roundup2(mem_clusters[i].start, VM_KSEGX_SIZE);
+ avail_clusters[i].start + avail_clusters[i].size);
+ u_quad_t start = roundup2(avail_clusters[i].start, VM_KSEGX_SIZE);
if (start > MIPS_PHYS_MASK && start + VM_KSEGX_SIZE <= finish) {
mips_ksegx_start = start;
mips_ksegx_pte.pt_entry = mips_paddr_to_tlbpfn(start)
@@ -705,20 +707,20 @@ rmixl_mach_init_common(struct rmixl_conf
#endif
/* get maximum RAM address from the VM clusters */
- mem_cluster_maxaddr = 0;
- for (u_int i=0; i < mem_cluster_cnt; i++) {
+ avail_cluster_maxaddr = 0;
+ for (u_int i=0; i < avail_cluster_cnt; i++) {
u_quad_t tmp = round_page(
- mem_clusters[i].start + mem_clusters[i].size);
- if (tmp > mem_cluster_maxaddr)
- mem_cluster_maxaddr = tmp;
+ avail_clusters[i].start + avail_clusters[i].size);
+ if (tmp > avail_cluster_maxaddr)
+ avail_cluster_maxaddr = tmp;
}
- DPRINTF("mem_cluster_maxaddr %#"PRIx64"\n", mem_cluster_maxaddr);
+ DPRINTF("avail_cluster_maxaddr %#"PRIx64"\n", avail_cluster_maxaddr);
/*
- * Load mem_clusters[] into the VM system.
+ * Load avail_clusters[] into the VM system.
*/
mips_page_physload(MIPS_KSEG0_START, (vaddr_t) kernend,
- mem_clusters, mem_cluster_cnt, fl, fl_count);
+ avail_clusters, avail_cluster_cnt, fl, fl_count);
/*
* Initialize error message buffer (at end of core).
@@ -1156,6 +1158,8 @@ rmixl_physaddr_dram_init(struct extent *
}
mem_cluster_cnt = mp - mem_clusters;
+ avail_cluster_cnt = mem_cluster_cnt;
+ memcpy(avail_clusters, mem_clusters, sizeof(avail_clusters));
return memsize;
}
@@ -1278,12 +1282,16 @@ rmixlfw_init(int64_t infop)
mem_clusters[0].start = 0;
mem_clusters[0].size = MEMSIZE;
mem_cluster_cnt = 1;
+ memcpy(avail_clusters, mem_clusters, sizeof(avail_clusters[0]));
+ avail_cluster_cnt = cnt;
return MEMSIZE;
#else
uint64_t memsize = 0;
for (size_t i = 0; i < mem_cluster_cnt; i++) {
memsize += mem_clusters[i].size;
+ avail_clusters[i] = mem_clusters[i];
}
+ avail_cluster_cnt = mem_cluster_cnt;
if (memsize)
return memsize;
@@ -1426,6 +1434,8 @@ mem_clusters_init(
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Jan 19 18:26:15 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_nae.c
Log Message:
Fix CFATTACH_DECL_NEW so kernels build again.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_nae.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_nae.c
diff -u src/sys/arch/mips/rmi/rmixl_nae.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_nae.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_nae.c:1.1.2.1 Sat Dec 24 01:57:54 2011
+++ src/sys/arch/mips/rmi/rmixl_nae.c Thu Jan 19 18:26:15 2012
@@ -29,7 +29,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rmixl_nae.c,v 1.1.2.1 2011/12/24 01:57:54 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rmixl_nae.c,v 1.1.2.2 2012/01/19 18:26:15 matt Exp $");
#include
#include
@@ -39,7 +39,11 @@ __KERNEL_RCSID(1, "$NetBSD: rmixl_nae.c,
static int nae_match(device_t, cfdata_t, void *);
static void nae_attach(device_t, device_t, void *);
-CFATTACH_DECL_NEW(nae, 0,
+struct nae_gmac_softc {
+ device_t sc_dev;
+};
+
+CFATTACH_DECL_NEW(nae_gmac, sizeof(struct nae_gmac_softc),
nae_match, nae_attach, 0, 0);
static int
CVS commit: [matt-nb5-mips64] src/sys/arch/evbmips/conf
Module Name:src Committed By: matt Date: Thu Jan 19 17:42:26 UTC 2012 Modified Files: src/sys/arch/evbmips/conf [matt-nb5-mips64]: XLPEVB Log Message: Add more XLP devices. To generate a diff of this commit: cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/evbmips/conf/XLPEVB Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/evbmips/conf/XLPEVB diff -u src/sys/arch/evbmips/conf/XLPEVB:1.1.2.5 src/sys/arch/evbmips/conf/XLPEVB:1.1.2.6 --- src/sys/arch/evbmips/conf/XLPEVB:1.1.2.5 Wed Jan 4 16:17:52 2012 +++ src/sys/arch/evbmips/conf/XLPEVB Thu Jan 19 17:42:26 2012 @@ -1,8 +1,8 @@ -# $NetBSD: XLPEVB,v 1.1.2.5 2012/01/04 16:17:52 matt Exp $ +# $NetBSD: XLPEVB,v 1.1.2.6 2012/01/19 17:42:26 matt Exp $ include "arch/evbmips/conf/std.rmixlp" -#ident "XLSATX-$Revision: 1.1.2.5 $" +#ident "XLSATX-$Revision: 1.1.2.6 $" #options INCLUDE_CONFIG_FILE # embed config file in kernel binary @@ -158,7 +158,11 @@ sdhc* at xlsdio? slot 0 sdmmc* at sdhc? ld* at sdmmc? xlnae* at pci? dev ? function ? -nae5 at xlnae? port 16 +nae0 at xlnae? complex 0 lane 0 kind 1 phy 4 +nae1 at xlnae? complex 0 lane 1 kind 1 phy 7 +nae2 at xlnae? complex 0 lane 2 kind 1 phy 6 +nae3 at xlnae? complex 0 lane 3 kind 1 phy 5 +nae5 at xlnae? complex 4 lane 2 kind 1 phy 16 xli2c0 at pci0 dev 6 function 2 xli2c1 at pci0 dev 6 function 3 iic0 at xli2c0 @@ -173,6 +177,13 @@ flash* at nor? xlnand* at pci? dev ? function ? nand* at xlnand? flash* at nand? +xlcde* at pci? dev ? function ? +xlfmn* at pci? dev ? function ? +xlpke* at pci? dev ? function ? +xlpoe* at pci? dev ? function ? +xlrxe* at pci? dev ? function ? +xlsae* at pci? dev ? function ? +xlsrio* at pci? dev ? function ? xlspi* at pci? dev ? function ? xlgpio* at pci? dev ? function ? gpio0 at xlgpio?
