CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Mon Jul 9 17:15:17 UTC 2012 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: locore.h Log Message: Add mips_cpu_switchto prototype. To generate a diff of this commit: cvs rdiff -u -r1.78.36.1.2.35 -r1.78.36.1.2.36 \ src/sys/arch/mips/include/locore.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/locore.h diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.35 src/sys/arch/mips/include/locore.h:1.78.36.1.2.36 --- src/sys/arch/mips/include/locore.h:1.78.36.1.2.35 Tue Feb 14 01:51:11 2012 +++ src/sys/arch/mips/include/locore.h Mon Jul 9 17:15:17 2012 @@ -44,12 +44,15 @@ struct trapframe; void trap(uint32_t, uint32_t, vaddr_t, vaddr_t, struct trapframe *); void ast(void); +struct lwp * + mips_cpu_switchto(struct lwp *, struct lwp *, bool); + /* * Perform a trapsignal, and if cpu_printfataltraps is true, print the trap info * to the console. */ extern bool cpu_printfataltraps; -void cpu_trapsignal(struct lwp *, ksiginfo_t *, struct trapframe *); +void cpu_trapsignal(struct lwp *, ksiginfo_t *, struct trapframe *); void mips_fpu_trap(vaddr_t, struct trapframe *); void mips_fpu_intr(vaddr_t, struct trapframe *);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Mon Feb 27 16:57:58 UTC 2012 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: mips_param.h Log Message: Make sure we don't overflow a 32-bit integer. To generate a diff of this commit: cvs rdiff -u -r1.23.78.11 -r1.23.78.12 src/sys/arch/mips/include/mips_param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/mips_param.h diff -u src/sys/arch/mips/include/mips_param.h:1.23.78.11 src/sys/arch/mips/include/mips_param.h:1.23.78.12 --- src/sys/arch/mips/include/mips_param.h:1.23.78.11 Tue Dec 27 16:09:36 2011 +++ src/sys/arch/mips/include/mips_param.h Mon Feb 27 16:57:58 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: mips_param.h,v 1.23.78.11 2011/12/27 16:09:36 matt Exp $ */ +/* mips_param.h,v 1.23.78.11 2011/12/27 16:09:36 matt Exp */ #ifdef _KERNEL #include machine/cpu.h @@ -95,8 +95,8 @@ #ifdef _LP64 #define NSEGPG (NBPG/8) -#define NBXSEG (NSEGPG*NBSEG) /* bytes/xsegment */ -#define XSEGOFSET (NBSEG-1) /* byte offset into segment */ +#define NBXSEG ((uint64_t)NSEGPG*NBSEG) /* bytes/xsegment */ +#define XSEGOFSET (NBXSEG-1) /* byte offset into xsegment */ #define XSEGSHIFT (SEGSHIFT+(PGSHIFT-3)) /* LOG2(NBXSEG) */ #endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Thu Feb 16 10:52:13 UTC 2012 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h Log Message: Add extern int mips_ksegx_tlb_slot; To generate a diff of this commit: cvs rdiff -u -r1.41.28.26 -r1.41.28.27 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.26 src/sys/arch/mips/include/vmparam.h:1.41.28.27 --- src/sys/arch/mips/include/vmparam.h:1.41.28.26 Thu Feb 9 03:14:45 2012 +++ src/sys/arch/mips/include/vmparam.h Thu Feb 16 10:52:13 2012 @@ -217,6 +217,7 @@ extern int mips_poolpage_vmfreelist; #ifdef ENABLE_MIPS_KSEGX extern paddr_t mips_ksegx_start; +extern int mips_ksegx_tlb_slot; #endif #endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat Dec 31 08:18:42 UTC 2011 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: intr.h Log Message: Add IST_EDGE_RISING and IST_EDGE_FALLING. To generate a diff of this commit: cvs rdiff -u -r1.3.96.16 -r1.3.96.17 src/sys/arch/mips/include/intr.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/intr.h diff -u src/sys/arch/mips/include/intr.h:1.3.96.16 src/sys/arch/mips/include/intr.h:1.3.96.17 --- src/sys/arch/mips/include/intr.h:1.3.96.16 Sat Feb 5 06:31:05 2011 +++ src/sys/arch/mips/include/intr.h Sat Dec 31 08:18:42 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: intr.h,v 1.3.96.16 2011/02/05 06:31:05 cliff Exp $ */ +/* $NetBSD: intr.h,v 1.3.96.17 2011/12/31 08:18:42 matt Exp $ */ /*- * Copyright (c) 2009, 2010 The NetBSD Foundation, Inc. * All rights reserved. @@ -60,6 +60,8 @@ #define IST_LEVEL 3 /* level-triggered */ #define IST_LEVEL_HIGH 4 /* level triggered, active high */ #define IST_LEVEL_LOW 5 /* level triggered, active low */ +#define IST_EDGE_RISING 6 /* edge-triggered, rising edge */ +#define IST_EDGE_FALLING 7 /* edge-triggered, falling edge */ #define IPI_NOP 0 /* do nothing, interrupt only */ #define IPI_AST 1 /* force ast */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Tue Dec 27 16:09:36 UTC 2011 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: mips_param.h pmap.h vmparam.h Log Message: Deal with not defining PAGE_SIZE or PAGE_SHIFT for non-kernel inclusion. To generate a diff of this commit: cvs rdiff -u -r1.23.78.10 -r1.23.78.11 src/sys/arch/mips/include/mips_param.h cvs rdiff -u -r1.54.26.21 -r1.54.26.22 src/sys/arch/mips/include/pmap.h cvs rdiff -u -r1.41.28.24 -r1.41.28.25 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/mips_param.h diff -u src/sys/arch/mips/include/mips_param.h:1.23.78.10 src/sys/arch/mips/include/mips_param.h:1.23.78.11 --- src/sys/arch/mips/include/mips_param.h:1.23.78.10 Tue Dec 27 01:56:33 2011 +++ src/sys/arch/mips/include/mips_param.h Tue Dec 27 16:09:36 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: mips_param.h,v 1.23.78.10 2011/12/27 01:56:33 matt Exp $ */ +/* $NetBSD: mips_param.h,v 1.23.78.11 2011/12/27 16:09:36 matt Exp $ */ #ifdef _KERNEL #include machine/cpu.h @@ -39,7 +39,8 @@ #define SSIZE 1 /* initial stack size/NBPG */ #define SINCR 1 /* increment of stack/NBPG */ -#if defined(_KERNEL) !defined(_MODULE) +#if defined(_KERNEL) !defined(_RUMPKERNEL) \ + !defined(_MODULE) !defined(_LKM) #ifdef PAGE_SHIFT #if MIPS_PAGE_SHIFT != PAGE_SHIFT #error MIPS_PAGE_SHIFT != PAGE_SHIFT @@ -49,7 +50,7 @@ #else #define PAGE_SHIFT 12 #endif -#endif /* _KERNEL !_MODULE */ +#endif /* _KERNEL !_RUMPKERNEL !_MODULE !_LKM */ #if PAGE_SHIFT 1 #define UPAGES 1 /* pages of u-area */ Index: src/sys/arch/mips/include/pmap.h diff -u src/sys/arch/mips/include/pmap.h:1.54.26.21 src/sys/arch/mips/include/pmap.h:1.54.26.22 --- src/sys/arch/mips/include/pmap.h:1.54.26.21 Tue Dec 27 01:56:33 2011 +++ src/sys/arch/mips/include/pmap.h Tue Dec 27 16:09:36 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.54.26.21 2011/12/27 01:56:33 matt Exp $ */ +/* $NetBSD: pmap.h,v 1.54.26.22 2011/12/27 16:09:36 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -81,7 +81,7 @@ #include mips/cpuregs.h /* for KSEG0 below */ //#include mips/pte.h -#if !defined(_MODULE) +#if !defined(_MODULE) !defined(_LKM) /* * The user address space is 2Gb (0x0 - 0x8000). * User programs are laid out in memory as follows: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.24 src/sys/arch/mips/include/vmparam.h:1.41.28.25 --- src/sys/arch/mips/include/vmparam.h:1.41.28.24 Tue Dec 27 01:56:33 2011 +++ src/sys/arch/mips/include/vmparam.h Tue Dec 27 16:09:36 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41.28.24 2011/12/27 01:56:33 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.41.28.25 2011/12/27 16:09:36 matt Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -54,7 +54,10 @@ * We normally use a 4K page but may use 8K, 16K, or 32K on MIPS systems. * Override PAGE_* definitions to compile-time constants. */ -#if defined(_KERNEL_OPT) defined(_KERNEL) !defined(_MODULE) +#if defined(_RUMPKERNEL) +#define PAGE_SHIFT 12 +#elif defined(_KERNEL_OPT) defined(_KERNEL) \ + !defined(_MODULE) !defined(_LKM) #ifdef MIPS_PAGE_SHIFT #define PAGE_SHIFT MIPS_PAGE_SHIFT #else @@ -165,15 +168,14 @@ * These are negative addresses since MIPS addresses are signed. */ #define VM_MIN_ADDRESS ((vaddr_t)0x) +#define VM_MAX_ADDRESS VM_MAXUSER_ADDRESS #ifdef _LP64 #define VM_MAXUSER_ADDRESS ((vaddr_t) 1L (4*PGSHIFT-8)) /* 0x0100 */ -#define VM_MAX_ADDRESS VM_MAXUSER_ADDRESS #define VM_MIN_KERNEL_ADDRESS ((vaddr_t) 3L 62) /* 0xC000 */ #define VM_MAX_KERNEL_ADDRESS ((vaddr_t) -1L 31) /* 0x8000 */ #else -#define VM_MAXUSER_ADDRESS ((vaddr_t)-0x7fff-1)/* 0x8000 */ -#define VM_MAX_ADDRESS ((vaddr_t)-0x7fff-1)/* 0x8000 */ +#define VM_MAXUSER_ADDRESS ((vaddr_t)0x8000) /* 0x8000 */ #define VM_MIN_KERNEL_ADDRESS ((vaddr_t)-0x4000) /* 0xC000 */ #ifdef ENABLE_MIPS_TX3900 #define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-0x0100) /* 0xFF00 */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Tue Dec 27 01:56:33 UTC 2011
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cache.h cache_mipsNN.h
cache_r4k.h mips_param.h pmap.h proc.h vmparam.h
Log Message:
Make these play nice with modules.
To generate a diff of this commit:
cvs rdiff -u -r1.9.96.5 -r1.9.96.6 src/sys/arch/mips/include/cache.h
cvs rdiff -u -r1.4 -r1.4.126.1 src/sys/arch/mips/include/cache_mipsNN.h
cvs rdiff -u -r1.11.96.1 -r1.11.96.2 src/sys/arch/mips/include/cache_r4k.h
cvs rdiff -u -r1.23.78.9 -r1.23.78.10 src/sys/arch/mips/include/mips_param.h
cvs rdiff -u -r1.54.26.20 -r1.54.26.21 src/sys/arch/mips/include/pmap.h
cvs rdiff -u -r1.21.36.10 -r1.21.36.11 src/sys/arch/mips/include/proc.h
cvs rdiff -u -r1.41.28.23 -r1.41.28.24 src/sys/arch/mips/include/vmparam.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cache.h
diff -u src/sys/arch/mips/include/cache.h:1.9.96.5 src/sys/arch/mips/include/cache.h:1.9.96.6
--- src/sys/arch/mips/include/cache.h:1.9.96.5 Fri Dec 23 18:49:02 2011
+++ src/sys/arch/mips/include/cache.h Tue Dec 27 01:56:32 2011
@@ -138,9 +138,13 @@ struct mips_cache_ops {
void (*mco_pdcache_wb_range)(vaddr_t, vsize_t);
/* These are called only by the (mipsNN) icache functions. */
- void (*mco_intern_pdcache_wbinv_all)(void);
+ void (*mco_intern_icache_sync_range_index)(vaddr_t, vsize_t);
+ void (*mco_intern_icache_sync_range)(vaddr_t, vsize_t);
+ void (*mco_intern_pdcache_sync_all)(void);
+ void (*mco_intern_pdcache_sync_range_index)(vaddr_t, vsize_t);
+ void (*mco_intern_pdcache_sync_range)(vaddr_t, vsize_t);
+ /* This is used internally by the (mipsNN) pdcache functions. */
void (*mco_intern_pdcache_wbinv_range_index)(vaddr_t, vsize_t);
- void (*mco_intern_pdcache_wb_range)(vaddr_t, vsize_t);
void (*mco_sdcache_wbinv_all)(void);
void (*mco_sdcache_wbinv_range)(vaddr_t, vsize_t);
@@ -149,9 +153,12 @@ struct mips_cache_ops {
void (*mco_sdcache_wb_range)(vaddr_t, vsize_t);
/* These are called only by the (mipsNN) icache functions. */
- void (*mco_intern_sdcache_wbinv_all)(void);
+ void (*mco_intern_sdcache_sync_all)(void);
+ void (*mco_intern_sdcache_sync_range_index)(vaddr_t, vsize_t);
+ void (*mco_intern_sdcache_sync_range)(vaddr_t, vsize_t);
+
+ /* This is used internally by the (mipsNN) sdcache functions. */
void (*mco_intern_sdcache_wbinv_range_index)(vaddr_t, vsize_t);
- void (*mco_intern_sdcache_wb_range)(vaddr_t, vsize_t);
};
extern struct mips_cache_ops mips_cache_ops;
@@ -290,14 +297,26 @@ do { \
* Private D-cache functions only called from (currently only the
* mipsNN) I-cache functions.
*/
-#define mips_intern_dcache_wbinv_all() \
- __mco_noargs(intern_, dcache_wbinv_all)
+#define mips_intern_dcache_sync_all() \
+ __mco_noargs(intern_, dcache_sync_all)
+
+#define mips_intern_dcache_sync_range_index(v, s) \
+ __mco_2args(intern_, dcache_sync_range_index, (v), (s))
+
+#define mips_intern_dcache_sync_range(v, s)\
+ __mco_2args(intern_, dcache_sync_range, (v), (s))
+
+#define mips_intern_pdcache_wbinv_range_index(v, s) \
+ (*mips_cache_ops.mco_intern_pdcache_wbinv_range_index)((v), (s))
+
+#define mips_intern_sdcache_wbinv_range_index(v, s) \
+ (*mips_cache_ops.mco_intern_sdcache_wbinv_range_index)((v), (s))
-#define mips_intern_dcache_wbinv_range_index(v, s) \
- __mco_2args(intern_, dcache_wbinv_range_index, (v), (s))
+#define mips_intern_icache_sync_range(v, s)\
+ (*mips_cache_ops.mco_intern_icache_sync_range)((v), (s))
-#define mips_intern_dcache_wb_range(v, s)\
- __mco_2args(intern_, dcache_wb_range, (v), (s))
+#define mips_intern_icache_sync_range_index(v, s) \
+ (*mips_cache_ops.mco_intern_icache_sync_range_index)((v), (s))
void mips_config_cache(void);
void mips_dcache_compute_align(void);
Index: src/sys/arch/mips/include/cache_mipsNN.h
diff -u src/sys/arch/mips/include/cache_mipsNN.h:1.4 src/sys/arch/mips/include/cache_mipsNN.h:1.4.126.1
--- src/sys/arch/mips/include/cache_mipsNN.h:1.4 Mon Feb 17 11:35:02 2003
+++ src/sys/arch/mips/include/cache_mipsNN.h Tue Dec 27 01:56:33 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: cache_mipsNN.h,v 1.4 2003/02/17 11:35:02 simonb Exp $ */
+/* $NetBSD: cache_mipsNN.h,v 1.4.126.1 2011/12/27 01:56:33 matt Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -35,21 +35,19 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#ifndef _MIPS_CACHE_MIPSNN_H_
+#define _MIPS_CACHE_MIPSNN_H_
+
void mipsNN_cache_init(uint32_t, uint32_t);
-void mipsNN_icache_sync_all_16(void);
-void mipsNN_icache_sync_all_32(void);
-void mipsNN_icache_sync_range_16(vaddr_t, vsize_t);
-void mipsNN_icache_sync_range_32(vaddr_t, vsize_t);
-void mipsNN_icache_sync_range_index_16(vaddr_t, vsize_t);
-void mipsNN_icache_sync_range_index_32(vaddr_t, vsize_t);
-void mipsNN_pdcache_wbinv_all_16(void);
-void
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Tue Dec 27 06:54:29 UTC 2011
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: kcore.h
Log Message:
Add pg_size to the cpu_kcore_hdr_t as well support for ksegx.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.1.174.1 src/sys/arch/mips/include/kcore.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/kcore.h
diff -u src/sys/arch/mips/include/kcore.h:1.1 src/sys/arch/mips/include/kcore.h:1.1.174.1
--- src/sys/arch/mips/include/kcore.h:1.1 Thu Feb 19 23:06:11 1998
+++ src/sys/arch/mips/include/kcore.h Tue Dec 27 06:54:28 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: kcore.h,v 1.1 1998/02/19 23:06:11 thorpej Exp $ */
+/* $NetBSD: kcore.h,v 1.1.174.1 2011/12/27 06:54:28 matt Exp $ */
/*
* Copyright (c) 1996 Carnegie-Mellon University.
@@ -43,6 +43,10 @@ typedef struct cpu_kcore_hdr {
u_int32_t pg_frame; /* PTE page frame num mask */
u_int32_t pg_v; /* PTE valid bit */
u_int32_t nmemsegs; /* Number of RAM segments */
+ u_int32_t pg_size; /* s/w page size */
+ u_int32_t ksegx_pfn; /* starting pfn of ksegx */
+ u_int32_t ksegx_va; /* starting va of ksegx */
+ u_int32_t ksegx_size; /* size of ksegx */
#if 0
phys_ram_seg_t memsegs[]; /* RAM segments */
#endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Tue Dec 27 06:55:12 UTC 2011 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: Note that 1004K and 1074K are MT To generate a diff of this commit: cvs rdiff -u -r1.74.28.23 -r1.74.28.24 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.23 src/sys/arch/mips/include/cpuregs.h:1.74.28.24 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.23 Fri Dec 23 17:55:50 2011 +++ src/sys/arch/mips/include/cpuregs.h Tue Dec 27 06:55:12 2011 @@ -877,8 +877,8 @@ #define MIPS_34K 0x95 /* MIPS 34K ISA 32 R2 MT */ #define MIPS_24KE 0x96 /* MIPS 24KEc ISA 32 Rel 2 */ #define MIPS_74K 0x97 /* MIPS 74Kc/74Kf ISA 32 Rel 2 */ -#define MIPS_1004K 0x99 /* MIPS 1004Kc/1004Kf ISA 32 Rel 2 */ -#define MIPS_1074K 0x9a /* MIPS 1074K ISA 32 Rel 2 */ +#define MIPS_1004K 0x99 /* MIPS 1004Kc/1004Kf ISA 32 R2 MT */ +#define MIPS_1074K 0x9a /* MIPS 1074K ISA 32 R2 MT */ /* * Alchemy (company ID 3) use the processor ID field to donote the CPU core
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri Dec 23 08:07:40 UTC 2011 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: trap.h Log Message: Add various new exceptions from MTE/32R2/64R2/DSP. To generate a diff of this commit: cvs rdiff -u -r1.15.96.1 -r1.15.96.2 src/sys/arch/mips/include/trap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/trap.h diff -u src/sys/arch/mips/include/trap.h:1.15.96.1 src/sys/arch/mips/include/trap.h:1.15.96.2 --- src/sys/arch/mips/include/trap.h:1.15.96.1 Fri Apr 29 08:26:22 2011 +++ src/sys/arch/mips/include/trap.h Fri Dec 23 08:07:40 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: trap.h,v 1.15.96.1 2011/04/29 08:26:22 matt Exp $ */ +/* $NetBSD: trap.h,v 1.15.96.2 2011/12/23 08:07:40 matt Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -65,8 +65,22 @@ #define T_TRAP 13 /* Trap instruction */ #define T_VCEI 14 /* Virtual coherency exception */ #define T_FPE 15 /* Floating point exception */ +#define T_IMPL0 16 /* Implementation dependent */ +#define T_IMPL1 17 /* Implementation dependent */ +#define T_C2E 18 /* Reserved for precise COP2 exception */ +#define T_TLBRI 19 /* TLB Read-Inhibit exception */ +#define T_TLBXI 20 /* TLB Execution-Inhibit exception */ +#define T__RSRVRD21 21 /* Reserved */ +#define T_MDMX 22 /* MDMX Unusable exception */ #define T_WATCH 23 /* Watch address reference */ -#define T_VCED 31 /* Virtual coherency data */ +#define T_MCHECK 24 /* Machine Check */ +#define T_THREAD 25 /* Thread (MT ASE) Exceptions */ +#define T_DSPDIS 26 /* DSP ASE State Disabled */ +#define T__RSRVRD27 27 /* Reserved */ +#define T__RSRVRD28 28 /* Reserved */ +#define T__RSRVRD29 29 /* Reserved */ +#define T_CACHEERR 30 /* Cache Errror */ +#define T_VCED 31 /* Virtual coherency data (Reserved) */ #define T_USER 0x20 /* user-mode flag or'ed with type */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Fri Dec 23 08:09:08 UTC 2011
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: locore.h
Log Message:
add more mipsNN_cp0_config{3,4,5,6,7}_{read,write}.
Add mips3_cp0_random_read().
Add L3 encoding for RMI.
To generate a diff of this commit:
cvs rdiff -u -r1.78.36.1.2.30 -r1.78.36.1.2.31 \
src/sys/arch/mips/include/locore.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/locore.h
diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.30 src/sys/arch/mips/include/locore.h:1.78.36.1.2.31
--- src/sys/arch/mips/include/locore.h:1.78.36.1.2.30 Thu May 26 19:21:55 2011
+++ src/sys/arch/mips/include/locore.h Fri Dec 23 08:09:08 2011
@@ -146,7 +146,19 @@ void mips3_cp0_config_write(uint32_t);
uint32_t mipsNN_cp0_config1_read(void);
void mipsNN_cp0_config1_write(uint32_t);
uint32_t mipsNN_cp0_config2_read(void);
+void mipsNN_cp0_config2_write(uint32_t);
uint32_t mipsNN_cp0_config3_read(void);
+void mipsNN_cp0_config3_write(uint32_t);
+uint32_t mipsNN_cp0_config4_read(void);
+void mipsNN_cp0_config4_write(uint32_t);
+uint32_t mipsNN_cp0_config5_read(void);
+void mipsNN_cp0_config5_write(uint32_t);
+uint32_t mipsNN_cp0_config6_read(void);
+void mipsNN_cp0_config6_write(uint32_t);
+uint32_t mipsNN_cp0_config7_read(void);
+void mipsNN_cp0_config7_write(uint32_t);
+uint64_t mips64_cp0_config7_read(void);
+void mips64_cp0_config7_write(uint32_t);
uintptr_t mipsNN_cp0_watchlo_read(u_int);
void mipsNN_cp0_watchlo_write(u_int, uintptr_t);
@@ -162,6 +174,8 @@ void mipsNN_cp0_userlocal_write(void *);
uint32_t mips3_cp0_count_read(void);
void mips3_cp0_count_write(uint32_t);
+uint32_t mips3_cp0_random_read(void);
+
uint32_t mips3_cp0_wired_read(void);
void mips3_cp0_wired_write(uint32_t);
void mips3_cp0_pg_mask_write(uint32_t);
@@ -560,34 +574,38 @@ struct pridtab {
# define CIDFL_RMI_TYPE_XLS 1
# define CIDFL_RMI_TYPE_XLP 2
#define MIPS_CIDFL_RMI_THREADS_MASK __BITS(6,3)
-# define MIPS_CIDFL_RMI_THREADS_SHIFT 3
#define MIPS_CIDFL_RMI_CORES_MASK __BITS(10,7)
-# define MIPS_CIDFL_RMI_CORES_SHIFT 7
# define LOG2_1 0
# define LOG2_2 1
# define LOG2_4 2
# define LOG2_8 3
# define MIPS_CIDFL_RMI_CPUS(ncores, nthreads)\
- ((LOG2_ ## ncores MIPS_CIDFL_RMI_CORES_SHIFT) \
- |(LOG2_ ## nthreads MIPS_CIDFL_RMI_THREADS_SHIFT))
+ (__SHIFTIN(LOG2_ ## ncores, MIPS_CIDFL_RMI_CORES_MASK) \
+ |__SHIFTIN(LOG2_ ## nthreads, MIPS_CIDFL_RMI_THREADS_MASK))
# define MIPS_CIDFL_RMI_NTHREADS(cidfl) \
- (1 (((cidfl) MIPS_CIDFL_RMI_THREADS_MASK) \
- MIPS_CIDFL_RMI_THREADS_SHIFT))
+ (1 __SHIFTOUT((cidfl), MIPS_CIDFL_RMI_THREADS_MASK))
# define MIPS_CIDFL_RMI_NCORES(cidfl) \
- (1 (((cidfl) MIPS_CIDFL_RMI_CORES_MASK) \
- MIPS_CIDFL_RMI_CORES_SHIFT))
+ (1 __SHIFTOUT((cidfl), MIPS_CIDFL_RMI_CORES_MASK))
#define MIPS_CIDFL_RMI_L2SZ_MASK __BITS(14,11)
-# define MIPS_CIDFL_RMI_L2SZ_SHIFT 11
# define RMI_L2SZ_256KB 0
# define RMI_L2SZ_512KB 1
# define RMI_L2SZ_1MB2
# define RMI_L2SZ_2MB3
# define RMI_L2SZ_4MB4
# define MIPS_CIDFL_RMI_L2(l2sz) \
- (RMI_L2SZ_ ## l2sz MIPS_CIDFL_RMI_L2SZ_SHIFT)
+ __SHIFTIN(RMI_L2SZ_ ## l2sz, MIPS_CIDFL_RMI_L2SZ_MASK)
# define MIPS_CIDFL_RMI_L2SZ(cidfl) \
- ((256*1024) (((cidfl) MIPS_CIDFL_RMI_L2SZ_MASK) \
- MIPS_CIDFL_RMI_L2SZ_SHIFT))
+ ((256*1024) __SHIFTOUT((cidfl), MIPS_CIDFL_RMI_L2SZ_MASK))
+#define MIPS_CIDFL_RMI_L3SZ_MASK __BITS(18,15)
+# define RMI_L3SZ_256KB 0
+# define RMI_L3SZ_512KB 1
+# define RMI_L3SZ_1MB2
+# define RMI_L3SZ_2MB3
+# define RMI_L3SZ_4MB4
+# define MIPS_CIDFL_RMI_L3(l3sz) \
+ __SHIFTIN(RMI_L3SZ_ ## l3sz, MIPS_CIDFL_RMI_L3SZ_MASK)
+# define MIPS_CIDFL_RMI_L3SZ(cidfl) \
+ ((256*1024) __SHIFTOUT((cidfl), MIPS_CIDFL_RMI_L3SZ_MASK))
#endif /* _KERNEL */
#endif /* _MIPS_LOCORE_H */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri Dec 23 17:55:50 UTC 2011 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: Correct XLP processor ids, add 1074K processor id. Increase ASID space to 10 bits for MIPS3+ cpus. To generate a diff of this commit: cvs rdiff -u -r1.74.28.22 -r1.74.28.23 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.22 src/sys/arch/mips/include/cpuregs.h:1.74.28.23 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.22 Fri Nov 4 04:29:32 2011 +++ src/sys/arch/mips/include/cpuregs.h Fri Dec 23 17:55:50 2011 @@ -693,7 +693,7 @@ #define MIPS1_TLB_PID_SHIFT 6 #define MIPS3_TLB_VPN2 0xe000 -#define MIPS3_TLB_ASID 0x00ff +#define MIPS3_TLB_ASID 0x03ff #define MIPS1_TLB_VIRT_PAGE_NUM MIPS1_TLB_VPN #define MIPS3_TLB_VIRT_PAGE_NUM MIPS3_TLB_VPN2 @@ -732,7 +732,11 @@ #if (MIPS3 + MIPS4 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2 + MIPS64_RMIXL + MIPS64R2_RMIXL) != 0 MIPS1 == 0 #define MIPS_TLB_PID_SHIFT 0 #define MIPS_TLB_PID MIPS3_TLB_PID +#if (MIPS3 + MIPS4) != 0 #define MIPS_TLB_NUM_PIDS MIPS3_TLB_NUM_ASIDS +#else +#define MIPS_TLB_NUM_PIDS mips_options.mips_num_tlb_asids +#endif #endif @@ -874,6 +878,7 @@ #define MIPS_24KE 0x96 /* MIPS 24KEc ISA 32 Rel 2 */ #define MIPS_74K 0x97 /* MIPS 74Kc/74Kf ISA 32 Rel 2 */ #define MIPS_1004K 0x99 /* MIPS 1004Kc/1004Kf ISA 32 Rel 2 */ +#define MIPS_1074K 0x9a /* MIPS 1074K ISA 32 Rel 2 */ /* * Alchemy (company ID 3) use the processor ID field to donote the CPU core @@ -908,13 +913,8 @@ /* * CPU processor IDs for company ID == 12 (RMI) */ -#define MIPS_XLP832 0x10 /* RMI XLP832 ISA 64 Rel 2 */ -#define MIPS_XLP816 0x14 /* RMI XLP816 ISA 64 Rel 2 */ -#define MIPS_XLP432 0x90 /* RMI XLP432 ISA 64 Rel 2 */ -#define MIPS_XLP416 0x94 /* RMI XLP416 ISA 64 Rel 2 */ -#define MIPS_XLP316 0xd4 /* RMI XLP316 ISA 64 Rel 2 */ -#define MIPS_XLP308 0xd5 /* RMI XLP308 ISA 64 Rel 2 */ -#define MIPS_XLP304 0xd7 /* RMI XLP304 ISA 64 Rel 2 */ +#define MIPS_XLP8XX 0x10 /* RMI XLP8XX/XLP4XX ISA 64 Rel 2 */ +#define MIPS_XLP3XX 0x11 /* RMI XLP3XX ISA 64 Rel 2 */ #define MIPS_XLR308B 0x06 /* RMI XLR308-B ISA 64 */ #define MIPS_XLR508B 0x07 /* RMI XLR508-B ISA 64 */ #define MIPS_XLR516B 0x08 /* RMI XLR516-B ISA 64 */ @@ -957,8 +957,5 @@ #ifdef MIPS64_SB1 #include mips/sb1regs.h #endif -#if (MIPS64_XLR + MIPS64_XLS + MIPS64_XLP) 0 -#include mips/rmi/rmixlreg.h -#endif #endif /* _MIPS_CPUREGS_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Fri Dec 23 17:58:20 UTC 2011
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: pci_machdep.h
Log Message:
Add conditional support for __PCI_BUS_DEVORDER, __HAVE_PCI_CONF_HOOK, and
__PCI_DEV_FUNCORDER (new).
To generate a diff of this commit:
cvs rdiff -u -r1.4.96.2 -r1.4.96.3 src/sys/arch/mips/include/pci_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/pci_machdep.h
diff -u src/sys/arch/mips/include/pci_machdep.h:1.4.96.2 src/sys/arch/mips/include/pci_machdep.h:1.4.96.3
--- src/sys/arch/mips/include/pci_machdep.h:1.4.96.2 Sun Sep 13 03:29:36 2009
+++ src/sys/arch/mips/include/pci_machdep.h Fri Dec 23 17:58:20 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.h,v 1.4.96.2 2009/09/13 03:29:36 cliff Exp $ */
+/* $NetBSD: pci_machdep.h,v 1.4.96.3 2011/12/23 17:58:20 matt Exp $ */
/*
* Copyright (c) 1996 Carnegie-Mellon University.
@@ -74,6 +74,15 @@ struct mips_pci_chipset {
void (*pc_conf_interrupt)(void *, int, int, int,
int, int *);
+#ifdef __PCI_BUS_DEVORDER
+ int (*pc_bus_devorder)(void *, int, char *);
+#endif
+#ifdef __PCI_DEV_FUNCORDER
+ bool (*pc_dev_funcorder)(void *, int, int, int, char *);
+#endif
+#ifdef __HAVE_PCI_CONF_HOOK
+ int (*pc_conf_hook)(void *, int, int, int, pcireg_t);
+#endif
#ifdef __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
void *(*pc_pciide_compat_intr_establish)(void *,
device_t, struct pci_attach_args *, int,
@@ -108,6 +117,19 @@ struct mips_pci_chipset {
(*(c)-pc_intr_disestablish)((c)-pc_intr_v, (iv))
#define pci_conf_interrupt(c, b, d, p, s, lp)\
(*(c)-pc_conf_interrupt)((c)-pc_intr_v, (b), (d), (p), (s), (lp))
+#ifdef __PCI_BUS_DEVORDER
+#define pci_bus_devorder(c, b, d) \
+(*(c)-pc_bus_devorder)((c)-pc_intr_v, (b), (d))
+#endif
+#ifdef __PCI_DEV_FUNCORDER
+#define pci_dev_funcorder(c, b, d, nf, f)\
+(*(c)-pc_dev_funcorder)((c)-pc_intr_v, (b), (d), (nf), (f))
+#endif
+#ifdef __HAVE_PCI_CONF_HOOK
+#define pci_conf_hook(c, b, d, f, id)\
+(*(c)-pc_conf_hook)((c)-pc_intr_v, (b), (d), (f), (id))
+#endif
+
/*
* mips-specific PCI functions.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Fri Dec 23 18:49:03 UTC 2011
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cache.h
Log Message:
Add multiple inclusion protection.
Add separate variable for dealing with icache virtual aliases
To generate a diff of this commit:
cvs rdiff -u -r1.9.96.4 -r1.9.96.5 src/sys/arch/mips/include/cache.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cache.h
diff -u src/sys/arch/mips/include/cache.h:1.9.96.4 src/sys/arch/mips/include/cache.h:1.9.96.5
--- src/sys/arch/mips/include/cache.h:1.9.96.4 Thu May 26 19:21:55 2011
+++ src/sys/arch/mips/include/cache.h Fri Dec 23 18:49:02 2011
@@ -35,6 +35,9 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#ifndef _MIPS_CACHE_H_
+#define _MIPS_CACHE_H_
+
/*
* Cache operations.
*
@@ -207,16 +210,29 @@ struct mips_cache_info {
u_int mci_dcache_align_mask;
u_int mci_cache_prefer_mask;
-#if (MIPS2 + MIPS3 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2 + MIPS64_RMIXL | MIPS64R2_RMIXL) 0
+#if (MIPS2 + MIPS3 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2)
u_int mci_cache_alias_mask;
+ u_int mci_icache_alias_mask;
bool mci_cache_virtual_alias;
+ bool mci_icache_virtual_alias;
#define MIPS_CACHE_ALIAS_MASK mips_cache_info.mci_cache_alias_mask
#define MIPS_CACHE_VIRTUAL_ALIAS mips_cache_info.mci_cache_virtual_alias
-#elif defined(MIPS1)
+#define MIPS_ICACHE_ALIAS_MASK mips_cache_info.mci_icache_alias_mask
+#define MIPS_ICACHE_VIRTUAL_ALIAS mips_cache_info.mci_icache_virtual_alias
+#elif (MIPS1 + MIPS64_RMIXL + MIPS64R2_RMIXL) 0
#define MIPS_CACHE_ALIAS_MASK 0
#define MIPS_CACHE_VIRTUAL_ALIAS false
+#if (MIPS64R2_RMIXL) 0
+ u_int mci_icache_alias_mask;
+ bool mci_icache_virtual_alias;
+#define MIPS_ICACHE_ALIAS_MASK mips_cache_info.mci_icache_alias_mask
+#define MIPS_ICACHE_VIRTUAL_ALIAS mips_cache_info.mci_icache_virtual_alias
+#else
+#define MIPS_ICACHE_ALIAS_MASK 0
+#define MIPS_ICACHE_VIRTUAL_ALIAS false
+#endif
#else
#error mci_cache screw up
#endif
@@ -287,3 +303,5 @@ void mips_config_cache(void);
void mips_dcache_compute_align(void);
#include mips/cache_mipsNN.h
+
+#endif /* _MIPS_CACHE_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri Dec 23 18:50:36 UTC 2011 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: mips3_pte.h Log Message: Base various #defines, etc. on PAGE_SHIFT instead of using separate ENABLE_MIPS_*_PAGE defines. To generate a diff of this commit: cvs rdiff -u -r1.23.38.7 -r1.23.38.8 src/sys/arch/mips/include/mips3_pte.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/mips3_pte.h diff -u src/sys/arch/mips/include/mips3_pte.h:1.23.38.7 src/sys/arch/mips/include/mips3_pte.h:1.23.38.8 --- src/sys/arch/mips/include/mips3_pte.h:1.23.38.7 Fri Dec 2 00:01:37 2011 +++ src/sys/arch/mips/include/mips3_pte.h Fri Dec 23 18:50:35 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: mips3_pte.h,v 1.23.38.7 2011/12/02 00:01:37 matt Exp $ */ +/* $NetBSD: mips3_pte.h,v 1.23.38.8 2011/12/23 18:50:35 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -78,6 +78,7 @@ #ifndef _MIPS_MIPS3_PTE_H_ #define _MIPS_MIPS3_PTE_H_ + /* * R4000 hardware page table entry */ @@ -106,20 +107,28 @@ unsigned int pg_g:1, /* HW: ignore as #define MIPS3_PG_WIRED 0x8000 /* SW */ #define MIPS3_PG_RO 0x4000 /* SW */ -#ifdef ENABLE_MIPS_16KB_PAGE -#define MIPS3_PG_SVPN 0xc000 /* Software page no mask */ -#define MIPS3_PG_HVPN 0x8000 /* Hardware page no mask */ -#define MIPS3_PG_ODDPG 0x4000 /* Odd even pte entry */ -#elif defined(ENABLE_MIPS_8KB_PAGE) -#define MIPS3_PG_SVPN 0xe000 /* Software page no mask */ -#define MIPS3_PG_HVPN 0xe000 /* Hardware page no mask */ -#define MIPS3_PG_NEXT 0x0040 /* next PFN */ -#elif defined(ENABLE_MIPS_4KB_PAGE) || 1 -#define MIPS3_PG_SVPN 0xf000 /* Software page no mask */ -#define MIPS3_PG_HVPN 0xe000 /* Hardware page no mask */ -#define MIPS3_PG_ODDPG 0x1000 /* Odd even pte entry */ +#ifndef PAGE_SHIFT +#error PAGE_SHIFT is not defined +#endif +#define MIPS3_PG_SVPN (0x PAGE_SHIFT) + /* Software page # mask */ +#if PAGE_SHIFT 1 +#define MIPS3_PG_HVPN MIPS3_PG_SVPN /* Hardware page # mask */ +#if !defined(_LOCORE) +#define MIPS3_PG_NEXT (1U (PAGE_SHIFT - MIPS3_PG_SHIFT - 1)) + /* next PFN */ +#elif defined(MIPS_4100) +#define MIPS3_PG_NEXT (1U (PAGE_SHIFT - MIPS3_4100_PG_SHIFT - 1)) + /* next PFN */ +#else +#define MIPS3_PG_NEXT (1U (PAGE_SHIFT - MIPS3_DEFAULT_PG_SHIFT - 1)) + /* next PFN */ +#endif +#else +#define MIPS3_PG_HVPN (MIPS3_PG_SVPN 1) /* Hardware page # mask */ +#define MIPS3_PG_ODDPG (1U PAGE_SHIFT) /* Odd even pte entry */ #endif -#define MIPS3_PG_ASID 0x00ff /* Address space ID */ +#define MIPS3_PG_ASID 0x03ff /* Address space ID */ #define MIPS3_PG_G 0x0001 /* Global; ignore ASID if in lo0 lo1 */ #define MIPS3_PG_V 0x0002 /* Valid */ #define MIPS3_PG_NV 0x @@ -214,7 +223,7 @@ CTASSERT(MIPS3_PG_SIZE_TO_MASK(8192) == #define MIPS4100_PG_SIZE_MASK_TO_SIZE(pg_mask) \ pg_mask) | 0x07ff) + 1) / 2) -#define MIPS4100_PG_SIZE_TO_MASK(pg_size) \ +#define MIPS4100_PG_SIZE_TO_MASK(pg_size) \ pg_size) * 2) - 1) ~0x07ff) #endif /* !_MIPS_MIPS3_PTE_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Fri Dec 23 18:52:33 UTC 2011
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h
Log Message:
Make CPUISMIPS3 deal with MIPS32R2 and MIPS64R2
Add mips_num_tlb_asids.
Allow a caller to cpu_identify to supply a cpuname (or NULL).
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.38 -r1.90.16.39 src/sys/arch/mips/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.38 src/sys/arch/mips/include/cpu.h:1.90.16.39
--- src/sys/arch/mips/include/cpu.h:1.90.16.38 Sat Dec 3 01:56:55 2011
+++ src/sys/arch/mips/include/cpu.h Fri Dec 23 18:52:32 2011
@@ -260,6 +260,7 @@ struct mips_options {
u_int mips_cpu_mhz; /* CPU speed in MHz, estimated by mc_cpuspeed(). */
u_int mips_cpu_flags;
u_int mips_num_tlb_entries;
+ u_int mips_num_tlb_asids;
mips_prid_t mips_cpu_id;
mips_prid_t mips_fpu_id;
bool mips_has_r4k_mmu;
@@ -399,8 +400,7 @@ extern struct mips_options mips_options;
#define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags CPU_MIPS_NO_LLADDR) == 0)
/* This test is ... rather bogus */
-#define CPUISMIPS3 ((mips_options.mips_cpu_arch \
- (CPU_ARCH_MIPS3 | CPU_ARCH_MIPS4 | CPU_ARCH_MIPS32 | CPU_ARCH_MIPS64)) != 0)
+#define CPUISMIPS3 ((mips_options.mips_cpu_arch (CPU_ARCH_MIPS3 | CPU_ARCH_MIPS4 | CPU_ARCH_MIPS32 | CPU_ARCH_MIPS64 | CPU_ARCH_MIPS32R2 | CPU_ARCH_MIPS64R2 )) != 0)
/* And these aren't much better while the previous test exists as is... */
#define CPUISMIPS4 ((mips_options.mips_cpu_arch CPU_ARCH_MIPS4) != 0)
@@ -641,7 +641,7 @@ void fpusave_cpu(struct cpu_info *);
/* mips_machdep.c */
void dumpsys(void);
int savectx(struct pcb *);
-void cpu_identify(device_t);
+void cpu_identify(device_t, const char *);
/* locore*.S */
int badaddr(void *, size_t);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Fri Dec 23 18:54:50 UTC 2011
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: mips_param.h vmparam.h
Log Message:
Use MIPS_PAGE_SHIFT to define the page size to be used from a config file.
Add support for tracking which colors have been used for an EXECPAGE.
To generate a diff of this commit:
cvs rdiff -u -r1.23.78.8 -r1.23.78.9 src/sys/arch/mips/include/mips_param.h
cvs rdiff -u -r1.41.28.22 -r1.41.28.23 src/sys/arch/mips/include/vmparam.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/mips_param.h
diff -u src/sys/arch/mips/include/mips_param.h:1.23.78.8 src/sys/arch/mips/include/mips_param.h:1.23.78.9
--- src/sys/arch/mips/include/mips_param.h:1.23.78.8 Sat Dec 3 01:44:04 2011
+++ src/sys/arch/mips/include/mips_param.h Fri Dec 23 18:54:50 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_param.h,v 1.23.78.8 2011/12/03 01:44:04 matt Exp $ */
+/* $NetBSD: mips_param.h,v 1.23.78.9 2011/12/23 18:54:50 matt Exp $ */
#ifdef _KERNEL
#include machine/cpu.h
@@ -39,17 +39,25 @@
#define SSIZE 1 /* initial stack size/NBPG */
#define SINCR 1 /* increment of stack/NBPG */
-#if defined(ENABLE_MIPS_16KB_PAGE) || defined(ENABLE_MIPS_8KB_PAGE)
+#ifdef PAGE_SHIFT
+#if MIPS_PAGE_SHIFT != PAGE_SHIFT
+#error MIPS_PAGE_SHIFT != PAGE_SHIFT
+#endif
+#elif defined(MIPS_PAGE_SHIFT)
+#define PAGE_SHIFT MIPS_PAGE_SHIFT
+#else
+#define PAGE_SHIFT 12
+#endif
+
+#if PAGE_SHIFT 1
#define UPAGES 1 /* pages of u-area */
-#define USPACE (UPAGES*NBPG) /* size of u-area in bytes */
-#elif defined(ENABLE_MIPS_4KB_PAGE) || 1
+#else
#define UPAGES 2 /* pages of u-area */
-#define USPACE (UPAGES*NBPG) /* size of u-area in bytes */
#define USPACE_ALIGN USPACE /* make sure it starts on a even VA */
-#else
-#error ENABLE_MIPS_xKB_PAGE not defined
#endif
+#define USPACE (UPAGES*NBPG) /* size of u-area in bytes */
+
#ifndef MSGBUFSIZE
#define MSGBUFSIZE NBPG /* default message buffer size */
#endif
@@ -73,13 +81,7 @@
#define ALIGN(p) (((uintptr_t)(p) + ALIGNBYTES) ~ALIGNBYTES)
#define ALIGNED_POINTER(p,t) uintptr_t)(p)) (sizeof(t)-1)) == 0)
-#ifdef ENABLE_MIPS_16KB_PAGE
-#define PGSHIFT 14 /* LOG2(NBPG) */
-#elif defined(ENABLE_MIPS_8KB_PAGE)
-#define PGSHIFT 13 /* LOG2(NBPG) */
-#else
-#define PGSHIFT 12 /* LOG2(NBPG) */
-#endif
+#define PGSHIFT PAGE_SHIFT /* LOG2(NBPG) */
#define NBPG (1 PGSHIFT) /* bytes/page */
#define PGOFSET (NBPG-1) /* byte offset into page */
#define NPTEPG (NBPG/4)
Index: src/sys/arch/mips/include/vmparam.h
diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.22 src/sys/arch/mips/include/vmparam.h:1.41.28.23
--- src/sys/arch/mips/include/vmparam.h:1.41.28.22 Fri Dec 2 00:01:37 2011
+++ src/sys/arch/mips/include/vmparam.h Fri Dec 23 18:54:50 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: vmparam.h,v 1.41.28.22 2011/12/02 00:01:37 matt Exp $ */
+/* $NetBSD: vmparam.h,v 1.41.28.23 2011/12/23 18:54:50 matt Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -51,17 +51,13 @@
*/
/*
- * We normally use a 4K page but may use 16K on MIPS systems.
+ * We normally use a 4K page but may use 8K, 16K, or 32K on MIPS systems.
* Override PAGE_* definitions to compile-time constants.
*/
-#ifdef ENABLE_MIPS_16KB_PAGE
-#define PAGE_SHIFT 14
-#elif defined(ENABLE_MIPS_8KB_PAGE)
-#define PAGE_SHIFT 13
-#elif defined(ENABLE_MIPS_4KB_PAGE) || 1
-#define PAGE_SHIFT 12
+#ifdef MIPS_PAGE_SHIFT
+#define PAGE_SHIFT MIPS_PAGE_SHIFT
#else
-#error ENABLE_MIPS_xKB_PAGE not defined
+#define PAGE_SHIFT 12
#endif
#define PAGE_SIZE (1 PAGE_SHIFT)
#define PAGE_MASK (PAGE_SIZE - 1)
@@ -177,7 +173,7 @@
#ifdef ENABLE_MIPS_TX3900
#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-0x0100) /* 0xFF00 */
#else
-#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-0x4000) /* 0xC000 */
+#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-0x8000) /* 0xFFF08000 */
#endif
#endif
#define VM_MAXUSER32_ADDRESS ((vaddr_t)(1UL 31))/* 0x8000 */
@@ -238,14 +234,21 @@ typedef struct pv_entry {
#define PG_MD_MODIFIED 0x0002 /* page has been modified */
#define PG_MD_REFERENCED 0x0004 /* page has been recently referenced */
#define PG_MD_POOLPAGE 0x0008 /* page is used as a poolpage */
-#define PG_MD_EXECPAGE 0x0010 /* page is exec mapped */
+#define PG_MD_EXECPAGE_SHIFT 8
+#define PG_MD_EXECPAGE(va) \
+ __BIT(PG_MD_EXECPAGE_SHIFT + atop(va MIPS_ICACHE_ALIAS_MASK))
+ /* page (color) is exec mapped */
+#define PG_MD_EXECPAGE_ANY (0xff PG_MD_EXECPAGE_SHIFT)
+ /* page is exec mapped */
#define PG_MD_CACHED_P(md) (((md)-pvh_attrs PG_MD_UNCACHED) == 0)
#define PG_MD_UNCACHED_P(md) (((md)-pvh_attrs PG_MD_UNCACHED) != 0)
#define PG_MD_MODIFIED_P(md) (((md)-pvh_attrs PG_MD_MODIFIED) != 0)
#define PG_MD_REFERENCED_P(md) (((md)-pvh_attrs PG_MD_REFERENCED) != 0)
#define
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri Nov 4 04:29:33 UTC 2011 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: Add RMI XLP ids To generate a diff of this commit: cvs rdiff -u -r1.74.28.21 -r1.74.28.22 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.21 src/sys/arch/mips/include/cpuregs.h:1.74.28.22 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.21 Thu May 26 19:21:55 2011 +++ src/sys/arch/mips/include/cpuregs.h Fri Nov 4 04:29:32 2011 @@ -908,6 +908,13 @@ /* * CPU processor IDs for company ID == 12 (RMI) */ +#define MIPS_XLP832 0x10 /* RMI XLP832 ISA 64 Rel 2 */ +#define MIPS_XLP816 0x14 /* RMI XLP816 ISA 64 Rel 2 */ +#define MIPS_XLP432 0x90 /* RMI XLP432 ISA 64 Rel 2 */ +#define MIPS_XLP416 0x94 /* RMI XLP416 ISA 64 Rel 2 */ +#define MIPS_XLP316 0xd4 /* RMI XLP316 ISA 64 Rel 2 */ +#define MIPS_XLP308 0xd5 /* RMI XLP308 ISA 64 Rel 2 */ +#define MIPS_XLP304 0xd7 /* RMI XLP304 ISA 64 Rel 2 */ #define MIPS_XLR308B 0x06 /* RMI XLR308-B ISA 64 */ #define MIPS_XLR508B 0x07 /* RMI XLR508-B ISA 64 */ #define MIPS_XLR516B 0x08 /* RMI XLR516-B ISA 64 */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Tue Feb 8 23:05:00 UTC 2011 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h Log Message: - fix cpu_number() define for non- MULTIPROCESSOR case To generate a diff of this commit: cvs rdiff -u -r1.90.16.34 -r1.90.16.35 src/sys/arch/mips/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpu.h diff -u src/sys/arch/mips/include/cpu.h:1.90.16.34 src/sys/arch/mips/include/cpu.h:1.90.16.35 --- src/sys/arch/mips/include/cpu.h:1.90.16.34 Tue Feb 8 06:01:08 2011 +++ src/sys/arch/mips/include/cpu.h Tue Feb 8 23:04:59 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.90.16.34 2011/02/08 06:01:08 cliff Exp $ */ +/* $NetBSD: cpu.h,v 1.90.16.35 2011/02/08 23:04:59 cliff Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -202,7 +202,7 @@ #define cpu_number() (curcpu()-ci_index) #define CPU_IS_PRIMARY(ci) ((ci)-ci_flags CPUF_PRIMARY) #else -#define cpu_number() (0L) +#define cpu_number() 0 #endif /* XXX simonb
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Tue Feb 8 06:01:09 UTC 2011 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h Log Message: - re-define cpu_number() to now mean ci_index instead of ci_cpuid - re-define CPU_IS_PRIMARY() to use CPUF_PRIMARY instead of ci_cpuid To generate a diff of this commit: cvs rdiff -u -r1.90.16.33 -r1.90.16.34 src/sys/arch/mips/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpu.h diff -u src/sys/arch/mips/include/cpu.h:1.90.16.33 src/sys/arch/mips/include/cpu.h:1.90.16.34 --- src/sys/arch/mips/include/cpu.h:1.90.16.33 Sat Feb 5 06:04:07 2011 +++ src/sys/arch/mips/include/cpu.h Tue Feb 8 06:01:08 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.90.16.33 2011/02/05 06:04:07 cliff Exp $ */ +/* $NetBSD: cpu.h,v 1.90.16.34 2011/02/08 06:01:08 cliff Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -199,8 +199,8 @@ #define curcpu() (curlwp-l_cpu) #define curpcb (curlwp-l_addr-u_pcb) #ifdef MULTIPROCESSOR -#define cpu_number() (curcpu()-ci_cpuid) -#define CPU_IS_PRIMARY(ci) ((ci)-ci_cpuid == 0) +#define cpu_number() (curcpu()-ci_index) +#define CPU_IS_PRIMARY(ci) ((ci)-ci_flags CPUF_PRIMARY) #else #define cpu_number() (0L) #endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: cliff
Date: Sat Feb 5 06:04:08 UTC 2011
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h
Log Message:
- include cpuset.h, we're using CPUSET_* macros now for cpus_running,
cpus_paused, etc.
those data are now type mips_cpuset_t.
- move opt_* includes up above sys/* includes
- add declarations for IPI broadcast, multicast functions
- add declarations for cpu halt, pause, resume, etc functions useful for ddb
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.32 -r1.90.16.33 src/sys/arch/mips/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.32 src/sys/arch/mips/include/cpu.h:1.90.16.33
--- src/sys/arch/mips/include/cpu.h:1.90.16.32 Wed Sep 1 00:59:42 2010
+++ src/sys/arch/mips/include/cpu.h Sat Feb 5 06:04:07 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.90.16.32 2010/09/01 00:59:42 matt Exp $ */
+/* $NetBSD: cpu.h,v 1.90.16.33 2011/02/05 06:04:07 cliff Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -46,16 +46,18 @@
#ifdef _KERNEL
#ifndef _LOCORE
-#include sys/cpu_data.h
-#include sys/device.h
-#include sys/evcnt.h
-
#if defined(_KERNEL_OPT)
#include opt_cputype.h
#include opt_lockdebug.h
#include opt_multiprocessor.h
#endif
+#include sys/cpu_data.h
+#include sys/device.h
+#include sys/evcnt.h
+#include mips/reg.h
+#include mips/cpuset.h
+
struct cpu_info {
struct cpu_data ci_data; /* MI per-cpu data */
struct cpu_info *ci_next; /* Next CPU in list */
@@ -352,6 +354,16 @@
#define cpu_swapout(p) panic(cpu_swapout: can't get here);
/*
+ * Send an inter-processor interupt to each other CPU (excludes curcpu())
+ */
+void cpu_broadcast_ipi(int);
+
+/*
+ * Send an inter-processor interupt to CPUs in cpuset (excludes curcpu())
+ */
+void cpu_multicast_ipi(mips_cpuset_t, int);
+
+/*
* Send an inter-processor interupt to another CPU.
*/
int cpu_send_ipi(struct cpu_info *, int);
@@ -426,13 +438,6 @@
extern int mips_poolpage_vmfreelist; /* freelist to allocate poolpages */
-/* cpu_subr.c */
-#ifdef MULTIPROCESSOR
-extern volatile u_long cpus_running;
-extern volatile u_long cpus_hatched;
-extern volatile u_long cpus_halted;
-#endif
-
struct cpu_info *
cpu_info_alloc(struct pmap_tlb_info *, cpuid_t, cpuid_t, cpuid_t,
cpuid_t);
@@ -441,10 +446,25 @@
#ifdef _LP64
void cpu_vmspace_exec(struct lwp *, vaddr_t, vaddr_t);
#endif
+
#ifdef MULTIPROCESSOR
void cpu_hatch(struct cpu_info *ci);
void cpu_trampoline(void);
void cpu_boot_secondary_processors(void);
+void cpu_halt(void);
+void cpu_halt_others(void);
+void cpu_pause(struct reg *);
+void cpu_pause_others(void);
+void cpu_resume(int);
+void cpu_resume_others(void);
+int cpu_is_paused(int);
+void cpu_debug_dump(void);
+
+extern volatile mips_cpuset_t cpus_running;
+extern volatile mips_cpuset_t cpus_hatched;
+extern volatile mips_cpuset_t cpus_paused;
+extern volatile mips_cpuset_t cpus_resumed;
+extern volatile mips_cpuset_t cpus_halted;
#endif
/* copy.S */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Sat Feb 5 06:04:59 UTC 2011 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: db_machdep.h Log Message: - declare new md MP ddb functions. To generate a diff of this commit: cvs rdiff -u -r1.22.62.1 -r1.22.62.2 src/sys/arch/mips/include/db_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/db_machdep.h diff -u src/sys/arch/mips/include/db_machdep.h:1.22.62.1 src/sys/arch/mips/include/db_machdep.h:1.22.62.2 --- src/sys/arch/mips/include/db_machdep.h:1.22.62.1 Mon Feb 1 04:16:19 2010 +++ src/sys/arch/mips/include/db_machdep.h Sat Feb 5 06:04:59 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: db_machdep.h,v 1.22.62.1 2010/02/01 04:16:19 matt Exp $ */ +/* $NetBSD: db_machdep.h,v 1.22.62.2 2011/02/05 06:04:59 cliff Exp $ */ /* * Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author) @@ -113,6 +113,13 @@ db_addr_t branch_taken(int inst, db_addr_t pc, db_regs_t *regs); db_addr_t next_instr_address(db_addr_t pc, bool bd); +bool ddb_running_on_this_cpu(void); +bool ddb_running_on_any_cpu(void); +void db_resume_others(void); +#ifdef MIPS_DDB_WATCH +void db_mach_watch_set_all(void); +#endif + /* * We have machine-dependent commands. */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: cliff
Date: Sat Feb 5 06:05:35 UTC 2011
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: intr.h
Log Message:
- include opt_multiprocessor.h for MULTIPROCESSOR dependency
- add IPI tag defines for SUSPEND, HALT, and bump NIPIS
To generate a diff of this commit:
cvs rdiff -u -r1.3.96.14 -r1.3.96.15 src/sys/arch/mips/include/intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/intr.h
diff -u src/sys/arch/mips/include/intr.h:1.3.96.14 src/sys/arch/mips/include/intr.h:1.3.96.15
--- src/sys/arch/mips/include/intr.h:1.3.96.14 Wed Dec 22 06:09:02 2010
+++ src/sys/arch/mips/include/intr.h Sat Feb 5 06:05:35 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.3.96.14 2010/12/22 06:09:02 matt Exp $ */
+/* $NetBSD: intr.h,v 1.3.96.15 2011/02/05 06:05:35 cliff Exp $ */
/*-
* Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -31,6 +31,8 @@
#ifndef _MIPS_INTR_H_
#define _MIPS_INTR_H_
+#include opt_multiprocessor.h
+
/*
* This is a common machine/intr.h for all MIPS platforms.
*/
@@ -63,7 +65,9 @@
#define IPI_FPSAVE 3 /* save current fp registers */
#define IPI_SYNCICACHE 4 /* sync icache for pages */
#define IPI_KPREEMPT 5 /* schedule a kernel preemption */
-#define NIPIS 6
+#define IPI_SUSPEND 6 /* DDB suspend signaling */
+#define IPI_HALT 7 /* halt cpu */
+#define NIPIS 8
#ifdef __INTR_PRIVATE
struct splsw {
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Sat Feb 5 06:17:41 UTC 2011 Added Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuset.h Log Message: add cpuset.h to allow abstracting bit-per-cpu run state variables (cpus_running et. al.) To generate a diff of this commit: cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/include/cpuset.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Added files: Index: src/sys/arch/mips/include/cpuset.h diff -u /dev/null src/sys/arch/mips/include/cpuset.h:1.1.2.1 --- /dev/null Sat Feb 5 06:17:41 2011 +++ src/sys/arch/mips/include/cpuset.h Sat Feb 5 06:17:41 2011 @@ -0,0 +1,54 @@ +/* $NetBSD: cpuset.h,v 1.1.2.1 2011/02/05 06:17:41 cliff Exp $ */ +/* $NetBSD: cpuset.h,v 1.1.2.1 2011/02/05 06:17:41 cliff Exp $ */ + +/*- + * Copyright (c) 2004 The NetBSD Foundation, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + *notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + *notice, this list of conditions and the following disclaimer in the + *documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _MIPS_CPUSET_H_ +#define _MIPS_CPUSET_H_ + +#include sys/atomic.h + +#define CPUSET_MAXNUMCPU 64 +typedef uint64_t mips_cpuset_t; + +#define CPUSET_SINGLE(cpu) ((mips_cpuset_t)1 (cpu)) + +#define CPUSET_ADD(set, cpu) atomic_or_64((volatile uint64_t *)(set), CPUSET_SINGLE(cpu)) +#define CPUSET_DEL(set, cpu) atomic_and_64((volatile uint64_t *)(set), ~CPUSET_SINGLE(cpu)) +#define CPUSET_SUB(set1, set2) atomic_and_64((volatile uint64_t *)(set1), ~(set2)) + +#define CPUSET_EXCEPT(set, cpu) ((set) ~CPUSET_SINGLE(cpu)) + +#define CPUSET_HAS(set, cpu) ((set) CPUSET_SINGLE(cpu)) +#define CPUSET_NEXT(set) (ffs(set) - 1) + +#define CPUSET_EMPTY(set) ((set) == (mips_cpuset_t)0) +#define CPUSET_EQUAL(set1, set2) ((set1) == (set2)) +#define CPUSET_CLEAR(set) ((set) = (mips_cpuset_t)0) +#define CPUSET_ASSIGN(set1, set2) ((set1) = (set2)) + +#endif /* _MIPS_CPUSET_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Wed Dec 29 00:34:45 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: mips_opcode.h Log Message: Add OPC_PREF and OPC_RSVD073 To generate a diff of this commit: cvs rdiff -u -r1.12.96.1 -r1.12.96.2 src/sys/arch/mips/include/mips_opcode.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/mips_opcode.h diff -u src/sys/arch/mips/include/mips_opcode.h:1.12.96.1 src/sys/arch/mips/include/mips_opcode.h:1.12.96.2 --- src/sys/arch/mips/include/mips_opcode.h:1.12.96.1 Sat May 15 20:27:48 2010 +++ src/sys/arch/mips/include/mips_opcode.h Wed Dec 29 00:34:44 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: mips_opcode.h,v 1.12.96.1 2010/05/15 20:27:48 matt Exp $ */ +/* $NetBSD: mips_opcode.h,v 1.12.96.2 2010/12/29 00:34:44 matt Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -173,7 +173,7 @@ #define OP_LWC0 OP_LL /* backwards source compatibility */ #define OP_LWC1 061 #define OP_LWC2 062 -#define OP_LWC3 063 +#define OP_PREF 063 #define OP_LLD 064 /* MIPS-II, for r4000 port */ #define OP_LDC1 065 #define OP_LD 067 /* MIPS-II, for r4000 port */ @@ -182,7 +182,7 @@ #define OP_SWC0 OP_SC /* backwards source compatibility */ #define OP_SWC1 071 #define OP_SWC2 072 -#define OP_SWC3 073 +#define OP_RSVD073 073 #define OP_SCD 074 /* MIPS-II, for r4000 port */ #define OP_SDC1 075 #define OP_SD 077 /* MIPS-II, for r4000 port */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri Dec 24 07:16:50 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: asm.h Log Message: MIPS_LOCK_RAS_SIZE needs to be 256 since each RAS need 64 bytes and we can have 4 of them. To generate a diff of this commit: cvs rdiff -u -r1.40.38.12 -r1.40.38.13 src/sys/arch/mips/include/asm.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/asm.h diff -u src/sys/arch/mips/include/asm.h:1.40.38.12 src/sys/arch/mips/include/asm.h:1.40.38.13 --- src/sys/arch/mips/include/asm.h:1.40.38.12 Mon Feb 15 03:12:17 2010 +++ src/sys/arch/mips/include/asm.h Fri Dec 24 07:16:50 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.40.38.12 2010/02/15 03:12:17 matt Exp $ */ +/* $NetBSD: asm.h,v 1.40.38.13 2010/12/24 07:16:50 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -617,7 +617,7 @@ #endif /* See lock_stubs.S. */ -#define MIPS_LOCK_RAS_SIZE 128 +#define MIPS_LOCK_RAS_SIZE (4*64) #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off)
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Wed Dec 22 06:09:02 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: intr.h Log Message: Cleanup definition of __HAVE_PREEMPTION To generate a diff of this commit: cvs rdiff -u -r1.3.96.13 -r1.3.96.14 src/sys/arch/mips/include/intr.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/intr.h diff -u src/sys/arch/mips/include/intr.h:1.3.96.13 src/sys/arch/mips/include/intr.h:1.3.96.14 --- src/sys/arch/mips/include/intr.h:1.3.96.13 Wed Jun 9 14:24:12 2010 +++ src/sys/arch/mips/include/intr.h Wed Dec 22 06:09:02 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: intr.h,v 1.3.96.13 2010/06/09 14:24:12 matt Exp $ */ +/* $NetBSD: intr.h,v 1.3.96.14 2010/12/22 06:09:02 matt Exp $ */ /*- * Copyright (c) 2009, 2010 The NetBSD Foundation, Inc. * All rights reserved. @@ -98,8 +98,9 @@ } ipl_cookie_t; #ifdef _KERNEL -#ifdef MULTIPROCESSOR -#define __HAVE_PREEMPTION + +#if defined(MULTIPROCESSOR) defined(__HAVE_FAST_SOFTINTS) +#define __HAVE_PREEMPTION 1 #define SOFTINT_KPREEMPT (SOFTINT_COUNT+0) #endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Thu Aug 19 07:19:31 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h Log Message: Redefine VM_MAXUSER_ADDRESS in terms of PGSHIFT (no functional changes) To generate a diff of this commit: cvs rdiff -u -r1.41.28.16 -r1.41.28.17 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.16 src/sys/arch/mips/include/vmparam.h:1.41.28.17 --- src/sys/arch/mips/include/vmparam.h:1.41.28.16 Mon Aug 16 18:01:13 2010 +++ src/sys/arch/mips/include/vmparam.h Thu Aug 19 07:19:31 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41.28.16 2010/08/16 18:01:13 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.41.28.17 2010/08/19 07:19:31 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -190,7 +190,8 @@ */ #define VM_MIN_ADDRESS ((vaddr_t)0x) #ifdef _LP64 -#define VM_MAXUSER_ADDRESS ((vaddr_t) 1L 40) /* 0x0100 */ +#define VM_MAXUSER_ADDRESS ((vaddr_t) 1L (4*PGSHIFT-8)) + /* 0x0100 */ #define VM_MAX_ADDRESS VM_MAXUSER_ADDRESS #define VM_MIN_KERNEL_ADDRESS ((vaddr_t) 3L 62) /* 0xC000 */ #define VM_MAX_KERNEL_ADDRESS ((vaddr_t) -1L 31) /* 0x8000 */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Wed Jun 9 14:24:12 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: intr.h
Log Message:
Add a _IPL_NAMES(pfx) which is a list of strings corresponding to the
IPL names.
To generate a diff of this commit:
cvs rdiff -u -r1.3.96.12 -r1.3.96.13 src/sys/arch/mips/include/intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/intr.h
diff -u src/sys/arch/mips/include/intr.h:1.3.96.12 src/sys/arch/mips/include/intr.h:1.3.96.13
--- src/sys/arch/mips/include/intr.h:1.3.96.12 Sun May 16 00:34:45 2010
+++ src/sys/arch/mips/include/intr.h Wed Jun 9 14:24:12 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.3.96.12 2010/05/16 00:34:45 matt Exp $ */
+/* $NetBSD: intr.h,v 1.3.96.13 2010/06/09 14:24:12 matt Exp $ */
/*-
* Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -46,6 +46,8 @@
#define IPL_HIGH (IPL_DDB+1)
#define _IPL_N (IPL_HIGH+1)
+#define _IPL_NAMES(pfx) { pfxnone, pfxsoftclock/bio, pfxsoftnet/serial, \
+ pfxvm, pfxsched, pfxddb, pfxhigh }
#define IST_UNUSABLE -1 /* interrupt cannot be used */
#define IST_NONE 0 /* none (dummy) */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: cliff
Date: Thu Jun 10 00:32:11 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: locore.h
Log Message:
- add lsw_bus_error to struct locoresw, provides hook to call
for chip-specific bus error handling/decode from e.g. trap()
To generate a diff of this commit:
cvs rdiff -u -r1.78.36.1.2.24 -r1.78.36.1.2.25 \
src/sys/arch/mips/include/locore.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/locore.h
diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.24 src/sys/arch/mips/include/locore.h:1.78.36.1.2.25
--- src/sys/arch/mips/include/locore.h:1.78.36.1.2.24 Tue May 11 22:08:02 2010
+++ src/sys/arch/mips/include/locore.h Thu Jun 10 00:32:11 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.78.36.1.2.24 2010/05/11 22:08:02 matt Exp $ */
+/* $NetBSD: locore.h,v 1.78.36.1.2.25 2010/06/10 00:32:11 cliff Exp $ */
/*
* This file should not be included by MI code!!!
@@ -360,6 +360,7 @@
int (*lsw_send_ipi)(struct cpu_info *, int);
void (*lsw_cpu_offline_md)(void);
void (*lsw_cpu_init)(struct cpu_info *);
+ int (*lsw_bus_error)(unsigned int);
};
struct mips_vmfreelist {
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat May 29 18:04:11 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h Log Message: Increase *SSIZ/*DSIZ/*TSIZ for non-O32 environments since they will use more stack and data than the old O32 environments. To generate a diff of this commit: cvs rdiff -u -r1.41.28.14 -r1.41.28.15 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.14 src/sys/arch/mips/include/vmparam.h:1.41.28.15 --- src/sys/arch/mips/include/vmparam.h:1.41.28.14 Fri May 28 21:23:21 2010 +++ src/sys/arch/mips/include/vmparam.h Sat May 29 18:04:11 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41.28.14 2010/05/28 21:23:21 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.41.28.15 2010/05/29 18:04:11 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -96,7 +96,8 @@ * * USRSTACK needs to start a little below 0x800 because the R8000 * and some QED CPUs perform some virtual address checks before the - * offset is calculated. + * offset is calculated. We use 0x8000 since that's the max displacement + * in an instruction. */ #define USRSTACK (VM_MAXUSER_ADDRESS-0x8000) /* Start of user stack */ #define USRSTACK32 ((uint32_t)VM_MAXUSER32_ADDRESS-0x8000) @@ -107,6 +108,7 @@ /* * Virtual memory related constants, all in bytes */ +#if defined(__mips_o32) #ifndef MAXTSIZ #define MAXTSIZ (64*1024*1024) /* max text size */ #endif @@ -122,6 +124,26 @@ #ifndef MAXSSIZ #define MAXSSIZ (32*1024*1024) /* max stack size */ #endif +#else +/* + * 64-bit ABIs need more space. + */ +#ifndef MAXTSIZ +#define MAXTSIZ (128*1024*1024) /* max text size */ +#endif +#ifndef DFLDSIZ +#define DFLDSIZ (256*1024*1024) /* initial data size limit */ +#endif +#ifndef MAXDSIZ +#define MAXDSIZ (1536*1024*1024) /* max data size */ +#endif +#ifndef DFLSSIZ +#define DFLSSIZ (16*1024*1024) /* initial stack size limit */ +#endif +#ifndef MAXSSIZ +#define MAXSSIZ (120*1024*1024) /* max stack size */ +#endif +#endif /* !__mips_o32 */ /* * Virtual memory related constants, all in bytes
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri May 28 21:23:21 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h Log Message: Make sure that user stack starts 32KB below maximum so that accesses with displacements will never cross the VM_MAXUSER_ADDRESS boundary. To generate a diff of this commit: cvs rdiff -u -r1.41.28.13 -r1.41.28.14 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.13 src/sys/arch/mips/include/vmparam.h:1.41.28.14 --- src/sys/arch/mips/include/vmparam.h:1.41.28.13 Thu Mar 11 08:19:01 2010 +++ src/sys/arch/mips/include/vmparam.h Fri May 28 21:23:21 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41.28.13 2010/03/11 08:19:01 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.41.28.14 2010/05/28 21:23:21 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -98,8 +98,8 @@ * and some QED CPUs perform some virtual address checks before the * offset is calculated. */ -#define USRSTACK (VM_MAXUSER_ADDRESS-PAGE_SIZE) /* Start of user stack */ -#define USRSTACK32 ((uint32_t)VM_MAXUSER32_ADDRESS-PAGE_SIZE) +#define USRSTACK (VM_MAXUSER_ADDRESS-0x8000) /* Start of user stack */ +#define USRSTACK32 ((uint32_t)VM_MAXUSER32_ADDRESS-0x8000) /* alignment requirement for u-area space in bytes */ #define USPACE_ALIGN USPACE
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Sat May 15 23:11:38 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: intr.h
Log Message:
Make sure we have a spare cell at the sr_map to make splintr will stop.
To generate a diff of this commit:
cvs rdiff -u -r1.3.96.10 -r1.3.96.11 src/sys/arch/mips/include/intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/intr.h
diff -u src/sys/arch/mips/include/intr.h:1.3.96.10 src/sys/arch/mips/include/intr.h:1.3.96.11
--- src/sys/arch/mips/include/intr.h:1.3.96.10 Wed Mar 24 19:23:02 2010
+++ src/sys/arch/mips/include/intr.h Sat May 15 23:11:38 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.3.96.10 2010/03/24 19:23:02 cliff Exp $ */
+/* $NetBSD: intr.h,v 1.3.96.11 2010/05/15 23:11:38 matt Exp $ */
/*-
* Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -83,7 +83,7 @@
};
struct ipl_sr_map {
- uint32_t sr_bits[_IPL_N];
+ uint32_t sr_bits[_IPL_N+1];
};
#else
struct splsw;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Tue May 11 21:51:34 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: locore.h Log Message: Need to turn KX for N32 kernels with mips3_lw_a64 and mips3_sw_a64 To generate a diff of this commit: cvs rdiff -u -r1.78.36.1.2.22 -r1.78.36.1.2.23 \ src/sys/arch/mips/include/locore.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/locore.h diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.22 src/sys/arch/mips/include/locore.h:1.78.36.1.2.23 --- src/sys/arch/mips/include/locore.h:1.78.36.1.2.22 Sun Mar 21 17:38:32 2010 +++ src/sys/arch/mips/include/locore.h Tue May 11 21:51:34 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.h,v 1.78.36.1.2.22 2010/03/21 17:38:32 cliff Exp $ */ +/* $NetBSD: locore.h,v 1.78.36.1.2.23 2010/05/11 21:51:34 matt Exp $ */ /* * This file should not be included by MI code!!! @@ -279,6 +279,11 @@ ); mips_cp0_status_write(sr); +#elif defined(__mips_n32) + uint32_t sr = mips_cp0_status_read(); + mips_cp0_status_write((sr ~MIPS_SR_INT_IE) | MIPS3_SR_KX); + rv = *(const uint32_t *)addr; + mips_cp0_status_write(sr); #elif defined(_LP64) rv = *(const uint32_t *)addr; #else @@ -311,6 +316,11 @@ ); mips_cp0_status_write(sr); +#elif defined(__mips_n32) + uint32_t sr = mips_cp0_status_read(); + mips_cp0_status_write((sr ~MIPS_SR_INT_IE) | MIPS3_SR_KX); + *(uint32_t *)addr = val; + mips_cp0_status_write(sr); #elif defined(_LP64) *(uint32_t *)addr = val; #else
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Tue May 11 22:08:02 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: locore.h Log Message: Use assembly since deref a 64bit value as a pointer does not make a 32bit compiler happy. To generate a diff of this commit: cvs rdiff -u -r1.78.36.1.2.23 -r1.78.36.1.2.24 \ src/sys/arch/mips/include/locore.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/locore.h diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.23 src/sys/arch/mips/include/locore.h:1.78.36.1.2.24 --- src/sys/arch/mips/include/locore.h:1.78.36.1.2.23 Tue May 11 21:51:34 2010 +++ src/sys/arch/mips/include/locore.h Tue May 11 22:08:02 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.h,v 1.78.36.1.2.23 2010/05/11 21:51:34 matt Exp $ */ +/* $NetBSD: locore.h,v 1.78.36.1.2.24 2010/05/11 22:08:02 matt Exp $ */ /* * This file should not be included by MI code!!! @@ -282,12 +282,12 @@ #elif defined(__mips_n32) uint32_t sr = mips_cp0_status_read(); mips_cp0_status_write((sr ~MIPS_SR_INT_IE) | MIPS3_SR_KX); - rv = *(const uint32_t *)addr; + __asm volatile(lw %0, 0(%1) : =r(rv) : d(addr)); mips_cp0_status_write(sr); #elif defined(_LP64) rv = *(const uint32_t *)addr; #else - __asm volatile(lw %0, 0(%1) : =r(rv) : d(addr)); +#error unknown ABI #endif return (rv); } @@ -319,12 +319,12 @@ #elif defined(__mips_n32) uint32_t sr = mips_cp0_status_read(); mips_cp0_status_write((sr ~MIPS_SR_INT_IE) | MIPS3_SR_KX); - *(uint32_t *)addr = val; + __asm volatile(sw %1, 0(%0) :: d(addr), r(val)); mips_cp0_status_write(sr); #elif defined(_LP64) *(uint32_t *)addr = val; #else - __asm volatile(sw %1, 0(%0) :: d(addr), r(val)); +#error unknown ABI #endif } #endif /* MIPS3 || MIPS4 || MIPS64 */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Tue May 4 17:15:53 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: pmap.h Log Message: Add pm_flags and PMAP_DEFERRED_ACTIVATE To generate a diff of this commit: cvs rdiff -u -r1.54.26.12 -r1.54.26.13 src/sys/arch/mips/include/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/pmap.h diff -u src/sys/arch/mips/include/pmap.h:1.54.26.12 src/sys/arch/mips/include/pmap.h:1.54.26.13 --- src/sys/arch/mips/include/pmap.h:1.54.26.12 Thu Mar 11 08:19:01 2010 +++ src/sys/arch/mips/include/pmap.h Tue May 4 17:15:53 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.54.26.12 2010/03/11 08:19:01 matt Exp $ */ +/* $NetBSD: pmap.h,v 1.54.26.13 2010/05/04 17:15:53 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -166,6 +166,8 @@ #endif struct segtab *pm_segtab; /* pointers to pages of PTEs */ u_int pm_count; /* pmap reference count */ + u_int pm_flags; +#define PMAP_DEFERRED_ACTIVATE 0x0001 struct pmap_statistics pm_stats; /* pmap statistics */ struct pmap_asid_info pm_pai[1]; } *pmap_t;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri Apr 30 16:32:16 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: mcontext.h Log Message: Define mcontext_o32_t if !O32 To generate a diff of this commit: cvs rdiff -u -r1.8.18.3 -r1.8.18.4 src/sys/arch/mips/include/mcontext.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/mcontext.h diff -u src/sys/arch/mips/include/mcontext.h:1.8.18.3 src/sys/arch/mips/include/mcontext.h:1.8.18.4 --- src/sys/arch/mips/include/mcontext.h:1.8.18.3 Sun Sep 13 23:38:04 2009 +++ src/sys/arch/mips/include/mcontext.h Fri Apr 30 16:32:16 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.8.18.3 2009/09/13 23:38:04 matt Exp $ */ +/* $NetBSD: mcontext.h,v 1.8.18.4 2010/04/30 16:32:16 matt Exp $ */ /*- * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. @@ -127,7 +127,7 @@ __fpregset_t __fpregs; } mcontext_t; -#if defined(_KERNEL) defined(_LP64) +#if defined(_KERNEL) !defined(__mips_o32) typedef __int32_t __greg32_t; typedef __greg32_t __gregset32_t[_NGREG];
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Tue Apr 27 05:44:30 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: seperate RMI CPU revision codes from RMI CPU processor codes and improve comment To generate a diff of this commit: cvs rdiff -u -r1.74.28.17 -r1.74.28.18 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.17 src/sys/arch/mips/include/cpuregs.h:1.74.28.18 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.17 Mon Mar 29 23:33:00 2010 +++ src/sys/arch/mips/include/cpuregs.h Tue Apr 27 05:44:30 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.17 2010/03/29 23:33:00 cliff Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.18 2010/04/27 05:44:30 cliff Exp $ */ /* * Copyright (c) 1992, 1993 @@ -871,12 +871,15 @@ #define MIPS_SR7100 0x04 /* SandCraft SR7100 ISA 64 */ /* - * CPU processor revision IDs for company ID == 12 (RMI) - * note: the XLR Pid value meaning depends on - * the Rev value (Stepping B2 or C4) + * CPU revision IDs for company ID == 12 (RMI) + * note: unlisted Rev values may indicate pre-production silicon + */ +#define MIPS_XLR_B2 0x04 /* RMI XLR Production Rev B2 */ +#define MIPS_XLR_C4 0x91 /* RMI XLR Production Rev C4 */ + +/* + * CPU processor IDs for company ID == 12 (RMI) */ -#define MIPS_XLR_B2 0x04 /* RMI XLR Rev B2 */ -#define MIPS_XLR_C4 0x91 /* RMI XLR Rev C4 */ #define MIPS_XLR308B 0x06 /* RMI XLR308-B ISA 64 */ #define MIPS_XLR508B 0x07 /* RMI XLR508-B ISA 64 */ #define MIPS_XLR516B 0x08 /* RMI XLR516-B ISA 64 */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Mon Mar 29 23:33:00 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: - fix XLR Pid defines; RMI Pid meaning depends on the Rev value (Stepping B2 or C4) To generate a diff of this commit: cvs rdiff -u -r1.74.28.16 -r1.74.28.17 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.16 src/sys/arch/mips/include/cpuregs.h:1.74.28.17 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.16 Sun Mar 21 18:18:51 2010 +++ src/sys/arch/mips/include/cpuregs.h Mon Mar 29 23:33:00 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.16 2010/03/21 18:18:51 cliff Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.17 2010/03/29 23:33:00 cliff Exp $ */ /* * Copyright (c) 1992, 1993 @@ -872,13 +872,23 @@ /* * CPU processor revision IDs for company ID == 12 (RMI) + * note: the XLR Pid value meaning depends on + * the Rev value (Stepping B2 or C4) */ -#define MIPS_XLR732 0x00 /* RMI XLR732-C ISA 64 */ -#define MIPS_XLR716 0x02 /* RMI XLR716-C ISA 64 */ -#define MIPS_XLR532 0x08 /* RMI XLR532-C ISA 64 */ -#define MIPS_XLR516 0x0a /* RMI XLR516-C ISA 64 */ -#define MIPS_XLR508 0x0b /* RMI XLR508-C ISA 64 */ -#define MIPS_XLR308 0x0f /* RMI XLR308-C ISA 64 */ +#define MIPS_XLR_B2 0x04 /* RMI XLR Rev B2 */ +#define MIPS_XLR_C4 0x91 /* RMI XLR Rev C4 */ +#define MIPS_XLR308B 0x06 /* RMI XLR308-B ISA 64 */ +#define MIPS_XLR508B 0x07 /* RMI XLR508-B ISA 64 */ +#define MIPS_XLR516B 0x08 /* RMI XLR516-B ISA 64 */ +#define MIPS_XLR532B 0x09 /* RMI XLR532-B ISA 64 */ +#define MIPS_XLR716B 0x0a /* RMI XLR716-B ISA 64 */ +#define MIPS_XLR732B 0x0b /* RMI XLR732-B ISA 64 */ +#define MIPS_XLR732C 0x00 /* RMI XLR732-C ISA 64 */ +#define MIPS_XLR716C 0x02 /* RMI XLR716-C ISA 64 */ +#define MIPS_XLR532C 0x08 /* RMI XLR532-C ISA 64 */ +#define MIPS_XLR516C 0x0a /* RMI XLR516-C ISA 64 */ +#define MIPS_XLR508C 0x0b /* RMI XLR508-C ISA 64 */ +#define MIPS_XLR308C 0x0f /* RMI XLR308-C ISA 64 */ #define MIPS_XLS616 0x40 /* RMI XLS616 ISA 64 */ #define MIPS_XLS416 0x44 /* RMI XLS416 ISA 64 */ #define MIPS_XLS608 0x4A /* RMI XLS608 ISA 64 */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: cliff
Date: Wed Mar 24 19:23:03 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: intr.h
Log Message:
- add IPI_AST variant of IPI_NOP to allow seperate event counting
To generate a diff of this commit:
cvs rdiff -u -r1.3.96.9 -r1.3.96.10 src/sys/arch/mips/include/intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/intr.h
diff -u src/sys/arch/mips/include/intr.h:1.3.96.9 src/sys/arch/mips/include/intr.h:1.3.96.10
--- src/sys/arch/mips/include/intr.h:1.3.96.9 Sun Mar 21 18:21:15 2010
+++ src/sys/arch/mips/include/intr.h Wed Mar 24 19:23:02 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.3.96.9 2010/03/21 18:21:15 cliff Exp $ */
+/* $NetBSD: intr.h,v 1.3.96.10 2010/03/24 19:23:02 cliff Exp $ */
/*-
* Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -55,11 +55,12 @@
#define IST_LEVEL_LOW 5 /* level triggered, active low */
#define IPI_NOP 0 /* do nothing, interrupt only */
-#define IPI_SHOOTDOWN 1 /* do a tlb shootdown */
-#define IPI_FPSAVE 2 /* save current fp registers */
-#define IPI_SYNCICACHE 3 /* sync icache for pages */
-#define IPI_KPREEMPT 4 /* schedule a kernel preemption */
-#define NIPIS 5
+#define IPI_AST 1 /* force ast */
+#define IPI_SHOOTDOWN 2 /* do a tlb shootdown */
+#define IPI_FPSAVE 3 /* save current fp registers */
+#define IPI_SYNCICACHE 4 /* sync icache for pages */
+#define IPI_KPREEMPT 5 /* schedule a kernel preemption */
+#define NIPIS 6
#ifdef __INTR_PRIVATE
struct splsw {
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Sun Mar 21 18:17:21 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h Log Message: - add ci_next_cp0_clk_intr, ci_count_compare_evcnt, ci_count_compare_missed_evcnt to struct cpu_info, for per-CPU count/compare clock programming - add ci_request_ipis to struct cpu_info to allow passing IPI tags on systems where hardware does not provide such feature; use atomic ops for this. - declaration of mips_vector_init was moved from here to mips/include/locore.h To generate a diff of this commit: cvs rdiff -u -r1.90.16.27 -r1.90.16.28 src/sys/arch/mips/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpu.h diff -u src/sys/arch/mips/include/cpu.h:1.90.16.27 src/sys/arch/mips/include/cpu.h:1.90.16.28 --- src/sys/arch/mips/include/cpu.h:1.90.16.27 Thu Mar 11 08:19:01 2010 +++ src/sys/arch/mips/include/cpu.h Sun Mar 21 18:17:21 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.90.16.27 2010/03/11 08:19:01 matt Exp $ */ +/* $NetBSD: cpu.h,v 1.90.16.28 2010/03/21 18:17:21 cliff Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -76,8 +76,12 @@ int ci_mtx_oldspl; /* saved SPL value */ int ci_idepth; /* hardware interrupt depth */ int ci_cpl; /* current [interrupt] priority level */ + uint32_t ci_next_cp0_clk_intr; /* for hard clock intr scheduling */ + struct evcnt ci_count_compare_evcnt; /* hard clock intr counter */ + struct evcnt ci_count_compare_missed_evcnt; /* hard clock miss counter */ struct lwp *ci_softlwps[SOFTINT_COUNT]; #define ci_softints ci_data.cpu_softints + /* * Per-cpu pmap information */ @@ -86,8 +90,13 @@ struct segtab *ci_pmap_segbase; vaddr_t ci_pmap_srcbase; /* starting VA of ephemeral src space */ vaddr_t ci_pmap_dstbase; /* starting VA of ephemeral dst space */ + + #ifdef MULTIPROCESSOR volatile u_long ci_flags; + volatile uint64_t ci_request_ipis; + /* bitmask of IPIs requested */ + /* use on chips where hw cannot pass tag */ uint64_t ci_active_ipis; /* bitmask of IPIs being serviced */ uint32_t ci_ksp_tlb_slot; /* tlb entry for kernel stack */ void *ci_fpsave_si; /* FP sync softint handler */ @@ -105,6 +114,7 @@ #define CPUF_FPUSAVE 0x10 /* CPU is currently in fpusave_cpu() */ #define CPUF_USERPMAP 0x20 /* CPU has a user pmap activated */ #endif + }; #define CPU_INFO_ITERATOR int @@ -185,7 +195,7 @@ #define cpu_number() (curcpu()-ci_cpuid) #define CPU_IS_PRIMARY(ci) ((ci)-ci_cpuid == 0) #else -#define cpu_number() (0) +#define cpu_number() (0L) #endif #define cpu_proc_fork(p1, p2) ((void)((p2)-p_md.md_abi = (p1)-p_md.md_abi)) @@ -522,7 +532,6 @@ struct phys_ram_seg; void dumpsys(void); int savectx(struct user *); -void mips_vector_init(void); void mips_init_msgbuf(void); void mips_init_lwp0_uarea(void); void mips_page_physload(vaddr_t, vaddr_t,
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Sun Mar 21 18:18:51 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: - define MIPS_SR_COP_2_BIT to control enable/disable of coprocessor 2 To generate a diff of this commit: cvs rdiff -u -r1.74.28.15 -r1.74.28.16 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.15 src/sys/arch/mips/include/cpuregs.h:1.74.28.16 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.15 Sat Feb 27 07:52:25 2010 +++ src/sys/arch/mips/include/cpuregs.h Sun Mar 21 18:18:51 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.15 2010/02/27 07:52:25 matt Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.16 2010/03/21 18:18:51 cliff Exp $ */ /* * Copyright (c) 1992, 1993 @@ -174,6 +174,7 @@ #define MIPS_SR_COP_USABILITY 0xf000 #define MIPS_SR_COP_0_BIT 0x1000 #define MIPS_SR_COP_1_BIT 0x2000 +#define MIPS_SR_COP_2_BIT 0x4000 /* r4k and r3k differences, see below */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: cliff
Date: Sun Mar 21 18:21:15 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: intr.h
Log Message:
- if __INTR_PRIVATE is not defined, declare (but do not define) struct splsw
To generate a diff of this commit:
cvs rdiff -u -r1.3.96.8 -r1.3.96.9 src/sys/arch/mips/include/intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/intr.h
diff -u src/sys/arch/mips/include/intr.h:1.3.96.8 src/sys/arch/mips/include/intr.h:1.3.96.9
--- src/sys/arch/mips/include/intr.h:1.3.96.8 Thu Mar 11 08:09:15 2010
+++ src/sys/arch/mips/include/intr.h Sun Mar 21 18:21:15 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.3.96.8 2010/03/11 08:09:15 matt Exp $ */
+/* $NetBSD: intr.h,v 1.3.96.9 2010/03/21 18:21:15 cliff Exp $ */
/*-
* Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -84,6 +84,8 @@
struct ipl_sr_map {
uint32_t sr_bits[_IPL_N];
};
+#else
+struct splsw;
#endif /* __INTR_PRIVATE */
typedef int ipl_t;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Thu Mar 11 08:12:38 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: proc.h
Log Message:
Change md_astpending to u_int
To generate a diff of this commit:
cvs rdiff -u -r1.21.36.6 -r1.21.36.7 src/sys/arch/mips/include/proc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/proc.h
diff -u src/sys/arch/mips/include/proc.h:1.21.36.6 src/sys/arch/mips/include/proc.h:1.21.36.7
--- src/sys/arch/mips/include/proc.h:1.21.36.6 Sun Feb 28 23:45:07 2010
+++ src/sys/arch/mips/include/proc.h Thu Mar 11 08:12:37 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: proc.h,v 1.21.36.6 2010/02/28 23:45:07 matt Exp $ */
+/* $NetBSD: proc.h,v 1.21.36.7 2010/03/11 08:12:37 matt Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -56,7 +56,7 @@
int md_upte[UPAGES]; /* ptes for mapping u page */
vaddr_t md_ss_addr; /* single step address for ptrace */
int md_ss_instr; /* single step instruction for ptrace */
- volatile int md_astpending; /* AST pending on return to userland */
+ volatile u_int md_astpending; /* AST pending on return to userland */
};
struct mdproc {
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Thu Mar 11 08:13:18 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: pte.h Log Message: Mark some inlines as __pure. To generate a diff of this commit: cvs rdiff -u -r1.19.18.3 -r1.19.18.4 src/sys/arch/mips/include/pte.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/pte.h diff -u src/sys/arch/mips/include/pte.h:1.19.18.3 src/sys/arch/mips/include/pte.h:1.19.18.4 --- src/sys/arch/mips/include/pte.h:1.19.18.3 Tue Feb 23 20:33:47 2010 +++ src/sys/arch/mips/include/pte.h Thu Mar 11 08:13:18 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: pte.h,v 1.19.18.3 2010/02/23 20:33:47 matt Exp $ */ +/* $NetBSD: pte.h,v 1.19.18.4 2010/03/11 08:13:18 matt Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. @@ -126,16 +126,19 @@ PAGE_IS_RDONLY(uint32_t pte, vaddr_t va); static __inline uint32_t -mips_pg_wired_bit(void), mips_pg_m_bit(void), -mips_pg_ro_bit(void), mips_pg_rw_bit(void), -mips_pg_ropage_bit(void), -mips_pg_cwpage_bit(void), -mips_pg_rwpage_bit(void), -mips_pg_global_bit(void); -static __inline paddr_t PTE_TO_PADDR(uint32_t pte); +mips_pg_wired_bit(void) __pure, +mips_pg_m_bit(void) __pure, +mips_pg_ro_bit(void) __pure, +mips_pg_rw_bit(void) __pure, +mips_pg_ropage_bit(void) __pure, +mips_pg_cwpage_bit(void) __pure, +mips_pg_rwpage_bit(void) __pure, +mips_pg_global_bit(void) __pure; +static __inline paddr_t PTE_TO_PADDR(uint32_t pte) __pure; +static __inline bool PAGE_IS_RDONLY(uint32_t pte, vaddr_t va) __pure; -static __inline paddr_t mips_tlbpfn_to_paddr(uint32_t pfn); -static __inline uint32_t mips_paddr_to_tlbpfn(paddr_t pa); +static __inline paddr_t mips_tlbpfn_to_paddr(uint32_t pfn) __pure; +static __inline uint32_t mips_paddr_to_tlbpfn(paddr_t pa) __pure; static __inline bool
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Thu Mar 11 08:16:59 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h
Log Message:
Add ci_softc member to cpu_info.
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.25 -r1.90.16.26 src/sys/arch/mips/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.25 src/sys/arch/mips/include/cpu.h:1.90.16.26
--- src/sys/arch/mips/include/cpu.h:1.90.16.25 Mon Mar 1 19:29:41 2010
+++ src/sys/arch/mips/include/cpu.h Thu Mar 11 08:16:59 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.90.16.25 2010/03/01 19:29:41 matt Exp $ */
+/* $NetBSD: cpu.h,v 1.90.16.26 2010/03/11 08:16:59 matt Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -59,6 +59,7 @@
struct cpu_info {
struct cpu_data ci_data; /* MI per-cpu data */
struct cpu_info *ci_next; /* Next CPU in list */
+ struct cpu_softc *ci_softc; /* chip-dependent hook */
device_t ci_dev; /* owning device */
cpuid_t ci_cpuid; /* Machine-level identifier */
u_long ci_cctr_freq; /* cycle counter frequency */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Thu Feb 25 05:24:53 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h Log Message: Remove ci_curpm since it isn't used. To generate a diff of this commit: cvs rdiff -u -r1.90.16.21 -r1.90.16.22 src/sys/arch/mips/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpu.h diff -u src/sys/arch/mips/include/cpu.h:1.90.16.21 src/sys/arch/mips/include/cpu.h:1.90.16.22 --- src/sys/arch/mips/include/cpu.h:1.90.16.21 Tue Feb 23 20:33:47 2010 +++ src/sys/arch/mips/include/cpu.h Thu Feb 25 05:24:53 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.90.16.21 2010/02/23 20:33:47 matt Exp $ */ +/* $NetBSD: cpu.h,v 1.90.16.22 2010/02/25 05:24:53 matt Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -145,7 +145,6 @@ */ uint32_t ci_ksp_tlb_slot; /* reserved tlb entry for kernel stack */ struct pmap_tlb_info *ci_tlb_info; - struct pmap *ci_curpm; /* current pmap */ struct segtab *ci_pmap_segbase; vaddr_t ci_pmap_srcbase; /* starting VA of ephemeral src space */ vaddr_t ci_pmap_dstbase; /* starting VA of ephemeral dst space */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Mon Feb 15 03:09:59 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: pcb.h
Log Message:
Put pcb_context first since it has the most interesting data (easier to
dump in debugger).
To generate a diff of this commit:
cvs rdiff -u -r1.20.62.2 -r1.20.62.3 src/sys/arch/mips/include/pcb.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/pcb.h
diff -u src/sys/arch/mips/include/pcb.h:1.20.62.2 src/sys/arch/mips/include/pcb.h:1.20.62.3
--- src/sys/arch/mips/include/pcb.h:1.20.62.2 Mon Sep 7 21:28:33 2009
+++ src/sys/arch/mips/include/pcb.h Mon Feb 15 03:09:59 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: pcb.h,v 1.20.62.2 2009/09/07 21:28:33 matt Exp $ */
+/* $NetBSD: pcb.h,v 1.20.62.3 2010/02/15 03:09:59 matt Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -85,12 +85,11 @@
/*
* MIPS process control block
*/
-struct pcb
-{
- struct fpreg pcb_fpregs; /* saved floating point registers */
+struct pcb {
label_t pcb_context; /* kernel context for resume */
void * pcb_onfault; /* for copyin/copyout faults */
uint32_t pcb_ppl; /* previous priority level */
+ struct fpreg pcb_fpregs; /* saved floating point registers */
};
/*
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Mon Feb 15 03:11:58 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: lock.h
Log Message:
In SIMPLELOCK_LOCKED_P check against != UNLOCKED instead of == LOCKED.
This is so the compiler can emit a bnez instead of loading 1 into a register
and then doing beq.
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.16.16.1 src/sys/arch/mips/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/lock.h
diff -u src/sys/arch/mips/include/lock.h:1.16 src/sys/arch/mips/include/lock.h:1.16.16.1
--- src/sys/arch/mips/include/lock.h:1.16 Mon Apr 28 20:23:28 2008
+++ src/sys/arch/mips/include/lock.h Mon Feb 15 03:11:58 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.16 2008/04/28 20:23:28 martin Exp $ */
+/* $NetBSD: lock.h,v 1.16.16.1 2010/02/15 03:11:58 matt Exp $ */
/*-
* Copyright (c) 2001, 2007 The NetBSD Foundation, Inc.
@@ -42,7 +42,7 @@
static __inline int
__SIMPLELOCK_LOCKED_P(__cpu_simple_lock_t *__ptr)
{
- return *__ptr == __SIMPLELOCK_LOCKED;
+ return *__ptr != __SIMPLELOCK_UNLOCKED;
}
static __inline int
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Mon Feb 15 03:12:17 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: asm.h
Log Message:
Fix a comment.
To generate a diff of this commit:
cvs rdiff -u -r1.40.38.11 -r1.40.38.12 src/sys/arch/mips/include/asm.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/asm.h
diff -u src/sys/arch/mips/include/asm.h:1.40.38.11 src/sys/arch/mips/include/asm.h:1.40.38.12
--- src/sys/arch/mips/include/asm.h:1.40.38.11 Sat Jan 16 20:56:33 2010
+++ src/sys/arch/mips/include/asm.h Mon Feb 15 03:12:17 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: asm.h,v 1.40.38.11 2010/01/16 20:56:33 matt Exp $ */
+/* $NetBSD: asm.h,v 1.40.38.12 2010/02/15 03:12:17 matt Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -305,8 +305,8 @@
/*
* standard callframe {
- * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1)
* register_t cf_args[4]; arg0 - arg3 (only on o32 and o64)
+ * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1)
* register_t cf_gp; global pointer (only on n32 and n64)
* register_t cf_sp; frame pointer
* register_t cf_ra; return address
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Tue Jan 26 21:09:54 UTC 2010 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: elf_machdep.h Log Message: If ELFSIZE == 64, define ELF64_MACHDEP_ID_CASES regardless of _LP64 To generate a diff of this commit: cvs rdiff -u -r1.10.96.7 -r1.10.96.8 src/sys/arch/mips/include/elf_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/elf_machdep.h diff -u src/sys/arch/mips/include/elf_machdep.h:1.10.96.7 src/sys/arch/mips/include/elf_machdep.h:1.10.96.8 --- src/sys/arch/mips/include/elf_machdep.h:1.10.96.7 Sat Sep 12 17:26:23 2009 +++ src/sys/arch/mips/include/elf_machdep.h Tue Jan 26 21:09:54 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: elf_machdep.h,v 1.10.96.7 2009/09/12 17:26:23 matt Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.10.96.8 2010/01/26 21:09:54 matt Exp $ */ #ifndef _MIPS_ELF_MACHDEP_H_ #define _MIPS_ELF_MACHDEP_H_ @@ -12,13 +12,9 @@ #define ELF32_MACHDEP_ID EM_MIPS #endif /* ELFSIZE == 32 */ #if ELFSIZE == 64 -#ifdef _LP64 #define ELF64_MACHDEP_ID_CASES \ case EM_MIPS: \ break; -#else -#define ELF64_MACHDEP_ID_CASES /* xxx */ -#endif /* _LP64 */ #define ELF64_MACHDEP_ID EM_MIPS #endif /* ELFSIZE == 64 */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: cliff
Date: Wed Jan 13 09:42:16 UTC 2010
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h
Log Message:
- cpu_identify() now gets device_t arg
- add CIDFL's for RMI L2, cores, threads attributes
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.9 -r1.90.16.10 src/sys/arch/mips/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.9 src/sys/arch/mips/include/cpu.h:1.90.16.10
--- src/sys/arch/mips/include/cpu.h:1.90.16.9 Wed Dec 30 04:51:26 2009
+++ src/sys/arch/mips/include/cpu.h Wed Jan 13 09:42:16 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.90.16.9 2009/12/30 04:51:26 matt Exp $ */
+/* $NetBSD: cpu.h,v 1.90.16.10 2010/01/13 09:42:16 cliff Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -46,6 +46,7 @@
#ifdef _KERNEL
#ifndef _LOCORE
#include sys/cpu_data.h
+#include sys/device.h
#if defined(_KERNEL_OPT)
#include opt_lockdebug.h
@@ -84,10 +85,40 @@
/*
* RMI company-specific cpu_cidflags
*/
-#define MIPS_CIDFL_RMI_TYPE __BITS(0,2)
-#define CIDFL_RMI_TYPE_XLR 0
-#define CIDFL_RMI_TYPE_XLS 1
-#define CIDFL_RMI_TYPE_XLP 2
+#define MIPS_CIDFL_RMI_TYPE __BITS(2,0)
+# define CIDFL_RMI_TYPE_XLR 0
+# define CIDFL_RMI_TYPE_XLS 1
+# define CIDFL_RMI_TYPE_XLP 2
+#define MIPS_CIDFL_RMI_THREADS_MASK __BITS(6,3)
+# define MIPS_CIDFL_RMI_THREADS_SHIFT 3
+#define MIPS_CIDFL_RMI_CORES_MASK __BITS(10,7)
+# define MIPS_CIDFL_RMI_CORES_SHIFT 7
+# define LOG2_1 0
+# define LOG2_2 1
+# define LOG2_4 2
+# define LOG2_8 3
+# define MIPS_CIDFL_RMI_CPUS(ncores, nthreads)\
+ ((LOG2_ ## ncores MIPS_CIDFL_RMI_CORES_SHIFT) \
+ |(LOG2_ ## nthreads MIPS_CIDFL_RMI_THREADS_SHIFT))
+# define MIPS_CIDFL_RMI_NTHREADS(cidfl) \
+ (1 (((cidfl) MIPS_CIDFL_RMI_THREADS_MASK) \
+ MIPS_CIDFL_RMI_THREADS_SHIFT))
+# define MIPS_CIDFL_RMI_NCORES(cidfl) \
+ (1 (((cidfl) MIPS_CIDFL_RMI_CORES_MASK) \
+ MIPS_CIDFL_RMI_CORES_SHIFT))
+#define MIPS_CIDFL_RMI_L2SZ_MASK __BITS(14,11)
+# define MIPS_CIDFL_RMI_L2SZ_SHIFT 11
+# define RMI_L2SZ_256KB 0
+# define RMI_L2SZ_512KB 1
+# define RMI_L2SZ_1MB2
+# define RMI_L2SZ_2MB3
+# define RMI_L2SZ_4MB4
+# define MIPS_CIDFL_RMI_L2(l2sz) \
+ (RMI_L2SZ_ ## l2sz MIPS_CIDFL_RMI_L2SZ_SHIFT)
+# define MIPS_CIDFL_RMI_L2SZ(cidfl) \
+ ((256*1024) (((cidfl) MIPS_CIDFL_RMI_L2SZ_MASK) \
+ MIPS_CIDFL_RMI_L2SZ_SHIFT))
+
struct cpu_info {
@@ -495,7 +526,7 @@
int badaddr64(uint64_t, size_t);
/* mips_machdep.c */
-void cpu_identify(void);
+void cpu_identify(device_t);
void mips_vector_init(void);
#endif /* ! _LOCORE */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Tue Dec 22 00:01:52 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: mips1_pte.h mips3_pte.h Log Message: Add multiple inclusion protection. To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.17.38.1 src/sys/arch/mips/include/mips1_pte.h cvs rdiff -u -r1.23.38.2 -r1.23.38.3 src/sys/arch/mips/include/mips3_pte.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/mips1_pte.h diff -u src/sys/arch/mips/include/mips1_pte.h:1.17 src/sys/arch/mips/include/mips1_pte.h:1.17.38.1 --- src/sys/arch/mips/include/mips1_pte.h:1.17 Wed Oct 17 19:55:37 2007 +++ src/sys/arch/mips/include/mips1_pte.h Tue Dec 22 00:01:52 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: mips1_pte.h,v 1.17 2007/10/17 19:55:37 garbled Exp $ */ +/* $NetBSD: mips1_pte.h,v 1.17.38.1 2009/12/22 00:01:52 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -76,6 +76,8 @@ * @(#)pte.h 8.1 (Berkeley) 6/10/93 */ +#ifndef _MIPS_MIPS1_PTE_H_ +#define _MIPS_MIPS1_PTE_H_ /* * R2000 hardware page table entry */ @@ -132,3 +134,5 @@ #define MIPS1_PTE_TO_PADDR(pte) ((unsigned)(pte) MIPS1_PG_FRAME) #define MIPS1_PAGE_IS_RDONLY(pte,va) ((int)(pte) MIPS1_PG_RO) + +#endif /* !_MIPS_MIPS1_PTE_H_ */ Index: src/sys/arch/mips/include/mips3_pte.h diff -u src/sys/arch/mips/include/mips3_pte.h:1.23.38.2 src/sys/arch/mips/include/mips3_pte.h:1.23.38.3 --- src/sys/arch/mips/include/mips3_pte.h:1.23.38.2 Tue Sep 8 07:54:53 2009 +++ src/sys/arch/mips/include/mips3_pte.h Tue Dec 22 00:01:52 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: mips3_pte.h,v 1.23.38.2 2009/09/08 07:54:53 matt Exp $ */ +/* $NetBSD: mips3_pte.h,v 1.23.38.3 2009/12/22 00:01:52 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -76,6 +76,8 @@ * from: @(#)pte.h 8.1 (Berkeley) 6/10/93 */ +#ifndef _MIPS_MIPS3_PTE_H_ +#define _MIPS_MIPS3_PTE_H_ /* * R4000 hardware page table entry */ @@ -213,3 +215,4 @@ #define MIPS4100_PG_SIZE_TO_MASK(pg_size) \ pg_size) * 2) - 1) ~0x07ff) +#endif /* !_MIPS_MIPS3_PTE_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sun Dec 13 00:25:30 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: locore.h Log Message: TLBUpdate (all forms) takes vaddr_t, uint32_t To generate a diff of this commit: cvs rdiff -u -r1.78.36.1.2.5 -r1.78.36.1.2.6 \ src/sys/arch/mips/include/locore.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/locore.h diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.5 src/sys/arch/mips/include/locore.h:1.78.36.1.2.6 --- src/sys/arch/mips/include/locore.h:1.78.36.1.2.5 Mon Nov 23 18:28:46 2009 +++ src/sys/arch/mips/include/locore.h Sun Dec 13 00:25:30 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.h,v 1.78.36.1.2.5 2009/11/23 18:28:46 matt Exp $ */ +/* $NetBSD: locore.h,v 1.78.36.1.2.6 2009/12/13 00:25:30 matt Exp $ */ /* * Copyright 1996 The Board of Trustees of The Leland Stanford @@ -50,7 +50,7 @@ void mips1_TBIA(int); void mips1_TBIAP(int); void mips1_TBIS(vaddr_t); -int mips1_TLBUpdate(u_int, u_int); +int mips1_TLBUpdate(vaddr_t, uint32_t); void mips1_wbflush(void); void mips1_lwp_trampoline(void); void mips1_setfunc_trampoline(void); @@ -64,7 +64,7 @@ void mips3_TBIA(int); void mips3_TBIAP(int); void mips3_TBIS(vaddr_t); -int mips3_TLBUpdate(u_int, u_int); +int mips3_TLBUpdate(vaddr_t, uint32_t); void mips3_TLBRead(int, struct tlb *); void mips3_TLBWriteIndexedVPS(int, struct tlb *); void mips3_wbflush(void); @@ -78,7 +78,7 @@ void mips5900_TBIA(int); void mips5900_TBIAP(int); void mips5900_TBIS(vaddr_t); -int mips5900_TLBUpdate(u_int, u_int); +int mips5900_TLBUpdate(vaddr_t, uint32_t); void mips5900_TLBRead(int, struct tlb *); void mips5900_TLBWriteIndexedVPS(int, struct tlb *); void mips5900_wbflush(void); @@ -94,7 +94,7 @@ void mips32_TBIA(int); void mips32_TBIAP(int); void mips32_TBIS(vaddr_t); -int mips32_TLBUpdate(u_int, u_int); +int mips32_TLBUpdate(vaddr_t, uint32_t); void mips32_TLBRead(int, struct tlb *); void mips32_TLBWriteIndexedVPS(int, struct tlb *); void mips32_wbflush(void); @@ -108,7 +108,7 @@ void mips64_TBIA(int); void mips64_TBIAP(int); void mips64_TBIS(vaddr_t); -int mips64_TLBUpdate(u_int, u_int); +int mips64_TLBUpdate(vaddr_t, uint32_t); void mips64_TLBRead(int, struct tlb *); void mips64_TLBWriteIndexedVPS(int, struct tlb *); void mips64_wbflush(void); @@ -290,7 +290,7 @@ void (*setTLBpid)(int pid); void (*TBIAP)(int); void (*TBIS)(vaddr_t); - int (*tlbUpdate)(u_int highreg, u_int lowreg); + int (*tlbUpdate)(vaddr_t, uint32_t); void (*wbflush)(void); } mips_locore_jumpvec_t;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Tue Dec 8 18:10:54 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h Log Message: Define various vm freelists for different classes of memory. To generate a diff of this commit: cvs rdiff -u -r1.41.28.5 -r1.41.28.6 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.5 src/sys/arch/mips/include/vmparam.h:1.41.28.6 --- src/sys/arch/mips/include/vmparam.h:1.41.28.5 Mon Nov 9 09:58:19 2009 +++ src/sys/arch/mips/include/vmparam.h Tue Dec 8 18:10:54 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41.28.5 2009/11/09 09:58:19 cliff Exp $ */ +/* $NetBSD: vmparam.h,v 1.41.28.6 2009/12/08 18:10:54 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -219,4 +219,11 @@ (pg)-mdpage.pvh_list = NULL; \ } while (/* CONSTCOND */ 0) +#define VM_NFREELIST 16 /* 16 distinct memory segments */ +#define VM_FREELIST_DEFAULT 0 +#define VM_FREELIST_FIRST16M 1 /* ISA DMA range */ +#define VM_FREELIST_FIRST512M 2 /* KSEG0/1 */ +#define VM_FREELIST_FIRST4G 3 /* 32bit addrs */ +#define VM_FREELIST_MAX 4 + #endif /* ! _MIPS_VMPARAM_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: cliff
Date: Sun Nov 15 23:09:18 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: bus_space.h
Log Message:
- need to be able to handle 32 bit bus addrs in N32 kernel
- bus_addr_t is now paddr_t
- bus_size_t is now psize_t
- bus_space_handle_t is now intptr_t
- this will impact other MIPS ports, TBD
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.4.18.1 src/sys/arch/mips/include/bus_space.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/bus_space.h
diff -u src/sys/arch/mips/include/bus_space.h:1.4 src/sys/arch/mips/include/bus_space.h:1.4.18.1
--- src/sys/arch/mips/include/bus_space.h:1.4 Mon Apr 28 20:23:28 2008
+++ src/sys/arch/mips/include/bus_space.h Sun Nov 15 23:09:18 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.h,v 1.4 2008/04/28 20:23:28 martin Exp $ */
+/* $NetBSD: bus_space.h,v 1.4.18.1 2009/11/15 23:09:18 cliff Exp $ */
/*-
* Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc.
@@ -107,14 +107,14 @@
/*
* Addresses (in bus space).
*/
-typedef u_long bus_addr_t;
-typedef u_long bus_size_t;
+typedef paddr_t bus_addr_t;
+typedef psize_t bus_size_t;
/*
* Access methods for bus space.
*/
typedef struct mips_bus_space *bus_space_tag_t;
-typedef u_long bus_space_handle_t;
+typedef intptr_t bus_space_handle_t;
struct mips_bus_space {
/* cookie */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat Nov 14 21:49:05 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: Add MIPS_SR_PX To generate a diff of this commit: cvs rdiff -u -r1.74.28.11 -r1.74.28.12 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.11 src/sys/arch/mips/include/cpuregs.h:1.74.28.12 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.11 Fri Nov 13 05:23:23 2009 +++ src/sys/arch/mips/include/cpuregs.h Sat Nov 14 21:49:05 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.11 2009/11/13 05:23:23 cliff Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.12 2009/11/14 21:49:05 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -242,6 +242,7 @@ #define MIPS3_SR_DIAG_DL 0x0100 /* QED 52xx */ #define MIPS3_SR_DIAG_IL 0x0080 /* QED 52xx */ +#define MIPS3_SR_PX 0x0080 /* MIPS64 */ #define MIPS3_SR_SR 0x0010 #define MIPS3_SR_NMI 0x0008 /* MIPS32/64 */ #define MIPS3_SR_DIAG_CH 0x0004
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: cliff
Date: Fri Nov 13 05:22:50 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h
Log Message:
- struct pridtab definition is moved here from mips_machdep.c
- 'mycpu' is now global (was static); uh, a name change might be nice?
- new bit for cpu_flags 'CPU_MIPS_HAVE_MxCR' denotes
mfcr, mtcr instructions are available on this CPU
- new field 'cpu_cp0flags' in pridtab tracks whether (some) CP0 regs exist
- define bits in cpu_cp0flags, including a USE bit that,
if clear means cpu_cp0flags can be ignored. common CP0 regs do not
need to be represented here, only newer optional ones are.
- new field 'cpu_cidflags' in pridtab allows defining company-specific flags
- some RMI company specific flags are defined to track chip family
To generate a diff of this commit:
cvs rdiff -u -r1.90.16.4 -r1.90.16.5 src/sys/arch/mips/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpu.h
diff -u src/sys/arch/mips/include/cpu.h:1.90.16.4 src/sys/arch/mips/include/cpu.h:1.90.16.5
--- src/sys/arch/mips/include/cpu.h:1.90.16.4 Tue Sep 15 06:10:14 2009
+++ src/sys/arch/mips/include/cpu.h Fri Nov 13 05:22:50 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.90.16.4 2009/09/15 06:10:14 matt Exp $ */
+/* $NetBSD: cpu.h,v 1.90.16.5 2009/11/13 05:22:50 cliff Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -51,6 +51,45 @@
#include opt_lockdebug.h
#endif
+struct pridtab {
+ int cpu_cid;
+ int cpu_pid;
+ int cpu_rev; /* -1 == wildcard */
+ int cpu_copts; /* -1 == wildcard */
+ int cpu_isa; /* -1 == probed (mips32/mips64) */
+ int cpu_ntlb; /* -1 == unknown, 0 == probed */
+ int cpu_flags;
+ u_int cpu_cp0flags; /* presence of some cp0 regs */
+ u_int cpu_cidflags; /* company-specific flags */
+ const char *cpu_name;
+};
+
+extern const struct pridtab *mycpu;
+
+/*
+ * bitfield defines for cpu_cp0flags
+ */
+#define MIPS_CP0FL_USE __BIT(0) /* use these flags */
+#define MIPS_CP0FL_ECC __BIT(1)
+#define MIPS_CP0FL_CACHE_ERR __BIT(2)
+#define MIPS_CP0FL_EIRR __BIT(3)
+#define MIPS_CP0FL_EIMR __BIT(4)
+#define MIPS_CP0FL_EBASE __BIT(5)
+#define MIPS_CP0FL_CONFIG __BIT(6)
+#define MIPS_CP0FL_CONFIGn(n) (__BIT(7) ((n) 7))
+
+/*
+ * cpu_cidflags defines, by company
+ */
+/*
+ * RMI company-specific cpu_cidflags
+ */
+#define MIPS_CIDFL_RMI_TYPE __BITS(0,2)
+#define CIDFL_RMI_TYPE_XLR 0
+#define CIDFL_RMI_TYPE_XLS 1
+#define CIDFL_RMI_TYPE_XLP 2
+
+
struct cpu_info {
struct cpu_data ci_data; /* MI per-cpu data */
struct cpu_info *ci_next; /* Next CPU in list */
@@ -174,6 +213,7 @@
#define CPU_MIPS_D_CACHE_COHERENT 0x0400 /* D-cache is fully coherent */
#define CPU_MIPS_I_D_CACHE_COHERENT 0x0800 /* I-cache funcs don't need to flush the D-cache */
#define CPU_MIPS_NO_LLADDR 0x1000
+#define CPU_MIPS_HAVE_MxCR 0x2000 /* have mfcr, mtcr insns */
#define MIPS_NOT_SUPP 0x8000
#endif /* !_LOCORE */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Fri Nov 13 05:23:23 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: - move #ifndef LOCORE up a few lines to wrap more XSEG, XKSEG stuff To generate a diff of this commit: cvs rdiff -u -r1.74.28.10 -r1.74.28.11 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.10 src/sys/arch/mips/include/cpuregs.h:1.74.28.11 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.10 Mon Nov 9 09:57:27 2009 +++ src/sys/arch/mips/include/cpuregs.h Fri Nov 13 05:23:23 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.10 2009/11/09 09:57:27 cliff Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.11 2009/11/13 05:23:23 cliff Exp $ */ /* * Copyright (c) 1992, 1993 @@ -111,11 +111,11 @@ #define MIPS3_VA_TO_CINDEX(x) \ (((intptr_t)(x) 0xff) | MIPS_KSEG0_START) +#ifndef _LOCORE #define MIPS_XSEG_MASK (0x3fffLL) #define MIPS_XKSEG_START (0x3ULL 62) #define MIPS_XKSEG_P(x) (((uint64_t)(x) 62) == 3) -#ifndef _LOCORE #define MIPS_XKPHYS_START (0x2ULL 62) #define MIPS_PHYS_TO_XKPHYS_UNCACHED(x) \ (MIPS_XKPHYS_START | ((uint64_t)(CCA_UNCACHED) 59) | (x))
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Mon Nov 9 09:57:27 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: - fix some RMI XLR PRID typos (comments) To generate a diff of this commit: cvs rdiff -u -r1.74.28.9 -r1.74.28.10 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.9 src/sys/arch/mips/include/cpuregs.h:1.74.28.10 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.9 Sun Sep 13 03:28:22 2009 +++ src/sys/arch/mips/include/cpuregs.h Mon Nov 9 09:57:27 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.9 2009/09/13 03:28:22 cliff Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.10 2009/11/09 09:57:27 cliff Exp $ */ /* * Copyright (c) 1992, 1993 @@ -115,6 +115,7 @@ #define MIPS_XKSEG_START (0x3ULL 62) #define MIPS_XKSEG_P(x) (((uint64_t)(x) 62) == 3) +#ifndef _LOCORE #define MIPS_XKPHYS_START (0x2ULL 62) #define MIPS_PHYS_TO_XKPHYS_UNCACHED(x) \ (MIPS_XKPHYS_START | ((uint64_t)(CCA_UNCACHED) 59) | (x)) @@ -125,6 +126,7 @@ #define MIPS_XKPHYS_TO_PHYS(x) ((uint64_t)(x) 0x07ffLL) #define MIPS_XKPHYS_TO_CCA(x) (((uint64_t)(x) 59) 7) #define MIPS_XKPHYS_P(x) (((uint64_t)(x) 62) == 2) +#endif /* _LOCORE */ #define CCA_UNCACHED 2 #define CCA_CACHEABLE 3 /* cacheable non-coherent */ @@ -830,12 +832,12 @@ /* * CPU processor revision IDs for company ID == 12 (RMI) */ -#define MIPS_XLR732 0x00 /* RMI XLS732-C ISA 64 */ -#define MIPS_XLR716 0x02 /* RMI XLS716-C ISA 64 */ -#define MIPS_XLR532 0x08 /* RMI XLS532-C ISA 64 */ -#define MIPS_XLR516 0x0a /* RMI XLS516-C ISA 64 */ -#define MIPS_XLR508 0x0b /* RMI XLS508-C ISA 64 */ -#define MIPS_XLR308 0x0f /* RMI XLS308-C ISA 64 */ +#define MIPS_XLR732 0x00 /* RMI XLR732-C ISA 64 */ +#define MIPS_XLR716 0x02 /* RMI XLR716-C ISA 64 */ +#define MIPS_XLR532 0x08 /* RMI XLR532-C ISA 64 */ +#define MIPS_XLR516 0x0a /* RMI XLR516-C ISA 64 */ +#define MIPS_XLR508 0x0b /* RMI XLR508-C ISA 64 */ +#define MIPS_XLR308 0x0f /* RMI XLR308-C ISA 64 */ #define MIPS_XLS616 0x40 /* RMI XLS616 ISA 64 */ #define MIPS_XLS416 0x44 /* RMI XLS416 ISA 64 */ #define MIPS_XLS608 0x4A /* RMI XLS608 ISA 64 */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Mon Nov 9 09:58:19 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h Log Message: - fix definition of VM_MAXUSER32_ADDRESS as per Matt To generate a diff of this commit: cvs rdiff -u -r1.41.28.4 -r1.41.28.5 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.4 src/sys/arch/mips/include/vmparam.h:1.41.28.5 --- src/sys/arch/mips/include/vmparam.h:1.41.28.4 Sat Sep 12 17:16:38 2009 +++ src/sys/arch/mips/include/vmparam.h Mon Nov 9 09:58:19 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41.28.4 2009/09/12 17:16:38 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.41.28.5 2009/11/09 09:58:19 cliff Exp $ */ /* * Copyright (c) 1992, 1993 @@ -186,7 +186,7 @@ #define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-0x4000) /* 0xC000 */ #endif #endif -#define VM_MAXUSER32_ADDRESS ((vaddr_t)-0x7fff-1)/* 0x8000 */ +#define VM_MAXUSER32_ADDRESS ((vaddr_t)(1UL 31))/* 0x8000 */ /* * The address to which unspecified mapping requests default
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Tue Sep 15 06:10:14 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h Log Message: Define MIPS_HAS_LLADDR everywhere it should be. To generate a diff of this commit: cvs rdiff -u -r1.90.16.3 -r1.90.16.4 src/sys/arch/mips/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpu.h diff -u src/sys/arch/mips/include/cpu.h:1.90.16.3 src/sys/arch/mips/include/cpu.h:1.90.16.4 --- src/sys/arch/mips/include/cpu.h:1.90.16.3 Tue Sep 15 05:12:53 2009 +++ src/sys/arch/mips/include/cpu.h Tue Sep 15 06:10:14 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.90.16.3 2009/09/15 05:12:53 matt Exp $ */ +/* $NetBSD: cpu.h,v 1.90.16.4 2009/09/15 06:10:14 matt Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -190,6 +190,7 @@ # define MIPS_HAS_R4K_MMU 0 # define MIPS_HAS_CLOCK 0 # define MIPS_HAS_LLSC 0 +# define MIPS_HAS_LLADDR 0 #elif defined(MIPS3) || defined(MIPS4) @@ -209,6 +210,7 @@ # else /* _LOCORE */ # define MIPS_HAS_LLSC (mips_has_llsc) # endif /* _LOCORE */ +# define MIPS_HAS_LLADDR ((mips_cpu_flags CPU_MIPS_NO_LLADDR) == 0) #elif defined(MIPS32) @@ -220,6 +222,7 @@ # define MIPS_HAS_R4K_MMU 1 # define MIPS_HAS_CLOCK 1 # define MIPS_HAS_LLSC 1 +# define MIPS_HAS_LLADDR ((mips_cpu_flags CPU_MIPS_NO_LLADDR) == 0) #elif defined(MIPS64) @@ -231,6 +234,7 @@ # define MIPS_HAS_R4K_MMU 1 # define MIPS_HAS_CLOCK 1 # define MIPS_HAS_LLSC 1 +# define MIPS_HAS_LLADDR ((mips_cpu_flags CPU_MIPS_NO_LLADDR) == 0) #endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Sun Sep 13 23:38:04 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: mcontext.h
Log Message:
Use __int32_t instead int32_t to make userland happy.
To generate a diff of this commit:
cvs rdiff -u -r1.8.18.2 -r1.8.18.3 src/sys/arch/mips/include/mcontext.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/mcontext.h
diff -u src/sys/arch/mips/include/mcontext.h:1.8.18.2 src/sys/arch/mips/include/mcontext.h:1.8.18.3
--- src/sys/arch/mips/include/mcontext.h:1.8.18.2 Sat Sep 12 17:23:06 2009
+++ src/sys/arch/mips/include/mcontext.h Sun Sep 13 23:38:04 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: mcontext.h,v 1.8.18.2 2009/09/12 17:23:06 matt Exp $ */
+/* $NetBSD: mcontext.h,v 1.8.18.3 2009/09/13 23:38:04 matt Exp $ */
/*-
* Copyright (c) 1999, 2002 The NetBSD Foundation, Inc.
@@ -110,7 +110,7 @@
union {
double __fp_dregs[16];
float __fp_fregs[32];
- int32_t __fp_regs[32];
+ __int32_t __fp_regs[32];
} __fp_r;
unsigned int __fp_csr;
unsigned int __fp_pad;
@@ -128,7 +128,7 @@
} mcontext_t;
#if defined(_KERNEL) defined(_LP64)
-typedef int32_t __greg32_t;
+typedef __int32_t __greg32_t;
typedef __greg32_t __gregset32_t[_NGREG];
typedef struct {
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat Sep 12 17:16:08 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: types.h Log Message: Because of the N32 support, register32_t on mips is really 64-bits wide. To generate a diff of this commit: cvs rdiff -u -r1.43.36.9 -r1.43.36.10 src/sys/arch/mips/include/types.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/types.h diff -u src/sys/arch/mips/include/types.h:1.43.36.9 src/sys/arch/mips/include/types.h:1.43.36.10 --- src/sys/arch/mips/include/types.h:1.43.36.9 Wed Sep 9 04:48:28 2009 +++ src/sys/arch/mips/include/types.h Sat Sep 12 17:16:07 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.43.36.9 2009/09/09 04:48:28 matt Exp $ */ +/* $NetBSD: types.h,v 1.43.36.10 2009/09/12 17:16:07 matt Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -98,10 +98,8 @@ typedef __uint64_t uregister_t; typedef __int64_t mips_reg_t; /* do not use */ typedef __uint64_t mips_ureg_t; /* do not use */ -typedef __int32_t register32_t; -typedef __uint32_t uregister32_t; -#define PRIxREGISTER32 PRIx32 -#define PRIxUREGISTER32 PRIx32 +typedef __int64_t register32_t; +typedef __uint64_t uregister32_t; #define PRIxREGISTER PRIx64 #define PRIxUREGISTER PRIx64 #endif /* __mips_o32 */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat Sep 12 17:16:38 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h Log Message: Add some COMPAT_NETBSD32 definitions of common macros. To generate a diff of this commit: cvs rdiff -u -r1.41.28.3 -r1.41.28.4 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.3 src/sys/arch/mips/include/vmparam.h:1.41.28.4 --- src/sys/arch/mips/include/vmparam.h:1.41.28.3 Tue Sep 8 00:52:14 2009 +++ src/sys/arch/mips/include/vmparam.h Sat Sep 12 17:16:38 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41.28.3 2009/09/08 00:52:14 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.41.28.4 2009/09/12 17:16:38 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -98,7 +98,8 @@ * and some QED CPUs perform some virtual address checks before the * offset is calculated. */ -#define USRSTACK 0x7000 /* Start of user stack */ +#define USRSTACK (VM_MAXUSER_ADDRESS-PAGE_SIZE) /* Start of user stack */ +#define USRSTACK32 ((uint32_t)VM_MAXUSER32_ADDRESS-PAGE_SIZE) /* alignment requirement for u-area space in bytes */ #define USPACE_ALIGN USPACE @@ -123,6 +124,25 @@ #endif /* + * Virtual memory related constants, all in bytes + */ +#ifndef MAXTSIZ32 +#define MAXTSIZ32 MAXTSIZ /* max text size */ +#endif +#ifndef DFLDSIZ32 +#define DFLDSIZ32 DFLDSIZ /* initial data size limit */ +#endif +#ifndef MAXDSIZ32 +#define MAXDSIZ32 MAXDSIZ /* max data size */ +#endif +#ifndef DFLSSIZ32 +#define DFLSSIZ32 DFLTSIZ /* initial stack size limit */ +#endif +#ifndef MAXSSIZ32 +#define MAXSSIZ32 MAXSSIZ /* max stack size */ +#endif + +/* * PTEs for mapping user space into the kernel for phyio operations. * The default PTE number is enough to cover 8 disks * MAXBSIZE. */ @@ -166,6 +186,7 @@ #define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-0x4000) /* 0xC000 */ #endif #endif +#define VM_MAXUSER32_ADDRESS ((vaddr_t)-0x7fff-1)/* 0x8000 */ /* * The address to which unspecified mapping requests default @@ -173,6 +194,8 @@ #define __USE_TOPDOWN_VM #define VM_DEFAULT_ADDRESS(da, sz) \ trunc_page(USRSTACK - MAXSSIZ - (sz)) +#define VM_DEFAULT_ADDRESS32(da, sz) \ + trunc_page(USRSTACK32 - MAXSSIZ32 - (sz)) /* virtual sizes (bytes) for various kernel submaps */ #define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE)
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat Sep 12 17:17:05 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: mips_param.h Log Message: Add MACHINE32_ARCH definitions. To generate a diff of this commit: cvs rdiff -u -r1.23.78.3 -r1.23.78.4 src/sys/arch/mips/include/mips_param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/mips_param.h diff -u src/sys/arch/mips/include/mips_param.h:1.23.78.3 src/sys/arch/mips/include/mips_param.h:1.23.78.4 --- src/sys/arch/mips/include/mips_param.h:1.23.78.3 Mon Sep 7 21:50:24 2009 +++ src/sys/arch/mips/include/mips_param.h Sat Sep 12 17:17:05 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: mips_param.h,v 1.23.78.3 2009/09/07 21:50:24 matt Exp $ */ +/* $NetBSD: mips_param.h,v 1.23.78.4 2009/09/12 17:17:05 matt Exp $ */ #ifdef _KERNEL #include machine/cpu.h @@ -11,6 +11,8 @@ # if defined(__mips_n32) || defined(__mips_n64) # define _MACHINE_ARCH mips64eb # define MACHINE_ARCH mips64eb +# define _MACHINE32_ARCH mipseb +# define MACHINE32_ARCH mipseb # else # define _MACHINE_ARCH mipseb # define MACHINE_ARCH mipseb @@ -19,6 +21,8 @@ # if defined(__mips_n32) || defined(__mips_n64) # define _MACHINE_ARCH mips64el # define MACHINE_ARCH mips64el +# define _MACHINE32_ARCH mipsel +# define MACHINE32_ARCH mipsel # else # define _MACHINE_ARCH mipsel # define MACHINE_ARCH mipsel
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Sat Sep 12 17:21:52 UTC 2009
Added Files:
src/sys/arch/mips/include [matt-nb5-mips64]: netbsd32_machdep.h
Log Message:
Add support for COMPAT_NETBSD32
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/include/netbsd32_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Added files:
Index: src/sys/arch/mips/include/netbsd32_machdep.h
diff -u /dev/null src/sys/arch/mips/include/netbsd32_machdep.h:1.1.2.1
--- /dev/null Sat Sep 12 17:21:52 2009
+++ src/sys/arch/mips/include/netbsd32_machdep.h Sat Sep 12 17:21:52 2009
@@ -0,0 +1,85 @@
+/* $NetBSD: netbsd32_machdep.h,v 1.1.2.1 2009/09/12 17:21:52 matt Exp $ */
+
+/*-
+ * Copyright (c) 2009 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas m...@3am-software.com.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MACHINE_NETBSD32_H_
+#define _MACHINE_NETBSD32_H_
+
+#include sys/types.h
+
+/*
+ * On MIPS, pointers are signed.
+ */
+#define NETBSD32_POINTER_TYPE int32_t
+typedef struct { NETBSD32_POINTER_TYPE i32; } netbsd32_pointer_t;
+
+#define NETBSD32_INT64_ALIGN
+
+typedef netbsd32_pointer_t netbsd32_sigcontextp_t;
+
+/*
+ * The sigcode is ABI neutral.
+ */
+#define netbsd32_sigcode sigcode
+#define netbsd32_esigcode esigcode
+
+/*
+ * cpu_upcall knows about COMPAT_NETBSD32
+ * syscall_intern and setregs don't about COMPAT_NETBSD32.
+ */
+#define netbsd32_syscall_intern syscall_intern
+#define netbsd32_setregs setregs
+#define netbsd32_cpu_upcall cpu_upcall
+
+/* mips/sysarch.h */
+struct mips_cacheflush_args32 {
+ netbsd32_intptr_t va;
+ netbsd32_size_t nbytes;
+ int whichcache;
+};
+
+struct mips_cachectl_args32 {
+ netbsd32_intptr_t va;
+ netbsd32_size_t nbytes;
+ int ctl;
+};
+
+/* mips/frame.h */
+struct saframe32 {
+ /* first 4 arguments passed in registers on entry to upcallcode */
+ int sa_type; /* A0 */
+ netbsd32_pointer_t sa_sas; /* A1 */
+ int sa_events; /* A2 */
+ int sa_interrupted; /* A3 */
+ netbsd32_pointer_t sa_arg;
+ netbsd32_pointer_t sa_upcall;
+};
+
+#endif /* _MACHINE_NETBSD32_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Sat Sep 12 17:23:06 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: mcontext.h
Log Message:
Add COMPAT_NETBSD32 support.
To generate a diff of this commit:
cvs rdiff -u -r1.8.18.1 -r1.8.18.2 src/sys/arch/mips/include/mcontext.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/mcontext.h
diff -u src/sys/arch/mips/include/mcontext.h:1.8.18.1 src/sys/arch/mips/include/mcontext.h:1.8.18.2
--- src/sys/arch/mips/include/mcontext.h:1.8.18.1 Sun Aug 16 03:33:58 2009
+++ src/sys/arch/mips/include/mcontext.h Sat Sep 12 17:23:06 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: mcontext.h,v 1.8.18.1 2009/08/16 03:33:58 matt Exp $ */
+/* $NetBSD: mcontext.h,v 1.8.18.2 2009/09/12 17:23:06 matt Exp $ */
/*-
* Copyright (c) 1999, 2002 The NetBSD Foundation, Inc.
@@ -81,15 +81,15 @@
/* Make sure this is signed; we need pointers to be sign-extended. */
#if defined(__mips_n32)
-typedef long long __greg_t;
+typedef long long __greg_t;
#else
-typedef long__greg_t;
+typedef long __greg_t;
#endif /* __mips_n32 */
typedef __greg_t __gregset_t[_NGREG];
/*
- * For the O32 ABI, there are 16 doubles, one at each even FP reg
+ * For the O32/O64 ABI, there are 16 doubles, one at each even FP reg
* number. The FP registers themselves are 32-bits.
*
* For 64-bit ABIs (include N32), each FP register is a 64-bit double.
@@ -99,32 +99,50 @@
/*
* Floating point register state
*/
-#if defined(__mips_n32) || defined(_LP64)
-typedef struct {
+struct __fpregset_nabi {
union {
double __fp64_dregs[32];
__freg_t __fp_regs[32];
} __fp_r;
- unsigned int __fp_csr;
- unsigned int __fp_pad;
-} __fpregset_t;
-#else /* !(__mips_n32 || _LP64) */
-typedef struct {
+ __greg_t __fp_csr;
+};
+struct __fpregset_oabi {
union {
double __fp_dregs[16];
float __fp_fregs[32];
- __freg_t __fp_regs[32];
+ int32_t __fp_regs[32];
} __fp_r;
unsigned int __fp_csr;
unsigned int __fp_pad;
-} __fpregset_t;
-#endif /* !(__mips_n32 || _LP64) */
+};
+
+#if __mips_n32 || __mips_n64
+typedef struct __fpregset_nabi __fpregset_t;
+#else
+typedef struct __fpregset_oabi __fpregset_t;
+#endif
typedef struct {
__gregset_t __gregs;
__fpregset_t __fpregs;
} mcontext_t;
+#if defined(_KERNEL) defined(_LP64)
+typedef int32_t __greg32_t;
+typedef __greg32_t __gregset32_t[_NGREG];
+
+typedef struct {
+ __gregset32_t __gregs;
+ struct __fpregset_oabi __fpregs;
+} mcontext_o32_t;
+
+typedef struct {
+ __gregset_t __gregs;
+ struct __fpregset_nabi __fpregs;
+} mcontext32_t;
+
+#endif /* _KERNEL _LP64 */
+
#endif /* !__ASSEMBLER__ */
#define _UC_MACHINE_PAD 16 /* Padding appended to ucontext_t */
@@ -138,4 +156,10 @@
#define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc)
+#define _UC_MACHINE32_SP(uc) _UC_MACHINE_SP(uc)
+#define _UC_MACHINE32_PC(uc) _UC_MACHINE_PC(uc)
+#define _UC_MACHINE32_INTRV(uc) _UC_MACHINE_INTRV(uc)
+
+#define _UC_MACHINE32_SET_PC(uc, pc) _UC_MACHINE_PC((uc), (pc))
+
#endif /* _MIPS_MCONTEXT_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat Sep 12 17:26:23 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: elf_machdep.h Log Message: Fix for COMPAT_NETBSD32. To generate a diff of this commit: cvs rdiff -u -r1.10.96.6 -r1.10.96.7 src/sys/arch/mips/include/elf_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/elf_machdep.h diff -u src/sys/arch/mips/include/elf_machdep.h:1.10.96.6 src/sys/arch/mips/include/elf_machdep.h:1.10.96.7 --- src/sys/arch/mips/include/elf_machdep.h:1.10.96.6 Sat Sep 5 03:15:08 2009 +++ src/sys/arch/mips/include/elf_machdep.h Sat Sep 12 17:26:23 2009 @@ -1,17 +1,13 @@ -/* $NetBSD: elf_machdep.h,v 1.10.96.6 2009/09/05 03:15:08 matt Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.10.96.7 2009/09/12 17:26:23 matt Exp $ */ #ifndef _MIPS_ELF_MACHDEP_H_ #define _MIPS_ELF_MACHDEP_H_ #if defined(ELFSIZE) #if ELFSIZE == 32 -#ifdef _LP64 -#define ELF32_MACHDEP_ID_CASES /* xxx */ -#else #define ELF32_MACHDEP_ID_CASES \ case EM_MIPS: \ break; -#endif /* _LP64 */ #define ELF32_MACHDEP_ID EM_MIPS #endif /* ELFSIZE == 32 */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Sun Sep 13 03:28:22 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: include registers file for RMI XL chip family as needed To generate a diff of this commit: cvs rdiff -u -r1.74.28.8 -r1.74.28.9 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.8 src/sys/arch/mips/include/cpuregs.h:1.74.28.9 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.8 Tue Sep 8 07:54:53 2009 +++ src/sys/arch/mips/include/cpuregs.h Sun Sep 13 03:28:22 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.8 2009/09/08 07:54:53 matt Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.9 2009/09/13 03:28:22 cliff Exp $ */ /* * Copyright (c) 1992, 1993 @@ -869,5 +869,8 @@ #ifdef MIPS64_SB1 #include mips/sb1regs.h #endif +#if defined(MIPS64_XLP) || defined(MIPS64_XLR) || defined(MIPS64_XLS) +#include mips/rmi/rmixlreg.h +#endif #endif /* _MIPS_CPUREGS_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: cliff Date: Sun Sep 13 03:29:36 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: pci_machdep.h Log Message: #ifdef to protect against recursive #include To generate a diff of this commit: cvs rdiff -u -r1.4.96.1 -r1.4.96.2 src/sys/arch/mips/include/pci_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/pci_machdep.h diff -u src/sys/arch/mips/include/pci_machdep.h:1.4.96.1 src/sys/arch/mips/include/pci_machdep.h:1.4.96.2 --- src/sys/arch/mips/include/pci_machdep.h:1.4.96.1 Sun Aug 16 03:33:58 2009 +++ src/sys/arch/mips/include/pci_machdep.h Sun Sep 13 03:29:36 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: pci_machdep.h,v 1.4.96.1 2009/08/16 03:33:58 matt Exp $ */ +/* $NetBSD: pci_machdep.h,v 1.4.96.2 2009/09/13 03:29:36 cliff Exp $ */ /* * Copyright (c) 1996 Carnegie-Mellon University. @@ -27,6 +27,9 @@ * rights to redistribute these changes. */ +#ifndef _MIPS_INCLUDE_PCI_MACHDEP_H_ +#define _MIPS_INCLUDE_PCI_MACHDEP_H_ + /* * __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH (if used) needs to be * defined before this file is included @@ -116,3 +119,5 @@ (*(c)-pc_pciide_compat_intr_establish)((c)-pc_conf_v, (d), (p), \ (ch), (f), (a))) #endif + +#endif /* _MIPS_INCLUDE_PCI_MACHDEP_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Mon Sep 7 21:28:01 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: types.h
Log Message:
Add symbolic constants for what's stored in label_t.
To generate a diff of this commit:
cvs rdiff -u -r1.43.36.7 -r1.43.36.8 src/sys/arch/mips/include/types.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/types.h
diff -u src/sys/arch/mips/include/types.h:1.43.36.7 src/sys/arch/mips/include/types.h:1.43.36.8
--- src/sys/arch/mips/include/types.h:1.43.36.7 Sun Sep 6 22:34:53 2009
+++ src/sys/arch/mips/include/types.h Mon Sep 7 21:28:01 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: types.h,v 1.43.36.7 2009/09/06 22:34:53 matt Exp $ */
+/* $NetBSD: types.h,v 1.43.36.8 2009/09/07 21:28:01 matt Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -110,6 +110,19 @@
typedef struct label_t {
register_t val[14];
} label_t;
+#define _L_S0 0
+#define _L_S1 1
+#define _L_S2 2
+#define _L_S3 3
+#define _L_S4 4
+#define _L_S5 5
+#define _L_S6 6
+#define _L_S7 7
+#define _L_GP 8
+#define _L_SP 9
+#define _L_S8 10
+#define _L_RA 11
+#define _L_SR 12
#endif
typedef volatile int __cpu_simple_lock_t;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Mon Sep 7 21:28:34 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: pcb.h
Log Message:
pcb_context is a label_t so use label_t as its type.
To generate a diff of this commit:
cvs rdiff -u -r1.20.62.1 -r1.20.62.2 src/sys/arch/mips/include/pcb.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/pcb.h
diff -u src/sys/arch/mips/include/pcb.h:1.20.62.1 src/sys/arch/mips/include/pcb.h:1.20.62.2
--- src/sys/arch/mips/include/pcb.h:1.20.62.1 Thu Aug 20 07:50:36 2009
+++ src/sys/arch/mips/include/pcb.h Mon Sep 7 21:28:33 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: pcb.h,v 1.20.62.1 2009/08/20 07:50:36 matt Exp $ */
+/* $NetBSD: pcb.h,v 1.20.62.2 2009/09/07 21:28:33 matt Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -79,6 +79,7 @@
#ifndef _MIPS_PCB_H_
#define _MIPS_PCB_H_
+#include mips/types.h
#include mips/reg.h
/*
@@ -87,7 +88,7 @@
struct pcb
{
struct fpreg pcb_fpregs; /* saved floating point registers */
- mips_reg_t pcb_context[12]; /* kernel context for resume */
+ label_t pcb_context; /* kernel context for resume */
void * pcb_onfault; /* for copyin/copyout faults */
uint32_t pcb_ppl; /* previous priority level */
};
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Mon Sep 7 21:34:47 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: Use intptr_t in MIPS_KSEGx_P() Use uintptr_t in MIPS_XKPHYS* To generate a diff of this commit: cvs rdiff -u -r1.74.28.6 -r1.74.28.7 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.6 src/sys/arch/mips/include/cpuregs.h:1.74.28.7 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.6 Sun Sep 6 22:36:16 2009 +++ src/sys/arch/mips/include/cpuregs.h Mon Sep 7 21:34:47 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.6 2009/09/06 22:36:16 matt Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.7 2009/09/07 21:34:47 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -103,8 +103,8 @@ #define MIPS_KSEG1_TO_PHYS(x) ((uintptr_t)(x) MIPS_PHYS_MASK) #define MIPS_PHYS_TO_KSEG1(x) ((uintptr_t)(x) | (intptr_t)MIPS_KSEG1_START) -#define MIPS_KSEG0_P(x) (((uintptr_t)(x) ~MIPS_PHYS_MASK) == MIPS_KSEG0_START) -#define MIPS_KSEG1_P(x) (((uintptr_t)(x) ~MIPS_PHYS_MASK) == MIPS_KSEG1_START) +#define MIPS_KSEG0_P(x) (((intptr_t)(x) ~MIPS_PHYS_MASK) == MIPS_KSEG0_START) +#define MIPS_KSEG1_P(x) (((intptr_t)(x) ~MIPS_PHYS_MASK) == MIPS_KSEG1_START) #define MIPS_KSEG2_P(x) ((uintptr_t)MIPS_KSEG2_START = (uintptr_t)(x)) /* Map virtual address to index in mips3 r4k virtually-indexed cache */ @@ -118,8 +118,8 @@ #define MIPS_XKPHYS_START (0x2ULL 62) #define MIPS_PHYS_TO_XKPHYS(cca,x) \ (MIPS_XKPHYS_START | ((uint64_t)(cca) 59) | (x)) -#define MIPS_XKPHYS_TO_PHYS(x) ((x) 0x0effLL) -#define MIPS_XKPHYS_TO_CCA(x) (((x) 59) 7) +#define MIPS_XKPHYS_TO_PHYS(x) ((uintptr_t)(x) 0x0effLL) +#define MIPS_XKPHYS_TO_CCA(x) (((uintptr_t)(x) 59) 7) #define MIPS_XKPHYS_P(x) (((uint64_t)(x) 62) == 2) #define CCA_UNCACHED 2
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Mon Sep 7 21:36:43 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: psl.h Log Message: Add MIPS_SR_KX to PSL_USERSET if _LP64 To generate a diff of this commit: cvs rdiff -u -r1.17.96.1 -r1.17.96.2 src/sys/arch/mips/include/psl.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/psl.h diff -u src/sys/arch/mips/include/psl.h:1.17.96.1 src/sys/arch/mips/include/psl.h:1.17.96.2 --- src/sys/arch/mips/include/psl.h:1.17.96.1 Sun Aug 16 03:33:58 2009 +++ src/sys/arch/mips/include/psl.h Mon Sep 7 21:36:43 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.17.96.1 2009/08/16 03:33:58 matt Exp $ */ +/* $NetBSD: psl.h,v 1.17.96.2 2009/09/07 21:36:43 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -48,9 +48,13 @@ #define MIPS3_PSL_LOWIPL (MIPS3_INT_MASK | MIPS_SR_INT_IE) #if !defined(__mips_o32) -#define MIPS3_PSL_XFLAGS (MIPS3_SR_XX | MIPS3_SR_UX) +# ifdef _LP64 +# define MIPS3_PSL_XFLAGS (MIPS3_SR_XX | MIPS_SR_KX) +# else +# define MIPS3_PSL_XFLAGS (MIPS3_SR_XX) +# endif #else -#define MIPS3_PSL_XFLAGS (0) +# define MIPS3_PSL_XFLAGS (0) #endif #define MIPS3_PSL_USERSET \
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Mon Sep 7 21:42:17 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: pmap.h
Log Message:
Cleanup for LP64. XXX pv_entry needs work.
To generate a diff of this commit:
cvs rdiff -u -r1.54 -r1.54.26.1 src/sys/arch/mips/include/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/pmap.h
diff -u src/sys/arch/mips/include/pmap.h:1.54 src/sys/arch/mips/include/pmap.h:1.54.26.1
--- src/sys/arch/mips/include/pmap.h:1.54 Wed Dec 26 16:01:34 2007
+++ src/sys/arch/mips/include/pmap.h Mon Sep 7 21:42:17 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.54 2007/12/26 16:01:34 ad Exp $ */
+/* $NetBSD: pmap.h,v 1.54.26.1 2009/09/07 21:42:17 matt Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -102,7 +102,7 @@
#define mips_round_seg(x) (((vaddr_t)(x) + SEGOFSET) ~SEGOFSET)
#define pmap_segmap(m, v) ((m)-pm_segtab-seg_tab[((v) SEGSHIFT)])
-#define PMAP_SEGTABSIZE 512
+#define PMAP_SEGTABSIZE (1 (31 - SEGSHIFT))
union pt_entry;
@@ -114,12 +114,12 @@
* Machine dependent pmap structure.
*/
typedef struct pmap {
- int pm_count; /* pmap reference count */
kmutex_t pm_lock; /* lock on pmap */
- struct pmap_statistics pm_stats; /* pmap statistics */
- unsigned pm_asid; /* TLB address space tag */
- unsigned pm_asidgen; /* its generation number */
struct segtab *pm_segtab; /* pointers to pages of PTEs */
+ int pm_count; /* pmap reference count */
+ unsigned int pm_asid; /* TLB address space tag */
+ unsigned int pm_asidgen; /* its generation number */
+ struct pmap_statistics pm_stats; /* pmap statistics */
} *pmap_t;
/*
@@ -130,7 +130,7 @@
typedef struct pv_entry {
struct pv_entry *pv_next; /* next pv_entry */
struct pmap *pv_pmap; /* pmap where mapping lies */
- vaddr_t pv_va; /* virtual address for mapping */
+ vaddr_t pv_va; /* virtual address for mapping */
int pv_flags; /* some flags for the mapping */
} *pv_entry_t;
@@ -189,12 +189,18 @@
/*
* Other hooks for the pool allocator.
*/
+#ifdef _LP64
+#define POOL_VTOPHYS(va) (MIPS_KSEG0_P(va) \
+? MIPS_KSEG0_TO_PHYS(va) \
+: MIPS_XKPHYS_TO_PHYS(va))
+#else
#define POOL_VTOPHYS(va) MIPS_KSEG0_TO_PHYS((vaddr_t)(va))
+#endif
/*
* Select CCA to use for unmanaged pages.
*/
-#define PMAP_CCA_FOR_PA(pa) 2 /* uncached */
+#define PMAP_CCA_FOR_PA(pa) CCA_UNCACHED /* uncached */
#if defined(_MIPS_PADDR_T_64BIT) || defined(_LP64)
#define PMAP_NOCACHE 0x4000ULL
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Mon Sep 7 21:50:24 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: mips_param.h Log Message: Derive NBSEG and SEGSHIFT from NBPG and PGSHIFT. To generate a diff of this commit: cvs rdiff -u -r1.23.78.2 -r1.23.78.3 src/sys/arch/mips/include/mips_param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/mips_param.h diff -u src/sys/arch/mips/include/mips_param.h:1.23.78.2 src/sys/arch/mips/include/mips_param.h:1.23.78.3 --- src/sys/arch/mips/include/mips_param.h:1.23.78.2 Sat Aug 22 06:45:30 2009 +++ src/sys/arch/mips/include/mips_param.h Mon Sep 7 21:50:24 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: mips_param.h,v 1.23.78.2 2009/08/22 06:45:30 matt Exp $ */ +/* $NetBSD: mips_param.h,v 1.23.78.3 2009/09/07 21:50:24 matt Exp $ */ #ifdef _KERNEL #include machine/cpu.h @@ -62,9 +62,9 @@ #define PGSHIFT 12 /* LOG2(NBPG) */ #define NPTEPG (NBPG/4) -#define NBSEG 0x40 /* bytes/segment */ +#define NBSEG (NBPG*NPTEPG) /* bytes/segment */ #define SEGOFSET (NBSEG-1) /* byte offset into segment */ -#define SEGSHIFT 22 /* LOG2(NBSEG) */ +#define SEGSHIFT (2*PGSHIFT-2) /* LOG2(NBSEG) */ /* * Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Mon Sep 7 21:51:25 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: asm.h Log Message: Simplify PTR_ case (32 bit or 64 bit) To generate a diff of this commit: cvs rdiff -u -r1.40.38.8 -r1.40.38.9 src/sys/arch/mips/include/asm.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/asm.h diff -u src/sys/arch/mips/include/asm.h:1.40.38.8 src/sys/arch/mips/include/asm.h:1.40.38.9 --- src/sys/arch/mips/include/asm.h:1.40.38.8 Sat Sep 5 03:13:51 2009 +++ src/sys/arch/mips/include/asm.h Mon Sep 7 21:51:25 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.40.38.8 2009/09/05 03:13:51 matt Exp $ */ +/* $NetBSD: asm.h,v 1.40.38.9 2009/09/07 21:51:25 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -332,7 +332,7 @@ * assembler to prevent the assembler from generating 64-bit style * ABI calls. */ -#if defined(__mips_o32) +#if _MIPS_SZPTR == 32 #define PTR_ADD add #define PTR_ADDI addi #define PTR_ADDU addu @@ -354,33 +354,7 @@ #define PTR_SC sc #define PTR_WORD .word #define PTR_SCALESHIFT 2 -#endif /* __mips_o32 */ - -#if defined(__mips_n32) -#define PTR_ADD add -#define PTR_ADDI addi -#define PTR_ADDU add /* no u */ -#define PTR_ADDIU addi /* no u */ -#define PTR_SUB sub -#define PTR_SUBI subi -#define PTR_SUBU sub /* no u */ -#define PTR_SUBIU sub /* no u */ -#define PTR_L lw -#define PTR_LA la -#define PTR_S sw -#define PTR_SLL sll -#define PTR_SLLV sllv -#define PTR_SRL srl -#define PTR_SRLV srlv -#define PTR_SRA sra -#define PTR_SRAV srav -#define PTR_LL ll -#define PTR_SC sc -#define PTR_WORD .word -#define PTR_SCALESHIFT 2 -#endif /* __mips_n32 */ - -#if defined(__mips_n64) || defined(__mips_o64) +#else /* _MIPS_SZPTR == 64 */ #define PTR_ADD dadd #define PTR_ADDI daddi #define PTR_ADDU daddu @@ -402,7 +376,7 @@ #define PTR_SC scd #define PTR_WORD .dword #define PTR_SCALESHIFT 3 -#endif /* __mips_n64 || __mips_o64 */ +#endif /* _MIPS_SZPTR == 64 */ #if _MIPS_SZINT == 32 #define INT_ADD add
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Tue Sep 8 00:52:14 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h Log Message: On LP64 kernels, move kernel mapped to XKSEG. To generate a diff of this commit: cvs rdiff -u -r1.41.28.2 -r1.41.28.3 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.2 src/sys/arch/mips/include/vmparam.h:1.41.28.3 --- src/sys/arch/mips/include/vmparam.h:1.41.28.2 Thu Sep 3 07:27:21 2009 +++ src/sys/arch/mips/include/vmparam.h Tue Sep 8 00:52:14 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41.28.2 2009/09/03 07:27:21 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.41.28.3 2009/09/08 00:52:14 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -147,6 +147,16 @@ * These are negative addresses since MIPS addresses are signed. */ #define VM_MIN_ADDRESS ((vaddr_t)0x) +#ifdef _LP64 +#if 1 +#define VM_MAXUSER_ADDRESS ((vaddr_t) 1L 31) /* 0x8000 */ +#else +#define VM_MAXUSER_ADDRESS ((vaddr_t) 1L 62) /* 0x4000 */ +#endif +#define VM_MAX_ADDRESS VM_MAXUSER_ADDRESS +#define VM_MIN_KERNEL_ADDRESS ((vaddr_t) 3L 62) /* 0xC000 */ +#define VM_MAX_KERNEL_ADDRESS ((vaddr_t) -1L 31) /* 0x8000 */ +#else #define VM_MAXUSER_ADDRESS ((vaddr_t)-0x7fff-1)/* 0x8000 */ #define VM_MAX_ADDRESS ((vaddr_t)-0x7fff-1)/* 0x8000 */ #define VM_MIN_KERNEL_ADDRESS ((vaddr_t)-0x4000) /* 0xC000 */ @@ -155,6 +165,7 @@ #else #define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-0x4000) /* 0xC000 */ #endif +#endif /* * The address to which unspecified mapping requests default
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sun Sep 6 22:36:16 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: Add some more macros for XUSEG/XSSEK and for testing what segment an address belongs to. To generate a diff of this commit: cvs rdiff -u -r1.74.28.5 -r1.74.28.6 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.5 src/sys/arch/mips/include/cpuregs.h:1.74.28.6 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.5 Sat Sep 5 03:20:21 2009 +++ src/sys/arch/mips/include/cpuregs.h Sun Sep 6 22:36:16 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.5 2009/09/05 03:20:21 matt Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.6 2009/09/06 22:36:16 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -76,7 +76,13 @@ * Caching of mapped addresses is controlled by bits in the TLB entry. */ -#define MIPS_KUSEG_START 0x0L +#ifdef _LP64 +#define MIPS_XUSEG_START (0L 62) +#define MIPS_XUSEG_P(x) (((uint64_t)(x) 62) == 0) +#define MIPS_USEG_P(x) ((uintptr_t)(x) 0x8000L) +#define MIPS_XSSEG_START (1L 62) +#define MIPS_XSSEG_P(x) (((uint64_t)(x) 62) == 1) +#endif /* * MIPS addresses are signed and we defining as negative so that @@ -97,9 +103,14 @@ #define MIPS_KSEG1_TO_PHYS(x) ((uintptr_t)(x) MIPS_PHYS_MASK) #define MIPS_PHYS_TO_KSEG1(x) ((uintptr_t)(x) | (intptr_t)MIPS_KSEG1_START) +#define MIPS_KSEG0_P(x) (((uintptr_t)(x) ~MIPS_PHYS_MASK) == MIPS_KSEG0_START) +#define MIPS_KSEG1_P(x) (((uintptr_t)(x) ~MIPS_PHYS_MASK) == MIPS_KSEG1_START) +#define MIPS_KSEG2_P(x) ((uintptr_t)MIPS_KSEG2_START = (uintptr_t)(x)) + /* Map virtual address to index in mips3 r4k virtually-indexed cache */ #define MIPS3_VA_TO_CINDEX(x) \ (((intptr_t)(x) 0xff) | MIPS_KSEG0_START) + #define MIPS_XSEG_MASK (0x3fffLL) #define MIPS_XKSEG_START (0x3ULL 62) #define MIPS_XKSEG_P(x) (((uint64_t)(x) 62) == 3) @@ -108,8 +119,12 @@ #define MIPS_PHYS_TO_XKPHYS(cca,x) \ (MIPS_XKPHYS_START | ((uint64_t)(cca) 59) | (x)) #define MIPS_XKPHYS_TO_PHYS(x) ((x) 0x0effLL) +#define MIPS_XKPHYS_TO_CCA(x) (((x) 59) 7) #define MIPS_XKPHYS_P(x) (((uint64_t)(x) 62) == 2) +#define CCA_UNCACHED 2 +#define CCA_CACHEABLE 3 /* cacheable non-coherent */ + /* CPU dependent mtc0 hazard hook */ #define COP0_SYNC /* nothing */ #define COP0_HAZARD_FPUENABLE nop; nop; nop; nop;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat Sep 5 03:13:51 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: asm.h Log Message: Add REG_LL/REG_SC/REG_ADDU To generate a diff of this commit: cvs rdiff -u -r1.40.38.7 -r1.40.38.8 src/sys/arch/mips/include/asm.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/asm.h diff -u src/sys/arch/mips/include/asm.h:1.40.38.7 src/sys/arch/mips/include/asm.h:1.40.38.8 --- src/sys/arch/mips/include/asm.h:1.40.38.7 Thu Sep 3 00:02:53 2009 +++ src/sys/arch/mips/include/asm.h Sat Sep 5 03:13:51 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.40.38.7 2009/09/03 00:02:53 matt Exp $ */ +/* $NetBSD: asm.h,v 1.40.38.8 2009/09/05 03:13:51 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -500,23 +500,29 @@ #define REG_L lw #define REG_S sw #define REG_LI li +#define REG_ADDU addu #define REG_SLL sll #define REG_SLLV sllv #define REG_SRL srl #define REG_SRLV srlv #define REG_SRA sra #define REG_SRAV srav +#define REG_LL ll +#define REG_SC sc #define REG_SCALESHIFT 2 #else #define REG_L ld #define REG_S sd #define REG_LI dli +#define REG_ADDU daddu #define REG_SLL dsll #define REG_SLLV dsllv #define REG_SRL dsrl #define REG_SRLV dsrlv #define REG_SRA dsra #define REG_SRAV dsrav +#define REG_LL lld +#define REG_SC scd #define REG_SCALESHIFT 3 #endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat Sep 5 03:15:09 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: elf_machdep.h Log Message: Fix EF_ARCH_*. (should be in high nibble) To generate a diff of this commit: cvs rdiff -u -r1.10.96.5 -r1.10.96.6 src/sys/arch/mips/include/elf_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/elf_machdep.h diff -u src/sys/arch/mips/include/elf_machdep.h:1.10.96.5 src/sys/arch/mips/include/elf_machdep.h:1.10.96.6 --- src/sys/arch/mips/include/elf_machdep.h:1.10.96.5 Sun Aug 23 03:40:14 2009 +++ src/sys/arch/mips/include/elf_machdep.h Sat Sep 5 03:15:08 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: elf_machdep.h,v 1.10.96.5 2009/08/23 03:40:14 matt Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.10.96.6 2009/09/05 03:15:08 matt Exp $ */ #ifndef _MIPS_ELF_MACHDEP_H_ #define _MIPS_ELF_MACHDEP_H_ @@ -142,16 +142,16 @@ #define EF_MIPS_ARCH_MDMX 0x0800 /* MDMX multimedia extension */ #define EF_MIPS_ARCH_M16 0x0400 /* MIPS-16 ISA extensions */ -#define EF_MIPS_ARCH 0x0f00 /* Architecture field */ +#define EF_MIPS_ARCH 0xf000 /* Architecture field */ #define EF_MIPS_ARCH_1 0x /* -mips1 code */ -#define EF_MIPS_ARCH_2 0x0100 /* -mips2 code */ -#define EF_MIPS_ARCH_3 0x0200 /* -mips3 code */ -#define EF_MIPS_ARCH_4 0x0300 /* -mips4 code */ -#define EF_MIPS_ARCH_5 0x0400 /* -mips5 code */ -#define EF_MIPS_ARCH_32 0x0500 /* -mips32 code */ -#define EF_MIPS_ARCH_64 0x0600 /* -mips64 code */ -#define EF_MIPS_ARCH_32R2 0x0700 /* -mips32r2 code */ -#define EF_MIPS_ARCH_64R4 0x0800 /* -mips64r2 code */ +#define EF_MIPS_ARCH_2 0x1000 /* -mips2 code */ +#define EF_MIPS_ARCH_3 0x2000 /* -mips3 code */ +#define EF_MIPS_ARCH_4 0x3000 /* -mips4 code */ +#define EF_MIPS_ARCH_5 0x4000 /* -mips5 code */ +#define EF_MIPS_ARCH_32 0x5000 /* -mips32 code */ +#define EF_MIPS_ARCH_64 0x6000 /* -mips64 code */ +#define EF_MIPS_ARCH_32R2 0x7000 /* -mips32r2 code */ +#define EF_MIPS_ARCH_64R4 0x8000 /* -mips64r2 code */ #define EF_MIPS_ABI 0xf000 #define EF_MIPS_ABI_O32 0x1000
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Sat Sep 5 03:16:23 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: proc.h
Log Message:
Make sure this is quad-word (16 byte) aligned. Thus when one is allocated
on the stack, the stack stays 16 byte aligned.
To generate a diff of this commit:
cvs rdiff -u -r1.21.36.2 -r1.21.36.3 src/sys/arch/mips/include/proc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/proc.h
diff -u src/sys/arch/mips/include/proc.h:1.21.36.2 src/sys/arch/mips/include/proc.h:1.21.36.3
--- src/sys/arch/mips/include/proc.h:1.21.36.2 Fri Aug 21 17:20:46 2009
+++ src/sys/arch/mips/include/proc.h Sat Sep 5 03:16:23 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: proc.h,v 1.21.36.2 2009/08/21 17:20:46 matt Exp $ */
+/* $NetBSD: proc.h,v 1.21.36.3 2009/09/05 03:16:23 matt Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -70,7 +70,7 @@
struct frame {
mips_reg_t f_regs[38];
u_int32_t f_ppl; /* previous priority level */
- int32_t f_pad; /* for 8 byte aligned */
+ mips_reg_t f_pad; /* for quadword alignment */
};
#ifdef _KERNEL
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat Sep 5 03:20:21 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: Define MIPS_KSEGn_START as friends as being long. To generate a diff of this commit: cvs rdiff -u -r1.74.28.4 -r1.74.28.5 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.4 src/sys/arch/mips/include/cpuregs.h:1.74.28.5 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.4 Sun Aug 30 13:03:02 2009 +++ src/sys/arch/mips/include/cpuregs.h Sat Sep 5 03:20:21 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.4 2009/08/30 13:03:02 simonb Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.5 2009/09/05 03:20:21 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -82,11 +82,13 @@ * MIPS addresses are signed and we defining as negative so that * in LP64 kern they get sign-extended correctly. */ -#define MIPS_KSEG0_START (-0x7fff-1) /* 0x8000 */ -#define MIPS_KSEG1_START -0x6000 /* 0xa000 */ -#define MIPS_KSEG2_START -0x4000 /* 0xc000 */ -#define MIPS_MAX_MEM_ADDR -0x4200 /* 0xbe00 */ -#define MIPS_RESERVED_ADDR -0x4038 /* 0xbfc8 */ +#ifndef _LOCORE +#define MIPS_KSEG0_START (-0x7fffL-1) /* 0x8000 */ +#define MIPS_KSEG1_START -0x6000L /* 0xa000 */ +#define MIPS_KSEG2_START -0x4000L /* 0xc000 */ +#define MIPS_MAX_MEM_ADDR -0x4200L /* 0xbe00 */ +#define MIPS_RESERVED_ADDR -0x4038L /* 0xbfc8 */ +#endif #define MIPS_PHYS_MASK 0x1fff
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sat Sep 5 03:18:49 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: locore.h Log Message: Change padding in kern_frame so it has quad-word (16 bytes) alignment. Then when allocated on a stack, the stack keeps 16 byte alignment. To generate a diff of this commit: cvs rdiff -u -r1.78.36.1.2.3 -r1.78.36.1.2.4 \ src/sys/arch/mips/include/locore.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/locore.h diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.3 src/sys/arch/mips/include/locore.h:1.78.36.1.2.4 --- src/sys/arch/mips/include/locore.h:1.78.36.1.2.3 Sun Aug 30 10:01:03 2009 +++ src/sys/arch/mips/include/locore.h Sat Sep 5 03:18:49 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.h,v 1.78.36.1.2.3 2009/08/30 10:01:03 matt Exp $ */ +/* $NetBSD: locore.h,v 1.78.36.1.2.4 2009/09/05 03:18:49 matt Exp $ */ /* * Copyright 1996 The Board of Trustees of The Leland Stanford @@ -483,7 +483,7 @@ #endif #endif #if defined(__mips_n32) || defined(__mips_n64) - register_t cf_pad; + register_t cf_pad[2]; /* for 16 byte alignment */ #endif register_t cf_sp; register_t cf_ra;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Thu Sep 3 07:27:21 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: vmparam.h Log Message: Double the default stack size to 4MB (since N32/N64 will use double the stack space). To generate a diff of this commit: cvs rdiff -u -r1.41.28.1 -r1.41.28.2 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.1 src/sys/arch/mips/include/vmparam.h:1.41.28.2 --- src/sys/arch/mips/include/vmparam.h:1.41.28.1 Fri Aug 21 17:26:23 2009 +++ src/sys/arch/mips/include/vmparam.h Thu Sep 3 07:27:21 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41.28.1 2009/08/21 17:26:23 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.41.28.2 2009/09/03 07:27:21 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -116,7 +116,7 @@ #define MAXDSIZ (512*1024*1024) /* max data size */ #endif #ifndef DFLSSIZ -#define DFLSSIZ (2*1024*1024) /* initial stack size limit */ +#define DFLSSIZ (4*1024*1024) /* initial stack size limit */ #endif #ifndef MAXSSIZ #define MAXSSIZ (32*1024*1024) /* max stack size */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Thu Sep 3 00:02:53 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: asm.h Log Message: Don't use .set noorder/.set reorder. instead use .set push; .set noreorder; .set pop This will preserve noorder To generate a diff of this commit: cvs rdiff -u -r1.40.38.6 -r1.40.38.7 src/sys/arch/mips/include/asm.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/asm.h diff -u src/sys/arch/mips/include/asm.h:1.40.38.6 src/sys/arch/mips/include/asm.h:1.40.38.7 --- src/sys/arch/mips/include/asm.h:1.40.38.6 Fri Aug 21 17:33:17 2009 +++ src/sys/arch/mips/include/asm.h Thu Sep 3 00:02:53 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.40.38.6 2009/08/21 17:33:17 matt Exp $ */ +/* $NetBSD: asm.h,v 1.40.38.7 2009/09/03 00:02:53 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -542,29 +542,32 @@ #endif #define SETUP_GP \ + .set push;\ .set noreorder;\ .cpload t9;\ - .set reorder + .set pop #define SETUP_GPX(r) \ + .set push;\ .set noreorder;\ move r,ra; /* save old ra */ \ bal 7f;\ nop; \ 7: .cpload ra;\ move ra,r;\ - .set reorder + .set pop #define SETUP_GPX_L(r,lbl) \ + .set push;\ .set noreorder;\ move r,ra; /* save old ra */ \ bal lbl;\ nop; \ lbl: .cpload ra;\ move ra,r;\ - .set reorder + .set pop #define SAVE_GP(x) .cprestore x #define SETUP_GP64(a,b) /* n32/n64 specific */ -#define SETUP_GP64_R(a,b) /* n32/n64 specific */ +#define SETUP_GP64_R(a,b) /* n32/n64 specific */ #define SETUP_GPX64(a,b) /* n32/n64 specific */ #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ #define RESTORE_GP64 /* n32/n64 specific */ @@ -587,19 +590,21 @@ #define SAVE_GP(x) /* o32 specific */ #define SETUP_GP64(a,b) .cpsetup $25, a, b #define SETUP_GPX64(a,b) \ +.set push; \ move b,ra; \ .set noreorder; \ bal 7f; \ nop;\ - 7: .set reorder; \ + 7: .set pop; \ .cpsetup ra, a, 7b; \ move ra,b #define SETUP_GPX64_L(a,b,c) \ +.set push; \ move b,ra; \ .set noreorder; \ bal c; \ nop;\ - c: .set reorder; \ + c: .set pop; \ .cpsetup ra, a, c; \ move ra,b #define RESTORE_GP64 .cpreturn
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sun Aug 30 10:01:04 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h locore.h Log Message: Add RMI company id. Add some RMI processor ids. Add CP0 EBASE defintion. To generate a diff of this commit: cvs rdiff -u -r1.74.28.2 -r1.74.28.3 src/sys/arch/mips/include/cpuregs.h cvs rdiff -u -r1.78.36.1.2.2 -r1.78.36.1.2.3 \ src/sys/arch/mips/include/locore.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.2 src/sys/arch/mips/include/cpuregs.h:1.74.28.3 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.2 Fri Aug 21 17:26:23 2009 +++ src/sys/arch/mips/include/cpuregs.h Sun Aug 30 10:01:03 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.2 2009/08/21 17:26:23 matt Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.3 2009/08/30 10:01:03 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -451,6 +451,7 @@ * 13 MIPS_COP_0_CAUSE Exception cause register. * 14 MIPS_COP_0_EXC_PC 3636 Exception PC. * 15 MIPS_COP_0_PRID Processor revision identifier. + * 15/1 MIPS_COP_0_EBASE Exception Base * 16 MIPS_COP_0_CONFIG Configuration register. * 16/1 MIPS_COP_0_CONFIG1 ..33 Configuration register 1. * 16/2 MIPS_COP_0_CONFIG2 ..33 Configuration register 2. @@ -806,6 +807,27 @@ #define MIPS_SR7100 0x04 /* SandCraft SR7100 ISA 64 */ /* + * CPU processor revision IDs for company ID == 12 (RMI) + */ +#define MIPS_XLR732 0x00 /* RMI XLS732-C ISA 64 */ +#define MIPS_XLR716 0x02 /* RMI XLS716-C ISA 64 */ +#define MIPS_XLR532 0x08 /* RMI XLS532-C ISA 64 */ +#define MIPS_XLR516 0x0a /* RMI XLS516-C ISA 64 */ +#define MIPS_XLR508 0x0b /* RMI XLS508-C ISA 64 */ +#define MIPS_XLR308 0x0f /* RMI XLS308-C ISA 64 */ +#define MIPS_XLS616 0x40 /* RMI XLS616 ISA 64 */ +#define MIPS_XLS416 0x44 /* RMI XLS416 ISA 64 */ +#define MIPS_XLS608 0x4A /* RMI XLS608 ISA 64 */ +#define MIPS_XLS408 0x4E /* RMI XLS406 ISA 64 */ +#define MIPS_XLS404 0x4F /* RMI XLS404 ISA 64 */ +#define MIPS_XLS408LITE 0x88 /* RMI XLS408-Lite ISA 64 */ +#define MIPS_XLS404LITE 0x8C /* RMI XLS404-Lite ISA 64 */ +#define MIPS_XLS208 0x8E /* RMI XLS208 ISA 64 */ +#define MIPS_XLS204 0x8F /* RMI XLS204 ISA 64 */ +#define MIPS_XLS108 0xCE /* RMI XLS108 ISA 64 */ +#define MIPS_XLS104 0xCF /* RMI XLS104 ISA 64 */ + +/* * FPU processor revision ID */ #define MIPS_SOFT 0x00 /* Software emulation ISA I */ Index: src/sys/arch/mips/include/locore.h diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.2 src/sys/arch/mips/include/locore.h:1.78.36.1.2.3 --- src/sys/arch/mips/include/locore.h:1.78.36.1.2.2 Fri Aug 21 17:32:00 2009 +++ src/sys/arch/mips/include/locore.h Sun Aug 30 10:01:03 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.h,v 1.78.36.1.2.2 2009/08/21 17:32:00 matt Exp $ */ +/* $NetBSD: locore.h,v 1.78.36.1.2.3 2009/08/30 10:01:03 matt Exp $ */ /* * Copyright 1996 The Board of Trustees of The Leland Stanford @@ -399,6 +399,7 @@ /* 0x09 unannounced */ /* 0x0a unannounced */ #define MIPS_PRID_CID_LEXRA 0x0b /* Lexra */ +#define MIPS_PRID_CID_RMI 0x0c /* RMI / NetLogic */ #define MIPS_PRID_COPTS(x) (((x) 24) 0x00ff) /* Company Options */ #ifdef _KERNEL
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: simonb Date: Sun Aug 30 13:03:02 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h Log Message: Update comment for EBASE - this is a MIPS32/MIPS64 only register To generate a diff of this commit: cvs rdiff -u -r1.74.28.3 -r1.74.28.4 src/sys/arch/mips/include/cpuregs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.3 src/sys/arch/mips/include/cpuregs.h:1.74.28.4 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.3 Sun Aug 30 10:01:03 2009 +++ src/sys/arch/mips/include/cpuregs.h Sun Aug 30 13:03:02 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.3 2009/08/30 10:01:03 matt Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.4 2009/08/30 13:03:02 simonb Exp $ */ /* * Copyright (c) 1992, 1993 @@ -451,7 +451,7 @@ * 13 MIPS_COP_0_CAUSE Exception cause register. * 14 MIPS_COP_0_EXC_PC 3636 Exception PC. * 15 MIPS_COP_0_PRID Processor revision identifier. - * 15/1 MIPS_COP_0_EBASE Exception Base + * 15/1 MIPS_COP_0_EBASE ..33 Exception Base * 16 MIPS_COP_0_CONFIG Configuration register. * 16/1 MIPS_COP_0_CONFIG1 ..33 Configuration register 1. * 16/2 MIPS_COP_0_CONFIG2 ..33 Configuration register 2.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sun Aug 23 07:49:56 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: types.h Log Message: Fix LP64 botch with vaddr_t/vsize_t To generate a diff of this commit: cvs rdiff -u -r1.43.36.4 -r1.43.36.5 src/sys/arch/mips/include/types.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/types.h diff -u src/sys/arch/mips/include/types.h:1.43.36.4 src/sys/arch/mips/include/types.h:1.43.36.5 --- src/sys/arch/mips/include/types.h:1.43.36.4 Sun Aug 23 06:38:07 2009 +++ src/sys/arch/mips/include/types.h Sun Aug 23 07:49:56 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.43.36.4 2009/08/23 06:38:07 matt Exp $ */ +/* $NetBSD: types.h,v 1.43.36.5 2009/08/23 07:49:56 matt Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -63,12 +63,20 @@ #define PRIxPSIZE PRIx32 #define PRIdPSIZE PRId32 #endif +#ifdef _LP64 +typedef __uint64_t vaddr_t; +typedef __uint64_t vsize_t; +#define PRIxVADDR PRIx64 +#define PRIxVSIZE PRIx64 +#define PRIdVSIZE PRId64 +#else typedef __uint32_t vaddr_t; typedef __uint32_t vsize_t; #define PRIxVADDR PRIx32 #define PRIxVSIZE PRIx32 #define PRIdVSIZE PRId32 #endif +#endif /* Make sure this is signed; we need pointers to be sign-extended. */ #if defined(__mips_o64) || defined(__mips_o32)
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sun Aug 23 03:40:15 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: elf_machdep.h Log Message: Make sure we only don't run other sized ELFs. To generate a diff of this commit: cvs rdiff -u -r1.10.96.4 -r1.10.96.5 src/sys/arch/mips/include/elf_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/elf_machdep.h diff -u src/sys/arch/mips/include/elf_machdep.h:1.10.96.4 src/sys/arch/mips/include/elf_machdep.h:1.10.96.5 --- src/sys/arch/mips/include/elf_machdep.h:1.10.96.4 Sat Aug 22 06:46:45 2009 +++ src/sys/arch/mips/include/elf_machdep.h Sun Aug 23 03:40:14 2009 @@ -1,23 +1,31 @@ -/* $NetBSD: elf_machdep.h,v 1.10.96.4 2009/08/22 06:46:45 matt Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.10.96.5 2009/08/23 03:40:14 matt Exp $ */ #ifndef _MIPS_ELF_MACHDEP_H_ #define _MIPS_ELF_MACHDEP_H_ #if defined(ELFSIZE) #if ELFSIZE == 32 +#ifdef _LP64 +#define ELF32_MACHDEP_ID_CASES /* xxx */ +#else #define ELF32_MACHDEP_ID_CASES \ case EM_MIPS: \ break; +#endif /* _LP64 */ #define ELF32_MACHDEP_ID EM_MIPS -#endif +#endif /* ELFSIZE == 32 */ #if ELFSIZE == 64 +#ifdef _LP64 #define ELF64_MACHDEP_ID_CASES \ case EM_MIPS: \ break; +#else +#define ELF64_MACHDEP_ID_CASES /* xxx */ +#endif /* _LP64 */ #define ELF64_MACHDEP_ID EM_MIPS -#endif +#endif /* ELFSIZE == 64 */ #endif /* defined(ELFSIZE) */ #ifdef _LP64
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Sun Aug 23 03:57:42 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cdefs.h Log Message: Use #if defined(__mips_xxx) not #if __mips_xxx To generate a diff of this commit: cvs rdiff -u -r1.12.78.2 -r1.12.78.3 src/sys/arch/mips/include/cdefs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cdefs.h diff -u src/sys/arch/mips/include/cdefs.h:1.12.78.2 src/sys/arch/mips/include/cdefs.h:1.12.78.3 --- src/sys/arch/mips/include/cdefs.h:1.12.78.2 Fri Aug 21 17:18:32 2009 +++ src/sys/arch/mips/include/cdefs.h Sun Aug 23 03:57:42 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cdefs.h,v 1.12.78.2 2009/08/21 17:18:32 matt Exp $ */ +/* $NetBSD: cdefs.h,v 1.12.78.3 2009/08/23 03:57:42 matt Exp $ */ /* * Copyright (c) 1995 Carnegie-Mellon University. @@ -54,11 +54,11 @@ #define _MIPS_SIM_LP64_P(abi) ((abi) == _MIPS_SIM_ABIX32 || \ (abi) == _MIPS_SIM_ABI64) -#if __mips_n64 +#if defined(__mips_n64) #define _MIPS_BSD_API _MIPS_BSD_API_N64 -#elif __mips_n32 +#elif defined(__mips_n32) #define _MIPS_BSD_API _MIPS_BSD_API_N32 -#elif __mips_o64 +#elif defined(__mips_o64) #define _MIPS_BSD_API _MIPS_BSD_API_O64 #else #define _MIPS_BSD_API _MIPS_BSD_API_O32
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri Aug 21 17:17:37 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h Log Message: Make cpu_proc_fork copy the abi from process to process. To generate a diff of this commit: cvs rdiff -u -r1.90 -r1.90.16.1 src/sys/arch/mips/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpu.h diff -u src/sys/arch/mips/include/cpu.h:1.90 src/sys/arch/mips/include/cpu.h:1.90.16.1 --- src/sys/arch/mips/include/cpu.h:1.90 Mon May 26 15:59:29 2008 +++ src/sys/arch/mips/include/cpu.h Fri Aug 21 17:17:37 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.90 2008/05/26 15:59:29 tsutsui Exp $ */ +/* $NetBSD: cpu.h,v 1.90.16.1 2009/08/21 17:17:37 matt Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -142,7 +142,7 @@ #define curpcb ((struct pcb *)curlwp-l_addr) #define fpcurlwp (curcpu()-ci_fpcurlwp) #define cpu_number() (0) -#define cpu_proc_fork(p1, p2) +#define cpu_proc_fork(p1, p2) ((void)((p2)-p_md.md_abi = (p1)-p_md.md_abi)) /* XXX simonb * Should the following be in a cpu_info type structure?
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri Aug 21 17:18:32 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cdefs.h Log Message: Add support for testing instruction sets and cleanup ABI a little. To generate a diff of this commit: cvs rdiff -u -r1.12.78.1 -r1.12.78.2 src/sys/arch/mips/include/cdefs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cdefs.h diff -u src/sys/arch/mips/include/cdefs.h:1.12.78.1 src/sys/arch/mips/include/cdefs.h:1.12.78.2 --- src/sys/arch/mips/include/cdefs.h:1.12.78.1 Sun Aug 16 03:33:57 2009 +++ src/sys/arch/mips/include/cdefs.h Fri Aug 21 17:18:32 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cdefs.h,v 1.12.78.1 2009/08/16 03:33:57 matt Exp $ */ +/* $NetBSD: cdefs.h,v 1.12.78.2 2009/08/21 17:18:32 matt Exp $ */ /* * Copyright (c) 1995 Carnegie-Mellon University. @@ -41,17 +41,34 @@ #define _MIPS_BSD_API_LP32 _MIPS_SIM_ABI32 #define _MIPS_BSD_API_LP32_64CLEAN _MIPS_SIM_ABIX32 -#define _MIPS_BSD_API_N32 _MIPS_SIM_NABI32 #define _MIPS_BSD_API_LP64 _MIPS_SIM_ABI64 +#define _MIPS_BSD_API_O32 _MIPS_SIM_ABI32 +#define _MIPS_BSD_API_O64 _MIPS_SIM_ABIX32 +#define _MIPS_BSD_API_N32 _MIPS_SIM_NABI32 +#define _MIPS_BSD_API_N64 _MIPS_SIM_ABI64 + +#define _MIPS_SIM_NEWABI_P(abi) ((abi) == _MIPS_SIM_NABI32 || \ + (abi) == _MIPS_SIM_ABI64) + +#define _MIPS_SIM_LP64_P(abi) ((abi) == _MIPS_SIM_ABIX32 || \ + (abi) == _MIPS_SIM_ABI64) + #if __mips_n64 -#define _MIPS_BSD_API _MIPS_BSD_API_LP64 +#define _MIPS_BSD_API _MIPS_BSD_API_N64 #elif __mips_n32 #define _MIPS_BSD_API _MIPS_BSD_API_N32 #elif __mips_o64 -#define _MIPS_BSD_API _MIPS_BSD_API_LP32_64CLEAN +#define _MIPS_BSD_API _MIPS_BSD_API_O64 #else -#define _MIPS_BSD_API _MIPS_BSD_API_LP32 +#define _MIPS_BSD_API _MIPS_BSD_API_O32 #endif +#define _MIPS_ISA_MIPS1 1 +#define _MIPS_ISA_MIPS2 2 +#define _MIPS_ISA_MIPS3 3 +#define _MIPS_ISA_MIPS4 4 +#define _MIPS_ISA_MIPS32 5 +#define _MIPS_ISA_MIPS64 6 + #endif /* !_MIPS_CDEFS_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri Aug 21 17:19:47 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: setjmp.h Log Message: Fix _JBLEN to be correct (why was i thinking mips64 has 64 fp regs?). To generate a diff of this commit: cvs rdiff -u -r1.7.138.1 -r1.7.138.2 src/sys/arch/mips/include/setjmp.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/setjmp.h diff -u src/sys/arch/mips/include/setjmp.h:1.7.138.1 src/sys/arch/mips/include/setjmp.h:1.7.138.2 --- src/sys/arch/mips/include/setjmp.h:1.7.138.1 Sun Aug 16 03:33:58 2009 +++ src/sys/arch/mips/include/setjmp.h Fri Aug 21 17:19:47 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: setjmp.h,v 1.7.138.1 2009/08/16 03:33:58 matt Exp $ */ +/* $NetBSD: setjmp.h,v 1.7.138.2 2009/08/21 17:19:47 matt Exp $ */ /* * mips/setjmp.h: machine dependent setjmp-related information. @@ -7,11 +7,7 @@ * struct sigcontext to restore it. */ -#if defined(__mips_o32) #define _JBLEN 87 /* XXX Naively 84; 87 for compatibility */ -#else -#define _JBLEN (87 + 33) /* 32 more FP registers */ #ifdef __mips_n32 #define _BSD_JBSLOT_T_ long long #endif -#endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri Aug 21 17:20:46 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: proc.h Log Message: No need for md_fancy anymore since p_trace_enabled already has what we want. To generate a diff of this commit: cvs rdiff -u -r1.21.36.1 -r1.21.36.2 src/sys/arch/mips/include/proc.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/proc.h diff -u src/sys/arch/mips/include/proc.h:1.21.36.1 src/sys/arch/mips/include/proc.h:1.21.36.2 --- src/sys/arch/mips/include/proc.h:1.21.36.1 Thu Aug 20 07:52:38 2009 +++ src/sys/arch/mips/include/proc.h Fri Aug 21 17:20:46 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: proc.h,v 1.21.36.1 2009/08/20 07:52:38 matt Exp $ */ +/* $NetBSD: proc.h,v 1.21.36.2 2009/08/21 17:20:46 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -59,7 +59,6 @@ /* syscall entry for this process */ void (*md_syscall)(struct lwp *, u_int, u_int, vaddr_t); int md_abi; /* which ABI is this process using? */ - int md_fancy; }; /* md_flags */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Fri Aug 21 17:26:23 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h vmparam.h Log Message: Define manifest kernel addresses as negative so that proper sign extension happens. This gives proper results for both 32bit and 64bit kernels. To generate a diff of this commit: cvs rdiff -u -r1.74.28.1 -r1.74.28.2 src/sys/arch/mips/include/cpuregs.h cvs rdiff -u -r1.41 -r1.41.28.1 src/sys/arch/mips/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/cpuregs.h diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.1 src/sys/arch/mips/include/cpuregs.h:1.74.28.2 --- src/sys/arch/mips/include/cpuregs.h:1.74.28.1 Thu Aug 20 07:49:52 2009 +++ src/sys/arch/mips/include/cpuregs.h Fri Aug 21 17:26:23 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: cpuregs.h,v 1.74.28.1 2009/08/20 07:49:52 matt Exp $ */ +/* $NetBSD: cpuregs.h,v 1.74.28.2 2009/08/21 17:26:23 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -76,31 +76,36 @@ * Caching of mapped addresses is controlled by bits in the TLB entry. */ -#define MIPS_KUSEG_START 0x0 -#define MIPS_KSEG0_START 0x8000 -#define MIPS_KSEG1_START 0xa000 -#define MIPS_KSEG2_START 0xc000 -#define MIPS_MAX_MEM_ADDR 0xbe00 -#define MIPS_RESERVED_ADDR 0xbfc8 +#define MIPS_KUSEG_START 0x0L + +/* + * MIPS addresses are signed and we defining as negative so that + * in LP64 kern they get sign-extended correctly. + */ +#define MIPS_KSEG0_START (-0x7fff-1) /* 0x8000 */ +#define MIPS_KSEG1_START -0x6000 /* 0xa000 */ +#define MIPS_KSEG2_START -0x4000 /* 0xc000 */ +#define MIPS_MAX_MEM_ADDR -0x4200 /* 0xbe00 */ +#define MIPS_RESERVED_ADDR -0x4038 /* 0xbfc8 */ #define MIPS_PHYS_MASK 0x1fff #define MIPS_KSEG0_TO_PHYS(x) ((uintptr_t)(x) MIPS_PHYS_MASK) -#define MIPS_PHYS_TO_KSEG0(x) ((uintptr_t)(x) | MIPS_KSEG0_START) +#define MIPS_PHYS_TO_KSEG0(x) ((uintptr_t)(x) | (intptr_t)MIPS_KSEG0_START) #define MIPS_KSEG1_TO_PHYS(x) ((uintptr_t)(x) MIPS_PHYS_MASK) -#define MIPS_PHYS_TO_KSEG1(x) ((uintptr_t)(x) | MIPS_KSEG1_START) +#define MIPS_PHYS_TO_KSEG1(x) ((uintptr_t)(x) | (intptr_t)MIPS_KSEG1_START) /* Map virtual address to index in mips3 r4k virtually-indexed cache */ #define MIPS3_VA_TO_CINDEX(x) \ - ((uintptr_t)(x) 0xff | MIPS_KSEG0_START) - -#define MIPS_XSEG_MASK (0x3fffULL) -#define MIPS_XKSEG_BASE (0x3ULL 62) + (((intptr_t)(x) 0xff) | MIPS_KSEG0_START) +#define MIPS_XSEG_MASK (0x3fffLL) +#define MIPS_XKSEG_START (0x3ULL 62) #define MIPS_XKSEG_P(x) (((uint64_t)(x) 62) == 3) +#define MIPS_XKPHYS_START (0x2ULL 62) #define MIPS_PHYS_TO_XKPHYS(cca,x) \ - ((0x2ULL 62) | ((uint64_t)(cca) 59) | (x)) -#define MIPS_XKPHYS_TO_PHYS(x) ((x) 0x0effULL) + (MIPS_XKPHYS_START | ((uint64_t)(cca) 59) | (x)) +#define MIPS_XKPHYS_TO_PHYS(x) ((x) 0x0effLL) #define MIPS_XKPHYS_P(x) (((uint64_t)(x) 62) == 2) /* CPU dependent mtc0 hazard hook */ @@ -399,31 +404,31 @@ * * Common vectors: reset and UTLB miss. */ -#define MIPS_RESET_EXC_VEC 0xBFC0 -#define MIPS_UTLB_MISS_EXC_VEC 0x8000 +#define MIPS_RESET_EXC_VEC MIPS_PHYS_TO_KSEG1(0x1FC0) +#define MIPS_UTLB_MISS_EXC_VEC MIPS_PHYS_TO_KSEG0(0) /* * MIPS-1 general exception vector (everything else) */ -#define MIPS1_GEN_EXC_VEC 0x8080 +#define MIPS1_GEN_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0080) /* * MIPS-III exception vectors */ -#define MIPS3_XTLB_MISS_EXC_VEC 0x8080 -#define MIPS3_CACHE_ERR_EXC_VEC 0x8100 -#define MIPS3_GEN_EXC_VEC 0x8180 +#define MIPS3_XTLB_MISS_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0080) +#define MIPS3_CACHE_ERR_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0100) +#define MIPS3_GEN_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0180) /* * TX79 (R5900) exception vectors */ -#define MIPS_R5900_COUNTER_EXC_VEC 0x8080 -#define MIPS_R5900_DEBUG_EXC_VEC 0x8100 +#define MIPS_R5900_COUNTER_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0080) +#define MIPS_R5900_DEBUG_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0100) /* * MIPS32/MIPS64 (and some MIPS3) dedicated interrupt vector. */ -#define MIPS3_INTR_EXC_VEC 0x8200 +#define MIPS3_INTR_EXC_VEC MIPS_PHYS_TO_KSEG0(0x0200) /* * Coprocessor 0 registers: Index: src/sys/arch/mips/include/vmparam.h diff -u src/sys/arch/mips/include/vmparam.h:1.41 src/sys/arch/mips/include/vmparam.h:1.41.28.1 --- src/sys/arch/mips/include/vmparam.h:1.41 Wed Dec 26 16:01:34 2007 +++ src/sys/arch/mips/include/vmparam.h Fri Aug 21 17:26:23 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41 2007/12/26 16:01:34 ad Exp $ */ +/* $NetBSD: vmparam.h,v 1.41.28.1 2009/08/21 17:26:23 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -142,15 +142,18 @@ * Mach derived constants */ -/* user/kernel map constants */ +/* + * user/kernel map constants + * These
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Fri Aug 21 17:29:42 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: types.h
Log Message:
Adapt to ABI variations. Make sure mips_reg_t == register_t.
Add PRIx{{P,V}{ADDR,SIZE}} and PRIxREGISTER{,32} macros to assist
printing out above types.
To generate a diff of this commit:
cvs rdiff -u -r1.43.36.1 -r1.43.36.2 src/sys/arch/mips/include/types.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/types.h
diff -u src/sys/arch/mips/include/types.h:1.43.36.1 src/sys/arch/mips/include/types.h:1.43.36.2
--- src/sys/arch/mips/include/types.h:1.43.36.1 Sun Aug 16 03:33:58 2009
+++ src/sys/arch/mips/include/types.h Fri Aug 21 17:29:42 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: types.h,v 1.43.36.1 2009/08/16 03:33:58 matt Exp $ */
+/* $NetBSD: types.h,v 1.43.36.2 2009/08/21 17:29:42 matt Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -47,18 +47,18 @@
* the rest of the operating system as possible.
*/
-#if !defined(__mips_o32)
+#if defined(__mips_n32)
typedef long long mips_reg_t;
typedef unsigned long long mips_ureg_t;
-#if defined(__mips_o64)
+typedef long long mips_fpreg_t;
+#else
+#if defined(__mips_o64) || defined(__mips_o32)
typedef int mips_fpreg_t;
#else
-typedef long long mips_fpreg_t;
+typedef long mips_fpreg_t;
#endif
-#else
typedef long mips_reg_t;
typedef unsigned long mips_ureg_t;
-typedef long mips_fpreg_t;
#endif
/* NB: This should probably be if defined(_KERNEL) */
@@ -66,18 +66,32 @@
#if defined(_MIPS_PADDR_T_64BIT) !defined(_LP64)
typedef unsigned long long paddr_t;
typedef unsigned long long psize_t;
+#define PRIxPADDR llx
+#define PRIxPSIZE llx
#else
typedef unsigned long paddr_t;
typedef unsigned long psize_t;
+#define PRIxPADDR lx
+#define PRIxPSIZE lx
#endif
typedef unsigned long vaddr_t;
typedef unsigned long vsize_t;
+#define PRIxVADDR lx
+#define PRIxVSIZE lx
#endif
/* Make sure this is signed; we need pointers to be sign-extended. */
#if defined(__mips_n32)
+typedef long register32_t;
typedef long long register_t;
+#define PRIxREGISTER32 lx
+#define PRIxREGISTER llx
#else
+#if !defined(__mips_o32)
+typedef int register32_t;
+#define PRIxREGISTER32 x
+#endif
+#define PRIxREGISTER lx
typedef long register_t;
#endif /* __mips_n32 */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Fri Aug 21 17:32:00 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: locore.h
Log Message:
Define locoresw struct and use it.
Make tf_pad mips_reg_t since a register is stored in it.
remove argument save area from kernframe on NewABI.
To generate a diff of this commit:
cvs rdiff -u -r1.78.36.1.2.1 -r1.78.36.1.2.2 \
src/sys/arch/mips/include/locore.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/locore.h
diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.1 src/sys/arch/mips/include/locore.h:1.78.36.1.2.2
--- src/sys/arch/mips/include/locore.h:1.78.36.1.2.1 Sun Aug 16 03:33:57 2009
+++ src/sys/arch/mips/include/locore.h Fri Aug 21 17:32:00 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.78.36.1.2.1 2009/08/16 03:33:57 matt Exp $ */
+/* $NetBSD: locore.h,v 1.78.36.1.2.2 2009/08/21 17:32:00 matt Exp $ */
/*
* Copyright 1996 The Board of Trustees of The Leland Stanford
@@ -300,11 +300,18 @@
void stacktrace(void);
void logstacktrace(void);
+struct locoresw {
+ uintptr_t lsw_cpu_switch_resume;
+ uintptr_t lsw_lwp_trampoline;
+ void (*lsw_cpu_idle)(void);
+ uintptr_t lsw_setfunc_trampoline;
+};
+
/*
* The active locore-fuction vector, and
*/
extern mips_locore_jumpvec_t mips_locore_jumpvec;
-extern long *mips_locoresw[];
+extern struct locoresw mips_locoresw;
#ifdefined(MIPS1) !defined(MIPS3) !defined(MIPS32) !defined(MIPS64)
#define MachSetPID mips1_SetPID
@@ -357,11 +364,11 @@
#define MIPS_TBIS (*(mips_locore_jumpvec.TBIS))
#define MachTLBUpdate (*(mips_locore_jumpvec.tlbUpdate))
#define wbflush() (*(mips_locore_jumpvec.wbflush))()
-#define lwp_trampoline (mips_locoresw[1])
-#define setfunc_trampoline (mips_locoresw[3])
+#define lwp_trampoline mips_locoresw.lsw_lwp_trampoline
+#define setfunc_trampoline mips_locoresw.lsw_setfunc_trampoline
#endif
-#define CPU_IDLE (mips_locoresw[2])
+#define CPU_IDLE mips_locoresw.lsw_cpu_idle
/* cpu_switch_resume is called inside locore.S */
@@ -457,8 +464,8 @@
struct trapframe {
mips_reg_t tf_regs[TF_NREGS];
- u_int32_t tf_ppl; /* previous priority level */
- int32_ttf_pad; /* for 8 byte aligned */
+ uint32_t tf_ppl; /* previous priority level */
+ mips_reg_t tf_pad; /* for 8 byte aligned */
};
/*
@@ -475,7 +482,7 @@
#endif
#endif
#if defined(__mips_n32) || defined(__mips_n64)
- register_t cf_args[8 + 1];
+ register_t cf_pad;
#endif
register_t cf_sp;
register_t cf_ra;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src
Committed By: matt
Date: Fri Aug 21 17:33:17 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: asm.h
Log Message:
For now use old callframe defs for O32 to reduce spurious code gen
differences make real differences easier to spot.
To generate a diff of this commit:
cvs rdiff -u -r1.40.38.5 -r1.40.38.6 src/sys/arch/mips/include/asm.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/asm.h
diff -u src/sys/arch/mips/include/asm.h:1.40.38.5 src/sys/arch/mips/include/asm.h:1.40.38.6
--- src/sys/arch/mips/include/asm.h:1.40.38.5 Thu Aug 20 07:45:40 2009
+++ src/sys/arch/mips/include/asm.h Fri Aug 21 17:33:17 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: asm.h,v 1.40.38.5 2009/08/20 07:45:40 matt Exp $ */
+/* $NetBSD: asm.h,v 1.40.38.6 2009/08/21 17:33:17 matt Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -303,22 +303,23 @@
/*
* standard callframe {
- * register_t cf_pad[N]; o32 (N=2), n32/n64=(N=1)
+ * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1)
* register_t cf_args[4]; arg0 - arg3 (only on o32 and o64)
* register_t cf_gp; global pointer (only on n32 and n64)
* register_t cf_sp; frame pointer
* register_t cf_ra; return address
* };
*/
-#if defined(__mips_o32)
-#define CALLFRAME_SIZ (SZREG * (4 + 4))
-#elif defined(__mips_o64)
-#define CALLFRAME_SIZ (SZREG * (4 + 4))
+#if defined(__mips_o32) || defined(__mips_o64)
+#define CALLFRAME_SIZ (SZREG * (4 + 2))
+#define CALLFRAME_S0 0
#elif defined(__mips_n32) || defined(__mips_n64)
#define CALLFRAME_SIZ (SZREG * 4)
-#endif
#define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG)
+#endif
+#ifndef _KERNEL
#define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG)
+#endif
#define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG)
#define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG)
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/include
Module Name:src Committed By: matt Date: Thu Aug 20 07:44:50 UTC 2009 Modified Files: src/sys/arch/mips/include [matt-nb5-mips64]: mips3_pte.h Log Message: Add a MIPS3_PG_TO_CCA() macro to get the CCA out of the saved page attributes. To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.23.38.1 src/sys/arch/mips/include/mips3_pte.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/include/mips3_pte.h diff -u src/sys/arch/mips/include/mips3_pte.h:1.23 src/sys/arch/mips/include/mips3_pte.h:1.23.38.1 --- src/sys/arch/mips/include/mips3_pte.h:1.23 Wed Oct 17 19:55:37 2007 +++ src/sys/arch/mips/include/mips3_pte.h Thu Aug 20 07:44:50 2009 @@ -1,4 +1,4 @@ -/* $NetBSD: mips3_pte.h,v 1.23 2007/10/17 19:55:37 garbled Exp $ */ +/* $NetBSD: mips3_pte.h,v 1.23.38.1 2009/08/20 07:44:50 matt Exp $ */ /* * Copyright (c) 1992, 1993 @@ -126,6 +126,7 @@ #define MIPS3_PG_ATTR 0x003f #define MIPS3_CCA_TO_PG(cca) ((cca) 3) +#define MIPS3_PG_TO_CCA(cca) (((cca) 3) 7) #define MIPS3_PG_UNCACHED MIPS3_CCA_TO_PG(2) #ifdef HPCMIPS_L1CACHE_DISABLE /* MIPS3_L1CACHE_DISABLE */
