CVS commit: src/sys/arch/aarch64
Module Name:src Committed By: jmcneill Date: Sat Jul 24 23:38:41 UTC 2021 Modified Files: src/sys/arch/aarch64/conf: files.aarch64 Removed Files: src/sys/arch/aarch64/aarch64: cctr_machdep.c Log Message: aarch64: Remove empty source file and references to it. To generate a diff of this commit: cvs rdiff -u -r1.1 -r0 src/sys/arch/aarch64/aarch64/cctr_machdep.c cvs rdiff -u -r1.30 -r1.31 src/sys/arch/aarch64/conf/files.aarch64 Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/conf/files.aarch64 diff -u src/sys/arch/aarch64/conf/files.aarch64:1.30 src/sys/arch/aarch64/conf/files.aarch64:1.31 --- src/sys/arch/aarch64/conf/files.aarch64:1.30 Wed Oct 21 13:31:50 2020 +++ src/sys/arch/aarch64/conf/files.aarch64 Sat Jul 24 23:38:41 2021 @@ -1,4 +1,4 @@ -# $NetBSD: files.aarch64,v 1.30 2020/10/21 13:31:50 christos Exp $ +# $NetBSD: files.aarch64,v 1.31 2021/07/24 23:38:41 jmcneill Exp $ defflag opt_cpuoptions.h AARCH64_ALIGNMENT_CHECK defflag opt_cpuoptions.h AARCH64_EL0_STACK_ALIGNMENT_CHECK @@ -53,7 +53,6 @@ defflag opt_pmapboot.h PMAPBOOT_DEBUG # MI support file dev/cons.c -#file kern/kern_cctr.c # DDB file arch/aarch64/aarch64/db_disasm.c ddb @@ -117,11 +116,6 @@ file uvm/pmap/pmap_pvt.c # EFI runtime (machdep) file arch/aarch64/aarch64/efi_machdep.c efi_runtime -# cyclecounter -#file arch/aarch64/aarch64/cctr_machdep.c -#file kern/kern_cctr.c - - # NetBSD 32-bit binary compatibility include "compat/netbsd32/files.netbsd32" file arch/aarch64/aarch64/netbsd32_machdep.c compat_netbsd32
CVS commit: src/sys/arch/aarch64
Module Name:src
Committed By: jmcneill
Date: Sat Jun 19 13:40:00 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: cpu.c
src/sys/arch/aarch64/include: armreg.h
Log Message:
Do not try to initialize PMU if ID_AA64DFR0_EL1 reports a non-standard
PMU implementation.
To generate a diff of this commit:
cvs rdiff -u -r1.59 -r1.60 src/sys/arch/aarch64/aarch64/cpu.c
cvs rdiff -u -r1.56 -r1.57 src/sys/arch/aarch64/include/armreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.59 src/sys/arch/aarch64/aarch64/cpu.c:1.60
--- src/sys/arch/aarch64/aarch64/cpu.c:1.59 Tue Mar 9 16:44:27 2021
+++ src/sys/arch/aarch64/aarch64/cpu.c Sat Jun 19 13:40:00 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.59 2021/03/09 16:44:27 ryo Exp $ */
+/* $NetBSD: cpu.c,v 1.60 2021/06/19 13:40:00 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.59 2021/03/09 16:44:27 ryo Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.60 2021/06/19 13:40:00 jmcneill Exp $");
#include "locators.h"
#include "opt_arm_debug.h"
@@ -486,6 +486,10 @@ cpu_init_counter(struct cpu_info *ci)
/* Performance Monitors Extension not implemented. */
return;
}
+ if (pmuver == ID_AA64DFR0_EL1_PMUVER_IMPL) {
+ /* Non-standard Performance Monitors are not supported. */
+ return;
+ }
reg_pmcr_el0_write(PMCR_E | PMCR_C);
reg_pmcntenset_el0_write(PMCNTEN_C);
Index: src/sys/arch/aarch64/include/armreg.h
diff -u src/sys/arch/aarch64/include/armreg.h:1.56 src/sys/arch/aarch64/include/armreg.h:1.57
--- src/sys/arch/aarch64/include/armreg.h:1.56 Sat Jun 19 13:38:21 2021
+++ src/sys/arch/aarch64/include/armreg.h Sat Jun 19 13:40:00 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.56 2021/06/19 13:38:21 jmcneill Exp $ */
+/* $NetBSD: armreg.h,v 1.57 2021/06/19 13:40:00 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -248,6 +248,7 @@ AARCH64REG_READ_INLINE(id_aa64dfr0_el1)
#define ID_AA64DFR0_EL1_PMUVER_NONE 0
#define ID_AA64DFR0_EL1_PMUVER_V3 1
#define ID_AA64DFR0_EL1_PMUVER_NOV3 2
+#define ID_AA64DFR0_EL1_PMUVER_IMPL 15
#define ID_AA64DFR0_EL1_TRACEVER __BITS(4,7)
#define ID_AA64DFR0_EL1_TRACEVER_NONE 0
#define ID_AA64DFR0_EL1_TRACEVER_IMPL 1
CVS commit: src/sys/arch/aarch64/include
Module Name:src
Committed By: jmcneill
Date: Sat Jun 19 13:38:21 UTC 2021
Modified Files:
src/sys/arch/aarch64/include: armreg.h
Log Message:
CNTV_CTL_EL0 is a 64-bit register
To generate a diff of this commit:
cvs rdiff -u -r1.55 -r1.56 src/sys/arch/aarch64/include/armreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/armreg.h
diff -u src/sys/arch/aarch64/include/armreg.h:1.55 src/sys/arch/aarch64/include/armreg.h:1.56
--- src/sys/arch/aarch64/include/armreg.h:1.55 Tue Mar 9 16:41:43 2021
+++ src/sys/arch/aarch64/include/armreg.h Sat Jun 19 13:38:21 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.55 2021/03/09 16:41:43 ryo Exp $ */
+/* $NetBSD: armreg.h,v 1.56 2021/06/19 13:38:21 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -1506,7 +1506,7 @@ gtmr_cntvct_read(void)
/*
* Counter-timer Virtual Timer Control register
*/
-static __inline uint32_t
+static __inline uint64_t
gtmr_cntv_ctl_read(void)
{
@@ -1514,7 +1514,7 @@ gtmr_cntv_ctl_read(void)
}
static __inline void
-gtmr_cntv_ctl_write(uint32_t val)
+gtmr_cntv_ctl_write(uint64_t val)
{
reg_cntv_ctl_el0_write(val);
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Thu Jun 3 07:02:59 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: aarch64_machdep.c
Log Message:
Two fixes for loading free pages into UVM
- Only consider a boot_physmem (inner loop) range that has its end
(bp_end) after the bootconfig.dram (outer loop) range start (start).
This was harmless as a later condition correctly checks there is only
something to do if start < bp_end.
- Stop processing boot_physmem ranges if all the bootconfig.dram range has
been passed to UVM. This fixes a boot problem for simon@
To generate a diff of this commit:
cvs rdiff -u -r1.60 -r1.61 src/sys/arch/aarch64/aarch64/aarch64_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c
diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.60 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.61
--- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.60 Thu Mar 25 07:31:56 2021
+++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Thu Jun 3 07:02:59 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64_machdep.c,v 1.60 2021/03/25 07:31:56 skrll Exp $ */
+/* $NetBSD: aarch64_machdep.c,v 1.61 2021/06/03 07:02:59 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.60 2021/03/25 07:31:56 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.61 2021/06/03 07:02:59 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -391,12 +391,15 @@ initarm_common(vaddr_t kvm_base, vsize_t
* order.
*/
paddr_t segend = end;
- for (size_t j = 0; j < nbp; j++) {
+ for (size_t j = 0; j < nbp && start < end; j++) {
paddr_t bp_start = bp[j].bp_start;
paddr_t bp_end = bp_start + bp[j].bp_pages;
+ VPRINTF(" bp %2zu start %08lx end %08lx\n",
+ j, ptoa(bp_start), ptoa(bp_end));
+
KASSERT(bp_start < bp_end);
- if (start > bp_end || segend < bp_start)
+ if (start >= bp_end || segend < bp_start)
continue;
if (start < bp_start)
@@ -414,6 +417,7 @@ initarm_common(vaddr_t kvm_base, vsize_t
uvm_page_physload(start, segend, start, segend,
vm_freelist);
+
memsize_total += ptoa(segend - start);
start = segend;
segend = end;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: rin
Date: Sun May 30 05:40:57 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: netbsd32_machdep.c
Log Message:
Fix conversion between aarch64 and aarch32 fpreg's; in aarch32 mode,
d0-d31 are packed into v0-v15 (== q0-q15).
This fixes crashes in VFP-optimized codes running on COMPAT_NETBSD32.
OK ryo
To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/aarch64/aarch64/netbsd32_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/netbsd32_machdep.c
diff -u src/sys/arch/aarch64/aarch64/netbsd32_machdep.c:1.17 src/sys/arch/aarch64/aarch64/netbsd32_machdep.c:1.18
--- src/sys/arch/aarch64/aarch64/netbsd32_machdep.c:1.17 Fri Dec 11 18:03:33 2020
+++ src/sys/arch/aarch64/aarch64/netbsd32_machdep.c Sun May 30 05:40:56 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: netbsd32_machdep.c,v 1.17 2020/12/11 18:03:33 skrll Exp $ */
+/* $NetBSD: netbsd32_machdep.c,v 1.18 2021/05/30 05:40:56 rin Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.17 2020/12/11 18:03:33 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.18 2021/05/30 05:40:56 rin Exp $");
#if defined(_KERNEL_OPT)
#include "opt_compat_netbsd.h"
@@ -158,7 +158,7 @@ netbsd32_process_read_fpregs(struct lwp
{
struct proc * const p = l->l_proc;
struct pcb * const pcb = lwp_getpcb(l);
- int i;
+ int i, j;
if ((p->p_flag & PK_32) == 0)
return EINVAL;
@@ -180,11 +180,17 @@ netbsd32_process_read_fpregs(struct lwp
fpregs->fpr_vfp.vfp_fpinst = 0;
fpregs->fpr_vfp.vfp_fpinst2 = 0;
- for (i = 0; i < 32; i++) {
+ for (i = j = 0; i < 16; i++) {
#ifdef __AARCH64EB__
- fpregs->fpr_vfp.vfp_regs[i] = pcb->pcb_fpregs.fp_reg[i].u64[1];
+ fpregs->fpr_vfp.vfp_regs[j++] =
+ pcb->pcb_fpregs.fp_reg[i].u64[1];
+ fpregs->fpr_vfp.vfp_regs[j++] =
+ pcb->pcb_fpregs.fp_reg[i].u64[0];
#else
- fpregs->fpr_vfp.vfp_regs[i] = pcb->pcb_fpregs.fp_reg[i].u64[0];
+ fpregs->fpr_vfp.vfp_regs[j++] =
+ pcb->pcb_fpregs.fp_reg[i].u64[0];
+ fpregs->fpr_vfp.vfp_regs[j++] =
+ pcb->pcb_fpregs.fp_reg[i].u64[1];
#endif
}
@@ -226,7 +232,7 @@ netbsd32_process_write_fpregs(struct lwp
{
struct proc * const p = l->l_proc;
struct pcb * const pcb = lwp_getpcb(l);
- int i;
+ int i, j;
if ((p->p_flag & PK_32) == 0)
return EINVAL;
@@ -237,17 +243,18 @@ netbsd32_process_write_fpregs(struct lwp
pcb->pcb_fpregs.fpsr = fpregs->fpr_vfp.vfp_fpscr & FPSR_BITS;
pcb->pcb_fpregs.fpcr = fpregs->fpr_vfp.vfp_fpscr & FPCR_BITS;
- CTASSERT(__arraycount(fpregs->fpr_vfp.vfp_regs) ==
- __arraycount(pcb->pcb_fpregs.fp_reg) + 1);
- for (i = 0; i < __arraycount(pcb->pcb_fpregs.fp_reg); i++) {
+ for (i = j = 0; i < 16; i++) {
#ifdef __AARCH64EB__
- pcb->pcb_fpregs.fp_reg[i].u64[0] = 0;
pcb->pcb_fpregs.fp_reg[i].u64[1] =
+ fpregs->fpr_vfp.vfp_regs[j++];
+ pcb->pcb_fpregs.fp_reg[i].u64[0] =
+ fpregs->fpr_vfp.vfp_regs[j++];
#else
- pcb->pcb_fpregs.fp_reg[i].u64[1] = 0;
pcb->pcb_fpregs.fp_reg[i].u64[0] =
+ fpregs->fpr_vfp.vfp_regs[j++];
+ pcb->pcb_fpregs.fp_reg[i].u64[1] =
+ fpregs->fpr_vfp.vfp_regs[j++];
#endif
- fpregs->fpr_vfp.vfp_regs[i];
}
return 0;
@@ -458,18 +465,21 @@ cpu_getmcontext32(struct lwp *l, mcontex
/* fpu context */
if (fpu_used_p(l)) {
const struct pcb * const pcb = lwp_getpcb(l);
- int i;
+ int i, j;
fpu_save(l);
- CTASSERT(__arraycount(mcp->__vfpregs.__vfp_fstmx) ==
- __arraycount(pcb->pcb_fpregs.fp_reg));
- for (i = 0; i < __arraycount(pcb->pcb_fpregs.fp_reg); i++) {
- mcp->__vfpregs.__vfp_fstmx[i] =
+ for (i = j = 0; i < 16; i++) {
#ifdef __AARCH64EB__
+ mcp->__vfpregs.__vfp_fstmx[j++] =
pcb->pcb_fpregs.fp_reg[i].u64[1];
+ mcp->__vfpregs.__vfp_fstmx[j++] =
+ pcb->pcb_fpregs.fp_reg[i].u64[0];
#else
+ mcp->__vfpregs.__vfp_fstmx[j++] =
pcb->pcb_fpregs.fp_reg[i].u64[0];
+ mcp->__vfpregs.__vfp_fstmx[j++] =
+ pcb->pcb_fpregs.fp_reg[i].u64[1];
#endif
}
@@ -491,7 +501,7 @@ cpu_setmcontext32(struct lwp *l, const m
struct trapframe * const tf = l->l_md.md_utf;
const __greg32_t * const gr = mcp->__gregs;
struct proc * const p = l->l_proc;
- int error, i;
+ int error, i, j;
if (flags & _UC_CPU) {
error = cpu_mcontext32_validate(l, mcp);
@@ -521,17 +531,18 @@ cpu_setmcontext32(struct lwp *l, const m
struct pcb * const pcb = lwp_getpcb(l);
fpu_discard(l, true);
- CTASSERT(__arraycount(mcp->__vfpregs.__vfp_fstmx) ==
- __arraycount(pcb->pcb_fpregs.fp_reg));
- for (i = 0; i < __arraycount(pcb->pcb_fpregs.fp_reg); i++) {
+ for (i = j = 0; i < 16; i++) {
#ifdef __AARCH64EB__
- pcb->pcb_fpregs.fp_reg[i].u64[0] = 0;
pcb->pcb_fpregs.fp_reg[i].u64[1] =
+ mcp->__vfpregs.__vfp_fstmx[j++];
+ pcb->pcb_fpregs.fp_reg[i].u64[0]
CVS commit: src/sys/arch/aarch64
Module Name:src
Committed By: skrll
Date: Sat May 29 06:54:20 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
src/sys/arch/aarch64/include: cpu.h
Log Message:
Deal with the pmap limitation of maxproc in a more complete way and
recognise CPUs with only 8bit ASIDs.
To generate a diff of this commit:
cvs rdiff -u -r1.107 -r1.108 src/sys/arch/aarch64/aarch64/pmap.c
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/aarch64/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.107 src/sys/arch/aarch64/aarch64/pmap.c:1.108
--- src/sys/arch/aarch64/aarch64/pmap.c:1.107 Fri Apr 30 20:07:22 2021
+++ src/sys/arch/aarch64/aarch64/pmap.c Sat May 29 06:54:20 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.107 2021/04/30 20:07:22 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.108 2021/05/29 06:54:20 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.107 2021/04/30 20:07:22 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.108 2021/05/29 06:54:20 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -554,6 +554,10 @@ pmap_init(void)
pool_cache_bootstrap(&_pmap_pv_pool, sizeof(struct pv_entry),
32, 0, PR_LARGECACHE, "pvpl", NULL, IPL_NONE, _pmap_pv_ctor,
NULL, NULL);
+
+ int nmaxproc = cpu_maxproc();
+ if (maxproc > nmaxproc)
+ maxproc = nmaxproc;
}
void
@@ -1420,12 +1424,6 @@ pmap_protect(struct pmap *pm, vaddr_t sv
pm_unlock(pm);
}
-/* XXX: due to the current implementation of pmap depends on 16bit ASID */
-int
-cpu_maxproc(void)
-{
- return 65535;
-}
void
pmap_activate(struct lwp *l)
Index: src/sys/arch/aarch64/include/cpu.h
diff -u src/sys/arch/aarch64/include/cpu.h:1.35 src/sys/arch/aarch64/include/cpu.h:1.36
--- src/sys/arch/aarch64/include/cpu.h:1.35 Sat May 29 06:37:21 2021
+++ src/sys/arch/aarch64/include/cpu.h Sat May 29 06:54:20 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.35 2021/05/29 06:37:21 skrll Exp $ */
+/* $NetBSD: cpu.h,v 1.36 2021/05/29 06:54:20 skrll Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -149,7 +149,22 @@ static __inline struct cpu_info *lwp_get
#undef curlwp
#define curlwp (aarch64_curlwp())
-int cpu_maxproc(void);
+static inline int
+cpu_maxproc(void)
+{
+ /*
+ * the pmap uses PID for ASID.
+ */
+ switch (__SHIFTOUT(reg_id_aa64mmfr0_el1_read(), ID_AA64MMFR0_EL1_ASIDBITS)) {
+ case ID_AA64MMFR0_EL1_ASIDBITS_8BIT:
+ return (1U << 8) - 1;
+ case ID_AA64MMFR0_EL1_ASIDBITS_16BIT:
+ return (1U << 16) - 1;
+ default:
+ return 0;
+ }
+}
+
void cpu_signotify(struct lwp *l);
void cpu_need_proftick(struct lwp *l);
CVS commit: src/sys/arch/aarch64/include
Module Name:src
Committed By: skrll
Date: Sat May 29 06:37:22 UTC 2021
Modified Files:
src/sys/arch/aarch64/include: cpu.h
Log Message:
Sort includes. NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/aarch64/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/cpu.h
diff -u src/sys/arch/aarch64/include/cpu.h:1.34 src/sys/arch/aarch64/include/cpu.h:1.35
--- src/sys/arch/aarch64/include/cpu.h:1.34 Sat Mar 27 12:15:09 2021
+++ src/sys/arch/aarch64/include/cpu.h Sat May 29 06:37:21 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.34 2021/03/27 12:15:09 jmcneill Exp $ */
+/* $NetBSD: cpu.h,v 1.35 2021/05/29 06:37:21 skrll Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -45,8 +45,8 @@
#if defined(_KERNEL) || defined(_KMEMUSER)
#include
-#include
#include
+#include
struct clockframe {
struct trapframe cf_tf;
CVS commit: src/sys/arch/aarch64/conf
Module Name:src
Committed By: ryo
Date: Thu May 27 06:19:38 UTC 2021
Modified Files:
src/sys/arch/aarch64/conf: Makefile.aarch64
Log Message:
In gcc10, -msign-return-address is no longer supported.
Instead, (LLVM-compatible) -mbranch-protection option is supported.
To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/aarch64/conf/Makefile.aarch64
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/conf/Makefile.aarch64
diff -u src/sys/arch/aarch64/conf/Makefile.aarch64:1.22 src/sys/arch/aarch64/conf/Makefile.aarch64:1.23
--- src/sys/arch/aarch64/conf/Makefile.aarch64:1.22 Wed Feb 10 08:25:01 2021
+++ src/sys/arch/aarch64/conf/Makefile.aarch64 Thu May 27 06:19:38 2021
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.aarch64,v 1.22 2021/02/10 08:25:01 ryo Exp $
+# $NetBSD: Makefile.aarch64,v 1.23 2021/05/27 06:19:38 ryo Exp $
# Makefile for NetBSD
#
@@ -44,7 +44,6 @@ CFLAGS+= -mno-omit-leaf-frame-pointer
CFLAGS+= -fno-optimize-sibling-calls
.endif
-.if ${HAVE_LLVM:Uno} == "yes"
.if ${ARMV83_PAC:U0} > 0 && ${ARMV85_BTI:U0} > 0
CFLAGS+= -mbranch-protection=pac-ret+bti
.else
@@ -55,16 +54,6 @@ CFLAGS+= -mbranch-protection=pac-ret
CFLAGS+= -mbranch-protection=bti
.endif
.endif
-.endif
-
-.if ${HAVE_GCC:U0} > 0
-.if ${ARMV83_PAC:U0} > 0
-CFLAGS+= -msign-return-address=all
-.endif
-.if ${ARMV85_BTI:U0} > 0
-# XXX: notyet for gcc
-.endif
-.endif
.if ${KASAN:U0} > 0 && ${HAVE_GCC:U0} > 0
KASANFLAGS= -fsanitize=kernel-address \
CVS commit: src/sys/arch/aarch64
Module Name:src Committed By: ryo Date: Thu May 27 06:11:20 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: procfs_machdep.c src/sys/arch/aarch64/include: cpufunc.h Log Message: fix build error with options ARMV85_BTI To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/aarch64/aarch64/procfs_machdep.c cvs rdiff -u -r1.19 -r1.20 src/sys/arch/aarch64/include/cpufunc.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/procfs_machdep.c diff -u src/sys/arch/aarch64/aarch64/procfs_machdep.c:1.4 src/sys/arch/aarch64/aarch64/procfs_machdep.c:1.5 --- src/sys/arch/aarch64/aarch64/procfs_machdep.c:1.4 Thu Oct 1 07:31:27 2020 +++ src/sys/arch/aarch64/aarch64/procfs_machdep.c Thu May 27 06:11:20 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: procfs_machdep.c,v 1.4 2020/10/01 07:31:27 skrll Exp $ */ +/* $NetBSD: procfs_machdep.c,v 1.5 2021/05/27 06:11:20 ryo Exp $ */ /*- * Copyright (c) 2020 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.4 2020/10/01 07:31:27 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.5 2021/05/27 06:11:20 ryo Exp $"); #include #include @@ -36,7 +36,7 @@ __KERNEL_RCSID(0, "$NetBSD: procfs_machd #include #include - +#include /* use variables named 'buf', 'left', 'total' */ #define FORWARD_BUF(_len) \ Index: src/sys/arch/aarch64/include/cpufunc.h diff -u src/sys/arch/aarch64/include/cpufunc.h:1.19 src/sys/arch/aarch64/include/cpufunc.h:1.20 --- src/sys/arch/aarch64/include/cpufunc.h:1.19 Fri Dec 4 08:29:11 2020 +++ src/sys/arch/aarch64/include/cpufunc.h Thu May 27 06:11:20 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc.h,v 1.19 2020/12/04 08:29:11 skrll Exp $ */ +/* $NetBSD: cpufunc.h,v 1.20 2021/05/27 06:11:20 ryo Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -63,6 +63,7 @@ extern u_int aarch64_cache_vindexsize; / extern u_int aarch64_cache_prefer_mask; extern u_int cputype; /* compat arm */ +extern int aarch64_bti_enabled; extern int aarch64_pan_enabled; extern int aarch64_pac_enabled;
CVS commit: src/sys/arch/aarch64
Module Name:src
Committed By: skrll
Date: Wed May 19 12:16:01 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: db_interface.c
src/sys/arch/aarch64/include: pmap.h
Log Message:
Make even more pmap agnostic
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/aarch64/aarch64/db_interface.c
cvs rdiff -u -r1.47 -r1.48 src/sys/arch/aarch64/include/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_interface.c
diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.15 src/sys/arch/aarch64/aarch64/db_interface.c:1.16
--- src/sys/arch/aarch64/aarch64/db_interface.c:1.15 Wed May 19 11:54:17 2021
+++ src/sys/arch/aarch64/aarch64/db_interface.c Wed May 19 12:16:01 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.15 2021/05/19 11:54:17 skrll Exp $ */
+/* $NetBSD: db_interface.c,v 1.16 2021/05/19 12:16:01 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.15 2021/05/19 11:54:17 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.16 2021/05/19 12:16:01 skrll Exp $");
#include
#include
@@ -411,14 +411,14 @@ db_pte_print(pt_entry_t pte, int level,
break;
}
- if (pte & LX_BLKPAG_OS_BOOT)
- pr(", boot");
- if (pte & LX_BLKPAG_OS_READ)
- pr(", pmap_read");
- if (pte & LX_BLKPAG_OS_WRITE)
- pr(", pmap_write");
- if (pte & LX_BLKPAG_OS_WIRED)
- pr(", wired");
+ if (pte & LX_BLKPAG_OS_0)
+ pr(", " PMAP_PTE_OS0);
+ if (pte & LX_BLKPAG_OS_1)
+ pr(", " PMAP_PTE_OS1);
+ if (pte & LX_BLKPAG_OS_2)
+ pr(", " PMAP_PTE_OS2);
+ if (pte & LX_BLKPAG_OS_3)
+ pr(", " PMAP_PTE_OS3);
} else {
pr(" **ILLEGAL TYPE**");
}
@@ -526,7 +526,6 @@ dump_ln_table(bool countmode, pd_entry_t
vaddr_t va, void (*pr)(const char *, ...) __printflike(1, 2))
{
struct vm_page *pg;
- struct vm_page_md *md;
pd_entry_t pde;
paddr_t pa;
int i, n;
@@ -535,13 +534,11 @@ dump_ln_table(bool countmode, pd_entry_t
pa = AARCH64_KVA_TO_PA((vaddr_t)pdp);
pg = PHYS_TO_VM_PAGE(pa);
- md = VM_PAGE_TO_MD(pg);
if (pg == NULL) {
pr("%sL%d: pa=%lx pg=NULL\n", spc, level, pa);
} else {
- pr("%sL%d: pa=%lx pg=%p, wire_count=%d, mdpg_ptep_parent=%p\n",
- spc, level, pa, pg, pg->wire_count, md->mdpg_ptep_parent);
+ pr("%sL%d: pa=%lx pg=%p", spc, level, pa, pg);
}
for (i = n = 0; i < Ln_ENTRIES; i++) {
Index: src/sys/arch/aarch64/include/pmap.h
diff -u src/sys/arch/aarch64/include/pmap.h:1.47 src/sys/arch/aarch64/include/pmap.h:1.48
--- src/sys/arch/aarch64/include/pmap.h:1.47 Fri Apr 30 20:07:23 2021
+++ src/sys/arch/aarch64/include/pmap.h Wed May 19 12:16:01 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.47 2021/04/30 20:07:23 skrll Exp $ */
+/* $NetBSD: pmap.h,v 1.48 2021/05/19 12:16:01 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -130,6 +130,11 @@ struct vm_page_md {
#define LX_BLKPAG_OS_BOOT LX_BLKPAG_OS_3
#define LX_BLKPAG_OS_RWMASK (LX_BLKPAG_OS_WRITE|LX_BLKPAG_OS_READ)
+#define PMAP_PTE_OS0 "read"
+#define PMAP_PTE_OS1 "write"
+#define PMAP_PTE_OS2 "wired"
+#define PMAP_PTE_OS3 "boot"
+
/* memory attributes are configured MAIR_EL1 in locore */
#define LX_BLKPAG_ATTR_NORMAL_WB __SHIFTIN(0, LX_BLKPAG_ATTR_INDX)
#define LX_BLKPAG_ATTR_NORMAL_NC __SHIFTIN(1, LX_BLKPAG_ATTR_INDX)
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Wed May 19 11:54:18 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: db_interface.c
Log Message:
Reduce characters to print in db_pte_print and unwrap some short lines.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/aarch64/db_interface.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_interface.c
diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.14 src/sys/arch/aarch64/aarch64/db_interface.c:1.15
--- src/sys/arch/aarch64/aarch64/db_interface.c:1.14 Mon May 3 19:33:09 2021
+++ src/sys/arch/aarch64/aarch64/db_interface.c Wed May 19 11:54:17 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.14 2021/05/03 19:33:09 skrll Exp $ */
+/* $NetBSD: db_interface.c,v 1.15 2021/05/19 11:54:17 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.14 2021/05/03 19:33:09 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.15 2021/05/19 11:54:17 skrll Exp $");
#include
#include
@@ -360,15 +360,13 @@ db_pte_print(pt_entry_t pte, int level,
pr(", PA=%lx", l3pte_pa(pte));
- pr(", %s", (pte & LX_BLKPAG_UXN) ?
- "UXN" : "UX ");
- pr(", %s", (pte & LX_BLKPAG_PXN) ?
- "PXN" : "PX ");
+ pr(", %s", (pte & LX_BLKPAG_UXN) ? "UXN" : "UX");
+ pr(", %s", (pte & LX_BLKPAG_PXN) ? "PXN" : "PX");
if (pte & LX_BLKPAG_CONTIG)
pr(", CONTIG");
- pr(", %s", (pte & LX_BLKPAG_NG) ? "NG" : "global");
+ pr(", %s", (pte & LX_BLKPAG_NG) ? "nG" : "G");
pr(", %s", (pte & LX_BLKPAG_AF) ?
"accessible" :
"**fault** ");
@@ -403,10 +401,10 @@ db_pte_print(pt_entry_t pte, int level,
pr(", WT");
break;
case LX_BLKPAG_ATTR_DEVICE_MEM:
- pr(", DEVICE");
+ pr(", DEV");
break;
case LX_BLKPAG_ATTR_DEVICE_MEM_SO:
- pr(", DEVICE(SO)");
+ pr(", DEV(SO)");
break;
default:
pr(", ATTR(%lu)", __SHIFTOUT(pte, LX_BLKPAG_ATTR_INDX));
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: rin
Date: Sat May 15 11:39:20 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: aarch32_syscall.c
Log Message:
Wrap long line. No binary changes.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/aarch64/aarch64/aarch32_syscall.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/aarch32_syscall.c
diff -u src/sys/arch/aarch64/aarch64/aarch32_syscall.c:1.4 src/sys/arch/aarch64/aarch64/aarch32_syscall.c:1.5
--- src/sys/arch/aarch64/aarch64/aarch32_syscall.c:1.4 Sat May 15 11:38:26 2021
+++ src/sys/arch/aarch64/aarch64/aarch32_syscall.c Sat May 15 11:39:20 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch32_syscall.c,v 1.4 2021/05/15 11:38:26 rin Exp $ */
+/* $NetBSD: aarch32_syscall.c,v 1.5 2021/05/15 11:39:20 rin Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: aarch32_syscall.c,v 1.4 2021/05/15 11:38:26 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: aarch32_syscall.c,v 1.5 2021/05/15 11:39:20 rin Exp $");
#include
#include
@@ -151,7 +151,8 @@ EMULNAME(syscall)(struct trapframe *tf)
do_trace = p->p_trace_enabled &&
((callp->sy_flags & SYCALL_INDIRECT) == 0);
if (__predict_false(do_trace ||
- KDTRACE_ENTRY(callp->sy_entry) || KDTRACE_ENTRY(callp->sy_return))) {
+ KDTRACE_ENTRY(callp->sy_entry) ||
+ KDTRACE_ENTRY(callp->sy_return))) {
/* build 64bit args for trace_enter()/trace_exit() */
int nargs = callp->sy_narg;
for (i = 0; i < nargs; i++)
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: rin
Date: Sat May 15 11:38:26 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: aarch32_syscall.c
Log Message:
Fix __syscall(2) for COMPAT_NETBSD32 on aarch64{,eb}.
The 1st argument for __syscall(2) is quad_t, which is stored in r0 and r1.
Now, tests/lib/libc/t_syscall:mmap___syscall passes for COMPAT_NETBSD32.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/aarch64/aarch64/aarch32_syscall.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/aarch32_syscall.c
diff -u src/sys/arch/aarch64/aarch64/aarch32_syscall.c:1.3 src/sys/arch/aarch64/aarch64/aarch32_syscall.c:1.4
--- src/sys/arch/aarch64/aarch64/aarch32_syscall.c:1.3 Fri Apr 12 09:29:26 2019
+++ src/sys/arch/aarch64/aarch64/aarch32_syscall.c Sat May 15 11:38:26 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch32_syscall.c,v 1.3 2019/04/12 09:29:26 ryo Exp $ */
+/* $NetBSD: aarch32_syscall.c,v 1.4 2021/05/15 11:38:26 rin Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: aarch32_syscall.c,v 1.3 2019/04/12 09:29:26 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: aarch32_syscall.c,v 1.4 2021/05/15 11:38:26 rin Exp $");
#include
#include
@@ -91,9 +91,24 @@ EMULNAME(syscall)(struct trapframe *tf)
code %= EMULNAMEU(SYS_NSYSENT);
callp = p->p_emul->e_sysent + code;
if (__predict_false(callp->sy_flags & SYCALL_INDIRECT)) {
- nargs_reg -= 1;
- regstart = 1; /* args start from r1 */
- code = tf->tf_reg[0] % EMULNAMEU(SYS_NSYSENT);
+ int off = 1;
+#ifdef NETBSD32_SYS_netbsd32syscall /* XXX ugly: apply only for NETBSD32 */
+ /*
+ * For __syscall(2), 1st argument is quad_t, which is
+ * stored in r0 and r1.
+ */
+ if (code == NETBSD32_SYS_netbsd32syscall)
+ off = 2;
+#endif
+ nargs_reg -= off;
+ regstart = off; /* args start from r1 or r2 */
+#ifdef __AARCH64EB__
+ if (off == 2)
+ code = tf->tf_reg[1];
+ else
+#endif
+ code = tf->tf_reg[0];
+ code %= EMULNAMEU(SYS_NSYSENT);
callp = p->p_emul->e_sysent + code;
/* don't allow nested syscall */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Mon May 3 19:33:09 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: db_interface.c
Log Message:
Remove unnecssary brackets. Same binary before and after.
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/aarch64/aarch64/db_interface.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_interface.c
diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.13 src/sys/arch/aarch64/aarch64/db_interface.c:1.14
--- src/sys/arch/aarch64/aarch64/db_interface.c:1.13 Fri Apr 30 20:07:22 2021
+++ src/sys/arch/aarch64/aarch64/db_interface.c Mon May 3 19:33:09 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.13 2021/04/30 20:07:22 skrll Exp $ */
+/* $NetBSD: db_interface.c,v 1.14 2021/05/03 19:33:09 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.13 2021/04/30 20:07:22 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.14 2021/05/03 19:33:09 skrll Exp $");
#include
#include
@@ -93,17 +93,17 @@ db_read_bytes(vaddr_t addr, size_t size,
reg_pan_write(0); /* disable PAN */
tmp = (uintptr_t)src | (uintptr_t)data;
- if ((size >= 8) && ((tmp & 7) == 0)) {
+ if (size >= 8 && (tmp & 7) == 0) {
*(uint64_t *)data = *(const uint64_t *)src;
src += 8;
data += 8;
size -= 8;
- } else if ((size >= 4) && ((tmp & 3) == 0)) {
+ } else if (size >= 4 && (tmp & 3) == 0) {
*(uint32_t *)data = *(const uint32_t *)src;
src += 4;
data += 4;
size -= 4;
- } else if ((size >= 2) && ((tmp & 1) == 0)) {
+ } else if (size >= 2 && (tmp & 1) == 0) {
*(uint16_t *)data = *(const uint16_t *)src;
src += 2;
data += 2;
@@ -202,17 +202,17 @@ db_write_bytes(vaddr_t addr, size_t size
lastpage = atop(va);
tmp = (uintptr_t)dst | (uintptr_t)data;
- if ((size >= 8) && ((tmp & 7) == 0)) {
+ if (size >= 8 && (tmp & 7) == 0) {
*(uint64_t *)dst = *(const uint64_t *)data;
dst += 8;
data += 8;
size -= 8;
- } else if ((size >= 4) && ((tmp & 3) == 0)) {
+ } else if (size >= 4 && (tmp & 3) == 0) {
*(uint32_t *)dst = *(const uint32_t *)data;
dst += 4;
data += 4;
size -= 4;
- } else if ((size >= 2) && ((tmp & 1) == 0)) {
+ } else if (size >= 2 && (tmp & 1) == 0) {
*(uint16_t *)dst = *(const uint16_t *)data;
dst += 2;
data += 2;
@@ -261,25 +261,25 @@ db_branch_taken(db_expr_t inst, db_addr_
#define INSN_FMT_IMM19(insn) (((insn) >> 5) & 0x7)
#define INSN_FMT_IMM14(insn) (((insn) >> 5) & 0x3fff)
- if (((inst & 0xfc1f) == 0xd65f) || /* ret xN */
- ((inst & 0xfc1f) == 0xd63f) || /* blr xN */
- ((inst & 0xfc1f) == 0xd61f)) { /* br xN */
+ if ((inst & 0xfc1f) == 0xd65f || /* ret xN */
+ (inst & 0xfc1f) == 0xd63f || /* blr xN */
+ (inst & 0xfc1f) == 0xd61f) { /* br xN */
return db_fetch_reg(INSN_FMT_RN(inst), regs, false);
}
- if (((inst & 0xfc00) == 0x9400) || /* bl imm */
- ((inst & 0xfc00) == 0x1400)) { /* b imm */
+ if ((inst & 0xfc00) == 0x9400 || /* bl imm */
+ (inst & 0xfc00) == 0x1400) { /* b imm */
return SignExtend(26, INSN_FMT_IMM26(inst), 4) + pc;
}
- if (((inst & 0xff10) == 0x5400) || /* b.cond */
- ((inst & 0x7f00) == 0x3500) || /* cbnz */
- ((inst & 0x7f00) == 0x3400)) { /* cbz */
+ if ((inst & 0xff10) == 0x5400 || /* b.cond */
+ (inst & 0x7f00) == 0x3500 || /* cbnz */
+ (inst & 0x7f00) == 0x3400) { /* cbz */
return SignExtend(19, INSN_FMT_IMM19(inst), 4) + pc;
}
- if (((inst & 0x7f00) == 0x3700) || /* tbnz */
- ((inst & 0x7f00) == 0x3600)) { /* tbz */
+ if ((inst & 0x7f00) == 0x3700 || /* tbnz */
+ (inst & 0x7f00) == 0x3600) { /* tbz */
return SignExtend(14, INSN_FMT_IMM14(inst), 4) + pc;
}
@@ -291,18 +291,18 @@ db_inst_unconditional_flow_transfer(db_e
{
LE32TOH(inst);
- if (((inst & 0xfc1f) == 0xd65f) || /* ret xN */
- ((inst & 0xfc00) == 0x9400) || /* bl */
- ((inst & 0xfc1f) == 0xd63f) || /* blr */
- ((inst & 0xfc00) == 0x1400) || /* b imm */
- ((inst & 0xfc1f) == 0xd61f)) /* br */
+ if ((inst & 0xfc1f) == 0xd65f || /* ret xN */
+ (inst & 0xfc00) == 0x9400 || /* bl */
+ (inst & 0xfc1f) == 0xd63f || /* blr */
+ (inst & 0xfc00) == 0x1400 || /* b imm */
+ (inst & 0xfc1f) == 0xd61f) /* br */
return true;
#define INSN_FMT_COND(insn) ((insn) & 0xf)
#define CONDITION_AL 14
- if (((inst & 0xff10) == 0x5400) && /* b.cond */
- (INSN_FMT_COND(inst) == CONDITION_AL)) /* always? */
+ if ((inst & 0xff10) == 0x5400 && /* b.cond */
+ INSN_FMT_COND(inst) =
CVS commit: src/sys/arch/aarch64
Module Name:src
Committed By: skrll
Date: Fri Apr 30 20:07:23 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: db_interface.c db_machdep.c pmap.c
pmapboot.c
src/sys/arch/aarch64/include: db_machdep.h pmap.h
Log Message:
Make the ddb for pmap / pte information pmap agnostic
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/db_interface.c
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/aarch64/aarch64/db_machdep.c
cvs rdiff -u -r1.106 -r1.107 src/sys/arch/aarch64/aarch64/pmap.c
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/aarch64/aarch64/pmapboot.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/aarch64/include/db_machdep.h
cvs rdiff -u -r1.46 -r1.47 src/sys/arch/aarch64/include/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_interface.c
diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.12 src/sys/arch/aarch64/aarch64/db_interface.c:1.13
--- src/sys/arch/aarch64/aarch64/db_interface.c:1.12 Fri Feb 5 21:44:34 2021
+++ src/sys/arch/aarch64/aarch64/db_interface.c Fri Apr 30 20:07:22 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.12 2021/02/05 21:44:34 joerg Exp $ */
+/* $NetBSD: db_interface.c,v 1.13 2021/04/30 20:07:22 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,13 +27,17 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.12 2021/02/05 21:44:34 joerg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.13 2021/04/30 20:07:22 skrll Exp $");
#include
#include
#include
+#include
#include
+#ifdef __HAVE_PMAP_PV_TRACK
+#include
+#endif
#include
#include
@@ -53,6 +57,21 @@ __KERNEL_RCSID(0, "$NetBSD: db_interface
db_regs_t ddb_regs;
+static int
+db_validate_address(vaddr_t addr)
+{
+ struct proc *p = curproc;
+ struct pmap *pmap;
+
+ if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap ||
+ addr >= VM_MAXUSER_ADDRESS)
+ pmap = pmap_kernel();
+ else
+ pmap = p->p_vmspace->vm_map.pmap;
+
+ return (pmap_extract(pmap, addr, NULL) == false);
+}
+
void
db_read_bytes(vaddr_t addr, size_t size, char *data)
{
@@ -60,15 +79,15 @@ db_read_bytes(vaddr_t addr, size_t size,
const char *src;
for (src = (const char *)addr; size > 0;) {
+ const vaddr_t va = (vaddr_t)src;
uintptr_t tmp;
- if ((lastpage != atop((vaddr_t)src)) &&
- vtophys((vaddr_t)src) == VTOPHYS_FAILED) {
+ if (lastpage != atop(va) && db_validate_address(va)) {
db_printf("address %p is invalid\n", src);
memset(data, 0, size); /* stubs are filled by zero */
return;
}
- lastpage = atop((vaddr_t)src);
+ lastpage = atop(va);
if (aarch64_pan_enabled)
reg_pan_write(0); /* disable PAN */
@@ -120,9 +139,6 @@ db_write_text(vaddr_t addr, size_t size,
ptep = kvtopte(addr);
KASSERT(ptep != NULL);
- /* save pte */
- pte = *ptep;
-
/*
* change to writable. it is required to keep execute permission.
* because if the block/page to which the target address belongs is
@@ -130,7 +146,8 @@ db_write_text(vaddr_t addr, size_t size,
* if PROT_EXECUTE is dropped and TLB is invalidated, the program
* will stop...
*/
- pmap_kvattr(addr, VM_PROT_EXECUTE|VM_PROT_READ|VM_PROT_WRITE);
+ /* old pte is returned by pmap_kvattr */
+ pte = pmap_kvattr(ptep, VM_PROT_EXECUTE|VM_PROT_READ|VM_PROT_WRITE);
aarch64_tlbi_all();
s = size;
@@ -175,14 +192,14 @@ db_write_bytes(vaddr_t addr, size_t size
/* XXX: need to check read only block/page */
for (dst = (char *)addr; size > 0;) {
+ const vaddr_t va = (vaddr_t)dst;
uintptr_t tmp;
- if ((lastpage != atop((vaddr_t)dst)) &&
- (vtophys((vaddr_t)dst) == VTOPHYS_FAILED)) {
+ if (lastpage != atop(va) && db_validate_address(va)) {
db_printf("address %p is invalid\n", dst);
return;
}
- lastpage = atop((vaddr_t)dst);
+ lastpage = atop(va);
tmp = (uintptr_t)dst | (uintptr_t)data;
if ((size >= 8) && ((tmp & 7) == 0)) {
@@ -290,3 +307,313 @@ db_inst_unconditional_flow_transfer(db_e
return false;
}
+
+void
+db_pte_print(pt_entry_t pte, int level,
+void (*pr)(const char *, ...) __printflike(1, 2))
+{
+ if (pte == 0) {
+ pr(" UNUSED\n");
+ return;
+ }
+
+ pr(" %s", (pte & LX_VALID) ? "VALID" : "**INVALID**");
+
+ if ((level == 0) ||
+ ((level == 1) && l1pde_is_table(pte)) ||
+ ((level == 2) && l2pde_is_table(pte))) {
+
+ /* L0/L1/L2 TABLE */
+ if ((level == 0) && ((pte & LX_TYPE) != LX_TYPE_TBL))
+ pr(" **ILLEGAL TYPE**"); /* L0 doesn't support block */
+ else
+ pr(" L%d-TABLE", level);
+
+ pr(", PA=%lx", l0pde_pa(pte));
+
+ if (pte & LX_TBL_NSTABLE)
+ pr(", NSTABLE");
+ if (pte & LX_TBL_APTABLE)
+ pr(", APTABLE");
+ if (pte & LX_TBL_UXNTABLE)
+ pr(", UXNTABLE");
+ if (pte & LX_TBL_PXNTABLE)
+ pr(", PXNTABLE");
+
+ } else if (((level == 1) && l1pde_is_block(pte)) ||
+ ((level == 2) && l2pde_is_block(pte)) ||
+ (lev
CVS commit: src/sys/arch/aarch64
Module Name:src Committed By: skrll Date: Thu Apr 29 09:27:29 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c src/sys/arch/aarch64/include: asan.h Log Message: Remove some unnecessary tlb invalidate in pmap_growkernel and ASAN shadow map. Ensure the shadow map mappings are visible to the TLB walkers. To generate a diff of this commit: cvs rdiff -u -r1.105 -r1.106 src/sys/arch/aarch64/aarch64/pmap.c cvs rdiff -u -r1.17 -r1.18 src/sys/arch/aarch64/include/asan.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/pmap.c diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.105 src/sys/arch/aarch64/aarch64/pmap.c:1.106 --- src/sys/arch/aarch64/aarch64/pmap.c:1.105 Wed Apr 21 09:52:20 2021 +++ src/sys/arch/aarch64/aarch64/pmap.c Thu Apr 29 09:27:29 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.105 2021/04/21 09:52:20 ryo Exp $ */ +/* $NetBSD: pmap.c,v 1.106 2021/04/29 09:27:29 skrll Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.105 2021/04/21 09:52:20 ryo Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.106 2021/04/29 09:27:29 skrll Exp $"); #include "opt_arm_debug.h" #include "opt_ddb.h" @@ -756,7 +756,6 @@ pmap_growkernel(vaddr_t maxkvaddr) __func__, error); } } - aarch64_tlbi_by_asid(pm->pm_asid); kasan_shadow_map((void *)pmap_maxkvaddr, (size_t)(va - pmap_maxkvaddr)); pmap_maxkvaddr = va; Index: src/sys/arch/aarch64/include/asan.h diff -u src/sys/arch/aarch64/include/asan.h:1.17 src/sys/arch/aarch64/include/asan.h:1.18 --- src/sys/arch/aarch64/include/asan.h:1.17 Sun Mar 21 07:32:44 2021 +++ src/sys/arch/aarch64/include/asan.h Thu Apr 29 09:27:29 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: asan.h,v 1.17 2021/03/21 07:32:44 skrll Exp $ */ +/* $NetBSD: asan.h,v 1.18 2021/04/29 09:27:29 skrll Exp $ */ /* * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net @@ -189,8 +189,9 @@ kasan_md_shadow_map_page(vaddr_t va) atomic_swap_64(&l3[idx], pa | L3_PAGE | LX_BLKPAG_UXN | LX_BLKPAG_PXN | LX_BLKPAG_AF | LX_BLKPAG_SH_IS | LX_BLKPAG_AP_RW | LX_BLKPAG_ATTR_NORMAL_WB); - aarch64_tlbi_by_va(va); } + dsb(ishst); + isb(); } static void
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Wed Apr 21 09:52:21 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
added more attributes of PTE displayed by "ddb>machine pte"
To generate a diff of this commit:
cvs rdiff -u -r1.104 -r1.105 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.104 src/sys/arch/aarch64/aarch64/pmap.c:1.105
--- src/sys/arch/aarch64/aarch64/pmap.c:1.104 Sat Apr 17 01:53:58 2021
+++ src/sys/arch/aarch64/aarch64/pmap.c Wed Apr 21 09:52:20 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.104 2021/04/17 01:53:58 mrg Exp $ */
+/* $NetBSD: pmap.c,v 1.105 2021/04/21 09:52:20 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.104 2021/04/17 01:53:58 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.105 2021/04/21 09:52:20 ryo Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -2779,6 +2779,12 @@ pmap_db_pte_print(pt_entry_t pte, int le
case LX_BLKPAG_ATTR_DEVICE_MEM:
pr(", DEVICE");
break;
+ case LX_BLKPAG_ATTR_DEVICE_MEM_SO:
+ pr(", DEVICE(SO)");
+ break;
+ default:
+ pr(", ATTR(%lu)", __SHIFTOUT(pte, LX_BLKPAG_ATTR_INDX));
+ break;
}
if (pte & LX_BLKPAG_OS_BOOT)
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Wed Apr 14 05:43:09 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: bus_space.c trap.c
Log Message:
Fix the problem "pcictl pci0 list" causes "panic: trap_el1h_error" on rockpro64.
The panic occures in bus_space_barrier() in rk3399_pcie.c:rkpcie_conf_read().
We expected bus_space_peek_4() to trap and recover in the path
trap_el1h_sync() -> data_abort_handler(), but In fact, the read is delayed
until bus_space_barrier(), and we get an SError interrupt (trap_el1h_error)
instead of a Synchronous Exception (trap_el1h_sync).
To catch this correctly, An implicit barrier in bus_space_peek have been added,
and trap the SError interrupt to recover from.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/aarch64/aarch64/bus_space.c
cvs rdiff -u -r1.45 -r1.46 src/sys/arch/aarch64/aarch64/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/bus_space.c
diff -u src/sys/arch/aarch64/aarch64/bus_space.c:1.15 src/sys/arch/aarch64/aarch64/bus_space.c:1.16
--- src/sys/arch/aarch64/aarch64/bus_space.c:1.15 Mon Dec 14 19:32:29 2020
+++ src/sys/arch/aarch64/aarch64/bus_space.c Wed Apr 14 05:43:09 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.15 2020/12/14 19:32:29 skrll Exp $ */
+/* $NetBSD: bus_space.c,v 1.16 2021/04/14 05:43:09 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.15 2020/12/14 19:32:29 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.16 2021/04/14 05:43:09 ryo Exp $");
#include
#include
@@ -702,6 +702,7 @@ generic_bs_pe_1(void *t, bus_space_handl
if ((error = cpu_set_onfault(&fb)) == 0) {
*datap = generic_dsb_bs_r_1(t, bsh, offset);
+ dsb(ld);
cpu_unset_onfault();
}
return error;
@@ -716,6 +717,7 @@ generic_bs_pe_2(void *t, bus_space_handl
if ((error = cpu_set_onfault(&fb)) == 0) {
*datap = NSWAP(generic_dsb_bs_r_2)(t, bsh, offset);
+ dsb(ld);
cpu_unset_onfault();
}
return error;
@@ -730,6 +732,7 @@ generic_bs_pe_4(void *t, bus_space_handl
if ((error = cpu_set_onfault(&fb)) == 0) {
*datap = NSWAP(generic_dsb_bs_r_4)(t, bsh, offset);
+ dsb(ld);
cpu_unset_onfault();
}
return error;
@@ -744,6 +747,7 @@ generic_bs_pe_8(void *t, bus_space_handl
if ((error = cpu_set_onfault(&fb)) == 0) {
*datap = NSWAP(generic_dsb_bs_r_8)(t, bsh, offset);
+ dsb(ld);
cpu_unset_onfault();
}
return error;
Index: src/sys/arch/aarch64/aarch64/trap.c
diff -u src/sys/arch/aarch64/aarch64/trap.c:1.45 src/sys/arch/aarch64/aarch64/trap.c:1.46
--- src/sys/arch/aarch64/aarch64/trap.c:1.45 Tue Mar 9 16:44:27 2021
+++ src/sys/arch/aarch64/aarch64/trap.c Wed Apr 14 05:43:09 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.45 2021/03/09 16:44:27 ryo Exp $ */
+/* $NetBSD: trap.c,v 1.46 2021/04/14 05:43:09 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.45 2021/03/09 16:44:27 ryo Exp $");
+__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.46 2021/04/14 05:43:09 ryo Exp $");
#include "opt_arm_intr_impl.h"
#include "opt_compat_netbsd32.h"
@@ -861,6 +861,26 @@ unknown:
}
}
+void
+trap_el1h_error(struct trapframe *tf)
+{
+ /*
+ * Normally, we should panic unconditionally,
+ * but SError interrupt may occur when accessing to unmapped(?) I/O
+ * spaces. bus_space_{peek,poke}_{1,2,4,8}() should trap these case.
+ */
+ struct faultbuf *fb;
+
+ if (curcpu()->ci_intr_depth == 0) {
+ fb = cpu_disable_onfault();
+ if (fb != NULL) {
+ cpu_jump_onfault(tf, fb, EFAULT);
+ return;
+ }
+ }
+ panic("%s", __func__);
+}
+
#define bad_trap_panic(trapfunc) \
void \
trapfunc(struct trapframe *tf) \
@@ -872,7 +892,6 @@ bad_trap_panic(trap_el1t_irq)
bad_trap_panic(trap_el1t_fiq)
bad_trap_panic(trap_el1t_error)
bad_trap_panic(trap_el1h_fiq)
-bad_trap_panic(trap_el1h_error)
bad_trap_panic(trap_el0_fiq)
bad_trap_panic(trap_el0_error)
bad_trap_panic(trap_el0_32fiq)
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Thu Mar 25 07:31:57 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: aarch64_machdep.c
Log Message:
More debug
To generate a diff of this commit:
cvs rdiff -u -r1.59 -r1.60 src/sys/arch/aarch64/aarch64/aarch64_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c
diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.59 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.60
--- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.59 Thu Mar 25 07:30:16 2021
+++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Thu Mar 25 07:31:56 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64_machdep.c,v 1.59 2021/03/25 07:30:16 skrll Exp $ */
+/* $NetBSD: aarch64_machdep.c,v 1.60 2021/03/25 07:31:56 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.59 2021/03/25 07:30:16 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.60 2021/03/25 07:31:56 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -251,7 +251,7 @@ initarm_common(vaddr_t kvm_base, vsize_t
vaddr_t kernstart, kernend;
vaddr_t kernstart_l2 __unused, kernend_l2; /* L2 table 2MB aligned */
vaddr_t kernelvmstart;
- int i;
+ size_t i;
cputype = cpu_idnum(); /* for compatible arm */
@@ -382,6 +382,10 @@ initarm_common(vaddr_t kvm_base, vsize_t
end = start + bootconfig.dram[i].pages;
int vm_freelist = VM_FREELIST_DEFAULT;
+
+ VPRINTF("block %2zu start %08lx end %08lx\n", i, ptoa(start),
+ ptoa(end));
+
/*
* This assumes the bp list is sorted in ascending
* order.
@@ -404,6 +408,10 @@ initarm_common(vaddr_t kvm_base, vsize_t
}
vm_freelist = bp[j].bp_freelist;
+VPRINTF(" start %08lx end %08lx"
+"... loading in freelist %d\n", ptoa(start),
+ptoa(segend), vm_freelist);
+
uvm_page_physload(start, segend, start, segend,
vm_freelist);
memsize_total += ptoa(segend - start);
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Thu Mar 25 07:30:16 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: aarch64_machdep.c Log Message: Update a comment to reflect reality To generate a diff of this commit: cvs rdiff -u -r1.58 -r1.59 src/sys/arch/aarch64/aarch64/aarch64_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.58 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.59 --- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.58 Sun Mar 21 07:32:44 2021 +++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Thu Mar 25 07:30:16 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: aarch64_machdep.c,v 1.58 2021/03/21 07:32:44 skrll Exp $ */ +/* $NetBSD: aarch64_machdep.c,v 1.59 2021/03/25 07:30:16 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include -__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.58 2021/03/21 07:32:44 skrll Exp $"); +__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.59 2021/03/25 07:30:16 skrll Exp $"); #include "opt_arm_debug.h" #include "opt_cpuoptions.h" @@ -215,12 +215,14 @@ cpu_kernel_vm_init(uint64_t memory_start * 0x__ffe0_ End of KVA * = VM_MAX_KERNEL_ADDRESS * + * 0x_c000_4000_ Start of KVA + * * 0x_c000_0???_ End of kernel * = _end[] * 0x_c000_00??_ Start of kernel * = __kernel_text[] * - * 0x_c000__ Kernel base address & start of KVA + * 0x_c000__ Kernel base address * = VM_MIN_KERNEL_ADDRESS * * 0x_bfff__ End of direct mapped
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sun Mar 21 09:08:40 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: locore.S
Log Message:
Fix a comment
To generate a diff of this commit:
cvs rdiff -u -r1.77 -r1.78 src/sys/arch/aarch64/aarch64/locore.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.77 src/sys/arch/aarch64/aarch64/locore.S:1.78
--- src/sys/arch/aarch64/aarch64/locore.S:1.77 Sat Mar 20 14:30:50 2021
+++ src/sys/arch/aarch64/aarch64/locore.S Sun Mar 21 09:08:40 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.77 2021/03/20 14:30:50 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.78 2021/03/21 09:08:40 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -38,7 +38,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.77 2021/03/20 14:30:50 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.78 2021/03/21 09:08:40 skrll Exp $")
#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -175,7 +175,7 @@ vstart:
msr tpidr_el0, xzr
msr tpidrro_el0, xzr
- /* set curcpu() */
+ /* set curlwp() */
adrl x0, lwp0 /* curlwp is lwp0 */
msr tpidr_el1, x0
DPRINTREG("curlwp = ", x0);
CVS commit: src/sys/arch/aarch64
Module Name:src Committed By: skrll Date: Sun Mar 21 07:32:44 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: aarch64_machdep.c src/sys/arch/aarch64/include: asan.h vmparam.h Log Message: Adjust the kernel virtual address space so that KASAN will map the kernel seperately from managed kernel virtual memory and not map the unused space between the two. To generate a diff of this commit: cvs rdiff -u -r1.57 -r1.58 src/sys/arch/aarch64/aarch64/aarch64_machdep.c cvs rdiff -u -r1.16 -r1.17 src/sys/arch/aarch64/include/asan.h cvs rdiff -u -r1.17 -r1.18 src/sys/arch/aarch64/include/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.57 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.58 --- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.57 Sun Mar 21 07:17:12 2021 +++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Sun Mar 21 07:32:44 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: aarch64_machdep.c,v 1.57 2021/03/21 07:17:12 skrll Exp $ */ +/* $NetBSD: aarch64_machdep.c,v 1.58 2021/03/21 07:32:44 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include -__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.57 2021/03/21 07:17:12 skrll Exp $"); +__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.58 2021/03/21 07:32:44 skrll Exp $"); #include "opt_arm_debug.h" #include "opt_cpuoptions.h" @@ -96,6 +96,11 @@ vaddr_t module_start, module_end; static struct vm_map module_map_store; #endif +#ifdef KASAN +vaddr_t kasan_kernelstart; +vaddr_t kasan_kernelsize; +#endif + /* XXX */ vaddr_t physical_start; vaddr_t physical_end; @@ -195,6 +200,11 @@ cpu_kernel_vm_init(uint64_t memory_start kernstart_phys, kernend_phys, kernend_extra); fdt_memory_remove_range(kernstart_phys, kernend_phys - kernstart_phys + kernend_extra); + +#ifdef KASAN + kasan_kernelstart = kernstart; + kasan_kernelsize = L2_ROUND_BLOCK(kernend) - kernstart; +#endif } @@ -245,8 +255,10 @@ initarm_common(vaddr_t kvm_base, vsize_t kernstart = trunc_page((vaddr_t)__kernel_text); kernend = round_page((vaddr_t)_end); + kernstart_l2 = L2_TRUNC_BLOCK(kernstart); kernend_l2 = L2_ROUND_BLOCK(kernend); + kernelvmstart = kernend_l2; #ifdef MODULAR @@ -266,6 +278,10 @@ initarm_common(vaddr_t kvm_base, vsize_t kernelvmstart = module_end; #endif /* MODULAR */ + KASSERT(kernelvmstart < VM_KERNEL_VM_BASE); + + kernelvmstart = VM_KERNEL_VM_BASE; + paddr_t kernstart_phys __unused = KERN_VTOPHYS(kernstart); paddr_t kernend_phys __unused = KERN_VTOPHYS(kernend); @@ -307,12 +323,13 @@ initarm_common(vaddr_t kvm_base, vsize_t "kernel_start_l2 = 0x%016lx\n" "kernel_start = 0x%016lx\n" "kernel_end= 0x%016lx\n" + "(extra) = 0x%016lx\n" "kernel_end_l2 = 0x%016lx\n" #ifdef MODULAR "module_start = 0x%016lx\n" "module_end= 0x%016lx\n" #endif - "(kernel va area)\n" + "(kernel va area) = 0x%016lx\n" "(devmap va area) = 0x%016lx\n" "VM_MAX_KERNEL_ADDRESS = 0x%016lx\n" "--\n", @@ -328,11 +345,13 @@ initarm_common(vaddr_t kvm_base, vsize_t kernstart_l2, kernstart, kernend, + kernend_extra, kernend_l2, #ifdef MODULAR module_start, module_end, #endif + VM_KERNEL_VM_BASE, VM_KERNEL_IO_ADDRESS, VM_MAX_KERNEL_ADDRESS); Index: src/sys/arch/aarch64/include/asan.h diff -u src/sys/arch/aarch64/include/asan.h:1.16 src/sys/arch/aarch64/include/asan.h:1.17 --- src/sys/arch/aarch64/include/asan.h:1.16 Fri Dec 11 18:03:33 2020 +++ src/sys/arch/aarch64/include/asan.h Sun Mar 21 07:32:44 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: asan.h,v 1.16 2020/12/11 18:03:33 skrll Exp $ */ +/* $NetBSD: asan.h,v 1.17 2021/03/21 07:32:44 skrll Exp $ */ /* * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net @@ -206,10 +206,14 @@ kasan_md_init(void) CTASSERT((__MD_SHADOW_SIZE / L0_SIZE) == 64); + extern vaddr_t kasan_kernelstart; + extern vaddr_t kasan_kernelsize; + + kasan_shadow_map((void *)kasan_kernelstart, kasan_kernelsize); + /* The VAs we've created until now. */ vaddr_t eva = pmap_growkernel(VM_KERNEL_VM_BASE); - kasan_shadow_map((void *)VM_MIN_KERNEL_ADDRESS, - eva - VM_MIN_KERNEL_ADDRESS); + kasan_shadow_map((void *)VM_KERNEL_VM_BASE, eva - VM_KERNEL_VM_BASE); } static inline bool Index: src/sys/arch/aarch64/include/vmparam.h diff -u src/sys/arch/aarch64/include/vmparam.h:1.17 src/sys/arch/aarch64/include/vmparam.h:1.18 --- src/sys/arch/aarch64/include/vmparam.h:1.17 Tue Nov 10 07:51:19 2020 +++ src/sys/arch/aarch64/include/vmparam.h Sun Mar 21 07:32:44 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.17 2020/11/10 07:51:19 sk
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sun Mar 21 07:17:12 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: aarch64_machdep.c Log Message: Tweak a comment To generate a diff of this commit: cvs rdiff -u -r1.56 -r1.57 src/sys/arch/aarch64/aarch64/aarch64_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.56 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.57 --- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.56 Sat Dec 12 09:27:31 2020 +++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Sun Mar 21 07:17:12 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: aarch64_machdep.c,v 1.56 2020/12/12 09:27:31 skrll Exp $ */ +/* $NetBSD: aarch64_machdep.c,v 1.57 2021/03/21 07:17:12 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include -__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.56 2020/12/12 09:27:31 skrll Exp $"); +__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.57 2021/03/21 07:17:12 skrll Exp $"); #include "opt_arm_debug.h" #include "opt_cpuoptions.h" @@ -180,7 +180,7 @@ cpu_kernel_vm_init(uint64_t memory_start * *text rwx => r-x *rodata rwx => r-- - *data rwx => rw- + *data rwx => rw- (.bss included) * * kernel image has mapped by L2 block. (2Mbyte) */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sun Mar 21 07:09:54 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: efi_machdep.c
Log Message:
Remove the unnecessary invalidation code in arm_efirt_md_map_range.
pmapboot_enter will panic if any overlapping mappings existed before and
a full TLB invalidate was done as part of turning the MMU on in locore.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/aarch64/aarch64/efi_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/efi_machdep.c
diff -u src/sys/arch/aarch64/aarch64/efi_machdep.c:1.9 src/sys/arch/aarch64/aarch64/efi_machdep.c:1.10
--- src/sys/arch/aarch64/aarch64/efi_machdep.c:1.9 Sat Mar 20 06:48:23 2021
+++ src/sys/arch/aarch64/aarch64/efi_machdep.c Sun Mar 21 07:09:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: efi_machdep.c,v 1.9 2021/03/20 06:48:23 skrll Exp $ */
+/* $NetBSD: efi_machdep.c,v 1.10 2021/03/21 07:09:54 skrll Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: efi_machdep.c,v 1.9 2021/03/20 06:48:23 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: efi_machdep.c,v 1.10 2021/03/21 07:09:54 skrll Exp $");
#include
#include
@@ -69,11 +69,6 @@ arm_efirt_md_map_range(vaddr_t va, paddr
}
pmapboot_enter(va, pa, sz, L3_SIZE, attr, NULL);
- while (sz >= PAGE_SIZE) {
- aarch64_tlbi_by_va(va);
- va += PAGE_SIZE;
- sz -= PAGE_SIZE;
- }
}
int
CVS commit: src/sys/arch/aarch64
Module Name:src
Committed By: skrll
Date: Sat Mar 20 14:30:50 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: locore.S pmapboot.c
src/sys/arch/aarch64/include: pmap.h
Log Message:
Make pmapboot_enter panic if anything goes wrong and any mappings overlap
rather than only doing it in locore.S
To generate a diff of this commit:
cvs rdiff -u -r1.76 -r1.77 src/sys/arch/aarch64/aarch64/locore.S
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/aarch64/aarch64/pmapboot.c
cvs rdiff -u -r1.45 -r1.46 src/sys/arch/aarch64/include/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.76 src/sys/arch/aarch64/aarch64/locore.S:1.77
--- src/sys/arch/aarch64/aarch64/locore.S:1.76 Sat Jan 9 15:07:42 2021
+++ src/sys/arch/aarch64/aarch64/locore.S Sat Mar 20 14:30:50 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.76 2021/01/09 15:07:42 jmcneill Exp $ */
+/* $NetBSD: locore.S,v 1.77 2021/03/20 14:30:50 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -38,7 +38,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.76 2021/01/09 15:07:42 jmcneill Exp $")
+RCSID("$NetBSD: locore.S,v 1.77 2021/03/20 14:30:50 skrll Exp $")
#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -832,7 +832,7 @@ init_mmutable:
#endif
/*
- * int
+ * void
* pmapboot_enter(
* x0: vaddr_t va,
* x1: paddr_t pa,
@@ -853,7 +853,6 @@ init_mmutable:
orr x4, x4, #LX_BLKPAG_UXN | LX_BLKPAG_PXN /* attr */
mov x5, x26/* pr func */
bl pmapboot_enter
- cbnz x0, init_mmutable_error
#endif
/* identity mapping for kernel image */
@@ -869,7 +868,6 @@ init_mmutable:
orr x4, x4, #LX_BLKPAG_UXN
mov x5, x26/* pr func */
bl pmapboot_enter
- cbnz x0, init_mmutable_error
#ifdef FDT
VPRINT("Creating identity mapping for FDT\n")
@@ -884,7 +882,6 @@ init_mmutable:
orr x4, x4, #LX_BLKPAG_UXN | LX_BLKPAG_PXN /* attr */
mov x5, x26/* pr func */
bl pmapboot_enter
- cbnz x0, init_mmutable_error
#endif
VPRINT("Creating KVA=PA tables\n")
@@ -897,7 +894,6 @@ init_mmutable:
orr x4, x4, #LX_BLKPAG_UXN
mov x5, x26/* pr func */
bl pmapboot_enter
- cbnz x0, init_mmutable_error
VPRINT("OK\n");
mov x0, xzr
Index: src/sys/arch/aarch64/aarch64/pmapboot.c
diff -u src/sys/arch/aarch64/aarch64/pmapboot.c:1.15 src/sys/arch/aarch64/aarch64/pmapboot.c:1.16
--- src/sys/arch/aarch64/aarch64/pmapboot.c:1.15 Sat Jan 9 13:42:25 2021
+++ src/sys/arch/aarch64/aarch64/pmapboot.c Sat Mar 20 14:30:50 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pmapboot.c,v 1.15 2021/01/09 13:42:25 jmcneill Exp $ */
+/* $NetBSD: pmapboot.c,v 1.16 2021/03/20 14:30:50 skrll Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.15 2021/01/09 13:42:25 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.16 2021/03/20 14:30:50 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -207,7 +207,7 @@ tlb_contiguous_p(vaddr_t va, paddr_t pa,
* pmapboot_enter() accesses pagetables by physical address.
* this should be called while identity mapping (VA=PA) available.
*/
-int
+void
pmapboot_enter(vaddr_t va, paddr_t pa, psize_t size, psize_t blocksize,
pt_entry_t attr, void (*pr)(const char *, ...) __printflike(1, 2))
{
@@ -232,7 +232,7 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
level = 3;
break;
default:
- return -1;
+ panic("%s: bad blocksize (%" PRIxPSIZE ")", __func__, blocksize);
}
VPRINTF("pmapboot_enter: va=0x%lx, pa=0x%lx, size=0x%lx, "
@@ -260,7 +260,8 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
ttbr = 1;
break;
default:
- return -1;
+ panic("%s: unknown address space (%d/%" PRIxVADDR ")", __func__,
+ aarch64_addressspace(va), va);
}
while (va < va_end) {
@@ -275,7 +276,7 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
if (l1 == NULL) {
VPRINTF("pmapboot_enter: "
"cannot allocate L1 page\n");
-return -1;
+panic("%s: can't allocate memory", __func__);
}
pte = (uint64_t)l1 | L0_TABLE;
@@ -320,7 +321,7 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
if (l2 == NULL) {
VPRINTF("pmapboot_enter: "
"cannot allocate L2 page\n");
-return -1;
+panic("%s: can't allocate memory", __func__);
}
pte = (uint64_t)l2 | L1_TABLE;
@@ -364,7 +365,7 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
if (l3 == NULL) {
VPRINTF("pmapboot_enter: "
"cannot allocate L3 page\n");
-return -1;
+panic("%s: can't allocate memory", __func__);
}
pte = (uint64_t)l3 | L2_TABLE;
@@ -440,7 +441,8 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
dsb(ish);
- return nskip;
+ if (nskip != 0)
+ panic("%s: overlapping/incompatible mappings (%d)", __func__, nskip);
}
paddr_t pmapboot_pag
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sat Mar 20 06:48:23 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: efi_machdep.c
Log Message:
Don't mark EFI runtime pages LX_BLKPAG_OS_READ | LX_BLKPAG_OS_WRITE as
these bits are only used by the current pmap fault code and these are
wired pages which will never fault.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/efi_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/efi_machdep.c
diff -u src/sys/arch/aarch64/aarch64/efi_machdep.c:1.8 src/sys/arch/aarch64/aarch64/efi_machdep.c:1.9
--- src/sys/arch/aarch64/aarch64/efi_machdep.c:1.8 Thu Oct 22 07:31:15 2020
+++ src/sys/arch/aarch64/aarch64/efi_machdep.c Sat Mar 20 06:48:23 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: efi_machdep.c,v 1.8 2020/10/22 07:31:15 skrll Exp $ */
+/* $NetBSD: efi_machdep.c,v 1.9 2021/03/20 06:48:23 skrll Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: efi_machdep.c,v 1.8 2020/10/22 07:31:15 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: efi_machdep.c,v 1.9 2021/03/20 06:48:23 skrll Exp $");
#include
#include
@@ -53,18 +53,15 @@ arm_efirt_md_map_range(vaddr_t va, paddr
switch (type) {
case ARM_EFIRT_MEM_CODE:
- attr = LX_BLKPAG_OS_READ | LX_BLKPAG_OS_WRITE |
- LX_BLKPAG_AF | LX_BLKPAG_AP_RW | LX_BLKPAG_UXN |
+ attr = LX_BLKPAG_AF | LX_BLKPAG_AP_RW | LX_BLKPAG_UXN |
LX_BLKPAG_ATTR_NORMAL_WB;
break;
case ARM_EFIRT_MEM_DATA:
- attr = LX_BLKPAG_OS_READ | LX_BLKPAG_OS_WRITE |
- LX_BLKPAG_AF | LX_BLKPAG_AP_RW | LX_BLKPAG_UXN | LX_BLKPAG_PXN |
+ attr = LX_BLKPAG_AF | LX_BLKPAG_AP_RW | LX_BLKPAG_UXN | LX_BLKPAG_PXN |
LX_BLKPAG_ATTR_NORMAL_WB;
break;
case ARM_EFIRT_MEM_MMIO:
- attr = LX_BLKPAG_OS_READ | LX_BLKPAG_OS_WRITE |
- LX_BLKPAG_AF | LX_BLKPAG_AP_RW | LX_BLKPAG_UXN | LX_BLKPAG_PXN |
+ attr = LX_BLKPAG_AF | LX_BLKPAG_AP_RW | LX_BLKPAG_UXN | LX_BLKPAG_PXN |
LX_BLKPAG_ATTR_DEVICE_MEM;
break;
default:
CVS commit: src/sys/arch/aarch64
Module Name:src
Committed By: ryo
Date: Thu Mar 11 09:48:40 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: db_machdep.c
src/sys/arch/aarch64/include: db_machdep.h
Log Message:
- fixed a problem where hardware {break,watch}points other than #0 could not be
cleared
- hardware {break,watch}point addresses are now strictly checked
To generate a diff of this commit:
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/aarch64/aarch64/db_machdep.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/include/db_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_machdep.c
diff -u src/sys/arch/aarch64/aarch64/db_machdep.c:1.37 src/sys/arch/aarch64/aarch64/db_machdep.c:1.38
--- src/sys/arch/aarch64/aarch64/db_machdep.c:1.37 Tue Mar 9 16:44:27 2021
+++ src/sys/arch/aarch64/aarch64/db_machdep.c Thu Mar 11 09:48:40 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.37 2021/03/09 16:44:27 ryo Exp $ */
+/* $NetBSD: db_machdep.c,v 1.38 2021/03/11 09:48:40 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.37 2021/03/09 16:44:27 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.38 2021/03/11 09:48:40 ryo Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -699,7 +699,7 @@ aarch64_breakpoint_set(int n, vaddr_t ad
bvr = 0;
bcr = 0;
} else {
- bvr = addr;
+ bvr = addr & DBGBVR_MASK;
bcr =
__SHIFTIN(0, DBGBCR_BT) |
__SHIFTIN(0, DBGBCR_LBN) |
@@ -714,7 +714,7 @@ aarch64_breakpoint_set(int n, vaddr_t ad
}
void
-aarch64_watchpoint_set(int n, vaddr_t addr, int size, int accesstype)
+aarch64_watchpoint_set(int n, vaddr_t addr, u_int size, u_int accesstype)
{
uint64_t wvr, wcr;
uint32_t matchbytebit;
@@ -723,9 +723,13 @@ aarch64_watchpoint_set(int n, vaddr_t ad
if (size > 8)
size = 8;
- /* BAS must be all of whose set bits are contiguous */
+ /*
+ * It is always watched in 8byte units, and
+ * BAS is a bit field of byte offset in 8byte units.
+ */
matchbytebit = 0xff >> (8 - size);
matchbytebit <<= (addr & 7);
+ addr &= ~7UL;
/* load, store, or both */
accesstype &= WATCHPOINT_ACCESS_MASK;
@@ -752,24 +756,37 @@ aarch64_watchpoint_set(int n, vaddr_t ad
aarch64_set_wcr_wvr(n, wcr, wvr);
}
-static void
+static int
db_md_breakpoint_set(int n, vaddr_t addr)
{
if (n >= __arraycount(breakpoint_buf))
- return;
+ return -1;
+
+ if ((addr & 3) != 0) {
+ db_printf("address must be 4bytes aligned\n");
+ return -1;
+ }
breakpoint_buf[n].addr = addr;
+ return 0;
}
-static void
-db_md_watchpoint_set(int n, vaddr_t addr, int size, int accesstype)
+static int
+db_md_watchpoint_set(int n, vaddr_t addr, u_int size, u_int accesstype)
{
if (n >= __arraycount(watchpoint_buf))
- return;
+ return -1;
+
+ if (size != 0 && ((addr) & ~7UL) != ((addr + size - 1) & ~7UL)) {
+ db_printf(
+ "address and size must fit within a block of 8bytes\n");
+ return -1;
+ }
watchpoint_buf[n].addr = addr;
watchpoint_buf[n].size = size;
watchpoint_buf[n].accesstype = accesstype;
+ return 0;
}
static void
@@ -893,7 +910,7 @@ void
db_md_break_cmd(db_expr_t addr, bool have_addr, db_expr_t count,
const char *modif)
{
- int i;
+ int i, rc;
int added, cleared;
if (!have_addr) {
@@ -901,7 +918,6 @@ db_md_break_cmd(db_expr_t addr, bool hav
return;
}
- addr &= DBGBVR_MASK;
added = -1;
cleared = -1;
if (0 <= addr && addr <= max_breakpoint) {
@@ -920,7 +936,9 @@ db_md_break_cmd(db_expr_t addr, bool hav
if (cleared == -1) {
for (i = 0; i <= max_breakpoint; i++) {
if (breakpoint_buf[i].addr == 0) {
- db_md_breakpoint_set(i, addr);
+ rc = db_md_breakpoint_set(i, addr);
+ if (rc != 0)
+ return;
added = i;
break;
}
@@ -944,16 +962,15 @@ void
db_md_watch_cmd(db_expr_t addr, bool have_addr, db_expr_t count,
const char *modif)
{
- int i;
+ int i, rc;
int added, cleared;
- int accesstype, watchsize;
+ u_int accesstype, watchsize;
if (!have_addr) {
show_watchpoints();
return;
}
- addr &= DBGWVR_MASK;
accesstype = watchsize = 0;
if ((modif != NULL) && (*modif != '\0')) {
int ch;
@@ -1003,8 +1020,10 @@ db_md_watch_cmd(db_expr_t addr, bool hav
if (cleared == -1) {
for (i = 0; i <= max_watchpoint; i++) {
if (watchpoint_buf[i].addr == 0) {
- db_md_watchpoint_set(i, addr, watchsize,
- accesstype);
+ rc = db_md_watchpoint_set(i, addr,
+ watchsize, accesstype);
+ if (rc != 0)
+ return;
added = i;
break;
}
Index: src/sys/arch/aarch64/include/db_machdep.h
diff -u src/sys/arch/aarch64/include/db_machdep.h:1.12 src/sys/arch/aarch64/include/db_machdep.h:1.13
--- src/sys/arch/aarch64/include/db_machdep.h:1.12 Tue Mar 9 16:44:27 2021
+++ src/sys/arch/aarch64/include/db_mac
CVS commit: src/sys/arch/aarch64
Module Name:src
Committed By: ryo
Date: Tue Mar 9 16:44:27 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: cpu.c cpuswitch.S db_machdep.c trap.c
vectors.S
src/sys/arch/aarch64/include: db_machdep.h
Log Message:
Add support hardware breakpoint and watchpoint again.
Limited support for hardware watchpoint has been available for some time, but it
has not been working properly. In addition, it stopped working at the time of
the PTRACE support commit on 2018-12-13. This has been fixed to work correctly,
and also fixed to be practical by sharing hardware watchpoints and breakpoints
between CPUs on MULTIPROCESSOR.
Also fixed a bug that causes a malfunction when switching CPUs with
"machine cpu N" when entering ddb mode from other than cpu_Debugger().
I have confirmed that the CPU can be switched by "machine cpu N" and return from
ddb properly in each case where ddb is called triggered by ddb break/watchpoint,
hardware break/watchpoint, and cpu_Debugger().
To generate a diff of this commit:
cvs rdiff -u -r1.58 -r1.59 src/sys/arch/aarch64/aarch64/cpu.c
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/aarch64/aarch64/cpuswitch.S
cvs rdiff -u -r1.36 -r1.37 src/sys/arch/aarch64/aarch64/db_machdep.c
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/aarch64/aarch64/trap.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/aarch64/aarch64/vectors.S
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/aarch64/include/db_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.58 src/sys/arch/aarch64/aarch64/cpu.c:1.59
--- src/sys/arch/aarch64/aarch64/cpu.c:1.58 Mon Jan 11 21:58:31 2021
+++ src/sys/arch/aarch64/aarch64/cpu.c Tue Mar 9 16:44:27 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.58 2021/01/11 21:58:31 skrll Exp $ */
+/* $NetBSD: cpu.c,v 1.59 2021/03/09 16:44:27 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,10 +27,11 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.58 2021/01/11 21:58:31 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.59 2021/03/09 16:44:27 ryo Exp $");
#include "locators.h"
#include "opt_arm_debug.h"
+#include "opt_ddb.h"
#include "opt_fdt.h"
#include "opt_multiprocessor.h"
@@ -53,6 +54,9 @@ __KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.58
#include
#include
#include
+#ifdef DDB
+#include
+#endif
#include
#include
@@ -681,7 +685,9 @@ cpu_hatch(struct cpu_info *ci)
aarch64_getcacheinfo(device_unit(ci->ci_dev));
aarch64_printcacheinfo(ci->ci_dev);
cpu_identify2(ci->ci_dev, ci);
-
+#ifdef DDB
+ db_machdep_init();
+#endif
mutex_exit(&cpu_hatch_lock);
cpu_init_counter(ci);
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.32 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.33
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.32 Sat Dec 26 00:55:26 2020
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Tue Mar 9 16:44:27 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.32 2020/12/26 00:55:26 jmcneill Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.33 2021/03/09 16:44:27 ryo Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.32 2020/12/26 00:55:26 jmcneill Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.33 2021/03/09 16:44:27 ryo Exp $")
ARMV8_DEFINE_OPTIONS
@@ -310,7 +310,7 @@ END(lwp_trampoline)
#ifdef DDB
ENTRY_NP(cpu_Debugger)
- brk #0
+ brk #0x
ret
END(cpu_Debugger)
#endif /* DDB */
Index: src/sys/arch/aarch64/aarch64/db_machdep.c
diff -u src/sys/arch/aarch64/aarch64/db_machdep.c:1.36 src/sys/arch/aarch64/aarch64/db_machdep.c:1.37
--- src/sys/arch/aarch64/aarch64/db_machdep.c:1.36 Tue Mar 9 16:43:13 2021
+++ src/sys/arch/aarch64/aarch64/db_machdep.c Tue Mar 9 16:44:27 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.36 2021/03/09 16:43:13 ryo Exp $ */
+/* $NetBSD: db_machdep.c,v 1.37 2021/03/09 16:44:27 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.36 2021/03/09 16:43:13 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.37 2021/03/09 16:44:27 ryo Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -75,6 +75,7 @@ void db_md_reset_cmd(db_expr_t, bool, db
void db_md_tlbi_cmd(db_expr_t, bool, db_expr_t, const char *);
void db_md_ttbr_cmd(db_expr_t, bool, db_expr_t, const char *);
void db_md_sysreg_cmd(db_expr_t, bool, db_expr_t, const char *);
+void db_md_break_cmd(db_expr_t, bool, db_expr_t, const char *);
void db_md_watch_cmd(db_expr_t, bool, db_expr_t, const char *);
#if defined(_KERNEL) && defined(MULTIPROCESSOR)
void db_md_switch_cpu_cmd(db_expr_t, bool, db_expr_t, const char *);
@@ -83,6 +84,26 @@ void db_md_switch_cpu_cmd(db_expr_t, boo
static void db_md_memin
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Mar 9 16:43:13 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: db_machdep.c
Log Message:
"machine cpu" command shows pc of trapframe and the symbol
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/aarch64/aarch64/db_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_machdep.c
diff -u src/sys/arch/aarch64/aarch64/db_machdep.c:1.35 src/sys/arch/aarch64/aarch64/db_machdep.c:1.36
--- src/sys/arch/aarch64/aarch64/db_machdep.c:1.35 Tue Mar 9 16:42:36 2021
+++ src/sys/arch/aarch64/aarch64/db_machdep.c Tue Mar 9 16:43:13 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.35 2021/03/09 16:42:36 ryo Exp $ */
+/* $NetBSD: db_machdep.c,v 1.36 2021/03/09 16:43:13 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.35 2021/03/09 16:42:36 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.36 2021/03/09 16:43:13 ryo Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -944,11 +944,16 @@ db_md_switch_cpu_cmd(db_expr_t addr, boo
if (!have_addr) {
for (i = 0; i < ncpu; i++) {
- if (db_readytoswitch[i] != NULL)
-db_printf("cpu%d: ready. tf=%p\n", i,
-db_readytoswitch[i]);
- else
+ if (db_readytoswitch[i] != NULL) {
+db_printf("cpu%d: ready. tf=%p, pc=%016lx ", i,
+ db_readytoswitch[i],
+ db_readytoswitch[i]->tf_pc);
+db_printsym(db_readytoswitch[i]->tf_pc,
+ DB_STGY_ANY, db_printf);
+db_printf("\n");
+ } else {
db_printf("cpu%d: not responding\n", i);
+ }
}
return;
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Mar 9 16:42:36 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: db_machdep.c
Log Message:
match the macro name to the order of the arguments. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/aarch64/aarch64/db_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_machdep.c
diff -u src/sys/arch/aarch64/aarch64/db_machdep.c:1.34 src/sys/arch/aarch64/aarch64/db_machdep.c:1.35
--- src/sys/arch/aarch64/aarch64/db_machdep.c:1.34 Tue Feb 23 07:13:51 2021
+++ src/sys/arch/aarch64/aarch64/db_machdep.c Tue Mar 9 16:42:36 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.34 2021/02/23 07:13:51 mrg Exp $ */
+/* $NetBSD: db_machdep.c,v 1.35 2021/03/09 16:42:36 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.34 2021/02/23 07:13:51 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.35 2021/03/09 16:42:36 ryo Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -606,58 +606,58 @@ db_md_sysreg_cmd(db_expr_t addr, bool ha
static void
aarch64_set_bcr_bvr(int n, uint64_t bcr, uint64_t bvr)
{
-#define DBG_BVR_BCR_SET(regno, bcr, bvr) \
+#define DBG_BCR_BVR_SET(regno, bcr, bvr) \
do { \
reg_dbgbcr ## regno ## _el1_write(bcr); \
reg_dbgbvr ## regno ## _el1_write(bvr); \
} while (0 /* CONSTCOND */)
switch (n) {
- case 0: DBG_BVR_BCR_SET(0, bcr, bvr); break;
- case 1: DBG_BVR_BCR_SET(1, bcr, bvr); break;
- case 2: DBG_BVR_BCR_SET(2, bcr, bvr); break;
- case 3: DBG_BVR_BCR_SET(3, bcr, bvr); break;
- case 4: DBG_BVR_BCR_SET(4, bcr, bvr); break;
- case 5: DBG_BVR_BCR_SET(5, bcr, bvr); break;
- case 6: DBG_BVR_BCR_SET(6, bcr, bvr); break;
- case 7: DBG_BVR_BCR_SET(7, bcr, bvr); break;
- case 8: DBG_BVR_BCR_SET(8, bcr, bvr); break;
- case 9: DBG_BVR_BCR_SET(9, bcr, bvr); break;
- case 10: DBG_BVR_BCR_SET(10, bcr, bvr); break;
- case 11: DBG_BVR_BCR_SET(11, bcr, bvr); break;
- case 12: DBG_BVR_BCR_SET(12, bcr, bvr); break;
- case 13: DBG_BVR_BCR_SET(13, bcr, bvr); break;
- case 14: DBG_BVR_BCR_SET(14, bcr, bvr); break;
- case 15: DBG_BVR_BCR_SET(15, bcr, bvr); break;
+ case 0: DBG_BCR_BVR_SET(0, bcr, bvr); break;
+ case 1: DBG_BCR_BVR_SET(1, bcr, bvr); break;
+ case 2: DBG_BCR_BVR_SET(2, bcr, bvr); break;
+ case 3: DBG_BCR_BVR_SET(3, bcr, bvr); break;
+ case 4: DBG_BCR_BVR_SET(4, bcr, bvr); break;
+ case 5: DBG_BCR_BVR_SET(5, bcr, bvr); break;
+ case 6: DBG_BCR_BVR_SET(6, bcr, bvr); break;
+ case 7: DBG_BCR_BVR_SET(7, bcr, bvr); break;
+ case 8: DBG_BCR_BVR_SET(8, bcr, bvr); break;
+ case 9: DBG_BCR_BVR_SET(9, bcr, bvr); break;
+ case 10: DBG_BCR_BVR_SET(10, bcr, bvr); break;
+ case 11: DBG_BCR_BVR_SET(11, bcr, bvr); break;
+ case 12: DBG_BCR_BVR_SET(12, bcr, bvr); break;
+ case 13: DBG_BCR_BVR_SET(13, bcr, bvr); break;
+ case 14: DBG_BCR_BVR_SET(14, bcr, bvr); break;
+ case 15: DBG_BCR_BVR_SET(15, bcr, bvr); break;
}
}
static void
aarch64_set_wcr_wvr(int n, uint64_t wcr, uint64_t wvr)
{
-#define DBG_WVR_WCR_SET(regno, wcr, wvr) \
+#define DBG_WCR_WVR_SET(regno, wcr, wvr) \
do { \
reg_dbgwcr ## regno ## _el1_write(wcr); \
reg_dbgwvr ## regno ## _el1_write(wvr); \
} while (0 /* CONSTCOND */)
switch (n) {
- case 0: DBG_WVR_WCR_SET(0, wcr, wvr); break;
- case 1: DBG_WVR_WCR_SET(1, wcr, wvr); break;
- case 2: DBG_WVR_WCR_SET(2, wcr, wvr); break;
- case 3: DBG_WVR_WCR_SET(3, wcr, wvr); break;
- case 4: DBG_WVR_WCR_SET(4, wcr, wvr); break;
- case 5: DBG_WVR_WCR_SET(5, wcr, wvr); break;
- case 6: DBG_WVR_WCR_SET(6, wcr, wvr); break;
- case 7: DBG_WVR_WCR_SET(7, wcr, wvr); break;
- case 8: DBG_WVR_WCR_SET(8, wcr, wvr); break;
- case 9: DBG_WVR_WCR_SET(9, wcr, wvr); break;
- case 10: DBG_WVR_WCR_SET(10, wcr, wvr); break;
- case 11: DBG_WVR_WCR_SET(11, wcr, wvr); break;
- case 12: DBG_WVR_WCR_SET(12, wcr, wvr); break;
- case 13: DBG_WVR_WCR_SET(13, wcr, wvr); break;
- case 14: DBG_WVR_WCR_SET(14, wcr, wvr); break;
- case 15: DBG_WVR_WCR_SET(15, wcr, wvr); break;
+ case 0: DBG_WCR_WVR_SET(0, wcr, wvr); break;
+ case 1: DBG_WCR_WVR_SET(1, wcr, wvr); break;
+ case 2: DBG_WCR_WVR_SET(2, wcr, wvr); break;
+ case 3: DBG_WCR_WVR_SET(3, wcr, wvr); break;
+ case 4: DBG_WCR_WVR_SET(4, wcr, wvr); break;
+ case 5: DBG_WCR_WVR_SET(5, wcr, wvr); break;
+ case 6: DBG_WCR_WVR_SET(6, wcr, wvr); break;
+ case 7: DBG_WCR_WVR_SET(7, wcr, wvr); break;
+ case 8: DBG_WCR_WVR_SET(8, wcr, wvr); break;
+ case 9: DBG_WCR_WVR_SET(9, wcr, wvr); break;
+ case 10: DBG_WCR_WVR_SET(10, wcr, wvr); break;
+ case 11: DBG_WCR_WVR_SET(11, wcr, wvr); break;
+ case 12: DBG_WCR_WVR_SET(12, wcr, wvr); break;
+ case 13: DBG_WCR_WVR_SET(13, wcr, wvr); break;
+ case 14: DBG_WCR_WVR_SET(14, wc
CVS commit: src/sys/arch/aarch64/include
Module Name:src Committed By: ryo Date: Tue Mar 9 16:41:43 UTC 2021 Modified Files: src/sys/arch/aarch64/include: armreg.h Log Message: fixed mask width of DBGWVR_MASK, and added definition of DBGBVR_MASK To generate a diff of this commit: cvs rdiff -u -r1.54 -r1.55 src/sys/arch/aarch64/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/include/armreg.h diff -u src/sys/arch/aarch64/include/armreg.h:1.54 src/sys/arch/aarch64/include/armreg.h:1.55 --- src/sys/arch/aarch64/include/armreg.h:1.54 Wed Sep 30 08:40:49 2020 +++ src/sys/arch/aarch64/include/armreg.h Tue Mar 9 16:41:43 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.54 2020/09/30 08:40:49 ryo Exp $ */ +/* $NetBSD: armreg.h,v 1.55 2021/03/09 16:41:43 ryo Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -1087,6 +1087,8 @@ AARCH64REG_WRITE_INLINE(dbgbvr14_el1) AARCH64REG_READ_INLINE(dbgbvr15_el1) // Debug Breakpoint Value Register 15 AARCH64REG_WRITE_INLINE(dbgbvr15_el1) +#define DBGBVR_MASK __BITS(63,2) + AARCH64REG_READ_INLINE(dbgwcr0_el1) // Debug Watchpoint Control Register 0 AARCH64REG_WRITE_INLINE(dbgwcr0_el1) AARCH64REG_READ_INLINE(dbgwcr1_el1) // Debug Watchpoint Control Register 1 @@ -1163,7 +1165,7 @@ AARCH64REG_WRITE_INLINE(dbgwvr14_el1) AARCH64REG_READ_INLINE(dbgwvr15_el1) // Debug Watchpoint Value Register 15 AARCH64REG_WRITE_INLINE(dbgwvr15_el1) -#define DBGWVR_MASK __BITS(64,3) +#define DBGWVR_MASK __BITS(63,2) AARCH64REG_READ_INLINE(mdscr_el1) // Monitor Debug System Control Register
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: ryo Date: Tue Mar 9 16:40:59 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: fix build error without options DDB. kvtopte() is referenced from arm/acpi/acpi_machdep.c To generate a diff of this commit: cvs rdiff -u -r1.102 -r1.103 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/pmap.c diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.102 src/sys/arch/aarch64/aarch64/pmap.c:1.103 --- src/sys/arch/aarch64/aarch64/pmap.c:1.102 Sat Feb 13 18:13:53 2021 +++ src/sys/arch/aarch64/aarch64/pmap.c Tue Mar 9 16:40:59 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.102 2021/02/13 18:13:53 ryo Exp $ */ +/* $NetBSD: pmap.c,v 1.103 2021/03/09 16:40:59 ryo Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.102 2021/02/13 18:13:53 ryo Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.103 2021/03/09 16:40:59 ryo Exp $"); #include "opt_arm_debug.h" #include "opt_ddb.h" @@ -2632,8 +2632,6 @@ pmap_is_referenced(struct vm_page *pg) return (pp->pp_pv.pv_va & VM_PROT_READ); } -#ifdef DDB - /* get pointer to kernel segment L2 or L3 table entry */ pt_entry_t * kvtopte(vaddr_t va) @@ -2643,6 +2641,8 @@ kvtopte(vaddr_t va) return _pmap_pte_lookup_bs(pmap_kernel(), va, NULL); } +#ifdef DDB + /* change attribute of kernel segment */ pt_entry_t pmap_kvattr(vaddr_t va, vm_prot_t prot)
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: jmcneill Date: Mon Mar 1 11:37:31 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: vm_machdep.c Log Message: cpu_lwp_fork: KASSERT -> KASSERTMSG to print the actual value of DAIF if it is not 0 in cpu_lwp_fork To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/aarch64/aarch64/vm_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/vm_machdep.c diff -u src/sys/arch/aarch64/aarch64/vm_machdep.c:1.9 src/sys/arch/aarch64/aarch64/vm_machdep.c:1.10 --- src/sys/arch/aarch64/aarch64/vm_machdep.c:1.9 Thu Oct 15 22:52:08 2020 +++ src/sys/arch/aarch64/aarch64/vm_machdep.c Mon Mar 1 11:37:31 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: vm_machdep.c,v 1.9 2020/10/15 22:52:08 rin Exp $ */ +/* $NetBSD: vm_machdep.c,v 1.10 2021/03/01 11:37:31 jmcneill Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -33,7 +33,7 @@ #include "opt_ddb.h" #include -__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.9 2020/10/15 22:52:08 rin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.10 2021/03/01 11:37:31 jmcneill Exp $"); #include #include @@ -163,7 +163,7 @@ cpu_lwp_fork(struct lwp *l1, struct lwp ktf->tf_reg[27] = (uint64_t)func; ktf->tf_reg[28] = (uint64_t)arg; ktf->tf_reg[29] = 0; - KASSERT(reg_daif_read() == 0); + KASSERTMSG(reg_daif_read() == 0, "DAIF=0x%lx", reg_daif_read()); ktf->tf_lr = (uintptr_t)lwp_trampoline; #ifdef DDB ktf->tf_pc = (uint64_t)&&backtrace_here;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Feb 23 20:34:54 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: disasm.c
Log Message:
adjust tab. NFC
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/aarch64/disasm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/disasm.c
diff -u src/sys/arch/aarch64/aarch64/disasm.c:1.14 src/sys/arch/aarch64/aarch64/disasm.c:1.15
--- src/sys/arch/aarch64/aarch64/disasm.c:1.14 Tue Feb 23 20:26:50 2021
+++ src/sys/arch/aarch64/aarch64/disasm.c Tue Feb 23 20:34:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: disasm.c,v 1.14 2021/02/23 20:26:50 ryo Exp $ */
+/* $NetBSD: disasm.c,v 1.15 2021/02/23 20:34:54 ryo Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: disasm.c,v 1.14 2021/02/23 20:26:50 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disasm.c,v 1.15 2021/02/23 20:34:54 ryo Exp $");
#include
#include
@@ -1324,8 +1324,8 @@ static struct op_sys_table op_sys_table[
{ SYSREG_ENC(1, 0, 7, 8, 1), OPE_XT, "at\ts1e1w" },
{ SYSREG_ENC(1, 0, 7, 8, 2), OPE_XT, "at\ts1e0r" },
{ SYSREG_ENC(1, 0, 7, 8, 3), OPE_XT, "at\ts1e0w" },
- { SYSREG_ENC(1, 0, 7, 9, 0), OPE_XT, "at\ts1e1rp" },
- { SYSREG_ENC(1, 0, 7, 9, 1), OPE_XT, "at\ts1e1wp" },
+ { SYSREG_ENC(1, 0, 7, 9, 0), OPE_XT, "at\ts1e1rp" },
+ { SYSREG_ENC(1, 0, 7, 9, 1), OPE_XT, "at\ts1e1wp" },
{ SYSREG_ENC(1, 4, 7, 8, 0), OPE_XT, "at\ts1e2r" },
{ SYSREG_ENC(1, 4, 7, 8, 1), OPE_XT, "at\ts1e2w" },
{ SYSREG_ENC(1, 4, 7, 8, 4), OPE_XT, "at\ts12e1r" },
@@ -1335,9 +1335,9 @@ static struct op_sys_table op_sys_table[
{ SYSREG_ENC(1, 6, 7, 8, 0), OPE_XT, "at\ts1e3r" },
{ SYSREG_ENC(1, 6, 7, 8, 1), OPE_XT, "at\ts1e3w" },
- { SYSREG_ENC(1, 3, 7, 3, 4), OPE_XT, "cfp\trctx" },
- { SYSREG_ENC(1, 3, 7, 3, 5), OPE_XT, "dvp\trctx" },
- { SYSREG_ENC(1, 3, 7, 3, 7), OPE_XT, "cpp\trctx" },
+ { SYSREG_ENC(1, 3, 7, 3, 4), OPE_XT, "cfp\trctx" },
+ { SYSREG_ENC(1, 3, 7, 3, 5), OPE_XT, "dvp\trctx" },
+ { SYSREG_ENC(1, 3, 7, 3, 7), OPE_XT, "cpp\trctx" },
{ SYSREG_ENC(1, 0, 8, 3, 0), OPE_NONE, "tlbi\tvmalle1is" },
{ SYSREG_ENC(1, 0, 8, 3, 1), OPE_XT, "tlbi\tvae1is" },
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Feb 23 20:26:50 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: disasm.c
Log Message:
fix wrong target register size of "ldrsh"
"ldrsh Xt, [Xn, Xm]" was being output as "ldrsh Wt, [Xn, Xm]"
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/aarch64/aarch64/disasm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/disasm.c
diff -u src/sys/arch/aarch64/aarch64/disasm.c:1.13 src/sys/arch/aarch64/aarch64/disasm.c:1.14
--- src/sys/arch/aarch64/aarch64/disasm.c:1.13 Tue Feb 23 20:15:04 2021
+++ src/sys/arch/aarch64/aarch64/disasm.c Tue Feb 23 20:26:50 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: disasm.c,v 1.13 2021/02/23 20:15:04 ryo Exp $ */
+/* $NetBSD: disasm.c,v 1.14 2021/02/23 20:26:50 ryo Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: disasm.c,v 1.13 2021/02/23 20:15:04 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disasm.c,v 1.14 2021/02/23 20:26:50 ryo Exp $");
#include
#include
@@ -919,7 +919,7 @@ regoffset_b_common(const disasm_interfac
static void
regoffset_h_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn,
uint64_t Rm, uint64_t option, uint64_t shift, uint64_t Rn, uint64_t Rt,
-const char *op)
+uint64_t RtSz, const char *op)
{
int r;
@@ -931,13 +931,13 @@ regoffset_h_common(const disasm_interfac
if ((shift == 0) && (option == 3)) {
PRINTF("%s\t%s, [%s,%s]\n",
op,
- ZREGNAME(0, Rt),
+ ZREGNAME(RtSz, Rt),
SREGNAME(1, Rn),
ZREGNAME(r, Rm));
} else if (shift == 0) {
PRINTF("%s\t%s, [%s,%s,%s]\n",
op,
- ZREGNAME(0, Rt),
+ ZREGNAME(RtSz, Rt),
SREGNAME(1, Rn),
ZREGNAME(r, Rm),
SHIFTOP8(option,
@@ -945,7 +945,7 @@ regoffset_h_common(const disasm_interfac
} else {
PRINTF("%s\t%s, [%s,%s,%s #%u]\n",
op,
- ZREGNAME(0, Rt),
+ ZREGNAME(RtSz, Rt),
SREGNAME(1, Rn),
ZREGNAME(r, Rm),
SHIFTOP8(option,
@@ -2030,7 +2030,7 @@ OP3FUNC(op_ldrh_immunsign, imm12, Rn, Rt
OP5FUNC(op_ldrh_reg, Rm, option, shift, Rn, Rt)
{
- regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrh");
+ regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, 0, "ldrh");
}
OP4FUNC(op_ldrsb_immpostidx, opc, imm9, Rn, Rt)
@@ -2100,7 +2100,8 @@ OP4FUNC(op_ldrsh_immunsign, opc, imm12,
OP6FUNC(op_ldrsh_reg, opc, Rm, option, shift, Rn, Rt)
{
- regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrsh");
+ regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, opc ^ 1,
+ "ldrsh");
}
OP3FUNC(op_ldrsw_immpostidx, imm9, Rn, Rt)
@@ -3016,7 +3017,7 @@ OP3FUNC(op_strh_immunsign, imm12, Rn, Rt
OP5FUNC(op_strh_reg, Rm, option, shift, Rn, Rt)
{
- regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, "strh");
+ regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, 0, "strh");
}
OP4FUNC(op_sttr, size, imm9, Rn, Rt)
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Feb 23 20:15:04 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: disasm.c
Log Message:
make more system registers are disassemblable
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/disasm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/disasm.c
diff -u src/sys/arch/aarch64/aarch64/disasm.c:1.12 src/sys/arch/aarch64/aarch64/disasm.c:1.13
--- src/sys/arch/aarch64/aarch64/disasm.c:1.12 Tue Feb 23 17:48:46 2021
+++ src/sys/arch/aarch64/aarch64/disasm.c Tue Feb 23 20:15:04 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: disasm.c,v 1.12 2021/02/23 17:48:46 ryo Exp $ */
+/* $NetBSD: disasm.c,v 1.13 2021/02/23 20:15:04 ryo Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: disasm.c,v 1.12 2021/02/23 17:48:46 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disasm.c,v 1.13 2021/02/23 20:15:04 ryo Exp $");
#include
#include
@@ -323,9 +323,14 @@ const struct sysreg_table sysreg_table[]
{ SYSREG_ENC(3, 0, 0, 2, 3), "id_isar3_el1" },
{ SYSREG_ENC(3, 0, 0, 2, 4), "id_isar4_el1" },
{ SYSREG_ENC(3, 0, 0, 2, 5), "id_isar5_el1" },
+ { SYSREG_ENC(3, 0, 0, 2, 6), "id_mmfr4_el1" },
+ { SYSREG_ENC(3, 0, 0, 2, 7), "id_isar6_el1" },
{ SYSREG_ENC(3, 0, 0, 3, 0), "mvfr0_el1" },
{ SYSREG_ENC(3, 0, 0, 3, 1), "mvfr1_el1" },
{ SYSREG_ENC(3, 0, 0, 3, 2), "mvfr2_el1" },
+ { SYSREG_ENC(3, 0, 0, 3, 4), "id_pfr2_el1" },
+ { SYSREG_ENC(3, 0, 0, 3, 5), "id_dfr1_el1" },
+ { SYSREG_ENC(3, 0, 0, 3, 6), "id_mmfr5_el1" },
{ SYSREG_ENC(3, 0, 0, 4, 0), "id_aa64pfr0_el1" },
{ SYSREG_ENC(3, 0, 0, 4, 1), "id_aa64pfr1_el1" },
{ SYSREG_ENC(3, 0, 0, 5, 0), "id_aa64dfr0_el1" },
@@ -336,9 +341,12 @@ const struct sysreg_table sysreg_table[]
{ SYSREG_ENC(3, 0, 0, 6, 1), "id_aa64isar1_el1" },
{ SYSREG_ENC(3, 0, 0, 7, 0), "id_aa64mmfr0_el1" },
{ SYSREG_ENC(3, 0, 0, 7, 1), "id_aa64mmfr1_el1" },
+ { SYSREG_ENC(3, 0, 0, 7, 2), "id_aa64mmfr2_el1" },
{ SYSREG_ENC(3, 0, 1, 0, 0), "sctlr_el1" },
{ SYSREG_ENC(3, 0, 1, 0, 1), "actlr_el1" },
{ SYSREG_ENC(3, 0, 1, 0, 2), "cpacr_el1" },
+ { SYSREG_ENC(3, 0, 1, 0, 5), "rgsr_el1" },
+ { SYSREG_ENC(3, 0, 1, 0, 6), "gcr_el1" },
{ SYSREG_ENC(3, 0, 2, 0, 0), "ttbr0_el1" },
{ SYSREG_ENC(3, 0, 2, 0, 1), "ttbr1_el1" },
{ SYSREG_ENC(3, 0, 2, 0, 2), "tcr_el1" },
@@ -362,21 +370,31 @@ const struct sysreg_table sysreg_table[]
{ SYSREG_ENC(3, 0, 5, 1, 0), "afsr0_el1" },
{ SYSREG_ENC(3, 0, 5, 1, 1), "afsr1_el1" },
{ SYSREG_ENC(3, 0, 5, 2, 0), "esr_el1" },
+ { SYSREG_ENC(3, 0, 5, 6, 0), "tfsr_el1" },
+ { SYSREG_ENC(3, 0, 5, 6, 1), "tfsre0_el1" },
{ SYSREG_ENC(3, 0, 6, 0, 0), "far_el1" },
{ SYSREG_ENC(3, 0, 7, 4, 0), "par_el1" },
{ SYSREG_ENC(3, 0, 9, 14, 1), "pmintenset_el1" },
{ SYSREG_ENC(3, 0, 9, 14, 2), "pmintenclr_el1" },
{ SYSREG_ENC(3, 0, 10, 2, 0), "mair_el1" },
{ SYSREG_ENC(3, 0, 10, 3, 0), "amair_el1" },
+ { SYSREG_ENC(3, 0, 10, 4, 0), "lorsa_el1" },
+ { SYSREG_ENC(3, 0, 10, 4, 1), "lorea_el1" },
+ { SYSREG_ENC(3, 0, 10, 4, 2), "lorn_el1" },
+ { SYSREG_ENC(3, 0, 10, 4, 3), "lorc_el1" },
+ { SYSREG_ENC(3, 0, 10, 4, 7), "lorid_el1" },
{ SYSREG_ENC(3, 0, 12, 0, 0), "vbar_el1" },
{ SYSREG_ENC(3, 0, 12, 0, 1), "rvbar_el1" },
{ SYSREG_ENC(3, 0, 12, 0, 2), "rmr_el1" },
{ SYSREG_ENC(3, 0, 12, 1, 0), "isr_el1" },
{ SYSREG_ENC(3, 0, 13, 0, 1), "contextidr_el1" },
{ SYSREG_ENC(3, 0, 13, 0, 4), "tpidr_el1" },
+ { SYSREG_ENC(3, 0, 13, 0, 7), "scxtnum_el1" },
{ SYSREG_ENC(3, 0, 14, 1, 0), "cntkctl_el1" },
{ SYSREG_ENC(3, 1, 0, 0, 0), "ccsidr_el1" },
{ SYSREG_ENC(3, 1, 0, 0, 1), "clidr_el1" },
+ { SYSREG_ENC(3, 1, 0, 0, 2), "ccsidr2_el1" },
+ { SYSREG_ENC(3, 1, 0, 0, 4), "gmid_el1" },
{ SYSREG_ENC(3, 1, 0, 0, 7), "aidr_el1" },
{ SYSREG_ENC(3, 2, 0, 0, 0), "csselr_el1" },
{ SYSREG_ENC(3, 3, 0, 0, 1), "ctr_el0" },
@@ -407,6 +425,7 @@ const struct sysreg_table sysreg_table[]
{ SYSREG_ENC(3, 3, 9, 14, 3), "pmovsset_el0" },
{ SYSREG_ENC(3, 3, 13, 0, 2), "tpidr_el0" },
{ SYSREG_ENC(3, 3, 13, 0, 3), "tpidrro_el0" },
+ { SYSREG_ENC(3, 3, 13, 0, 7), "scxtnum_el0" },
{ SYSREG_ENC(3, 3, 14, 0, 0), "cntfrq_el0" },
{ SYSREG_ENC(3, 3, 14, 0, 1), "cntpct_el0" },
{ SYSREG_ENC(3, 3, 14, 0, 2), "cntvct_el0" },
@@ -487,12 +506,22 @@ const struct sysreg_table sysreg_table[]
{ SYSREG_ENC(3, 4, 1, 1, 1), "mdcr_el2" },
{ SYSREG_ENC(3, 4, 1, 1, 2), "cptr_el2" },
{ SYSREG_ENC(3, 4, 1, 1, 3), "hstr_el2" },
+ { SYSREG_ENC(3, 4, 1, 1, 4), "hfgrtr_el2" },
+ { SYSREG_ENC(3, 4, 1, 1, 5), "hfgwtr_el2" },
+ { SYSREG_ENC(3, 4, 1, 1, 6), "hfgitr_el2" },
{ SYSREG_ENC(3, 4, 1, 1, 7), "hacr_el2"
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Feb 23 17:48:46 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: disasm.c
Log Message:
The immediate offset of "ldtrb", "ldtrh", "sttrb", and "sttrh" was always
output as unsigned.
Correctly, it is 9bit signed.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/aarch64/aarch64/disasm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/disasm.c
diff -u src/sys/arch/aarch64/aarch64/disasm.c:1.11 src/sys/arch/aarch64/aarch64/disasm.c:1.12
--- src/sys/arch/aarch64/aarch64/disasm.c:1.11 Tue Feb 23 17:30:56 2021
+++ src/sys/arch/aarch64/aarch64/disasm.c Tue Feb 23 17:48:46 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: disasm.c,v 1.11 2021/02/23 17:30:56 ryo Exp $ */
+/* $NetBSD: disasm.c,v 1.12 2021/02/23 17:48:46 ryo Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: disasm.c,v 1.11 2021/02/23 17:30:56 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disasm.c,v 1.12 2021/02/23 17:48:46 ryo Exp $");
#include
#include
@@ -2126,7 +2126,7 @@ OP3FUNC(op_ldtrb, imm9, Rn, Rt)
PRINTF("ldtrb\t%s, [%s,#%"PRId64"]\n",
ZREGNAME(0, Rt),
SREGNAME(1, Rn),
- SignExtend(12, imm9, 1));
+ SignExtend(9, imm9, 1));
}
}
@@ -2140,7 +2140,7 @@ OP3FUNC(op_ldtrh, imm9, Rn, Rt)
PRINTF("ldtrh\t%s, [%s,#%"PRId64"]\n",
ZREGNAME(0, Rt),
SREGNAME(1, Rn),
- SignExtend(12, imm9, 1));
+ SignExtend(9, imm9, 1));
}
}
@@ -3000,7 +3000,7 @@ OP3FUNC(op_sttrb, imm9, Rn, Rt)
PRINTF("sttrb\t%s, [%s,#%"PRId64"]\n",
ZREGNAME(0, Rt),
SREGNAME(1, Rn),
- SignExtend(12, imm9, 1));
+ SignExtend(9, imm9, 1));
}
}
@@ -3014,7 +3014,7 @@ OP3FUNC(op_sttrh, imm9, Rn, Rt)
PRINTF("sttrh\t%s, [%s,#%"PRId64"]\n",
ZREGNAME(0, Rt),
SREGNAME(1, Rn),
- SignExtend(12, imm9, 1));
+ SignExtend(9, imm9, 1));
}
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Feb 23 17:30:56 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: disasm.c
Log Message:
The register operand size for "smnegl" and "smsubl' was wrong.
not "smsubl Xd, Xn, Xm, Xa", but "smsubl Xd, Wn, Wm, Xa".
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/aarch64/aarch64/disasm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/disasm.c
diff -u src/sys/arch/aarch64/aarch64/disasm.c:1.10 src/sys/arch/aarch64/aarch64/disasm.c:1.11
--- src/sys/arch/aarch64/aarch64/disasm.c:1.10 Sat Sep 5 15:59:09 2020
+++ src/sys/arch/aarch64/aarch64/disasm.c Tue Feb 23 17:30:56 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: disasm.c,v 1.10 2020/09/05 15:59:09 jakllsch Exp $ */
+/* $NetBSD: disasm.c,v 1.11 2021/02/23 17:30:56 ryo Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: disasm.c,v 1.10 2020/09/05 15:59:09 jakllsch Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disasm.c,v 1.11 2021/02/23 17:30:56 ryo Exp $");
#include
#include
@@ -2751,13 +2751,13 @@ OP4FUNC(op_smsubl, Rm, Ra, Rn, Rd)
if (Ra == 31) {
PRINTF("smnegl\t%s, %s, %s\n",
ZREGNAME(1, Rd),
- ZREGNAME(1, Rn),
- ZREGNAME(1, Rm));
+ ZREGNAME(0, Rn),
+ ZREGNAME(0, Rm));
} else {
PRINTF("smsubl\t%s, %s, %s, %s\n",
ZREGNAME(1, Rd),
- ZREGNAME(1, Rn),
- ZREGNAME(1, Rm),
+ ZREGNAME(0, Rn),
+ ZREGNAME(0, Rm),
ZREGNAME(1, Ra));
}
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Tue Feb 23 14:50:33 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: idle_machdep.S
Log Message:
Just a few optimizations.
- in cpu_idle(), ci_intr_depth is always 0, so there is no need to fetch for
increment or conditional branch.
- curcpu() is immutable in idle lwp, there is no need to consider KPREEMPT.
Therefore, get curcpu() first and keep using it.
- add more comment.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/idle_machdep.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/idle_machdep.S
diff -u src/sys/arch/aarch64/aarch64/idle_machdep.S:1.8 src/sys/arch/aarch64/aarch64/idle_machdep.S:1.9
--- src/sys/arch/aarch64/aarch64/idle_machdep.S:1.8 Sun Feb 21 23:37:09 2021
+++ src/sys/arch/aarch64/aarch64/idle_machdep.S Tue Feb 23 14:50:33 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: idle_machdep.S,v 1.8 2021/02/21 23:37:09 jmcneill Exp $ */
+/* $NetBSD: idle_machdep.S,v 1.9 2021/02/23 14:50:33 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: idle_machdep.S,v 1.8 2021/02/21 23:37:09 jmcneill Exp $");
+RCSID("$NetBSD: idle_machdep.S,v 1.9 2021/02/23 14:50:33 ryo Exp $");
#ifdef ARM_INTR_IMPL
#include ARM_INTR_IMPL
@@ -75,28 +75,34 @@ ENTRY(cpu_idle)
adr x0, 1f
str x0, [sp, #TF_PC] /* CLKF_PC refer to tf_pc */
+ /*
+ * "idle/N" lwp is allocated on a per-CPU basis,
+ * curcpu() always return the same, and there is no need to
+ * consider KPREEMPT. safe even with interrupt enabled.
+ */
mrs x1, tpidr_el1 /* get curlwp */
- ldr x1, [x1, #L_CPU] /* get curcpu */
- ldr w28, [x1, #CI_INTR_DEPTH] /* w28 = ci->ci_intr_depth */
- add w2, w28, #1 /* w2 = intr_depth + 1 */
+ ldr x28, [x1, #L_CPU] /* get curcpu */
+ mov w2, #1
mov x0, sp/* get pointer to trapframe */
DISABLE_INTERRUPT
- wfi
+ /*
+ * assert(ci->ci_intr_depth == 0),
+ * therefore, ci->ci_intr_depth++ would be definitely 1.
+ */
+ str w2, [x28, #CI_INTR_DEPTH] /* ci->ci_intr_depth = 1 */
- str w2, [x1, #CI_INTR_DEPTH] /* ci->ci_intr_depth++ */
+ wfi
bl ARM_IRQ_HANDLER /* irqhandler(trapframe) */
1:
- mrs x1, tpidr_el1 /* get curlwp */
- ldr x1, [x1, #L_CPU] /* get curcpu */
- str w28, [x1, #CI_INTR_DEPTH] /* ci->ci_intr_depth = old */
+ /* x28 is curcpu() */
+ str wzr, [x28, #CI_INTR_DEPTH] /* ci->ci_intr_depth = 0 */
#if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS)
- cbnz w28, 1f/* Skip if intr_depth > 0 */
- ldr w3, [x1, #CI_SOFTINTS] /* Get pending softint mask */
+ ldr w3, [x28, #CI_SOFTINTS] /* Get pending softint mask */
/* CPL should be 0 */
- ldr w2, [x1, #CI_CPL] /* Get current priority level */
+ ldr w2, [x28, #CI_CPL] /* Get current priority level */
lsr w3, w3, w2 /* shift mask by cpl */
cbz w3, 1f
bl _C_LABEL(dosoftints) /* dosoftints() */
CVS commit: src/sys/arch/aarch64/include
Module Name:src
Committed By: ryo
Date: Mon Feb 22 09:29:38 UTC 2021
Modified Files:
src/sys/arch/aarch64/include: cpu_counter.h
Log Message:
PR/56002: aarch64 has a true 64bit CPU cycle counter, we will use it.
This fix solves PR/56002 on aarch64, but this problems can occur on
all other architectures where cpu_counter() is 32bit.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/aarch64/include/cpu_counter.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/cpu_counter.h
diff -u src/sys/arch/aarch64/include/cpu_counter.h:1.1 src/sys/arch/aarch64/include/cpu_counter.h:1.2
--- src/sys/arch/aarch64/include/cpu_counter.h:1.1 Sun Aug 10 05:47:38 2014
+++ src/sys/arch/aarch64/include/cpu_counter.h Mon Feb 22 09:29:38 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_counter.h,v 1.1 2014/08/10 05:47:38 matt Exp $ */
+/* $NetBSD: cpu_counter.h,v 1.2 2021/02/22 09:29:38 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -44,7 +44,12 @@
#include
#define cpu_hascounter() (curcpu()->ci_data.cpu_cc_freq != 0)
-#define cpu_counter() cpu_counter32()
+
+static __inline uint64_t
+cpu_counter(void)
+{
+ return reg_pmccntr_el0_read();
+}
static __inline uint32_t
cpu_counter32(void)
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: jmcneill Date: Mon Feb 22 02:18:33 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: trap.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.43 -r1.44 src/sys/arch/aarch64/aarch64/trap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/trap.c diff -u src/sys/arch/aarch64/aarch64/trap.c:1.43 src/sys/arch/aarch64/aarch64/trap.c:1.44 --- src/sys/arch/aarch64/aarch64/trap.c:1.43 Thu Feb 18 11:23:15 2021 +++ src/sys/arch/aarch64/aarch64/trap.c Mon Feb 22 02:18:33 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: trap.c,v 1.43 2021/02/18 11:23:15 jmcneill Exp $ */ +/* $NetBSD: trap.c,v 1.44 2021/02/22 02:18:33 jmcneill Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -31,7 +31,7 @@ #include -__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.43 2021/02/18 11:23:15 jmcneill Exp $"); +__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.44 2021/02/22 02:18:33 jmcneill Exp $"); #include "opt_arm_intr_impl.h" #include "opt_compat_netbsd32.h" @@ -919,7 +919,8 @@ sigdebug(const struct trapframe *tf, con } #endif -void do_trapsignal1( +void +do_trapsignal1( #ifdef TRAP_SIGDEBUG const char *func, size_t line,
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: jmcneill
Date: Sun Feb 21 23:37:10 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: idle_machdep.S
Log Message:
When waking from cpu_idle(), only call dosoftints if ci_intr_depth == 0
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/aarch64/aarch64/idle_machdep.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/idle_machdep.S
diff -u src/sys/arch/aarch64/aarch64/idle_machdep.S:1.7 src/sys/arch/aarch64/aarch64/idle_machdep.S:1.8
--- src/sys/arch/aarch64/aarch64/idle_machdep.S:1.7 Thu Feb 11 08:35:12 2021
+++ src/sys/arch/aarch64/aarch64/idle_machdep.S Sun Feb 21 23:37:09 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: idle_machdep.S,v 1.7 2021/02/11 08:35:12 ryo Exp $ */
+/* $NetBSD: idle_machdep.S,v 1.8 2021/02/21 23:37:09 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: idle_machdep.S,v 1.7 2021/02/11 08:35:12 ryo Exp $");
+RCSID("$NetBSD: idle_machdep.S,v 1.8 2021/02/21 23:37:09 jmcneill Exp $");
#ifdef ARM_INTR_IMPL
#include ARM_INTR_IMPL
@@ -93,6 +93,7 @@ ENTRY(cpu_idle)
str w28, [x1, #CI_INTR_DEPTH] /* ci->ci_intr_depth = old */
#if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS)
+ cbnz w28, 1f/* Skip if intr_depth > 0 */
ldr w3, [x1, #CI_SOFTINTS] /* Get pending softint mask */
/* CPL should be 0 */
ldr w2, [x1, #CI_CPL] /* Get current priority level */
CVS commit: src/sys/arch/aarch64/include
Module Name:src
Committed By: jmcneill
Date: Sun Feb 21 17:07:06 UTC 2021
Modified Files:
src/sys/arch/aarch64/include: cpu.h
Log Message:
Add cpu_dosoftints_ci(). Like cpu_dosoftints(), but takes a cpu_info ptr
so we can avoid the extra tpidr_el1 access if cpu_info is already known.
To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/aarch64/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/cpu.h
diff -u src/sys/arch/aarch64/include/cpu.h:1.32 src/sys/arch/aarch64/include/cpu.h:1.33
--- src/sys/arch/aarch64/include/cpu.h:1.32 Sun Feb 21 15:00:04 2021
+++ src/sys/arch/aarch64/include/cpu.h Sun Feb 21 17:07:06 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.32 2021/02/21 15:00:04 jmcneill Exp $ */
+/* $NetBSD: cpu.h,v 1.33 2021/02/21 17:07:06 jmcneill Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -178,18 +178,29 @@ extern struct cpu_info cpu_info_store[];
#define LWP0_CPU_INFO (&cpu_info_store[0])
+#define __HAVE_CPU_DOSOFTINTS_CI
+
static inline void
-cpu_dosoftints(void)
+cpu_dosoftints_ci(struct cpu_info *ci)
{
#if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS)
void dosoftints(void);
- struct cpu_info * const ci = curcpu();
- if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0)
+ if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0) {
dosoftints();
+ }
+#endif
+}
+
+static inline void
+cpu_dosoftints(void)
+{
+#if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS)
+ cpu_dosoftints_ci(curcpu());
#endif
}
+
#endif /* _KERNEL */
#endif /* _KERNEL || _KMEMUSER */
CVS commit: src/sys/arch/aarch64/include
Module Name:src
Committed By: jmcneill
Date: Sat Feb 20 19:27:35 UTC 2021
Modified Files:
src/sys/arch/aarch64/include: locore.h
Log Message:
daif_disable: since we read bits before setting them, if the current state
matches the desired state we can skip the daif write
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/aarch64/include/locore.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/locore.h
diff -u src/sys/arch/aarch64/include/locore.h:1.7 src/sys/arch/aarch64/include/locore.h:1.8
--- src/sys/arch/aarch64/include/locore.h:1.7 Sun Feb 7 21:15:09 2021
+++ src/sys/arch/aarch64/include/locore.h Sat Feb 20 19:27:35 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.7 2021/02/07 21:15:09 jmcneill Exp $ */
+/* $NetBSD: locore.h,v 1.8 2021/02/20 19:27:35 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -80,10 +80,12 @@ static inline register_t __unused
daif_disable(register_t psw)
{
register_t oldpsw = reg_daif_read();
- if (!__builtin_constant_p(psw)) {
- reg_daif_write(oldpsw | psw);
- } else {
- reg_daifset_write((psw & DAIF_MASK) >> DAIF_SETCLR_SHIFT);
+ if ((oldpsw & psw) != psw) {
+ if (!__builtin_constant_p(psw)) {
+ reg_daif_write(oldpsw | psw);
+ } else {
+ reg_daifset_write((psw & DAIF_MASK) >> DAIF_SETCLR_SHIFT);
+ }
}
return oldpsw;
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: jmcneill
Date: Thu Feb 18 11:23:15 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: trap.c
Log Message:
revert previous; user reports of panics under load
To generate a diff of this commit:
cvs rdiff -u -r1.42 -r1.43 src/sys/arch/aarch64/aarch64/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/trap.c
diff -u src/sys/arch/aarch64/aarch64/trap.c:1.42 src/sys/arch/aarch64/aarch64/trap.c:1.43
--- src/sys/arch/aarch64/aarch64/trap.c:1.42 Mon Feb 15 17:46:36 2021
+++ src/sys/arch/aarch64/aarch64/trap.c Thu Feb 18 11:23:15 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.42 2021/02/15 17:46:36 jmcneill Exp $ */
+/* $NetBSD: trap.c,v 1.43 2021/02/18 11:23:15 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.42 2021/02/15 17:46:36 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.43 2021/02/18 11:23:15 jmcneill Exp $");
#include "opt_arm_intr_impl.h"
#include "opt_compat_netbsd32.h"
@@ -521,10 +521,7 @@ interrupt(struct trapframe *tf)
ARM_IRQ_HANDLER(tf);
ci->ci_intr_depth--;
- if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0) {
- ENABLE_INTERRUPT();
- cpu_dosoftints();
- }
+ cpu_dosoftints();
}
#ifdef COMPAT_NETBSD32
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: jmcneill
Date: Mon Feb 15 17:46:36 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: trap.c
Log Message:
interrupt: enable interrupts before running soft intr handlers. To avoid
stack usage going out of control, only do this at ci_intr_depth==0.
To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/aarch64/aarch64/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/trap.c
diff -u src/sys/arch/aarch64/aarch64/trap.c:1.41 src/sys/arch/aarch64/aarch64/trap.c:1.42
--- src/sys/arch/aarch64/aarch64/trap.c:1.41 Fri Dec 11 18:03:33 2020
+++ src/sys/arch/aarch64/aarch64/trap.c Mon Feb 15 17:46:36 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.41 2020/12/11 18:03:33 skrll Exp $ */
+/* $NetBSD: trap.c,v 1.42 2021/02/15 17:46:36 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.41 2020/12/11 18:03:33 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.42 2021/02/15 17:46:36 jmcneill Exp $");
#include "opt_arm_intr_impl.h"
#include "opt_compat_netbsd32.h"
@@ -521,7 +521,10 @@ interrupt(struct trapframe *tf)
ARM_IRQ_HANDLER(tf);
ci->ci_intr_depth--;
- cpu_dosoftints();
+ if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0) {
+ ENABLE_INTERRUPT();
+ cpu_dosoftints();
+ }
}
#ifdef COMPAT_NETBSD32
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Sat Feb 13 18:13:54 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
No assignment is needed here.
the loop in pmap_page_remove() always removes the first pv,
and since the list is managed by _pmap_remove_pv(), pp->pp_pv.pv_next always
points to the first.
To generate a diff of this commit:
cvs rdiff -u -r1.101 -r1.102 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.101 src/sys/arch/aarch64/aarch64/pmap.c:1.102
--- src/sys/arch/aarch64/aarch64/pmap.c:1.101 Mon Feb 1 18:12:11 2021
+++ src/sys/arch/aarch64/aarch64/pmap.c Sat Feb 13 18:13:53 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.101 2021/02/01 18:12:11 ryo Exp $ */
+/* $NetBSD: pmap.c,v 1.102 2021/02/13 18:13:53 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.101 2021/02/01 18:12:11 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.102 2021/02/13 18:13:53 ryo Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -2237,7 +2237,7 @@ pmap_page_remove(struct pmap_page *pp, v
KASSERT(pv == &pp->pp_pv);
} else {
KASSERT(pv == pvtmp);
- pp->pp_pv.pv_next = pv->pv_next;
+ KASSERT(pp->pp_pv.pv_next == pv->pv_next);
pv->pv_next = pvtofree;
pvtofree = pv;
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Thu Feb 11 08:35:12 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: copyinout.S cpufunc_asm_armv8.S fusu.S
idle_machdep.S lock_stubs.S pmap_page.S
Log Message:
include "opt_gprof.h" so that _PROF_PROLOGUE works properly in ENTRY() macro in
*.S files
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/aarch64/aarch64/copyinout.S
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/aarch64/aarch64/fusu.S
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/aarch64/aarch64/idle_machdep.S
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/aarch64/aarch64/lock_stubs.S
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/aarch64/aarch64/pmap_page.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/copyinout.S
diff -u src/sys/arch/aarch64/aarch64/copyinout.S:1.15 src/sys/arch/aarch64/aarch64/copyinout.S:1.16
--- src/sys/arch/aarch64/aarch64/copyinout.S:1.15 Wed Aug 12 13:19:35 2020
+++ src/sys/arch/aarch64/aarch64/copyinout.S Thu Feb 11 08:35:11 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: copyinout.S,v 1.15 2020/08/12 13:19:35 skrll Exp $ */
+/* $NetBSD: copyinout.S,v 1.16 2021/02/11 08:35:11 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -29,11 +29,12 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "opt_gprof.h"
#include
#include
#include "assym.h"
-RCSID("$NetBSD: copyinout.S,v 1.15 2020/08/12 13:19:35 skrll Exp $");
+RCSID("$NetBSD: copyinout.S,v 1.16 2021/02/11 08:35:11 ryo Exp $");
#ifdef ARMV81_PAN
#define PAN_ENABLE \
Index: src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S
diff -u src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S:1.7 src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S:1.8
--- src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S:1.7 Sun Jul 19 07:18:07 2020
+++ src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S Thu Feb 11 08:35:11 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc_asm_armv8.S,v 1.7 2020/07/19 07:18:07 ryo Exp $ */
+/* $NetBSD: cpufunc_asm_armv8.S,v 1.8 2021/02/11 08:35:11 ryo Exp $ */
/*-
* Copyright (c) 2014 Robin Randhawa
@@ -33,6 +33,7 @@
*/
#include "opt_cputypes.h"
+#include "opt_gprof.h"
#include "opt_multiprocessor.h"
#include
Index: src/sys/arch/aarch64/aarch64/fusu.S
diff -u src/sys/arch/aarch64/aarch64/fusu.S:1.10 src/sys/arch/aarch64/aarch64/fusu.S:1.11
--- src/sys/arch/aarch64/aarch64/fusu.S:1.10 Wed Aug 12 13:19:35 2020
+++ src/sys/arch/aarch64/aarch64/fusu.S Thu Feb 11 08:35:11 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: fusu.S,v 1.10 2020/08/12 13:19:35 skrll Exp $ */
+/* $NetBSD: fusu.S,v 1.11 2021/02/11 08:35:11 ryo Exp $ */
/*-
* Copyright (c) 2014, 2019 The NetBSD Foundation, Inc.
@@ -29,10 +29,11 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "opt_gprof.h"
#include
#include "assym.h"
-RCSID("$NetBSD: fusu.S,v 1.10 2020/08/12 13:19:35 skrll Exp $");
+RCSID("$NetBSD: fusu.S,v 1.11 2021/02/11 08:35:11 ryo Exp $");
#ifdef ARMV81_PAN
#define PAN_ENABLE \
Index: src/sys/arch/aarch64/aarch64/idle_machdep.S
diff -u src/sys/arch/aarch64/aarch64/idle_machdep.S:1.6 src/sys/arch/aarch64/aarch64/idle_machdep.S:1.7
--- src/sys/arch/aarch64/aarch64/idle_machdep.S:1.6 Wed Aug 12 13:19:35 2020
+++ src/sys/arch/aarch64/aarch64/idle_machdep.S Thu Feb 11 08:35:12 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: idle_machdep.S,v 1.6 2020/08/12 13:19:35 skrll Exp $ */
+/* $NetBSD: idle_machdep.S,v 1.7 2021/02/11 08:35:12 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -29,13 +29,14 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "opt_arm_intr_impl.h"
+#include "opt_ddb.h"
+#include "opt_gprof.h"
#include
#include
#include "assym.h"
-#include "opt_arm_intr_impl.h"
-#include "opt_ddb.h"
-RCSID("$NetBSD: idle_machdep.S,v 1.6 2020/08/12 13:19:35 skrll Exp $");
+RCSID("$NetBSD: idle_machdep.S,v 1.7 2021/02/11 08:35:12 ryo Exp $");
#ifdef ARM_INTR_IMPL
#include ARM_INTR_IMPL
Index: src/sys/arch/aarch64/aarch64/lock_stubs.S
diff -u src/sys/arch/aarch64/aarch64/lock_stubs.S:1.3 src/sys/arch/aarch64/aarch64/lock_stubs.S:1.4
--- src/sys/arch/aarch64/aarch64/lock_stubs.S:1.3 Tue Oct 13 21:27:18 2020
+++ src/sys/arch/aarch64/aarch64/lock_stubs.S Thu Feb 11 08:35:12 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: lock_stubs.S,v 1.3 2020/10/13 21:27:18 skrll Exp $ */
+/* $NetBSD: lock_stubs.S,v 1.4 2021/02/11 08:35:12 ryo Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -29,13 +29,14 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "opt_gprof.h"
#include "opt_lockdebug.h"
#include
#include "assym.h"
-RCSID("$NetBSD: lock_stubs.S,v 1.3 2020/10/13 21:27:18 skrll Exp $")
+RCSID("$NetBSD: lock_stubs.S,v 1.4 2021/02/11 08:35:12 ryo Exp $")
#ifndef LOCKDEBUG
/*
Index: src/sys/arch/aarch64/aarch64/pmap_page.S
diff -u src/sys/arch/aarch64/aarch64/pmap_page.S:1.
CVS commit: src/sys/arch/aarch64/include
Module Name:src
Committed By: ryo
Date: Wed Feb 10 12:31:34 UTC 2021
Modified Files:
src/sys/arch/aarch64/include: profile.h
Log Message:
Oh...the name of the mcount call was different between gcc and llvm.
gcc calls it as "_mconut", llvm calls as "__mcount".
Change the main name of mcount to "mcount()", and created "_mcount" and
"__mcount" entries
to work regardless of which compiler the object was created with.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/aarch64/include/profile.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/profile.h
diff -u src/sys/arch/aarch64/include/profile.h:1.3 src/sys/arch/aarch64/include/profile.h:1.4
--- src/sys/arch/aarch64/include/profile.h:1.3 Wed Feb 10 08:25:01 2021
+++ src/sys/arch/aarch64/include/profile.h Wed Feb 10 12:31:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: profile.h,v 1.3 2021/02/10 08:25:01 ryo Exp $ */
+/* $NetBSD: profile.h,v 1.4 2021/02/10 12:31:34 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#ifdef __aarch64__
-#define _MCOUNT_DECL void _mcount
+#define _MCOUNT_DECL void mcount
/*
* Cannot implement mcount in C as GCC will trash the ip register when it
@@ -39,7 +39,8 @@
* prologue.
*/
-#define MCOUNT_ASM_NAME "__mcount"
+#define MCOUNT_ASM_NAME "_mcount" /* gcc */
+#define MCOUNT_ASM_NAME_ALIAS "__mcount" /* llvm */
#define PLTSYM
#define MCOUNT\
@@ -47,7 +48,9 @@
__asm(".align 6"); \
__asm(".type " MCOUNT_ASM_NAME ",@function"); \
__asm(".global " MCOUNT_ASM_NAME);\
+ __asm(".global " MCOUNT_ASM_NAME_ALIAS); \
__asm(MCOUNT_ASM_NAME ":"); \
+ __asm(MCOUNT_ASM_NAME_ALIAS ":");\
/*\
* Preserve registers that are trashed during mcount \
*/\
@@ -70,7 +73,7 @@
/*\
* Call the real mcount code \
*/\
- __asm("bl " ___STRING(_C_LABEL(_mcount))); \
+ __asm("bl " ___STRING(_C_LABEL(mcount))); \
/*\
* Restore registers that were trashed during mcount \
*/\
CVS commit: src/sys/arch/aarch64
Module Name:src
Committed By: ryo
Date: Wed Feb 10 08:25:01 UTC 2021
Modified Files:
src/sys/arch/aarch64/conf: Makefile.aarch64 kern.ldscript
src/sys/arch/aarch64/include: profile.h
Log Message:
add support kernel profiling on aarch64
- add MCOUNT_ENTER, MCOUNT_EXIT macro
- __mcount() function should be aligned
- add "-fno-optimize-sibling-calls" option when PROF. for accurate profiling,
it is better to suppress the tail call.
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/aarch64/conf/Makefile.aarch64
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/aarch64/conf/kern.ldscript
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/aarch64/include/profile.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/conf/Makefile.aarch64
diff -u src/sys/arch/aarch64/conf/Makefile.aarch64:1.21 src/sys/arch/aarch64/conf/Makefile.aarch64:1.22
--- src/sys/arch/aarch64/conf/Makefile.aarch64:1.21 Mon May 11 03:00:57 2020
+++ src/sys/arch/aarch64/conf/Makefile.aarch64 Wed Feb 10 08:25:01 2021
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.aarch64,v 1.21 2020/05/11 03:00:57 ryo Exp $
+# $NetBSD: Makefile.aarch64,v 1.22 2021/02/10 08:25:01 ryo Exp $
# Makefile for NetBSD
#
@@ -39,6 +39,11 @@ CFLAGS+= -fno-omit-frame-pointer
CFLAGS+= -mno-omit-leaf-frame-pointer
#CFLAGS+= -mno-unaligned-access
+.if defined(PROF) && ${HAVE_GCC:U0} > 0
+# For accurate profiling, it is better to suppress the tail call.
+CFLAGS+= -fno-optimize-sibling-calls
+.endif
+
.if ${HAVE_LLVM:Uno} == "yes"
.if ${ARMV83_PAC:U0} > 0 && ${ARMV85_BTI:U0} > 0
CFLAGS+= -mbranch-protection=pac-ret+bti
Index: src/sys/arch/aarch64/conf/kern.ldscript
diff -u src/sys/arch/aarch64/conf/kern.ldscript:1.11 src/sys/arch/aarch64/conf/kern.ldscript:1.12
--- src/sys/arch/aarch64/conf/kern.ldscript:1.11 Thu Nov 1 20:34:49 2018
+++ src/sys/arch/aarch64/conf/kern.ldscript Wed Feb 10 08:25:01 2021
@@ -11,6 +11,7 @@ SECTIONS
.text :
{
PROVIDE(__kernel_text = .);
+ PROVIDE(kernel_text = .);
*(.text)
*(.text.*)
*(.stub)
Index: src/sys/arch/aarch64/include/profile.h
diff -u src/sys/arch/aarch64/include/profile.h:1.2 src/sys/arch/aarch64/include/profile.h:1.3
--- src/sys/arch/aarch64/include/profile.h:1.2 Thu Apr 23 23:22:41 2020
+++ src/sys/arch/aarch64/include/profile.h Wed Feb 10 08:25:01 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: profile.h,v 1.2 2020/04/23 23:22:41 jakllsch Exp $ */
+/* $NetBSD: profile.h,v 1.3 2021/02/10 08:25:01 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -44,7 +44,7 @@
#define MCOUNT\
__asm(".text"); \
- __asm(".align 0"); \
+ __asm(".align 6"); \
__asm(".type " MCOUNT_ASM_NAME ",@function"); \
__asm(".global " MCOUNT_ASM_NAME);\
__asm(MCOUNT_ASM_NAME ":"); \
@@ -82,6 +82,13 @@
__asm("ret"); \
__asm(".size " MCOUNT_ASM_NAME ", .-" MCOUNT_ASM_NAME);
+#ifdef _KERNEL
+#define MCOUNT_ENTER \
+ __asm __volatile ("mrs %x0, daif; msr daifset, #3": "=r"(s):: "memory")
+#define MCOUNT_EXIT \
+ __asm __volatile ("msr daif, %x0":: "r"(s): "memory")
+#endif /* _KERNEL */
+
#elif defined(__arm__)
#include
CVS commit: src/sys/arch/aarch64/include
Module Name:src
Committed By: jmcneill
Date: Sun Feb 7 21:15:09 UTC 2021
Modified Files:
src/sys/arch/aarch64/include: locore.h
Log Message:
Use reg_daif{set,clr}_write directly instead of daif_{en,dis}able for
ENABLE_INTERRUPT() and DISABLE_INTERRUPT() macros, to avoid an unnecessary
reg_daif_read().
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/aarch64/include/locore.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/locore.h
diff -u src/sys/arch/aarch64/include/locore.h:1.6 src/sys/arch/aarch64/include/locore.h:1.7
--- src/sys/arch/aarch64/include/locore.h:1.6 Fri Oct 30 18:54:35 2020
+++ src/sys/arch/aarch64/include/locore.h Sun Feb 7 21:15:09 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.6 2020/10/30 18:54:35 skrll Exp $ */
+/* $NetBSD: locore.h,v 1.7 2021/02/07 21:15:09 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -59,8 +59,10 @@
#define cpsid(psw) daif_disable((psw))
-#define ENABLE_INTERRUPT() daif_enable(DAIF_I|DAIF_F)
-#define DISABLE_INTERRUPT() daif_disable(DAIF_I|DAIF_F)
+#define ENABLE_INTERRUPT() \
+ reg_daifclr_write((DAIF_I|DAIF_F) >> DAIF_SETCLR_SHIFT)
+#define DISABLE_INTERRUPT() \
+ reg_daifset_write((DAIF_I|DAIF_F) >> DAIF_SETCLR_SHIFT)
#define DAIF_MASK (DAIF_D|DAIF_A|DAIF_I|DAIF_F)
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: joerg
Date: Fri Feb 5 21:44:34 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: db_interface.c db_machdep.c
Log Message:
Avoid duplicate definition of ddb_regs in crash(8).
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/aarch64/aarch64/db_interface.c
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/aarch64/aarch64/db_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_interface.c
diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.11 src/sys/arch/aarch64/aarch64/db_interface.c:1.12
--- src/sys/arch/aarch64/aarch64/db_interface.c:1.11 Fri Dec 11 18:03:33 2020
+++ src/sys/arch/aarch64/aarch64/db_interface.c Fri Feb 5 21:44:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.11 2020/12/11 18:03:33 skrll Exp $ */
+/* $NetBSD: db_interface.c,v 1.12 2021/02/05 21:44:34 joerg Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.11 2020/12/11 18:03:33 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.12 2021/02/05 21:44:34 joerg Exp $");
#include
#include
@@ -51,6 +51,8 @@ __KERNEL_RCSID(0, "$NetBSD: db_interface
#include
+db_regs_t ddb_regs;
+
void
db_read_bytes(vaddr_t addr, size_t size, char *data)
{
Index: src/sys/arch/aarch64/aarch64/db_machdep.c
diff -u src/sys/arch/aarch64/aarch64/db_machdep.c:1.32 src/sys/arch/aarch64/aarch64/db_machdep.c:1.33
--- src/sys/arch/aarch64/aarch64/db_machdep.c:1.32 Mon Jan 18 01:38:44 2021
+++ src/sys/arch/aarch64/aarch64/db_machdep.c Fri Feb 5 21:44:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.32 2021/01/18 01:38:44 rin Exp $ */
+/* $NetBSD: db_machdep.c,v 1.33 2021/02/05 21:44:34 joerg Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.32 2021/01/18 01:38:44 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.33 2021/02/05 21:44:34 joerg Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -207,9 +207,7 @@ const struct db_variable db_regs[] = {
};
const struct db_variable * const db_eregs = db_regs + __arraycount(db_regs);
-
int db_active;
-db_regs_t ddb_regs;
void
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Mon Feb 1 18:12:11 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
It is enough to make a page accessible instead of writable.
same fix as r1.76
To generate a diff of this commit:
cvs rdiff -u -r1.100 -r1.101 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.100 src/sys/arch/aarch64/aarch64/pmap.c:1.101
--- src/sys/arch/aarch64/aarch64/pmap.c:1.100 Sun Jan 31 04:51:29 2021
+++ src/sys/arch/aarch64/aarch64/pmap.c Mon Feb 1 18:12:11 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.100 2021/01/31 04:51:29 ryo Exp $ */
+/* $NetBSD: pmap.c,v 1.101 2021/02/01 18:12:11 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.100 2021/01/31 04:51:29 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.101 2021/02/01 18:12:11 ryo Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -960,20 +960,17 @@ pmap_icache_sync_range(pmap_t pm, vaddr_
vaddr_t eob = (va + blocksize) & ~(blocksize - 1);
vsize_t len = ulmin(eva, eob) - va;
- if (l3pte_writable(pte)) {
+ if (l3pte_readable(pte)) {
cpu_icache_sync_range(va, len);
} else {
/*
- * change to writable temporally
+ * change to accessible temporally
* to do cpu_icache_sync_range()
*/
-pt_entry_t opte = pte;
-pte = pte & ~(LX_BLKPAG_AF|LX_BLKPAG_AP);
-pte |= (LX_BLKPAG_AF|LX_BLKPAG_AP_RW);
-atomic_swap_64(ptep, pte);
+atomic_swap_64(ptep, pte | LX_BLKPAG_AF);
AARCH64_TLBI_BY_ASID_VA(pm->pm_asid, va, true);
cpu_icache_sync_range(va, len);
-atomic_swap_64(ptep, opte);
+atomic_swap_64(ptep, pte);
AARCH64_TLBI_BY_ASID_VA(pm->pm_asid, va, true);
}
}
CVS commit: src/sys/arch/aarch64/include
Module Name:src Committed By: skrll Date: Sun Jan 31 08:14:58 UTC 2021 Modified Files: src/sys/arch/aarch64/include: pmap.h Log Message: Improve a comment To generate a diff of this commit: cvs rdiff -u -r1.44 -r1.45 src/sys/arch/aarch64/include/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/include/pmap.h diff -u src/sys/arch/aarch64/include/pmap.h:1.44 src/sys/arch/aarch64/include/pmap.h:1.45 --- src/sys/arch/aarch64/include/pmap.h:1.44 Sun Jan 31 04:51:29 2021 +++ src/sys/arch/aarch64/include/pmap.h Sun Jan 31 08:14:58 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.44 2021/01/31 04:51:29 ryo Exp $ */ +/* $NetBSD: pmap.h,v 1.45 2021/01/31 08:14:58 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -255,7 +255,7 @@ aarch64_mmap_flags(paddr_t mdpgno) u_int nflag, pflag; /* - * aarch64 arch has 5 memory attribute: + * aarch64 arch has 5 memory attributes defined: * * WriteBack - write back cache * WriteThru - write through cache
CVS commit: src/sys/arch/aarch64
Module Name:src
Committed By: ryo
Date: Sun Jan 31 04:51:29 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
src/sys/arch/aarch64/include: pmap.h
Log Message:
implement pmap_remove_all().
The size of struct pv_entry has increased, but speed of kernel build has
improved by about 1%
exec and exit should have been improved.
To generate a diff of this commit:
cvs rdiff -u -r1.99 -r1.100 src/sys/arch/aarch64/aarch64/pmap.c
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/aarch64/include/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.99 src/sys/arch/aarch64/aarch64/pmap.c:1.100
--- src/sys/arch/aarch64/aarch64/pmap.c:1.99 Sun Dec 20 08:26:32 2020
+++ src/sys/arch/aarch64/aarch64/pmap.c Sun Jan 31 04:51:29 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.99 2020/12/20 08:26:32 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.100 2021/01/31 04:51:29 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.99 2020/12/20 08:26:32 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.100 2021/01/31 04:51:29 ryo Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -485,6 +485,7 @@ pmap_bootstrap(vaddr_t vstart, vaddr_t v
kpm->pm_l0table_pa = l0pa;
kpm->pm_activated = true;
LIST_INIT(&kpm->pm_vmlist);
+ LIST_INIT(&kpm->pm_pvlist); /* not used for kernel pmap */
mutex_init(&kpm->pm_lock, MUTEX_DEFAULT, IPL_NONE);
CTASSERT(sizeof(kpm->pm_stats.wired_count) == sizeof(long));
@@ -719,11 +720,14 @@ _pmap_sweep_pdp(struct pmap *pm)
}
static void
-_pmap_free_pdp_all(struct pmap *pm)
+_pmap_free_pdp_all(struct pmap *pm, bool free_l0)
{
- struct vm_page *pg;
+ struct vm_page *pg, *pgtmp, *pg_reserve;
- while ((pg = LIST_FIRST(&pm->pm_vmlist)) != NULL) {
+ pg_reserve = free_l0 ? NULL : PHYS_TO_VM_PAGE(pm->pm_l0table_pa);
+ LIST_FOREACH_SAFE(pg, &pm->pm_vmlist, pageq.list, pgtmp) {
+ if (pg == pg_reserve)
+ continue;
pmap_free_pdp(pm, pg);
}
}
@@ -1101,6 +1105,7 @@ _pmap_remove_pv(struct pmap_page *pp, st
UVMHIST_LOG(pmaphist, "pp=%p, pm=%p, va=%llx, pte=%llx",
pp, pm, va, pte);
+ KASSERT(mutex_owned(&pm->pm_lock)); /* for pv_proc */
KASSERT(mutex_owned(&pp->pp_pvlock));
for (ppv = NULL, pv = &pp->pp_pv; pv != NULL; pv = pv->pv_next) {
@@ -1109,6 +1114,10 @@ _pmap_remove_pv(struct pmap_page *pp, st
}
ppv = pv;
}
+
+ if (pm != pmap_kernel() && pv != NULL)
+ LIST_REMOVE(pv, pv_proc);
+
if (ppv == NULL) {
/* embedded in pmap_page */
pv->pv_pmap = NULL;
@@ -1234,6 +1243,9 @@ _pmap_enter_pv(struct pmap_page *pp, str
pv->pv_ptep = ptep;
PMAP_COUNT(pv_enter);
+ if (pm != pmap_kernel())
+ LIST_INSERT_HEAD(&pm->pm_pvlist, pv, pv_proc);
+
#ifdef PMAP_PV_DEBUG
printf("pv %p alias added va=%016lx -> pa=%016lx\n", pv, va, pa);
pv_dump(pp, printf);
@@ -1499,6 +1511,7 @@ pmap_create(void)
pm->pm_idlepdp = 0;
pm->pm_asid = -1;
LIST_INIT(&pm->pm_vmlist);
+ LIST_INIT(&pm->pm_pvlist);
mutex_init(&pm->pm_lock, MUTEX_DEFAULT, IPL_NONE);
pm->pm_l0table_pa = pmap_alloc_pdp(pm, NULL, 0, true);
@@ -1535,9 +1548,13 @@ pmap_destroy(struct pmap *pm)
if (refcnt > 0)
return;
- aarch64_tlbi_by_asid(pm->pm_asid);
+ KASSERT(LIST_EMPTY(&pm->pm_pvlist));
- _pmap_free_pdp_all(pm);
+ /*
+ * no need to call aarch64_tlbi_by_asid(pm->pm_asid).
+ * TLB should already be invalidated in pmap_remove_all()
+ */
+ _pmap_free_pdp_all(pm, true);
mutex_destroy(&pm->pm_lock);
pool_cache_put(&_pmap_cache, pm);
@@ -2034,8 +2051,64 @@ pmap_enter(struct pmap *pm, vaddr_t va,
bool
pmap_remove_all(struct pmap *pm)
{
- /* nothing to do */
- return false;
+ struct pmap_page *pp;
+ struct pv_entry *pv, *pvtmp, *opv, *pvtofree = NULL;
+ pt_entry_t pte, *ptep;
+ paddr_t pa;
+
+ UVMHIST_FUNC(__func__);
+ UVMHIST_CALLED(pmaphist);
+
+ UVMHIST_LOG(pmaphist, "pm=%p", pm, 0, 0, 0);
+
+ if (pm == pmap_kernel())
+ return false;
+
+ pm_lock(pm);
+
+ LIST_FOREACH_SAFE(pv, &pm->pm_pvlist, pv_proc, pvtmp) {
+ ptep = pv->pv_ptep;
+ pte = *ptep;
+
+ KASSERTMSG(lxpde_valid(pte),
+ "pte is not valid: pmap=%p, asid=%d, va=%016lx\n",
+ pm, pm->pm_asid, pv->pv_va);
+
+ pa = lxpde_pa(pte);
+ pp = phys_to_pp(pa);
+
+ KASSERTMSG(pp != NULL,
+ "no pmap_page of physical address:%016lx, "
+ "pmap=%p, asid=%d, va=%016lx\n",
+ pa, pm, pm->pm_asid, pv->pv_va);
+
+ pmap_pv_lock(pp);
+ opv = _pmap_remove_pv(pp, pm, trunc_page(pv->pv_va), pte);
+ pmap_pv_unlock(pp);
+ if (opv != NULL) {
+ opv->pv_next = pvtofree;
+ pvtofree = opv;
+ }
+ }
+ /* all PTE should now be cleared */
+ pm->pm_stats.wired_count = 0;
+ pm->pm_stats.resident_count = 0;
+
+ /* clear L0 page table page */
+ pmap_zero_page(pm->pm_l0table_pa);
+ aarch64_tlbi_by_asid(pm->pm_asid);
+
+ /* free L1-L3 page table pages, bu
CVS commit: src/sys/arch/aarch64/include
Module Name:src Committed By: jmcneill Date: Sat Jan 23 22:24:49 UTC 2021 Modified Files: src/sys/arch/aarch64/include: types.h Log Message: Add __HAVE_BUS_SPACE_8 To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/aarch64/include/types.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/include/types.h diff -u src/sys/arch/aarch64/include/types.h:1.16 src/sys/arch/aarch64/include/types.h:1.17 --- src/sys/arch/aarch64/include/types.h:1.16 Mon Sep 14 10:06:35 2020 +++ src/sys/arch/aarch64/include/types.h Sat Jan 23 22:24:49 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.16 2020/09/14 10:06:35 ryo Exp $ */ +/* $NetBSD: types.h,v 1.17 2021/01/23 22:24:49 jmcneill Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -93,6 +93,7 @@ typedef __uint64_t __register_t; #define __SIMPLELOCK_UNLOCKED 0 #define __HAVE_ATOMIC64_OPS +#define __HAVE_BUS_SPACE_8 #define __HAVE_COMMON___TLS_GET_ADDR #define __HAVE_CPU_COUNTER #define __HAVE_CPU_DATA_FIRST
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: rin
Date: Mon Jan 18 01:38:44 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: db_machdep.c
Log Message:
Fix build as crash(8); Protect db_md_meminfo_cmd() by defined(_KERNEL).
To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/aarch64/aarch64/db_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_machdep.c
diff -u src/sys/arch/aarch64/aarch64/db_machdep.c:1.31 src/sys/arch/aarch64/aarch64/db_machdep.c:1.32
--- src/sys/arch/aarch64/aarch64/db_machdep.c:1.31 Sun Jan 17 00:23:59 2021
+++ src/sys/arch/aarch64/aarch64/db_machdep.c Mon Jan 18 01:38:44 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.31 2021/01/17 00:23:59 mrg Exp $ */
+/* $NetBSD: db_machdep.c,v 1.32 2021/01/18 01:38:44 rin Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.31 2021/01/17 00:23:59 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.32 2021/01/18 01:38:44 rin Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -79,7 +79,9 @@ void db_md_watch_cmd(db_expr_t, bool, db
#if defined(_KERNEL) && defined(MULTIPROCESSOR)
void db_md_switch_cpu_cmd(db_expr_t, bool, db_expr_t, const char *);
#endif
+#if defined(_KERNEL)
static void db_md_meminfo_cmd(db_expr_t, bool, db_expr_t, const char *);
+#endif
const struct db_command db_machine_command_table[] = {
#if defined(_KERNEL) && defined(MULTIPROCESSOR)
@@ -1083,6 +1085,7 @@ kdb_trap(int type, struct trapframe *tf)
}
#endif
+#if defined(_KERNEL)
static void
db_md_meminfo_cmd(db_expr_t addr, bool have_addr, db_expr_t count,
const char *modif)
@@ -1097,3 +1100,4 @@ db_md_meminfo_cmd(db_expr_t addr, bool h
bootconfig.dram[blk].pages);
}
}
+#endif
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: mrg
Date: Sun Jan 17 00:23:59 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: db_machdep.c
Log Message:
add a command to dump the bootconfig passed meminfo.
To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/aarch64/aarch64/db_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_machdep.c
diff -u src/sys/arch/aarch64/aarch64/db_machdep.c:1.30 src/sys/arch/aarch64/aarch64/db_machdep.c:1.31
--- src/sys/arch/aarch64/aarch64/db_machdep.c:1.30 Fri Dec 11 18:03:33 2020
+++ src/sys/arch/aarch64/aarch64/db_machdep.c Sun Jan 17 00:23:59 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.30 2020/12/11 18:03:33 skrll Exp $ */
+/* $NetBSD: db_machdep.c,v 1.31 2021/01/17 00:23:59 mrg Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.30 2020/12/11 18:03:33 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.31 2021/01/17 00:23:59 mrg Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -79,6 +79,7 @@ void db_md_watch_cmd(db_expr_t, bool, db
#if defined(_KERNEL) && defined(MULTIPROCESSOR)
void db_md_switch_cpu_cmd(db_expr_t, bool, db_expr_t, const char *);
#endif
+static void db_md_meminfo_cmd(db_expr_t, bool, db_expr_t, const char *);
const struct db_command db_machine_command_table[] = {
#if defined(_KERNEL) && defined(MULTIPROCESSOR)
@@ -152,6 +153,12 @@ const struct db_command db_machine_comma
"\t#: watchpoint number to remove"
"\t/1..8: size of data\n")
},
+ {
+ DDB_ADD_CMD(
+ "meminfo", db_md_meminfo_cmd, 0,
+ "Dump info about memory ranges",
+ NULL, NULL)
+ },
#endif
{
DDB_ADD_CMD(NULL, NULL, 0,
@@ -1075,3 +1082,18 @@ kdb_trap(int type, struct trapframe *tf)
return 1;
}
#endif
+
+static void
+db_md_meminfo_cmd(db_expr_t addr, bool have_addr, db_expr_t count,
+const char *modif)
+{
+ unsigned blk;
+
+ for (blk = 0; blk < bootconfig.dramblocks; blk++) {
+ db_printf("blk[%u]: start %lx end %lx (pages %x)\n",
+ blk, bootconfig.dram[blk].address,
+ bootconfig.dram[blk].address +
+ (uint64_t)bootconfig.dram[blk].pages * PAGE_SIZE,
+ bootconfig.dram[blk].pages);
+ }
+}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Mon Jan 11 21:58:31 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: cpu.c
Log Message:
Improve a comment
To generate a diff of this commit:
cvs rdiff -u -r1.57 -r1.58 src/sys/arch/aarch64/aarch64/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.57 src/sys/arch/aarch64/aarch64/cpu.c:1.58
--- src/sys/arch/aarch64/aarch64/cpu.c:1.57 Fri Dec 11 18:03:33 2020
+++ src/sys/arch/aarch64/aarch64/cpu.c Mon Jan 11 21:58:31 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.57 2020/12/11 18:03:33 skrll Exp $ */
+/* $NetBSD: cpu.c,v 1.58 2021/01/11 21:58:31 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.57 2020/12/11 18:03:33 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.58 2021/01/11 21:58:31 skrll Exp $");
#include "locators.h"
#include "opt_arm_debug.h"
@@ -86,8 +86,8 @@ static void cpu_setup_chacha(device_t, s
#endif /* MULTIPROCESSOR */
/*
- * Our exported CPU info;
- * these will be refered from secondary cpus in the middle of hatching.
+ * Our exported cpu_info structs; these will be first used by the
+ * secondary cpus as part of cpu_mpstart and the hatching process.
*/
struct cpu_info cpu_info_store[NCPUINFO] = {
[0] = {
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Mon Jan 11 17:12:13 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: cpufunc.c Log Message: Small simplification To generate a diff of this commit: cvs rdiff -u -r1.26 -r1.27 src/sys/arch/aarch64/aarch64/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/cpufunc.c diff -u src/sys/arch/aarch64/aarch64/cpufunc.c:1.26 src/sys/arch/aarch64/aarch64/cpufunc.c:1.27 --- src/sys/arch/aarch64/aarch64/cpufunc.c:1.26 Thu Oct 22 07:31:15 2020 +++ src/sys/arch/aarch64/aarch64/cpufunc.c Mon Jan 11 17:12:13 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc.c,v 1.26 2020/10/22 07:31:15 skrll Exp $ */ +/* $NetBSD: cpufunc.c,v 1.27 2021/01/11 17:12:13 skrll Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -30,7 +30,7 @@ #include "opt_multiprocessor.h" #include -__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.26 2020/10/22 07:31:15 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.27 2021/01/11 17:12:13 skrll Exp $"); #include #include @@ -439,7 +439,6 @@ set_cpufuncs(void) struct cpu_info * const ci = curcpu(); const uint64_t ctr = reg_ctr_el0_read(); const uint64_t clidr = reg_clidr_el1_read(); - const uint32_t midr __unused = reg_midr_el1_read(); /* install default functions */ ci->ci_cpufuncs.cf_set_ttbr0 = aarch64_set_ttbr0; @@ -463,6 +462,8 @@ set_cpufuncs(void) } #ifdef CPU_THUNDERX + const uint32_t midr = reg_midr_el1_read(); + /* Cavium erratum 27456 */ if ((midr == CPU_ID_THUNDERXP1d0) || (midr == CPU_ID_THUNDERXP1d1) ||
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: jmcneill
Date: Sat Jan 9 15:07:42 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: locore.S
Log Message:
Avoid mismatched memory attributes for kernel and page table memory.
The initial page table code enters mappings first through an identity
mapped normal-NC mapping. Then later on, additional mappings are added
through a KVA-mapped normal-WB mapping. There is a warning about this
in the Armv8 ARM:
Bytes written without the Write-Back cacheable attribute within the
same Write-Back granule as bytes written with the Write-Back cacheable
attribute might have their values reverted to the old values as a result
of cache Write-Back.
Change the identity mapping attributes to match the KVA-mapping. This
fixes an issue where the kernel often doesn't start under ESXi-Arm Fling.
To generate a diff of this commit:
cvs rdiff -u -r1.75 -r1.76 src/sys/arch/aarch64/aarch64/locore.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.75 src/sys/arch/aarch64/aarch64/locore.S:1.76
--- src/sys/arch/aarch64/aarch64/locore.S:1.75 Sat Dec 26 00:55:26 2020
+++ src/sys/arch/aarch64/aarch64/locore.S Sat Jan 9 15:07:42 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.75 2020/12/26 00:55:26 jmcneill Exp $ */
+/* $NetBSD: locore.S,v 1.76 2021/01/09 15:07:42 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -38,7 +38,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.75 2020/12/26 00:55:26 jmcneill Exp $")
+RCSID("$NetBSD: locore.S,v 1.76 2021/01/09 15:07:42 jmcneill Exp $")
#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -865,7 +865,8 @@ init_mmutable:
sub x2, x2, x1 /* size = _end - start */
add x2, x2, #PMAPBOOT_PAGEALLOCMAX /* for pmapboot_pagealloc() */
mov x3, #L2_SIZE /* blocksize */
- mov x4, #LX_BLKPAG_ATTR_NORMAL_NC | LX_BLKPAG_AP_RW /* attr */
+ mov x4, #LX_BLKPAG_ATTR_NORMAL_WB | LX_BLKPAG_AP_RW /* attr */
+ orr x4, x4, #LX_BLKPAG_UXN
mov x5, x26/* pr func */
bl pmapboot_enter
cbnz x0, init_mmutable_error
@@ -879,7 +880,7 @@ init_mmutable:
mov x1, x8/* pa */
mov x2, #L2_SIZE /* size */
mov x3, #L2_SIZE /* blocksize */
- mov x4, #LX_BLKPAG_ATTR_NORMAL_NC | LX_BLKPAG_AP_RW
+ mov x4, #LX_BLKPAG_ATTR_NORMAL_WB | LX_BLKPAG_AP_RW
orr x4, x4, #LX_BLKPAG_UXN | LX_BLKPAG_PXN /* attr */
mov x5, x26/* pr func */
bl pmapboot_enter
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: jmcneill Date: Sat Jan 9 13:42:25 UTC 2021 Modified Files: src/sys/arch/aarch64/aarch64: pmapboot.c Log Message: Fix a potential issue in pmapboot_enter_range and pmapboot_enter where if the va and size are not page aligned, there is a possibility of the last page not being taken into consideration. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/aarch64/pmapboot.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/pmapboot.c diff -u src/sys/arch/aarch64/aarch64/pmapboot.c:1.14 src/sys/arch/aarch64/aarch64/pmapboot.c:1.15 --- src/sys/arch/aarch64/aarch64/pmapboot.c:1.14 Fri Dec 11 18:03:33 2020 +++ src/sys/arch/aarch64/aarch64/pmapboot.c Sat Jan 9 13:42:25 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: pmapboot.c,v 1.14 2020/12/11 18:03:33 skrll Exp $ */ +/* $NetBSD: pmapboot.c,v 1.15 2021/01/09 13:42:25 jmcneill Exp $ */ /* * Copyright (c) 2018 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.14 2020/12/11 18:03:33 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.15 2021/01/09 13:42:25 jmcneill Exp $"); #include "opt_arm_debug.h" #include "opt_ddb.h" @@ -240,8 +240,8 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p va, pa, size, blocksize, attr); pa &= ~(blocksize - 1); + va_end = (va + size + blocksize - 1) & ~(blocksize - 1); va &= ~(blocksize - 1); - va_end = (va + size + blocksize- 1) & ~(blocksize - 1); #ifdef OPTIMIZE_TLB_CONTIG va_start = va; #endif @@ -473,8 +473,8 @@ pmapboot_enter_range(vaddr_t va, paddr_t vsize_t left, mapsize, nblocks; int nskip = 0; - va = trunc_page(va); vend = round_page(va + size); + va = trunc_page(va); left = vend - va; /* align the start address to L2 blocksize */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: jmcneill
Date: Sat Dec 26 00:55:26 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S locore.S locore_el2.S
Log Message:
Always issue isb after cpacr_el1 writes since it is a context-changing
operation.
To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/aarch64/aarch64/cpuswitch.S
cvs rdiff -u -r1.74 -r1.75 src/sys/arch/aarch64/aarch64/locore.S
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/aarch64/aarch64/locore_el2.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.31 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.32
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.31 Thu Oct 22 07:36:02 2020
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Sat Dec 26 00:55:26 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.31 2020/10/22 07:36:02 skrll Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.32 2020/12/26 00:55:26 jmcneill Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.31 2020/10/22 07:36:02 skrll Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.32 2020/12/26 00:55:26 jmcneill Exp $")
ARMV8_DEFINE_OPTIONS
@@ -86,6 +86,7 @@ ENTRY_NP(cpu_switchto)
DISABLE_INTERRUPT
mov sp, x4 /* restore stack pointer */
msr cpacr_el1, x5 /* restore cpacr_el1 */
+ isb
#ifdef ARMV83_PAC
/* Switch the PAC key. */
@@ -191,6 +192,7 @@ ENTRY_NP(cpu_switchto_softint)
mov x5, #CPACR_FPEN_NONE
msr cpacr_el1, x5 /* cpacr_el1 = CPACR_FPEN_NONE */
+ isb
#ifdef ARMV83_PAC
/* Switch the PAC key. */
@@ -223,6 +225,7 @@ ENTRY_NP(cpu_switchto_softint)
mov sp, x4 /* restore pinned_lwp sp */
msr cpacr_el1, x5 /* restore pinned_lwp cpacr */
+ isb
#ifdef ARMV83_PAC
/* Restore the PAC key. */
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.74 src/sys/arch/aarch64/aarch64/locore.S:1.75
--- src/sys/arch/aarch64/aarch64/locore.S:1.74 Thu Oct 22 07:16:06 2020
+++ src/sys/arch/aarch64/aarch64/locore.S Sat Dec 26 00:55:26 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.74 2020/10/22 07:16:06 ryo Exp $ */
+/* $NetBSD: locore.S,v 1.75 2020/12/26 00:55:26 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -38,7 +38,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.74 2020/10/22 07:16:06 ryo Exp $")
+RCSID("$NetBSD: locore.S,v 1.75 2020/12/26 00:55:26 jmcneill Exp $")
#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -250,6 +250,7 @@ init_sysregs:
/* No trap system register access, and Trap FP/SIMD access */
msr cpacr_el1, xzr
+ isb
/* allow to read CNTVCT_EL0 and CNTFRQ_EL0 from EL0 */
mrs x0, cntkctl_el1
Index: src/sys/arch/aarch64/aarch64/locore_el2.S
diff -u src/sys/arch/aarch64/aarch64/locore_el2.S:1.7 src/sys/arch/aarch64/aarch64/locore_el2.S:1.8
--- src/sys/arch/aarch64/aarch64/locore_el2.S:1.7 Tue Sep 15 09:28:20 2020
+++ src/sys/arch/aarch64/aarch64/locore_el2.S Sat Dec 26 00:55:26 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: locore_el2.S,v 1.7 2020/09/15 09:28:20 ryo Exp $ */
+/* $NetBSD: locore_el2.S,v 1.8 2020/12/26 00:55:26 jmcneill Exp $ */
/*-
* Copyright (c) 2012-2014 Andrew Turner
@@ -32,7 +32,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: locore_el2.S,v 1.7 2020/09/15 09:28:20 ryo Exp $")
+RCSID("$NetBSD: locore_el2.S,v 1.8 2020/12/26 00:55:26 jmcneill Exp $")
/*
* For use in #include "locore_el2.S".
@@ -85,6 +85,7 @@ in_el2:
bic x2, x2, #CPACR_FPEN
orr x2, x2, #CPACR_FPEN_ALL
msr cpacr_el1, x2
+ isb
/* Don't trap to EL2 on access to various registers. */
mov x2, #CPTR_RES1
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sun Dec 20 08:26:33 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
Improve the English in the previous comment fix.
To generate a diff of this commit:
cvs rdiff -u -r1.98 -r1.99 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.98 src/sys/arch/aarch64/aarch64/pmap.c:1.99
--- src/sys/arch/aarch64/aarch64/pmap.c:1.98 Sat Dec 19 09:02:32 2020
+++ src/sys/arch/aarch64/aarch64/pmap.c Sun Dec 20 08:26:32 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.98 2020/12/19 09:02:32 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.99 2020/12/20 08:26:32 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.98 2020/12/19 09:02:32 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.99 2020/12/20 08:26:32 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -632,7 +632,7 @@ pmap_alloc_pdp(struct pmap *pm, struct v
PMAP_COUNT(pdp_alloc);
PMAP_PAGE_INIT(VM_PAGE_TO_PP(pg));
} else {
- /* uvm_pageboot_alloc() returns direct mapping address */
+ /* uvm_pageboot_alloc() returns a direct mapping address */
pg = NULL;
pa = AARCH64_KVA_TO_PA(
uvm_pageboot_alloc(Ln_TABLE_SIZE));
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sat Dec 19 09:02:32 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
Tweak a comment
To generate a diff of this commit:
cvs rdiff -u -r1.97 -r1.98 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.97 src/sys/arch/aarch64/aarch64/pmap.c:1.98
--- src/sys/arch/aarch64/aarch64/pmap.c:1.97 Fri Dec 11 18:03:33 2020
+++ src/sys/arch/aarch64/aarch64/pmap.c Sat Dec 19 09:02:32 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.97 2020/12/11 18:03:33 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.98 2020/12/19 09:02:32 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.97 2020/12/11 18:03:33 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.98 2020/12/19 09:02:32 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -632,7 +632,7 @@ pmap_alloc_pdp(struct pmap *pm, struct v
PMAP_COUNT(pdp_alloc);
PMAP_PAGE_INIT(VM_PAGE_TO_PP(pg));
} else {
- /* uvm_pageboot_alloc() returns AARCH64 direct mapping address */
+ /* uvm_pageboot_alloc() returns direct mapping address */
pg = NULL;
pa = AARCH64_KVA_TO_PA(
uvm_pageboot_alloc(Ln_TABLE_SIZE));
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Mon Dec 14 19:32:29 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: bus_space.c
Log Message:
Add a note about completion vs ordering barrier as well.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/aarch64/bus_space.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/bus_space.c
diff -u src/sys/arch/aarch64/aarch64/bus_space.c:1.14 src/sys/arch/aarch64/aarch64/bus_space.c:1.15
--- src/sys/arch/aarch64/aarch64/bus_space.c:1.14 Mon Dec 14 19:25:28 2020
+++ src/sys/arch/aarch64/aarch64/bus_space.c Mon Dec 14 19:32:29 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.14 2020/12/14 19:25:28 skrll Exp $ */
+/* $NetBSD: bus_space.c,v 1.15 2020/12/14 19:32:29 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.14 2020/12/14 19:25:28 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.15 2020/12/14 19:32:29 skrll Exp $");
#include
#include
@@ -638,6 +638,10 @@ generic_bs_barrier(void *t, bus_space_ha
* consulting the page tables), so just issue the barrier
* unconditionally. Chances are either it's necessary or the
* cost is small in comparison to device register I/O.
+ *
+ * The bus_space(9) man page is not clear whether barriers
+ * should enforce ordering or completion. To be safe, use dsb
+ * (ensure completion) here instead of dmb (ordering).
*/
switch (flags) {
case BUS_SPACE_BARRIER_READ:
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Mon Dec 14 19:25:28 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: bus_space.c
Log Message:
Add a big comment in generic_bs_barrier about mappings and what barriers
are really required and why we cheat. Inspired by a similar comment in
x86/bus_space.c
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/aarch64/aarch64/bus_space.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/bus_space.c
diff -u src/sys/arch/aarch64/aarch64/bus_space.c:1.13 src/sys/arch/aarch64/aarch64/bus_space.c:1.14
--- src/sys/arch/aarch64/aarch64/bus_space.c:1.13 Mon Dec 14 11:42:44 2020
+++ src/sys/arch/aarch64/aarch64/bus_space.c Mon Dec 14 19:25:28 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.13 2020/12/14 11:42:44 jmcneill Exp $ */
+/* $NetBSD: bus_space.c,v 1.14 2020/12/14 19:25:28 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.13 2020/12/14 11:42:44 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.14 2020/12/14 19:25:28 skrll Exp $");
#include
#include
@@ -613,6 +613,32 @@ generic_bs_barrier(void *t, bus_space_ha
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
+ /*
+ * For default mappings, which are mapped with nGnRE memory
+ * regions, all loads and stores are issued in program order
+ * (non-reordered).
+ *
+ * For strongly ordered mappings, which are mapped with nGnRnE
+ * regions, all loads and stores are issued in program order
+ * (non-reordered) and will complete at the endpoint, thus
+ * not requiring any barrier.
+ *
+ * For BUS_SPACE_MAP_PREFETCHABLE mappings, which are mapped
+ * as normal memory with the non-cacheable cacheability attr-
+ * ibute, loads and stores may be issued out of order, and
+ * writes may be buffered, potentially requiring any of the
+ * read, write, and read/write barriers.
+ *
+ * For BUS_SPACE_MAP_CACHEABLE mappings, which are mapped as
+ * normal memory with the write-back cacheability attribute
+ * (just like normal memory), the same potential for any of
+ * the barriers exists.
+ *
+ * We can't easily tell here how the region was mapped (without
+ * consulting the page tables), so just issue the barrier
+ * unconditionally. Chances are either it's necessary or the
+ * cost is small in comparison to device register I/O.
+ */
switch (flags) {
case BUS_SPACE_BARRIER_READ:
dsb(ld);
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: jmcneill
Date: Mon Dec 14 11:42:44 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: bus_space.c
Log Message:
Use full system DSB ops for bs barrier.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/bus_space.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/bus_space.c
diff -u src/sys/arch/aarch64/aarch64/bus_space.c:1.12 src/sys/arch/aarch64/aarch64/bus_space.c:1.13
--- src/sys/arch/aarch64/aarch64/bus_space.c:1.12 Mon Dec 14 11:16:33 2020
+++ src/sys/arch/aarch64/aarch64/bus_space.c Mon Dec 14 11:42:44 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.12 2020/12/14 11:16:33 jmcneill Exp $ */
+/* $NetBSD: bus_space.c,v 1.13 2020/12/14 11:42:44 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.12 2020/12/14 11:16:33 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.13 2020/12/14 11:42:44 jmcneill Exp $");
#include
#include
@@ -615,13 +615,13 @@ generic_bs_barrier(void *t, bus_space_ha
switch (flags) {
case BUS_SPACE_BARRIER_READ:
- dsb(ishld);
+ dsb(ld);
break;
case BUS_SPACE_BARRIER_WRITE:
- dsb(ishst);
+ dsb(st);
break;
case BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE:
- dsb(ish);
+ dsb(sy);
break;
}
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: jmcneill
Date: Mon Dec 14 11:16:33 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: bus_space.c
Log Message:
The bus_space(9) man page is not clear whether barriers should enforce
ordering or completion. To be safe, use dsb here instead of dmb.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/aarch64/aarch64/bus_space.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/bus_space.c
diff -u src/sys/arch/aarch64/aarch64/bus_space.c:1.11 src/sys/arch/aarch64/aarch64/bus_space.c:1.12
--- src/sys/arch/aarch64/aarch64/bus_space.c:1.11 Thu Oct 15 21:14:15 2020
+++ src/sys/arch/aarch64/aarch64/bus_space.c Mon Dec 14 11:16:33 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.11 2020/10/15 21:14:15 jmcneill Exp $ */
+/* $NetBSD: bus_space.c,v 1.12 2020/12/14 11:16:33 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.11 2020/10/15 21:14:15 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.12 2020/12/14 11:16:33 jmcneill Exp $");
#include
#include
@@ -615,13 +615,13 @@ generic_bs_barrier(void *t, bus_space_ha
switch (flags) {
case BUS_SPACE_BARRIER_READ:
- dmb(ishld);
+ dsb(ishld);
break;
case BUS_SPACE_BARRIER_WRITE:
- dmb(ishst);
+ dsb(ishst);
break;
case BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE:
- dmb(ish);
+ dsb(ish);
break;
}
}
CVS commit: src/sys/arch/aarch64
Module Name:src
Committed By: skrll
Date: Fri Dec 11 18:03:33 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: aarch64_reboot.c cpu.c db_disasm.c
db_interface.c db_machdep.c db_trace.c exec_machdep.c fault.c fpu.c
genassym.cf kobj_machdep.c netbsd32_machdep.c pmap.c pmapboot.c
trap.c
src/sys/arch/aarch64/include: asan.h sljit_machdep.h
Log Message:
s:aarch64/cpufunc.h:arm/cpufunc.h:
a baby step in the grand arm header unification challenge
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/aarch64/aarch64/aarch64_reboot.c
cvs rdiff -u -r1.56 -r1.57 src/sys/arch/aarch64/aarch64/cpu.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/aarch64/aarch64/db_disasm.c \
src/sys/arch/aarch64/aarch64/db_interface.c \
src/sys/arch/aarch64/aarch64/fpu.c
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/aarch64/aarch64/db_machdep.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/db_trace.c
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/exec_machdep.c
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/aarch64/aarch64/fault.c
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/aarch64/aarch64/genassym.cf
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/aarch64/aarch64/kobj_machdep.c
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/aarch64/aarch64/netbsd32_machdep.c
cvs rdiff -u -r1.96 -r1.97 src/sys/arch/aarch64/aarch64/pmap.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/aarch64/aarch64/pmapboot.c
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/aarch64/aarch64/trap.c
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/aarch64/include/asan.h
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/aarch64/include/sljit_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/aarch64_reboot.c
diff -u src/sys/arch/aarch64/aarch64/aarch64_reboot.c:1.3 src/sys/arch/aarch64/aarch64/aarch64_reboot.c:1.4
--- src/sys/arch/aarch64/aarch64/aarch64_reboot.c:1.3 Fri Nov 9 04:05:27 2018
+++ src/sys/arch/aarch64/aarch64/aarch64_reboot.c Fri Dec 11 18:03:33 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64_reboot.c,v 1.3 2018/11/09 04:05:27 mrg Exp $ */
+/* $NetBSD: aarch64_reboot.c,v 1.4 2020/12/11 18:03:33 skrll Exp $ */
/*
* Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
@@ -122,7 +122,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: aarch64_reboot.c,v 1.3 2018/11/09 04:05:27 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: aarch64_reboot.c,v 1.4 2020/12/11 18:03:33 skrll Exp $");
#include
#include
@@ -136,7 +136,8 @@ __KERNEL_RCSID(0, "$NetBSD: aarch64_rebo
#include
#include
#include
-#include
+
+#include
void (*cpu_reset_address0)(void);
void (*cpu_reset_address)(void);
Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.56 src/sys/arch/aarch64/aarch64/cpu.c:1.57
--- src/sys/arch/aarch64/aarch64/cpu.c:1.56 Sat Oct 10 08:22:57 2020
+++ src/sys/arch/aarch64/aarch64/cpu.c Fri Dec 11 18:03:33 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.56 2020/10/10 08:22:57 jmcneill Exp $ */
+/* $NetBSD: cpu.c,v 1.57 2020/12/11 18:03:33 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.56 2020/10/10 08:22:57 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.57 2020/12/11 18:03:33 skrll Exp $");
#include "locators.h"
#include "opt_arm_debug.h"
@@ -52,10 +52,10 @@ __KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.56
#include
#include
-#include
#include
#include
+#include
#include
#ifdef FDT
#include
Index: src/sys/arch/aarch64/aarch64/db_disasm.c
diff -u src/sys/arch/aarch64/aarch64/db_disasm.c:1.10 src/sys/arch/aarch64/aarch64/db_disasm.c:1.11
--- src/sys/arch/aarch64/aarch64/db_disasm.c:1.10 Thu Jul 9 23:43:41 2020
+++ src/sys/arch/aarch64/aarch64/db_disasm.c Fri Dec 11 18:03:33 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: db_disasm.c,v 1.10 2020/07/09 23:43:41 ryo Exp $ */
+/* $NetBSD: db_disasm.c,v 1.11 2020/12/11 18:03:33 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.10 2020/07/09 23:43:41 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.11 2020/12/11 18:03:33 skrll Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -41,10 +41,11 @@ __KERNEL_RCSID(0, "$NetBSD: db_disasm.c,
#include
#include
-#include
#include
#include
+#include
+
static uint32_t
db_disasm_readword(uintptr_t address)
{
Index: src/sys/arch/aarch64/aarch64/db_interface.c
diff -u src/sys/arch/aarch64/aarch64/db_interface.c:1.10 src/sys/arch/aarch64/aarch64/db_interface.c:1.11
--- src/sys/arch/aarch64/aarch64/db_interface.c:1.10 Mon Sep 14 10:53:02 2020
+++ src/sys/arch/aarch64/aarch64/db_interface.c Fri Dec 11 18:03:33 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.10 2020/09/14 10:53:02 ryo Exp $ */
+/* $NetBSD: db_interface.c,v 1.11 2020/12/11 18:03
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Wed Dec 9 08:51:05 UTC 2020 Modified Files: src/sys/arch/aarch64/aarch64: aarch64_machdep.c Log Message: Remove unnecessary aarch64_dcache_wbinv_all now that pmapboot_enter does dsb(ish) To generate a diff of this commit: cvs rdiff -u -r1.54 -r1.55 src/sys/arch/aarch64/aarch64/aarch64_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.54 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.55 --- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.54 Tue Nov 10 07:51:19 2020 +++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Wed Dec 9 08:51:05 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: aarch64_machdep.c,v 1.54 2020/11/10 07:51:19 skrll Exp $ */ +/* $NetBSD: aarch64_machdep.c,v 1.55 2020/12/09 08:51:05 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include -__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.54 2020/11/10 07:51:19 skrll Exp $"); +__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.55 2020/12/09 08:51:05 skrll Exp $"); #include "opt_arm_debug.h" #include "opt_cpuoptions.h" @@ -166,7 +166,6 @@ cpu_kernel_vm_init(uint64_t memory_start pmapboot_enter_range(AARCH64_PA_TO_KVA(start), start, end - start, dmattr, printf); } - aarch64_dcache_wbinv_all(); /* Disable translation table walks using TTBR0 */ uint64_t tcr = reg_tcr_el1_read();
CVS commit: src/sys/arch/aarch64/include
Module Name:src
Committed By: jmcneill
Date: Mon Dec 7 10:56:12 UTC 2020
Modified Files:
src/sys/arch/aarch64/include: cpu.h
Log Message:
ACPI Processor UID is 32-bits (ci_acpiid).
To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/aarch64/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/cpu.h
diff -u src/sys/arch/aarch64/include/cpu.h:1.29 src/sys/arch/aarch64/include/cpu.h:1.30
--- src/sys/arch/aarch64/include/cpu.h:1.29 Sat Nov 21 11:43:59 2020
+++ src/sys/arch/aarch64/include/cpu.h Mon Dec 7 10:56:12 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.29 2020/11/21 11:43:59 jmcneill Exp $ */
+/* $NetBSD: cpu.h,v 1.30 2020/12/07 10:56:12 jmcneill Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -122,7 +122,7 @@ struct cpu_info {
uint64_t ci_gic_sgir; /* GICv3 SGIR target */
/* ACPI */
- uint64_t ci_acpiid; /* ACPI Processor Unique ID */
+ uint32_t ci_acpiid; /* ACPI Processor Unique ID */
struct aarch64_sysctl_cpu_id ci_id;
CVS commit: src/sys/arch/aarch64/include
Module Name:src
Committed By: skrll
Date: Fri Dec 4 08:29:11 UTC 2020
Modified Files:
src/sys/arch/aarch64/include: cpufunc.h
Log Message:
Remove unnecessary casts
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/aarch64/include/cpufunc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/cpufunc.h
diff -u src/sys/arch/aarch64/include/cpufunc.h:1.18 src/sys/arch/aarch64/include/cpufunc.h:1.19
--- src/sys/arch/aarch64/include/cpufunc.h:1.18 Mon Aug 3 06:30:00 2020
+++ src/sys/arch/aarch64/include/cpufunc.h Fri Dec 4 08:29:11 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.h,v 1.18 2020/08/03 06:30:00 ryo Exp $ */
+/* $NetBSD: cpufunc.h,v 1.19 2020/12/04 08:29:11 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -191,7 +191,7 @@ aarch64_addressspace(vaddr_t va)
{
uint64_t addrtop, tbi;
- addrtop = (uint64_t)va & AARCH64_ADDRTOP_TAG;
+ addrtop = va & AARCH64_ADDRTOP_TAG;
tbi = addrtop ? TCR_TBI1 : TCR_TBI0;
if (reg_tcr_el1_read() & tbi) {
if (addrtop == 0) {
@@ -206,7 +206,7 @@ aarch64_addressspace(vaddr_t va)
return AARCH64_ADDRSPACE_UPPER;
}
- addrtop = (uint64_t)va & AARCH64_ADDRTOP_MSB;
+ addrtop = va & AARCH64_ADDRTOP_MSB;
if (addrtop == 0) {
/* lower address, and TBI0 disabled */
if ((va & AARCH64_ADDRESS_TAGPAC_MASK) != 0)
@@ -224,15 +224,15 @@ aarch64_untag_address(vaddr_t va)
{
uint64_t addrtop, tbi;
- addrtop = (uint64_t)va & AARCH64_ADDRTOP_TAG;
+ addrtop = va & AARCH64_ADDRTOP_TAG;
tbi = addrtop ? TCR_TBI1 : TCR_TBI0;
if (reg_tcr_el1_read() & tbi) {
if (addrtop == 0) {
/* lower address, and TBI0 enabled */
- return (uint64_t)va & ~AARCH64_ADDRESS_TAG_MASK;
+ return va & ~AARCH64_ADDRESS_TAG_MASK;
}
/* upper address, and TBI1 enabled */
- return (uint64_t)va | AARCH64_ADDRESS_TAG_MASK;
+ return va | AARCH64_ADDRESS_TAG_MASK;
}
/* TBI[01] is disabled, nothing to do */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Fri Dec 4 08:24:41 UTC 2020 Modified Files: src/sys/arch/aarch64/aarch64: pmapboot.c Log Message: Ensure translation table updates are visible to the hardware walker(s) in pmapboot_enter. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/aarch64/aarch64/pmapboot.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/pmapboot.c diff -u src/sys/arch/aarch64/aarch64/pmapboot.c:1.12 src/sys/arch/aarch64/aarch64/pmapboot.c:1.13 --- src/sys/arch/aarch64/aarch64/pmapboot.c:1.12 Tue Nov 10 07:51:19 2020 +++ src/sys/arch/aarch64/aarch64/pmapboot.c Fri Dec 4 08:24:41 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: pmapboot.c,v 1.12 2020/11/10 07:51:19 skrll Exp $ */ +/* $NetBSD: pmapboot.c,v 1.13 2020/12/04 08:24:41 skrll Exp $ */ /* * Copyright (c) 2018 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.12 2020/11/10 07:51:19 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.13 2020/12/04 08:24:41 skrll Exp $"); #include "opt_arm_debug.h" #include "opt_ddb.h" @@ -40,6 +40,8 @@ __KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v #include +#include + #include #include #include @@ -435,6 +437,8 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p } } + dsb(ish); + return nskip; }
CVS commit: src/sys/arch/aarch64/include
Module Name:src Committed By: skrll Date: Thu Nov 26 08:25:01 UTC 2020 Modified Files: src/sys/arch/aarch64/include: asan.h Log Message: Mark KASAN shadow pages as LX_BLKPAG_ATTR_NORMAL_WB. NFC as this is zero, but someone might change it one day. To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/include/asan.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/include/asan.h diff -u src/sys/arch/aarch64/include/asan.h:1.14 src/sys/arch/aarch64/include/asan.h:1.15 --- src/sys/arch/aarch64/include/asan.h:1.14 Tue Nov 10 07:51:19 2020 +++ src/sys/arch/aarch64/include/asan.h Thu Nov 26 08:25:01 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: asan.h,v 1.14 2020/11/10 07:51:19 skrll Exp $ */ +/* $NetBSD: asan.h,v 1.15 2020/11/26 08:25:01 skrll Exp $ */ /* * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net @@ -187,7 +187,7 @@ kasan_md_shadow_map_page(vaddr_t va) pa = __md_palloc(); atomic_swap_64(&l3[idx], pa | L3_PAGE | LX_BLKPAG_UXN | LX_BLKPAG_PXN | LX_BLKPAG_AF | LX_BLKPAG_SH_IS | - LX_BLKPAG_AP_RW); + LX_BLKPAG_AP_RW | LX_BLKPAG_ATTR_NORMAL_WB); aarch64_tlbi_by_va(va); } }
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: jmcneill
Date: Thu Nov 12 11:28:39 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: bus_space_asm_generic.S
Log Message:
Fix typo in comment
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S
diff -u src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S:1.4 src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S:1.5
--- src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S:1.4 Thu Sep 24 16:15:49 2020
+++ src/sys/arch/aarch64/aarch64/bus_space_asm_generic.S Thu Nov 12 11:28:39 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space_asm_generic.S,v 1.4 2020/09/24 16:15:49 ryo Exp $ */
+/* $NetBSD: bus_space_asm_generic.S,v 1.5 2020/11/12 11:28:39 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -29,7 +29,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: bus_space_asm_generic.S,v 1.4 2020/09/24 16:15:49 ryo Exp $")
+RCSID("$NetBSD: bus_space_asm_generic.S,v 1.5 2020/11/12 11:28:39 jmcneill Exp $")
.macro generate_bsfunc funcname, dsbop
/* uint8_t {funcname}_bs_r_1(x0:tag, x1:addr, x2:offset) */
@@ -83,7 +83,7 @@ ENTRY_NP(\funcname\()_bs_r_2_swap)
END(\funcname\()_bs_r_2_swap)
-/* uint32_t {funcname}_bs_r_4_swap(x0:tag, x2:addr, x3:offset) */
+/* uint32_t {funcname}_bs_r_4_swap(x0:tag, x1:addr, x2:offset) */
ENTRY_NP(\funcname\()_bs_r_4_swap)
\dsbop
ldr w8, [x0, #BS_STRIDE]
CVS commit: src/sys/arch/aarch64
Module Name:src
Committed By: skrll
Date: Tue Nov 10 07:51:19 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: aarch64_machdep.c genassym.cf pmap.c
pmap_page.S pmapboot.c
src/sys/arch/aarch64/include: asan.h vmparam.h
Log Message:
AA64 is not MIPS.
Change all KSEG references to directmap
To generate a diff of this commit:
cvs rdiff -u -r1.53 -r1.54 src/sys/arch/aarch64/aarch64/aarch64_machdep.c
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/aarch64/aarch64/genassym.cf
cvs rdiff -u -r1.95 -r1.96 src/sys/arch/aarch64/aarch64/pmap.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/aarch64/aarch64/pmap_page.S
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/aarch64/aarch64/pmapboot.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/aarch64/include/asan.h
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/aarch64/include/vmparam.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c
diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.53 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.54
--- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.53 Thu Oct 22 07:31:15 2020
+++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Tue Nov 10 07:51:19 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64_machdep.c,v 1.53 2020/10/22 07:31:15 skrll Exp $ */
+/* $NetBSD: aarch64_machdep.c,v 1.54 2020/11/10 07:51:19 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.53 2020/10/22 07:31:15 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.54 2020/11/10 07:51:19 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -150,8 +150,8 @@ cpu_kernel_vm_init(uint64_t memory_start
vaddr_t data_start = (vaddr_t)__data_start;
vaddr_t rodata_start = (vaddr_t)__rodata_start;
- /* add KSEG mappings of whole memory */
- const pt_entry_t ksegattr =
+ /* add direct mappings of whole memory */
+ const pt_entry_t dmattr =
LX_BLKPAG_ATTR_NORMAL_WB |
LX_BLKPAG_AP_RW |
LX_BLKPAG_PXN |
@@ -164,7 +164,7 @@ cpu_kernel_vm_init(uint64_t memory_start
(uint64_t)bootconfig.dram[blk].pages * PAGE_SIZE);
pmapboot_enter_range(AARCH64_PA_TO_KVA(start), start,
- end - start, ksegattr, printf);
+ end - start, dmattr, printf);
}
aarch64_dcache_wbinv_all();
@@ -216,7 +216,7 @@ cpu_kernel_vm_init(uint64_t memory_start
*
* 0x_bfff__ End of direct mapped
* 0x___ Start of direct mapped
- * = AARCH64_KSEG_START
+ * = AARCH64_DIRECTMAP_START
*
* Hole: 0xfffe___
* 0x0001___
@@ -605,9 +605,9 @@ mm_md_kernacc(void *ptr, vm_prot_t prot,
*handled = true;
if ((v < data_start) && (prot & VM_PROT_WRITE))
return EFAULT;
- } else if (IN_RANGE(v, AARCH64_KSEG_START, AARCH64_KSEG_END)) {
+ } else if (IN_RANGE(v, AARCH64_DIRECTMAP_START, AARCH64_DIRECTMAP_END)) {
/*
- * if defined PMAP_MAP_POOLPAGE, direct mapped address (KSEG)
+ * if defined PMAP_MAP_POOLPAGE, direct mapped address
* will be appeared as kvm(3) address.
*/
paddr_t pa = AARCH64_KVA_TO_PA(v);
Index: src/sys/arch/aarch64/aarch64/genassym.cf
diff -u src/sys/arch/aarch64/aarch64/genassym.cf:1.31 src/sys/arch/aarch64/aarch64/genassym.cf:1.32
--- src/sys/arch/aarch64/aarch64/genassym.cf:1.31 Tue Sep 15 09:28:20 2020
+++ src/sys/arch/aarch64/aarch64/genassym.cf Tue Nov 10 07:51:19 2020
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.31 2020/09/15 09:28:20 ryo Exp $
+# $NetBSD: genassym.cf,v 1.32 2020/11/10 07:51:19 skrll Exp $
#-
# Copyright (c) 2014 The NetBSD Foundation, Inc.
# All rights reserved.
@@ -70,8 +70,8 @@ define VM_MIN_KERNEL_ADDRESS VM_MIN_KERN
define VM_MAX_KERNEL_ADDRESS VM_MAX_KERNEL_ADDRESS
define VM_KERNEL_IO_ADDRESS VM_KERNEL_IO_ADDRESS
define VM_KERNEL_IO_SIZE VM_KERNEL_IO_SIZE
-define AARCH64_KSEG_START AARCH64_KSEG_START
-define AARCH64_KSEG_MASK AARCH64_KSEG_MASK
+define AARCH64_DIRECTMAP_START AARCH64_DIRECTMAP_START
+define AARCH64_DIRECTMAP_MASK AARCH64_DIRECTMAP_MASK
define UPAGES UPAGES
define USPACE (UPAGES * PAGE_SIZE)
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.95 src/sys/arch/aarch64/aarch64/pmap.c:1.96
--- src/sys/arch/aarch64/aarch64/pmap.c:1.95 Sat Nov 7 08:33:50 2020
+++ src/sys/arch/aarch64/aarch64/pmap.c Tue Nov 10 07:51:19 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.95 2020/11/07 08:33:50 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.96 2020/11/10 07:51:19 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.95 2020/11/07 08:33:50 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.96 2020/11/10 07:51:19 skrll Exp $")
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sat Nov 7 08:48:11 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: pmapboot.c
Log Message:
Fix the use of the contiguous bit by checking the output address as well.
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/aarch64/aarch64/pmapboot.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmapboot.c
diff -u src/sys/arch/aarch64/aarch64/pmapboot.c:1.10 src/sys/arch/aarch64/aarch64/pmapboot.c:1.11
--- src/sys/arch/aarch64/aarch64/pmapboot.c:1.10 Fri Jul 17 07:21:44 2020
+++ src/sys/arch/aarch64/aarch64/pmapboot.c Sat Nov 7 08:48:11 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmapboot.c,v 1.10 2020/07/17 07:21:44 ryo Exp $ */
+/* $NetBSD: pmapboot.c,v 1.11 2020/11/07 08:48:11 skrll Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.10 2020/07/17 07:21:44 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.11 2020/11/07 08:48:11 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -46,7 +46,6 @@ __KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v
#include
#include
-
#define OPTIMIZE_TLB_CONTIG
static void
@@ -180,16 +179,23 @@ pmapboot_pte_print(pt_entry_t pte, int l
#ifdef OPTIMIZE_TLB_CONTIG
static inline bool
-tlb_contiguous_p(vaddr_t addr, vaddr_t start, vaddr_t end, vsize_t blocksize)
+tlb_contiguous_p(vaddr_t va, paddr_t pa, vaddr_t start, vaddr_t end,
+vsize_t blocksize)
{
/*
* when using 4KB granule, 16 adjacent and aligned entries can be
* unified to one TLB cache entry.
* in other size of granule, not supported.
*/
- if (((addr & ~((blocksize << 4) - 1)) >= start) &&
- ((addr | ((blocksize << 4) - 1)) <= end))
+ const vaddr_t mask = (blocksize << 4) - 1;
+
+ /* if the output address doesn't align it can't be contiguous */
+ if ((va & mask) != (pa & mask))
+ return false;
+
+ if ((va & ~mask) >= start && (va | mask) <= end)
return true;
+
return false;
}
#endif /* OPTIMIZE_TLB_CONTIG */
@@ -288,7 +294,7 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
#endif
attr;
#ifdef OPTIMIZE_TLB_CONTIG
- if (tlb_contiguous_p(va, va_start, va_end, blocksize))
+ if (tlb_contiguous_p(va, pa, va_start, va_end, blocksize))
pte |= LX_BLKPAG_CONTIG;
ll = l1;
llidx = idx1;
@@ -333,7 +339,7 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
#endif
attr;
#ifdef OPTIMIZE_TLB_CONTIG
- if (tlb_contiguous_p(va, va_start, va_end, blocksize))
+ if (tlb_contiguous_p(va, pa, va_start, va_end, blocksize))
pte |= LX_BLKPAG_CONTIG;
ll = l2;
llidx = idx2;
@@ -377,7 +383,7 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
#endif
attr;
#ifdef OPTIMIZE_TLB_CONTIG
- if (tlb_contiguous_p(va, va_start, va_end, blocksize))
+ if (tlb_contiguous_p(va, pa, va_start, va_end, blocksize))
pte |= LX_BLKPAG_CONTIG;
ll = l3;
llidx = idx3;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sat Nov 7 08:33:50 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
In pmap_devmap_bootstrap only set pmap_devmap_bootstrap_done if there
is an entry and ALL of the entries have been done. The entry required
for EARLYCONS might not be the first/only one...
To generate a diff of this commit:
cvs rdiff -u -r1.94 -r1.95 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.94 src/sys/arch/aarch64/aarch64/pmap.c:1.95
--- src/sys/arch/aarch64/aarch64/pmap.c:1.94 Sun Nov 1 10:58:59 2020
+++ src/sys/arch/aarch64/aarch64/pmap.c Sat Nov 7 08:33:50 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.94 2020/11/01 10:58:59 jmcneill Exp $ */
+/* $NetBSD: pmap.c,v 1.95 2020/11/07 08:33:50 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.94 2020/11/01 10:58:59 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.95 2020/11/07 08:33:50 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -348,6 +348,7 @@ pmap_devmap_register(const struct pmap_d
void
pmap_devmap_bootstrap(vaddr_t l0pt, const struct pmap_devmap *table)
{
+ bool done = false;
vaddr_t va;
int i;
@@ -375,8 +376,10 @@ pmap_devmap_bootstrap(vaddr_t l0pt, cons
table[i].pd_size,
table[i].pd_prot,
table[i].pd_flags);
- pmap_devmap_bootstrap_done = true;
+ done = true;
}
+ if (done)
+ pmap_devmap_bootstrap_done = true;
}
const struct pmap_devmap *
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: jmcneill Date: Sun Nov 1 10:58:59 UTC 2020 Modified Files: src/sys/arch/aarch64/aarch64: pmap.c Log Message: No need to disable translation table walks in pmap_activate(). To generate a diff of this commit: cvs rdiff -u -r1.93 -r1.94 src/sys/arch/aarch64/aarch64/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/pmap.c diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.93 src/sys/arch/aarch64/aarch64/pmap.c:1.94 --- src/sys/arch/aarch64/aarch64/pmap.c:1.93 Thu Oct 22 07:34:18 2020 +++ src/sys/arch/aarch64/aarch64/pmap.c Sun Nov 1 10:58:59 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.93 2020/10/22 07:34:18 skrll Exp $ */ +/* $NetBSD: pmap.c,v 1.94 2020/11/01 10:58:59 jmcneill Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.93 2020/10/22 07:34:18 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.94 2020/11/01 10:58:59 jmcneill Exp $"); #include "opt_arm_debug.h" #include "opt_ddb.h" @@ -1439,11 +1439,6 @@ pmap_activate(struct lwp *l) UVMHIST_LOG(pmaphist, "lwp=%p (pid=%d)", l, l->l_proc->p_pid, 0, 0); - /* Disable translation table walks using TTBR0 */ - tcr = reg_tcr_el1_read(); - reg_tcr_el1_write(tcr | TCR_EPD0); - isb(); - /* XXX: allocate asid, and regenerate if needed */ if (pm->pm_asid == -1) pm->pm_asid = l->l_proc->p_pid;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Thu Oct 22 07:36:02 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S
Log Message:
Use the correct (more relaxed) membar_exit barrier in cpu_switchto_softint
To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/aarch64/aarch64/cpuswitch.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.30 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.31
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.30 Tue Oct 13 21:24:22 2020
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Thu Oct 22 07:36:02 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.30 2020/10/13 21:24:22 skrll Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.31 2020/10/22 07:36:02 skrll Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.30 2020/10/13 21:24:22 skrll Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.31 2020/10/22 07:36:02 skrll Exp $")
ARMV8_DEFINE_OPTIONS
@@ -219,7 +219,7 @@ ENTRY_NP(cpu_switchto_softint)
msr tpidr_el1, x19 /* curlwp = pinned_lwp */
ldr x3, [x19, #L_CPU] /* x3 = curlwp->l_cpu */
str x19, [x3, #CI_CURLWP] /* curlwp->l_cpu->ci_curlwp := x19 */
- dmb st /* see comments in kern_mutex.c */
+ dmb ishst /* see comments in kern_mutex.c */
mov sp, x4 /* restore pinned_lwp sp */
msr cpacr_el1, x5 /* restore pinned_lwp cpacr */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Thu Oct 22 07:34:18 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: pmap.c
Log Message:
Use the isb macro - missed in previous commit
To generate a diff of this commit:
cvs rdiff -u -r1.92 -r1.93 src/sys/arch/aarch64/aarch64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.92 src/sys/arch/aarch64/aarch64/pmap.c:1.93
--- src/sys/arch/aarch64/aarch64/pmap.c:1.92 Thu Oct 22 07:31:15 2020
+++ src/sys/arch/aarch64/aarch64/pmap.c Thu Oct 22 07:34:18 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.92 2020/10/22 07:31:15 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.93 2020/10/22 07:34:18 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.92 2020/10/22 07:31:15 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.93 2020/10/22 07:34:18 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -1478,7 +1478,7 @@ pmap_deactivate(struct lwp *l)
/* Disable translation table walks using TTBR0 */
tcr = reg_tcr_el1_read();
reg_tcr_el1_write(tcr | TCR_EPD0);
- __asm __volatile("isb" ::: "memory");
+ isb();
/* XXX */
pm->pm_activated = false;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Thu Oct 22 07:31:15 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: aarch64_machdep.c cpufunc.c db_machdep.c
efi_machdep.c fpu.c pmap.c trap.c
Log Message:
Use the dmb/dsb/isb macros... if nothing else they're all now consistent
about the "memory" assembler contraint.
No binary change
To generate a diff of this commit:
cvs rdiff -u -r1.52 -r1.53 src/sys/arch/aarch64/aarch64/aarch64_machdep.c
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/aarch64/aarch64/cpufunc.c
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/aarch64/aarch64/db_machdep.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/aarch64/aarch64/efi_machdep.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/aarch64/aarch64/fpu.c
cvs rdiff -u -r1.91 -r1.92 src/sys/arch/aarch64/aarch64/pmap.c
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/aarch64/aarch64/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c
diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.52 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.53
--- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.52 Thu Oct 22 07:23:24 2020
+++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Thu Oct 22 07:31:15 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64_machdep.c,v 1.52 2020/10/22 07:23:24 skrll Exp $ */
+/* $NetBSD: aarch64_machdep.c,v 1.53 2020/10/22 07:31:15 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.52 2020/10/22 07:23:24 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.53 2020/10/22 07:31:15 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -171,7 +171,7 @@ cpu_kernel_vm_init(uint64_t memory_start
/* Disable translation table walks using TTBR0 */
uint64_t tcr = reg_tcr_el1_read();
reg_tcr_el1_write(tcr | TCR_EPD0);
- __asm __volatile("isb" ::: "memory");
+ isb();
aarch64_tlbi_all();
Index: src/sys/arch/aarch64/aarch64/cpufunc.c
diff -u src/sys/arch/aarch64/aarch64/cpufunc.c:1.25 src/sys/arch/aarch64/aarch64/cpufunc.c:1.26
--- src/sys/arch/aarch64/aarch64/cpufunc.c:1.25 Thu Oct 22 07:23:24 2020
+++ src/sys/arch/aarch64/aarch64/cpufunc.c Thu Oct 22 07:31:15 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.25 2020/10/22 07:23:24 skrll Exp $ */
+/* $NetBSD: cpufunc.c,v 1.26 2020/10/22 07:31:15 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -30,7 +30,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.25 2020/10/22 07:23:24 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.26 2020/10/22 07:31:15 skrll Exp $");
#include
#include
@@ -69,7 +69,7 @@ extract_cacheunit(int level, bool insn,
/* select and extract level N data cache */
reg_csselr_el1_write(__SHIFTIN(level, CSSELR_LEVEL) |
__SHIFTIN(insn ? 1 : 0, CSSELR_IND));
- __asm __volatile ("isb");
+ isb();
ccsidr = reg_ccsidr_el1_read();
mmfr2 = reg_id_aa64mmfr2_el1_read();
@@ -391,10 +391,10 @@ aarch64_dcache_wbinv_all(void)
if (cinfo[level].cacheable == CACHE_CACHEABLE_NONE)
break;
- __asm __volatile ("dsb ish");
+ dsb(ish);
ln_dcache_wbinv_all(level, &cinfo[level].dcache);
}
- __asm __volatile ("dsb ish");
+ dsb(ish);
}
void
@@ -409,10 +409,10 @@ aarch64_dcache_inv_all(void)
if (cinfo[level].cacheable == CACHE_CACHEABLE_NONE)
break;
- __asm __volatile ("dsb ish");
+ dsb(ish);
ln_dcache_inv_all(level, &cinfo[level].dcache);
}
- __asm __volatile ("dsb ish");
+ dsb(ish);
}
void
@@ -427,10 +427,10 @@ aarch64_dcache_wb_all(void)
if (cinfo[level].cacheable == CACHE_CACHEABLE_NONE)
break;
- __asm __volatile ("dsb ish");
+ dsb(ish);
ln_dcache_wb_all(level, &cinfo[level].dcache);
}
- __asm __volatile ("dsb ish");
+ dsb(ish);
}
int
Index: src/sys/arch/aarch64/aarch64/db_machdep.c
diff -u src/sys/arch/aarch64/aarch64/db_machdep.c:1.27 src/sys/arch/aarch64/aarch64/db_machdep.c:1.28
--- src/sys/arch/aarch64/aarch64/db_machdep.c:1.27 Thu Oct 22 07:23:24 2020
+++ src/sys/arch/aarch64/aarch64/db_machdep.c Thu Oct 22 07:31:15 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.27 2020/10/22 07:23:24 skrll Exp $ */
+/* $NetBSD: db_machdep.c,v 1.28 2020/10/22 07:31:15 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.27 2020/10/22 07:23:24 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.28 2020/10/22 07:31:15 skrll Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -444,13 +444,13 @@ db_md_pte_cmd(db_expr_t addr, bool have_
}
reg_s1e0r_write(addr);
- __asm __volatile ("isb");
+ isb();
par = reg_par_el1_read();
db_printf("Stage1 EL0 translation %016llx -> PAR_EL1 = ", addr);
db_par_print(par, addr);
reg_s1e1r_write(addr);
-
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Thu Oct 22 07:16:06 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: locore.S
Log Message:
Don't trap EL0 accesses to the DCC registers.
VMWare use "mrs xzr, mdccsr_el0" for guest side backdoor.
To generate a diff of this commit:
cvs rdiff -u -r1.73 -r1.74 src/sys/arch/aarch64/aarch64/locore.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.73 src/sys/arch/aarch64/aarch64/locore.S:1.74
--- src/sys/arch/aarch64/aarch64/locore.S:1.73 Tue Sep 15 09:28:20 2020
+++ src/sys/arch/aarch64/aarch64/locore.S Thu Oct 22 07:16:06 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.73 2020/09/15 09:28:20 ryo Exp $ */
+/* $NetBSD: locore.S,v 1.74 2020/10/22 07:16:06 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -38,7 +38,7 @@
#include
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.73 2020/09/15 09:28:20 ryo Exp $")
+RCSID("$NetBSD: locore.S,v 1.74 2020/10/22 07:16:06 ryo Exp $")
#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -241,9 +241,8 @@ ASEND(clear_bss)
init_sysregs:
stp x0, lr, [sp, #-16]!
- /* init debug event */
- ldr x0, mdscr_setting
- msr mdscr_el1, x0
+ /* init debug registers */
+ msr mdscr_el1, xzr
msr oslar_el1, xzr
/* Clear context id register */
@@ -1041,11 +1040,6 @@ sctlr_pac:
SCTLR_EnDB |/* PACDB (APDBKey_EL1) instruction enable */ \
0)
-mdscr_setting:
- .quad ( \
- MDSCR_TDCC |/* Trap Debug Communications Channel access */ \
- 0)
-
.L_devmap_addr:
.quad VM_KERNEL_IO_ADDRESS
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: rin
Date: Thu Oct 15 23:15:36 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: trap.c
Log Message:
Byte-swapping instructions for arm and thumb on aarch64eb;
instructions are stored in little-endian byte-order for BE8,
an only valid binary format for ILP32BE executables.
XXX
Apply similar fixes to armv7{,hf}eb.
To generate a diff of this commit:
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/aarch64/aarch64/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/trap.c
diff -u src/sys/arch/aarch64/aarch64/trap.c:1.37 src/sys/arch/aarch64/aarch64/trap.c:1.38
--- src/sys/arch/aarch64/aarch64/trap.c:1.37 Mon Sep 14 10:53:02 2020
+++ src/sys/arch/aarch64/aarch64/trap.c Thu Oct 15 23:15:36 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.37 2020/09/14 10:53:02 ryo Exp $ */
+/* $NetBSD: trap.c,v 1.38 2020/10/15 23:15:36 rin Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.37 2020/09/14 10:53:02 ryo Exp $");
+__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.38 2020/10/15 23:15:36 rin Exp $");
#include "opt_arm_intr_impl.h"
#include "opt_compat_netbsd32.h"
@@ -532,6 +532,12 @@ int
fetch_arm_insn(uint64_t pc, uint64_t spsr, uint32_t *insn)
{
+ /*
+ * Instructions are stored in little endian for BE8,
+ * only a valid binary format for ILP32EB. Therefore,
+ * we need byte-swapping before decoding on aarch64eb.
+ */
+
/* THUMB? */
if (spsr & SPSR_A32_T) {
uint16_t *p = (uint16_t *)(pc & ~1UL); /* XXX */
@@ -539,6 +545,7 @@ fetch_arm_insn(uint64_t pc, uint64_t sps
if (ufetch_16(p, &hi))
return -1;
+ LE16TOH(hi);
if (!THUMB_32BIT(hi)) {
/* 16-bit Thumb instruction */
@@ -549,6 +556,7 @@ fetch_arm_insn(uint64_t pc, uint64_t sps
/* 32-bit Thumb instruction */
if (ufetch_16(p + 1, &lo))
return -1;
+ LE16TOH(lo);
*insn = ((uint32_t)hi << 16) | lo;
return 4;
@@ -556,6 +564,7 @@ fetch_arm_insn(uint64_t pc, uint64_t sps
if (ufetch_32((uint32_t *)pc, insn))
return -1;
+ LE32TOH(*insn);
return 4;
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: rin Date: Thu Oct 15 23:10:06 UTC 2020 Modified Files: src/sys/arch/aarch64/aarch64: netbsd32_machdep.c Log Message: Call netbsd32_adjust_limits() in netbsd32_setregs() for sure, as done for amd64 and sparc64. To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/aarch64/aarch64/netbsd32_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/netbsd32_machdep.c diff -u src/sys/arch/aarch64/aarch64/netbsd32_machdep.c:1.15 src/sys/arch/aarch64/aarch64/netbsd32_machdep.c:1.16 --- src/sys/arch/aarch64/aarch64/netbsd32_machdep.c:1.15 Thu Oct 15 22:41:02 2020 +++ src/sys/arch/aarch64/aarch64/netbsd32_machdep.c Thu Oct 15 23:10:06 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: netbsd32_machdep.c,v 1.15 2020/10/15 22:41:02 rin Exp $ */ +/* $NetBSD: netbsd32_machdep.c,v 1.16 2020/10/15 23:10:06 rin Exp $ */ /* * Copyright (c) 2018 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.15 2020/10/15 22:41:02 rin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.16 2020/10/15 23:10:06 rin Exp $"); #if defined(_KERNEL_OPT) #include "opt_compat_netbsd.h" @@ -64,6 +64,8 @@ netbsd32_setregs(struct lwp *l, struct e struct proc * const p = l->l_proc; struct trapframe * const tf = l->l_md.md_utf; + netbsd32_adjust_limits(p); + aarch64_setregs_ptrauth(l, false); p->p_flag |= PK_32;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: rin
Date: Thu Oct 15 22:52:08 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: vm_machdep.c
Log Message:
Fix clone(2) for COMPAT_NETBSD32.
(1) Set r13 (sp for arm32 processes) appropriately when stack is
specified to fork1().
(2) For arm32 processes, align stack to 8-byte boundary, instead of
16-byte for native aarch64 processes, to match our 32-bit ABI:
https://nxr.netbsd.org/xref/src/sys/arch/arm/arm32/vm_machdep.c#150
Note that sp alignment checking is disabled in aarch32 mode, and
this works fine with AARCH64_EL0_STACK_ALIGNMENT_CHECK option.
OK ryo
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/vm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/vm_machdep.c
diff -u src/sys/arch/aarch64/aarch64/vm_machdep.c:1.8 src/sys/arch/aarch64/aarch64/vm_machdep.c:1.9
--- src/sys/arch/aarch64/aarch64/vm_machdep.c:1.8 Sat May 23 18:08:59 2020
+++ src/sys/arch/aarch64/aarch64/vm_machdep.c Thu Oct 15 22:52:08 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: vm_machdep.c,v 1.8 2020/05/23 18:08:59 ryo Exp $ */
+/* $NetBSD: vm_machdep.c,v 1.9 2020/10/15 22:52:08 rin Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -29,10 +29,11 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "opt_compat_netbsd32.h"
#include "opt_ddb.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.8 2020/05/23 18:08:59 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.9 2020/10/15 22:52:08 rin Exp $");
#include
#include
@@ -143,11 +144,19 @@ cpu_lwp_fork(struct lwp *l1, struct lwp
*utf = *l1->l_md.md_utf;
/*
- * If specified, give the child a different stack
- * (make sure it's 16-byte aligned).
+ * If specified, give the child a different stack (make sure it's
+ * 16- or 8-byte aligned for 64- or 32-bit processes, respectively).
*/
- if (stack != NULL)
- utf->tf_sp = ((vaddr_t)(stack) + stacksize) & -16;
+ if (stack != NULL) {
+ utf->tf_sp = (vaddr_t)(stack) + stacksize;
+#ifdef COMPAT_NETBSD32
+ if (__predict_false(l2->l_proc->p_flag & PK_32)) {
+ utf->tf_sp &= -8;
+ utf->tf_reg[13] = utf->tf_sp;
+ } else
+#endif
+ utf->tf_sp &= -16;
+ }
/* build a new switchframe */
struct trapframe * const ktf = utf - 1;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: rin Date: Thu Oct 15 22:41:02 UTC 2020 Modified Files: src/sys/arch/aarch64/aarch64: netbsd32_machdep.c Log Message: For rev 1.14 and before, netbsd32_process_write_regs() returns EINVAL if non-modifiable bits are set in CPSR. Instead, mask out non-modifiable bits and make this function success regardless of value in CPSR. New behavior matches that of arm: https://nxr.netbsd.org/xref/src/sys/arch/arm/arm/process_machdep.c#187 This fixes lib/libc/sys/t_ptrace_wait*:access_regs6 tests, in which register contents retrieved by PT_GETREGS are set back by PT_SETREGS. No new regression is observed in full ATF run. OK ryo To generate a diff of this commit: cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/aarch64/netbsd32_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/netbsd32_machdep.c diff -u src/sys/arch/aarch64/aarch64/netbsd32_machdep.c:1.14 src/sys/arch/aarch64/aarch64/netbsd32_machdep.c:1.15 --- src/sys/arch/aarch64/aarch64/netbsd32_machdep.c:1.14 Thu Jul 2 13:04:46 2020 +++ src/sys/arch/aarch64/aarch64/netbsd32_machdep.c Thu Oct 15 22:41:02 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: netbsd32_machdep.c,v 1.14 2020/07/02 13:04:46 rin Exp $ */ +/* $NetBSD: netbsd32_machdep.c,v 1.15 2020/10/15 22:41:02 rin Exp $ */ /* * Copyright (c) 2018 Ryo Shimizu @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.14 2020/07/02 13:04:46 rin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.15 2020/10/15 22:41:02 rin Exp $"); #if defined(_KERNEL_OPT) #include "opt_compat_netbsd.h" @@ -198,8 +198,7 @@ netbsd32_process_write_regs(struct lwp * if ((p->p_flag & PK_32) == 0) return EINVAL; - if ((regs->r_cpsr & ~(SPSR_NZCV | SPSR_A32_T)) != 0 || - regs->r_pc >= VM_MAXUSER_ADDRESS32 || + if (regs->r_pc >= VM_MAXUSER_ADDRESS32 || regs->r_sp >= VM_MAXUSER_ADDRESS32) return EINVAL; @@ -209,7 +208,7 @@ netbsd32_process_write_regs(struct lwp * tf->tf_reg[14] = regs->r_lr; /* r14 = lr */ tf->tf_pc = regs->r_pc; /* r15 = pc */ tf->tf_spsr &= ~(SPSR_NZCV | SPSR_A32_T); - tf->tf_spsr |= regs->r_cpsr; + tf->tf_spsr |= regs->r_cpsr & (SPSR_NZCV | SPSR_A32_T); /* THUMB CODE? */ if (regs->r_pc & 1)
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: rin
Date: Thu Oct 15 22:30:34 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: fault.c
Log Message:
For cpu_jump_onfault() in data_abort_handler(), stop returning
hard-coded EFAULT and use return value from uvm_fault() instead.
There are some paths that do not call uvm_fault():
(1) For fatalabort case, use EFAULT as before.
(2) When va range is invalid, use EFAULT instead of EINVAL.
These change fixes bytes_transfer_eof_* tests in
sys/lib/libc/sys/t_ptrace_wait*.
Note that without (2) above, some tests like
sys/lib/libc/sys/t_wait:write_error become newly failing.
I've confirmed that there's no new regression in full ATF run.
OK ryo
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/aarch64/aarch64/fault.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/fault.c
diff -u src/sys/arch/aarch64/aarch64/fault.c:1.19 src/sys/arch/aarch64/aarch64/fault.c:1.20
--- src/sys/arch/aarch64/aarch64/fault.c:1.19 Sun Aug 9 07:26:20 2020
+++ src/sys/arch/aarch64/aarch64/fault.c Thu Oct 15 22:30:34 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: fault.c,v 1.19 2020/08/09 07:26:20 skrll Exp $ */
+/* $NetBSD: fault.c,v 1.20 2020/10/15 22:30:34 rin Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.19 2020/08/09 07:26:20 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.20 2020/10/15 22:30:34 rin Exp $");
#include "opt_compat_netbsd32.h"
#include "opt_ddb.h"
@@ -134,7 +134,7 @@ data_abort_handler(struct trapframe *tf,
vaddr_t va;
uint32_t esr, fsc, rw;
vm_prot_t ftype;
- int error = 0, len;
+ int error = EFAULT, len;
const bool user = IS_SPSR_USER(tf->tf_spsr) ? true : false;
bool is_pan_trap = false;
@@ -169,10 +169,8 @@ data_abort_handler(struct trapframe *tf,
map = &p->p_vmspace->vm_map;
UVMHIST_LOG(pmaphist, "use user vm_map %p (kernel_map=%p)",
map, kernel_map, 0, 0);
- } else {
- error = EINVAL;
+ } else
goto do_fault;
- }
if ((eclass == ESR_EC_INSN_ABT_EL0) || (eclass == ESR_EC_INSN_ABT_EL1))
ftype = VM_PROT_EXECUTE;
@@ -223,7 +221,7 @@ data_abort_handler(struct trapframe *tf,
if (curcpu()->ci_intr_depth == 0) {
fb = cpu_disable_onfault();
if (fb != NULL) {
- cpu_jump_onfault(tf, fb, EFAULT);
+ cpu_jump_onfault(tf, fb, error);
return;
}
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: jmcneill
Date: Thu Oct 15 21:14:15 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: bus_space.c
Log Message:
Reduce scope of memory barriers use in bus_space_barrier() implementation.
Instead of always "dsb sy", use "dsb ishld" for reads, "dsb ishst" for
writes, and "dsh ish" for reads and writes.
Ok skrll@
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/aarch64/aarch64/bus_space.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/bus_space.c
diff -u src/sys/arch/aarch64/aarch64/bus_space.c:1.10 src/sys/arch/aarch64/aarch64/bus_space.c:1.11
--- src/sys/arch/aarch64/aarch64/bus_space.c:1.10 Sat Sep 5 16:44:54 2020
+++ src/sys/arch/aarch64/aarch64/bus_space.c Thu Oct 15 21:14:15 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.10 2020/09/05 16:44:54 jakllsch Exp $ */
+/* $NetBSD: bus_space.c,v 1.11 2020/10/15 21:14:15 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.10 2020/09/05 16:44:54 jakllsch Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.11 2020/10/15 21:14:15 jmcneill Exp $");
#include
#include
@@ -38,6 +38,7 @@ __KERNEL_RCSID(1, "$NetBSD: bus_space.c,
#include
#include
+#include
/* Prototypes for all the bus_space structure functions */
bs_protos(generic)
@@ -612,8 +613,17 @@ generic_bs_barrier(void *t, bus_space_ha
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
- if (flags != 0)
- __asm __volatile ("dmb sy" ::: "memory");
+ switch (flags) {
+ case BUS_SPACE_BARRIER_READ:
+ dmb(ishld);
+ break;
+ case BUS_SPACE_BARRIER_WRITE:
+ dmb(ishst);
+ break;
+ case BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE:
+ dmb(ish);
+ break;
+ }
}
void *
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: ryo
Date: Thu Oct 15 08:37:20 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: vectors.S
Log Message:
slightly optimized loop for trap_doast() calls
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/aarch64/aarch64/vectors.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/vectors.S
diff -u src/sys/arch/aarch64/aarch64/vectors.S:1.20 src/sys/arch/aarch64/aarch64/vectors.S:1.21
--- src/sys/arch/aarch64/aarch64/vectors.S:1.20 Tue Oct 6 06:26:46 2020
+++ src/sys/arch/aarch64/aarch64/vectors.S Thu Oct 15 08:37:20 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: vectors.S,v 1.20 2020/10/06 06:26:46 skrll Exp $ */
+/* $NetBSD: vectors.S,v 1.21 2020/10/15 08:37:20 ryo Exp $ */
#include
#include
@@ -10,7 +10,7 @@
#include "opt_ddb.h"
#include "opt_dtrace.h"
-RCSID("$NetBSD: vectors.S,v 1.20 2020/10/06 06:26:46 skrll Exp $")
+RCSID("$NetBSD: vectors.S,v 1.21 2020/10/15 08:37:20 ryo Exp $")
ARMV8_DEFINE_OPTIONS
@@ -255,26 +255,26 @@ ENTRY_NP(el0_trap)
nop/* dummy for DDB backtrace (for lr-4) */
#endif
ENTRY_NP(el0_trap_exit)
- DISABLE_INTERRUPT /* make sure I|F marked */
+
+ adr lr, 1f /* return address from trap_doast */
1:
/* while (curlwp->l_md.md_astpending != 0) { */
- mrs x8, tpidr_el1
- ldr w9, [x8, #L_MD_ASTPENDING]
- cbz w9, 9f
+ DISABLE_INTERRUPT /* make sure I|F marked */
+ mrs x9, tpidr_el1
+ ldr w8, [x9, #L_MD_ASTPENDING]
+ cbz w8, 9f
/* curlwp->l_md.md_astpending = 0; */
- str xzr, [x8, #L_MD_ASTPENDING]
+ str xzr, [x9, #L_MD_ASTPENDING]
/* trap_doast(tf); */
ENABLE_INTERRUPT
mov x0, sp
- bl _C_LABEL(trap_doast)
- DISABLE_INTERRUPT
- b 1b
+ b _C_LABEL(trap_doast) /* tail call (return to 1b) */
/* } */
9:
- mrs x9, tpidr_el1
+ /* x9 is tpidr_el1 */
ldr x23, [x9, #L_MD_CPACR]
msr cpacr_el1, x23 /* FP unit EL0 handover */
isb/* necessary? */
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Tue Oct 13 21:27:18 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: lock_stubs.S
Log Message:
Use load-acquire exclusive and store-release exclusive (and remove the
barrier instructions) as suggested by riastradh a little while ago.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/aarch64/aarch64/lock_stubs.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/lock_stubs.S
diff -u src/sys/arch/aarch64/aarch64/lock_stubs.S:1.2 src/sys/arch/aarch64/aarch64/lock_stubs.S:1.3
--- src/sys/arch/aarch64/aarch64/lock_stubs.S:1.2 Thu Aug 13 07:14:04 2020
+++ src/sys/arch/aarch64/aarch64/lock_stubs.S Tue Oct 13 21:27:18 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: lock_stubs.S,v 1.2 2020/08/13 07:14:04 skrll Exp $ */
+/* $NetBSD: lock_stubs.S,v 1.3 2020/10/13 21:27:18 skrll Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
#include "assym.h"
-RCSID("$NetBSD: lock_stubs.S,v 1.2 2020/08/13 07:14:04 skrll Exp $")
+RCSID("$NetBSD: lock_stubs.S,v 1.3 2020/10/13 21:27:18 skrll Exp $")
#ifndef LOCKDEBUG
/*
@@ -45,11 +45,10 @@ RCSID("$NetBSD: lock_stubs.S,v 1.2 2020/
ENTRY(mutex_enter)
mrs x1, tpidr_el1 /* x1 = curlwp */
1:
- ldxr x2, [x0] /* load old value */
+ ldaxr x2, [x0] /* load old value */
cbnz x2, 3f /* equals zero? */
stxr w3, x1, [x0] /* store curlwp as new value */
cbnz w3, 2f /* succeed? nope, try again. */
- dmb sy /* membar_enter() */
ret
2:
b 1b
@@ -64,13 +63,12 @@ END(mutex_enter)
* so just use ldxr+stxr to achieve the same.
*/
ENTRY(mutex_exit)
- dmb sy /* membar_exit() */
mrs x1, tpidr_el1 /* x1 = curlwp */
1:
ldxr x2, [x0] /* load old value */
cmp x1, x2 /* equals curlwp? */
b.ne 3f /* slow path if different */
- stxr w3, xzr, [x0] /* store zero as new value */
+ stlxr w3, xzr, [x0] /* store zero as new value */
cbnz w3, 2f /* succeed? nope, try again. */
ret
2:
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Tue Oct 13 21:24:22 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S
Log Message:
Use corrcet membar_exit barrier
To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/aarch64/aarch64/cpuswitch.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.29 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.30
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.29 Tue Oct 6 06:26:46 2020
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Tue Oct 13 21:24:22 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.29 2020/10/06 06:26:46 skrll Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.30 2020/10/13 21:24:22 skrll Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.29 2020/10/06 06:26:46 skrll Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.30 2020/10/13 21:24:22 skrll Exp $")
ARMV8_DEFINE_OPTIONS
@@ -119,7 +119,7 @@ ENTRY_NP(cpu_switchto)
msr tpidr_el1, x1 /* switch curlwp to new lwp */
ldr x3, [x1, #L_CPU]
str x1, [x3, #CI_CURLWP] /* switch curlwp to new lwp */
- dmb st /* see comments in kern_mutex.c */
+ dmb ishst /* see comments in kern_mutex.c */
ENABLE_INTERRUPT
/*
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: rin Date: Tue Oct 13 07:04:49 UTC 2020 Modified Files: src/sys/arch/aarch64/aarch64: exec_machdep.c Log Message: BE32 binaries are no longer supported for ARMv7 and later, and therefore for aarch64eb. Reject them with ENOEXEC, rather than causing illegal instruction exceptions due to unexpected binary format. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/aarch64/aarch64/exec_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/exec_machdep.c diff -u src/sys/arch/aarch64/aarch64/exec_machdep.c:1.7 src/sys/arch/aarch64/aarch64/exec_machdep.c:1.8 --- src/sys/arch/aarch64/aarch64/exec_machdep.c:1.7 Sat May 23 18:08:59 2020 +++ src/sys/arch/aarch64/aarch64/exec_machdep.c Tue Oct 13 07:04:49 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: exec_machdep.c,v 1.7 2020/05/23 18:08:59 ryo Exp $ */ +/* $NetBSD: exec_machdep.c,v 1.8 2020/10/13 07:04:49 rin Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -31,7 +31,7 @@ #include -__KERNEL_RCSID(1, "$NetBSD: exec_machdep.c,v 1.7 2020/05/23 18:08:59 ryo Exp $"); +__KERNEL_RCSID(1, "$NetBSD: exec_machdep.c,v 1.8 2020/10/13 07:04:49 rin Exp $"); #include "opt_compat_netbsd.h" #include "opt_compat_netbsd32.h" @@ -77,6 +77,11 @@ aarch64_netbsd_elf32_probe(struct lwp *l /* OABI not support */ if (!elf_aapcs_p) return ENOEXEC; +#ifdef __AARCH64EB__ + /* BE32 not support */ + if ((eh->e_flags & EF_ARM_BE8) == 0) + return ENOEXEC; +#endif /* * require aarch32 feature.
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: jmcneill
Date: Sat Oct 10 08:22:57 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: cpu.c
Log Message:
Fix detection of FP and SIMD features on Armv8.2+.
To generate a diff of this commit:
cvs rdiff -u -r1.55 -r1.56 src/sys/arch/aarch64/aarch64/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.55 src/sys/arch/aarch64/aarch64/cpu.c:1.56
--- src/sys/arch/aarch64/aarch64/cpu.c:1.55 Wed Oct 7 16:03:10 2020
+++ src/sys/arch/aarch64/aarch64/cpu.c Sat Oct 10 08:22:57 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.55 2020/10/07 16:03:10 jmcneill Exp $ */
+/* $NetBSD: cpu.c,v 1.56 2020/10/10 08:22:57 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.55 2020/10/07 16:03:10 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.56 2020/10/10 08:22:57 jmcneill Exp $");
#include "locators.h"
#include "opt_arm_debug.h"
@@ -378,7 +378,9 @@ cpu_identify2(device_t self, struct cpu_
break;
}
switch (__SHIFTOUT(id->ac_aa64pfr0, ID_AA64PFR0_EL1_FP)) {
- case ID_AA64PFR0_EL1_FP_IMPL:
+ case ID_AA64PFR0_EL1_FP_NONE:
+ break;
+ default:
aprint_verbose(", FP");
break;
}
@@ -422,7 +424,9 @@ cpu_identify2(device_t self, struct cpu_
/* PFR0:AdvSIMD */
switch (__SHIFTOUT(id->ac_aa64pfr0, ID_AA64PFR0_EL1_ADVSIMD)) {
- case ID_AA64PFR0_EL1_ADV_SIMD_IMPL:
+ case ID_AA64PFR0_EL1_ADV_SIMD_NONE:
+ break;
+ default:
aprint_verbose(", NEON");
break;
}
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: jmcneill
Date: Wed Oct 7 16:03:10 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: cpu.c
Log Message:
Only touch PMC registers if Performance Monitor Extensions are present.
To generate a diff of this commit:
cvs rdiff -u -r1.54 -r1.55 src/sys/arch/aarch64/aarch64/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.54 src/sys/arch/aarch64/aarch64/cpu.c:1.55
--- src/sys/arch/aarch64/aarch64/cpu.c:1.54 Sat Jul 25 22:51:57 2020
+++ src/sys/arch/aarch64/aarch64/cpu.c Wed Oct 7 16:03:10 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.54 2020/07/25 22:51:57 riastradh Exp $ */
+/* $NetBSD: cpu.c,v 1.55 2020/10/07 16:03:10 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.54 2020/07/25 22:51:57 riastradh Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.55 2020/10/07 16:03:10 jmcneill Exp $");
#include "locators.h"
#include "opt_arm_debug.h"
@@ -472,6 +472,13 @@ cpu_identify2(device_t self, struct cpu_
static void
cpu_init_counter(struct cpu_info *ci)
{
+ const uint64_t dfr0 = reg_id_aa64dfr0_el1_read();
+ const u_int pmuver = __SHIFTOUT(dfr0, ID_AA64DFR0_EL1_PMUVER);
+ if (pmuver == ID_AA64DFR0_EL1_PMUVER_NONE) {
+ /* Performance Monitors Extension not implemented. */
+ return;
+ }
+
reg_pmcr_el0_write(PMCR_E | PMCR_C);
reg_pmcntenset_el0_write(PMCNTEN_C);
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Tue Oct 6 06:26:46 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S vectors.S
Log Message:
move #include "opt_compat_netbsd32.h" to where it's required
To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/aarch64/aarch64/cpuswitch.S
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/aarch64/aarch64/vectors.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.28 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.29
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.28 Wed Sep 30 16:35:49 2020
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Tue Oct 6 06:26:46 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.28 2020/09/30 16:35:49 skrll Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.29 2020/10/06 06:26:46 skrll Exp $ */
/*-
* Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -34,12 +34,11 @@
#include "assym.h"
-#include "opt_compat_netbsd32.h"
#include "opt_cpuoptions.h"
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.28 2020/09/30 16:35:49 skrll Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.29 2020/10/06 06:26:46 skrll Exp $")
ARMV8_DEFINE_OPTIONS
Index: src/sys/arch/aarch64/aarch64/vectors.S
diff -u src/sys/arch/aarch64/aarch64/vectors.S:1.19 src/sys/arch/aarch64/aarch64/vectors.S:1.20
--- src/sys/arch/aarch64/aarch64/vectors.S:1.19 Wed Sep 30 16:35:49 2020
+++ src/sys/arch/aarch64/aarch64/vectors.S Tue Oct 6 06:26:46 2020
@@ -1,15 +1,16 @@
-/* $NetBSD: vectors.S,v 1.19 2020/09/30 16:35:49 skrll Exp $ */
+/* $NetBSD: vectors.S,v 1.20 2020/10/06 06:26:46 skrll Exp $ */
#include
#include
#include "assym.h"
+#include "opt_compat_netbsd32.h"
#include "opt_cpuoptions.h"
#include "opt_ddb.h"
#include "opt_dtrace.h"
-RCSID("$NetBSD: vectors.S,v 1.19 2020/09/30 16:35:49 skrll Exp $")
+RCSID("$NetBSD: vectors.S,v 1.20 2020/10/06 06:26:46 skrll Exp $")
ARMV8_DEFINE_OPTIONS
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Sun Oct 4 08:09:12 UTC 2020 Modified Files: src/sys/arch/aarch64/aarch64: aarch64_machdep.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.50 -r1.51 src/sys/arch/aarch64/aarch64/aarch64_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.50 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.51 --- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.50 Sat Oct 3 05:56:26 2020 +++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Sun Oct 4 08:09:12 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: aarch64_machdep.c,v 1.50 2020/10/03 05:56:26 skrll Exp $ */ +/* $NetBSD: aarch64_machdep.c,v 1.51 2020/10/04 08:09:12 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -30,14 +30,14 @@ */ #include -__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.50 2020/10/03 05:56:26 skrll Exp $"); +__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.51 2020/10/04 08:09:12 skrll Exp $"); #include "opt_arm_debug.h" #include "opt_cpuoptions.h" #include "opt_ddb.h" +#include "opt_fdt.h" #include "opt_kernhist.h" #include "opt_modular.h" -#include "opt_fdt.h" #include #include
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src
Committed By: skrll
Date: Sat Oct 3 05:56:26 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: aarch64_machdep.c
Log Message:
G/C
To generate a diff of this commit:
cvs rdiff -u -r1.49 -r1.50 src/sys/arch/aarch64/aarch64/aarch64_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/aarch64_machdep.c
diff -u src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.49 src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.50
--- src/sys/arch/aarch64/aarch64/aarch64_machdep.c:1.49 Wed Sep 30 16:47:55 2020
+++ src/sys/arch/aarch64/aarch64/aarch64_machdep.c Sat Oct 3 05:56:26 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64_machdep.c,v 1.49 2020/09/30 16:47:55 skrll Exp $ */
+/* $NetBSD: aarch64_machdep.c,v 1.50 2020/10/03 05:56:26 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.49 2020/09/30 16:47:55 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.50 2020/10/03 05:56:26 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cpuoptions.h"
@@ -366,7 +366,7 @@ initarm_common(vaddr_t kvm_base, vsize_t
* order.
*/
paddr_t segend = end;
- for (size_t j = 0; j < nbp; j++ /*, start = segend, segend = end */) {
+ for (size_t j = 0; j < nbp; j++) {
paddr_t bp_start = bp[j].bp_start;
paddr_t bp_end = bp_start + bp[j].bp_pages;
CVS commit: src/sys/arch/aarch64/aarch64
Module Name:src Committed By: skrll Date: Thu Oct 1 07:31:27 UTC 2020 Modified Files: src/sys/arch/aarch64/aarch64: procfs_machdep.c Log Message: KNF (and some newlines) To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/aarch64/aarch64/procfs_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/aarch64/aarch64/procfs_machdep.c diff -u src/sys/arch/aarch64/aarch64/procfs_machdep.c:1.3 src/sys/arch/aarch64/aarch64/procfs_machdep.c:1.4 --- src/sys/arch/aarch64/aarch64/procfs_machdep.c:1.3 Thu Oct 1 06:40:16 2020 +++ src/sys/arch/aarch64/aarch64/procfs_machdep.c Thu Oct 1 07:31:27 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: procfs_machdep.c,v 1.3 2020/10/01 06:40:16 ryo Exp $ */ +/* $NetBSD: procfs_machdep.c,v 1.4 2020/10/01 07:31:27 skrll Exp $ */ /*- * Copyright (c) 2020 Ryo Shimizu @@ -27,12 +27,14 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.3 2020/10/01 06:40:16 ryo Exp $"); +__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.4 2020/10/01 07:31:27 skrll Exp $"); #include -#include #include +#include + #include + #include
