[U-Boot] Instructions in TEXT section can not load data from other section
Hi, everyone. I have got a problem when I porting U-BOOT to my board with MPC8247. My configuration file is based on the MPC8260ADS_config. The problem is : The instruction in TEXT section can not load data in other (DATA) sections. It seems there is a relocation to the data section . For example: If I use for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr) () != 0) { hang (); } } I can't jump to functions in init_sequence[] ; If I called functions such asget_clocks() in board_init_f , it works fine. So the code in board_init_f can not load address in init_sequence[] , because init_sequence[] is out of TEXT section. The same thing happens with iop_conf_tab[][], and strings used by puts. Anyone there has the same problem? Or know the point? Pls help! Great Great Thanks ! --- -JRJR _ SkyDrive电子画册,带你领略精彩照片,分享“美”时“美”刻! http://www.windowslive.cn/campaigns/e-magazine/ngmchina/?a=c___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Instructions in TEXT section can not load data from other section
Hi, everyone. I have got a problem when I porting U-BOOT to my board with MPC8247. My configuration file is based on the MPC8260ADS_config. The problem is : The instruction in TEXT section can not load data in other (DATA) sections. It seems there is a relocation to the data section . For example: If I use for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr) () != 0) { hang (); } } I can't jump to functions in init_sequence[] ; If I called functions such asget_clocks() in board_init_f , it works fine. So the code in board_init_f can not load address in init_sequence[] , because init_sequence[] is out of TEXT section. The same thing happens with iop_conf_tab[][], and strings used by puts. Anyone there has the same problem? Or know the point? Pls help! Yes, that is a relocation problem. Do you compile with -mrelocatable? If so, you might have a broken toolchain that don't produce .fixups jocke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Irish 2010 Grant Winner
£1,000,000Pounds has been awarded to you in the U.K PROMO.send to this office the following: Names... Tel.. Age Address.. Occupation. Country. Email to: claimsdesk2...@live.co.uk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] POST progress API
Hi Wolfgang, Is there a chance this patch will be included already in this release? On Mon, Mar 8, 2010 at 5:29 PM, Detlev Zundel d...@denx.de wrote: Hi Michael, Added POST progress API implemented as weak calls before and after each call to the POST test callback in the post_run_single routine of the post.c file. Signed-off-by: Michael Zaidman michael.zaid...@gmail.com Acked-by: Detlev Zundel d...@denx.de Cheers Detlev Thanks, Michael ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-BOOT porting to PORTUX 920T
Hello Luca, Thank to Achim Ehrlich - we got all we needed working! Timing has been set to s$ Basically - we have seen: - dataflash working - usb transfers ok - environment We should test other hardware - hoping to get feedback, at least from Taskit! Nice to hear, that things are working now for you. Testing your changes is not so easy, as you didn't provide a proper patch to apply (and especially with which tree are you working?). Do you have any intention to post your board file to the mailing list, when it is ready? I guess it is not. Kind regards Achim -- product manager email:aehrl...@taskit.de Tel.: ++49 30 611295-25 Fax: ++49 30 611295-11 -- taskit GmbH Seelenbinderstr. 33 | D-12555 Berlin web:http://www.taskit.de Amtsgericht Charlottenburg: 93HRB39014 Managing director: Thorsten Raulfs -- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] at91sam9g45ekes SDHC/MMC
Here's the command I'm using and the output. I put a debugging statement in sd_init_card() after the for loop (HJS:). U-Boot mmc init 0 mmc: clock 15 too low; setting CLKDIV to 255 HJS: sd_init_card() mmc_acmd for loop finished. ret = -19, resp[0] = 0x6B200020 No MMC card found The same thing happens if I try mmc init 1. Thanks, Henry On Mon, Mar 15, 2010 at 6:15 PM, Albin Tonnerre albin.tonne...@free-electrons.com wrote: On Mon, 15 Mar 2010 17:40 -0400, Henry Súcart wrote : Hi Albin, First of all thanks for the quick reply. You're welcome. I tried out what you said about adding #define CONFIG_AT91_MCI1 to the board config file but although that did got rid of the mmc: command 1 failed (status: 0x0c100025) error Great. At least know we know it's actually reading the card :) it still doesn't see the SD card. After doing some debugging it seems like the statement: if (aresp[0] (R1_ILLEGAL_COMMAND | R1_APP_CMD)) != R1_APP_CMD) return -ENODEV; in mmc_acmd() is being executed, which is causing my problem. Any suggestions? Not on the top of my head - I have to admit I haven't played with the MMC support for quite some time. Would you mind providing me the exact command you typed and the ouput you got when trying with the fixed u-boot? That might help. Regards, -- Albin Tonnerre, Free Electrons Kernel, drivers and embedded Linux development, consulting, training and support. http://free-electrons.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] TI: Davinci: NAND Driver Cleanup
On 14/03/10 21:14, s-paul...@ti.com wrote: From: Cyril Chemparathy cy...@ti.com Modified to use IO accessor routines consistently. Eliminated volatile usage to keep checkpatch.pl happy. Patch was tested on DM355, DM365 and DM6446 EVMs Signed-off-by: Cyril Chemparathy cy...@ti.com Tested-by: Sandeep Paulraj s-paul...@ti.com --- drivers/mtd/nand/davinci_nand.c | 126 -- include/asm-arm/arch-davinci/emif_defs.h | 80 +-- 2 files changed, 104 insertions(+), 102 deletions(-) diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index bfc2acf..61cba14 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -57,7 +57,8 @@ #define ECC_STATE_ERR_CORR_COMP_P0x2 #define ECC_STATE_ERR_CORR_COMP_N0x3 -static emif_registers *const emif_regs = (void *) DAVINCI_ASYNC_EMIF_CNTRL_BASE; +static struct davinci_emif_regs *emif_regs = + (struct davinci_emif_regs *) DAVINCI_ASYNC_EMIF_CNTRL_BASE; Since this is really just a constant, why setup a variable locally where ever EMIF registers are accessed? What's wrong with the define you removed below? ... diff --git a/include/asm-arm/arch-davinci/emif_defs.h b/include/asm-arm/arch-davinci/emif_defs.h index aa57703..3d77bfc 100644 --- a/include/asm-arm/arch-davinci/emif_defs.h +++ b/include/asm-arm/arch-davinci/emif_defs.h @@ -24,50 +24,42 @@ #include asm/arch/hardware.h -typedef struct davinci_emif_regs { - dv_reg ERCSR; - dv_reg AWCCR; - dv_reg SDBCR; - dv_reg SDRCR; - dv_reg AB1CR; - dv_reg AB2CR; - dv_reg AB3CR; - dv_reg AB4CR; - dv_reg SDTIMR; - dv_reg DDRSR; - dv_reg DDRPHYCR; - dv_reg DDRPHYSR; - dv_reg TOTAR; - dv_reg TOTACTR; - dv_reg DDRPHYID_REV; - dv_reg SDSRETR; - dv_reg EIRR; - dv_reg EIMR; - dv_reg EIMSR; - dv_reg EIMCR; - dv_reg IOCTRLR; - dv_reg IOSTATR; - u_int8_tRSVD0[8]; - dv_reg NANDFCR; - dv_reg NANDFSR; - u_int8_tRSVD1[8]; - dv_reg NANDFECC[4]; - u_int8_tRSVD2[60]; - dv_reg NAND4BITECCLOAD; - dv_reg NAND4BITECC1; - dv_reg NAND4BITECC2; - dv_reg NAND4BITECC3; - dv_reg NAND4BITECC4; - dv_reg NANDERRADD1; - dv_reg NANDERRADD2; - dv_reg NANDERRVAL1; - dv_reg NANDERRVAL2; -} emif_registers; - -typedef emif_registers *emifregs; - -#define davinci_emif_regs \ - ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE) ...This one. Nick. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] add new board pm9g45
Hello everyone, here is the new board PM9G45 from Ronetix GmbH, based on at91sam9g45 MCU. It has 128MB DDR2 SDRAM, 256MB NAND, could be with or without DataFlash. The board is made as SODIMM200 module. For more info www.ronatix.at or i...@ronetix.at. Regards, Asen Signed-off-by: Asen Dimov di...@ronetix.at --- MAKEALL|1 + Makefile |4 + board/ronetix/pm9g45/Makefile | 54 +++ .../at91sam9m10g45ek = ronetix/pm9g45}/config.mk |0 board/ronetix/pm9g45/pm9g45.c | 365 include/configs/pm9g45.h | 246 + 6 files changed, 670 insertions(+), 0 deletions(-) create mode 100644 board/ronetix/pm9g45/Makefile copy board/{atmel/at91sam9m10g45ek = ronetix/pm9g45}/config.mk (100%) create mode 100644 board/ronetix/pm9g45/pm9g45.c create mode 100644 include/configs/pm9g45.h diff --git a/MAKEALL b/MAKEALL index beacb5f..ad591d5 100755 --- a/MAKEALL +++ b/MAKEALL @@ -673,6 +673,7 @@ LIST_at91= \ otc570 \ pm9261 \ pm9263 \ + pm9g45 \ SBC35_A9G20 \ TNY_A9260 \ TNY_A9G20 \ diff --git a/Makefile b/Makefile index d801e25..438580a 100644 --- a/Makefile +++ b/Makefile @@ -2882,6 +2882,10 @@ otc570_config: unconfig pm9263_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91 +pm9g45_config : unconfig + @mkdir -p $(obj)include + @$(MKCONFIG) -a pm9g45 arm arm926ejs pm9g45 ronetix at91 + SBC35_A9G20_NANDFLASH_config \ SBC35_A9G20_EEPROM_config \ SBC35_A9G20_config : unconfig diff --git a/board/ronetix/pm9g45/Makefile b/board/ronetix/pm9g45/Makefile new file mode 100644 index 000..dd5b02e --- /dev/null +++ b/board/ronetix/pm9g45/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# (C) Copyright 2008 +# Stelian Pop stelian@leadtechdesign.com +# Lead Tech Design www.leadtechdesign.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).a + +COBJS-y += pm9g45.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/atmel/at91sam9m10g45ek/config.mk b/board/ronetix/pm9g45/config.mk similarity index 100% copy from board/atmel/at91sam9m10g45ek/config.mk copy to board/ronetix/pm9g45/config.mk diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c new file mode 100644 index 000..d11f40f --- /dev/null +++ b/board/ronetix/pm9g45/pm9g45.c @@ -0,0 +1,365 @@ +/* + * (C) Copyright 2005-2010 + * Ilko Iliev il...@ronetix.at + * Asen Dimov di...@ronetix.at + * Ronetix GmbH www.ronetix.at + * + * (C) Copyright 2007-2008 + * Stelian Pop stelian@leadtechdesign.com + * Lead Tech Design www.leadtechdesign.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + *
Re: [U-Boot] [PATCH] ARM1176: Coexist with other ARM1176 platforms
Chemparathy, Cyril wrote: Hi Tom, This patch is premature. I need to see this patch within the context of the new SOC. For a new SOC, I would like it be added as a new sub dir off of cpu/arm1176. At the same level as s3c64xx. So this dir would look like. config.mk cpu.c Makefile new_soc_name s3c64xx start.S u-boot.lds Correct. The new SOC adds cpu/arm1176/tnetv107x/. Would you prefer if I were to include this patch as part of the initial tnetv107x submission? You could take a peek at this future submission at http://bit.ly/b1F2qX. I was not able to access this link But, yes, please include this patch as part of the tnetv107x patchset. The common code that is sharable should also be at this level. This may mean moving and generalizing some s3c64xx/*.c. I have taken a look at the code inside s3c64xx, and found it specific to that SOC (memory interface initialization, reset, etc.). Therefore, I don't think any of that code can be generalized and pulled out into cpu/arm1176/. Guennadi, do you agree with this assessment? Ok. Obviously it is better to generalize than to make off-by-one copies but not if there are not enough similarities to make it work.. The SOC specific code must be in its own dir. An example of this may be the lowlevel_init needs to move from start.S to SOC/lowlevel_init.S lowlevel_init is _called_ from start.S and is expected to be implemented by SOCs if needed (ifndef CONFIG_SKIP_LOWLEVEL_INIT). I do not want one SOC if-def-ing up another SOC. Absolutely. I understand your concern, but this patch if-defs up arm1176 code, and not s3c64xx SOC code. My concern is that start.S, because it came originally from s3c64xx, may need to either generalized or split up. With s3c64xx parts moving to SOC layer. Assembly is complicated enough without having #if-def's and if can be done in C it should. Please review http://www.denx.de/wiki/U-Boot/Patches, clean up the patchset and submit, having another arm1176 soc will be great. Thanks Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Peripheral multiplexing in devices
Hi All, This is with regards to the pad multiplexing in devices. SPEAr SoCs support pin multiplexing(in hardware) to support multiple peripherals by selecting a particular mode from a list of ten modes and then selecting one of the two peripherals which can both be supported in that mode. I hope I am clear :) Now, we want to support this in sw in such a way that we have a single image for linux for all possible configurations. We intend to do this though bootloader (u-boot in this case) SPEAr has an arm platform and linux-arm doesn't seem to support peripheral multiplexing in the way we want. Though, I could see some stuff fo that kind in ppc platform supported by u-boot to pass device information to linux Do we have a similar way for arm based platforms as well or any other suggestions. Regards Vipin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] console.c: fix problem with splashimage
If a board uses cfb_console driver and splash image and also defines CONFIG_SILENT_CONSOLE, the user is locked out even if silent is not set. It is not possible to get any output, neither on vga console device nor on serial console after redirecting the output to the serial console, since the GD_FLG_SILENT flag remains set. Fix the problem by redirecting the output from frame buffer to serial console if splashimage is used. Only suppress the output if silent environment variable was set and don't set the GD_FLG_SILENT flag arbitrarily. Signed-off-by: Anatolij Gustschin ag...@denx.de --- common/console.c | 10 +++--- 1 files changed, 7 insertions(+), 3 deletions(-) diff --git a/common/console.c b/common/console.c index dc0d13b..51c6fb6 100644 --- a/common/console.c +++ b/common/console.c @@ -659,10 +659,14 @@ int console_init_r(void) #ifdef CONFIG_SPLASH_SCREEN /* * suppress all output if splash screen is enabled and we have -* a bmp to display +* a bmp to display. We redirect the output from frame buffer +* console to serial console in this case or suppress it if +* silent mode was requested. */ - if (getenv(splashimage) != NULL) - gd-flags |= GD_FLG_SILENT; + if (getenv(splashimage) != NULL) { + if (!(gd-flags GD_FLG_SILENT)) + outputdev = search_device (DEV_FLAGS_OUTPUT, serial); + } #endif /* Scan devices looking for input and output devices */ -- 1.6.3.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Peripheral multiplexing in devices
Dear Vipin KUMAR, In message 4b9f89b2.8040...@st.com you wrote: Now, we want to support this in sw in such a way that we have a single image for linux for all possible configurations. We intend to do this though bootloader (u-boot in this case) This may be possible, but it is not wise, nor the officially supported mode of operation in U-Boot. Please see bullet 2 at http://www.denx.de/wiki/U-Boot/DesignPrinciples#KeepFast and related entries - U-Boot is not supposed to initialize things it does not need for it's own operation. SPEAr has an arm platform and linux-arm doesn't seem to support peripheral multiplexing in the way we want. Though, I could see some stuff fo that kind in ppc platform supported by u-boot to pass device information to linux We use the device tree to do things like this. Do we have a similar way for arm based platforms as well or any other suggestions. Please check out Grant Likely's work to bring the device tree to ARM Linux. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It would seem that evil retreats when forcibly confronted -- Yarnek of Excalbia, The Savage Curtain, stardate 5906.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/7] Add support for PDM360NG board
This patch series intend to support MPC5121e based PDM360NG board. Patches preceding the actual board support patch 6 prepare needed infrastructure for the PDM360NG board. Changes since first version: - addressed comments, detailed log of changes is provided in patch description. NOTE: - if splashscreen is used, another fix should also be applied, see patch http://lists.denx.de/pipermail/u-boot/2010-March/068505.html - for RLE8 BMP support see patch http://lists.denx.de/pipermail/u-boot/2010-March/068476.html Anatolij Gustschin (7): mpc512x: make MEM IO Control configuration a board config option mpc512x: add multi serial PSC support mpc5121: add PSC serial communication routines fdt_support: add partitions fixup in mtd node mpc5121: add common post_word_load/store code mpc5121: add support for PDM360NG board mpc5121: cpu/mpc512x/diu.c: fix warnings MAKEALL |1 + Makefile|3 + board/freescale/common/fsl_diu_fb.c | 29 ++- board/pdm360ng/Makefile | 52 board/pdm360ng/config.mk| 24 ++ board/pdm360ng/pdm360ng.c | 525 +++ board/pdm360ng/post.c | 75 + common/cmd_mtdparts.c |2 +- common/fdt_support.c| 219 +++ common/serial.c | 23 ++ cpu/mpc512x/Makefile|1 + cpu/mpc512x/commproc.c | 25 ++ cpu/mpc512x/diu.c | 18 +- cpu/mpc512x/fixed_sdram.c |2 +- cpu/mpc512x/serial.c| 353 ++-- include/asm-ppc/immap_512x.h| 112 include/configs/aria.h |2 + include/configs/mecp5123.h |2 + include/configs/mpc5121-common.h| 52 include/configs/mpc5121ads.h|2 + include/configs/pdm360ng.h | 520 ++ include/fdt_support.h |2 + include/jffs2/load_kernel.h |1 + include/mtd_node.h | 11 + include/post.h |1 + include/serial.h| 15 + post/tests.c|4 + 27 files changed, 1981 insertions(+), 95 deletions(-) create mode 100644 board/pdm360ng/Makefile create mode 100644 board/pdm360ng/config.mk create mode 100644 board/pdm360ng/pdm360ng.c create mode 100644 board/pdm360ng/post.c create mode 100644 cpu/mpc512x/commproc.c create mode 100644 include/configs/mpc5121-common.h create mode 100644 include/configs/pdm360ng.h create mode 100644 include/mtd_node.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/7] mpc512x: make MEM IO Control configuration a board config option
Signed-off-by: Anatolij Gustschin ag...@denx.de --- No changes since v1. cpu/mpc512x/fixed_sdram.c|2 +- include/asm-ppc/immap_512x.h |4 include/configs/aria.h |2 ++ include/configs/mecp5123.h |2 ++ include/configs/mpc5121ads.h |2 ++ 5 files changed, 7 insertions(+), 5 deletions(-) diff --git a/cpu/mpc512x/fixed_sdram.c b/cpu/mpc512x/fixed_sdram.c index 442b5fc..72d524c 100644 --- a/cpu/mpc512x/fixed_sdram.c +++ b/cpu/mpc512x/fixed_sdram.c @@ -91,7 +91,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config, } /* Initialize IO Control */ - out_be32(im-io_ctrl.io_control_mem, IOCTRL_MUX_DDR); + out_be32(im-io_ctrl.io_control_mem, CONFIG_SYS_IOCTRL_MUX_DDR); /* Initialize DDR Local Window */ out_be32(im-sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE 0xF000); diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h index 95350fd..1dc47e5 100644 --- a/include/asm-ppc/immap_512x.h +++ b/include/asm-ppc/immap_512x.h @@ -848,10 +848,6 @@ typedef struct ioctrl512x { u8 reserved[0x0cfc]; /* fill to 4096 bytes size */ } ioctrl512x_t; -/* Indexes in regs array */ -/* Set for DDR */ -#define IOCTRL_MUX_DDR 0x0036 - /* IO pin fields */ #define IO_PIN_FMUX(v) ((v) 7) /* pin function */ #define IO_PIN_HOLD(v) ((v) 5) /* hold time, pci only */ diff --git a/include/configs/aria.h b/include/configs/aria.h index f89fc57..a73c0c7 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -79,6 +79,8 @@ #define CONFIG_SYS_DDR_BASE0x #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x0036 + /* DDR Controller Configuration * * SYS_CFG: diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index 31d..cafd6a7 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -67,6 +67,8 @@ #define CONFIG_SYS_DDR_BASE0x /* DDR is sys memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x0036 + /* DDR Controller Configuration * * SYS_CFG: diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index fb49388..8ecc9e1 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -86,6 +86,8 @@ #define CONFIG_SYS_DDR_BASE0x /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x0036 + /* DDR Controller Configuration * * SYS_CFG: -- 1.6.3.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/7] mpc512x: add multi serial PSC support
Extend mpc512x serial driver to support multiple PSC ports. Supsequent patches for PDM360NG board support make use of this functionality by defining CONFIG_SERIAL_MULTI in the board config file. Additionally the used PSC devices are specified by defining e.g. CONFIG_SYS_PSC1, CONFIG_SYS_PSC4 and CONFIG_SYS_PSC6. Support for PSC devices other than 1, 3, 4 and 6 is not added by this patch because these aren't used currently. In the future it can be easily added using DECLARE_PSC_SERIAL_FUNCTIONS(N) and INIT_PSC_SERIAL_STRUCTURE(N) macros in cpu/mpc512x/serial.c. Additionally you have to add code for registering added devices in serial_initialise() in common/serial.c. Signed-off-by: Anatolij Gustschin ag...@denx.de --- No changes since v1. common/serial.c | 23 cpu/mpc512x/serial.c | 266 +- include/asm-ppc/immap_512x.h | 108 +- include/serial.h |8 ++ 4 files changed, 324 insertions(+), 81 deletions(-) diff --git a/common/serial.c b/common/serial.c index 5f9ffd7..754e329 100644 --- a/common/serial.c +++ b/common/serial.c @@ -59,6 +59,14 @@ struct serial_device *__default_serial_console (void) #else return serial0_device; #endif +#elif defined(CONFIG_MPC512X) +#if (CONFIG_PSC_CONSOLE == 3) + return serial3_device; +#elif (CONFIG_PSC_CONSOLE == 6) + return serial6_device; +#else +#error Bad CONFIG_PSC_CONSOLE. +#endif #elif defined(CONFIG_S3C2410) #if defined(CONFIG_SERIAL1) return s3c24xx_serial0_device; @@ -159,6 +167,20 @@ void serial_initialize (void) serial_register(s5pc1xx_serial2_device); serial_register(s5pc1xx_serial3_device); #endif +#if defined(CONFIG_MPC512X) +#if defined(CONFIG_SYS_PSC1) + serial_register(serial1_device); +#endif +#if defined(CONFIG_SYS_PSC3) + serial_register(serial3_device); +#endif +#if defined(CONFIG_SYS_PSC4) + serial_register(serial4_device); +#endif +#if defined(CONFIG_SYS_PSC6) + serial_register(serial6_device); +#endif +#endif serial_assign (default_serial_console ()-name); } @@ -174,6 +196,7 @@ void serial_stdio_init (void) dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT; dev.start = s-init; + dev.stop = s-uninit; dev.putc = s-putc; dev.puts = s-puts; dev.getc = s-getc; diff --git a/cpu/mpc512x/serial.c b/cpu/mpc512x/serial.c index ec2f41b..f421968 100644 --- a/cpu/mpc512x/serial.c +++ b/cpu/mpc512x/serial.c @@ -32,14 +32,16 @@ #include common.h #include asm/io.h #include asm/processor.h +#include serial.h DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_PSC_CONSOLE) +#if defined(CONFIG_PSC_CONSOLE) || defined(CONFIG_SERIAL_MULTI) static void fifo_init (volatile psc512x_t *psc) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; + u32 tfsize, rfsize; /* reset Rx Tx fifo slice */ out_be32(psc-rfcmd, PSC_FIFO_RESET_SLICE); @@ -49,8 +51,65 @@ static void fifo_init (volatile psc512x_t *psc) out_be32(psc-rfintmask, 0); out_be32(psc-tfintmask, 0); - out_be32(psc-tfsize, CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR 16)); - out_be32(psc-rfsize, CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR 16)); +#if defined(CONFIG_SERIAL_MULTI) + switch (((u32)psc 0xf00) 8) { + case 0: + tfsize = FIFOC_PSC0_TX_SIZE | (FIFOC_PSC0_TX_ADDR 16); + rfsize = FIFOC_PSC0_RX_SIZE | (FIFOC_PSC0_RX_ADDR 16); + break; + case 1: + tfsize = FIFOC_PSC1_TX_SIZE | (FIFOC_PSC1_TX_ADDR 16); + rfsize = FIFOC_PSC1_RX_SIZE | (FIFOC_PSC1_RX_ADDR 16); + break; + case 2: + tfsize = FIFOC_PSC2_TX_SIZE | (FIFOC_PSC2_TX_ADDR 16); + rfsize = FIFOC_PSC2_RX_SIZE | (FIFOC_PSC2_RX_ADDR 16); + break; + case 3: + tfsize = FIFOC_PSC3_TX_SIZE | (FIFOC_PSC3_TX_ADDR 16); + rfsize = FIFOC_PSC3_RX_SIZE | (FIFOC_PSC3_RX_ADDR 16); + break; + case 4: + tfsize = FIFOC_PSC4_TX_SIZE | (FIFOC_PSC4_TX_ADDR 16); + rfsize = FIFOC_PSC4_RX_SIZE | (FIFOC_PSC4_RX_ADDR 16); + break; + case 5: + tfsize = FIFOC_PSC5_TX_SIZE | (FIFOC_PSC5_TX_ADDR 16); + rfsize = FIFOC_PSC5_RX_SIZE | (FIFOC_PSC5_RX_ADDR 16); + break; + case 6: + tfsize = FIFOC_PSC6_TX_SIZE | (FIFOC_PSC6_TX_ADDR 16); + rfsize = FIFOC_PSC6_RX_SIZE | (FIFOC_PSC6_RX_ADDR 16); + break; + case 7: + tfsize = FIFOC_PSC7_TX_SIZE | (FIFOC_PSC7_TX_ADDR 16); + rfsize = FIFOC_PSC7_RX_SIZE | (FIFOC_PSC7_RX_ADDR 16); + break; + case 8: + tfsize = FIFOC_PSC8_TX_SIZE | (FIFOC_PSC8_TX_ADDR 16); +
[U-Boot] [PATCH v2 4/7] fdt_support: add partitions fixup in mtd node
Allow overriding defined partitions in the device tree blob using partition info defined in the 'mtdparts' environment variable. Signed-off-by: Anatolij Gustschin ag...@denx.de Cc: Gerald Van Baren vanba...@cideas.com --- Changes since first version: - in fdt_fixup_mtdparts() check the presence of mtdparts environment variable and don't proceed with initialisation if the variable is not defined (suppresses warning while booting). common/cmd_mtdparts.c |2 +- common/fdt_support.c| 219 +++ include/fdt_support.h |2 + include/jffs2/load_kernel.h |1 + include/mtd_node.h | 11 ++ 5 files changed, 234 insertions(+), 1 deletions(-) create mode 100644 include/mtd_node.h diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c index 20fed2a..0b5f747 100644 --- a/common/cmd_mtdparts.c +++ b/common/cmd_mtdparts.c @@ -776,7 +776,7 @@ static int device_del(struct mtd_device *dev) * @param num device number * @return NULL if requested device does not exist */ -static struct mtd_device* device_find(u8 type, u8 num) +struct mtd_device *device_find(u8 type, u8 num) { struct list_head *entry; struct mtd_device *dev_tmp; diff --git a/common/fdt_support.c b/common/fdt_support.c index f89a3ee..b7d4fe5 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -757,3 +757,222 @@ int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size) return -1; } #endif + +#ifdef CONFIG_FDT_FIXUP_PARTITIONS +#include jffs2/load_kernel.h +#include mtd_node.h + +struct reg_cell { + unsigned int r0; + unsigned int r1; +}; + +int fdt_del_subnodes(const void *blob, int parent_offset) +{ + int off, ndepth; + int ret; + + for (ndepth = 0, off = fdt_next_node(blob, parent_offset, ndepth); +(off = 0) (ndepth 0); +off = fdt_next_node(blob, off, ndepth)) { + if (ndepth == 1) { + debug(delete %s: offset: %x\n, + fdt_get_name(blob, off, 0), off); + ret = fdt_del_node((void *)blob, off); + if (ret 0) { + printf(Can't delete node: %s\n, + fdt_strerror(ret)); + return ret; + } else { + ndepth = 0; + off = parent_offset; + } + } + } + return 0; +} + +int fdt_increase_size(void *fdt, int add_len) +{ + int newlen; + + newlen = fdt_totalsize(fdt) + add_len; + + /* Open in place with a new len */ + return fdt_open_into(fdt, fdt, newlen); +} + +int fdt_del_partitions(void *blob, int parent_offset) +{ + const void *prop; + int ndepth = 0; + int off; + int ret; + + off = fdt_next_node(blob, parent_offset, ndepth); + if (off 0 ndepth == 1) { + prop = fdt_getprop(blob, off, label, NULL); + if (prop == NULL) { + /* +* Could not find label property, nand {}; node? +* Check subnode, delete partitions there if any. +*/ + return fdt_del_partitions(blob, off); + } else { + ret = fdt_del_subnodes(blob, parent_offset); + if (ret 0) { + printf(Can't remove subnodes: %s\n, + fdt_strerror(ret)); + return ret; + } + } + } + return 0; +} + +int fdt_node_set_part_info(void *blob, int parent_offset, + struct mtd_device *dev) +{ + struct list_head *pentry; + struct part_info *part; + struct reg_cell cell; + int off, ndepth = 0; + int part_num, ret; + char buf[64]; + + ret = fdt_del_partitions(blob, parent_offset); + if (ret 0) + return ret; + + /* +* Check if it is nand {}; subnode, adjust +* the offset in this case +*/ + off = fdt_next_node(blob, parent_offset, ndepth); + if (off 0 ndepth == 1) + parent_offset = off; + + part_num = 0; + list_for_each_prev(pentry, dev-parts) { + int newoff; + + part = list_entry(pentry, struct part_info, link); + + debug(%2d: %-20s0x%08x\t0x%08x\t%d\n, + part_num, part-name, part-size, + part-offset, part-mask_flags); + + sprintf(buf, partit...@%x, part-offset); +add_sub: + ret = fdt_add_subnode(blob, parent_offset, buf); + if (ret == -FDT_ERR_NOSPACE) { + ret = fdt_increase_size(blob, 512); + if
[U-Boot] [PATCH v2 3/7] mpc5121: add PSC serial communication routines
Signed-off-by: Anatolij Gustschin ag...@denx.de --- No changes since v1. cpu/mpc512x/serial.c | 87 ++ include/serial.h |7 2 files changed, 94 insertions(+), 0 deletions(-) diff --git a/cpu/mpc512x/serial.c b/cpu/mpc512x/serial.c index f421968..cb5bbf0 100644 --- a/cpu/mpc512x/serial.c +++ b/cpu/mpc512x/serial.c @@ -401,3 +401,90 @@ int serial_getcts(void) return serial_getcts_dev(CONFIG_PSC_CONSOLE); } #endif /* CONFIG_PSC_CONSOLE */ + +#if defined(CONFIG_SERIAL_MULTI) +#include stdio_dev.h +/* + * Routines for communication with serial devices over PSC + */ +/* Bitfield for initialized PSCs */ +static unsigned int initialized; + +struct stdio_dev *open_port(int num, int baudrate) +{ + struct stdio_dev *port; + char env_var[16]; + char env_val[10]; + char name[7]; + + if (num 0 || num 11) + return NULL; + + sprintf(name, psc%d, num); + port = stdio_get_by_name(name); + if (!port) + return NULL; + + if (!test_bit(num, initialized)) { + sprintf(env_var, psc%d_baudrate, num); + sprintf(env_val, %d, baudrate); + setenv(env_var, env_val); + + if (port-start()) + return NULL; + + set_bit(num, initialized); + } + + return port; +} + +int close_port(int num) +{ + struct stdio_dev *port; + int ret; + char name[7]; + + if (num 0 || num 11) + return -1; + + sprintf(name, psc%d, num); + port = stdio_get_by_name(name); + if (!port) + return -1; + + ret = port-stop(); + clear_bit(num, initialized); + + return ret; +} + +int write_port(struct stdio_dev *port, char *buf) +{ + if (!port || !buf) + return -1; + + port-puts(buf); + + return 0; +} + +int read_port(struct stdio_dev *port, char *buf, int size) +{ + int cnt = 0; + + if (!port || !buf) + return -1; + + if (!size) + return 0; + + while (port-tstc()) { + buf[cnt++] = port-getc(); + if (cnt size) + break; + } + + return cnt; +} +#endif /* CONFIG_SERIAL_MULTI */ diff --git a/include/serial.h b/include/serial.h index 3f3edbc..6423fba 100644 --- a/include/serial.h +++ b/include/serial.h @@ -92,4 +92,11 @@ extern int usbtty_tstc(void); #endif /* CONFIG_USB_TTY */ +#if defined(CONFIG_MPC512X) defined(CONFIG_SERIAL_MULTI) +extern struct stdio_dev *open_port(int num, int baudrate); +extern int close_port(int num); +extern int write_port(struct stdio_dev *port, char *buf); +extern int read_port(struct stdio_dev *port, char *buf, int size); +#endif + #endif -- 1.6.3.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 5/7] mpc5121: add common post_word_load/store code
Add common post_word_load/post_word_store routines for all mpc5121 boards. pdm360ng board support added by subsequent patches needs these, as it adds a board specific POST test. Signed-off-by: Anatolij Gustschin ag...@denx.de --- This patch is new in this series. This code was in board support file in v1 patch series. Now it is common for mpc512x boards. cpu/mpc512x/Makefile |1 + cpu/mpc512x/commproc.c | 25 + 2 files changed, 26 insertions(+), 0 deletions(-) create mode 100644 cpu/mpc512x/commproc.c diff --git a/cpu/mpc512x/Makefile b/cpu/mpc512x/Makefile index 427db7a..d609cd6 100644 --- a/cpu/mpc512x/Makefile +++ b/cpu/mpc512x/Makefile @@ -29,6 +29,7 @@ LIB = $(obj)lib$(CPU).a START = start.o COBJS-y:= cpu.o COBJS-y+= traps.o +COBJS-y += commproc.o COBJS-y += cpu_init.o COBJS-y += fixed_sdram.o COBJS-y += i2c.o diff --git a/cpu/mpc512x/commproc.c b/cpu/mpc512x/commproc.c new file mode 100644 index 000..180d323 --- /dev/null +++ b/cpu/mpc512x/commproc.c @@ -0,0 +1,25 @@ +#include common.h +#include asm/io.h + +#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) + +#if defined(CONFIG_SYS_POST_WORD_ADDR) +# define _POST_ADDR(CONFIG_SYS_POST_WORD_ADDR) +#else +#error echo No POST word address defined +#endif + +void post_word_store(ulong a) +{ + volatile void *save_addr = (volatile void *)(_POST_ADDR); + + out_be32(save_addr, a); +} + +ulong post_word_load(void) +{ + volatile void *save_addr = (volatile void *)(_POST_ADDR); + + return in_be32(save_addr); +} +#endif /* CONFIG_POST || CONFIG_LOGBUFFER */ -- 1.6.3.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 6/7] mpc5121: add support for PDM360NG board
PDM360NG is a MPC5121E based board by ifm ecomatic gmbh. Signed-off-by: Michael Weiss michael.we...@ifm.com Signed-off-by: Anatolij Gustschin ag...@denx.de --- Changes since first version: - don't include RLE8 bitmap support in DIU code, now it is in common code submitted to U-Boot ML as separate patch. It is also extended to support more video formats. - fixed e-mail format - keep the list of targets sorted in the Makefile - move POST code into separate file - move post_word_load/store code to common file for all mpc512x boards - create a file with common board config options for mpc512x boards which can be included in the board config file. - use cfb_console driver for frame buffer support - allow configuration of coprocessor communication parameters (baudrate, wait delay) in the board config file MAKEALL |1 + Makefile|3 + board/freescale/common/fsl_diu_fb.c | 29 ++- board/pdm360ng/Makefile | 52 board/pdm360ng/config.mk| 24 ++ board/pdm360ng/pdm360ng.c | 525 +++ board/pdm360ng/post.c | 75 + cpu/mpc512x/diu.c | 14 +- include/configs/mpc5121-common.h| 52 include/configs/pdm360ng.h | 520 ++ include/post.h |1 + post/tests.c|4 + 12 files changed, 1294 insertions(+), 6 deletions(-) create mode 100644 board/pdm360ng/Makefile create mode 100644 board/pdm360ng/config.mk create mode 100644 board/pdm360ng/pdm360ng.c create mode 100644 board/pdm360ng/post.c create mode 100644 include/configs/mpc5121-common.h create mode 100644 include/configs/pdm360ng.h diff --git a/MAKEALL b/MAKEALL index beacb5f..deda7e1 100755 --- a/MAKEALL +++ b/MAKEALL @@ -93,6 +93,7 @@ LIST_512x= \ aria\ mecp5123\ mpc5121ads \ + pdm360ng\ # diff --git a/Makefile b/Makefile index d801e25..1068e6a 100644 --- a/Makefile +++ b/Makefile @@ -828,6 +828,9 @@ mpc5121ads_rev2_config \ fi @$(MKCONFIG) -a mpc5121ads ppc mpc512x mpc5121ads freescale +pdm360ng_config: unconfig + @$(MKCONFIG) -a pdm360ng ppc mpc512x pdm360ng + # ## MPC8xx Systems # diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c index 2fc878b..ae5e7a7 100644 --- a/board/freescale/common/fsl_diu_fb.c +++ b/board/freescale/common/fsl_diu_fb.c @@ -50,6 +50,22 @@ struct fb_videomode { #define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */ #define FB_VMODE_NONINTERLACED 0 /* non interlaced */ +/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */ +static struct fb_videomode fsl_diu_mode_800 = { + .refresh= 60, + .xres = 800, + .yres = 480, + .pixclock = 31250, + .left_margin= 86, + .right_margin = 42, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 128, + .vsync_len = 2, + .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED +}; + /* * These parameters give default parameters * for video output 1024x768, @@ -210,9 +226,14 @@ int fsl_diu_init(int xres, disable_lcdc(); - if (xres == 1280) { + switch (xres) { + case 800: + fsl_diu_mode_db = fsl_diu_mode_800; + break; + case 1280: fsl_diu_mode_db = fsl_diu_mode_1280; - } else { + break; + default: fsl_diu_mode_db = fsl_diu_mode_1024; } @@ -519,9 +540,9 @@ int fsl_diu_display_bmp(unsigned char *bmp, b = *bitmap++; for (k = 0; k 8; k++) { if (b 0x80) - *fb_t = palette[1]; + *fb_t++ = palette[1]; else - *fb_t = palette[0]; + *fb_t++ = palette[0]; b = b 1; } } diff --git a/board/pdm360ng/Makefile b/board/pdm360ng/Makefile new file mode 100644 index 000..113ac0a --- /dev/null +++ b/board/pdm360ng/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2007 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed
[U-Boot] [PATCH v2 7/7] mpc5121: cpu/mpc512x/diu.c: fix warnings
Fix warnings while compiling with CONFIG_VIDEO enabled: diu.c: In function 'video_hw_init': diu.c:158: warning: 'return' with no value, in function returning non-void diu.c:162: warning: format '%ld' expects type 'long int', but argument 6 has type 'int' diu.c:162: warning: format '%ld' expects type 'long int', but argument 7 has type 'int' Signed-off-by: Anatolij Gustschin ag...@denx.de --- New patch in this series, needed after cfb_console driver activation. cpu/mpc512x/diu.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/cpu/mpc512x/diu.c b/cpu/mpc512x/diu.c index fc43a9d..463c88d 100644 --- a/cpu/mpc512x/diu.c +++ b/cpu/mpc512x/diu.c @@ -155,10 +155,10 @@ void *video_hw_init(void) struct fb_info *info; if (mpc5121_diu_init() 0) - return; + return NULL; /* fill in Graphic device struct */ - sprintf(pGD-modeIdent, %dx%dx%d %ldkHz %ldHz, + sprintf(pGD-modeIdent, %dx%dx%d %dkHz %dHz, xres, yres, 32, 64, 60); pGD-frameAdrs = (unsigned int)fsl_fb_open(info); -- 1.6.3.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] SPI: added support for MX51 to mxc_spi
This patch add support for MX51 processor and supports transfer of multiple word in a single transation. Signed-off-by: Stefano Babic sba...@denx.de --- The patch adds support for the MX51 and wants to remove some limitation on the old driver. Actually, the buffer passed to the transfer function must be word-aligne, even if it is required to send a single byte. drivers/spi/mxc_spi.c | 357 + 1 files changed, 301 insertions(+), 56 deletions(-) diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index 3a45200..b04fadc 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -24,6 +24,11 @@ #include asm/errno.h #include asm/io.h +#define MXC_CSPIRXDATA 0x00 +#define MXC_CSPITXDATA 0x04 +#define MXC_CSPICTRL 0x08 +#define MXC_CSPIPERIOD_32KHZ (1 15) + #ifdef CONFIG_MX27 /* i.MX27 has a completely wrong register layout and register definitions in the * datasheet, the correct one is in the Freescale's Linux driver */ @@ -31,13 +36,9 @@ #error i.MX27 CSPI not supported due to drastic differences in register definisions \ See linux mxc_spi driver from Freescale for details. -#else - +#elif defined(CONFIG_MX31) #include asm/arch/mx31.h -#define MXC_CSPIRXDATA 0x00 -#define MXC_CSPITXDATA 0x04 -#define MXC_CSPICTRL 0x08 #define MXC_CSPIINT0x0C #define MXC_CSPIDMA0x10 #define MXC_CSPISTAT 0x14 @@ -56,21 +57,63 @@ #define MXC_CSPICTRL_CHIPSELECT(x) (((x) 0x3) 24) #define MXC_CSPICTRL_BITCOUNT(x) (((x) 0x1f) 8) #define MXC_CSPICTRL_DATARATE(x) (((x) 0x7) 16) +#define MXC_CSPICTRL_MAXBITS 0x1f +#define MXC_CSPICTRL_TC(1 8) +#define MXC_CSPICTRL_RXOVF (1 6) #define MXC_CSPIPERIOD_32KHZ (1 15) +#define MAX_SPI_BYTES 4 static unsigned long spi_bases[] = { 0x43fa4000, 0x5001, 0x53f84000, }; +#elif defined(CONFIG_MX51) + +#define MXC_CSPICON0x0C +#define MXC_CSPIINT0x10 +#define MXC_CSPIDMA0x14 +#define MXC_CSPISTAT 0x18 +#define MXC_CSPIPERIOD 0x1C +#define MXC_CSPIRESET 0x00 +#include asm/arch/imx-regs.h +#include asm/arch/clock.h +#define MXC_CSPICTRL_EN(1 0) +#define MXC_CSPICTRL_MODE (1 1) +#define MXC_CSPICTRL_XCH (1 2) +#define MXC_CSPICTRL_CHIPSELECT(x) (((x) 0x3) 12) +#define MXC_CSPICTRL_BITCOUNT(x) (((x) 0xfff) 20) +#define MXC_CSPICTRL_PREDIV(x) (((x) 0xF) 12) +#define MXC_CSPICTRL_POSTDIV(x)(((x) 0xF) 8) +#define MXC_CSPICTRL_SELCHAN(x)(((x) 0x3) 18) +#define MXC_CSPICTRL_MAXBITS 0xfff +#define MXC_CSPICTRL_TC(1 7) +#define MXC_CSPICTRL_RXOVF (1 6) + +/* Bit position inside CTRL register to be associated with SS */ +#define MXC_CSPICTRL_CHAN 18 + +/* Bit position inside CON register to be associated with SS */ +#define MXC_CSPICON_POL4 +#define MXC_CSPICON_PHA0 +#define MXC_CSPICON_SSPOL 12 + +static unsigned long spi_bases[] = { + CSPI1_BASE_ADDR, + CSPI2_BASE_ADDR, + CSPI3_BASE_ADDR, +}; +#else +#error Unsupported architecture #endif struct mxc_spi_slave { struct spi_slave slave; unsigned long base; u32 ctrl_reg; + u32 cfg_reg; int gpio; }; @@ -89,71 +132,262 @@ static inline void reg_write(unsigned long addr, u32 val) *(volatile unsigned long*)addr = val; } -static u32 spi_xchg_single(struct spi_slave *slave, u32 data, int bitlen, - unsigned long flags) +void spi_cs_activate(struct spi_slave *slave) { +#ifdef CONFIG_MX31 struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); - unsigned int cfg_reg = reg_read(mxcs-base + MXC_CSPICTRL); - - mxcs-ctrl_reg = (mxcs-ctrl_reg ~MXC_CSPICTRL_BITCOUNT(31)) | - MXC_CSPICTRL_BITCOUNT(bitlen - 1); + if (mxcs-gpio 0) + mx31_gpio_set(mxcs-gpio, mxcs-ctrl_reg MXC_CSPICTRL_SSPOL); +#endif +} - if (cfg_reg != mxcs-ctrl_reg) - reg_write(mxcs-base + MXC_CSPICTRL, mxcs-ctrl_reg); +void spi_cs_deactivate(struct spi_slave *slave) +{ + struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); +#ifdef CONFIG_MX31 + if (mxcs-gpio 0) + mx31_gpio_set(mxcs-gpio, + !(mxcs-ctrl_reg MXC_CSPICTRL_SSPOL)); +#endif + reg_write(mxcs-base + MXC_CSPICTRL, 0); +} - if (mxcs-gpio 0 (flags SPI_XFER_BEGIN)) - mx31_gpio_set(mxcs-gpio, mxcs-ctrl_reg MXC_CSPICTRL_SSPOL); +static s32 spi_cfg(struct mxc_spi_slave *mxcs, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + u32 clk_src = mxc_get_clock(MXC_CSPI_CLK); + s32 pre_div = 0, post_div = 0, i, reg_ctrl, reg_config; + u32 ss_pol = 0, sclkpol = 0, sclkpha =
[U-Boot] [PATCH] Added MC13892VK Power Management driver
Added SPI driver for the Power Management Controller used with i.MX51 Processor. Signed-off-by: Stefano Babic sba...@denx.de --- drivers/misc/Makefile |1 + drivers/misc/mc13892_spi_pmic.c | 134 +++ include/mc13892.h | 149 +++ 3 files changed, 284 insertions(+), 0 deletions(-) create mode 100644 drivers/misc/mc13892_spi_pmic.c create mode 100644 include/mc13892.h diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index f6df60f..5847262 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -31,6 +31,7 @@ COBJS-$(CONFIG_FSL_LAW) += fsl_law.o COBJS-$(CONFIG_NS87308) += ns87308.o COBJS-$(CONFIG_STATUS_LED) += status_led.o COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o +COBJS-$(CONFIG_MC13892_SPI_PMIC) += mc13892_spi_pmic.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/misc/mc13892_spi_pmic.c b/drivers/misc/mc13892_spi_pmic.c new file mode 100644 index 000..f095fcc --- /dev/null +++ b/drivers/misc/mc13892_spi_pmic.c @@ -0,0 +1,134 @@ +/* + * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include config.h +#include common.h +#include spi.h +#include asm/errno.h +#include linux/types.h + +u32 mc13892_reg(struct spi_slave *slave, u32 reg, u32 val, u32 write) +{ + char tx[4]; + char rx[4]; + int i; + u32 tmp, pmic_tx, pmic_rx; + + if (!slave) + return 0; + + if (reg 63 || write 1) { + printf(reg num = %d is invalid. Should be less then 63\n, + reg); + return 0; + } + pmic_tx = (write 31) | (reg 25) | (val 0x00FF); + debug(reg=0x%x, val=0x%08x\n, reg, pmic_tx); + + tmp = pmic_tx; + for (i = 0; i 4; i++) { + tx[i] = (tmp 0xFF00) 24; + tmp = 8; + } + + if (spi_xfer(slave, 4 3, tx, rx, + SPI_XFER_BEGIN | SPI_XFER_END)) { + return -1; + } + + if (write) { + tx[0] = ~(1 31); + if (spi_xfer(slave, 4 3, tx, rx, + SPI_XFER_BEGIN | SPI_XFER_END)) { + return -1; + } + } + + pmic_rx = (rx[0] 24) | (rx[1] 16) | (rx[2] 8) | rx[3]; + debug(reg=0x%x, val_read=0x%08x 0x%x 0x%x 0x%x 0x%x\n, + reg, pmic_rx, rx[0], rx[1], rx[2], rx[3]); + return pmic_rx; +} + +void mc13892_show_pmic_info(struct spi_slave *slave) +{ + volatile u32 rev_id; + + if (!slave) + return; + + rev_id = mc13892_reg(slave, 7, 0, 0); + debug(PMIC ID: 0x%08x [Rev: , rev_id); + switch (rev_id 0x1F) { + case 0x1: + puts(1.0); + break; + case 0x9: + puts(1.1); + break; + case 0xA: + puts(1.2); + break; + case 0x10: + puts(2.0); + break; + case 0x11: + puts(2.1); + break; + case 0x18: + puts(3.0); + break; + case 0x19: + puts(3.1); + break; + case 0x1A: + puts(3.2); + break; + case 0x2: + puts(3.2A); + break; + case 0x1B: + puts(3.3); + break; + case 0x1D: + puts(3.5); + break; + default: + puts(unknown); + break; + } + puts(]\n); +} + +struct spi_slave *mc13892_spi_probe(void) +{ + return spi_setup_slave(CONFIG_MC13892_SPI_PMIC_BUS, + CONFIG_MC13892_SPI_PMIC_CS, + CONFIG_MC13892_SPI_PMIC_CLK, + CONFIG_MC13892_SPI_PMIC_MODE); +} + +void mc13892_spi_free(struct spi_slave *slave) +{ + if (slave) + spi_free_slave(slave); +} diff --git a/include/mc13892.h b/include/mc13892.h new file mode 100644 index 000..b57e07b --- /dev/null +++ b/include/mc13892.h @@ -0,0 +1,149 @@ +/* + * (C) Copyright 2010 + * Stefano Babic, DENX
[U-Boot] [PATCH] Add SPI support to mx51evk board
The patch adds SPI devices to the mx51evk board. Two devices are supported: Atmel SPI flash and MC13892 power controller. Signed-off-by: Stefano Babic sba...@denx.de --- board/freescale/mx51evk/mx51evk.c | 178 + include/configs/mx51evk.h | 17 2 files changed, 195 insertions(+), 0 deletions(-) diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 8754563..b52dedb 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -27,9 +27,11 @@ #include asm/arch/iomux.h #include asm/errno.h #include asm/arch/sys_proto.h +#include asm/arch/crm_regs.h #include i2c.h #include mmc.h #include fsl_esdhc.h +#include mc13892.h #include mx51evk.h DECLARE_GLOBAL_DATA_PTR; @@ -213,6 +215,167 @@ static void setup_iomux_fec(void) mxc_iomux_set_pad(MX51_PIN_NANDF_D11, 0x2180); } +#ifdef CONFIG_MXC_SPI +static void setup_iomux_spi(int cs) +{ + /* 000: Select mux mode: ALT0 mux port: MOSI of instance: ecspi1 */ + mxc_request_iomux(MX51_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_MOSI, 0x105); + + /* 000: Select mux mode: ALT0 mux port: MISO of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_MISO, 0x105); + + if (cs == 0) { + /* de-select SS1 of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS1, 0x85); + /* 000: Select mux mode: ALT0 mux port: SS0 ecspi1 */ + mxc_request_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0, 0x185); + } else if (cs == 1) { + /* de-select SS0 of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0, 0x85); + /* 000: Select mux mode: ALT0 mux port: SS1 ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS1, 0x105); + } + + /* 000: Select mux mode: ALT0 mux port: RDY of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_RDY, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_RDY, 0x180); + + /* 000: Select mux mode: ALT0 mux port: SCLK of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SCLK, 0x105); +} +#endif + +static void power_init(void) +{ + struct spi_slave *slave; + unsigned int val; + unsigned int reg; + u32 atlas_id; + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE; + +#define REV_ATLAS_LITE_1_00x8 +#define REV_ATLAS_LITE_1_10x9 +#define REV_ATLAS_LITE_2_00x10 +#define REV_ATLAS_LITE_2_10x11 + + slave = mc13892_spi_probe(); + + /* Write needed to Power Gate 2 register */ + val = mc13892_reg_read(slave, MC13892_REG_POWER_MISC); + val = ~0x1; + mc13892_reg_write(slave, MC13892_REG_POWER_MISC, val); + + /* Write needed to update Charger 0 */ + mc13892_reg_write(slave, MC13892_REG_CHARGE, 0x0023807F); + + /* power up the system first */ + mc13892_reg_write(slave, MC13892_REG_POWER_MISC, 0x0020); + + if (is_soc_rev(CHIP_REV_2_0) = 0) { + /* Set core voltage to 1.1V */ + val = mc13892_reg_read(slave, MC13892_REG_SW_0); + val = (val (~0x1F)) | 0x14; + mc13892_reg_write(slave, MC13892_REG_SW_0, val); + + /* Setup VCC (SW2) to 1.25 */ + val = mc13892_reg_read(slave, MC13892_REG_SW_1); + val = (val (~0x1F)) | 0x1A; + mc13892_reg_write(slave, MC13892_REG_SW_1, val); + + /* Setup 1V2_DIG1 (SW3) to 1.25 */ + val = mc13892_reg_read(slave, MC13892_REG_SW_2); + val = (val (~0x1F)) | 0x1A; + mc13892_reg_write(slave, MC13892_REG_SW_2, val); + udelay(50); + /* Raise the core frequency to 800MHz */ + writel(0x0, mxc_ccm-cacrr); + } else { + /* TO 3.0 */ + /* Setup VCC (SW2) to 1.225 */ + val = mc13892_reg_read(slave, MC13892_REG_SW_1); + val = (val (~0x1F)) | 0x19; + mc13892_reg_write(slave, MC13892_REG_SW_1, val); + + /* Setup 1V2_DIG1 (SW3) to 1.2 */ + val = mc13892_reg_read(slave, MC13892_REG_SW_2); + val = (val (~0x1F)) | 0x18; + mc13892_reg_write(slave, MC13892_REG_SW_2, val); + } + + atlas_id = mc13892_reg_read(slave, MC13892_REG_IDENTIFICATION); + if (((atlas_id 0x1F) REV_ATLAS_LITE_2_0) || +
[U-Boot] [PATCH] MX51: Moved board specific values in config file
The lowlevel_init file contained some hard-coded values to setup the RAM. These board related values are moved into the board configuration file. Signed-off-by: Stefano Babic sba...@denx.de --- cpu/arm_cortexa8/mx51/lowlevel_init.S |5 - include/configs/mx51evk.h |3 +++ 2 files changed, 7 insertions(+), 1 deletions(-) diff --git a/cpu/arm_cortexa8/mx51/lowlevel_init.S b/cpu/arm_cortexa8/mx51/lowlevel_init.S index 31af9e2..1e393bb 100644 --- a/cpu/arm_cortexa8/mx51/lowlevel_init.S +++ b/cpu/arm_cortexa8/mx51/lowlevel_init.S @@ -158,6 +158,7 @@ /* Switch peripheral to PLL 3 */ ldr r0, =CCM_BASE_ADDR ldr r1, =0x10C0 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] ldr r1, =0x13239145 str r1, [r0, #CLKCTL_CBCDR] @@ -171,6 +172,7 @@ ldr r1, =0x19239145 str r1, [r0, #CLKCTL_CBCDR] ldr r1, =0x20C0 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] mov r3, #DP_OP_216 @@ -201,9 +203,10 @@ /* setup the rest */ /* Use lp_apm (24MHz) source for perclk */ ldr r1, =0x20C2 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] /* ddr clock from PLL 1, all perclk dividers are 1 since using 24MHz */ - ldr r1, =0x59E35100 + ldr r1, =CONFIG_SYS_CLKTL_CBCDR str r1, [r0, #CLKCTL_CBCDR] /* Restore the default values in the Gate registers */ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index e2daeca..5096ab7 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -177,6 +177,9 @@ #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) +#define CONFIG_SYS_DDR_CLKSEL 0 +#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 + /*--- * FLASH and environment organization */ -- 1.6.3.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] nios2: add unaligned.h to be included by zlib.c
Thomas, This patch ignored due to your subsequent patch (03/14/2010). Regards, --Scott Thomas Chou wrote: Signed-off-by: Thomas Chou tho...@wytron.com.tw --- include/asm-nios2/unaligned.h | 19 +++ 1 files changed, 19 insertions(+), 0 deletions(-) create mode 100644 include/asm-nios2/unaligned.h diff --git a/include/asm-nios2/unaligned.h b/include/asm-nios2/unaligned.h new file mode 100644 index 000..483dd04 --- /dev/null +++ b/include/asm-nios2/unaligned.h @@ -0,0 +1,19 @@ +#ifndef _ASM_NIOS2_UNALIGNED_H +#define _ASM_NIOS2_UNALIGNED_H + +#include linux/unaligned/le_byteshift.h +#include linux/unaligned/be_byteshift.h +#include linux/unaligned/generic.h + +/* + * Select endianness + */ +#ifndef __NIOS2EB__ +#define get_unaligned__get_unaligned_le +#define put_unaligned__put_unaligned_le +#else +#define get_unaligned__get_unaligned_be +#define put_unaligned__put_unaligned_be +#endif + +#endif /* _ASM_NIOS2_UNALIGNED_H */ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] nios2: asm-nios2/unaligned.h uses generic one
Applied. Best Regards, --Scott Thomas Chou wrote: The patch follows the asm-generic/unaligned.h patch from Mike Frysigner. Signed-off-by: Thomas Chou tho...@wytron.com.tw --- include/asm-nios2/unaligned.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) create mode 100644 include/asm-nios2/unaligned.h diff --git a/include/asm-nios2/unaligned.h b/include/asm-nios2/unaligned.h new file mode 100644 index 000..6cecbbb --- /dev/null +++ b/include/asm-nios2/unaligned.h @@ -0,0 +1 @@ +#include asm-generic/unaligned.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Load code in U-Boot for mpc5121e
Hi, I am quiet new with embedded linux so I was wondering if someone can help me with my issue. I am trying to load a c code on the mpc5121e processor found on the ADS5121 board. The only connection between my board and my host (Linux PC) is a serial cable and an Ethernet cable. I am trying to turn on the LEDs on the board, but for some reason I am not able to debug my code. I have been told that I either have to purchase an EthernetTAP or a USBTAP, or I should try to load the code in U-Boot. So I was wondering if someone can tell me how to load my code in U-Boot. Thank you. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] TI: Davinci: NAND Driver Cleanup
Hi Scott, Configuring for davinci_schmoogie board... ... Should be lowercase? Thank you. I will be sending out a v2 shortly, and this time around all 8 davinci based boards build fine. Also, any particular reason to use the raw version of the accessors? Please correct me if I am wrong here, but my understanding is that the raw variants are for native-endian access, while the non-raw ones could potentially force little-endian conversions for PCI. If so, since these on-chip registers must always be accessed native-endian, I felt that the raw accessors would be appropriate. Any thoughts? Regards Cyril. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/1] TI: Davinci: NAND Driver Cleanup
Modified to use IO accessor routines consistently. Eliminated volatile usage to keep checkpatch.pl happy. Signed-off-by: Cyril Chemparathy cy...@ti.com --- 1. Added fixes for DA830 EVM and Davinci Schmoogie boards 2. Reverted to include davinci_emif_regs macro definition board/davinci/da830evm/da830evm.c|2 +- drivers/mtd/nand/davinci_nand.c | 125 -- include/asm-arm/arch-davinci/emif_defs.h | 80 +-- 3 files changed, 105 insertions(+), 102 deletions(-) diff --git a/board/davinci/da830evm/da830evm.c b/board/davinci/da830evm/da830evm.c index ed668af..6385443 100644 --- a/board/davinci/da830evm/da830evm.c +++ b/board/davinci/da830evm/da830evm.c @@ -150,7 +150,7 @@ int board_init(void) DAVINCI_ABCR_RHOLD(0) | DAVINCI_ABCR_TA(2) | DAVINCI_ABCR_ASIZE_8BIT), - davinci_emif_regs-AB2CR); + davinci_emif_regs-ab2cr); #endif /* arch number of the board */ diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index bfc2acf..1b2141b 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -57,8 +57,6 @@ #define ECC_STATE_ERR_CORR_COMP_P 0x2 #define ECC_STATE_ERR_CORR_COMP_N 0x3 -static emif_registers *const emif_regs = (void *) DAVINCI_ASYNC_EMIF_CNTRL_BASE; - /* * Exploit the little endianness of the ARM to do multi-byte transfers * per device read. This can perform over twice as quickly as individual @@ -93,7 +91,7 @@ static void nand_davinci_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) /* copy aligned data */ while (len = 4) { - *(u32 *)buf = readl(nand); + *(u32 *)buf = __raw_readl(nand); buf += 4; len -= 4; } @@ -138,7 +136,7 @@ static void nand_davinci_write_buf(struct mtd_info *mtd, const uint8_t *buf, /* copy aligned data */ while (len = 4) { - writel(*(u32 *)buf, nand); + __raw_writel(*(u32 *)buf, nand); buf += 4; len -= 4; } @@ -156,7 +154,8 @@ static void nand_davinci_write_buf(struct mtd_info *mtd, const uint8_t *buf, } } -static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) +static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, + unsigned int ctrl) { struct nand_chip *this = mtd-priv; u_int32_t IO_ADDR_W = (u_int32_t)this-IO_ADDR_W; @@ -164,9 +163,9 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int c if (ctrl NAND_CTRL_CHANGE) { IO_ADDR_W = ~(MASK_ALE|MASK_CLE); - if ( ctrl NAND_CLE ) + if (ctrl NAND_CLE) IO_ADDR_W |= MASK_CLE; - if ( ctrl NAND_ALE ) + if (ctrl NAND_ALE) IO_ADDR_W |= MASK_ALE; this-IO_ADDR_W = (void __iomem *) IO_ADDR_W; } @@ -181,24 +180,25 @@ static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode) { u_int32_t val; - (void)readl((emif_regs-NANDFECC[CONFIG_SYS_NAND_CS - 2])); + (void)__raw_readl((davinci_emif_regs-nandfecc[CONFIG_SYS_NAND_CS - 2])); - val = readl(emif_regs-NANDFCR); + val = __raw_readl(davinci_emif_regs-nandfcr); val |= DAVINCI_NANDFCR_NAND_ENABLE(CONFIG_SYS_NAND_CS); val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS); - writel(val, emif_regs-NANDFCR); + __raw_writel(val, davinci_emif_regs-nandfcr); } static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region) { u_int32_t ecc = 0; - ecc = readl((emif_regs-NANDFECC[region - 1])); + ecc = __raw_readl((davinci_emif_regs-nandfecc[region - 1])); - return(ecc); + return ecc; } -static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) +static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, + u_char *ecc_code) { u_int32_t tmp; const int region = 1; @@ -232,7 +232,8 @@ static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u return 0; } -static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc) +static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat, + u_char *read_ecc, u_char *calc_ecc) { struct nand_chip *this = mtd-priv; u_int32_t ecc_nand = read_ecc[0] | (read_ecc[1] 8) | @@ -268,7 +269,7 @@ static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat, u_char * return -1; } } - return(0); + return 0; } #endif /* CONFIG_SYS_NAND_HW_ECC */ @@ -315,15 +316,15
Re: [U-Boot] EABI 4.2
On Fri, Mar 12, 2010 at 11:12 AM, Praveen G K praveen...@gmail.com wrote: On Fri, Mar 12, 2010 at 3:04 AM, Detlev Zundel d...@denx.de wrote: Hi Praveen, So, should I send a message to the gcc mailing list explaining the issue? Yes please. Thanks! Detlev OK Have sent a message to the gcc-bugs mailing list. I hope this is the right one. http://gcc.gnu.org/ml/gcc-bugs/2010-03/msg01155.html I have not received any updates from the gcc mailing list. Has anyone got any more ideas on this? Thanks! #define KSAMTIB_CIGAM_2SFFJ 0x8519 /* For detecting wrong-endian fs */ -- include/linux/jffs2.h -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] add new board pm9g45
Dear Asen Dimov, In message 1268744233-2497-1-git-send-email-di...@ronetix.at you wrote: Hello everyone, here is the new board PM9G45 from Ronetix GmbH, based on at91sam9g45 MCU. It has 128MB DDR2 SDRAM, 256MB NAND, could be with or without DataFlash. The board is made as SODIMM200 module. For more info www.ronatix.at or i...@ronetix.at. Regards, Asen You sent a similar patch les than one hour before this one. None of your patches includes any indication what they are - if you are resubmitting a patch, you are suppoosed to mark it as [PATCH v2] or [PATCH v3] or similar in the Subject: line. Signed-off-by: Asen Dimov di...@ronetix.at --- MAKEALL|1 + ... Also, you are supposed to include a descripotion of what has been changed compared to the previous version(s) of the patch here, below the --- line. At fist glance, the two patches look identical to me. Do you expect me to scan through some 1500+ lines of patches to check which lines or characters might have changed? Also, a commit message including Hello everyone, and Regards, Asen is not exactly useful. Please omit this in patches. --- MAKEALL|1 + Makefile |4 + board/ronetix/pm9g45/Makefile | 54 +++ .../at91sam9m10g45ek = ronetix/pm9g45}/config.mk |0 board/ronetix/pm9g45/pm9g45.c | 365 include/configs/pm9g45.h | 246 + 6 files changed, 670 insertions(+), 0 deletions(-) create mode 100644 board/ronetix/pm9g45/Makefile copy board/{atmel/at91sam9m10g45ek = ronetix/pm9g45}/config.mk (100%) create mode 100644 board/ronetix/pm9g45/pm9g45.c create mode 100644 include/configs/pm9g45.h MAINTAINERS entry is missing. diff --git a/board/atmel/at91sam9m10g45ek/config.mk b/board/ronetix/pm9g45/config.mk similarity index 100% copy from board/atmel/at91sam9m10g45ek/config.mk copy to board/ronetix/pm9g45/config.mk diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c new file mode 100644 index 000..d11f40f --- /dev/null +++ b/board/ronetix/pm9g45/pm9g45.c @@ -0,0 +1,365 @@ +/* + * (C) Copyright 2005-2010 + * Ilko Iliev il...@ronetix.at + * Asen Dimov di...@ronetix.at + * Ronetix GmbH www.ronetix.at 2005- ? Is this really correct? + writel(pin_to_mask(AT91_PIN_PA15), + pin_to_controller(AT91_PIN_PA0) + PIO_PUDR); + writel(pin_to_mask(AT91_PIN_PA12) | + pin_to_mask(AT91_PIN_PA13), + pin_to_controller(AT91_PIN_PA0) + PIO_PUDR); + + /* Re-enable pull-up */ + writel(pin_to_mask(AT91_PIN_PA15), + pin_to_controller(AT91_PIN_PA0) + PIO_PUER); + writel(pin_to_mask(AT91_PIN_PA12) | + pin_to_mask(AT91_PIN_PA13), + pin_to_controller(AT91_PIN_PA0) + PIO_PUER); The use of base address plus offset is deprecated. Please use C strucxts to desribe the register layout. +#ifdef CONFIG_LCD +/* + * LCD name TX09D50VM1CCA + */ +vidinfo_t panel_info = { + vl_col: 240, + vl_row: 320, + vl_clk: 4965000, + vl_sync:ATMEL_LCDC_INVLINE_NORMAL | + ATMEL_LCDC_INVFRAME_NORMAL, + vl_bpix:3, + vl_tft: 1, + vl_hsync_len: 5, + vl_left_margin: 1, + vl_right_margin:33, + vl_vsync_len: 1, + vl_upper_margin:1, + vl_lower_margin:0, + mmio: AT91SAM9G45_LCDC_BASE, +}; This information should not be board-specific. The panel information is generic and should moved to a separate header file that is not part of the board code. ... +} + +#ifdef CONFIG_LCD_INFO +#include nand.h +#include version.h Please move #includes to the top of the file. +#ifdef CONFIG_HAS_DATAFLASH + dataflash_size = 0; + for (i = 0; i CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) + dataflash_size += (unsigned int) dataflash_info[i].Device.pages_number * + dataflash_info[i].Device.pages_size; +#endif Line too long. Please check and fix globally. Also, multiline statements require curly braces. +void spi_cs_activate(struct spi_slave *slave) +{ + switch(slave-cs) { + case 1: + at91_set_gpio_output(AT91_PIN_PB18, 0); + break; + case 0: + default: + at91_set_gpio_output(AT91_PIN_PB3, 0); + break; + } +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + switch(slave-cs) { + case 1: + at91_set_gpio_output(AT91_PIN_PB18, 1); + break; + case 0: + default: + at91_set_gpio_output(AT91_PIN_PB3, 1); + break; + } +} Incorrect
Re: [U-Boot] [PATCH] ARM1176: Coexist with other ARM1176 platforms
Tom, I was not able to access this link But, yes, please include this patch as part of the tnetv107x patchset. Sure. I will include this with the larger TNETV107X patchset and submit. Until then, a code preview can be found at http://arago-project.org/git/people/?p=cyril/u-boot-tnetv107x.git;a=commit;h=0ab8eaa7c4c4472d64f9f401fc2f091dca955abc (included a non-shortened URL this time). Ok. Obviously it is better to generalize than to make off-by-one copies but not if there are not enough similarities to make it work.. Absolutely. In this particular case, it just happens to be the latter. My concern is that start.S, because it came originally from s3c64xx, may need to either generalized or split up. With s3c64xx parts moving to SOC layer. Assembly is complicated enough without having #if-def's and if can be done in C it should. Indeed start.S needed to be generalized to an extent. Further, since similar generalizations existed on other ARM platforms, I figured it would be best to stick with the same scheme. My only reservation is with the whole peripheral port remap thing. I think that this should ideally be moved into SOC specific lowlevel_init. However, I did not want to mangle up s3c64xx code too much by moving stuff around in this manner. Any thoughts on this specific concern? Please review http://www.denx.de/wiki/U-Boot/Patches, clean up the patchset and submit, having another arm1176 soc will be great. Will do. Thanks. Cyril. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] cross compiling fw_printenv on big endian
I seem to be having a problem with fw_printenv on my PowerPC 85xx target whereby I constantly get CRC32 errors: # fw_printenv Warning: Bad CRC, using default environment I tracked this down to the fact that u-boot/lib_generic/crc32.c is getting compiled with the __LITTLE_ENDIAN defined even though I have CROSS_COMPILE setup correctly [e.g. I can build u-boot.bin just fine]. Is there a special way to cross compile fw_printenv so that the __LITTLE_ENDIAN is not defined? Are there other PowerPC users that are building fw_printenv? I'd rather do the proper thing than resort of hacking the crc32.c file. -- Jeff Angielski The PTR Group www.theptrgroup.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] TI: Davinci: NAND Driver Cleanup
Chemparathy, Cyril wrote: Please correct me if I am wrong here, but my understanding is that the raw variants are for native-endian access, while the non-raw ones could potentially force little-endian conversions for PCI. The non-raw ones also provide ordering on some architectures, though I don't think this matters on ARM. Unfortunately there doesn't seem to be an arch-neutral way to unbundle these. If so, since these on-chip registers must always be accessed native-endian, I felt that the raw accessors would be appropriate. OK. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] PATCH - Added support to YANU Nios2 uart (02)
Renato, Patch applied to the nios2 tree. I think it's time to consider moving the nios2 header files into include/asm-nios before the top-level include gets too polluted. Regards, --Scott Renato Andreola wrote: From d7a79fc4e5a3ebc6a1ca5c23500e3f2f1c3b33c2 Mon Sep 17 00:00:00 2001 From: Renato Andreola renato.andre...@imagos.it Date: Mon, 24 Aug 2009 16:03:51 +0200 Subject: [PATCH] Yanu Support for U-Boot with this patch YANU uart (from opencores) support will be added to u-boot. Remember to modify properly your board files for defining physical address etc etc Sign-off-by: Renato Andreola renato.andre...@imagos.it --- cpu/nios2/serial.c | 165 +- include/nios2-yanu.h | 115 +++ 2 files changed, 279 insertions(+), 1 deletions(-) create mode 100644 include/nios2-yanu.h diff --git a/cpu/nios2/serial.c b/cpu/nios2/serial.c index 8bbb803..467df4c 100644 --- a/cpu/nios2/serial.c +++ b/cpu/nios2/serial.c @@ -26,6 +26,7 @@ #include watchdog.h #include asm/io.h #include nios2-io.h +#include nios2-yanu.h DECLARE_GLOBAL_DATA_PTR; @@ -74,10 +75,172 @@ int serial_getc (void) return (c); } +#elif defined(CONFIG_CONSOLE_YANU) +/*-*/ +/* YANU Imagos serial port */ +/*-*/ + +static yanu_uart_t *uart = (yanu_uart_t *)CONFIG_SYS_NIOS_CONSOLE; + +#if defined(CONFIG_NIOS_FIXEDBAUD) + +/* Everything's already setup for fixed-baud PTF assignment*/ + +void serial_setbrg (void) +{ + int n, k; + const unsigned max_uns = 0x; + unsigned best_n, best_m, baud; + + /* compute best N and M couple */ + best_n = YANU_MAX_PRESCALER_N; + for (n = YANU_MAX_PRESCALER_N; n = 0; n--) { + if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 (n + 4)) = + (unsigned)CONFIG_BAUDRATE) { + best_n = n; + break; + } + } + for (k = 0;; k++) { + if ((unsigned)CONFIG_BAUDRATE = (max_uns (15+n-k))) + break; + } + best_m = + ((unsigned)CONFIG_BAUDRATE * (1 (15 + n - k))) / + ((unsigned)CONFIG_SYS_CLK_FREQ k); + + baud = best_m + best_n * YANU_BAUDE; + writel(uart-baud, baud); + + return; +} + +#else + +void serial_setbrg (void) +{ + int n, k; + const unsigned max_uns = 0x; + unsigned best_n, best_m, baud; + + /* compute best N and M couple */ + best_n = YANU_MAX_PRESCALER_N; + for (n = YANU_MAX_PRESCALER_N; n = 0; n--) { + if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 (n + 4)) = + gd-baudrate) { + best_n = n; + break; + } + } + for (k = 0;; k++) { + if (gd-baudrate = (max_uns (15+n-k))) + break; + } + best_m = + (gd-baudrate * (1 (15 + n - k))) / + ((unsigned)CONFIG_SYS_CLK_FREQ k); + + baud = best_m + best_n * YANU_BAUDE; + writel(uart-baud, baud); + + return; +} + + +#endif /* CFG_NIOS_FIXEDBAUD */ + +int serial_init (void) +{ + unsigned action,control; + + /* status register cleanup */ + action = YANU_ACTION_RRRDY | + YANU_ACTION_RTRDY | + YANU_ACTION_ROE | + YANU_ACTION_RBRK| + YANU_ACTION_RFE | + YANU_ACTION_RPE | + YANU_ACTION_RFE | YANU_ACTION_RFIFO_CLEAR | YANU_ACTION_TFIFO_CLEAR; + + writel(uart-action, action); + + /* control register cleanup */ + /* no interrupts enabled */ + /* one stop bit */ + /* hardware flow control disabled */ + /* 8 bits */ + control = (0x7 YANU_CONTROL_BITS_POS); + /* enven parity just to be clean */ + control |= YANU_CONTROL_PAREVEN; + /* we set threshold for fifo */ + control |= YANU_CONTROL_RDYDLY * YANU_RXFIFO_DLY; + control |= YANU_CONTROL_TXTHR * YANU_TXFIFO_THR; + + writel(uart-control, control); + + /* to set baud rate */ + serial_setbrg(); + + return (0); +} + + +/*--- + * YANU CONSOLE + *-*/ +void serial_putc (char c) +{ + int tx_chars; + unsigned status; + + if (c == '\n') + serial_putc ('\r'); + + while (1) { + status = readl(uart-status); + tx_chars = (statusYANU_TFIFO_CHARS_POS) + ((1YANU_TFIFO_CHARS_N)-1); + if (tx_chars YANU_TXFIFO_SIZE-1) + break; + WATCHDOG_RESET (); + } + +
Re: [U-Boot] at91sam9g45ekes SDHC/MMC
On Tue, 16 Mar 2010 08:30 -0400, Henry Súcart wrote : Here's the command I'm using and the output. I put a debugging statement in sd_init_card() after the for loop (HJS:). U-Boot mmc init 0 mmc: clock 15 too low; setting CLKDIV to 255 HJS: sd_init_card() mmc_acmd for loop finished. ret = -19, resp[0] = 0x6B200020 No MMC card found Err, well, that's weird. I have to admit I can't even guess whether it's trying to read the right slot. Could you please: 1/ add a #define DEBUG at the top of drivers/mmc/atmel_mci.c 2/ get the output of mmc init (0 or 1 doesn't matter) for both CONFIG_ATMEL_MCI1 and !CONFIG_ATMEL_MCI1 (with the SD card staying in the same slot, of course) 3/ In the process, add a debug printf in the mci driver displaying the value of MMCI_CR (you'd get that by calling mmci_readl(CR)) I'm sorry I can't help you further. Unfortunately I don't own such hardware, and this kind of thing is rather hard to debug remotely. Regards, -- Albin Tonnerre, Free Electrons Kernel, drivers and embedded Linux development, consulting, training and support. http://free-electrons.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/17] SPARC: added unaligned definitions, patch supplied by Magnus Sjalander.
On Monday 01 February 2010 12:08:51 Daniel Hellstrom wrote: Mike Frysinger wrote: there is a proposed asm-generic/unaligned.h on the mailing list which i think you could use. you'd just need: #include asm-generic/unaligned.h Thank you for your comment, I will update this patch. the generic unaligned.h has been merged if you want to post your one-line patch now ... -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] at91sam9g45ekes SDHC/MMC
I put the printf you asked for in sd_init_card, right after the for loop. Here's the output: With #define CONFIG_ATMEL_MCI1 1 U-Boot mmc init 0 mmc: setting clock 15 Hz, block size 512 mmc: clock 15 too low; setting CLKDIV to 255 mmc: CMD0 0x0 (flags 0x0) mmc: status 0x0c25 mmc: CMD0 0x0 (flags 0x100) mmc: status 0x0c25 mmc: CMD55 0x0 (flags 0x1040) mmc: status 0x0c25 mmc: response: HJS: MMCI_CR = 0 HJS: sd_init_card() mmc_acmd after for loop. ret: -19, resp[0] = 0x6B200020 mmc: CMD0 0x0 (flags 0x0) mmc: status 0x0c25 mmc: CMD0 0x0 (flags 0x100) mmc: status 0x0c25 mmc: CMD1 0x10 (flags 0x841) mmc: status 0x0c25 mmc: response: ...This keeps going for a while and at the end... mmc: CMD1 0x10 (flags 0x841) mmc: status 0x0c25 mmc: response: No MMC card found With #define CONFIG_ATMEL_MCI1 0 U-Boot mmc init 0 mmc: setting clock 15 Hz, block size 512 mmc: clock 15 too low; setting CLKDIV to 255 mmc: CMD0 0x0 (flags 0x0) mmc: status 0x0c25 mmc: CMD0 0x0 (flags 0x100) mmc: status 0x0c25 mmc: CMD55 0x0 (flags 0x1040) mmc: status 0x0c25 mmc: response: HJS: MMCI_CR = 0 HJS: sd_init_card() mmc_acmd after for loop. ret: -19, resp[0] = 0x6B200020 mmc: CMD0 0x0 (flags 0x0) mmc: status 0x0c25 mmc: CMD0 0x0 (flags 0x100) mmc: status 0x0c25 mmc: CMD1 0x10 (flags 0x841) mmc: status 0x0c25 mmc: response: mmc: CMD1 0x10 (flags 0x841) mmc: status 0x0c25 mmc: response: mmc: CMD1 0x10 (flags 0x841) mmc: status 0x0c25 mmc: response: mmc: CMD1 0x10 (flags 0x841) mmc: status 0x0c25 mmc: response: mmc: CMD1 0x10 (flags 0x841) mmc: status 0x0c25 mmc: response: ...This keeps going for a while and at the end... mmc: CMD1 0x10 (flags 0x841) mmc: status 0x0c25 mmc: response: No MMC card found If i take out the #define CONFIG_ATMEL_MCI1 U-Boot mmc init 0 mmc: setting clock 15 Hz, block size 512 mmc: clock 15 too low; setting CLKDIV to 255 mmc: CMD0 0x0 (flags 0x0) mmc: status 0x0c25 mmc: CMD0 0x0 (flags 0x100) mmc: status 0x0c25 mmc: CMD55 0x0 (flags 0x1040) mmc: status 0x0c25 mmc: response: 0120 mmc: CMD41 0x10 (flags 0x41) mmc: status 0x0c040025 mmc: response: 00ff8000 mmc: CMD55 0x0 (flags 0x1040) mmc: status 0x0c25 mmc: response: 0120 mmc: CMD41 0x10 (flags 0x41) mmc: status 0x0c040025 mmc: response: 00ff8000 ... Goes on for a while... HJS: MMCI_CR = 0 HJS: sd_init_card() mmc_acmd for loop ret: -110, resp[0] = 0x00FF8000 mmc: CMD0 0x0 (flags 0x0) mmc: status 0x0c25 mmc: CMD0 0x0 (flags 0x100) mmc: status 0x0c25 mmc: CMD1 0x10 (flags 0x841) mmc: status 0x0c100025 mmc: command 1 failed (status: 0x0c100025) HJS: error_flags: 0x005B, status error_flags: 0x0010 HJS: mmc_init_card() ret = -5 HJS: mmc_init_card failed No MMC card found In all of them I used the slot J6. I tried it with J5 too but it did the same thing. On Tue, Mar 16, 2010 at 4:36 PM, Albin Tonnerre albin.tonne...@free-electrons.com wrote: On Tue, 16 Mar 2010 08:30 -0400, Henry Súcart wrote : Here's the command I'm using and the output. I put a debugging statement in sd_init_card() after the for loop (HJS:). U-Boot mmc init 0 mmc: clock 15 too low; setting CLKDIV to 255 HJS: sd_init_card() mmc_acmd for loop finished. ret = -19, resp[0] = 0x6B200020 No MMC card found Err, well, that's weird. I have to admit I can't even guess whether it's trying to read the right slot. Could you please: 1/ add a #define DEBUG at the top of drivers/mmc/atmel_mci.c 2/ get the output of mmc init (0 or 1 doesn't matter) for both CONFIG_ATMEL_MCI1 and !CONFIG_ATMEL_MCI1 (with the SD card staying in the same slot, of course) 3/ In the process, add a debug printf in the mci driver displaying the value of MMCI_CR (you'd get that by calling mmci_readl(CR)) I'm sorry I can't help you further. Unfortunately I don't own such hardware, and this kind of thing is rather hard to debug remotely. Regards, -- Albin Tonnerre, Free Electrons Kernel, drivers and embedded Linux development, consulting, training and support. http://free-electrons.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] EABI 4.2
Hello. I have not received any updates from the gcc mailing list. Has anyone got any more ideas on this? Thanks! Out of curiosity, I tried to reproduce the problem. I added EXT2 to my binary and recompiled with eldk-4.2. As a reminder, this is the source: if (dirent.namelen != 0) { char filename[dirent.namelen + 1]; ext2fs_node_t fdiro; int type = FILETYPE_UNKNOWN; status = ext2fs_read_file (diro, fpos + sizeof (struct ext2_dirent), dirent.namelen, filename); Note that namelen is a uint8_t. What follows is the disassembled u-boot. My comments follow each groups of lines. a182025c: e55b2026ldrbr2, [fp, #-38] a1820260: e352cmp r2, #0 ; 0x0 a1820264: 0a77beq a1820448 ext2fs_iterate_dir+0x254 [so r2 is namelen] a1820268: e282300fadd r3, r2, #15 ; 0xf a182026c: e2033f7eand r3, r3, #504; 0x1f8 so here r3 is (namelen + 0xf) 0x1f8 . I don't understand the 0x1f8 since r2 was known to be 8 bits at most. a1820270: e50bd034str sp, [fp, #-52] a1820274: e063d00drsb sp, r3, sp stack pointer has been saved, and sp takes sp - r3. Looks fine. a1820278: e1a041adlsr r4, sp, #3 a182027c: e51b3030ldr r3, [fp, #-48] a1820280: e1a0a184lsl sl, r4, #3 shift back and forth to align sp (ldr r3 in the middle is fpos, used in building arguments for ext2fs_read_file). a1820284: e1a7mov r0, r7 a1820288: e2831008add r1, r3, #8 ; 0x8 a182028c: e1a0300amov r3, sl a1820290: ebfffe77bl a181fc74 ext2fs_read_file So everything looks fine. I also tried a standalone program with both a uint16_t and the official uint8_t namelen and it works fine (there is no 0x1f8 any more in the assembly for 16-bit lengths). In that test the callee has a stack pointer which is as low as needed according to the namelen used by the caller. Therefore, I suspect your problem can come out of ext2fs_read_file. However, the calculations there look good to me (actually, everybody uses them, so they must be good for normal uses). However, in ext2fs_read_file, there might be an issue in the first block (which is not stored on disk but is zero filled instead): memset (buf, 0, blocksize - skipfirst); should be memset (buf, 0, blockend - skipfirst); where blockend is == blocksize but might be shorter in the last block of the read. So if you are reading a dirent in the first block you might have a problem of stack overflow. But I don't expect you'll read a dirent from first block, and even if it was, then namelen would be zero as well. I suspect your problem is elsewhere, although I can't imagine where, as this code doesn't look like something that can stack overflow even if misused. /alessandro ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Load code in U-Boot for mpc5121e
In my opinion, you could use kermit to send your binary file into ram, for instance 0x20,via serial connection, and then use u-boot command go 0x20 Hope that helps you. Best, regards Rui On Wed, Mar 17, 2010 at 1:26 AM, James Smith bb...@yahoo.com wrote: Hi, I am quiet new with embedded linux so I was wondering if someone can help me with my issue. I am trying to load a c code on the mpc5121e processor found on the ADS5121 board. The only connection between my board and my host (Linux PC) is a serial cable and an Ethernet cable. I am trying to turn on the LEDs on the board, but for some reason I am not able to debug my code. I have been told that I either have to purchase an EthernetTAP or a USBTAP, or I should try to load the code in U-Boot. So I was wondering if someone can tell me how to load my code in U-Boot. Thank you. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot