Re: [U-Boot] [PATCH] S5P: mmc: Resolved interrupt error during mmc_init
Hi Andy, On Sun, Apr 3, 2011 at 4:49 PM, Minkyu Kang proms...@gmail.com wrote: Dear Raffaele Recalcati, On 3 April 2011 13:39, Raffaele Recalcati lamiapost...@gmail.com wrote: Hi Minkyu, I have sent some patches about mmc and reviewed one, can you please tell me what to do mainline them? 11 mar : [PATCH 1/3][v3] mmc: checking status after commands with R1b response -- it has one Tested-by [RFC 2/3][v3] mmc: SEND_OP_COND considers card capabilities (voltage) -- it has one Tested-by [PATCH 3/3][v3] mmc: trace added -- useful for getting information 23 mar : [U-Boot] [PATCH] MMC may wrongly regconize 2GB eMMC as high capacity -- I have reviewed and proposed a different, I think better and simpler, way. There is a curious dependency between capacity and high_capacity variables. I'm not a maintainer of mmc. Please ask to Andy Fleming. Andy, could you please check Raffaele's patches? Thanks Minkyu Kang. -- from. prom. www.promsoft.net can you please take a look at these patches ? Regards, Raffaele ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] Initialize second PHY on OpenRD-Client and OpenRD-Ultimate.
-Original Message-
From: Clint Adams [mailto:cl...@debian.org]
Sent: Thursday, April 07, 2011 12:25 AM
To: u-boot@lists.denx.de
Cc: Prafulla Wadaskar; julian.pidan...@citrix.com; Clint Adams
Subject: [PATCH 2/2] Initialize second PHY on OpenRD-Client and OpenRD-
Ultimate.
(rework of Julian Pidancet's patch)
---
board/Marvell/openrd_base/openrd_base.c | 22 ++
include/configs/openrd_base.h | 14 --
2 files changed, 30 insertions(+), 6 deletions(-)
diff --git a/board/Marvell/openrd_base/openrd_base.c
b/board/Marvell/openrd_base/openrd_base.c
index 10109c1..aea4760 100644
--- a/board/Marvell/openrd_base/openrd_base.c
+++ b/board/Marvell/openrd_base/openrd_base.c
@@ -118,12 +118,11 @@ int board_init(void)
}
#ifdef CONFIG_RESET_PHY_R
-/* Configure and enable MV88E1116 PHY */
-void reset_phy(void)
+/* Configure and enable MV88E1116/88E1121 PHY */
+void mv_phy_init(char *name)
{
u16 reg;
u16 devadr;
- char *name = egiga0;
if (miiphy_set_current_dev(name))
return;
@@ -148,6 +147,21 @@ void reset_phy(void)
/* reset the phy */
miiphy_reset(name, devadr);
- printf(88E1116 Initialized on %s\n, name);
+ printf(PHY_NO Initialized on %s\n, name);
+}
+
+void reset_phy(void)
+{
+ mv_phy_init(egiga0);
+
+#ifdef CONFIG_BOARD_IS_OPENRD_CLIENT
+ /* Kirkwood ethernet driver is written with the assumption that
in case
+* of multiple PHYs, their addresses are consecutive. But
unfortunately
+* in case of OpenRD-Client, PHY addresses are not
consecutive.*/
+ miiphy_write(egiga1, 0xEE, 0xEE, 24);
+
+ /* configure and initialize both PHY's */
+ mv_phy_init(egiga1);
+#endif
}
#endif /* CONFIG_RESET_PHY_R */
diff --git a/include/configs/openrd_base.h
b/include/configs/openrd_base.h
index 5e05890..aa13908 100644
--- a/include/configs/openrd_base.h
+++ b/include/configs/openrd_base.h
@@ -117,8 +117,18 @@
* Ethernet Driver configuration
*/
#ifdef CONFIG_CMD_NET
-#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
-#define CONFIG_PHY_BASE_ADR 0x8
+# ifdef CONFIG_BOARD_IS_OPENRD_BASE
+# define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
+# else
+# define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */
+# endif
+# ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE
+# define CONFIG_PHY_BASE_ADR0x0
+# define PHY_NO 88E1121
+# else
+# define CONFIG_PHY_BASE_ADR0x8
+# define PHY_NO 88E1116
+# endif
#endif /* CONFIG_CMD_NET */
This looks pretty good.
Ack for both the patches.
Regards..
Prafulla ..
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Re: [U-Boot] [PATCH] Handle most LDSCRIPT setting centrally
Dear Scott Wood, In message 20110406233136.ga13...@schlenkerla.am.freescale.net you wrote: Currently, some linker scripts are found by common code in config.mk. Some are found using CONFIG_SYS_LDSCRIPT, but the code for that is sometimes in arch config.mk and sometimes in board config.mk. Some are found using an arch-specific rule for looking in CPUDIR, etc. Further, the powerpc config.mk rule relied on CONFIG_NAND_SPL when it really wanted CONFIG_NAND_U_BOOT -- which covered up the fact that not all NAND_U_BOOT builds actually wanted CPUDIR/u-boot-nand.lds. Replace all of this -- except for a handful of boards that are actually selecting a linker script in a unique way -- with centralized ldscript finding. Thanks for this nice cleanup. Only one question: Which boards / architectures did you cover during your tests? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Q: How do you play religious roulette? A: You stand around in a circle and blaspheme and see who gets struck by lightning first. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/6] Create PHY Lib for U-Boot
Dear Mike Frysinger, In message 201104070047.28480.vap...@gentoo.org you wrote: We don't allow for CamelCaps identifiers or macro names. Macros are all caps, please. Please fix globally. these are taken straight from Linux which makes code sharing a lot easier I realized this later - but in this case the attribution is missing. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Nothing in progression can rest on its original plan. We may as well think of rocking a grown man in the cradle of an infant. - Edmund Burke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] Initialize second PHY on OpenRD-Client and OpenRD-Ultimate.
Le 07/04/2011 08:17, Prafulla Wadaskar a écrit :
-Original Message-
From: Clint Adams [mailto:cl...@debian.org]
Sent: Thursday, April 07, 2011 12:25 AM
To: u-boot@lists.denx.de
Cc: Prafulla Wadaskar; julian.pidan...@citrix.com; Clint Adams
Subject: [PATCH 2/2] Initialize second PHY on OpenRD-Client and OpenRD-
Ultimate.
(rework of Julian Pidancet's patch)
---
board/Marvell/openrd_base/openrd_base.c | 22 ++
include/configs/openrd_base.h | 14 --
2 files changed, 30 insertions(+), 6 deletions(-)
diff --git a/board/Marvell/openrd_base/openrd_base.c
b/board/Marvell/openrd_base/openrd_base.c
index 10109c1..aea4760 100644
--- a/board/Marvell/openrd_base/openrd_base.c
+++ b/board/Marvell/openrd_base/openrd_base.c
@@ -118,12 +118,11 @@ int board_init(void)
}
#ifdef CONFIG_RESET_PHY_R
-/* Configure and enable MV88E1116 PHY */
-void reset_phy(void)
+/* Configure and enable MV88E1116/88E1121 PHY */
+void mv_phy_init(char *name)
{
u16 reg;
u16 devadr;
-char *name = egiga0;
if (miiphy_set_current_dev(name))
return;
@@ -148,6 +147,21 @@ void reset_phy(void)
/* reset the phy */
miiphy_reset(name, devadr);
-printf(88E1116 Initialized on %s\n, name);
+printf(PHY_NO Initialized on %s\n, name);
+}
+
+void reset_phy(void)
+{
+ mv_phy_init(egiga0);
+
+#ifdef CONFIG_BOARD_IS_OPENRD_CLIENT
+ /* Kirkwood ethernet driver is written with the assumption that
in case
+* of multiple PHYs, their addresses are consecutive. But
unfortunately
+* in case of OpenRD-Client, PHY addresses are not
consecutive.*/
+ miiphy_write(egiga1, 0xEE, 0xEE, 24);
+
+ /* configure and initialize both PHY's */
+ mv_phy_init(egiga1);
+#endif
}
#endif /* CONFIG_RESET_PHY_R */
diff --git a/include/configs/openrd_base.h
b/include/configs/openrd_base.h
index 5e05890..aa13908 100644
--- a/include/configs/openrd_base.h
+++ b/include/configs/openrd_base.h
@@ -117,8 +117,18 @@
* Ethernet Driver configuration
*/
#ifdef CONFIG_CMD_NET
-#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
-#define CONFIG_PHY_BASE_ADR 0x8
+# ifdef CONFIG_BOARD_IS_OPENRD_BASE
+# define CONFIG_MVGBE_PORTS{1, 0} /* enable port 0 only */
+# else
+# define CONFIG_MVGBE_PORTS{1, 1} /* enable both ports */
+# endif
+# ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE
+# define CONFIG_PHY_BASE_ADR 0x0
+# define PHY_NO88E1121
+# else
+# define CONFIG_PHY_BASE_ADR 0x8
+# define PHY_NO88E1116
+# endif
#endif /* CONFIG_CMD_NET */
This looks pretty good.
Ack for both the patches.
Regards..
Prafulla ..
Didn't Julian re-post patches that actually separates Base, Client and
Ultimate into distinct config header files plus a common one? How does
this affect Clint's patchset?
Amicalement,
--
Albert.
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Re: [U-Boot] [PATCH v2] cfi_flash: use AMD fixups for AMIC (e.g. A29L160A series) too
On Monday 21 February 2011 13:13:14 Mario Schuknecht wrote: Signed-off-by: Mario Schuknecht m.schukne...@dresearch.de Signed-off-by: Steffen Sledz sl...@dresearch.de Applied to u-boot-cfi-flash. Thanks. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] mtd, cfi: introduce void flash_protect_default(void)
On Monday 04 April 2011 08:10:21 Heiko Schocher wrote: collect code which protects default sectors in a function, called flash_protect_default. So boardspecific code can call it too. Applied to u-boot-cfi-flash. Thanks. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-cfi-flash
Hi Wolfgang, please pull the following changes: The following changes since commit 4db2fa7f9446d0f2fe8db3d62184b1212fe22707: Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx (2011-04-05 12:24:20 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-cfi-flash.git master Heiko Schocher (1): mtd, cfi: introduce void flash_protect_default(void) Mario Schuknecht (1): cfi_flash: use AMD fixups for AMIC (e.g. A29L160A series) too drivers/mtd/cfi_flash.c | 80 +- include/flash.h |1 + 2 files changed, 44 insertions(+), 37 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] HELLO
I am writing this letter out of a genuine desperation to find a reliable partner in an unfolding transaction. I seek your help and genuine co-operation to our mutual benefit and I believe that you will not letdown the trust and confidence I am about to repose on you. I am Anita, Purchasing Manager to Gss solid minerals company. I used to represent my company to several Asian countries to purchase a product called Xsp solution, this is a chemical liquid use for cleaning Gold, Silvers, Stones and soon. Now, our company want to send another staff from our company duo to my inability to travel this time, that's why am contacting you. I will introduce you to my company's General Manager as the main supplier of the chemical. Per packet of the vaccine cost $6,500 in UNITED STATE, but in Asia Malaysia where I have been purchasing, it only cost $2,500 per packet and you will supply to my company at the rate of $5,100.Per packet. Note, do not disclose the actual cost of the chemical i.e. $2,500 to my company GM as this will affect our profit. My company's directors don't know the seller of this product and the seller doesn't know my company directors, I 'll introduce you as the main supplier. My company normally purchase 20, 30-150cartons in each trip I make depending on the product we have left in the company. The distributor of this product is a Malaysian, you will purchase the product from the Malaysian dealer and supply to my company, my company will now pay you cash on delivery. Let the above mentioned be in mutual beneficiary for us and an opportunity to embark in future engagements. If you wish to take up this offer, kindly mail me and I will reply you with all the contact details and that of my GM whom you will contact and send you quotation. I will also give you the price to quote.If you have any question, feel free to ask or contact me through my personal e-mail (anitaabdulra...@hotmail.co.uk) Best regards Anita Abdul Razak GSS Solid Minerals E-mail: anitaabdulra...@hotmail.co.uk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] nand partition
How to do nand partition and support jffs2 file system. -- View this message in context: http://old.nabble.com/nand-partition-tp31341957p31341957.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 02/10] nds32: add NDS32 support into common header file
Add NDS32 support into common header file. Signed-off-by: Macpaul Lin macp...@andestech.com --- include/common.h |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/include/common.h b/include/common.h index 54503ed..423bbd8 100644 --- a/include/common.h +++ b/include/common.h @@ -273,6 +273,10 @@ intsetenv (char *, char *); #ifdef CONFIG_I386 /* x86 version to be fixed! */ # include asm/u-boot-i386.h #endif /* CONFIG_I386 */ +#ifdef CONFIG_NDS32 +# include asm/mach-types.h +# include asm/u-boot-nds32.h /* NDS32 version to be fixed! */ +#endif /* CONFIG_NDS32 */ #ifdef CONFIG_AUTO_COMPLETE int env_complete(char *var, int maxv, char *cmdv[], int maxsz, char *buf); -- 1.7.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 05/10] nds32/ag101: lowlevel_init.S of ag101
lowlevel_init.S is a peripheral initial procedure of ag101. It configures onboard dram, clock, and power settings. It also prepars the dram environment before moving u-boot from rom and flash into dram. This version of lowlevel_init.S also replace hardcode value by MARCO defines from the GPL version andesboot for better code quality. Signed-off-by: Macpaul Lin macp...@andestech.com --- ChangeLog from v1-v4: - Code clean up and formatting style. ChangeLog from v5-v6 - Change hard code value into MARCO definitions. - ftsmc010 - Fix FTSMC020_TPR_AT2 from 1 to 3 (0xff3ff) - ftsdmc021 - Fix hardcoded address of CR1, CR2, TR1, TR2, BANK0 registers. - Fix the default configuration value of FTSDMC and FTSMC controller. - Remove some ftpmu010 and flash probe code to C functions. arch/nds32/cpu/n1213/ag101/lowlevel_init.S | 160 1 files changed, 160 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/cpu/n1213/ag101/lowlevel_init.S diff --git a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S new file mode 100644 index 000..96969ba --- /dev/null +++ b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S @@ -0,0 +1,160 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation nobuh...@andestech.com + * Macpaul Lin, Andes Technology Corporation macp...@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +.text + +#include common.h +#include config.h + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +.globl lowlevel_init +lowlevel_init: + move$r10, $lp + jal mem_init + jal remap + + ret $r10 + +mem_init: + move$r11, $lp + + /* +* mem_init: +* There are 2 bank connected to FTSMC020 on AG101 +* BANK0: FLASH/ROM (SW5, J16), BANK1: OnBoard SDRAM. +* we need to set onboard SDRAM before remap and relocation. +*/ + li $r0, (CONFIG_FTSMC020_BASE+FTSMC020_BANK0_CR) + li $r1, (FTSMC020_BANK1_CONFIG)! 0x1052 + swi $r1, [$r0] + li $r1, (FTSMC020_BANK1_TIMING)! 0x00151151 + swi $r1, [$r0+FTSMC020_BANK0_TPR] + + /* +* config AHB Controller +*/ + li $r0, (CONFIG_FTAHBC020S_BASE + FTAHBC020S_SLAVE_BSR_6) + li $r1, (CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6) + swi $r1, [$r0] + + /* +* config PMU +*/ + li $r0, (CONFIG_FTPMU010_BASE + FTPMU010_PDLLCR0) + lwi $r1, [$r0] + ! ftpmu010_dlldis_disable, must do it in lowleve_init + li $r2, FTPMU010_PDLLCR0_DLLDIS! 0x0001 + or $r1, $r1, $r2 + swi $r1, [$r0] + + /* +* config SDRAM controller +*/ + li $r0, (CONFIG_FTSDMC021_BASE) + li $r1, (CONFIG_SYS_FTSDMC021_TP1) ! 0x00011312 + swi $r1, [$r0] + li $r1, (CONFIG_SYS_FTSDMC021_TP2) ! 0x00480180 + swi $r1, [$r0+FTSDMC021_OFFSET_TP2] + li $r1, (CONFIG_SYS_FTSDMC021_CR1) ! 0x2326 + swi $r1, [$r0+FTSDMC021_OFFSET_CR1] + li $r1, (FTSDMC021_CR2_IPREC) ! 0x0010 + swi $r1, [$r0+FTSDMC021_OFFSET_CR2] +1: + lwi $r1, [$r0+FTSDMC021_OFFSET_CR2] + andi$r1, $r1, (CONFIG_SYS_FTSDMC021_CR2)! 0x1C + bnez$r1, 1b + + li $r1, (FTSDMC021_CR2_ISMR) ! 0x0004 + swi $r1, [$r0+FTSDMC021_OFFSET_CR2] +2: + lwi $r1, [$r0+FTSDMC021_OFFSET_CR2] + bnez$r1, 2b + + li $r1, (FTSDMC021_CR2_IREF) ! 0x0008 + swi $r1, [$r0+FTSDMC021_OFFSET_CR2] +3: + lwi $r1, [$r0+FTSDMC021_OFFSET_CR2] + bnez$r1, 3b + + move$lp, $r11 + ret + +remap: + move$r11, $lp +#ifdef __NDS32_N1213_43U1H__ /* AG101 */ + bal 2f +relo_base: + move$r0, $lp +#else +relo_base: + mfusr $r0, $pc +#endif + + /* +* relocation, copy ROM code to SDRAM (current at 0x1000) +*/ + li $r4, CONFIG_SYS_RELO_ADDR
[U-Boot] [PATCH v7 03/10] nds32/core N1213: NDS32 N12 core family N1213
Add N1213 cpu core (N12 Core family) support for NDS32 arch. This patch includes start.S for the initialize procedure of N1213. NDS32 Core N1213 has the following hardware features. Core: - 16-/32-bit mixable instruction format - 32 general-purpose 32-bit registers - 8-stage pipeline - Dynamic branch prediction - 32/64/128/256 BTB - Return address stack (RAS) - Vector interrupts for internal/external - 3 HW-level nested interruptions - User and super-user mode support - Memory-mapped I/O - Address space up to 4GB Memory Management Unit: - TLB - Optional hardware page table walker - Two groups of page size support Memory Subsystem: - I D cache - I D local memory (LM) Bus Interface: - Synchronous/Asynchronous AHB bus: 0, 1 or 2 ports Start procedure: start.S will start up the N1213 CPU core at first, then jump to SoC dependent lowlevel_init.S and watchdog.S to configure peripheral devices. Signed-off-by: Macpaul Lin macp...@andestech.com --- arch/nds32/cpu/n1213/Makefile | 50 + arch/nds32/cpu/n1213/start.S| 447 +++ arch/nds32/cpu/n1213/u-boot.lds | 68 ++ 3 files changed, 565 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/cpu/n1213/Makefile create mode 100644 arch/nds32/cpu/n1213/start.S create mode 100644 arch/nds32/cpu/n1213/u-boot.lds diff --git a/arch/nds32/cpu/n1213/Makefile b/arch/nds32/cpu/n1213/Makefile new file mode 100644 index 000..111d14f --- /dev/null +++ b/arch/nds32/cpu/n1213/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# Copyright (C) 2011 Andes Technology Corporation +# Shawn Lin, Andes Technology Corporation nobuh...@andestech.com +# Macpaul Lin, Andes Technology Corporation macp...@andestech.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(CPU).o + +START = start.o + +SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +START := $(addprefix $(obj),$(START)) + +all: $(obj).depend $(START) $(LIB) + +$(LIB):$(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/nds32/cpu/n1213/start.S b/arch/nds32/cpu/n1213/start.S new file mode 100644 index 000..b04f3a5 --- /dev/null +++ b/arch/nds32/cpu/n1213/start.S @@ -0,0 +1,447 @@ +/* + * Andesboot - Startup Code for Whitiger core + * + * Copyright (C) 2006 Andes Technology Corporation + * Copyright (C) 2006 Shawn Lin nobuh...@andestech.com + * Copyright (C) 2011 Macpaul macp...@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include config.h +#include common.h +#include version.h + +/* + * Jump vector table for EVIC mode + */ +#define ENA_DCAC 2UL +#define DIS_DCAC ~ENA_DCAC +#define ICAC_MEM_KBF_ISET (0x07) ! I Cache sets per way +#define ICAC_MEM_KBF_IWAY (0x073) ! I cache ways +#define ICAC_MEM_KBF_ISZ (0x076) ! I cache line size +#define DCAC_MEM_KBF_DSET (0x07) ! D Cache sets per way +#define DCAC_MEM_KBF_DWAY (0x073) ! D cache ways +#define
[U-Boot] [PATCH v7 04/10] nds32/ag101: dev offset header of SoC ag101
Add header file of device offset support for SoC ag101. SoC ag101 is the first chip using NDS32 N1213 cpu core. Note: Ag101 is actually use ftsdmc021 instead of ftsdmc020 as dram controller, which is probably wrong in the datasheet. Signed-off-by: Macpaul Lin macp...@andestech.com --- arch/nds32/include/asm/arch-ag101/ag101.h | 68 + 1 files changed, 68 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/include/asm/arch-ag101/ag101.h diff --git a/arch/nds32/include/asm/arch-ag101/ag101.h b/arch/nds32/include/asm/arch-ag101/ag101.h new file mode 100644 index 000..011989a --- /dev/null +++ b/arch/nds32/include/asm/arch-ag101/ag101.h @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Nobuhiro Lin, Andes Technology Corporation nobuh...@andestech.com + * Macpaul Lin, Andes Technology Corporation macp...@andestech.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __AG101_H +#define __AG101_H + +/* Hardware register bases */ +#define CONFIG_FTAHBC020S_BASE 0x9010 /* AHB Controller */ +#define CONFIG_FTSMC020_BASE 0x9020 /* Static Memory Controller (SRAM) */ +#define CONFIG_FTSDMC021_BASE 0x9030 /* FTSDMC020/021 SDRAM Controller */ +#define CONFIG_FTDMAC020_BASE 0x9040 /* DMA Controller */ +#define CONFIG_FTAPBBRG020S_01_BASE0x9050 /* AHB-to-APB Bridge */ +#define CONFIG_FTLCDC100_BASE 0x9060 /* LCD Controller */ +#define CONFIG_RESERVED_01_BASE0x9070 /* Reserved */ +#define CONFIG_RESERVED_02_BASE0x9080 /* Reserved */ +#define CONFIG_FTMAC100_BASE 0x9090 /* Ethernet */ +#define CONFIG_EXT_USB_HOST_BASE 0x90A0 /* External USB host */ +#define CONFIG_USB_DEV_BASE0x90B0 /* USB Device */ +#define CONFIG_EXT_AHBPCIBRG_BASE 0x90C0 /* External AHB-to-PCI Bridge (FTPCI100 not exist in ag101) */ +#define CONFIG_RESERVED_03_BASE0x90D0 /* Reserved */ +#define CONFIG_EXT_AHBAPBBRG_BASE 0x90E0 /* External AHB-to-APB Bridger (FTAPBBRG020S_02) */ +#define CONFIG_EXT_AHBSLAVE01_BASE 0x90F0 /* External AHB slave1 (LCD) */ + +#define CONFIG_EXT_AHBSLAVE02_BASE 0x9200 /* External AHB slave2 (FUSBH200) */ + +/* DEBUG LED */ +#define CONFIG_DEBUG_LED 0x902C /* Debug LED */ + +/* APB Device definitions */ +#define CONFIG_FTPMU010_BASE 0x9810 /* Power Management Unit */ +#define CONFIG_FTUART010_01_BASE 0x9830 /* BT UART 2/IrDA (UART 01 in Linux) */ +#define CONFIG_FTTMR010_BASE 0x9840 /* Counter/Timers */ +#define CONFIG_FTWDT010_BASE 0x9850 /* Watchdog Timer */ +#define CONFIG_FTRTC010_BASE 0x9860 /* Real Time Clock */ +#define CONFIG_FTGPIO010_BASE 0x9870 /* GPIO */ +#define CONFIG_FTINTC010_BASE 0x9880 /* Interrupt Controller */ +#define CONFIG_FTIIC010_BASE 0x98A0 /* I2C */ +#define CONFIG_RESERVED_04_BASE0x98C0 /* Reserved */ +#define CONFIG_FTCFC010_BASE 0x98D0 /* Compat Flash Controller */ +#define CONFIG_FTSDC010_BASE 0x98E0 /* SD Controller */ + +#define CONFIG_FTSSP010_02_BASE0x9940 /* Synchronous Serial Port Controller (SSP) I2S/AC97 */ +#define CONFIG_FTUART010_02_BASE 0x9960 /* ST UART ? SSP 02 (UART 02 in Linux) */ + +/* The following address was not defined in Linux */ +#define CONFIG_FTUART010_03_BASE 0x9820 /* FF UART 3 */ +#define CONFIG_FTSSP010_01_BASE0x98B0 /* Synchronous Serial Port Controller (SSP) 01 */ +#define CONFIG_IRDA_BASE 0x9890 /* IrDA */ +#define CONFIG_PMW_BASE0x9910 /* PWM - Pulse Width Modulator Controller */ + +#endif /* __AG101_H */ -- 1.7.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 01/10] nds32: add header files support for nds32
Add generic header files support for nds32 architecture.
Cache, ptregs, data type and other definitions are included.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v4:
- Code cleanup and style formatting.
Changes for v5-v6:
- This patch also updated the following changes against the
change after master tree (v2010.12-rc1).
- fix upper case definitions in cache.h
- Support GD_FLG_ENV_READY and env_buf vars in nds32 global_data.h.
- Add readsb, writesb functions into io.h.
Changes for v7:
- clean up
- volatile:
- types.h
- remove typedef volatile unsigned char vuchar;
- remove typedef volatile unsigned long vulong;
- remove typedef volatile unsigned short vushort;
- u-boot.h: remove bd_info_ext bi_ext
- bitops.h: add accessor function to bit operation with volatile var.
- system.h: add system.h for local_irq operation with flag.
arch/nds32/include/asm/bitops.h | 186 +++
arch/nds32/include/asm/byteorder.h| 36 +++
arch/nds32/include/asm/cache.h| 54 +
arch/nds32/include/asm/config.h | 26 ++
arch/nds32/include/asm/global_data.h | 82 +++
arch/nds32/include/asm/io.h | 410 +
arch/nds32/include/asm/mach-types.h | 29 +++
arch/nds32/include/asm/memory.h | 19 ++
arch/nds32/include/asm/posix_types.h | 84 +++
arch/nds32/include/asm/processor.h| 25 ++
arch/nds32/include/asm/ptrace.h | 22 ++
arch/nds32/include/asm/ptregs.h | 81 +++
arch/nds32/include/asm/string.h | 57 +
arch/nds32/include/asm/system.h | 88 +++
arch/nds32/include/asm/types.h| 63 +
arch/nds32/include/asm/u-boot-nds32.h | 50
arch/nds32/include/asm/u-boot.h | 63 +
arch/nds32/include/asm/unaligned.h| 31 +++
18 files changed, 1406 insertions(+), 0 deletions(-)
create mode 100644 arch/nds32/include/asm/bitops.h
create mode 100644 arch/nds32/include/asm/byteorder.h
create mode 100644 arch/nds32/include/asm/cache.h
create mode 100644 arch/nds32/include/asm/config.h
create mode 100644 arch/nds32/include/asm/global_data.h
create mode 100644 arch/nds32/include/asm/io.h
create mode 100644 arch/nds32/include/asm/mach-types.h
create mode 100644 arch/nds32/include/asm/memory.h
create mode 100644 arch/nds32/include/asm/posix_types.h
create mode 100644 arch/nds32/include/asm/processor.h
create mode 100644 arch/nds32/include/asm/ptrace.h
create mode 100644 arch/nds32/include/asm/ptregs.h
create mode 100644 arch/nds32/include/asm/string.h
create mode 100644 arch/nds32/include/asm/system.h
create mode 100644 arch/nds32/include/asm/types.h
create mode 100644 arch/nds32/include/asm/u-boot-nds32.h
create mode 100644 arch/nds32/include/asm/u-boot.h
create mode 100644 arch/nds32/include/asm/unaligned.h
diff --git a/arch/nds32/include/asm/bitops.h b/arch/nds32/include/asm/bitops.h
new file mode 100644
index 000..c56f04b
--- /dev/null
+++ b/arch/nds32/include/asm/bitops.h
@@ -0,0 +1,186 @@
+/*
+ * Copyright 1995, Russell King.
+ * Various bits and pieces copyrights include:
+ * Linus Torvalds (test_bit).
+ *
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation nobuh...@andestech.com
+ *
+ * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
+ *
+ * Please note that the code in this file should never be included
+ * from user space. Many of these are not implemented in assembler
+ * since they would be too costly. Also, they require priviledged
+ * instructions (which are not available from user mode) to ensure
+ * that they are atomic.
+ */
+
+#ifndef __ASM_NDS_BITOPS_H
+#define __ASM_NDS_BITOPS_H
+
+#ifdef __KERNEL__
+
+#include asm/system.h
+
+#define smp_mb__before_clear_bit() do { } while (0)
+#define smp_mb__after_clear_bit() do { } while (0)
+
+/*
+ * Function prototypes to keep gcc -Wall happy.
+ */
+extern void set_bit(int nr, volatile void *addr);
+
+static inline void __set_bit(int nr, volatile void *addr)
+{
+ int *a = (int *)addr;
+ int mask;
+
+ a += nr 5;
+ mask = 1 (nr 0x1f);
+ *a |= mask;
+}
+
+extern void clear_bit(int nr, volatile void *addr);
+
+static inline void __clear_bit(int nr, volatile void *addr)
+{
+ int *a = (int *)addr;
+ int mask;
+ unsigned long flags;
+
+ a += nr 5;
+ mask = 1 (nr 0x1f);
+ local_irq_save(flags);
+ *a = ~mask;
+ local_irq_restore(flags);
+}
+
+extern void change_bit(int nr, volatile void *addr);
+
+static inline void __change_bit(int nr, volatile void *addr)
+{
+ int mask;
+ unsigned long *ADDR = (unsigned long *)addr;
+
+ ADDR += nr 5;
+ mask = 1 (nr 31);
+ *ADDR ^= mask;
+}
+
+extern int test_and_set_bit(int nr, volatile void *addr);
+
+static inline int __test_and_set_bit(int nr, volatile void *addr)
+{
+ int mask, retval;
+
[U-Boot] [PATCH v7 06/10] nds32/ag101: cpu and init funcs of SoC ag101
Add main function of SoC ag101 based on NDS32 n1213 core. cpu.c According to the bootstrap procedure in n1213 Core, to turn off watchdog timer is suggested after the cpu is in superuser mdoe. 1. bootstrap 1.1 reset - start of Andesboot 1.2 to superuser mode - as is when reset 1.3 Turn off watchdog timer If you take look into the start.S in n1213, you will find that system will turn off watchdog after start.S has been retunred from lowlevel_init. Since the watchdog device is depends on the SoC is choosed. It should be belonged to the SoC (ag101) folder. watchdog.S: If you've ran another bootloader before u-boot was started the watchdog might have been enabled already. Signed-off-by: Macpaul Lin macp...@andestech.com --- Changes for v5-v6: - Split watchdog.S from lowlevel_init.S. - Fix hardware reset by using watchdog reset in do_reset() in cpu.c. - reset_cpu was remove inside do_reset(). Changes for v7: - clean up. arch/nds32/cpu/n1213/ag101/Makefile | 58 + arch/nds32/cpu/n1213/ag101/cpu.c | 207 + arch/nds32/cpu/n1213/ag101/timer.c| 204 arch/nds32/cpu/n1213/ag101/watchdog.S | 48 4 files changed, 517 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/cpu/n1213/ag101/Makefile create mode 100644 arch/nds32/cpu/n1213/ag101/cpu.c create mode 100644 arch/nds32/cpu/n1213/ag101/timer.c create mode 100644 arch/nds32/cpu/n1213/ag101/watchdog.S diff --git a/arch/nds32/cpu/n1213/ag101/Makefile b/arch/nds32/cpu/n1213/ag101/Makefile new file mode 100644 index 000..e96b1e4 --- /dev/null +++ b/arch/nds32/cpu/n1213/ag101/Makefile @@ -0,0 +1,58 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor www.marvell.com +# Written-by: Prafulla Wadaskar prafu...@marvell.com +# +# Copyright (C) 2011 Andes Technology Corporation +# Shawn Lin, Andes Technology Corporation nobuh...@andestech.com +# Macpaul Lin, Andes Technology Corporation macp...@andestech.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(SOC).o + +COBJS-y:= cpu.o timer.o + +ifndef CONFIG_SKIP_LOWLEVEL_INIT +SOBJS := lowlevel_init.o +endif + +ifndef CONFIG_SKIP_TRUNOFF_WATCHDOG +SOBJS += watchdog.o +endif + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) + +all: $(obj).depend $(LIB) + +$(LIB):$(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/nds32/cpu/n1213/ag101/cpu.c b/arch/nds32/cpu/n1213/ag101/cpu.c new file mode 100644 index 000..8e7eb0a --- /dev/null +++ b/arch/nds32/cpu/n1213/ag101/cpu.c @@ -0,0 +1,207 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH www.elinos.com + * Marius Groeger mgroe...@sysgo.de + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, g...@denx.de + * + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation nobuh...@andestech.com + * Macpaul Lin, Andes Technology Corporation macp...@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* CPU specific code */ +#include common.h +#include command.h +#include watchdog.h +#include
[U-Boot] [PATCH v7 07/10] nds32/lib: add generic funcs in NDS32 lib
Add Makefile, board.c, interrupts.c and bootm.c functions to nds32 architecture. Signed-off-by: Macpaul Lin macp...@andestech.com --- Changes for v1-v4: - code clean up and formatting style. Changes for v5-v6: - board.c - Do some clean up and add code - Remove display banner which hasn't support. - Add ftpmu010 related power management unit code. - Remove useless LED related code. - Move SDRAM init to board sepecific files. (ex. adp-ag101.c) - Remove CONFIG_SOFT_I2C which hasn't been support. - Remove CONFIG_FSL_ESDHC which hasn't been support. - clean up. Changes for v7: - clean up. - move single file patch arch/nds32/config.mk to this commit. - interrupts.c refine origin interrupt enable and disable. arch/nds32/config.mk| 35 + arch/nds32/lib/Makefile | 52 +++ arch/nds32/lib/board.c | 346 +++ arch/nds32/lib/bootm.c | 241 ++ arch/nds32/lib/interrupts.c | 131 5 files changed, 805 insertions(+), 0 deletions(-) create mode 100644 arch/nds32/config.mk create mode 100644 arch/nds32/lib/Makefile create mode 100644 arch/nds32/lib/board.c create mode 100644 arch/nds32/lib/bootm.c create mode 100644 arch/nds32/lib/interrupts.c diff --git a/arch/nds32/config.mk b/arch/nds32/config.mk new file mode 100644 index 000..ac5d0cf --- /dev/null +++ b/arch/nds32/config.mk @@ -0,0 +1,35 @@ +# +# (C) Copyright 2000-2002 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# (C) Copyright 2011 +# Shawn Lin, Andes Technology Corporation nobuh...@andestech.com +# Macpaul Lin, Andes Technology Corporation macp...@andestech.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +CROSS_COMPILE ?= nds32le-linux- + +STANDALONE_LOAD_ADDR = 0x30 -T nds32.lds + +PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common +PLATFORM_RELFLAGS += -gdwarf-2 +PLATFORM_CPPFLAGS += -DCONFIG_NDS32 -D__nds32__ -G0 -ffixed-8 + +LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds diff --git a/arch/nds32/lib/Makefile b/arch/nds32/lib/Makefile new file mode 100644 index 000..eca4324 --- /dev/null +++ b/arch/nds32/lib/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# Copyright (C) 2011 Andes Technology Corporation +# Shawn Lin, Andes Technology Corporation nobuh...@andestech.com +# Macpaul Lin, Andes Technology Corporation macp...@andestech.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(ARCH).o + +OBJS := board.o bootm.o interrupts.o + +all: $(LIB) + +$(LIB):$(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/nds32/lib/board.c b/arch/nds32/lib/board.c new file mode 100644 index 000..6ed4194 --- /dev/null +++ b/arch/nds32/lib/board.c @@ -0,0 +1,346 @@ +/* + * (C) Copyright 2002-2006 + * Wolfgang Denk, DENX Software Engineering, w...@denx.de. + * + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation nobuh...@andestech.com + * Macpaul Lin, Andes Technology
[U-Boot] [PATCH v7 08/10] nds32: standalone support
Add standalone program related support for nds32 architecture.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
examples/standalone/nds32.lds | 64 +
examples/standalone/stubs.c | 17 +-
examples/standalone/x86-testapp.c | 12 +++
3 files changed, 92 insertions(+), 1 deletions(-)
create mode 100644 examples/standalone/nds32.lds
diff --git a/examples/standalone/nds32.lds b/examples/standalone/nds32.lds
new file mode 100644
index 000..c2ac107
--- /dev/null
+++ b/examples/standalone/nds32.lds
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation nobuh...@andestech.com
+ * Macpaul Lin, Andes Technology Corporation macp...@andestech.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT(elf32-nds32, elf32-nds32, elf32-nds32)
+OUTPUT_ARCH(nds32)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x;
+
+ . = ALIGN(4);
+ .text :
+ {
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+
+ .got : {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ }
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ __bss_end = .;
+
+ . = ALIGN(4);
+ .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) }
+
+ _end = .;
+
+ . = 0x0200;
+ .u_boot_ohci_data_st : { *(.u_boot_ohci_data_st) }
+}
diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c
index 2d2e709..b711926 100644
--- a/examples/standalone/stubs.c
+++ b/examples/standalone/stubs.c
@@ -167,8 +167,23 @@ gd_t *global_data;
jmp %%g1\n \
nop\n \
: : i(offsetof(gd_t, jt)), i(XF_ ## x * sizeof(void *)) : g1 );
-
+#elif defined(CONFIG_NDS32)
+/*
+ * r16 holds the pointer to the global_data. gp is call clobbered.
+ * not support reduced register (16 GPR).
+ */
+#define EXPORT_FUNC(x) \
+ asm volatile ( \
+ .globl #x \n\
+#x :\n \
+ lwi $r16, [$gp + (%0)]\n \
+ lwi $r16, [$r16 + (%1)]\n \
+ jr $r16\n \
+ : : i(offsetof(gd_t, jt)), i(XF_ ## x * sizeof(void *)) : $r16);
#else
+/*addi$sp, $sp, -24\n\
+ br $r16\n \*/
+
#error stubs definition missing for this architecture
#endif
diff --git a/examples/standalone/x86-testapp.c
b/examples/standalone/x86-testapp.c
index e8603d9..a4ac6f8 100644
--- a/examples/standalone/x86-testapp.c
+++ b/examples/standalone/x86-testapp.c
@@ -52,6 +52,16 @@ asm volatile (
\
lw $25, %1($25)\n \
jr $25\n \
: : i(offsetof(xxx_t, pfunc)), i(XF_ ## x * sizeof(void *)) : t9);
+#elif defined(__nds32__)
+#define EXPORT_FUNC(x) \
+asm volatile ( \
+ .globl mon_ #x \n\
+mon_ #x :\n\
+ lwi $r16, [$gp + (%0)]\n \
+ lwi $r16, [$r16 + (%1)]\n \
+ jr $r16\n \
+ : : i(offsetof(xxx_t, pfunc)), i(XF_ ## x * sizeof(void *)) :
$r16);
+
#else
#error [No stub code for this arch]
#endif
@@ -72,6 +82,8 @@ int main(void)
register volatile xxx_t *pq asm(r8);
#elif defined(__mips__)
register volatile xxx_t *pq asm(k0);
+#elif defined(__nds32__)
+ register volatile xxx_t *pq asm($r16);
#endif
char buf[32];
--
1.7.3.5
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[U-Boot] [PATCH v7 10/10] adp-ag101: add board adp-ag101 support
Add adp-ag101.c board config and related settings.
Add evaluation board adp-ag101 configuration file adp-ag101.h.
Add board adp-ag101 into boards.cfg
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Changes for v1-v4:
- code clean up
Changes for v5-v6:
- adp-ag101.h
- Refine the definitions and parameters about CLK,
AHB controller, SDRAM controller, Static memory controllers.
- Add APB_CLK, AHB_CLK, SYS_CLK definitions for backward compatible.
- ftahbc010:
- Update include path of ftahbc010.
- ftsdmc021:
- Update include path of ftsdmc021.
- ftsmc020:
- Update include path of ftsmc020.
- ftwdt010:
- Fix WDT define and update include path.
- Fix ftwdt010 for hardware reset.
- ftpmu010:
- Remove duplicate PMU definitions.
- Add related configurations.
- Fix MAX malloc len and fix saveenv.
- clean up.
Changes for v7:
- adp-ag101.c
- Fix Makefile and remove config.mk
- adp-ag101.h:
- clean up.
- Move CONFIG_SYS_TEXT_BASE from board/config.mk.
MAINTAINERS | 11 +
MAKEALL |6 +
board/AndesTech/adp-ag101/Makefile| 57 +
board/AndesTech/adp-ag101/adp-ag101.c | 81 +++
boards.cfg|1 +
include/configs/adp-ag101.h | 378 +
6 files changed, 534 insertions(+), 0 deletions(-)
create mode 100644 board/AndesTech/adp-ag101/Makefile
create mode 100644 board/AndesTech/adp-ag101/adp-ag101.c
create mode 100644 include/configs/adp-ag101.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 1d7e1f4..29f3b4d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1113,5 +1113,16 @@ Anton Shurpin shurpin...@niistt.ru
BF561-ACVILON BF561
#
+# NDS32 Systems: #
+# #
+# Maintainer Name, Email Address #
+# Board CPU #
+#
+
+Macpaul Lin macp...@andestech.com
+
+ ADP-AG101 N1213 (AG101 SoC)
+
+#
# End of MAINTAINERS list #
#
diff --git a/MAKEALL b/MAKEALL
index e1b928f..286d158 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -610,6 +610,12 @@ LIST_sh=$(boards_by_arch sh)
LIST_sparc=$(boards_by_arch sparc)
+#
+## NDS32 Systems
+#
+
+LIST_nds32=$(boards_by_arch nds32)
+
#---
build_target() {
diff --git a/board/AndesTech/adp-ag101/Makefile
b/board/AndesTech/adp-ag101/Makefile
new file mode 100644
index 000..5a403b1
--- /dev/null
+++ b/board/AndesTech/adp-ag101/Makefile
@@ -0,0 +1,57 @@
+#
+# Copyright (C) 2011 Andes Technology Corporation
+# Shawn Lin, Andes Technology Corporation nobuh...@andestech.com
+# Macpaul Lin, Andes Technology Corporation macp...@andestech.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := adp-ag101.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+ifdef CONFIG_SYS_LDSCRIPT
+LDSCRIPT := $(subst ,,$(CONFIG_SYS_LDSCRIPT))
+else
+LDSCRIPT := $(SRCTREE)/arch/$(ARCH)/cpu/$(CPU)/u-boot.lds
+endif
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
[U-Boot] [PATCH v7 09/10] nds32: common bdinfo, bootm, image support
Add support of NDS32 to common commands bdinfo, bootm, and image format.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
common/cmd_bdinfo.c | 28 +++-
common/cmd_bootm.c |2 ++
common/image.c |1 +
include/image.h |5 +
4 files changed, 35 insertions(+), 1 deletions(-)
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index bba7374..908091d 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -411,13 +411,39 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
return 0;
}
+#elif defined(CONFIG_NDS32)
+
+int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ int i;
+ bd_t *bd = gd-bd;
+
+ print_num(arch_number,bd-bi_arch_number);
+ print_num(env_t, (ulong)bd-bi_env);
+ print_num(boot_params,(ulong)bd-bi_boot_params);
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; ++i) {
+ print_num(DRAM bank, i);
+ print_num(- start, bd-bi_dram[i].start);
+ print_num(- size,bd-bi_dram[i].size);
+ }
+
+#if defined(CONFIG_CMD_NET)
+ print_eth(0);
+ printf(ip_addr = %pI4\n, bd-bi_ip_addr);
+#endif
+ printf(baudrate= %d bps\n, bd-bi_baudrate);
+
+ return 0;
+}
+
#else
#error a case for this architecture does not exist!
#endif
static void print_num(const char *name, ulong value)
{
- printf (%-12s= 0x%08lX\n, name, value);
+ printf(%-12s= 0x%08lX\n, name, value);
}
#if !(defined(CONFIG_ARM) || defined(CONFIG_M68K)) || defined(CONFIG_CMD_NET)
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 18019d6..59fbc45 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -187,6 +187,8 @@ void arch_preboot_os(void) __attribute__((weak,
alias(__arch_preboot_os)));
#define IH_INITRD_ARCH IH_ARCH_SH
#elif defined(__sparc__)
#define IH_INITRD_ARCH IH_ARCH_SPARC
+#elif defined(__nds32__)
+ #define IH_INITRD_ARCH IH_ARCH_NDS32
#else
# error Unknown CPU type
#endif
diff --git a/common/image.c b/common/image.c
index f63a2ff..afe5957 100644
--- a/common/image.c
+++ b/common/image.c
@@ -93,6 +93,7 @@ static const table_entry_t uimage_arch[] = {
{ IH_ARCH_SPARC64,sparc64, SPARC 64 Bit, },
{ IH_ARCH_BLACKFIN, blackfin, Blackfin, },
{ IH_ARCH_AVR32, avr32,AVR32,},
+ { IH_ARCH_NDS32, nds32,NDS32,},
{ -1, , , },
};
diff --git a/include/image.h b/include/image.h
index 005e0d2..1a2be5e 100644
--- a/include/image.h
+++ b/include/image.h
@@ -106,6 +106,7 @@
#define IH_ARCH_BLACKFIN 16 /* Blackfin */
#define IH_ARCH_AVR32 17 /* AVR32*/
#define IH_ARCH_ST200 18 /* STMicroelectronics ST200 */
+#define IH_ARCH_NDS32 19 /* ANDES Technology - NDS32 */
/*
* Image Types
@@ -504,6 +505,8 @@ static inline int image_check_target_arch (const
image_header_t *hdr)
if (!image_check_arch (hdr, IH_ARCH_SH))
#elif defined(__sparc__)
if (!image_check_arch (hdr, IH_ARCH_SPARC))
+#elif defined(__nds32__)
+ if (!image_check_arch(hdr, IH_ARCH_NDS32))
#else
# error Unknown CPU type
#endif
@@ -656,6 +659,8 @@ static inline int fit_image_check_target_arch (const void
*fdt, int node)
if (!fit_image_check_arch (fdt, node, IH_ARCH_SH))
#elif defined(__sparc__)
if (!fit_image_check_arch (fdt, node, IH_ARCH_SPARC))
+#elif defined(__nds32__)
+ if (!fit_image_check_arch(fdt, node, IH_ARCH_NDS32))
#else
# error Unknown CPU type
#endif
--
1.7.3.5
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Re: [U-Boot] [PATCH v7 05/10] nds32/ag101: lowlevel_init.S of ag101
HI Wolfgang and all, 2011/4/7 Macpaul Lin macp...@andestech.com: lowlevel_init.S is a peripheral initial procedure of ag101. It configures onboard dram, clock, and power settings. It also prepars the dram environment before moving u-boot from rom and flash into dram. I'm so sorry there is really a need to setup the timing related parameters in assembly because the poor of hardware design. Without the correct timing parameters, we cannot read/write dram. Even we couldn't use it to store the initial stack, I have posted the spec of related timing parameter of memory controller as following (which is connected to the first bank of DRAM). Hope you can understand the problem from the hardware (register) spec. example: FTSMC020_BANK0_TPR (control the dram) value: 0x00151151 20 , RBE, set to (b'1), R/W Read byte-enable. If this bit is set to '1’, byte-enable will be pulled LOW when read. Otherwise, byte-enable will be pulled LOW only for write operation. 19-18, AST, R/W, set to (b'01), Address setup time. This register specifies the latency needed to assert chip-enable after address assertion. 17-16, CTW, R/W, set to (b'01), Chip-select to write-enable delay. This register specifies the latency needed to assert write-enable after chip-enable assertion. 15-12, AT1, R/W, set to (b'0001), Access time 1. This register specifies the latency to latch (read) or change data (write) after write-enable assertion when general asynchronous device is specified. The value must be larger than zero. Setting this register to zero is acceptable but the behavior will be un-predictable. If device is specified as burst ROM, this register indicates the read/write latency of first data. If BNK_TYPE1 is set as ‘1’ (synchronous devices), this register indicates the depth of late-write and the maximum value of this value is 2 (value exceeding 2 will be reset to zero). 11-10, Reserved, set to (b'00) Writing data to this register takes no effect and zero will be returned when read. 9-8, AT2, R/W, set to (b'01) Access time 2. This register specifies the latency needed to latch the burst read data. This register is only used when device type is specified as burst ROM. 7-6, WTC, R/W, set to (b'01) Write-enable to chip-select delay. This register specifies the latency needed to de-assert chip-enable after write-enable de-assertion. 5-4, AHT, R/W, set to (b'01) Address hold time. This register specifies the latency needed to de-assert address after chip-select de-assertion. 3-0, TRNA, R/W, set to (b'0001) Turn-around time. This register specifies the latency needed to re-drive data bus. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-Boot-Users] U-Boot WinCE booting support?
Hi I want to boot wince using uboot. Please provide me some help. -- Thanks Regards Balaji P ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot-Users] U-Boot WinCE booting support?
On Thursday 07 April 2011 15:02:37 Balaji P wrote: Hi I want to boot wince using uboot. Please provide me some help. Any why don't you just stick with eboot ? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V8 0/6] add i2c support to pantheon and aramada100
-Original Message- From: Lei Wen [mailto:lei...@marvell.com] Sent: Tuesday, April 05, 2011 1:31 PM To: Heiko Schocher; Prafulla Wadaskar; Wolfgang Denk; u- b...@lists.denx.de; Marek Vasut; Ashish Karkare; Prabhanjan Sarnaik; Yu Tang; adrian.w...@gmail.com Subject: [PATCH V8 0/6] add i2c support to pantheon and aramada100 V2: rename the previous pxa_i2c to mvi2c, since this driver would be shared by many other Marvell platforms. V3: Clean the code sytle issue V4: add and* and or* to make set bit operation generic Also make i2c definition included in the ifdef V5: Fix code style issue of the first patch V6: Seperate the and* and or* patch out of the patch set Move CONFIG_CMD_I2C define place V7: Fix comments style Make global change from PXA to MV Move i2c config setting to arch/config V8: Seperate timeout fix patch out Lei Wen (6): pxa: move i2c driver to the common place mv_i2c: fix timeout value to be consistent with comments mv_i2c: use structure to replace the direclty define I2C: add i2c support for Pantheon platform I2C: mv_i2c: add multi bus support I2C: add i2c support for Armada100 platform I am okay with this patch series. I will pull them on this week end. Meanwhile further comments if any are welcomed. Regards.. Prafulla . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/13] add XScale sub architecture (IXP/PXA) to board list
On Wednesday 26 January 2011 08:30:35 Wolfgang Denk wrote: Dear Michael Schwingen, In message 4d3f5f45.4020...@discworld.dascon.de you wrote: That's not a board list, but the MAINTAINERS file (I would expect changes to boards.cfg when I read board list). Right. Do you waht a patch with an updated comment? Yes, please. -wepep250xscale +wepep250xscale/pxa (removed) What does removed mean? When it's removed, then please remove. It looks like it is already removed - I could not find support for that board in the current code, but I think removing maintainers is nothing *I* should do without further discussion? Well, this got removed by Marek in commit 7369478. Marek, it seems you forgot to clean up MAINTAINERS, and also to add the removed boards to the doc/README.scrapyard file. Can you please provide cleanup patches for these commits: 4262a7c 2010-10-22 01:38:01 +0200 PXA: Remove xsengine board 7369478 2010-10-22 01:38:01 +0200 PXA: Remove wepep250 board 75e2035 2010-10-22 01:38:01 +0200 PXA: Remove delta board I just dug this out ... is this still relevant ? Thanks Thanks. Best regards, Wolfgang Denk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V8 0/6] add i2c support to pantheon and aramada100
Hello Prafulle, Prafulla Wadaskar wrote: -Original Message- From: Lei Wen [mailto:lei...@marvell.com] Sent: Tuesday, April 05, 2011 1:31 PM To: Heiko Schocher; Prafulla Wadaskar; Wolfgang Denk; u- b...@lists.denx.de; Marek Vasut; Ashish Karkare; Prabhanjan Sarnaik; Yu Tang; adrian.w...@gmail.com Subject: [PATCH V8 0/6] add i2c support to pantheon and aramada100 V2: rename the previous pxa_i2c to mvi2c, since this driver would be shared by many other Marvell platforms. V3: Clean the code sytle issue V4: add and* and or* to make set bit operation generic Also make i2c definition included in the ifdef V5: Fix code style issue of the first patch V6: Seperate the and* and or* patch out of the patch set Move CONFIG_CMD_I2C define place V7: Fix comments style Make global change from PXA to MV Move i2c config setting to arch/config V8: Seperate timeout fix patch out Lei Wen (6): pxa: move i2c driver to the common place mv_i2c: fix timeout value to be consistent with comments mv_i2c: use structure to replace the direclty define I2C: add i2c support for Pantheon platform I2C: mv_i2c: add multi bus support I2C: add i2c support for Armada100 platform I am okay with this patch series. I will pull them on this week end. Meanwhile further comments if any are welcomed. Ah, Ok, so you can add my: Acked-by: Heiko Schocher h...@denx.de bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/6] Universal PHY Infrastructure
On Apr 6, 2011, at 7:07 AM, Detlev Zundel wrote:
Hi Andy,
This second version cleans up all checkpatch errors that I reasonably could,
and addresses most of the comments from the first round of reviews.
WARNING: Use of volatile is usually wrong: see
Documentation/volatile-considered-harmful.txt
#1299: FILE: drivers/net/tsec.c:1740:
+static int tsec_send(struct eth_device *dev, volatile void *packet, int
length)
Ah I see. This is needed because include/net.h prescribes this as the
interface. Oh well, we should clean this up at some later point, so
it's ok from my perspective to ignore this and at least stay consistent.
WARNING: do not add new typedefs
#4271: FILE: include/phy.h:389:
+typedef enum {
I know that we have lots of typedefs, but we should not add new ones.
Actually not using this typedef for an enum-type would make the sources
easier for me to read as I don't have to do this extra lookup step.
True, but this typedef is in Linux the same way. It seemed sensible to keep
them the same
WARNING: do not add new typedefs
#6304: FILE: arch/powerpc/include/asm/fsl_enet.h:31:
+typedef struct tsec_mii_mng {
I'd also appreciate if you use struct tsec_mii_mng explicitely instead
of adding another typedef.
Yeah, you're right. I'll eliminate this one.
Andy
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Re: [U-Boot] [PATCH v2 4/6] Create PHY Lib for U-Boot
On Apr 6, 2011, at 6:09 PM, Mike Frysinger wrote:
On Tuesday, April 05, 2011 17:59:52 Andy Fleming wrote:
-#define debug(fmt,args...) printf (fmt ,##args)
+#define debug(fmt, args...) printf(fmt, ##args)
it'd be nice if all these unrelated formatting changes werent intermingled.
but i guess too hard for you to untangle now. make it a pita to pick out
what
are functional changes and what is pure noise.
A lot of that's due to checkpatch errors that hit on lines I changed, so I went
through and changed all instances.
+struct mii_dev *mdio_alloc(void)
+{
+struct mii_dev *bus;
+
+bus = malloc(sizeof(*bus));
+if (!bus)
+return bus;
+
+memset(bus, 0, sizeof(*bus));
+
+bus-name = malloc(MDIO_NAME_LEN);
considering the name len is hardcoded at build time, it'd be nice to inline
that into the struct itself to avoid having to do multiple mallocs. but i
guess it might be hard to keep working with the legacy code ? or maybe not
if
you just grep the tree to make sure no one using legacy code has a name
longer
than 31 bytes ...
Hmmm... I can go look, but it's really hard to make sure I've found all
instances of -name that are miiphy-related.
+struct phy_device *mdio_phydev_for_ethname(const char *ethname)
...
+if ((!bus-phymap[i]) || (!bus-phymap[i]-dev))
useless paren around both expressions here
--- /dev/null
+++ b/drivers/net/phy/phy.c
+int phy_read(struct phy_device *phydev, int devad, int regnum)
+{
+struct mii_dev *bus = phydev-bus;
+
+return bus-read(bus, phydev-addr, devad, regnum);
+}
+
+int phy_write(struct phy_device *phydev, int devad, int regnum, u16 val)
+{
+struct mii_dev *bus = phydev-bus;
+
+return bus-write(bus, phydev-addr, devad, regnum, val);
+}
seems like it'd make sense for these to be inlines in the phy header
Sure.
+static struct phy_driver gen10g_driver = {
+.uid= 0x,
+.mask = 0x,
+.name = Generic 10G PHY,
+.features = 0,
+.config = gen10g_config,
+.startup= gen10g_startup,
+.shutdown = gen10g_shutdown,
+};
this probably should be split out into a dedicated phy driver. you might
care
about it, but i cant think of any board atm where i would use this. i
imagine
for most people, it's simply useless bloat.
+static struct phy_driver genphy_driver = {
+.uid= 0x,
+.mask = 0x,
+.name = Generic PHY,
+.features = 0,
+.config = genphy_config,
+.startup= genphy_startup,
+.shutdown = genphy_shutdown,
+};
i think this should be split too for the board maintainers who know exactly
why phy they're going to have in their system.
Hmmm... I'm of two minds about this. Admittedly, the 10G stuff is currently
floating unused, and will only be slightly less so when I can get our 10G
driver pushed out, but these drivers are meant to serve as the backstop for the
driver detection process. So I can see board authors eliminating the drivers
because they've properly enabled the one driver they need, but I will need to
rework the connect code to exit more cleanly if they did it wrong.
As a second note, if you look carefully at the follow-on driver code, you'll
see that (for genphy, at least), it's not actually much bloat if you use most
drivers. The genphy_startup and genphy_shutdown functions are used all of the
time by the drivers, as is genphy_config_aneg().
I also hope to add some more interesting generic 10G code at some point, which
would make the 10G driver less bloaty as well. Well, more bloated, but also
more useful. I can add a CONFIG which controls the existence of 10G support.
I'll take a look at what would be needed to cut out the generic drivers (via
CONFIG option), but I suspect that all you'll save is the phy_driver struct,
itself, plus the genphy_config() function. The rest are needed by various PHY
drivers.
+static struct list_head phy_drivers;
+
+int phy_init(void)
+{
+INIT_LIST_HEAD(phy_drivers);
+
+return 0;
+}
isnt there a macro for declaring/initializing a list structure statically ?
then we could avoid this useless phy_init() call.
This will do all of the driver initialization, it just looks useless in this
patch.
+/* Indicates what features are supported by the interface. */
+#define SUPPORTED_10baseT_Half (1 0)
+#define SUPPORTED_10baseT_Full (1 1)
+#define SUPPORTED_100baseT_Half (1 2)
this stuff looks suspiciously like it was copy pasted from linux/ethtool.h.
why not just copy the file over instead of creating your own custom variant ?
Well, I'm torn. It is definitely copied. But include/linux/ethtool.h is 796
lines, and I've copied less than 100 of them. Most of the header is
Re: [U-Boot] [PATCH v7 01/10] nds32: add header files support for nds32
Dear Macpaul Lin,
In message 1302180333-25372-1-git-send-email-macp...@andestech.com you wrote:
Add generic header files support for nds32 architecture.
Cache, ptregs, data type and other definitions are included.
Signed-off-by: Macpaul Lin macp...@andestech.com
Checkpatch complains a lot about do not add new typedefs.
...
+#define PTREGS(reg) [reg]
This also triggers an erro-r from checkpatch, and indeed this is a
strange define.
+#define R0 uregs[1]/* R0 */
+#define R1 uregs[2]
+#define R2 uregs[3]
+#define R3 uregs[4]
+#define R4 uregs[5]
+#define R5 uregs[6]
+#define R6 uregs[7]
+#define R7 uregs[8]
+#define R8 uregs[9]
+#define R9 uregs[10]
+#define R10 uregs[11]
+#define R11 uregs[12]
+#define R12 uregs[13]
+#define R13 uregs[14]
+#define R14 uregs[15]
+#define R15 uregs[16]
+#define R16 uregs[17]
+#define R17 uregs[18]
+#define R18 uregs[19]
+#define R19 uregs[20]
+#define R20 uregs[21]
+#define R21 uregs[22]
+#define R22 uregs[23]
+#define R23 uregs[24]
+#define R24 uregs[25]
+#define R25 uregs[26]
+#define R26 uregs[27]
+#define R27 uregs[28]
+#define FP uregs[29] /* R28 */
+#define GP uregs[30] /* R29 */
+#define RA uregs[31] /* R30 */
+#define SP uregs[32] /* R31 */
+#define D0HI uregs[33]
+#define D0LO uregs[34]
+#define D1HI uregs[35]
+#define D1LO uregs[36]
+#define PSW uregs[37] /* IR0 */
+#define PC uregs[38] /* PC */
NAK. Please use a C struct instead.
...
diff --git a/arch/nds32/include/asm/u-boot.h b/arch/nds32/include/asm/u-boot.h
new file mode 100644
index 000..fafe4e4
--- /dev/null
+++ b/arch/nds32/include/asm/u-boot.h
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH www.elinos.com
+ * Marius Groeger mgroe...@sysgo.de
+ *
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Copyright (C) 2010 Shawn Lin (nobuh...@andestech.com)
+ * Copyright (C) 2011 Macpaul Lin (macp...@andestech.com)
...
+#ifndef _U_BOOT_H_
+#define _U_BOOT_H_ 1
+
+#include environment.h
+
+typedef struct bd_info {
+ int bi_baudrate;/* serial console baudrate */
+ unsigned long bi_ip_addr; /* IP Address */
+ unsigned char bi_enetaddr[6]; /* Ethernet adress */
+
+ env_t *bi_env;
+ unsigned long bi_arch_number; /* unique id for this board */
+ unsigned long bi_boot_params; /* where this board expects params */
+
+ unsigned long bi_memstart;/* start of DRAM memory */
+ unsigned long bi_memsize; /* size of DRAM memory in bytes */
+ unsigned long bi_flashstart; /* start of FLASH memory */
+ unsigned long bi_flashsize; /* size of FLASH memory */
+ unsigned long bi_flashoffset; /* reserved area for startup monitor */
+
+ struct /* RAM configuration */
+ {
+ unsigned long start;
+ unsigned long size;
+ } bi_dram[CONFIG_NR_DRAM_BANKS];
+} bd_t;
I wonder which part of this file would be (C) by any of the folks
listed above?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Time is an illusion perpetrated by the manufacturers of space.
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Re: [U-Boot] [PATCH 01/13] add XScale sub architecture (IXP/PXA) to board list
Dear Marek Vasut, In message 201104071529.42290.marek.va...@gmail.com you wrote: Marek, it seems you forgot to clean up MAINTAINERS, and also to add the removed boards to the doc/README.scrapyard file. Can you please provide cleanup patches for these commits: 4262a7c 2010-10-22 01:38:01 +0200 PXA: Remove xsengine board 7369478 2010-10-22 01:38:01 +0200 PXA: Remove wepep250 board 75e2035 2010-10-22 01:38:01 +0200 PXA: Remove delta board I just dug this out ... is this still relevant ? I think it is. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Obviously, a major malfunction has occurred. -- Steve Nesbitt, voice of Mission Control, January 28, 1986, as the shuttle Challenger exploded within view of the grandstands. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/6] Create PHY Lib for U-Boot
Dear Andy Fleming, In message b06395e4-2cf2-4af7-bc5b-be74508b4...@freescale.com you wrote: it'd be nice if all these unrelated formatting changes werent intermingled. but i guess too hard for you to untangle now. make it a pita to pick out what are functional changes and what is pure noise. A lot of that's due to checkpatch errors that hit on lines I changed, so I went through and changed all instances. This [cs]hould have done in some initial cleanup patch, then. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Worlds are conquered, galaxies destroyed -- but a woman is always a woman. -- Kirk, Conscience of the King, stardate unknown ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 01/10] nds32: add header files support for nds32
Hi Wolfgang,
2011/4/7 Wolfgang Denk w...@denx.de:
Dear Macpaul Lin,
Add generic header files support for nds32 architecture.
Cache, ptregs, data type and other definitions are included.
Signed-off-by: Macpaul Lin macp...@andestech.com
Checkpatch complains a lot about do not add new typedefs.
Indeed, but this seems is special for Linux Kernel,
I've checked some of the typedefs from other architecture code in u-boot.
Most of them are specific for u-boot only.
Even GD is one of them.
I did check typedefs one by one by myself in hand and eye checking.
If some thing is not suitable for using typedefs please let me know.
...
+#define PTREGS(reg) [reg]
This also triggers an erro-r from checkpatch, and indeed this is a
strange define.
It was strange for me, too.
However, it looks like I must use PTREGS define for ptregs for API
compatibility.
Please refer to the ARM code and MIPS, etc.
+#define R0 uregs[1] /* R0 */
+#define R1 uregs[2]
+#define R2 uregs[3]
+#define R3 uregs[4]
+#define R4 uregs[5]
+#define R5 uregs[6]
+#define R6 uregs[7]
+#define R7 uregs[8]
+#define R8 uregs[9]
+#define R9 uregs[10]
+#define R10 uregs[11]
+#define R11 uregs[12]
+#define R12 uregs[13]
+#define R13 uregs[14]
+#define R14 uregs[15]
+#define R15 uregs[16]
+#define R16 uregs[17]
+#define R17 uregs[18]
+#define R18 uregs[19]
+#define R19 uregs[20]
+#define R20 uregs[21]
+#define R21 uregs[22]
+#define R22 uregs[23]
+#define R23 uregs[24]
+#define R24 uregs[25]
+#define R25 uregs[26]
+#define R26 uregs[27]
+#define R27 uregs[28]
+#define FP uregs[29] /* R28 */
+#define GP uregs[30] /* R29 */
+#define RA uregs[31] /* R30 */
+#define SP uregs[32] /* R31 */
+#define D0HI uregs[33]
+#define D0LO uregs[34]
+#define D1HI uregs[35]
+#define D1LO uregs[36]
+#define PSW uregs[37] /* IR0 */
+#define PC uregs[38] /* PC */
NAK. Please use a C struct instead.
Other architecture use specific ARM_XXX_R0 or MIPS_XXX _R.
Since most of NDS32 registers could be used as general register, hence
we have such format in define.
If you have better idea, please give me a suggestion of the code to
the correspoded
And I think this part is specific for the API to ptregs.h.
Other architecture gose the similar format instead C structure.
If use C structure to present a set of CPU registers is adapable for
ptregs related API is workable, please give me such a hint and I will
try.
However, the define of PC or PSW for ptregs related feature I guess it
is required somehow.
Please give a suggestion if my knowledge of ptregs related APIs is wrong.
...
diff --git a/arch/nds32/include/asm/u-boot.h
b/arch/nds32/include/asm/u-boot.h
new file mode 100644
index 000..fafe4e4
--- /dev/null
+++ b/arch/nds32/include/asm/u-boot.h
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH www.elinos.com
+ * Marius Groeger mgroe...@sysgo.de
+ *
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Copyright (C) 2010 Shawn Lin (nobuh...@andestech.com)
+ * Copyright (C) 2011 Macpaul Lin (macp...@andestech.com)
...
+#ifndef _U_BOOT_H_
+#define _U_BOOT_H_ 1
+
+#include environment.h
+
+typedef struct bd_info {
+ int bi_baudrate; /* serial console baudrate */
+ unsigned long bi_ip_addr; /* IP Address */
+ unsigned char bi_enetaddr[6]; /* Ethernet adress */
+
+ env_t *bi_env;
+ unsigned long bi_arch_number; /* unique id for this board */
+ unsigned long bi_boot_params; /* where this board expects params */
+
+ unsigned long bi_memstart; /* start of DRAM memory */
+ unsigned long bi_memsize; /* size of DRAM memory in bytes */
+ unsigned long bi_flashstart; /* start of FLASH memory */
+ unsigned long bi_flashsize; /* size of FLASH memory */
+ unsigned long bi_flashoffset; /* reserved area for startup monitor */
+
+ struct /* RAM configuration */
+ {
+ unsigned long start;
+ unsigned long size;
+ } bi_dram[CONFIG_NR_DRAM_BANKS];
+} bd_t;
I wonder which part of this file would be (C) by any of the folks
listed above?
Because I'm not in the office (this is not office hour in asia).
I'll check it in the office tommorrow.
Thanks a lot.
--
Best regards,
Macpaul Lin
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Re: [U-Boot] [PATCH] Handle most LDSCRIPT setting centrally
On Thu, 7 Apr 2011 09:11:03 +0200 Wolfgang Denk w...@denx.de wrote: Dear Scott Wood, In message 20110406233136.ga13...@schlenkerla.am.freescale.net you wrote: Currently, some linker scripts are found by common code in config.mk. Some are found using CONFIG_SYS_LDSCRIPT, but the code for that is sometimes in arch config.mk and sometimes in board config.mk. Some are found using an arch-specific rule for looking in CPUDIR, etc. Further, the powerpc config.mk rule relied on CONFIG_NAND_SPL when it really wanted CONFIG_NAND_U_BOOT -- which covered up the fact that not all NAND_U_BOOT builds actually wanted CPUDIR/u-boot-nand.lds. Replace all of this -- except for a handful of boards that are actually selecting a linker script in a unique way -- with centralized ldscript finding. Thanks for this nice cleanup. Only one question: Which boards / architectures did you cover during your tests? As I noted, I did a MAKEALL ppc and all the output (sizes, errors, etc) was the same as before the patch. I tried a few arm boards, and all the ones I tried failed the same way they did before the patch. I don't have toolchains for the other arches readily available. Any help in testing this change on non-ppc would be appreciated. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/13] add XScale sub architecture (IXP/PXA) to board list
On Thursday 07 April 2011 16:58:53 Wolfgang Denk wrote: Dear Marek Vasut, In message 201104071529.42290.marek.va...@gmail.com you wrote: Marek, it seems you forgot to clean up MAINTAINERS, and also to add the removed boards to the doc/README.scrapyard file. Can you please provide cleanup patches for these commits: 4262a7c 2010-10-22 01:38:01 +0200 PXA: Remove xsengine board 7369478 2010-10-22 01:38:01 +0200 PXA: Remove wepep250 board 75e2035 2010-10-22 01:38:01 +0200 PXA: Remove delta board I just dug this out ... is this still relevant ? I think it is. Best regards, Wolfgang Denk Adding this to my todo. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 01/10] nds32: add header files support for nds32
Dear Macpaul Lin, In message banlktimhcuocvmmfrsjghxyrhykfxjt...@mail.gmail.com you wrote: Checkpatch complains a lot about do not add new typedefs. Indeed, but this seems is special for Linux Kernel, Not really. This is Linux CodingStyle policy, which we usually adapt. I've checked some of the typedefs from other architecture code in u-boot. This does not mean much. Yes, there are tons of typedef's in U-Boot, but this is old code that has not been cleaned up yet. At least we now try not to add to that pool. I did check typedefs one by one by myself in hand and eye checking. If some thing is not suitable for using typedefs please let me know. Please don't add any new typedef's. +#define PTREGS(reg) [reg] This also triggers an erro-r from checkpatch, and indeed this is a strange define. It was strange for me, too. However, it looks like I must use PTREGS define for ptregs for API compatibility. Please refer to the ARM code and MIPS, etc. I did check. There is not any code anywhere that references anything like ptreg or similar. NAK. Please use a C struct instead. Other architecture use specific ARM_XXX_R0 or MIPS_XXX _R. I'm not sure what you might be referring to. The only other file which I can find which has similar code is arch/arm/include/asm/proc-armv/ptrace.h, and this indeed should be cleaned up, too. Sorry, sometimes such things slip through the reviews. And I think this part is specific for the API to ptregs.h. It appears this is something no other architecture needs in U-Boot? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Every time history repeats itself the price goes up. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/6] Create PHY Lib for U-Boot
On Thu, Apr 7, 2011 at 10:16 AM, Andy Fleming wrote:
On Apr 6, 2011, at 6:09 PM, Mike Frysinger wrote:
On Tuesday, April 05, 2011 17:59:52 Andy Fleming wrote:
-#define debug(fmt,args...) printf (fmt ,##args)
+#define debug(fmt, args...) printf(fmt, ##args)
it'd be nice if all these unrelated formatting changes werent intermingled.
but i guess too hard for you to untangle now. make it a pita to pick out
what
are functional changes and what is pure noise.
A lot of that's due to checkpatch errors that hit on lines I changed, so I
went through and changed all instances.
you should of course know that checkpatch is simply another tool. it
does not get the final say on things.
however, you should still know that style issues in unrelated code
belongs in a sep changeset. if you're changing the code anyways (by
moving/deleting/whatever), then that's one thing. but this patch is
full of hunks where *only* style is mangled.
+static struct phy_driver gen10g_driver = {
+ .uid = 0x,
+ .mask = 0x,
+ .name = Generic 10G PHY,
+ .features = 0,
+ .config = gen10g_config,
+ .startup = gen10g_startup,
+ .shutdown = gen10g_shutdown,
+};
this probably should be split out into a dedicated phy driver. you might
care
about it, but i cant think of any board atm where i would use this. i
imagine
for most people, it's simply useless bloat.
+static struct phy_driver genphy_driver = {
+ .uid = 0x,
+ .mask = 0x,
+ .name = Generic PHY,
+ .features = 0,
+ .config = genphy_config,
+ .startup = genphy_startup,
+ .shutdown = genphy_shutdown,
+};
i think this should be split too for the board maintainers who know exactly
why phy they're going to have in their system.
Hmmm... I'm of two minds about this. Admittedly, the 10G stuff is currently
floating unused, and will only be slightly less so when I can get our 10G
driver pushed out, but these drivers are meant to serve as the backstop for
the driver detection process. So I can see board authors eliminating the
drivers because they've properly enabled the one driver they need, but I will
need to rework the connect code to exit more cleanly if they did it wrong.
As a second note, if you look carefully at the follow-on driver code, you'll
see that (for genphy, at least), it's not actually much bloat if you use most
drivers. The genphy_startup and genphy_shutdown functions are used all of
the time by the drivers, as is genphy_config_aneg().
I also hope to add some more interesting generic 10G code at some point,
which would make the 10G driver less bloaty as well. Well, more bloated, but
also more useful. I can add a CONFIG which controls the existence of 10G
support. I'll take a look at what would be needed to cut out the generic
drivers (via CONFIG option), but I suspect that all you'll save is the
phy_driver struct, itself, plus the genphy_config() function. The rest are
needed by various PHY drivers.
i can live with the genphy_driver always being there as a safety net
(plus that code gets re-used quite a bit by other phy drivers), but i
dont think the 10G for everyone makes sense. even if there was a
driver in the tree that used it right now, it doesnt make sense to
force onto everyone.
i'd venture to say that even today, 1GB is not that common. certainly
not to the degree that 100mbit is.
+static struct list_head phy_drivers;
+
+int phy_init(void)
+{
+ INIT_LIST_HEAD(phy_drivers);
+
+ return 0;
+}
isnt there a macro for declaring/initializing a list structure statically ?
then we could avoid this useless phy_init() call.
This will do all of the driver initialization, it just looks useless in this
patch.
true, but the INIT_LIST_HEAD() call would still be useless runtime
overhead. since you need to allocate/zero the data anyways, right ?
+/* Indicates what features are supported by the interface. */
+#define SUPPORTED_10baseT_Half (1 0)
+#define SUPPORTED_10baseT_Full (1 1)
+#define SUPPORTED_100baseT_Half (1 2)
this stuff looks suspiciously like it was copy pasted from linux/ethtool.h.
why not just copy the file over instead of creating your own custom variant ?
Well, I'm torn. It is definitely copied. But include/linux/ethtool.h is 796
lines, and I've copied less than 100 of them. Most of the header is
concerned with the ethtool command, which is definitely not appropriate for
U-Boot. I should add attribution, definitely. Maybe what should be done is
to take those PHY-specific bits, and move them to a separate header in Linux,
and then copy *that* header to u-boot. Perhaps just copy them into mii.h,
which is already reflected in U-Boot?
no, i really would like to keep the structure mirrored. copy the file
and
Re: [U-Boot] [PATCH v3 4/4] ARMV7: OMAP3: Add support for Comelit DIG297 board
Il 06/04/2011 09:50, Wolfgang Denk ha scritto:
Dear Luca Ceresoli,
In message1301416116-5519-5-git-send-email-luca.ceres...@comelit.it you
wrote:
Board support for the DIG297 board manufactured by Comelit Group SpA.
It is a custom board based on the BeagleBoardhttp://beagleboard.org/ by
Texas Instruments.
...
+/* GPMC CS 5 connected to an SMSC LAN9220 ethernet controller */
+#define NET_LAN9220_GPMC_CONFIG10x1000
+#define NET_LAN9220_GPMC_CONFIG20x00080701
+#define NET_LAN9220_GPMC_CONFIG30x00020201
+#define NET_LAN9220_GPMC_CONFIG40x08010701
+#define NET_LAN9220_GPMC_CONFIG50x00061D1D
+#define NET_LAN9220_GPMC_CONFIG60x9D03
+#define NET_LAN9220_GPMC_CONFIG70x0f6c
See below for general comments on the network stuff. For this block:
would it not make sense to replace the magic numbers by sumbolic
constants and/or add some documentation what these settings are
supposed to do?
I'm going to define the bit values for the GPMC_CONFIGn registers.
Is arch/arm/include/asm/arch-omap3/omap_gpmc.h the correct place?
+/* board id for Linux */
+gd-bd-bi_arch_number = MACH_TYPE_OMAP3_CPS;
Is this the correct machine ID? OMAP3_CPS does not really relate to
the board name, DIG297 ?
As per our previous discussion (see the bottom of
http://lists.denx.de/pipermail/u-boot/2011-March/088964.html), I renamed the
board everywhere except for the Machine ID in the ARM registry, and
consequently mach-types.h.
As you suggested, I plan to ask for a rename in the registry just after this
patch series is integrated in U-Boot, to avoid confusion. The rename in
mach-types.h and in my code would follow.
+/* GPIO list
+ * - 159 OUT (GPIO5+31): reset for remote camera interface connector.
+ * - 19 OUT (GPIO1+19): integrated speaker amplifier (1=on, 0=shdn).
+ * - 20 OUT (GPIO1+20): handset amplifier (1=on, 0=shdn).
+ */
Incorrect multiline comment style, please fix globally.
Do you mean like this?
- /* GPIO list
+ /*
+* GPIO list
* - 159 OUT (GPIO5+31): reset for remote camera interface connector.
* - 19 OUT (GPIO1+19): integrated speaker amplifier (1=on, 0=shdn).
+#ifdef CONFIG_CMD_NET
+/*
+ * Routine: setup_net_chip
+ * Description: Setting up the configuration GPMC registers specific to the
+ *Ethernet hardware.
+ */
+static void setup_net_chip(void)
+{
+#ifdef CONFIG_SMC911X
+struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
+
+/* Configure GPMC registers */
+writel(NET_LAN9220_GPMC_CONFIG1,gpmc_cfg-cs[5].config1);
+writel(NET_LAN9220_GPMC_CONFIG2,gpmc_cfg-cs[5].config2);
+writel(NET_LAN9220_GPMC_CONFIG3,gpmc_cfg-cs[5].config3);
+writel(NET_LAN9220_GPMC_CONFIG4,gpmc_cfg-cs[5].config4);
+writel(NET_LAN9220_GPMC_CONFIG5,gpmc_cfg-cs[5].config5);
+writel(NET_LAN9220_GPMC_CONFIG6,gpmc_cfg-cs[5].config6);
+writel(NET_LAN9220_GPMC_CONFIG7,gpmc_cfg-cs[5].config7);
This is pretty much unreadable.
Fixed using enable_gpmc_cs_config().
+/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
+writew(readw(ctrl_base-gpmc_nwe) | 0x0E00,ctrl_base-gpmc_nwe);
+/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
+writew(readw(ctrl_base-gpmc_noe) | 0x0E00,ctrl_base-gpmc_noe);
+/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
+writew(readw(ctrl_base-gpmc_nadv_ale) | 0x0E00,
+ctrl_base-gpmc_nadv_ale);
+
+/* Make GPIO 12 as output pin and send a magic pulse through it */
+if (!omap_request_gpio(NET_LAN9221_RESET_GPIO)) {
+omap_set_gpio_direction(NET_LAN9221_RESET_GPIO, 0);
+omap_set_gpio_dataout(NET_LAN9221_RESET_GPIO, 1);
+udelay(1);
+omap_set_gpio_dataout(NET_LAN9221_RESET_GPIO, 0);
+udelay(31000); /* Should be= 30ms according to datasheet */
+omap_set_gpio_dataout(NET_LAN9221_RESET_GPIO, 1);
+}
+#endif /* CONFIG_SMC911X */
+}
+#endif /* CONFIG_CMD_NET */
This is board specific code - is there any chance you will add another
network controller? Or that you will undefine CONFIG_SMC911X and
still keep CONFIG_CMD_NET defined?
Please check these #ifdef's!
Removed all #ifdef CONFIG_SMC911X. The board is never expected to exist
without Ethernet.
+int board_eth_init(bd_t *bis)
+{
+int rc = 0;
+#ifdef CONFIG_SMC911X
+rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#endif
+return rc;
+}
Also here.
Ditto.
...
+/* MCSPI1: to TOUCH controller TSC2046 (ADS7846 compatible).*/\
+MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | EN | M0)) /*McSPI1_CLK.
+IEN needed fot the McSPI to receive the clock and be able to sample
SOMI.
+Seehttp://e2e.ti.com/support/arm174_microprocessors/
+ omap_applications_processors/f/42/p/29444/102394.aspx#102394 */\
Incorrect multiline comment style. Please fix globally.
Fixed.
+
Re: [U-Boot] [PATCH v2 0/6] Universal PHY Infrastructure
On Thu, Apr 7, 2011 at 10:13 AM, Andy Fleming wrote:
On Apr 6, 2011, at 7:07 AM, Detlev Zundel wrote:
This second version cleans up all checkpatch errors that I reasonably could,
and addresses most of the comments from the first round of reviews.
WARNING: Use of volatile is usually wrong: see
Documentation/volatile-considered-harmful.txt
#1299: FILE: drivers/net/tsec.c:1740:
+static int tsec_send(struct eth_device *dev, volatile void *packet, int
length)
Ah I see. This is needed because include/net.h prescribes this as the
interface. Oh well, we should clean this up at some later point, so
it's ok from my perspective to ignore this and at least stay consistent.
WARNING: do not add new typedefs
#4271: FILE: include/phy.h:389:
+typedef enum {
I know that we have lots of typedefs, but we should not add new ones.
Actually not using this typedef for an enum-type would make the sources
easier for me to read as I don't have to do this extra lookup step.
True, but this typedef is in Linux the same way. It seemed sensible to keep
them the same
agreed. fwiw :p.
-mike
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[U-Boot] DM9000 on 2011.03
Hi, Guys
I am trying to run u-boot-2011.03 on Mini2440 (samsung S3c2440), now uboot
is running,
I have some trouble with network chip dm9000 ,
Uboot can detect the chip
net: dm9000
when doing ping, it keeps showing
raise:signal # 8 caught
if comment it out. it complains:
“could not establish link”
if comment out this in dm9000_init
#if 0
i = 0;
while (!(phy_read(1) 0x20)) {/* autonegation complete bit */
udelay(1000);
i++;
if (i == 1) {
printf(could not establish link );
return 0;
}
}
#endif
it just hanging there
any thought?
Thanks
Craig
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Re: [U-Boot] [PATCH] Handle most LDSCRIPT setting centrally
On Wed, Apr 6, 2011 at 7:31 PM, Scott Wood wrote: Currently, some linker scripts are found by common code in config.mk. Some are found using CONFIG_SYS_LDSCRIPT, but the code for that is sometimes in arch config.mk and sometimes in board config.mk. Some are found using an arch-specific rule for looking in CPUDIR, etc. Further, the powerpc config.mk rule relied on CONFIG_NAND_SPL when it really wanted CONFIG_NAND_U_BOOT -- which covered up the fact that not all NAND_U_BOOT builds actually wanted CPUDIR/u-boot-nand.lds. Replace all of this -- except for a handful of boards that are actually selecting a linker script in a unique way -- with centralized ldscript finding. If board code specifies LDSCRIPT, that will be used. Otherwise, if CONFIG_SYS_LDSCRIPT is specified, that will be used. If neither of these are specified, then the central config.mk will check for the existence of the following, in order: $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds (only if CONFIG_NAND_U_BOOT) $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds (only if CONFIG_NAND_U_BOOT) $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds $(TOPDIR)/$(CPUDIR)/u-boot.lds i guess if i simply renamed blackfin/u-boot.lds.S to blackfin/u-boot.lds, things would just work for me too. -mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] mpc83xx: add config options to spd_sdram
York, Schwarz,Andre andre.schw...@matrix-vision.de hat am 6. April 2011 um 20:42 geschrieben: York, ok - will give it a try tomorrow. hmm - having a look at the Makefile it looks like I need CONFIG_FSL_DDR2. This seems to pull in the new code ... without omitting the old one in arch/powerpc/cpu/mpc83xx/spd_sdram.c The Makefile further uses ctrl_regs.c ... which fails. having a look arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c gives : #ifdef CONFIG_MPC85xx #define _DDR_ADDR CONFIG_SYS_MPC85xx_DDR_ADDR #elif defined(CONFIG_MPC86xx) #define _DDR_ADDR CONFIG_SYS_MPC86xx_DDR_ADDR #else #error Undefined _DDR_ADDR #endif There's not a single sign of any 83xx within this code. Grepping through the board configs only show 85xx and 86xx based boards using it. Sorry, but I'm feeling like an idiot. Are you playing some game with me or am I simply unable to understand the code ? Please shed some light on this. Regards, André York Sun york...@freescale.com hat am 6. April 2011 um 18:37 geschrieben: On Wed, 2011-04-06 at 10:18 +0200, Andre Schwarz wrote: Kim, York, I have made some mods to spd_sdram.c for various reason: 1. use SPD setup also for soldered RAM. This allows DDR mounting options without U-Boot change because SPD data is written during in-circuit/boundary-scan testing. not sure I understand this - board with soldered RAM can't physically get the SPD data from RAM, yet SPD data were somehow acquired and written into some ROM, so spd_sdram() is still needed to parse program the controller without requiring a new u-boot binary? SPD data is nothing more than an I2C-EEPROM soldered on each memory module containing the physical details of the memory devices. Since I already have an I2C-EEPROM on the board I can use it for SPD data, i.e. the board's memory is configured using normal detection routines. During production (exactly: board testing) the EEPROM will be programmed with an SPD table matching the soldered memory devices. This gives some flexibility regarding size and speed grades ... some devices have pretty short life-cycles. That's right. If you have the SPD in I2C-EEPROM, you have a real SPD as far as software concerns. Just provide the I2C address. 3. for optimized signal integrity and power consumption we need more influence on the on-die termination. Although the assumed default values are working they are far from ideal. board specific things like this are perfectly acceptable, of course. ok. however, it should not be being done by glittering old-83xx/spd_sdram with an extra #ifdef for every new parameter ok - what about this : #if !defined(CONFIG_SYS_DDR_MODE_ODT_VALUE) #define CONFIG_SYS_DDR_MODE_ODT_VALUE 0x40 #endif mode_odt_enable = CONFIG_SYS_DDR_MODE_ODT_VALUE; I really can't think of this change being a problem for anybody. I would suggest to put it in fsl_ddr_board_options() in ddr.c under the board directory. There you can override any options, including popts-cs_local_opts[i].odt_rd_cfg popts-cs_local_opts[i].odt_wr_cfg popts-cpo_override York -- Gruß, André Schwarz MATRIX VISION GmbH, Talstrasse 16, DE-71570 Oppenweiler Registergericht: Amtsgericht Stuttgart, HRB 271090 Geschaeftsfuehrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] mpc83xx: add config options to spd_sdram
On Thu, 2011-04-07 at 22:42 +0200, Schwarz,Andre wrote: York, Schwarz,Andre andre.schw...@matrix-vision.de hat am 6. April 2011 um 20:42 geschrieben: York, ok - will give it a try tomorrow. hmm - having a look at the Makefile it looks like I need CONFIG_FSL_DDR2. This seems to pull in the new code ... without omitting the old one in arch/powerpc/cpu/mpc83xx/spd_sdram.c The Makefile further uses ctrl_regs.c ... which fails. having a look arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c gives : #ifdef CONFIG_MPC85xx #define _DDR_ADDR CONFIG_SYS_MPC85xx_DDR_ADDR #elif defined(CONFIG_MPC86xx) #define _DDR_ADDR CONFIG_SYS_MPC86xx_DDR_ADDR #else #error Undefined _DDR_ADDR #endif There's not a single sign of any 83xx within this code. Grepping through the board configs only show 85xx and 86xx based boards using it. Sorry, but I'm feeling like an idiot. Are you playing some game with me or am I simply unable to understand the code ? Please shed some light on this. Andre, I am sorry I totally ignored the subject with mpc83xx. I was thinking of mpc85xx. You are right the old code is in spd_sdram.c and it is still in use for mpc83xx. Unless to adjust the code, there is no board specific file. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 4/4] ARMV7: OMAP3: Add support for Comelit DIG297 board
Dear Luca Ceresoli, In message 4d9e12b7.2040...@comelit.it you wrote: I'm going to define the bit values for the GPMC_CONFIGn registers. Is arch/arm/include/asm/arch-omap3/omap_gpmc.h the correct place? I think so, but I'm not an OMAP expert. Sandeep? Is this the correct machine ID? OMAP3_CPS does not really relate to the board name, DIG297 ? As per our previous discussion (see the bottom of http://lists.denx.de/pipermail/u-boot/2011-March/088964.html), I renamed the board everywhere except for the Machine ID in the ARM registry, and consequently mach-types.h. As you suggested, I plan to ask for a rename in the registry just after this patch series is integrated in U-Boot, to avoid confusion. The rename in mach-types.h and in my code would follow. Ah, now I remember. OK. Incorrect multiline comment style, please fix globally. Do you mean like this? - /* GPIO list + /* +* GPIO list Yes. Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The more complex the mind, the greater the need for the simplicity of play. -- Kirk, Shore Leave, stardate 3025.8 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] DM9000 on 2011.03
Dear haifeng zhang, In message BANLkTim4FBa-fvd9i=xpmjkpbzcio-k...@mail.gmail.com you wrote: I am trying to run u-boot-2011.03 on Mini2440 (samsung S3c2440), now uboot is running, I have some trouble with network chip dm9000 , Uboot can detect the chip net: dm9000 when doing ping, it keeps showing raise:signal # 8 caught Which tool chain are you using? Try another one. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Anyone who knows history, particularly the history of Europe, will, I think, recognize that the domination of education or of government by any one particular religious faith is never a happy arrangement for the people. - Eleanor Roosevelt ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] CLAIMS CONTACT @ fedextodaydelivery0...@hotmail.com..
Your email has been rewarded with (£1.500,000.00GBP)in cash prize,contact fedextodaydelivery0...@hotmail.com Tel: +44 70359 65608 for details ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V6 1/4] SMDK2410: activate ARM relocation feature
On 25 March 2011 17:28, David Müller d.muel...@elsoft.ch wrote: Signed-off-by: David Müller d.muel...@elsoft.ch --- include/configs/smdk2410.h | 6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) applied to u-boot-samsung Thanks Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V6 2/4] SMDK2410: remove unneeded config.mk
On 25 March 2011 17:28, David Müller d.muel...@elsoft.ch wrote: Signed-off-by: David Müller d.muel...@elsoft.ch --- board/samsung/smdk2410/config.mk | 25 - include/configs/smdk2410.h | 2 ++ 2 files changed, 2 insertions(+), 25 deletions(-) delete mode 100644 board/samsung/smdk2410/config.mk applied to u-boot-samsung Thanks Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V6 3/4] SMDK2410: use the CFI driver (and remove the old one)
On 25 March 2011 17:28, David Müller d.muel...@elsoft.ch wrote: Signed-off-by: David Müller d.muel...@elsoft.ch --- board/samsung/smdk2410/Makefile | 2 +- board/samsung/smdk2410/flash.c | 433 - board/samsung/smdk2410/smdk2410.c | 12 + include/configs/smdk2410.h | 32 +-- 4 files changed, 25 insertions(+), 454 deletions(-) delete mode 100644 board/samsung/smdk2410/flash.c applied to u-boot-samsung Thanks Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V6 4/4] SMDK2410: various cleanup/code style fixes
On 25 March 2011 17:28, David Müller d.muel...@elsoft.ch wrote: Signed-off-by: David Müller d.muel...@elsoft.ch --- board/samsung/smdk2410/smdk2410.c | 61 +--- include/configs/smdk2410.h | 145 ++--- 2 files changed, 135 insertions(+), 71 deletions(-) applied to u-boot-samsung Thanks Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/8] Universal PHY Infrastructure
Or PHY Lib for U-Boot. This sequence of patches adds infrastructure for universally-available PHY drivers (and MDIO drivers). It piggy-backs on the existing miiphy code, for backwards compatibility, but it also creates a new set of APIs. This was necessary partly to provide cleaner interfaces for more robust driver support, and partly because one goal was to support 10G (802.3 Clause 45) MDIO buses, which has an extra argument for addressing PHY registers. Special thanks goes to Mingkai Hu, who did a substantial amount of work up front to convert the tsec PHY code into something more usable, which I have mostly copied for the purposes of PHY Lib. In this version, I cleaned up all of the comments, separated out some of the changes which were just formatting, and brought back the mdio command. The new mdio command loses the busname:addr addressing mechanism, as busname addr felt more natural to me (though I expect most people will go with ethname, as the ethernet names are much more visible. In addition, the devad argument is now optional by way of being combined with the reg argument: [devad.]regnum. This makes sense, as this is also how the registers are described in the specs and in the data sheets. ie: Register 7.1 - AN Status I've put the relevant changelogs in the patches. Enjoy! Andy Fleming (6): Remove instances of phy_read/write miiphy: Fix some formatting issues Create PHY Lib for U-Boot phylib: Add a bunch of PHY drivers from tsec tsec: Convert tsec to use PHY Lib Add mdio command for new PHY infrastructure Mingkai Hu (2): tsec: use IO accessors for IO accesses tsec: arrange the code to avoid useless function declaration arch/powerpc/include/asm/config.h |7 + arch/powerpc/include/asm/fsl_enet.h | 10 + board/freescale/mpc837xemds/mpc837xemds.c |7 + board/freescale/mpc8536ds/mpc8536ds.c |6 + board/freescale/mpc8544ds/mpc8544ds.c | 30 + board/freescale/mpc8572ds/mpc8572ds.c |6 + board/freescale/p1022ds/p1022ds.c |6 + board/freescale/p1_p2_rdb/p1_p2_rdb.c |6 + board/freescale/p2020ds/p2020ds.c |7 + common/Makefile |4 + common/cmd_mdio.c | 286 + common/miiphyutil.c | 309 +++-- drivers/net/Makefile |2 +- drivers/net/dm9000x.c | 18 +- drivers/net/enc28j60.c| 24 +- drivers/net/fsl_mdio.c| 120 ++ drivers/net/phy/Makefile | 13 + drivers/net/phy/atheros.c | 48 + drivers/net/phy/broadcom.c| 286 + drivers/net/phy/davicom.c | 98 ++ drivers/net/phy/generic_10g.c | 99 ++ drivers/net/phy/lxt.c | 87 ++ drivers/net/phy/marvell.c | 376 ++ drivers/net/phy/micrel.c | 40 + drivers/net/phy/natsemi.c | 96 ++ drivers/net/phy/phy.c | 670 ++ drivers/net/phy/realtek.c | 130 ++ drivers/net/phy/teranetics.c | 59 + drivers/net/phy/vitesse.c | 242 drivers/net/tsec.c| 1992 - drivers/net/uli526x.c | 24 +- drivers/qe/uec.c |3 - drivers/qe/uec_phy.c | 145 ++- include/config_phylib_all_drivers.h | 32 + include/fsl_mdio.h| 62 + include/linux/ethtool.h | 794 include/linux/mdio.h | 275 include/miiphy.h | 53 +- include/phy.h | 200 +++ include/tsec.h| 302 + net/eth.c |6 + 41 files changed, 4766 insertions(+), 2214 deletions(-) create mode 100644 common/cmd_mdio.c create mode 100644 drivers/net/fsl_mdio.c create mode 100644 drivers/net/phy/atheros.c create mode 100644 drivers/net/phy/broadcom.c create mode 100644 drivers/net/phy/davicom.c create mode 100644 drivers/net/phy/generic_10g.c create mode 100644 drivers/net/phy/lxt.c create mode 100644 drivers/net/phy/marvell.c create mode 100644 drivers/net/phy/micrel.c create mode 100644 drivers/net/phy/natsemi.c create mode 100644 drivers/net/phy/phy.c create mode 100644 drivers/net/phy/realtek.c create mode 100644 drivers/net/phy/teranetics.c create mode 100644 drivers/net/phy/vitesse.c create mode 100644 include/config_phylib_all_drivers.h create mode 100644 include/fsl_mdio.h create mode 100644 include/linux/ethtool.h create mode 100644 include/linux/mdio.h create mode 100644 include/phy.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/8] tsec: arrange the code to avoid useless function declaration
From: Mingkai Hu mingkai...@freescale.com
This is merely a rearrangement. No changes to the code, except
to remove now-useless declarations.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
Acked-by: Andy Fleming aflem...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
drivers/net/tsec.c | 855 +---
1 files changed, 415 insertions(+), 440 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index a2705e1..a3857b3 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -44,31 +44,6 @@ static RTXBD rtx __attribute__ ((aligned(8)));
#error rtx must be 64-bit aligned
#endif
-static int tsec_send(struct eth_device *dev,
-volatile void *packet, int length);
-static int tsec_recv(struct eth_device *dev);
-static int tsec_init(struct eth_device *dev, bd_t * bd);
-static int tsec_initialize(bd_t * bis, struct tsec_info_struct *tsec_info);
-static void tsec_halt(struct eth_device *dev);
-static void init_registers(tsec_t *regs);
-static void startup_tsec(struct eth_device *dev);
-static int init_phy(struct eth_device *dev);
-void write_phy_reg(struct tsec_private *priv, uint regnum, uint value);
-uint read_phy_reg(struct tsec_private *priv, uint regnum);
-static struct phy_info *get_phy_info(struct eth_device *dev);
-static void phy_run_commands(struct tsec_private *priv, struct phy_cmd *cmd);
-static void adjust_link(struct eth_device *dev);
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
-!defined(BITBANGMII)
-static int tsec_miiphy_write(const char *devname, unsigned char addr,
-unsigned char reg, unsigned short value);
-static int tsec_miiphy_read(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value);
-#endif
-#ifdef CONFIG_MCAST_TFTP
-static int tsec_mcast_addr (struct eth_device *dev, u8 mcast_mac, u8 set);
-#endif
-
/* Default initializations for TSEC controllers. */
static struct tsec_info_struct tsec_info[] = {
@@ -95,140 +70,6 @@ static struct tsec_info_struct tsec_info[] = {
#endif
};
-/*
- * Initialize all the TSEC devices
- *
- * Returns the number of TSEC devices that were initialized
- */
-int tsec_eth_init(bd_t *bis, struct tsec_info_struct *tsecs, int num)
-{
- int i;
- int ret, count = 0;
-
- for (i = 0; i num; i++) {
- ret = tsec_initialize(bis, tsecs[i]);
- if (ret 0)
- count += ret;
- }
-
- return count;
-}
-
-int tsec_standard_init(bd_t *bis)
-{
- return tsec_eth_init(bis, tsec_info, ARRAY_SIZE(tsec_info));
-}
-
-/* Initialize device structure. Returns success if PHY
- * initialization succeeded (i.e. if it recognizes the PHY)
- */
-static int tsec_initialize(bd_t * bis, struct tsec_info_struct *tsec_info)
-{
- struct eth_device *dev;
- int i;
- struct tsec_private *priv;
-
- dev = (struct eth_device *)malloc(sizeof *dev);
-
- if (NULL == dev)
- return 0;
-
- memset(dev, 0, sizeof *dev);
-
- priv = (struct tsec_private *)malloc(sizeof(*priv));
-
- if (NULL == priv)
- return 0;
-
- privlist[num_tsecs++] = priv;
- priv-regs = tsec_info-regs;
- priv-phyregs = tsec_info-miiregs;
- priv-phyregs_sgmii = tsec_info-miiregs_sgmii;
-
- priv-phyaddr = tsec_info-phyaddr;
- priv-flags = tsec_info-flags;
-
- sprintf(dev-name, tsec_info-devname);
- dev-iobase = 0;
- dev-priv = priv;
- dev-init = tsec_init;
- dev-halt = tsec_halt;
- dev-send = tsec_send;
- dev-recv = tsec_recv;
-#ifdef CONFIG_MCAST_TFTP
- dev-mcast = tsec_mcast_addr;
-#endif
-
- /* Tell u-boot to get the addr from the env */
- for (i = 0; i 6; i++)
- dev-enetaddr[i] = 0;
-
- eth_register(dev);
-
- /* Reset the MAC */
- setbits_be32(priv-regs-maccfg1, MACCFG1_SOFT_RESET);
- udelay(2); /* Soft Reset must be asserted for 3 TX clocks */
- clrbits_be32(priv-regs-maccfg1, MACCFG1_SOFT_RESET);
-
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
-!defined(BITBANGMII)
- miiphy_register(dev-name, tsec_miiphy_read, tsec_miiphy_write);
-#endif
-
- /* Try to initialize PHY here, and return */
- return init_phy(dev);
-}
-
-/* Initializes data structures and registers for the controller,
- * and brings the interface up. Returns the link status, meaning
- * that it returns success if the link is up, failure otherwise.
- * This allows u-boot to find the first active controller.
- */
-static int tsec_init(struct eth_device *dev, bd_t * bd)
-{
- uint tempval;
- char tmpbuf[MAC_ADDR_LEN];
- int i;
- struct tsec_private *priv = (struct tsec_private *)dev-priv;
- tsec_t *regs = priv-regs;
-
- /* Make sure the controller is stopped */
- tsec_halt(dev);
-
- /*
[U-Boot] [PATCH v3 1/8] tsec: use IO accessors for IO accesses
From: Mingkai Hu mingkai...@freescale.com
Signed-off-by: Mingkai Hu mingkai...@freescale.com
Acked-by: Andy Fleming aflem...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
v2: Fixed the commit message's spelling
v3: Removed unnecessary syncs
drivers/net/tsec.c | 249 ++--
include/tsec.h |8 +-
2 files changed, 130 insertions(+), 127 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 9a91b9e..a2705e1 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -5,7 +5,7 @@
* terms of the GNU Public License, Version 2, incorporated
* herein by reference.
*
- * Copyright 2004-2010 Freescale Semiconductor, Inc.
+ * Copyright 2004-2011 Freescale Semiconductor, Inc.
* (C) Copyright 2003, Motorola, Inc.
* author Andy Fleming
*
@@ -50,7 +50,7 @@ static int tsec_recv(struct eth_device *dev);
static int tsec_init(struct eth_device *dev, bd_t * bd);
static int tsec_initialize(bd_t * bis, struct tsec_info_struct *tsec_info);
static void tsec_halt(struct eth_device *dev);
-static void init_registers(volatile tsec_t * regs);
+static void init_registers(tsec_t *regs);
static void startup_tsec(struct eth_device *dev);
static int init_phy(struct eth_device *dev);
void write_phy_reg(struct tsec_private *priv, uint regnum, uint value);
@@ -166,9 +166,9 @@ static int tsec_initialize(bd_t * bis, struct
tsec_info_struct *tsec_info)
eth_register(dev);
/* Reset the MAC */
- priv-regs-maccfg1 |= MACCFG1_SOFT_RESET;
+ setbits_be32(priv-regs-maccfg1, MACCFG1_SOFT_RESET);
udelay(2); /* Soft Reset must be asserted for 3 TX clocks */
- priv-regs-maccfg1 = ~(MACCFG1_SOFT_RESET);
+ clrbits_be32(priv-regs-maccfg1, MACCFG1_SOFT_RESET);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
!defined(BITBANGMII)
@@ -190,16 +190,16 @@ static int tsec_init(struct eth_device *dev, bd_t * bd)
char tmpbuf[MAC_ADDR_LEN];
int i;
struct tsec_private *priv = (struct tsec_private *)dev-priv;
- volatile tsec_t *regs = priv-regs;
+ tsec_t *regs = priv-regs;
/* Make sure the controller is stopped */
tsec_halt(dev);
/* Init MACCFG2. Defaults to GMII */
- regs-maccfg2 = MACCFG2_INIT_SETTINGS;
+ out_be32(regs-maccfg2, MACCFG2_INIT_SETTINGS);
/* Init ECNTRL */
- regs-ecntrl = ECNTRL_INIT_SETTINGS;
+ out_be32(regs-ecntrl, ECNTRL_INIT_SETTINGS);
/* Copy the station address into the address registers.
* Backwards, because little endian MACS are dumb */
@@ -209,11 +209,11 @@ static int tsec_init(struct eth_device *dev, bd_t * bd)
tempval = (tmpbuf[0] 24) | (tmpbuf[1] 16) | (tmpbuf[2] 8) |
tmpbuf[3];
- regs-macstnaddr1 = tempval;
+ out_be32(regs-macstnaddr1, tempval);
tempval = *((uint *) (tmpbuf + 4));
- regs-macstnaddr2 = tempval;
+ out_be32(regs-macstnaddr2, tempval);
/* reset the indices to zero */
rxIdx = 0;
@@ -230,17 +230,17 @@ static int tsec_init(struct eth_device *dev, bd_t * bd)
}
/* Writes the given phy's reg with value, using the specified MDIO regs */
-static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr,
+static void tsec_local_mdio_write(tsec_mdio_t *phyregs, uint addr,
uint reg, uint value)
{
int timeout = 100;
- phyregs-miimadd = (addr 8) | reg;
- phyregs-miimcon = value;
- asm(sync);
+ out_be32(phyregs-miimadd, (addr 8) | reg);
+ out_be32(phyregs-miimcon, value);
timeout = 100;
- while ((phyregs-miimind MIIMIND_BUSY) timeout--) ;
+ while ((in_be32(phyregs-miimind) MIIMIND_BUSY) timeout--)
+ ;
}
@@ -254,28 +254,26 @@ static void tsec_local_mdio_write(volatile tsec_mdio_t
*phyregs, uint addr,
* notvalid bit cleared), and the bus to cease activity (miimind
* busy bit cleared), and then returns the value
*/
-static uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs,
- uint phyid, uint regnum)
+static uint tsec_local_mdio_read(tsec_mdio_t *phyregs, uint phyid, uint regnum)
{
uint value;
/* Put the address of the phy, and the register
* number into MIIMADD */
- phyregs-miimadd = (phyid 8) | regnum;
+ out_be32(phyregs-miimadd, (phyid 8) | regnum);
/* Clear the command register, and wait */
- phyregs-miimcom = 0;
- asm(sync);
+ out_be32(phyregs-miimcom, 0);
/* Initiate a read command, and wait */
- phyregs-miimcom = MIIM_READ_COMMAND;
- asm(sync);
+ out_be32(phyregs-miimcom, MIIM_READ_COMMAND);
/* Wait for the the indication that the read is done */
- while ((phyregs-miimind (MIIMIND_NOTVALID | MIIMIND_BUSY))) ;
+ while ((in_be32(phyregs-miimind) (MIIMIND_NOTVALID |
[U-Boot] [PATCH v3 4/8] miiphy: Fix some formatting issues
Mostly putting a space between function name and (, and
doing return (foo)
Signed-off-by: Andy Fleming aflem...@freescale.com
---
This is split off from the phylib changes to miiphyutil.c and miiphy.h
common/miiphyutil.c | 144 +-
include/miiphy.h| 36 ++--
2 files changed, 90 insertions(+), 90 deletions(-)
diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index e282096..6944ea7 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -39,17 +39,17 @@
#undef debug
#ifdef MII_DEBUG
-#define debug(fmt,args...) printf (fmt ,##args)
+#define debug(fmt, args...)printf(fmt, ##args)
#else
-#define debug(fmt,args...)
+#define debug(fmt, args...)
#endif /* MII_DEBUG */
struct mii_dev {
struct list_head link;
const char *name;
- int (*read) (const char *devname, unsigned char addr,
+ int (*read)(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
- int (*write) (const char *devname, unsigned char addr,
+ int (*write)(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
};
@@ -86,7 +86,7 @@ static struct mii_dev *miiphy_get_dev_by_name(const char
*devname, int quiet)
*/
void miiphy_init(void)
{
- INIT_LIST_HEAD (mii_devs);
+ INIT_LIST_HEAD(mii_devs);
current_mii = NULL;
}
@@ -95,9 +95,9 @@ void miiphy_init(void)
* Register read and write MII access routines for the device name.
*/
void miiphy_register(const char *name,
- int (*read) (const char *devname, unsigned char addr,
+ int (*read)(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value),
- int (*write) (const char *devname, unsigned char addr,
+ int (*write)(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value))
{
struct mii_dev *new_dev;
@@ -112,30 +112,30 @@ void miiphy_register(const char *name,
}
/* allocate memory */
- name_len = strlen (name);
+ name_len = strlen(name);
new_dev =
- (struct mii_dev *)malloc (sizeof (struct mii_dev) + name_len + 1);
+ (struct mii_dev *)malloc(sizeof(struct mii_dev) + name_len + 1);
if (new_dev == NULL) {
- printf (miiphy_register: cannot allocate memory for '%s'\n,
+ printf(miiphy_register: cannot allocate memory for '%s'\n,
name);
return;
}
- memset (new_dev, 0, sizeof (struct mii_dev) + name_len);
+ memset(new_dev, 0, sizeof(struct mii_dev) + name_len);
/* initalize mii_dev struct fields */
- INIT_LIST_HEAD (new_dev-link);
+ INIT_LIST_HEAD(new_dev-link);
new_dev-read = read;
new_dev-write = write;
new_dev-name = new_name = (char *)(new_dev + 1);
- strncpy (new_name, name, name_len);
+ strncpy(new_name, name, name_len);
new_name[name_len] = '\0';
- debug (miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n,
+ debug(miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n,
new_dev-name, new_dev-read, new_dev-write);
/* add it to the list */
- list_add_tail (new_dev-link, mii_devs);
+ list_add_tail(new_dev-link, mii_devs);
if (!current_mii)
current_mii = new_dev;
@@ -220,20 +220,20 @@ int miiphy_write(const char *devname, unsigned char addr,
unsigned char reg,
*
* Print out list of registered MII capable devices.
*/
-void miiphy_listdev (void)
+void miiphy_listdev(void)
{
struct list_head *entry;
struct mii_dev *dev;
- puts (MII devices: );
- list_for_each (entry, mii_devs) {
- dev = list_entry (entry, struct mii_dev, link);
- printf ('%s' , dev-name);
+ puts(MII devices: );
+ list_for_each(entry, mii_devs) {
+ dev = list_entry(entry, struct mii_dev, link);
+ printf('%s' , dev-name);
}
- puts (\n);
+ puts(\n);
if (current_mii)
- printf (Current device: '%s'\n, current_mii-name);
+ printf(Current device: '%s'\n, current_mii-name);
}
/*
@@ -253,30 +253,30 @@ int miiphy_info(const char *devname, unsigned char addr,
unsigned int *oui,
unsigned int reg = 0;
unsigned short tmp;
- if (miiphy_read (devname, addr, MII_PHYSID2, tmp) != 0) {
- debug (PHY ID register 2 read failed\n);
- return (-1);
+ if (miiphy_read(devname, addr, MII_PHYSID2, tmp) != 0) {
+ debug(PHY ID register 2 read failed\n);
+ return -1;
}
[U-Boot] [PATCH v3 8/8] Add mdio command for new PHY infrastructure
The new mdio command doesn't have all of the features of the mii
command, but it provides the necessary read/write primitives, and allows
users to interact with 10G PHYs, and other PHYs which use Clause 45 of
802.3. This means that the mdio command requires a Device Address
argument, though for clause 22 PHYs, the argument can be -.
Signed-off-by: Andy Fleming aflem...@freescale.com
---
* Eliminate busname:addr mechanism
* Switch to specifying devad like in the spec: devad.reg.
This means accessing Clause-22-style buses doesn't require a '-'
argument, and the format should be familiar to anyone reading a
Clause 45-style datasheet.
common/Makefile |3 +
common/cmd_mdio.c | 286 +
2 files changed, 289 insertions(+), 0 deletions(-)
create mode 100644 common/cmd_mdio.c
diff --git a/common/Makefile b/common/Makefile
index 00847ef..a644627 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -116,6 +116,9 @@ COBJS-$(CONFIG_MII) += miiphyutil.o
COBJS-$(CONFIG_CMD_MII) += miiphyutil.o
COBJS-$(CONFIG_PHYLIB) += miiphyutil.o
COBJS-$(CONFIG_CMD_MII) += cmd_mii.o
+ifdef CONFIG_PHYLIB
+COBJS-$(CONFIG_CMD_MII) += cmd_mdio.o
+endif
COBJS-$(CONFIG_CMD_MISC) += cmd_misc.o
COBJS-$(CONFIG_CMD_MMC) += cmd_mmc.o
COBJS-$(CONFIG_MP) += cmd_mp.o
diff --git a/common/cmd_mdio.c b/common/cmd_mdio.c
new file mode 100644
index 000..cac0703
--- /dev/null
+++ b/common/cmd_mdio.c
@@ -0,0 +1,286 @@
+/*
+ * (C) Copyright 2011 Freescale Semiconductor, Inc
+ * Andy Fleming
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * MDIO Commands
+ */
+
+#include common.h
+#include command.h
+#include miiphy.h
+#include phy.h
+
+
+static char last_op[2];
+static uint last_data;
+static uint last_addr_lo;
+static uint last_addr_hi;
+static uint last_devad_lo;
+static uint last_devad_hi;
+static uint last_reg_lo;
+static uint last_reg_hi;
+
+static int extract_range(char *input, int *plo, int *phi)
+{
+ char *end;
+ *plo = simple_strtol(input, end, 0);
+ if (end == input)
+ return -1;
+
+ if ((*end == '-') *(++end))
+ *phi = simple_strtol(end, NULL, 0);
+ else if (*end == '\0')
+ *phi = *plo;
+ else
+ return -1;
+
+ return 0;
+}
+
+int mdio_write_ranges(struct mii_dev *bus, int addrlo,
+ int addrhi, int devadlo, int devadhi,
+ int reglo, int reghi, unsigned short data)
+{
+ int addr, devad, reg;
+ int err = 0;
+
+ for (addr = addrlo; addr = addrhi; addr++) {
+ for (devad = devadlo; devad = devadhi; devad++) {
+ for (reg = reglo; reg = reghi; reg++) {
+ err = bus-write(bus, addr, devad, reg, data);
+
+ if (err)
+ goto err_out;
+ }
+ }
+ }
+
+err_out:
+ return err;
+}
+
+int mdio_read_ranges(struct mii_dev *bus, int addrlo,
+ int addrhi, int devadlo, int devadhi,
+ int reglo, int reghi)
+{
+ int addr, devad, reg;
+
+ printf(Reading from bus %s\n, bus-name);
+ for (addr = addrlo; addr = addrhi; addr++) {
+ printf(PHY at address %d:\n, addr);
+
+ for (devad = devadlo; devad = devadhi; devad++) {
+ for (reg = reglo; reg = reghi; reg++) {
+ u16 val;
+ val = bus-read(bus, addr, devad, reg);
+
+ if (val 0) {
+ printf(Error\n);
+
+ return val;
+ }
+
+ if (devad = 0)
+ printf(%d., devad);
+
+ printf(%d - 0x%x\n, reg, val 0x);
+ }
+ }
+ }
+
+ return 0;
+}
+
+/* The register will be in the form [a[-b].]x[-y] */
+int extract_reg_range(char *input, int *devadlo, int *devadhi,
+ int *reglo, int *reghi)
+{
+ char
[U-Boot] [PATCH v3 3/8] Remove instances of phy_read/write
There were a few files which were already using phy_read and phy_write
for their PHY function names. It's only a few places, and the name
seems most appropriate for the high-level abstraction, so let's
rename the other versions to something more specific.
Also, uec_phy.c had a marvell_init function which I renamed to not
conflict with the one in marvell.c
Lastly, uec_phy.c was putting a space between the phy writing
function names, and the open paren, so I fixed that
Signed-off-by: Andy Fleming aflem...@freescale.com
---
drivers/net/dm9000x.c | 18 +++---
drivers/net/enc28j60.c | 24
drivers/net/uli526x.c | 24
drivers/qe/uec.c |3 -
drivers/qe/uec_phy.c | 145
5 files changed, 107 insertions(+), 107 deletions(-)
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index 709f67a..b5c5573 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -110,8 +110,8 @@ static board_info_t dm9000_info;
/* function declaration - */
static int dm9000_probe(void);
-static u16 phy_read(int);
-static void phy_write(int, u16);
+static u16 dm9000_phy_read(int);
+static void dm9000_phy_write(int, u16);
static u8 DM9000_ior(int);
static void DM9000_iow(int reg, u8 value);
@@ -361,7 +361,7 @@ static int dm9000_init(struct eth_device *dev, bd_t *bd)
DM9000_iow(DM9000_IMR, IMR_PAR);
i = 0;
- while (!(phy_read(1) 0x20)) { /* autonegation complete bit */
+ while (!(dm9000_phy_read(1) 0x20)) { /* autonegation complete bit */
udelay(1000);
i++;
if (i == 1) {
@@ -371,7 +371,7 @@ static int dm9000_init(struct eth_device *dev, bd_t *bd)
}
/* see what we've got */
- lnk = phy_read(17) 12;
+ lnk = dm9000_phy_read(17) 12;
printf(operating at );
switch (lnk) {
case 1:
@@ -445,7 +445,7 @@ static void dm9000_halt(struct eth_device *netdev)
DM9000_DBG(%s\n, __func__);
/* RESET devie */
- phy_write(0, 0x8000); /* PHY RESET */
+ dm9000_phy_write(0, 0x8000);/* PHY RESET */
DM9000_iow(DM9000_GPR, 0x01); /* Power-Down PHY */
DM9000_iow(DM9000_IMR, 0x80); /* Disable all interrupt */
DM9000_iow(DM9000_RCR, 0x00); /* Disable RX */
@@ -581,7 +581,7 @@ DM9000_iow(int reg, u8 value)
Read a word from phyxcer
*/
static u16
-phy_read(int reg)
+dm9000_phy_read(int reg)
{
u16 val;
@@ -593,7 +593,7 @@ phy_read(int reg)
val = (DM9000_ior(DM9000_EPDRH) 8) | DM9000_ior(DM9000_EPDRL);
/* The read data keeps on REG_0D REG_0E */
- DM9000_DBG(phy_read(0x%x): 0x%x\n, reg, val);
+ DM9000_DBG(dm9000_phy_read(0x%x): 0x%x\n, reg, val);
return val;
}
@@ -601,7 +601,7 @@ phy_read(int reg)
Write a word to phyxcer
*/
static void
-phy_write(int reg, u16 value)
+dm9000_phy_write(int reg, u16 value)
{
/* Fill the phyxcer register into REG_0C */
@@ -613,7 +613,7 @@ phy_write(int reg, u16 value)
DM9000_iow(DM9000_EPCR, 0xa); /* Issue phyxcer write command */
udelay(500);/* Wait write complete */
DM9000_iow(DM9000_EPCR, 0x0); /* Clear phyxcer write command */
- DM9000_DBG(phy_write(reg:0x%x, value:0x%x)\n, reg, value);
+ DM9000_DBG(dm9000_phy_write(reg:0x%x, value:0x%x)\n, reg, value);
}
int dm9000_initialize(bd_t *bis)
diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c
index 6c161b6..d55cacd 100644
--- a/drivers/net/enc28j60.c
+++ b/drivers/net/enc28j60.c
@@ -314,7 +314,7 @@ static void enc_release_bus(enc_dev_t *enc)
/*
* Read PHY register
*/
-static u16 phy_read(enc_dev_t *enc, const u8 addr)
+static u16 enc_phy_read(enc_dev_t *enc, const u8 addr)
{
uint64_t etime;
u8 status;
@@ -339,7 +339,7 @@ static u16 phy_read(enc_dev_t *enc, const u8 addr)
/*
* Write PHY register
*/
-static void phy_write(enc_dev_t *enc, const u8 addr, const u16 data)
+static void enc_phy_write(enc_dev_t *enc, const u8 addr, const u16 data)
{
uint64_t etime;
u8 status;
@@ -374,7 +374,7 @@ static int enc_phy_link_wait(enc_dev_t *enc)
#ifdef CONFIG_ENC_SILENTLINK
/* check if we have a link, then just return */
- status = phy_read(enc, PHY_REG_PHSTAT1);
+ status = enc_phy_read(enc, PHY_REG_PHSTAT1);
if (status ENC_PHSTAT1_LLSTAT)
return 0;
#endif
@@ -382,10 +382,10 @@ static int enc_phy_link_wait(enc_dev_t *enc)
/* wait for link with 1 second timeout */
etime = get_ticks() + get_tbclk();
while (get_ticks() = etime) {
- status = phy_read(enc, PHY_REG_PHSTAT1);
+ status = enc_phy_read(enc, PHY_REG_PHSTAT1);
if (status ENC_PHSTAT1_LLSTAT) {
/* now we have a link */
- status = phy_read(enc,
[U-Boot] [PATCH v3 6/8] phylib: Add a bunch of PHY drivers from tsec
The tsec driver had a bunch of PHY drivers already written. This
converts them all into PHY Lib drivers, and serves as the first
set of PHY drivers for PHY Lib.
While doing that, cleaned up a number of magic numbers (though
not all of them, as PHY vendors like to keep their numbers as
magical as possible). Also, noticed that almost all of the
vitesse/cicada PHYs had the same config/parse/startup functions,
so those have been collapsed into one.
Signed-off-by: Andy Fleming aflem...@freescale.com
---
v3:
* Add phy_ prefix to PHY driver init functions
* Rename phylib_all_drivers.h to config_phylib_all_drivers.h
* Make some minor changes to support 10G under the new divided paradigm
v2:
* Added teranetics_init() to init function
* Sorted init functions in phy_init and in phy.h
* Sorted PHYs in drivers/net/phy/Makefile
* GPL v2+ on all new files
* Left the 500ms delay after autonegotiation for PHY drivers that had it,
as I don't want to break the driver-specific functionality. I suspect that
either we've already fixed the bug this was really working around, or we
will need a bug fix in the generic code. Either way, this code doesn't
change the previous behavior, and can always be fixed at a later date,
when one of us has time to actually test it out.
* Added many constants and consolidated the vitesse functions
drivers/net/phy/Makefile| 11 +
drivers/net/phy/atheros.c | 48 +
drivers/net/phy/broadcom.c | 286 ++
drivers/net/phy/davicom.c | 98 +
drivers/net/phy/lxt.c | 87
drivers/net/phy/marvell.c | 376 +++
drivers/net/phy/micrel.c| 40
drivers/net/phy/natsemi.c | 96 +
drivers/net/phy/phy.c | 31 +++
drivers/net/phy/realtek.c | 130
drivers/net/phy/teranetics.c| 59 ++
drivers/net/phy/vitesse.c | 242 ++
include/config_phylib_all_drivers.h | 32 +++
include/phy.h | 11 +
14 files changed, 1547 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/phy/atheros.c
create mode 100644 drivers/net/phy/broadcom.c
create mode 100644 drivers/net/phy/davicom.c
create mode 100644 drivers/net/phy/lxt.c
create mode 100644 drivers/net/phy/marvell.c
create mode 100644 drivers/net/phy/micrel.c
create mode 100644 drivers/net/phy/natsemi.c
create mode 100644 drivers/net/phy/realtek.c
create mode 100644 drivers/net/phy/teranetics.c
create mode 100644 drivers/net/phy/vitesse.c
create mode 100644 include/config_phylib_all_drivers.h
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 609a22f..a59834b 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -27,8 +27,19 @@ LIB := $(obj)libphy.o
COBJS-$(CONFIG_BITBANGMII) += miiphybb.o
COBJS-$(CONFIG_MV88E61XX_SWITCH) += mv88e61xx.o
+
COBJS-$(CONFIG_PHYLIB) += phy.o
COBJS-$(CONFIG_PHYLIB_10G) += generic_10g.o
+COBJS-$(CONFIG_PHY_ATHEROS) += atheros.o
+COBJS-$(CONFIG_PHY_BROADCOM) += broadcom.o
+COBJS-$(CONFIG_PHY_DAVICOM) += davicom.o
+COBJS-$(CONFIG_PHY_LXT) += lxt.o
+COBJS-$(CONFIG_PHY_MARVELL) += marvell.o
+COBJS-$(CONFIG_PHY_MICREL) += micrel.o
+COBJS-$(CONFIG_PHY_NATSEMI) += natsemi.o
+COBJS-$(CONFIG_PHY_REALTEK) += realtek.o
+COBJS-$(CONFIG_PHY_TERANETICS) += teranetics.o
+COBJS-$(CONFIG_PHY_VITESSE) += vitesse.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
new file mode 100644
index 000..798473d
--- /dev/null
+++ b/drivers/net/phy/atheros.c
@@ -0,0 +1,48 @@
+/*
+ * Atheros PHY drivers
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * author Andy Fleming
+ *
+ */
+#include phy.h
+
+static int ar8021_config(struct phy_device *phydev)
+{
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47);
+
+ return 0;
+}
+
+struct phy_driver AR8021_driver = {
+ .name = AR8021,
+ .uid = 0x4dd040,
+ .mask = 0xf0,
+ .features = PHY_GBIT_FEATURES,
+ .config = ar8021_config,
+ .startup = genphy_startup,
+ .shutdown
Re: [U-Boot] [PATCH v3 5/8] Create PHY Lib for U-Boot
Dear Andy Fleming, In message 1302231367-25321-6-git-send-email-aflem...@freescale.com you wrote: Extends the mii_dev structure to participate in a full-blown MDIO and PHY driver scheme. The mii_dev structure and miiphy calls are modified in such a way to allow the original mii command and miiphy infrastructure to work as before, but also to support a new set of APIs which allow (among other things) sharing of PHY driver code and 10G support The mii command will continue to support normal PHY management functions (Clause 22 of 802.3), but will not be changed to support 10G (Clause 45). The basic design is similar to PHY Lib from Linux, but simplified for U-Boot's network and driver infrastructure. ... v3: * Made mii_dev-name an array, and added a warning for if someone ever tries to register a bus with more than 32 characters * Fixed some minor formatting issues * Changed phy_read and phy_write to be inline functions in phy.h * Moved mii_dev definition to phy.h (necessary for phy_read/phy_write) * Split out 10G support so it's only built if CONFIG_PHYLIB_10G is defined * Removed constants stolen from linux, and added linux/mdio.h and linux/ethtool.h I understand this is still code copied from Linux, right? I already asked this before: can you please merk in the commit message where exactly code has been copied from, and which? We need exact reference, with exact kernel version / commit ID. Please see bullet 4 at http://www.denx.de/wiki/view/U-Boot/Patches#Attributing_Code_Copyrights_Sign Thanks. Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Every program has at least one bug and can be shortened by at least one instruction - from which, by induction, one can deduce that every program can be reduced to one instruction which doesn't work. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] config_defaults.h: drop OSE bootm default
Most arches don't support OSE, and this is a new bootm target, so the likelihood of any board actually wanting this today is fairly low. Any board who actually wants this can enable it in the board-specific config without making it a default bloat. Signed-off-by: Mike Frysinger vap...@gentoo.org --- include/config_defaults.h |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/include/config_defaults.h b/include/config_defaults.h index abdf3be..0337163 100644 --- a/include/config_defaults.h +++ b/include/config_defaults.h @@ -12,7 +12,6 @@ /* Support bootm-ing different OSes */ #define CONFIG_BOOTM_LINUX 1 #define CONFIG_BOOTM_NETBSD 1 -#define CONFIG_BOOTM_OSE 1 #define CONFIG_BOOTM_RTEMS 1 #define CONFIG_GZIP 1 -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request u-boot-blackfin.git
The following changes since commit 4db2fa7f9446d0f2fe8db3d62184b1212fe22707: Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx (2011-04-05 12:24:20 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-blackfin.git master Andreas Schallenberg (1): Blackfin: dnp5370: new board port Chong Huang (1): Blackfin: bf525-ucr2: new board port Cliff Cai (1): Blackfin: bfin_sdh: set all timer bits before transfer Kyle Moffett (1): Blackfin: replace bfin_reset_or_hang() with panic() Mike Frysinger (29): Blackfin: bf518f-ezbrd: don't require SPI logic all the time Blackfin: skip RAM display for 0 mem systems Blackfin: drop CONFIG_SYS_TEXT_BASE from boards Blackfin: unify bootmode based LDR_FLAGS setup Blackfin: move CONFIG_BFIN_CPU back to board config.h Blackfin: bf527-sdp: update custom CFLAGS paths Blackfin: bf537-pnav/blackstamp/blackvme: drop empty config.mk files Blackfin: serial: clean up muxing a bit Blackfin: bf537-minotaur/bf537-srv1: undefine nfs when net is disabled Blackfin: bf537: fix L1 data defines Blackfin: bf561-ezkit/ibf-dsp561: invert env offset/addr logic Blackfin: fix bd_t handling Blackfin: BF50x: new processor port Blackfin: drop duplicate system mmr and L1 scratch defines Blackfin: BF52x: unify duplicated headers Blackfin: BF537: unify duplicated headers Blackfin: only check for os log when we have external memory Blackfin: turn off caches when self initializing Blackfin: default to L1 bank A when L1 bank B does not exist Blackfin: bf506f-ezkit: new board port Blackfin: adi boards: drop old ELF define Blackfin: bootrom.h: sync with toolchain Blackfin: bootldr: use common defines Blackfin: ldrinfo: new command Blackfin: adi boards: enable ldrinfo Blackfin: adi boards: enable CONFIG_MONITOR_IS_IN_RAM Blackfin: bf548-ezkit: move env sector Blackfin: bf518f-ezbrd: get MAC from flash Blackfin: bf526-ezbrd: get MAC from flash Sonic Zhang (1): Blackfin: bfin_sdh: add support for multiblock operations MAINTAINERS| 10 + README |1 + arch/blackfin/config.mk| 15 +- arch/blackfin/cpu/cpu.h|1 - arch/blackfin/cpu/gpio.c |8 +- arch/blackfin/cpu/initcode.c | 25 +- arch/blackfin/cpu/reset.c | 18 +- arch/blackfin/cpu/serial.h | 72 +- arch/blackfin/cpu/start.S | 45 +- arch/blackfin/cpu/traps.c |2 +- arch/blackfin/include/asm/blackfin_cdef.h |6 + arch/blackfin/include/asm/blackfin_def.h | 10 + arch/blackfin/include/asm/config.h | 10 +- arch/blackfin/include/asm/mach-bf506/BF504_cdef.h | 1782 arch/blackfin/include/asm/mach-bf506/BF504_def.h | 944 +++ arch/blackfin/include/asm/mach-bf506/BF506_cdef.h | 11 + arch/blackfin/include/asm/mach-bf506/BF506_def.h | 11 + arch/blackfin/include/asm/mach-bf506/anomaly.h | 128 ++ arch/blackfin/include/asm/mach-bf506/def_local.h |5 + arch/blackfin/include/asm/mach-bf506/gpio.h| 52 + arch/blackfin/include/asm/mach-bf506/portmux.h | 148 ++ arch/blackfin/include/asm/mach-bf506/ports.h | 59 + arch/blackfin/include/asm/mach-bf518/BF512_def.h |6 - .../asm/mach-bf527/ADSP-EDN-BF52x-extended_cdef.h | 994 --- .../asm/mach-bf527/ADSP-EDN-BF52x-extended_def.h | 503 -- arch/blackfin/include/asm/mach-bf527/BF522_cdef.h | 986 +++- arch/blackfin/include/asm/mach-bf527/BF522_def.h | 495 ++- arch/blackfin/include/asm/mach-bf527/BF524_cdef.h | 20 +- arch/blackfin/include/asm/mach-bf527/BF524_def.h | 12 +- arch/blackfin/include/asm/mach-bf527/BF526_cdef.h | 358 + arch/blackfin/include/asm/mach-bf527/BF526_def.h | 181 +-- arch/blackfin/include/asm/mach-bf533/BF531_def.h |6 - arch/blackfin/include/asm/mach-bf533/BF532_def.h |6 - arch/blackfin/include/asm/mach-bf533/BF533_def.h |6 - .../asm/mach-bf537/ADSP-EDN-BF534-extended_cdef.h | 1624 -- .../asm/mach-bf537/ADSP-EDN-BF534-extended_def.h | 819 - arch/blackfin/include/asm/mach-bf537/BF534_cdef.h | 1614 ++- arch/blackfin/include/asm/mach-bf537/BF534_def.h | 816 +- arch/blackfin/include/asm/mach-bf538/BF538_def.h |6 - arch/blackfin/include/asm/mach-bf561/BF561_def.h |7 +- .../include/asm/mach-common/bits/bootrom.h | 86 +- arch/blackfin/lib/board.c | 21 +- arch/blackfin/lib/u-boot.lds.S | 10 +- board/bct-brettl2/config.mk
Re: [U-Boot] [PATCH v3 0/8] Universal PHY Infrastructure
do you have a git tree hosting these changes ? -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Blackfin: use common LDSCRIPT logic
Now that common code is a bit smarter when it comes to default LDSCRIPT
values, rename the default Blackfin file and drop the Blackfin-specific
config.mk logic.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
arch/blackfin/config.mk|4 -
arch/blackfin/cpu/u-boot.lds | 158
arch/blackfin/lib/u-boot.lds.S | 158
3 files changed, 158 insertions(+), 162 deletions(-)
create mode 100644 arch/blackfin/cpu/u-boot.lds
delete mode 100644 arch/blackfin/lib/u-boot.lds.S
diff --git a/arch/blackfin/config.mk b/arch/blackfin/config.mk
index 95cf7db..f35b579 100644
--- a/arch/blackfin/config.mk
+++ b/arch/blackfin/config.mk
@@ -76,10 +76,6 @@ LDR_FLAGS += $(LDR_FLAGS-y)
# Set some default LDR flags based on boot mode.
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
-ifeq ($(wildcard $(TOPDIR)/board/$(BOARD)/u-boot.lds*),)
-LDSCRIPT = $(obj)arch/$(ARCH)/lib/u-boot.lds.S
-endif
-
ifneq ($(CONFIG_SYS_TEXT_BASE),)
$(error do not set CONFIG_SYS_TEXT_BASE for Blackfin boards)
endif
diff --git a/arch/blackfin/cpu/u-boot.lds b/arch/blackfin/cpu/u-boot.lds
new file mode 100644
index 000..2b8d285
--- /dev/null
+++ b/arch/blackfin/cpu/u-boot.lds
@@ -0,0 +1,158 @@
+/*
+ * U-boot - u-boot.lds.S
+ *
+ * Copyright (c) 2005-2010 Analog Device Inc.
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include config.h
+#include asm/blackfin.h
+#undef ALIGN
+#undef ENTRY
+
+#ifndef LDS_BOARD_TEXT
+# define LDS_BOARD_TEXT
+#endif
+
+/* If we don't actually load anything into L1 data, this will avoid
+ * a syntax error. If we do actually load something into L1 data,
+ * we'll get a linker memory load error (which is what we'd want).
+ * This is here in the first place so we can quickly test building
+ * for different CPU's which may lack non-cache L1 data.
+ */
+#ifndef L1_DATA_A_SRAM
+# define L1_DATA_A_SRAM 0
+# define L1_DATA_A_SRAM_SIZE 0
+#endif
+#ifndef L1_DATA_B_SRAM
+# define L1_DATA_B_SRAM L1_DATA_A_SRAM
+# define L1_DATA_B_SRAM_SIZE L1_DATA_A_SRAM_SIZE
+#endif
+
+/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
+#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1
+# define L1_CODE_ORIGIN L1_INST_SRAM
+#else
+# define L1_CODE_ORIGIN L1_INST_SRAM + 0xC
+#endif
+
+OUTPUT_ARCH(bfin)
+
+MEMORY
+{
+#if CONFIG_MEM_SIZE
+ ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH =
CONFIG_SYS_MONITOR_LEN
+# define ram_code ram
+# define ram_data ram
+#else
+# define ram_code l1_code
+# define ram_data l1_data
+#endif
+ l1_code : ORIGIN = L1_CODE_ORIGIN, LENGTH = L1_INST_SRAM_SIZE
+ l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
+}
+
+ENTRY(_start)
+SECTIONS
+{
+ .text.pre :
+ {
+ arch/blackfin/cpu/start.o (.text .text.*)
+
+ LDS_BOARD_TEXT
+ } ram_code
+
+ .text.init :
+ {
+ arch/blackfin/cpu/initcode.o (.text .text.*)
+ } ram_code
+ __initcode_lma = LOADADDR(.text.init);
+ __initcode_len = SIZEOF(.text.init);
+
+ .text :
+ {
+ *(.text .text.*)
+ } ram_code
+
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ . = ALIGN(4);
+ } ram_data
+
+ .data :
+ {
+ . = ALIGN(4);
+ *(.data .data.*)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ } ram_data
+
+ .u_boot_cmd :
+ {
+ ___u_boot_cmd_start = .;
+ *(.u_boot_cmd)
+ ___u_boot_cmd_end = .;
+ } ram_data
+
+ .text_l1 :
+ {
+ . = ALIGN(4);
+ __stext_l1 = .;
+ *(.l1.text)
+ . = ALIGN(4);
+ __etext_l1 = .;
+ } l1_code ATram_code
+ __text_l1_lma = LOADADDR(.text_l1);
+ __text_l1_len = SIZEOF(.text_l1);
+ ASSERT (__text_l1_len = L1_INST_SRAM_SIZE, L1 text overflow!)
+
+
Re: [U-Boot] [PATCH] Blackfin: use common LDSCRIPT logic
On Friday, April 08, 2011 00:56:34 Mike Frysinger wrote: create mode 100644 arch/blackfin/cpu/u-boot.lds delete mode 100644 arch/blackfin/lib/u-boot.lds.S blah, prob should have used -M. this is a simple rename. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
