[U-Boot] MBR emulation
I have a Tegra 2 device that stores its configuration data in the spot that the MBR is meant to sit on the device this is immobile and cannot be moved, The device has a GPT partition table but no MBR, is there a way to either make u-boot just read the GPT from the end of the emmc or, emulate the mbr either statically or by loading an MBR.bin from elsewhere on the emmc device. At the moment u-boot does see the emmc but cannot read the partition table ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] ARM926ejs: Add routines to invalidate D-Cache
Hi Marek Vasut, On 08/10/2011 01:52 PM, Marek Vasut wrote: On Wednesday, August 10, 2011 04:49:25 AM Hong Xu wrote: After DMA operation, we need to maintain D-Cache coherency. So that the DCache must be invalidated (hence CPU will fetch data written by DMA controller from RAM). Tested on AT91SAM9261EK with Peripheral DMA controller. Hi Hong, one more thing, not that I want to disappoint you. Not at all ;-) To raise such discussion is not bad actually. Try to take a look at arch/arm/cpu/armv7/cache_v7.c Maybe we should do the same for arm926ejs -- have arch/arm/cpu/arm926ejs/cache.c -- containing arm926ejs specific cache management functions. That way, arch/arm/lib/cache.c won't become mess. What do you think ? Basically I'm not quite sure about the design of ARM cache part. I noticed the work for armv7, but I've thought it as a special case because armv7 cache part looks more complicated than ARM926. There are some ARM926 specific code in arch/arm/lib/cache.c; So I also put the stuff there. ;-) I think Albert Aribaud or the original contributor of cache part shall have clearer view.So, I'll keep neutral to hear more ideas. BR, Eric Signed-off-by: Hong Xuhong...@atmel.com Tested-by: Elen Songelen.s...@atmel.com CC: Albert Aribaudalbert.u.b...@aribaud.net CC: Aneesh Vane...@ti.com CC: Marek Vasutmarek.va...@gmail.com CC: Reinhard Meyeru-b...@emk-elektronik.de CC: Heiko Schocherh...@denx.de --- V2: Per Albert's suggestion, add invalidate_dcache_range V3: invalidate_dcache_range emits warning when detecting unaligned buffer invalidate_dcache_range won't clean any adjacent cache line when detecting unaligned buffer and only round up/down the buffer address v4: invalidate_dcache_range will emit clearer warning message Per Albert's suggestion, if not alighed to cache line size, round up start address, round down stop addres Per Marek Vasut's suggestion, use __func__ stated in C99 arch/arm/lib/cache.c | 58 ++ 1 files changed, 58 insertions(+), 0 deletions(-) [...] ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4] I2C: mxc_i2c rework
On Wed, Aug 10, 2011 at 1:59 PM, Marek Vasut marek.va...@gmail.com wrote:
On Saturday, July 30, 2011 12:52:53 PM Marek Vasut wrote:
On Saturday, July 30, 2011 08:42:19 AM Jason Hui wrote:
Hi, Marek,
On Sat, Jul 30, 2011 at 1:09 AM, Marek Vasut marek.va...@gmail.com wrote:
On Friday, July 29, 2011 01:24:49 PM Jason Hui wrote:
Hi, Marek,
On Fri, Jul 29, 2011 at 5:32 PM, Marek Vasut marek.va...@gmail.com
wrote:
Rewrite the mxc_i2c driver.
* This version is much closer to Linux implementation.
* Fixes IPG_PERCLK being incorrectly used as clock source
* Fixes behaviour of the driver on iMX51
* Clean up coding style a bit ;-)
I don't think you did the right thing by chaning IPG_PERCLK to IPG_CLK
As I said, the IPG_CLK is for IP register clock, while IPG_PERCLK is
for i2c function clock.
if you run clock command from mx51evk, you will get:
...
ipg clock : 6650Hz
ipg per clock : 66500Hz
MX51EVK U-Boot
It will give you that ipg per clock is 665M, which seems too big. It
is due to we configure
the pre-divider/pos-devider for perclk to zero, which leads to ipg_per
clock to be same as pll2 clock.
But I don't think this will have some issue.
Yes it will, the divider will be computed to be maximum in all cases
... you won't be able it divide 665MHz by anything from the table 40-7
in MX51RM to achieve any reasonable frequency.
On the contrary, 66.5MHz does give fine results.
it that, we can change the ipg_perclk to low freq, but we should not
change the i2c clock to ipg_clk, this is not correct.
BTW, I have applied your patch and test on mx53evk board, it seems the
i2c does not work correctly.
Great. The clock used by the I2C module for this task are likely the
module_clock, which are -- like on MX51 -- 66.5MHz. What do you get
when you run the clock command on MX53EVK ?
I'm not in the office for the whole next week, thus, I can't give you
the clock output for
mx53evk, but I'm sure the ipg_perclk on mx53evk is not set at 66.5Mhz.
Yes, it's 33.3MHz on iMX53. I got a (remote) hand of a MX53 board. The IPG
clock, on the other hand, are 66.5MHz on both MX51 and MX53. Maybe the
issue with PMIC you're seeing is something else?
btw. how did you obtain these results ? Can you check the FDR divider value
with and without this patch?
You can use the clock command to get it. As for the FDR, you want me to check it
on i.mx53evk board right?
Jason
Thanks
Jason
Thanks
After apply your patch:
MX53EVK U-Boot pmic dump 30
PMIC ID: 0x [Rev: unknown]
0x00: 0001 00ff 0039 00ff
0x08:
0040 0x10:
0001 0x18: 0045 0045 0080
0021 0002 0x20: 0004 0021
0x28:
0004 00ae
The old:
MX53EVK U-Boot pmic dump 30
PMIC ID: 0x45d0 [Rev: 2.0]
0x00: 00015088 00ff 00395208 0081 00fff7ff 401c 0418
45d0 0x08: 0001 0040
0040 0x10: 0011
0001 7fff 0x18: 00454a52 00456739 631a 0080739c
0021284a 0a0a 00024fd0 01d8 0x20: 00049208 00218000
0x28:
8000 00046046 01c0 00aeeaee
Jason
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Re: [U-Boot] [PATCH 4/4] armv7: cache: remove flush on un-aligned invalidate
Hi Anton, Le 09/08/2011 18:39, Anton Staaf a écrit : I'm not sure what the larger context of this change is, but it seems like a bad idea to me. There are a lot of locations in U-Boot that will end up causing an unaligned invalidate (ext2 and dos file system code in particular). And this change will cause those unaligned invalidates to possibly throw away stores to adjacent variables. If you are going to make this change you should at least assert instead of just printing a warning. And there should be a concerted effort to clean up the buffer management in U-Boot so that invalidates will never be unaligned. This is also a departure from the cache management implementations in the Linux kernel, not that U-Boot has to do exactly what they do, but I feel they have the correct implementation, from the perspective of ensuring that all stores actually make it to main memory. There's been a lot of discussion, both in July and August, about this and the the conclusion is that unaligned invalidates (and flushes) cannot reliably be done within the size and speed constraints of an embedded bootloader, and there are no 100% clean solutions without alignment, because with unaligned buffers, one might invalidate a cache line containing also deferred writes, or flush a line onto a buffer currently undergoing DMA. Linux can afford to spend more space and time than U-Boot to solving those issues. OTOH, aligning buffers is a relatively trivial change in the calling code that allows for much simpler and more efficient cache management. The current cache patches on ARM are precisely the start of the effort to align buffers that you suggest, by warning the developer about unaligned invalidates/flushes through the console, and turning any side effect to an inside-effect, so to speak: for instance the recent cache invalidate patch on arm926ejs prevents unaligned invalidates from affecting any other data than the (badly) invalidated buffer itself. You have a point though that maybe a warning is not enough and that unalignments warrant an assert instead. OTOH, that might mean *a lot* of boards will completely cease working in this case, even for live debugging the issue with basic U-Boot commands (which many developers do I am sure). Comments on this warning/assert point? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] ARM926ejs: Add routines to invalidate D-Cache
Hi Hong Xu, Le 10/08/2011 08:17, Hong Xu a écrit : There are some ARM926 specific code in arch/arm/lib/cache.c; So I also put the stuff there. ;-) I think Albert Aribaud or the original contributor of cache part shall have clearer view.So, I'll keep neutral to hear more ideas. Basically, cache operations are CP15 commands which are defined for each ARM architecture, not for each ISA, so Marek is right about the best place for this being in arm926ejs. Actually, I think arch/arm/lib/cache.c should only contain the weak defaults (i.e., no real cache action) and each architecture should provide overrides to the defaults. Currently this is almost the case, with (apart from arm926ejs which you're already touching) only one arm1136 specific implementation to move. So please move the arm926ejs specific implementations to arch/arm/cpu/arm926ejs/cache.c as suggested by Marek, keeping only the weak default in arch/arm/lib/cache.c. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] ARM926ejs: Add routines to invalidate D-Cache
Hi Albert, On 08/10/2011 02:36 PM, Albert ARIBAUD wrote: Hi Hong Xu, Le 10/08/2011 08:17, Hong Xu a écrit : There are some ARM926 specific code in arch/arm/lib/cache.c; So I also put the stuff there. ;-) I think Albert Aribaud or the original contributor of cache part shall have clearer view.So, I'll keep neutral to hear more ideas. Basically, cache operations are CP15 commands which are defined for each ARM architecture, not for each ISA, so Marek is right about the best place for this being in arm926ejs. Actually, I think arch/arm/lib/cache.c should only contain the weak defaults (i.e., no real cache action) and each architecture should provide overrides to the defaults. Currently this is almost the case, with (apart from arm926ejs which you're already touching) only one arm1136 specific implementation to move. So please move the arm926ejs specific implementations to arch/arm/cpu/arm926ejs/cache.c as suggested by Marek, keeping only the weak default in arch/arm/lib/cache.c. Ok, I'll manage a basic version for review. Thanks BR, Eric Amicalement, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] armv7: cache: remove flush on un-aligned invalidate
Hi Anton, On Tuesday 09 August 2011 10:09 PM, Anton Staaf wrote: I'm not sure what the larger context of this change is, but it seems like a bad idea to me. There are a lot of locations in U-Boot that Please see this thread for the context. http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/105113/focus=105135 will end up causing an unaligned invalidate (ext2 and dos file system code in particular). And this change will cause those unaligned invalidates to possibly throw away stores to adjacent variables. If No. Those partial cache-lines on the boundary are left alone. They are not invalidated. So, it still affects only the party calling the invalidate. you are going to make this change you should at least assert instead of just printing a warning. And there should be a concerted effort to clean up the buffer management in U-Boot so that invalidates will never be unaligned. This is also a departure from the cache management implementations in the Linux kernel, not that U-Boot has to do exactly what they do, but I feel they have the correct implementation, from the perspective of ensuring that all stores actually make it to main memory. Yes, I had implemented it in line with the kernel apporach. However, with un-aligned buffers there is no perfect solution anyway. So, I don't have a strong opinion on this. Leaving alone the boundary cache-lines and printing a big warning seems reasonable enough. best regards, Aneesh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mmc: Fix mmc_send_status()
The mmc_send_status() function sets cmd.arg = 0. That's incorrect, so fix it.
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
drivers/mmc/mmc.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index cbd7567..c9ff023 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -115,7 +115,7 @@ int mmc_send_status(struct mmc *mmc, int timeout)
cmd.cmdidx = MMC_CMD_SEND_STATUS;
cmd.resp_type = MMC_RSP_R1;
- cmd.cmdarg = 0;
+ cmd.cmdarg = mmc-rca 16;
cmd.flags = 0;
do {
--
1.7.5.4
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Re: [U-Boot] [PATCH] mmc: Fix mmc_send_status()
On Wednesday, August 10, 2011 09:08:33 AM Marek Vasut wrote:
The mmc_send_status() function sets cmd.arg = 0. That's incorrect, so fix
it.
Missed Andy, adding to CC. Sorry Andy.
btw this fixes my CMD13 issue.
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
drivers/mmc/mmc.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index cbd7567..c9ff023 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -115,7 +115,7 @@ int mmc_send_status(struct mmc *mmc, int timeout)
cmd.cmdidx = MMC_CMD_SEND_STATUS;
cmd.resp_type = MMC_RSP_R1;
- cmd.cmdarg = 0;
+ cmd.cmdarg = mmc-rca 16;
cmd.flags = 0;
do {
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Re: [U-Boot] [PATCH V4] I2C: mxc_i2c rework
On Wednesday, August 10, 2011 08:26:05 AM Jason Hui wrote: On Wed, Aug 10, 2011 at 1:59 PM, Marek Vasut marek.va...@gmail.com wrote: On Saturday, July 30, 2011 12:52:53 PM Marek Vasut wrote: On Saturday, July 30, 2011 08:42:19 AM Jason Hui wrote: Hi, Marek, On Sat, Jul 30, 2011 at 1:09 AM, Marek Vasut marek.va...@gmail.com wrote: On Friday, July 29, 2011 01:24:49 PM Jason Hui wrote: Hi, Marek, On Fri, Jul 29, 2011 at 5:32 PM, Marek Vasut marek.va...@gmail.com wrote: Rewrite the mxc_i2c driver. * This version is much closer to Linux implementation. * Fixes IPG_PERCLK being incorrectly used as clock source * Fixes behaviour of the driver on iMX51 * Clean up coding style a bit ;-) I don't think you did the right thing by chaning IPG_PERCLK to IPG_CLK As I said, the IPG_CLK is for IP register clock, while IPG_PERCLK is for i2c function clock. if you run clock command from mx51evk, you will get: ... ipg clock : 6650Hz ipg per clock : 66500Hz MX51EVK U-Boot It will give you that ipg per clock is 665M, which seems too big. It is due to we configure the pre-divider/pos-devider for perclk to zero, which leads to ipg_per clock to be same as pll2 clock. But I don't think this will have some issue. Yes it will, the divider will be computed to be maximum in all cases ... you won't be able it divide 665MHz by anything from the table 40-7 in MX51RM to achieve any reasonable frequency. On the contrary, 66.5MHz does give fine results. it that, we can change the ipg_perclk to low freq, but we should not change the i2c clock to ipg_clk, this is not correct. BTW, I have applied your patch and test on mx53evk board, it seems the i2c does not work correctly. Great. The clock used by the I2C module for this task are likely the module_clock, which are -- like on MX51 -- 66.5MHz. What do you get when you run the clock command on MX53EVK ? I'm not in the office for the whole next week, thus, I can't give you the clock output for mx53evk, but I'm sure the ipg_perclk on mx53evk is not set at 66.5Mhz. Yes, it's 33.3MHz on iMX53. I got a (remote) hand of a MX53 board. The IPG clock, on the other hand, are 66.5MHz on both MX51 and MX53. Maybe the issue with PMIC you're seeing is something else? btw. how did you obtain these results ? Can you check the FDR divider value with and without this patch? You can use the clock command to get it. As for the FDR, you want me to check it on i.mx53evk board right? Yes please. I hope to get my hands on mx53 system in the evening probably, but I'd still be grateful if you could test it. Jason Thanks Jason Thanks After apply your patch: MX53EVK U-Boot pmic dump 30 PMIC ID: 0x [Rev: unknown] 0x00: 0001 00ff 0039 00ff 0x08: 0040 0x10: 0001 0x18: 0045 0045 0080 0021 0002 0x20: 0004 0021 0x28: 0004 00ae The old: MX53EVK U-Boot pmic dump 30 PMIC ID: 0x45d0 [Rev: 2.0] 0x00: 00015088 00ff 00395208 0081 00fff7ff 401c 0418 45d0 0x08: 0001 0040 0040 0x10: 0011 0001 7fff 0x18: 00454a52 00456739 631a 0080739c 0021284a 0a0a 00024fd0 01d8 0x20: 00049208 00218000 0x28: 8000 00046046 01c0 00aeeaee Jason ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] ARM926ejs: Add routines to invalidate D-Cache
On Wednesday, August 10, 2011 08:41:58 AM Hong Xu wrote: Hi Albert, On 08/10/2011 02:36 PM, Albert ARIBAUD wrote: Hi Hong Xu, Le 10/08/2011 08:17, Hong Xu a écrit : There are some ARM926 specific code in arch/arm/lib/cache.c; So I also put the stuff there. ;-) I think Albert Aribaud or the original contributor of cache part shall have clearer view.So, I'll keep neutral to hear more ideas. Basically, cache operations are CP15 commands which are defined for each ARM architecture, not for each ISA, so Marek is right about the best place for this being in arm926ejs. Actually, I think arch/arm/lib/cache.c should only contain the weak defaults (i.e., no real cache action) and each architecture should provide overrides to the defaults. Currently this is almost the case, with (apart from arm926ejs which you're already touching) only one arm1136 specific implementation to move. So please move the arm926ejs specific implementations to arch/arm/cpu/arm926ejs/cache.c as suggested by Marek, keeping only the weak default in arch/arm/lib/cache.c. Ok, I'll manage a basic version for review. Can you also make a separate patch for the arm1136 possibly (to move the stuff from lib/cache.c)? Anyway, thanks a lot for your endurance. Thanks BR, Eric Amicalement, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] mips32: fix wrong loop bound in flush_cache()
The issue is found when calling flush_cache() with zero size argument.
The bound of loop is miscalculated in this case and flush_cache() enters a
wrong flushing loop.
To fix this issue I skipped the operations when size is found to be zero.
Signed-off-by: Yao Cheng saturdayco...@gmail.com
Cc: Shinya Kuribayashi skuri...@pobox.com
Cc: Sergei Shtylyov sshtyl...@mvista.com
Cc: Mike Frysinger vap...@gentoo.org
---
Changes for v2:
- Coding style cleanup
- Move code after declarations to avoid warning
Changes for v3:
- Coding style cleanup
- Add prefix mips32 to the subject
arch/mips/cpu/mips32/cpu.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/mips/cpu/mips32/cpu.c b/arch/mips/cpu/mips32/cpu.c
index 3ae397c..7b49e1b 100644
--- a/arch/mips/cpu/mips32/cpu.c
+++ b/arch/mips/cpu/mips32/cpu.c
@@ -56,6 +56,10 @@ void flush_cache(ulong start_addr, ulong size)
unsigned long addr = start_addr ~(lsize - 1);
unsigned long aend = (start_addr + size - 1) ~(lsize - 1);
+ /* aend will be miscalculated when size is zero, so we return here */
+ if (size == 0)
+ return;
+
while (1) {
cache_op(Hit_Writeback_Inv_D, addr);
cache_op(Hit_Invalidate_I, addr);
--
1.7.4.1
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[U-Boot] [PATCH V2] mmc: Fix mmc_send_status()
The mmc_send_status() function sets cmd.arg = 0. That's incorrect, so fix it.
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
drivers/mmc/mmc.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
V2: Take SPI mode into account
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index cbd7567..00687d6 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -115,7 +115,8 @@ int mmc_send_status(struct mmc *mmc, int timeout)
cmd.cmdidx = MMC_CMD_SEND_STATUS;
cmd.resp_type = MMC_RSP_R1;
- cmd.cmdarg = 0;
+ if (!mmc_host_is_spi(mmc))
+ cmd.cmdarg = mmc-rca 16;
cmd.flags = 0;
do {
--
1.7.5.4
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Re: [U-Boot] [PATCH v3 1/2] gpio: Add GPIO driver framework for Marvell SoCs
-Original Message- From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com] Sent: Monday, August 08, 2011 11:40 AM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Ajay Bhargav Subject: [PATCH v3 1/2] gpio: Add GPIO driver framework for Marvell SoCs This patch adds generic GPIO driver framework support for Marvell SoCs. To enable GPIO driver define CONFIG_MARVELL_GPIO and for GPIO commands define CONFIG_CMD_GPIO in your board configuration file. v3 - Added file mvgpio.h for common defines based on CPU core subversion. Arch related stuff should be added to arch/gpio.h Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com --- drivers/gpio/Makefile |1 + drivers/gpio/mvgpio.c | 114 + include/mvgpio.h | 77 + 3 files changed, 192 insertions(+), 0 deletions(-) create mode 100644 drivers/gpio/mvgpio.c create mode 100644 include/mvgpio.h This patch looks okay to me. Acked-by: Prafulla Wadaskar prafu...@marvell.com Regards.. Prafulla . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
-Original Message-
From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
Sent: Monday, August 08, 2011 11:40 AM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Ajay Bhargav
Subject: [PATCH v3 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
This patch adds support for generic GPIO driver framework for Marvell
SoC Armada100.
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
arch/arm/include/asm/arch-armada100/armada100.h |4 ++
arch/arm/include/asm/arch-armada100/gpio.h | 54
+++
2 files changed, 58 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-armada100/gpio.h
diff --git a/arch/arm/include/asm/arch-armada100/armada100.h
b/arch/arm/include/asm/arch-armada100/armada100.h
index d5d125a..aad3ed1 100644
--- a/arch/arm/include/asm/arch-armada100/armada100.h
+++ b/arch/arm/include/asm/arch-armada100/armada100.h
@@ -59,6 +59,10 @@
#define ARMD1_MPMU_BASE 0xD405
#define ARMD1_APMU_BASE 0xD4282800
#define ARMD1_CPU_BASE 0xD4282C00
+#define ARMD1_GPIO0_BASE 0xD4019000
ARMD1_GPIO_BASE is already there in this file.
Having just one definition of GPIO base address here sounds good.
So we don't need to change this file. (see comments below)
+#define ARMD1_GPIO1_BASE 0xD4019004
+#define ARMD1_GPIO2_BASE 0xD4019008
+#define ARMD1_GPIO3_BASE 0xD4019100
/*
* Main Power Management (MPMU) Registers
diff --git a/arch/arm/include/asm/arch-armada100/gpio.h
b/arch/arm/include/asm/arch-armada100/gpio.h
new file mode 100644
index 000..bd7d21a
--- /dev/null
+++ b/arch/arm/include/asm/arch-armada100/gpio.h
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _ASM_ARCH_GPIO_H
+#define _ASM_ARCH_GPIO_H
+
+#include asm/types.h
+#include asm/arch/armada100.h
+#include mvgpio.h
+
+#define GPIO_TO_REG(gp) (gp 5)
+#define GPIO_TO_BIT(gp) (1 (gp 0x1F))
+#define GPIO_VAL(gp, val)((val (gp 0x1F)) 0x01)
+
+static inline void *get_gpio_base(int bank)
+{
+ switch (bank) {
+ case 0:
+ return (struct gpio_reg *)ARMD1_GPIO0_BASE;
+ case 1:
+ return (struct gpio_reg *)ARMD1_GPIO1_BASE;
+ case 2:
+ return (struct gpio_reg *)ARMD1_GPIO2_BASE;
+ case 3:
+ return (struct gpio_reg *)ARMD1_GPIO3_BASE;
+ }
+ return 0;
+}
I suggest below code for this function.
{
Const unsigned int offset[4] = {0, 4, 8, 0x100}; /* gpio register bank
offsets */
return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
}
Again content in this file are SoC core specific and will duplicate for other
SoC supports like pantheon.
Can you please move them to mvgpio.h within #ifdef CONFIG_SHEEVA_88SV331xV5?
I think this should be the final modification for this driver support.
Sorry for the rework.
Regards..
Prafulla . .
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Re: [U-Boot] [PATCH v3 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
- Prafulla Wadaskar prafu...@marvell.com wrote:
I suggest below code for this function.
{
Const unsigned int offset[4] = {0, 4, 8, 0x100}; /* gpio register
bank offsets */
return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
}
Again content in this file are SoC core specific and will duplicate
for other SoC supports like pantheon.
Can you please move them to mvgpio.h within #ifdef
CONFIG_SHEEVA_88SV331xV5?
I think this should be the final modification for this driver
support.
Sorry for the rework.
Regards..
Prafulla . .
Hi Prafulla,
Can you please tell me what part of code should be moved to mvgpio.h?
I have no idea about number of banks in other SOCs with same core.
I will do the changes as per suggestion.
Thanks Regards,
Ajay Bhargav
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Re: [U-Boot] [PATCH v3 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
-Original Message-
From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
Sent: Wednesday, August 10, 2011 1:37 PM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik
Subject: Re: [PATCH v3 2/2] gpio: Add GPIO driver for Marvell SoC
Armada100
- Prafulla Wadaskar prafu...@marvell.com wrote:
I suggest below code for this function.
{
Const unsigned int offset[4] = {0, 4, 8, 0x100}; /* gpio register
bank offsets */
return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
}
Again content in this file are SoC core specific and will duplicate
for other SoC supports like pantheon.
Can you please move them to mvgpio.h within #ifdef
CONFIG_SHEEVA_88SV331xV5?
I think this should be the final modification for this driver
support.
Sorry for the rework.
Regards..
Prafulla . .
Hi Prafulla,
Can you please tell me what part of code should be moved to mvgpio.h?
You should move entire contents of gpio.h in mvgpio.h within #ifdef
CONFIG_SHEEVA_88SV331xV5, so just mvgpio.c,mvgpio.h,Makefile will add armada100
gpio driver support in more generic way.
I have no idea about number of banks in other SOCs with same core.
No need to worry, at this moment this driver will be supporting 88SV331xv5 core
only.
Regards..
Prafulla . .
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Re: [U-Boot] [PATCH v3 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
- Prafulla Wadaskar prafu...@marvell.com wrote:
-Original Message-
From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
Sent: Wednesday, August 10, 2011 1:37 PM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik
Subject: Re: [PATCH v3 2/2] gpio: Add GPIO driver for Marvell SoC
Armada100
- Prafulla Wadaskar prafu...@marvell.com wrote:
I suggest below code for this function.
{
Const unsigned int offset[4] = {0, 4, 8, 0x100}; /* gpio
register
bank offsets */
return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
}
Again content in this file are SoC core specific and will
duplicate
for other SoC supports like pantheon.
Can you please move them to mvgpio.h within #ifdef
CONFIG_SHEEVA_88SV331xV5?
I think this should be the final modification for this driver
support.
Sorry for the rework.
Regards..
Prafulla . .
Hi Prafulla,
Can you please tell me what part of code should be moved to
mvgpio.h?
You should move entire contents of gpio.h in mvgpio.h within #ifdef
CONFIG_SHEEVA_88SV331xV5, so just mvgpio.c,mvgpio.h,Makefile will add
armada100 gpio driver support in more generic way.
I have no idea about number of banks in other SOCs with same core.
No need to worry, at this moment this driver will be supporting
88SV331xv5 core only.
Regards..
Prafulla . .
I feel it is important to keep gpio.h in arch folder, 'coz if someone enables
GPIO command support, generic library header (asm/gpio.h) will look for
asm/arch/gpio.h file. we can simply include mvgpio.h in gpio.h incase of
armada100.
Regards,
Ajay Bhargav
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Re: [U-Boot] [PATCH v3 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
- Prafulla Wadaskar prafu...@marvell.com wrote:
You should move entire contents of gpio.h in mvgpio.h within #ifdef
CONFIG_SHEEVA_88SV331xV5, so just mvgpio.c,mvgpio.h,Makefile will add
armada100 gpio driver support in more generic way.
I have no idea about number of banks in other SOCs with same core.
No need to worry, at this moment this driver will be supporting
88SV331xv5 core only.
Regards..
Prafulla . .
I think its better to just keep Armada100 related stuff in gpio.h and
I will do the following suggested changes.
{
Const unsigned int offset[4] = {0, 4, 8, 0x100}; /* gpio register
bank offsets */
return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
}
Regards,
Ajay Bhargav
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Re: [U-Boot] [PATCH v3 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
-Original Message-
From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
Sent: Wednesday, August 10, 2011 2:03 PM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik
Subject: Re: [PATCH v3 2/2] gpio: Add GPIO driver for Marvell SoC
Armada100
- Prafulla Wadaskar prafu...@marvell.com wrote:
You should move entire contents of gpio.h in mvgpio.h within #ifdef
CONFIG_SHEEVA_88SV331xV5, so just mvgpio.c,mvgpio.h,Makefile will add
armada100 gpio driver support in more generic way.
I have no idea about number of banks in other SOCs with same core.
No need to worry, at this moment this driver will be supporting
88SV331xv5 core only.
Regards..
Prafulla . .
I think its better to just keep Armada100 related stuff in gpio.h and
I will do the following suggested changes.
Yes you are right, removing gpio.h will lead to compilation error.
So in your earlier patch do not modify armada100.h and use suggested function
body and repost.
{
Const unsigned int offset[4] = {0, 4, 8, 0x100}; /* gpio register
bank offsets */
return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
}
Regards..
Prafulla . .
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[U-Boot] [PATCH v4 1/2] gpio: Add GPIO driver framework for Marvell SoCs
This patch adds generic GPIO driver framework support for Marvell SoCs.
To enable GPIO driver define CONFIG_MARVELL_GPIO and for GPIO commands
define CONFIG_CMD_GPIO in your board configuration file.
v3 - Added file mvgpio.h for common defines based on CPU core
subversion. Arch related stuff should be added to arch/gpio.h
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
drivers/gpio/Makefile |1 +
drivers/gpio/mvgpio.c | 114 +
include/mvgpio.h | 77 +
3 files changed, 192 insertions(+), 0 deletions(-)
create mode 100644 drivers/gpio/mvgpio.c
create mode 100644 include/mvgpio.h
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 62ec97d..beca1da 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -27,6 +27,7 @@ LIB := $(obj)libgpio.o
COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o
COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
+COBJS-$(CONFIG_MARVELL_GPIO) += mvgpio.o
COBJS-$(CONFIG_MARVELL_MFP)+= mvmfp.o
COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o
COBJS-$(CONFIG_PCA953X)+= pca953x.o
diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c
new file mode 100644
index 000..0cc8ed7
--- /dev/null
+++ b/drivers/gpio/mvgpio.c
@@ -0,0 +1,114 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/errno.h
+#include asm/gpio.h
+
+#ifndef MV_MAX_GPIO
+#define MV_MAX_GPIO128
+#endif
+
+int gpio_request(int gp, const char *label)
+{
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO requested %d\n, __func__, gp);
+ return -EINVAL;
+ }
+ return 0;
+}
+
+void gpio_free(int gp)
+{
+}
+
+void gpio_toggle_value(int gp)
+{
+ gpio_set_value(gp, !gpio_get_value(gp));
+}
+
+int gpio_direction_input(int gp)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gcdr);
+ return 0;
+}
+
+int gpio_direction_output(int gp, int value)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gsdr);
+ gpio_set_value(gp, value);
+ return 0;
+}
+
+int gpio_get_value(int gp)
+{
+ struct gpio_reg *gpio_reg_bank;
+ u32 gp_val;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ gp_val = readl(gpio_reg_bank-gplr);
+
+ return GPIO_VAL(gp, gp_val);
+}
+
+void gpio_set_value(int gp, int value)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ if (value)
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gpsr);
+ else
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gpcr);
+}
diff --git a/include/mvgpio.h b/include/mvgpio.h
new file mode 100644
index 000..768e94c
--- /dev/null
+++ b/include/mvgpio.h
@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the
[U-Boot] [PATCH v4 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
This patch adds support for generic GPIO driver framework for Marvell
SoC Armada100.
v4 - updated gpio.h file, removed modification in Armada100.h
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
arch/arm/include/asm/arch-armada100/gpio.h | 47
1 files changed, 47 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-armada100/gpio.h
diff --git a/arch/arm/include/asm/arch-armada100/gpio.h
b/arch/arm/include/asm/arch-armada100/gpio.h
new file mode 100644
index 000..dd47832
--- /dev/null
+++ b/arch/arm/include/asm/arch-armada100/gpio.h
@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _ASM_ARCH_GPIO_H
+#define _ASM_ARCH_GPIO_H
+
+#include asm/types.h
+#include asm/arch/armada100.h
+#include mvgpio.h
+
+#define GPIO_TO_REG(gp)(gp 5)
+#define GPIO_TO_BIT(gp)(1 (gp 0x1F))
+#define GPIO_VAL(gp, val) ((val (gp 0x1F)) 0x01)
+
+static inline void *get_gpio_base(int bank)
+{
+ const unsigned int offset[4] = {0, 4, 8, 0x100}; /* gpio register bank
+ offset - refer
+ Appendix A.36 */
+ return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
+}
+
+#endif /* _ASM_ARCH_GPIO_H */
--
1.7.0.4
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[U-Boot] [PATCH] gpio:samsung: s5p_ suffix add for GPIO functions (C210_universal)
This is a cosmetic patch, which is changing the gpio_ prefix to
s5p_gpio_.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
board/samsung/universal_c210/universal.c | 28 ++--
1 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/board/samsung/universal_c210/universal.c
b/board/samsung/universal_c210/universal.c
index b65bc6e..1b27e8b 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -160,7 +160,7 @@ int board_mmc_init(bd_t *bis)
* you should set it HIGH since it removes the inverter
*/
/* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
- gpio_direction_output(gpio1-e3, 6, 0);
+ s5p_gpio_direction_output(gpio1-e3, 6, 0);
break;
default:
/*
@@ -168,7 +168,7 @@ int board_mmc_init(bd_t *bis)
* But set it as HIGH to ensure
*/
/* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
- gpio_direction_output(gpio1-e1, 3, 1);
+ s5p_gpio_direction_output(gpio1-e1, 3, 1);
break;
}
@@ -192,25 +192,25 @@ int board_mmc_init(bd_t *bis)
if (i == 2)
continue;
/* GPK0[0:6] special function 2 */
- gpio_cfg_pin(gpio2-k0, i, 0x2);
+ s5p_gpio_cfg_pin(gpio2-k0, i, 0x2);
/* GPK0[0:6] pull disable */
- gpio_set_pull(gpio2-k0, i, GPIO_PULL_NONE);
+ s5p_gpio_set_pull(gpio2-k0, i, GPIO_PULL_NONE);
/* GPK0[0:6] drv 4x */
- gpio_set_drv(gpio2-k0, i, GPIO_DRV_4X);
+ s5p_gpio_set_drv(gpio2-k0, i, GPIO_DRV_4X);
}
for (i = 3; i 7; i++) {
/* GPK1[3:6] special function 3 */
- gpio_cfg_pin(gpio2-k1, i, 0x3);
+ s5p_gpio_cfg_pin(gpio2-k1, i, 0x3);
/* GPK1[3:6] pull disable */
- gpio_set_pull(gpio2-k1, i, GPIO_PULL_NONE);
+ s5p_gpio_set_pull(gpio2-k1, i, GPIO_PULL_NONE);
/* GPK1[3:6] drv 4x */
- gpio_set_drv(gpio2-k1, i, GPIO_DRV_4X);
+ s5p_gpio_set_drv(gpio2-k1, i, GPIO_DRV_4X);
}
/* T-flash detect */
- gpio_cfg_pin(gpio2-x3, 4, 0xf);
- gpio_set_pull(gpio2-x3, 4, GPIO_PULL_UP);
+ s5p_gpio_cfg_pin(gpio2-x3, 4, 0xf);
+ s5p_gpio_set_pull(gpio2-x3, 4, GPIO_PULL_UP);
/*
* MMC device init
@@ -223,7 +223,7 @@ int board_mmc_init(bd_t *bis)
* Check the T-flash detect pin
* GPX3[4] T-flash detect pin
*/
- if (!gpio_get_value(gpio2-x3, 4)) {
+ if (!s5p_gpio_get_value(gpio2-x3, 4)) {
/*
* SD card GPIO:
* GPK2[0] SD_2_CLK(2)
@@ -235,11 +235,11 @@ int board_mmc_init(bd_t *bis)
if (i == 2)
continue;
/* GPK2[0:6] special function 2 */
- gpio_cfg_pin(gpio2-k2, i, 0x2);
+ s5p_gpio_cfg_pin(gpio2-k2, i, 0x2);
/* GPK2[0:6] pull disable */
- gpio_set_pull(gpio2-k2, i, GPIO_PULL_NONE);
+ s5p_gpio_set_pull(gpio2-k2, i, GPIO_PULL_NONE);
/* GPK2[0:6] drv 4x */
- gpio_set_drv(gpio2-k2, i, GPIO_DRV_4X);
+ s5p_gpio_set_drv(gpio2-k2, i, GPIO_DRV_4X);
}
err = s5p_mmc_init(2, 4);
}
--
1.7.2.3
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[U-Boot] [PATCH v3] i2c:gpio:s5p: I2C GPIO Software implementation (via soft_i2c)
This patch adds support for software I2C for GONI reference target.
It adds support for access to GPIOs by number, not as it is present,
by bank and offset.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Heiko Schocher h...@denx.de
---
Changes for v2:
- Generic GPIO code added to arch/arm/gpio.h
- Platform dependent GPIO code added to board/samsung/goni.c
- Code cleanup
Changes for v3:
- I2C GPIO common code added to drivers/gpio/s5p_gpio.c
- i2c_init_board() function added(required by soft_i2c)
---
arch/arm/include/asm/arch-s5pc1xx/gpio.h | 38 ++
board/samsung/goni/goni.c| 16
drivers/gpio/s5p_gpio.c | 24 +++
include/configs/s5p_goni.h | 14 +++
4 files changed, 86 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-s5pc1xx/gpio.h
b/arch/arm/include/asm/arch-s5pc1xx/gpio.h
index 903de9c..619ba6f 100644
--- a/arch/arm/include/asm/arch-s5pc1xx/gpio.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/gpio.h
@@ -134,6 +134,41 @@ unsigned int s5p_gpio_get_value(struct s5p_gpio_bank
*bank, int gpio);
void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
+struct s5p_gpio_bank *s5p_gpio_get_bank(int nr);
+int s5p_gpio_get_pin(int nr);
+
+static inline int gpio_request(int gpio, const char *label)
+{
+ return 0;
+}
+
+static inline int gpio_direction_input(int nr)
+{
+ s5p_gpio_direction_input(s5p_gpio_get_bank(nr),
+ s5p_gpio_get_pin(nr));
+ return 0;
+}
+
+static inline int gpio_direction_output(int nr, int value)
+{
+ s5p_gpio_direction_output(s5p_gpio_get_bank(nr),
+s5p_gpio_get_pin(nr), value);
+ return 0;
+}
+
+static inline int gpio_get_value(int nr)
+{
+ return (int) s5p_gpio_get_value(s5p_gpio_get_bank(nr),
+ s5p_gpio_get_pin(nr));
+}
+
+static inline void gpio_set_value(int nr, int value)
+{
+ s5p_gpio_set_value(s5p_gpio_get_bank(nr),
+ s5p_gpio_get_pin(nr), value);
+}
+
+extern struct s5pc110_gpio *s5p_gpio;
#endif
/* Pin configurations */
@@ -155,4 +190,7 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int
gpio, int mode);
#define GPIO_DRV_FAST 0x0
#define GPIO_DRV_SLOW 0x1
+/* GPIO pins per bank */
+#define GPIO_PER_BANK 8
+
#endif
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index e24cd29..354f5ad 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -28,12 +28,12 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct s5pc110_gpio *s5pc110_gpio;
+struct s5pc110_gpio *s5p_gpio;
int board_init(void)
{
/* Set Initial global variables */
- s5pc110_gpio = (struct s5pc110_gpio *)S5PC110_GPIO_BASE;
+ s5p_gpio = (struct s5pc110_gpio *)S5PC110_GPIO_BASE;
gd-bd-bi_arch_number = MACH_TYPE_GONI;
gd-bd-bi_boot_params = PHYS_SDRAM_1 + 0x100;
@@ -67,13 +67,17 @@ int checkboard(void)
}
#endif
+#ifdef CONFIG_SOFT_I2C
+void i2c_init_board(void) {}
+#endif
+
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
int i;
/* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
- s5p_gpio_direction_output(s5pc110_gpio-j2, 7, 1);
+ s5p_gpio_direction_output(s5p_gpio-j2, 7, 1);
/*
* MMC0 GPIO
@@ -86,11 +90,11 @@ int board_mmc_init(bd_t *bis)
if (i == 2)
continue;
/* GPG0[0:6] special function 2 */
- s5p_gpio_cfg_pin(s5pc110_gpio-g0, i, 0x2);
+ s5p_gpio_cfg_pin(s5p_gpio-g0, i, 0x2);
/* GPG0[0:6] pull disable */
- s5p_gpio_set_pull(s5pc110_gpio-g0, i, GPIO_PULL_NONE);
+ s5p_gpio_set_pull(s5p_gpio-g0, i, GPIO_PULL_NONE);
/* GPG0[0:6] drv 4x */
- s5p_gpio_set_drv(s5pc110_gpio-g0, i, GPIO_DRV_4X);
+ s5p_gpio_set_drv(s5p_gpio-g0, i, GPIO_DRV_4X);
}
return s5p_mmc_init(0, 4);
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 2043859..e247b6f 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -141,3 +141,27 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int
gpio, int mode)
writel(value, bank-drv);
}
+
+#ifdef CONFIG_SOFT_I2C
+/* Platform dependent functions for extracting GPIO number */
+int s5p_gpio_get_nr(void *gp_ptr, int gpio)
+{
+ unsigned int offset = gp_ptr - (void *) s5p_gpio;
+ offset /= sizeof(struct s5p_gpio_bank);
+
+ return (offset * GPIO_PER_BANK) + gpio;
+}
+
+struct s5p_gpio_bank *s5p_gpio_get_bank(int nr)
+{
+
Re: [U-Boot] Problems using vxboot
Hi Reinhard, i run into a strange problem booting vxWorks on the cpci750 and vme8349 using u-boot 2011.06. The decrementer slot contains old code. The problem is starting vxWorks with the data cache enabled. The code below fix the problem. It disable (and flush) the data cache, and set the start parameter to cold boot for the vxWorks sysInit(int p0) routine. Is this code acceptable? If vxworks needs the caches disabled to start, then sure why shouldn't it? Isn't there some vxWorks documentation item for that? It would be good to reference that in a comment. Cheers Detlev -- Less talking -- more hacking -- Olin Shivers -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
-Original Message-
From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
Sent: Wednesday, August 10, 2011 2:47 PM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Ajay Bhargav
Subject: [PATCH v4 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
This patch adds support for generic GPIO driver framework for Marvell
SoC Armada100.
v4 - updated gpio.h file, removed modification in Armada100.h
You are not following standard patch submission practice as indicated here
http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions
You need to document entire change history for each patch to be submitted below
---, this is important
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
arch/arm/include/asm/arch-armada100/gpio.h | 47
1 files changed, 47 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-armada100/gpio.h
diff --git a/arch/arm/include/asm/arch-armada100/gpio.h
b/arch/arm/include/asm/arch-armada100/gpio.h
new file mode 100644
index 000..dd47832
--- /dev/null
+++ b/arch/arm/include/asm/arch-armada100/gpio.h
@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _ASM_ARCH_GPIO_H
+#define _ASM_ARCH_GPIO_H
+
+#include asm/types.h
+#include asm/arch/armada100.h
+#include mvgpio.h
+
+#define GPIO_TO_REG(gp) (gp 5)
+#define GPIO_TO_BIT(gp) (1 (gp 0x1F))
+#define GPIO_VAL(gp, val)((val (gp 0x1F)) 0x01)
+
+static inline void *get_gpio_base(int bank)
+{
+ const unsigned int offset[4] = {0, 4, 8, 0x100}; /* gpio register
bank
+ offset - refer
+ Appendix A.36 */
Wrong style for multiline comments, pls refer chapter-8 @
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=Documentation/CodingStyle
Regards..
Prafulla . .
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Re: [U-Boot] Custodians, please remove tag NIOS2-5_0_0 from your repos
Hi Albert, This tag NIOS2-5_0_0 keeps lingering in ARM repositories and should not be there. I regularly have to remove it from u-boot-arm because I keep catching it occasionally when recreating my u-boot-arm local copy and then fetching another ARM repo such as u-boot-atmel, u-boot-marvell, u-boot-pxa, u-boot-samsung, and u-boot-ti, which all contain this tag. Just for your information - you can add a tagopt = --no-tags option to remote repositories in your .git/config like this: [remote arago-omapl1] url = git://arago-project.org/git/projects/linux-omapl1.git fetch = +refs/heads/*:refs/remotes/arago-omapl1/* tagopt = --no-tags This way, you'll never implicitely pull tags from that repository. It turned out to be helpful, so I wanted to share the tip. Cheers Detlev -- Woman who seek to be equal with men lack ambition -- Timothy Leary -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Need answers of basic questions regarding u-boot
Hi Gururaja, We need to make this sticky or add it into some wiki page. Who exactly is we? :) hint Well wikis are, ahem, wikis, i.e. changeable by everyone /hint Cheers Detlev -- I have always observed that the pretensions of all people are in exact inverse ratio to their merits; this is one of the axioms of morals.-- Joseph Lagrange -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 1/2] ARMV7: Add support for Samsung ORIGEN board
Hi Chander, [...] lease get rid of all these magic hard coded constants. Use symbolic names instead. If needed, auto-generate these from the respective C structs. If needed, create the C structs. I will change hard coded values to symbolic names While doing this, I find that the values written to the registers are used just once. So do you still prefer to have them as macros ? I did convert the register offsets and addresses to macros, but did not find it right to have macros for register values that are used just once. Please advise. Most of all we want to get rid of address constants in code. For _values_ that are written to some register, my personal preference is not so strong, alas if you _do_ use macros, usually already the macro name carries documentation as to what this is and it will make code reuse easier for the people having to maintain or build upon your code in the future. Cheers Detlev -- Zivilisation ist der Zaubertrick, der uns unsere wahre Natur verbirgt. -- Salman Rushdie -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Need answers of basic questions regarding u-boot
By we I meant the gr8 u-boot community. I know at present there isn't a place on web for u-boot but surely I would help if someone starts. Regards Gururaja -Original Message- From: Detlev Zundel [mailto:d...@denx.de] Sent: Wednesday, August 10, 2011 3:39 PM To: Hebbar, Gururaja Cc: Jerry Van Baren; Rakesh Modi; u-boot@lists.denx.de Subject: Re: [U-Boot] Need answers of basic questions regarding u-boot Hi Gururaja, We need to make this sticky or add it into some wiki page. Who exactly is we? :) hint Well wikis are, ahem, wikis, i.e. changeable by everyone /hint Cheers Detlev -- I have always observed that the pretensions of all people are in exact inverse ratio to their merits; this is one of the axioms of morals.-- Joseph Lagrange -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
- Prafulla Wadaskar prafu...@marvell.com wrote: -Original Message- From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com] Sent: Wednesday, August 10, 2011 2:47 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Ajay Bhargav Subject: [PATCH v4 2/2] gpio: Add GPIO driver for Marvell SoC Armada100 This patch adds support for generic GPIO driver framework for Marvell SoC Armada100. v4 - updated gpio.h file, removed modification in Armada100.h You are not following standard patch submission practice as indicated here http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions You need to document entire change history for each patch to be submitted below ---, this is important Sorry for mistake.. Do i need to add history in each patch or first patch of a series patch? I mean if I am submitting 2 patches in series I define history in patch 1/2. Am I right? Thanks Regards, Ajay Bhargav ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 6/8] da850: add support for Spectrum Digital AM18xx EVM
From: Manjunathappa, Prakash prakash...@ti.com The AM18xx EVM contains winbond SPI flash instead of ST SPI flash in comparison with logic PD da850/omap-l138 EVM. So enable configuration to look for winbond flash. Signed-off-by: Manjunathappa, Prakash prakash...@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagu...@ti.com --- include/configs/da850evm.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index f9f052a..0429486 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -79,6 +79,7 @@ #define CONFIG_SPI #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_WINBOND #define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_BASEDAVINCI_SPI1_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) -- 1.6.2.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 4/8] da850: modify the U-Boot prompt string
From: Nagabhushana Netagunte nagabhushana.netagu...@ti.com Modify U-Boot prompt string from DA850-evm to U-Boot . Signed-off-by: Sudhakar Rajashekhara sudhakar@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagu...@ti.com --- include/configs/da850evm.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index e000d87..cec00ed 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -160,7 +160,7 @@ * U-Boot general configuration */ #define CONFIG_BOOTFILEuImage /* Boot file name */ -#define CONFIG_SYS_PROMPT DA850-evm /* Command Prompt */ +#define CONFIG_SYS_PROMPT U-Boot /* Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -- 1.6.2.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 8/8] da850: modifications for Logic PD Rev.3 AM18xx EVM
From: Nagabhushana Netagunte nagabhushana.netagu...@ti.com
AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for
NOR to work on Rev.3 EVM. When GP0[11] is low,
the SD0 interface will not work, but NOR flash will.
Signed-off-by: Rajashekhara, Sudhakar sudhakar@ti.com
Signed-off-by: Nagabhushana Netagunte nagabhushana.netagu...@ti.com
---
arch/arm/include/asm/arch-davinci/hardware.h |4
board/davinci/da8xxevm/da850evm.c| 13 +
2 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index 4a3af7d..692d507 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -159,6 +159,10 @@ typedef volatile unsigned int *dv_reg_p;
#define HOST1CFG (DAVINCI_BOOTCFG_BASE + 0x44)
#define PSC0_MDCTL (DAVINCI_PSC0_BASE + 0xa00)
+#define GPIO_BANK0_REG_DIR_ADDR(DAVINCI_GPIO_BASE +
0x10)
+#define GPIO_BANK0_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x14)
+#define GPIO_BANK0_REG_SET_ADDR(DAVINCI_GPIO_BASE +
0x18)
+#define GPIO_BANK0_REG_CLR_ADDR(DAVINCI_GPIO_BASE +
0x1c)
#define GPIO_BANK2_REG_DIR_ADDR(DAVINCI_GPIO_BASE +
0x38)
#define GPIO_BANK2_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x3c)
#define GPIO_BANK2_REG_SET_ADDR(DAVINCI_GPIO_BASE +
0x40)
diff --git a/board/davinci/da8xxevm/da850evm.c
b/board/davinci/da8xxevm/da850evm.c
index 8c3d64e..2f950e7 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -109,6 +109,8 @@ const struct pinmux_config nand_pins[] = {
#elif defined(CONFIG_USE_NOR)
/* NOR pin muxer settings */
const struct pinmux_config nor_pins[] = {
+ /* GP0[11] is required for NOR to work on Rev 3 EVMs */
+ { pinmux(0), 8, 4 },/* GP0[11] */
{ pinmux(5), 1, 6 },
{ pinmux(6), 1, 6 },
{ pinmux(7), 1, 0 },
@@ -278,6 +280,7 @@ u32 get_board_rev(void)
int board_init(void)
{
+ u32 val;
#ifndef CONFIG_USE_IRQ
irq_init();
#endif
@@ -325,6 +328,16 @@ int board_init(void)
if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
return 1;
+#ifdef CONFIG_USE_NOR
+ /* Set the GPIO direction as output */
+ clrbits_be32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 11));
+
+ /* Set the output as low */
+ val = readl(GPIO_BANK0_REG_SET_ADDR);
+ val |= (0x01 11);
+ writel(val, GPIO_BANK0_REG_CLR_ADDR);
+#endif
+
#ifdef CONFIG_DRIVER_TI_EMAC
if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
return 1;
--
1.6.2.4
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[U-Boot] [PATCH v2 2/8] da8xx: add support for multiple PLL controllers
From: Sudhakar Rajashekhara sudhakar@ti.com
Modify clk_get() function in cpu file to work for
multiple PLL controllers.
Signed-off-by: Sudhakar Rajashekhara sudhakar@ti.com
Signed-off-by: Nagabhushana Netagunte nagabhushana.netagu...@ti.com
---
arch/arm/cpu/arm926ejs/davinci/cpu.c | 30 -
arch/arm/include/asm/arch-davinci/hardware.h |4 ++-
2 files changed, 22 insertions(+), 12 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/cpu.c
b/arch/arm/cpu/arm926ejs/davinci/cpu.c
index 8b57205..b705dfd 100644
--- a/arch/arm/cpu/arm926ejs/davinci/cpu.c
+++ b/arch/arm/cpu/arm926ejs/davinci/cpu.c
@@ -37,6 +37,7 @@
#define PLLC_PLLDIV4 0x160
#define PLLC_PLLDIV5 0x164
#define PLLC_PLLDIV6 0x168
+#define PLLC_PLLDIV7 0x16c
#define PLLC_PLLDIV8 0x170
#define PLLC_PLLDIV9 0x174
@@ -61,11 +62,9 @@
#endif
#ifdef CONFIG_SOC_DA8XX
-const dv_reg * const sysdiv[7] = {
- davinci_pllc_regs-plldiv1, davinci_pllc_regs-plldiv2,
- davinci_pllc_regs-plldiv3, davinci_pllc_regs-plldiv4,
- davinci_pllc_regs-plldiv5, davinci_pllc_regs-plldiv6,
- davinci_pllc_regs-plldiv7
+unsigned int sysdiv[9] = {
+ PLLC_PLLDIV1, PLLC_PLLDIV2, PLLC_PLLDIV3, PLLC_PLLDIV4, PLLC_PLLDIV5,
+ PLLC_PLLDIV6, PLLC_PLLDIV7, PLLC_PLLDIV8, PLLC_PLLDIV9
};
int clk_get(enum davinci_clk_ids id)
@@ -74,19 +73,27 @@ int clk_get(enum davinci_clk_ids id)
int pllm;
int post_div;
int pll_out;
+ unsigned int pll_base;
pll_out = CONFIG_SYS_OSCIN_FREQ;
if (id == DAVINCI_AUXCLK_CLKID)
goto out;
+ if ((id 16) == 1)
+ pll_base = (unsigned int)davinci_pllc1_regs;
+ else
+ pll_base = (unsigned int)davinci_pllc0_regs;
+
+ id = 0x;
+
/*
* Lets keep this simple. Combining operations can result in
* unexpected approximations
*/
- pre_div = (readl(davinci_pllc_regs-prediv)
- DAVINCI_PLLC_DIV_MASK) + 1;
- pllm = readl(davinci_pllc_regs-pllm) + 1;
+ pre_div = (readl(pll_base + PLLC_PREDIV)
+ DAVINCI_PLLC_DIV_MASK) + 1;
+ pllm = readl(pll_base + PLLC_PLLM) + 1;
pll_out /= pre_div;
pll_out *= pllm;
@@ -94,15 +101,16 @@ int clk_get(enum davinci_clk_ids id)
if (id == DAVINCI_PLLM_CLKID)
goto out;
- post_div = (readl(davinci_pllc_regs-postdiv)
- DAVINCI_PLLC_DIV_MASK) + 1;
+ post_div = (readl(pll_base + PLLC_POSTDIV)
+ DAVINCI_PLLC_DIV_MASK) + 1;
pll_out /= post_div;
if (id == DAVINCI_PLLC_CLKID)
goto out;
- pll_out /= (readl(sysdiv[id - 1]) DAVINCI_PLLC_DIV_MASK) + 1;
+ pll_out /= (readl(pll_base + sysdiv[id - 1])
+ DAVINCI_PLLC_DIV_MASK) + 1;
out:
return pll_out;
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index f537c4b..646e2ce 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -129,6 +129,7 @@ typedef volatile unsigned int * dv_reg_p;
#define DAVINCI_TIMER1_BASE0x01c21000
#define DAVINCI_WDOG_BASE 0x01c21000
#define DAVINCI_PLL_CNTRL0_BASE0x01c11000
+#define DAVINCI_PLL_CNTRL1_BASE0x01e1a000
#define DAVINCI_PSC0_BASE 0x01c1
#define DAVINCI_PSC1_BASE 0x01e27000
#define DAVINCI_SPI0_BASE 0x01c41000
@@ -387,7 +388,8 @@ struct davinci_pllc_regs {
dv_reg emucnt1;
};
-#define davinci_pllc_regs ((struct davinci_pllc_regs *)DAVINCI_PLL_CNTRL0_BASE)
+#define davinci_pllc0_regs ((struct davinci_pllc_regs
*)DAVINCI_PLL_CNTRL0_BASE)
+#define davinci_pllc1_regs ((struct davinci_pllc_regs
*)DAVINCI_PLL_CNTRL1_BASE)
#define DAVINCI_PLLC_DIV_MASK 0x1f
#define ASYNC3 get_async3_src()
--
1.6.2.4
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[U-Boot] [PATCH v2 7/8] da850: fix the channel number for EMAC teardown init
From: Nagabhushana Netagunte nagabhushana.netagu...@ti.com
TX and RX channel numbers programmed as '1' during EMAC
teardown initialization is wrong. This patch fixes the
same by setting channel number to '0' which is used by U-boot.
Signed-off-by: Sugumar Natarajan sugu...@ti.com
Signed-off-by: Nagabhushana Netagunte nagabhushana.netagu...@ti.com
---
drivers/net/davinci_emac.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index 66c0d13..c0b8929 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -457,7 +457,7 @@ static void davinci_eth_ch_teardown(int ch)
if (ch == EMAC_CH_TX) {
/* Init TX channel teardown */
- writel(1, adap_emac-TXTEARDOWN);
+ writel(0, adap_emac-TXTEARDOWN);
do {
/*
* Wait here for Tx teardown completion interrupt to
@@ -476,7 +476,7 @@ static void davinci_eth_ch_teardown(int ch)
writel(0, adap_emac-TX0HDP);
} else {
/* Init RX channel teardown */
- writel(1, adap_emac-RXTEARDOWN);
+ writel(0, adap_emac-RXTEARDOWN);
do {
/*
* Wait here for Rx teardown completion interrupt to
--
1.6.2.4
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[U-Boot] [PATCH v2 0/8] feature additions and fixes for da850
From: Manjunath Hadli manjunath.ha...@ti.com These are some of the patches which add features like NOR support and a couple of fixes. Fixes from last version from Denk and Withers's comments: 1. fixed commit message for cache usage patch 2. removed unnecessary undefs 3. used hwconfig for DSP wake patch instead of a new env variable. 4. used clearbits macro instead of read and write. Also dropped 4 patches for submission later. Manjunathappa, Prakash (1): da850: add support for Spectrum Digital AM18xx EVM Nagabhushana Netagunte (6): da850: indicate cache usage disable in config file da850: add NOR boot mode support da850: modify the U-Boot prompt string da850: add support to wake up DSP during board init da850: fix the channel number for EMAC teardown init da850: modifications for Logic PD Rev.3 AM18xx EVM Sudhakar Rajashekhara (1): da8xx: add support for multiple PLL controllers arch/arm/cpu/arm926ejs/davinci/cpu.c | 30 --- arch/arm/include/asm/arch-davinci/hardware.h | 14 +++- board/davinci/da8xxevm/da850evm.c| 123 ++ drivers/net/davinci_emac.c |4 +- include/configs/da850evm.h | 26 +- 5 files changed, 181 insertions(+), 16 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/8] da850: indicate cache usage disable in config file
From: Nagabhushana Netagunte nagabhushana.netagu...@ti.com there are cache coherency issues when using the DAVINCI Ethernet driver, hence caches cant be used for da850 u-boot. As per new cache management framework,if the caches are not used in u-boot, it needs to be explicitly indicated through macros in config file. CACHE disable is indicated by the following macro definitions in config file, 1. CONFIG_SYS_ICACHE_OFF 2. CONFIG_SYS_DCACHE_OFF 3. CONFIG_SYS_L2CACHE_OFF Signed-off-by: Nagabhushana Netagunte nagabhushana.netagu...@ti.com --- include/configs/da850evm.h |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index bbb5a9b..fdcc6e3 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -42,6 +42,9 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_TEXT_BASE 0xc108 +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SYS_L2CACHE_OFF /* * Memory Info -- 1.6.2.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 5/8] da850: add support to wake up DSP during board init
From: Nagabhushana Netagunte nagabhushana.netagu...@ti.com
add support for DSP wake-up by default on DA850/OMAP-L138
during board initialization. Enable hwconfig environment and added
extra env setting through CONFIG_EXTRA_ENV_SETTINGS.
To prevent DSP from being woken up,set the environment variable as,
set hwconfig dsp:wake=no
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Nagabhushana Netagunte nagabhushana.netagu...@ti.com
---
arch/arm/include/asm/arch-davinci/hardware.h |4 ++
board/davinci/da8xxevm/da850evm.c| 59 ++
include/configs/da850evm.h |3 +
3 files changed, 66 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index 646e2ce..4a3af7d 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -153,7 +153,11 @@ typedef volatile unsigned int *dv_reg_p;
#define DAVINCI_DDR_EMIF_DATA_BASE 0xc000
#define DAVINCI_INTC_BASE 0xfffee000
#define DAVINCI_BOOTCFG_BASE 0x01c14000
+#define DAVINCI_L3CBARAM_BASE 0x8000
#define JTAG_ID_REG(DAVINCI_BOOTCFG_BASE + 0x18)
+#define CHIP_REV_ID_REG(DAVINCI_BOOTCFG_BASE +
0x24)
+#define HOST1CFG (DAVINCI_BOOTCFG_BASE + 0x44)
+#define PSC0_MDCTL (DAVINCI_PSC0_BASE + 0xa00)
#define GPIO_BANK2_REG_DIR_ADDR(DAVINCI_GPIO_BASE +
0x38)
#define GPIO_BANK2_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x3c)
diff --git a/board/davinci/da8xxevm/da850evm.c
b/board/davinci/da8xxevm/da850evm.c
index d3d965c..8c3d64e 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -30,6 +30,7 @@
#include asm/arch/emac_defs.h
#include asm/io.h
#include asm/arch/davinci_misc.h
+#include hwconfig.h
DECLARE_GLOBAL_DATA_PTR;
@@ -163,6 +164,64 @@ const struct pinmux_config nor_pins[] = {
#endif
#endif /* CONFIG_DRIVER_TI_EMAC */
+void dsp_lpsc_on(unsigned domain, unsigned int id)
+{
+ dv_reg_p mdstat, mdctl, ptstat, ptcmd;
+ struct davinci_psc_regs *psc_regs;
+
+ psc_regs = davinci_psc0_regs;
+ mdstat = psc_regs-psc0.mdstat[id];
+ mdctl = psc_regs-psc0.mdctl[id];
+ ptstat = psc_regs-ptstat;
+ ptcmd = psc_regs-ptcmd;
+
+ while (*ptstat (0x1 domain))
+ ;
+
+ if ((*mdstat 0x1f) == 0x03)
+ return; /* Already on and enabled */
+
+ *mdctl |= 0x03;
+
+ *ptcmd = 0x1 domain;
+
+ while (*ptstat (0x1 domain))
+ ;
+ while ((*mdstat 0x1f) != 0x03)
+ ; /* Probably an overkill... */
+}
+
+static void dspwake(void)
+{
+ unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
+ u32 val;
+
+ /* if the device is ARM only, return */
+ if ((readl(CHIP_REV_ID_REG) 0x3f) == 0x10)
+ return;
+
+ if (hwconfig_subarg_cmp_f(dsp, wake, no, NULL))
+ return;
+
+ *resetvect++ = 0x1E000; /* DSP Idle */
+ /* clear out the next 10 words as NOP */
+ memset(resetvect, 0, sizeof(unsigned) *10);
+
+ /* setup the DSP reset vector */
+ writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
+
+ dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
+ val = readl(PSC0_MDCTL + (15 * 4));
+ val |= 0x100;
+ writel(val, (PSC0_MDCTL + (15 * 4)));
+}
+
+int misc_init_r(void)
+{
+ dspwake();
+ return 0;
+}
+
static const struct pinmux_resource pinmuxes[] = {
#ifdef CONFIG_SPI_FLASH
PINMUX_ITEM(spi1_pins),
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index cec00ed..f9f052a 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -159,6 +159,7 @@
/*
* U-Boot general configuration
*/
+#define CONFIG_MISC_INIT_R
#define CONFIG_BOOTFILEuImage /* Boot file name */
#define CONFIG_SYS_PROMPT U-Boot /* Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
@@ -179,12 +180,14 @@
* Linux Information
*/
#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
+#define CONFIG_HWCONFIG/* enable hwconfig */
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTARGS\
mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp
#define CONFIG_BOOTDELAY 3
+#define CONFIG_EXTRA_ENV_SETTINGS hwconfig=dsp:wake=yes
/*
* U-Boot commands
--
1.6.2.4
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[U-Boot] [PATCH v2 3/8] da850: add NOR boot mode support
From: Nagabhushana Netagunte nagabhushana.netagu...@ti.com
Add pin-mux support for NOR in board file and correspanding
macros to use NOR boot mode in configuration file.
Signed-off-by: Sudhakar Rajashekhara sudhakar@ti.com
Signed-off-by: Nagabhushana Netagunte nagabhushana.netagu...@ti.com
---
board/davinci/da8xxevm/da850evm.c | 51 +
include/configs/da850evm.h| 17
2 files changed, 68 insertions(+), 0 deletions(-)
diff --git a/board/davinci/da8xxevm/da850evm.c
b/board/davinci/da8xxevm/da850evm.c
index 73eaa48..d3d965c 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -105,6 +105,55 @@ const struct pinmux_config nand_pins[] = {
{ pinmux(12), 1, 5 },
{ pinmux(12), 1, 6 }
};
+#elif defined(CONFIG_USE_NOR)
+/* NOR pin muxer settings */
+const struct pinmux_config nor_pins[] = {
+ { pinmux(5), 1, 6 },
+ { pinmux(6), 1, 6 },
+ { pinmux(7), 1, 0 },
+ { pinmux(7), 1, 4 },
+ { pinmux(7), 1, 5 },
+ { pinmux(8), 1, 0 },
+ { pinmux(8), 1, 1 },
+ { pinmux(8), 1, 2 },
+ { pinmux(8), 1, 3 },
+ { pinmux(8), 1, 4 },
+ { pinmux(8), 1, 5 },
+ { pinmux(8), 1, 6 },
+ { pinmux(8), 1, 7 },
+ { pinmux(9), 1, 0 },
+ { pinmux(9), 1, 1 },
+ { pinmux(9), 1, 2 },
+ { pinmux(9), 1, 3 },
+ { pinmux(9), 1, 4 },
+ { pinmux(9), 1, 5 },
+ { pinmux(9), 1, 6 },
+ { pinmux(9), 1, 7 },
+ { pinmux(10), 1, 0 },
+ { pinmux(10), 1, 1 },
+ { pinmux(10), 1, 2 },
+ { pinmux(10), 1, 3 },
+ { pinmux(10), 1, 4 },
+ { pinmux(10), 1, 5 },
+ { pinmux(10), 1, 6 },
+ { pinmux(10), 1, 7 },
+ { pinmux(11), 1, 0 },
+ { pinmux(11), 1, 1 },
+ { pinmux(11), 1, 2 },
+ { pinmux(11), 1, 3 },
+ { pinmux(11), 1, 4 },
+ { pinmux(11), 1, 5 },
+ { pinmux(11), 1, 6 },
+ { pinmux(11), 1, 7 },
+ { pinmux(12), 1, 0 },
+ { pinmux(12), 1, 1 },
+ { pinmux(12), 1, 2 },
+ { pinmux(12), 1, 3 },
+ { pinmux(12), 1, 4 },
+ { pinmux(12), 1, 5 },
+ { pinmux(12), 1, 6 },
+ { pinmux(12), 1, 7 }
+};
#endif
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
@@ -122,6 +171,8 @@ static const struct pinmux_resource pinmuxes[] = {
PINMUX_ITEM(i2c_pins),
#ifdef CONFIG_NAND_DAVINCI
PINMUX_ITEM(nand_pins),
+#elif defined(CONFIG_USE_NOR)
+ PINMUX_ITEM(nor_pins),
#endif
};
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index fdcc6e3..e000d87 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -29,6 +29,7 @@
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_USE_SPIFLASH
+
/*
* SoC Configuration
*/
@@ -129,6 +130,22 @@
#define CONFIG_NET_MULTI
#endif
+#ifdef CONFIG_USE_NOR
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
+#define CONFIG_SYS_FLASH_SECT_SZ (128 10) /* 128KB */
+#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3)
+#define CONFIG_ENV_SIZE(128 10) /* 128KB */
+#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
+#define PHYS_FLASH_SIZE(8 20) /* Flash size 8MB */
+#define CONFIG_SYS_MAX_FLASH_SECT ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)\
+ + 3)
+#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ
+#endif
+
#ifdef CONFIG_USE_SPIFLASH
#undef CONFIG_ENV_IS_IN_FLASH
#undef CONFIG_ENV_IS_IN_NAND
--
1.6.2.4
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Re: [U-Boot] [PATCH 12/12] da850: print DDR frequency from u-boot
Hi Nag, Thanks for the comments. It's a very good suggestion to add it as part of Command. Unfortunately, I am unable to locate the 'Clock' command source. I would greatly appreciate if you can point it for me. git grep -A 2 U_BOOT_CMD' is your friend. Actually as far as I can see, there is no single generic command but clockinfo (e.g. arch/arm/cpu/arm1136/mx35/generic.c) and clocks (e.g. arch/powerpc/cpu/mpc83xx/speed.c). Maybe we should use this opportunity to align them? So what example should we follow? Hm, oldest code wins, so here we go: [dzu@pollux u-boot-testing (master)]$ for f in arch/arm/cpu/arm1136/mx35/generic.c arch/arm/cpu/armv7/mx5/clock.c arch/powerpc/cpu/mpc512x/speed.c arch/powerpc/cpu/mpc83xx/speed.c ; do git describe --contains `git log --follow --pretty=format:%H $f | tail -1` ; done v2011.03-rc1~2^2~36 v2010.03-rc1~35 v1.3.0-rc4~69^2~1 U-Boot-1_1_3~20^2~7 So PowerPC wins ;) I.e. please use clocks as the command name, and I'd appreciate it if you send a patch changing the mx35 and mx5 code. Cheers Detlev -- Be careful in casting out your devil 'lest you cast out the best thing about you. -- Friedrich Nietzsche -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] pxa: Passing ATAGs to kernel don't work
Am 09.08.2011 21:46, schrieb Marek Vasut: On Tuesday, August 09, 2011 03:14:38 PM Stefan Herbrechtsmeier wrote: Hi, after porting my board support from u-boot 2009.11 to 2011.06 together with adding the relocation support the ATAGs passing don't work any more. I have add icache_disable() and dcache_disable() to my board_init() like on other pxa boards. It looks like the mapping of the Dcache as RAM is not cleared and will be re-enabled by the kernel. Thanks for tracing this, can you submit a patch ? I have only avoid the problem and don't really fix the problem, as I am not familiar with the MMU configuration and the relocation. I think the right solution will be to clean up the MMU at the end of the relocation and maybe disable it, instead of doing this at board_init(). Should it be functional to add the following MMU initialisation from an other start.S after the clear_bss in start.S or should it be enough to flush the TLB and disable the D-cache? clear_mmu: /* * flush v4 I/D caches */ movr0, #0 mcrp15, 0, r0, c7, c7, 0/* flush v3/v4 cache */ mcrp15, 0, r0, c8, c7, 0/* flush v4 TLB */ /* * disable MMU stuff and caches */ mrcp15, 0, r0, c1, c0, 0 bicr0, r0, #0x2300@ clear bits 13, 9:8 (--V- --RS) bicr0, r0, #0x0087@ clear bits 7, 2:0 (B--- -CAM) orrr0, r0, #0x0002@ set bit 2 (A) Align orrr0, r0, #0x1000@ set bit 12 (I) I-Cache mcrp15, 0, r0, c1, c0, 0 If I understand the code correct, the command is wrong, as the I-Cache is enabled. If I change the initial RAM mapping from first SDRAM partition start address to second unused SDRAM partition start address the ATAGs passing works. Can somebody confirm that the ATAGs passing works on u-boot 2011.06 for a pxa board. Is there any reason, that the initial RAM is mapped to SDRAM start address range? I think now it can be changed. Maybe there was something about OneNAND IPL, I'm not really sure anymore. What is the best value to use for the initial RAM address mapping? Addition there is a bug in pxa_dram_init as it is called before relocation and want to trigger some refresh cycles by write some values to the SDRAM start address range but instead writes to the mapped initial RAM. Patch is welcome please. Or should I keep the initial RAM mapping to SDRAM start address and move the SDRAM refresh cycles trigger address behind the mapped area. Regards, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 03/12] da850: add NOR boot mode support
Hi Nag, [...] +#define CONFIG_SYS_FLASH_SECT_SZ (128 10) /* 128KB */ +#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) +#define CONFIG_ENV_SIZE (128 10) Are you absolutely sure that you need 128 KiB of environment data? Keep in mind that such a big environment will _considerably_ slow down booting - and in all practical situations I have seen so far the actual environment size was in the order of a few KiB only - I don;t even remember any board with more than 10 KiB. I agree with you that 128 KiB is huge. It is 128KiB because sector size for NOR flash is 128KiB. So, decision was to reserve one complete sector for ENV Data. It's pretty common to have such large sectors. So using one sector for the environment is of course pretty common. From the sector size however we use only a fraction for the _actual_ data, as the environment functions have a runtime dependency on the size of the environment _data_ (think about calculating the CRC). So if you simply reduce the environment (data) size, you will get faster runtime practically for free. So keep the flash layout but reduce the environment size. Cheers Detlev -- The GNU GPL makes sense in terms of its purpose: freedom and social solidarity. Trying to understand it in terms of the goals and values of open source is like trying understand a CD drive's retractable drawer as a cupholder. You can use it for that, but that is not what it was designed for. -- Richard Stallman -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] question about repetition of some u-boot commands
Hi Scott, On 08/09/2011 02:03 PM, Belisko Marek wrote: Hi, just curious. Why some commands entered to u-boot are repeated after processing by pressing Enter key? Like tftp, print Thanks for clarification, It's useful for some commands like md that auto-advance. It's not useful (and often annoying) for most others. There's a field in the command descriptor that indicates whether autorepeat should be enabled for that command, but a lot of commands set it that shouldn't. ... patches welcome. Cheers Detlev -- Q: What is a compact city? A: It's a city that can be guarded by finitely many near-sighted policemen. -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
-Original Message- From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com] Sent: Wednesday, August 10, 2011 3:49 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de Subject: Re: [PATCH v4 2/2] gpio: Add GPIO driver for Marvell SoC Armada100 - Prafulla Wadaskar prafu...@marvell.com wrote: -Original Message- From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com] Sent: Wednesday, August 10, 2011 2:47 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Ajay Bhargav Subject: [PATCH v4 2/2] gpio: Add GPIO driver for Marvell SoC Armada100 This patch adds support for generic GPIO driver framework for Marvell SoC Armada100. v4 - updated gpio.h file, removed modification in Armada100.h You are not following standard patch submission practice as indicated here http://www.denx.de/wiki/view/U- Boot/Patches#Sending_updated_patch_versions You need to document entire change history for each patch to be submitted below ---, this is important Sorry for mistake.. Do i need to add history in each patch or first patch of a series patch? I mean if I am submitting 2 patches in series I define history in patch 1/2. Am I right? You should add relevant history for each patch, if in your patch series one patch is being changed, change log for that particular path is must for other patches you may say, Not changed in this version You may refer some other patches submitted/accepted on the list. Regards.. Prafulla . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
This patch adds support for generic GPIO driver framework for Marvell
SoC Armada100.
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
Changes for v2:
- Added function get_gpio_base
- GPIO base address added to armada100.h
Changes for v3:
- gpio register map moved to mvgpio.h
Changes for v4:
- updated gpio.h
- removed unwanted defines from armada100.h
Changes for v5:
- Coding Style cleanup
- added change history
arch/arm/include/asm/arch-armada100/gpio.h | 46
1 files changed, 46 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-armada100/gpio.h
diff --git a/arch/arm/include/asm/arch-armada100/gpio.h
b/arch/arm/include/asm/arch-armada100/gpio.h
new file mode 100644
index 000..07c44e3
--- /dev/null
+++ b/arch/arm/include/asm/arch-armada100/gpio.h
@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _ASM_ARCH_GPIO_H
+#define _ASM_ARCH_GPIO_H
+
+#include asm/types.h
+#include asm/arch/armada100.h
+#include mvgpio.h
+
+#define GPIO_TO_REG(gp)(gp 5)
+#define GPIO_TO_BIT(gp)(1 (gp 0x1F))
+#define GPIO_VAL(gp, val) ((val (gp 0x1F)) 0x01)
+
+static inline void *get_gpio_base(int bank)
+{
+ const unsigned int offset[4] = {0, 4, 8, 0x100};
+ /* gpio register bank offset - refer Appendix A.36 */
+ return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
+}
+
+#endif /* _ASM_ARCH_GPIO_H */
--
1.7.0.4
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[U-Boot] [PATCH v5 1/2] gpio: Add GPIO driver framework for Marvell SoCs
This patch adds generic GPIO driver framework support for Marvell SoCs.
To enable GPIO driver define CONFIG_MARVELL_GPIO and for GPIO commands
define CONFIG_CMD_GPIO in your board configuration file.
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
Changes for v2:
- mvgpio.h removed
- function get_gpio_base moved to gpio.h
- error messages added
Changes for v3:
- Added mvgpio.h for common define based on CPU core subversion.
Changes for v4:
- not changed
Changes for v5:
- Added change history
drivers/gpio/Makefile |1 +
drivers/gpio/mvgpio.c | 114 +
include/mvgpio.h | 77 +
3 files changed, 192 insertions(+), 0 deletions(-)
create mode 100644 drivers/gpio/mvgpio.c
create mode 100644 include/mvgpio.h
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 62ec97d..beca1da 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -27,6 +27,7 @@ LIB := $(obj)libgpio.o
COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o
COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
+COBJS-$(CONFIG_MARVELL_GPIO) += mvgpio.o
COBJS-$(CONFIG_MARVELL_MFP)+= mvmfp.o
COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o
COBJS-$(CONFIG_PCA953X)+= pca953x.o
diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c
new file mode 100644
index 000..0cc8ed7
--- /dev/null
+++ b/drivers/gpio/mvgpio.c
@@ -0,0 +1,114 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/errno.h
+#include asm/gpio.h
+
+#ifndef MV_MAX_GPIO
+#define MV_MAX_GPIO128
+#endif
+
+int gpio_request(int gp, const char *label)
+{
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO requested %d\n, __func__, gp);
+ return -EINVAL;
+ }
+ return 0;
+}
+
+void gpio_free(int gp)
+{
+}
+
+void gpio_toggle_value(int gp)
+{
+ gpio_set_value(gp, !gpio_get_value(gp));
+}
+
+int gpio_direction_input(int gp)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gcdr);
+ return 0;
+}
+
+int gpio_direction_output(int gp, int value)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gsdr);
+ gpio_set_value(gp, value);
+ return 0;
+}
+
+int gpio_get_value(int gp)
+{
+ struct gpio_reg *gpio_reg_bank;
+ u32 gp_val;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ gp_val = readl(gpio_reg_bank-gplr);
+
+ return GPIO_VAL(gp, gp_val);
+}
+
+void gpio_set_value(int gp, int value)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ if (value)
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gpsr);
+ else
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gpcr);
+}
diff --git a/include/mvgpio.h b/include/mvgpio.h
new file mode 100644
index 000..768e94c
--- /dev/null
+++ b/include/mvgpio.h
@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software;
Re: [U-Boot] [PATCH v5 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
-Original Message-
From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
Sent: Wednesday, August 10, 2011 5:05 PM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Ajay Bhargav
Subject: [PATCH v5 2/2] gpio: Add GPIO driver for Marvell SoC Armada100
This patch adds support for generic GPIO driver framework for Marvell
SoC Armada100.
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
Changes for v2:
- Added function get_gpio_base
- GPIO base address added to armada100.h
Changes for v3:
- gpio register map moved to mvgpio.h
Changes for v4:
- updated gpio.h
- removed unwanted defines from armada100.h
Changes for v5:
- Coding Style cleanup
- added change history
arch/arm/include/asm/arch-armada100/gpio.h | 46
1 files changed, 46 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-armada100/gpio.h
diff --git a/arch/arm/include/asm/arch-armada100/gpio.h
b/arch/arm/include/asm/arch-armada100/gpio.h
new file mode 100644
index 000..07c44e3
--- /dev/null
+++ b/arch/arm/include/asm/arch-armada100/gpio.h
@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _ASM_ARCH_GPIO_H
+#define _ASM_ARCH_GPIO_H
+
+#include asm/types.h
+#include asm/arch/armada100.h
+#include mvgpio.h
+
+#define GPIO_TO_REG(gp) (gp 5)
+#define GPIO_TO_BIT(gp) (1 (gp 0x1F))
+#define GPIO_VAL(gp, val)((val (gp 0x1F)) 0x01)
+
+static inline void *get_gpio_base(int bank)
+{
+ const unsigned int offset[4] = {0, 4, 8, 0x100};
+ /* gpio register bank offset - refer Appendix A.36 */
+ return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
+}
+
+#endif /* _ASM_ARCH_GPIO_H */
--
Acked-by: Prafulla Wadaskar prafu...@marvell.com
Regards..
Prafulla . .
1.7.0.4
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Re: [U-Boot] [PATCH v5 1/2] gpio: Add GPIO driver framework for Marvell SoCs
-Original Message-
From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
Sent: Wednesday, August 10, 2011 5:05 PM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Ajay Bhargav
Subject: [PATCH v5 1/2] gpio: Add GPIO driver framework for Marvell SoCs
This patch adds generic GPIO driver framework support for Marvell SoCs.
To enable GPIO driver define CONFIG_MARVELL_GPIO and for GPIO commands
define CONFIG_CMD_GPIO in your board configuration file.
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
Changes for v2:
- mvgpio.h removed
- function get_gpio_base moved to gpio.h
- error messages added
Changes for v3:
- Added mvgpio.h for common define based on CPU core subversion.
Changes for v4:
- not changed
Changes for v5:
- Added change history
drivers/gpio/Makefile |1 +
drivers/gpio/mvgpio.c | 114
+
include/mvgpio.h | 77 +
3 files changed, 192 insertions(+), 0 deletions(-)
create mode 100644 drivers/gpio/mvgpio.c
create mode 100644 include/mvgpio.h
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 62ec97d..beca1da 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -27,6 +27,7 @@ LIB := $(obj)libgpio.o
COBJS-$(CONFIG_AT91_GPIO)+= at91_gpio.o
COBJS-$(CONFIG_KIRKWOOD_GPIO)+= kw_gpio.o
+COBJS-$(CONFIG_MARVELL_GPIO) += mvgpio.o
COBJS-$(CONFIG_MARVELL_MFP) += mvmfp.o
COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o
COBJS-$(CONFIG_PCA953X) += pca953x.o
diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c
new file mode 100644
index 000..0cc8ed7
--- /dev/null
+++ b/drivers/gpio/mvgpio.c
@@ -0,0 +1,114 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/errno.h
+#include asm/gpio.h
+
+#ifndef MV_MAX_GPIO
+#define MV_MAX_GPIO 128
+#endif
+
+int gpio_request(int gp, const char *label)
+{
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO requested %d\n, __func__, gp);
+ return -EINVAL;
+ }
+ return 0;
+}
+
+void gpio_free(int gp)
+{
+}
+
+void gpio_toggle_value(int gp)
+{
+ gpio_set_value(gp, !gpio_get_value(gp));
+}
+
+int gpio_direction_input(int gp)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gcdr);
+ return 0;
+}
+
+int gpio_direction_output(int gp, int value)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gsdr);
+ gpio_set_value(gp, value);
+ return 0;
+}
+
+int gpio_get_value(int gp)
+{
+ struct gpio_reg *gpio_reg_bank;
+ u32 gp_val;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ gp_val = readl(gpio_reg_bank-gplr);
+
+ return GPIO_VAL(gp, gp_val);
+}
+
+void gpio_set_value(int gp, int value)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ if (value)
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gpsr);
+ else
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gpcr);
+}
diff --git a/include/mvgpio.h b/include/mvgpio.h
new file mode 100644
index 000..768e94c
--- /dev/null
+++
Re: [U-Boot] Need answers of basic questions regarding u-boot
Hi Gururaja, By we I meant the gr8 u-boot community. I know at present there isn't a place on web for u-boot but surely I would help if someone starts. You really missed http://www.denx.de/wiki/U-Boot/WebHome up until now? I'm looking forward to see your registration ;) Cheers Detlev -- #!/usr/bin/perl $c=print\\#\!\/usr\/bin\/perl\ \\\$c\=\.quotemeta\(\$c\)\.\;\\n\$c;\; print#!/usr/bin/perl\n\$c=\.quotemeta($c).\;\n$c;; -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tsec: Configure the buffer descriptor bases to always include all of the descriptors
Hi Joe,
Previously only the last N were included based on the current one in use.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Cc: Joe Hershberger joe.hershber...@gmail.com
Cc: Mingkai Hu mingkai...@freescale.com
Cc: Andy Fleming aflem...@freescale.com
Cc: Kumar Gala ga...@kernel.crashing.org
Cc: Detlev Zundel d...@denx.de
---
drivers/net/tsec.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 78ffc95..1805ca0 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -250,8 +250,8 @@ static void startup_tsec(struct eth_device *dev)
txIdx = 0;
/* Point to the buffer descriptors */
- out_be32(regs-tbase, (unsigned int)(rtx.txbd[txIdx]));
- out_be32(regs-rbase, (unsigned int)(rtx.rxbd[rxIdx]));
+ out_be32(regs-tbase, (unsigned int)(rtx.txbd[0]));
+ out_be32(regs-rbase, (unsigned int)(rtx.rxbd[0]));
/* Initialize the Rx Buffer descriptors */
for (i = 0; i PKTBUFSRX; i++) {
I see these two lines just before the code you change (one is even in
the context of your patch):
/* reset the indices to zero */
rxIdx = 0;
txIdx = 0;
So can you tell me, what your change actually does? I cannot remember
that we have concurrency issues here, or do we?
Cheers
Detlev
--
Don't trust everything you read, and don't assume every poster in
a thread is actually relevant to the problem.
-- Stefan Monnier jwvlj1gk44h.fsf-monnier+em...@gnu.org
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de
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Re: [U-Boot] [PATCH V2] mmc: Fix mmc_send_status()
Hi Marek, The mmc_send_status() function sets cmd.arg = 0. That's incorrect, so fix it. Can you please use the --in-reply-to option of git-send-email (it prompts for it when run interactively) to preserve threading for superceding patches? Thanks! It would also be nice if you included the comment from your other mail in the changelog, i.e. what problem/bug under which circumstances this actually fixes. Thanks Detlev -- To summarize: It is a well known and lamented fact that those people who most want to rule people are, ipso facto, those least suited to do it. To summarize the summary: anyone who is capable of getting themselves made President should on no account be allowed to do the job. -- The Hitchhikers Guide To The Galaxy -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] OpenRD Ultimate SATA SD
On Thu, 16 Jun 2011 21:03:01 +0100, Philip Hands p...@hands.com wrote: On Thu, 16 Jun 2011 16:18:46 +0400, Alexei Ozhigov alexei.ozhi...@gmail.com wrote: ... I am experiencing the same problem with SATA right now with v2011.06-rc2 (tried also the latest master). If MVSATA_STATUS_TIMEOUT in mvsata_ide_initialize_port is ignored, SATA drive is found on the second port and I am able to read the drive's content. Inspired by what you say about timeouts, I thought perhaps increasing the timeout from 10ms to 1s might make a difference -- that worked! ... except that now, it's working regardless :-( OK, so now I have a new OpenRD, and the timeout is now making no difference -- this is perhaps because I've not written anything to the new internal SATA drive yet, so it's factory fresh (I'll see if things change once it's bootable). So, at the moment I can get ide reset to work by ignoring the status of the second SATA in ide_preinit(), thus: =-=-=-=- diff --git a/drivers/block/mvsata_ide.c b/drivers/block/mvsata_ide.c index 1be395f..20fc980 100644 --- a/drivers/block/mvsata_ide.c +++ b/drivers/block/mvsata_ide.c @@ -164,8 +164,8 @@ int ide_preinit(void) status = mvsata_ide_initialize_port( (struct mvsata_port_registers *) (CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE1_OFFSET)); - if (status) - return status; +/* if (status) + return status; */ #endif /* return success if all ports initializations succeeded */ return MVSATA_STATUS_OK; =-=-=-=- It's possible that the second check would work if I had an eSATA drive plugged in -- I will attempt to borrow one to test this theory. It seems fair enough to me that one should be allowed to run ide reset and have it succeed, even if one of the interfaces fails, since one wants the controller/disk that exists to get initialised, even if the other one is absent, but perhaps I'm missing the point somehow. Of course, the hack that I'm using probably doesn't help in the case where one only has an eSATA drive plugged in. I suppose one could store the return from each mvsata_ide_initialize_port call, and return success if any of them succeeded, or the status of the first one otherwise, say. Cheers, Phil. -- |)| Philip Hands [+44 (0)20 8530 9560]http://www.hands.com/ |-| HANDS.COM Ltd.http://www.uk.debian.org/ |(| 10 Onslow Gardens, South Woodford, London E18 1NE ENGLAND pgpWW43MiMy0Q.pgp Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 1/2] gpio: Add GPIO driver framework for Marvell SoCs
Hi Ajay,
On Wed, Aug 10, 2011 at 7:34 PM, Ajay Bhargav
ajay.bhar...@einfochips.com wrote:
This patch adds generic GPIO driver framework support for Marvell SoCs.
To enable GPIO driver define CONFIG_MARVELL_GPIO and for GPIO commands
define CONFIG_CMD_GPIO in your board configuration file.
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
Changes for v2:
- mvgpio.h removed
- function get_gpio_base moved to gpio.h
- error messages added
Changes for v3:
- Added mvgpio.h for common define based on CPU core subversion.
Changes for v4:
- not changed
Changes for v5:
- Added change history
drivers/gpio/Makefile | 1 +
drivers/gpio/mvgpio.c | 114
+
include/mvgpio.h | 77 +
3 files changed, 192 insertions(+), 0 deletions(-)
create mode 100644 drivers/gpio/mvgpio.c
create mode 100644 include/mvgpio.h
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 62ec97d..beca1da 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -27,6 +27,7 @@ LIB := $(obj)libgpio.o
COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o
COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
+COBJS-$(CONFIG_MARVELL_GPIO) += mvgpio.o
COBJS-$(CONFIG_MARVELL_MFP) += mvmfp.o
COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o
COBJS-$(CONFIG_PCA953X) += pca953x.o
diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c
new file mode 100644
index 000..0cc8ed7
--- /dev/null
+++ b/drivers/gpio/mvgpio.c
@@ -0,0 +1,114 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/errno.h
+#include asm/gpio.h
+
+#ifndef MV_MAX_GPIO
+#define MV_MAX_GPIO 128
+#endif
+
+int gpio_request(int gp, const char *label)
+{
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO requested %d\n, __func__, gp);
+ return -EINVAL;
+ }
+ return 0;
+}
+
+void gpio_free(int gp)
+{
+}
+
+void gpio_toggle_value(int gp)
+{
+ gpio_set_value(gp, !gpio_get_value(gp));
+}
+
+int gpio_direction_input(int gp)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gcdr);
+ return 0;
+}
+
+int gpio_direction_output(int gp, int value)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gsdr);
+ gpio_set_value(gp, value);
+ return 0;
+}
+
+int gpio_get_value(int gp)
+{
+ struct gpio_reg *gpio_reg_bank;
+ u32 gp_val;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return -EINVAL;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ gp_val = readl(gpio_reg_bank-gplr);
+
+ return GPIO_VAL(gp, gp_val);
+}
+
+void gpio_set_value(int gp, int value)
+{
+ struct gpio_reg *gpio_reg_bank;
+
+ if (gp = MV_MAX_GPIO) {
+ printf(%s: Invalid GPIO %d\n, __func__, gp);
+ return;
+ }
+
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ if (value)
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gpsr);
+ else
+ writel(GPIO_TO_BIT(gp), gpio_reg_bank-gpcr);
+}
diff --git a/include/mvgpio.h b/include/mvgpio.h
new file mode 100644
index 000..768e94c
--- /dev/null
+++ b/include/mvgpio.h
@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
Re: [U-Boot] [PATCH V2] mmc: Fix mmc_send_status()
Hi Marek,
On Wed, Aug 10, 2011 at 3:24 PM, Marek Vasut marek.va...@gmail.com wrote:
The mmc_send_status() function sets cmd.arg = 0. That's incorrect, so fix it.
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
drivers/mmc/mmc.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
V2: Take SPI mode into account
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index cbd7567..00687d6 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -115,7 +115,8 @@ int mmc_send_status(struct mmc *mmc, int timeout)
cmd.cmdidx = MMC_CMD_SEND_STATUS;
cmd.resp_type = MMC_RSP_R1;
- cmd.cmdarg = 0;
+ if (!mmc_host_is_spi(mmc))
+ cmd.cmdarg = mmc-rca 16;
cmd.flags = 0;
do {
--
1.7.5.4
This patch works fine on my MMP3 board.
Best regards,
Lei
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Re: [U-Boot] [PATCH] tsec: Configure the buffer descriptor bases to always include all of the descriptors
On Aug 10, 2011, at 2:12 AM, Joe Hershberger wrote: Previously only the last N were included based on the current one in use. Signed-off-by: Joe Hershberger joe.hershber...@ni.com Cc: Joe Hershberger joe.hershber...@gmail.com Cc: Mingkai Hu mingkai...@freescale.com Cc: Andy Fleming aflem...@freescale.com Cc: Kumar Gala ga...@kernel.crashing.org Cc: Detlev Zundel d...@denx.de I'm curious if you were seeing a problem that this fixes? --- drivers/net/tsec.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 78ffc95..1805ca0 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -250,8 +250,8 @@ static void startup_tsec(struct eth_device *dev) txIdx = 0; /* Point to the buffer descriptors */ - out_be32(regs-tbase, (unsigned int)(rtx.txbd[txIdx])); - out_be32(regs-rbase, (unsigned int)(rtx.rxbd[rxIdx])); + out_be32(regs-tbase, (unsigned int)(rtx.txbd[0])); + out_be32(regs-rbase, (unsigned int)(rtx.rxbd[0])); However, while I don't believe this fixes a technical problem, I believe this makes the code more straightforward. So if this is a fix to a problem, we need more information to understand what you're really fixing. If this is just fixing something that looked wrong...: Acked-by: Andy Fleming aflem...@freescale.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Boot uboot from another position in flash
Am Mittwoch, den 03.08.2011, 21:21 +0200 schrieb Wolfgang Denk: Dear ich, In message 1312383540.4776.36.camel@debian you wrote: I know that. But I am not able to port for sh platform to a newer u-boot. Please note that U-Boot v1.3.1 is about 4 years old and as such no longer supported here. Your quoting style is strange. Normally the reply _follows_. Well, if you cannot update, then we cannot help it either. It's yur problem, after all. [Well, of course there are companies that will happily send you a quotation for such an update, in case you are considering a commercial solution.] U-Boot is, in it's default configuration, designed to be run on a virgin CPU comingg fresh out of reset, so it naturally has to be installed at the reset vector of your processor. In addition to the start address, many parts of the initialization code expect to find a vorgin, uninitialized system. Such parts must be disabled when you want to change the conditions under which you want to run U-Boot. I read this several time in the net, but found no solution. I know it is possible, because I saw it in a flash hex-file, but can't reproduce it. I thought changing CFG_MONITOR_BASE / CFG_RESET_ADDRESS would do it. As mentioned, this is NOT sufficient. See also the FAQ. It is absolutly not necessary to change CFG_MONITOR_BASE / CFG_RESET_ADDRESS ! Do you say it's not easily possible to boot u-boot from another flash address even with a newer u-boot It is possible, and it is not so difficult if you have sufficient experience with U-Boot. Do I have to make big changes to the uboot-source (start.S,..)? This depends on your definition of big. Judging from the questions you are asking, I tend to say: too big for you. No offence meant. There is no need to change anything in u-Boot source for my platform. Judging from the answers you give, I tend to say: Don't answer questions, wich are too big for you. I could put ~256 bytes of assembly code to the reset-vector at 0x0A00 and jmp in the u-boot; but if you say this is not enough, I will not start to learn the assembly language for my processor. This has nothing to do with using assembly code. It was only an assembly code problem. I can now start U-Boot from every position in flash I want. contumax ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v2] powerpc/eeprom: cleanup mac command
Change the help message to be more helpful. Print argument format. Fix MAX_NUM_PORTS to comply with v1 NXID format. Signed-off-by: York Sun york...@freescale.com --- board/freescale/common/sys_eeprom.c |2 +- common/cmd_mac.c| 29 + 2 files changed, 18 insertions(+), 13 deletions(-) diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index d2ed036..ebcdfd8 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -34,7 +34,7 @@ #endif #ifdef CONFIG_SYS_I2C_EEPROM_NXID -#define MAX_NUM_PORTS 23 +#define MAX_NUM_PORTS 31 #define NXID_VERSION 1 #endif diff --git a/common/cmd_mac.c b/common/cmd_mac.c index 1884c2a..bd9cc19 100644 --- a/common/cmd_mac.c +++ b/common/cmd_mac.c @@ -29,21 +29,26 @@ extern int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); U_BOOT_CMD( mac, 3, 1, do_mac, display and program the system ID and MAC addresses in EEPROM, - [read|save|id|num|errata|date|ports|0|1|2|3|4|5|6|7]\n + without argument\n + - show content of system ID and MAC addresses\n read\n - - show content of EEPROM\n + - read EEPROM without showing\n mac save\n - save to the EEPROM\n mac id\n - - program system id\n - mac num\n - - program system serial number\n - mac errata\n - - program errata data\n - mac date\n - - program date\n - mac ports\n + - program system id (fixed)\n + mac num string\n + - program string as system serial number\n + mac errata string\n + - program string as errata data\n + mac date YYMMDDhhmmss\n + - program timestamp\n + mac ports n\n - program the number of ports\n - mac X\n - - program the MAC address for port X [X=0...7] + mac n XX:XX:XX:XX:XX:XX\n +#ifdef CONFIG_SYS_I2C_EEPROM_NXID + - program the MAC address for port n [n=0...30] +#else + - program the MAC address for port n [n=0...7] +#endif ); -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2][v2] powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
On Aug 8, 2011, at 3:47 PM, Kumar Gala wrote:
From: Ramneek Mehresh ramneek.mehr...@freescale.com
Add UTMI and ULPI PHY support for USB controller on qoriq series of
processors with internal UTMI PHY implemented, for example P1010/P1014
- Use both getenv() and hwconfig to get USB phy type till getenv()
is depricated
- Introduce CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY to specify if soc
has internal UTMI phy
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
CC: Remy Bohmer li...@bohmer.net
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
* Add whitespace and formatting fixes
Remy,
Can you just ack this and I'll pull it in via the 85xx tree?
- k
arch/powerpc/include/asm/config_mpc85xx.h |2 +
drivers/usb/host/ehci-fsl.c | 39 ++--
2 files changed, 38 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index 04ca989..d9d04e7 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -97,6 +97,7 @@
#define CONFIG_NUM_DDR_CONTROLLERS1
#define CONFIG_SYS_CCSRBAR_DEFAULT0xff70
#define CONFIG_SYS_FSL_PCIE_COMPATfsl,qoriq-pcie-v2.2
+#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
/* P1011 is single core version of P1020 */
#elif defined(CONFIG_P1011)
@@ -141,6 +142,7 @@
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_NUM_DDR_CONTROLLERS1
#define CONFIG_SYS_CCSRBAR_DEFAULT0xff70
+#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
/* P1015 is single core version of P1024 */
#elif defined(CONFIG_P1015)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 6e0043a..5a65d92 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
*
* (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
*
@@ -26,6 +26,7 @@
#include usb.h
#include asm/io.h
#include usb/ehci-fsl.h
+#include hwconfig.h
#include ehci.h
#include ehci-core.h
@@ -39,6 +40,11 @@
int ehci_hcd_init(void)
{
struct usb_ehci *ehci;
+ char usb_phy[5];
+ const char *phy_type = NULL;
+ size_t len;
+
+ usb_phy[0] = '\0';
ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
hccr = (struct ehci_hccr *)((uint32_t)ehci-caplength);
@@ -52,10 +58,37 @@ int ehci_hcd_init(void)
out_be32(ehci-snoop2, 0x8000 | SNOOP_SIZE_2GB);
/* Init phy */
- if (!strcmp(getenv(usb_phy_type), utmi))
- out_le32((hcor-or_portsc[0]), PORT_PTS_UTMI);
+ if (hwconfig_sub(usb1, phy_type))
+ phy_type = hwconfig_subarg(usb1, phy_type, len);
else
+ phy_type = getenv(usb_phy_type);
+
+ if (!phy_type) {
+#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
+ /* if none specified assume internal UTMI */
+ strcpy(usb_phy, utmi);
+ phy_type = usb_phy;
+#else
+ printf(WARNING: USB phy type not defined !!\n);
+ return -1;
+#endif
+ }
+
+ if (!strcmp(phy_type, utmi)) {
+#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
+ setbits_be32(ehci-control, PHY_CLK_SEL_UTMI);
+ setbits_be32(ehci-control, UTMI_PHY_EN);
+ udelay(1000); /* delay required for PHY Clk to appear */
+#endif
+ out_le32((hcor-or_portsc[0]), PORT_PTS_UTMI);
+ } else {
+#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
+ clrbits_be32(ehci-control, UTMI_PHY_EN);
+ setbits_be32(ehci-control, PHY_CLK_SEL_ULPI);
+ udelay(1000); /* delay required for PHY Clk to appear */
+#endif
out_le32((hcor-or_portsc[0]), PORT_PTS_ULPI);
+ }
/* Enable interface. */
setbits_be32(ehci-control, USB_EN);
--
1.7.3.4
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Re: [U-Boot] [PATCH 4/4] armv7: cache: remove flush on un-aligned invalidate
On Tue, Aug 9, 2011 at 11:48 PM, Aneesh V ane...@ti.com wrote: Hi Anton, On Tuesday 09 August 2011 10:09 PM, Anton Staaf wrote: I'm not sure what the larger context of this change is, but it seems like a bad idea to me. There are a lot of locations in U-Boot that Please see this thread for the context. http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/105113/focus=105135 Ahh, I missed this thread (Its title became stale). :) But I completely agree with the outcome, we need to fix the unaligned buffer problem. will end up causing an unaligned invalidate (ext2 and dos file system code in particular). And this change will cause those unaligned invalidates to possibly throw away stores to adjacent variables. If No. Those partial cache-lines on the boundary are left alone. They are not invalidated. So, it still affects only the party calling the invalidate. Ahh, you are correct. I missed that the change would cause fewer cache lines to be invalidated. In this case I am much happier with this change. In light of this I still think the warning is a little mild, since it means that the driver that called the invalidate is certainly going to get the wrong values. Perhaps changing it to an error would be good (I realize that functionally it would be identical, but it would be more potent psychologically). I don't think an assert is warranted in this case since as Albert points out it would prevent online debugging of U-Boot which is a very useful way of working. you are going to make this change you should at least assert instead of just printing a warning. And there should be a concerted effort to clean up the buffer management in U-Boot so that invalidates will never be unaligned. This is also a departure from the cache management implementations in the Linux kernel, not that U-Boot has to do exactly what they do, but I feel they have the correct implementation, from the perspective of ensuring that all stores actually make it to main memory. Yes, I had implemented it in line with the kernel apporach. However, with un-aligned buffers there is no perfect solution anyway. So, I don't have a strong opinion on this. Leaving alone the boundary cache-lines and printing a big warning seems reasonable enough. Yup. best regards, Aneesh I have a number of patches to fix unaligned buffer use in the filesystem (ext2, dos, mmc and partition) code that I will start sending upstream today. Some of them will be more RFCs than patch sets. :) Thanks, Anton ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/3] add mcf5307 support
The following patches add support for Freescale MCF5307 cpu. Below a brief of the changes: # On branch master # Changes to be committed: # (use git reset HEAD file... to unstage) # # new file: arch/m68k/cpu/mcf530x/Makefile # new file: arch/m68k/cpu/mcf530x/config.mk # new file: arch/m68k/cpu/mcf530x/cpu.c # new file: arch/m68k/cpu/mcf530x/cpu.h # new file: arch/m68k/cpu/mcf530x/cpu_init.c # new file: arch/m68k/cpu/mcf530x/interrupts.c # new file: arch/m68k/cpu/mcf530x/speed.c # new file: arch/m68k/cpu/mcf530x/start.S # new file: arch/m68k/include/asm/immap_5307.h # new file: arch/m68k/include/asm/m5307.h # # Changed but not updated: # (use git add file... to update what will be committed) # (use git checkout -- file... to discard changes in working directory) # # modified: arch/m68k/include/asm/cache.h # modified: arch/m68k/include/asm/immap.h # modified: arch/m68k/include/asm/timer.h # modified: include/common.h # Best Regards, Angelo Dureghello Sysam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] add mcf5307 support
Cpu architecture files.
# new file: arch/m68k/cpu/mcf530x/Makefile
# new file: arch/m68k/cpu/mcf530x/config.mk
# new file: arch/m68k/cpu/mcf530x/cpu.c
# new file: arch/m68k/cpu/mcf530x/cpu.h
# new file: arch/m68k/cpu/mcf530x/cpu_init.c
# new file: arch/m68k/cpu/mcf530x/interrupts.c
# new file: arch/m68k/cpu/mcf530x/speed.c
# new file: arch/m68k/cpu/mcf530x/start.S
Signed-off-by: Angelo Dureghello sysa...@gmail.com
---
diff --git a/arch/m68k/cpu/mcf530x/Makefile b/arch/m68k/cpu/mcf530x/Makefile
new file mode 100644
index 000..3c5a1c2
--- /dev/null
+++ b/arch/m68k/cpu/mcf530x/Makefile
@@ -0,0 +1,48 @@
+#
+# Copyright (c) 2011 Angelo Dureghello sysa...@gmail.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+# CFLAGS += -DET_DEBUG
+
+LIB= $(obj)lib$(CPU).o
+
+START = start.o
+COBJS = interrupts.o cpu.o speed.o cpu_init.o
+
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+START := $(addprefix $(obj),$(START))
+
+all: $(obj).depend $(START) $(LIB)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/m68k/cpu/mcf530x/config.mk b/arch/m68k/cpu/mcf530x/config.mk
new file mode 100644
index 000..2ba1644
--- /dev/null
+++ b/arch/m68k/cpu/mcf530x/config.mk
@@ -0,0 +1,25 @@
+#
+# Copyright (c) 2011 Angelo Dureghello sysa...@gmail.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+
+PLATFORM_CPPFLAGS += -m5307 -fPIC
diff --git a/arch/m68k/cpu/mcf530x/cpu.c b/arch/m68k/cpu/mcf530x/cpu.c
new file mode 100644
index 000..efd9cbd
--- /dev/null
+++ b/arch/m68k/cpu/mcf530x/cpu.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2011 Angelo Dureghello sysa...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include watchdog.h
+#include command.h
+#include asm/immap.h
+
+#include cpu.h
+
+int checkcpu(void)
+{
+ char buf[32];
+
+ printf(CPU: Freescale Coldfire MCF5307 at %s MHz\n,
+ strmhz(buf, CONFIG_SYS_CLK));
+ return 0;
+}
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ /* enable watchdog, set timeout to 0 and wait */
+ mbar_writeByte(MCFSIM_SYPCR, 0xc0);
+ while (1) ;
+
+ /* we don't return! */
+ return 0;
+}
+
diff --git a/arch/m68k/cpu/mcf530x/cpu.h b/arch/m68k/cpu/mcf530x/cpu.h
new
[U-Boot] [PATCH 3/3] add mcf5307 support
Other modified files:
# modified: arch/m68k/include/asm/cache.h
# modified: arch/m68k/include/asm/immap.h
# modified: arch/m68k/include/asm/timer.h
# modified: include/common.h
Signed-off-by: Angelo Dureghello sysa...@gmail.com
---
diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h
index 7c84e48..e447f3c 100644
--- a/arch/m68k/include/asm/cache.h
+++ b/arch/m68k/include/asm/cache.h
@@ -31,7 +31,7 @@
#define CONFIG_CF_V2
#endif
-#if defined(CONFIG_MCF532x) || defined(CONFIG_MCF5301x)
+#if defined(CONFIG_MCF530x) || defined(CONFIG_MCF532x) ||
defined(CONFIG_MCF5301x)
#define CONFIG_CF_V3
#endif
diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h
index e83ce08..bc43f13 100644
--- a/arch/m68k/include/asm/immap.h
+++ b/arch/m68k/include/asm/immap.h
@@ -256,6 +256,28 @@
#endif
#endif /* CONFIG_M5282 */
+#ifdef CONFIG_M5307
+#include asm/immap_5307.h
+#include asm/m5307.h
+
+#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CONFIG_SYS_UART_PORT *
0x40))
+
+#define CONFIG_SYS_INTR_BASE (MMAP_INTC)
+#define CONFIG_SYS_NUM_IRQS(64)
+
+/* Timer */
+#ifdef CONFIG_MCFTMR
+#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0)
+#define CONFIG_SYS_TMR_BASE(MMAP_DTMR1)
+#define CONFIG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR))
+#define CONFIG_SYS_TMRINTR_NO (31)
+#define CONFIG_SYS_TMRINTR_MASK(0x0400)
+#define CONFIG_SYS_TMRINTR_PEND(CONFIG_SYS_TMRINTR_MASK)
+#define CONFIG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7
| MCFSIM_ICR_PRI3)
+#define CONFIG_SYS_TIMER_PRESCALER (((gd-bus_clk / 100) - 1) 8)
+#endif
+#endif /* CONFIG_M5307 */
+
#if defined(CONFIG_MCF5301x)
#include asm/immap_5301x.h
#include asm/m5301x.h
diff --git a/arch/m68k/include/asm/timer.h b/arch/m68k/include/asm/timer.h
index 1a5de05..8516c8f 100644
--- a/arch/m68k/include/asm/timer.h
+++ b/arch/m68k/include/asm/timer.h
@@ -33,7 +33,7 @@
//
/* DMA Timer module registers */
typedef struct dtimer_ctrl {
-#if defined(CONFIG_M5249) || defined(CONFIG_M5253) || defined(CONFIG_M5272)
+#if defined(CONFIG_M5307) || defined(CONFIG_M5249) || defined(CONFIG_M5253) ||
defined(CONFIG_M5272)
u16 tmr;/* 0x00 Mode register */
u16 res1; /* 0x02 */
u16 trr;/* 0x04 Reference register */
diff --git a/include/common.h b/include/common.h
index 12a1074..40bfbe9 100644
--- a/include/common.h
+++ b/include/common.h
@@ -574,7 +574,7 @@ voidget_sys_info ( sys_info_t * );
#if defined(CONFIG_8xx) || defined(CONFIG_8260)
void cpu_init_f(volatile immap_t *immr);
#endif
-#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MCF52x2)
||defined(CONFIG_MPC86xx)
+#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MCF52x2)
|| defined (CONFIG_MCF5307) || defined(CONFIG_MPC86xx)
void cpu_init_f(void);
#endif
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[U-Boot] [PATCH 2/3] add mcf5307 support
Architecture includes.
# new file: arch/m68k/include/asm/immap_5307.h
# new file: arch/m68k/include/asm/m5307.h
Signed-off-by: Angelo Dureghello sysa...@gmail.com
---
diff --git a/arch/m68k/include/asm/immap_5307.h
b/arch/m68k/include/asm/immap_5307.h
new file mode 100644
index 000..cb58297
--- /dev/null
+++ b/arch/m68k/include/asm/immap_5307.h
@@ -0,0 +1,78 @@
+/*
+ * MCF5307 Internal Memory Map
+ *
+ * Copyright (c) 2011 Angelo Dureghello sysa...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IMMAP_5307__
+#define __IMMAP_5307__
+
+#define MMAP_INTC (CONFIG_SYS_MBAR + 0x0040)
+#define MMAP_CSM (CONFIG_SYS_MBAR + 0x0080)
+#define MMAP_DTMR0 (CONFIG_SYS_MBAR + 0x0140)
+#define MMAP_DTMR1 (CONFIG_SYS_MBAR + 0x0180)
+#define MMAP_UART0 (CONFIG_SYS_MBAR + 0x01C0)
+#define MMAP_UART1 (CONFIG_SYS_MBAR + 0x0200)
+
+typedef struct csm {
+ u16 csar0; /* Chip-select Address */
+ u16 res0a;
+ u32 csmr0; /* Chip-select Mask */
+ u16 res0b;
+ u16 cscr0; /* Chip-select Control */
+ u16 csar1;
+ u16 res1a;
+ u32 csmr1;
+ u16 res1b;
+ u16 cscr1;
+ u16 csar2;
+ u16 res2a;
+ u32 csmr2;
+ u16 res2b;
+ u16 cscr2;
+ u16 csar3;
+ u16 res3a;
+ u32 csmr3;
+ u16 res3b;
+ u16 cscr3;
+ u16 csar4;
+ u16 res4a;
+ u32 csmr4;
+ u16 res4b;
+ u16 cscr4;
+ u16 csar5;
+ u16 res5a;
+ u32 csmr5;
+ u16 res5b;
+ u16 cscr5;
+ u16 csar6;
+ u16 res6a;
+ u32 csmr6;
+ u16 res6b;
+ u16 cscr6;
+ u16 csar7;
+ u16 res7a;
+ u32 csmr7;
+ u16 res7b;
+ u16 cscr7;
+} csm_t;
+
+#endif /* __IMMAP_5307__ */
diff --git a/arch/m68k/include/asm/m5307.h b/arch/m68k/include/asm/m5307.h
new file mode 100644
index 000..edb1bf2
--- /dev/null
+++ b/arch/m68k/include/asm/m5307.h
@@ -0,0 +1,119 @@
+/*
+ * mcf5307.h -- Definitions for Motorola Coldfire 5307
+ *
+ * Copyright (c) 2011 Angelo Dureghello sysa...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndefmcf5307_h
+#definemcf5307_h
+//
+
+/*
+ * useful definitions for reading/writing MBAR offset memory
+ */
+#define mbar_readLong(x) *((volatile unsigned long *) (CONFIG_SYS_MBAR +
x))
+#define mbar_writeLong(x,y)*((volatile unsigned long *) (CONFIG_SYS_MBAR +
x)) = y
+#define mbar_writeShort(x,y) *((volatile unsigned short *) (CONFIG_SYS_MBAR
+ x)) = y
+#define mbar_writeByte(x,y)*((volatile unsigned char *) (CONFIG_SYS_MBAR +
x)) = y
+
+/*
+ * Size of internal RAM
+ */
+
+#define INT_RAM_SIZE 4096 /* RAMBAR - 4k */
+
+/*
+ * Define the 5249 SIM register set addresses.
+ */
+
+/*
+ * MBAR *
+ */
+#define MCFSIM_RSR 0x00/* Reset Status reg (r/w) */
+#define MCFSIM_SYPCR 0x01/* System Protection reg (r/w) */
+#define MCFSIM_SWIVR 0x02/* SW Watchdog intr reg (r/w) */
+#define MCFSIM_SWSR0x03/* SW Watchdog service (r/w) */
+#define MCFSIM_PLLCR 0x08/* PLL Control register */
+#define MCFSIM_MPARK
[U-Boot] [ RFC ] fastboot protocol support in u-boot
Hi, The patch which should come as a reply to this email contains a fastboot gadget for u-boot. I don't claim that the code has been tested or anything. I just want to post what I have now and get some feedback on it. The code uses the newer gadget API which is used by the rndis gadget for instance. The only udc implementing it (as far as I know) is the at91 udc sitting in cdc-at91 branch [0]. The other udcs in tree (musb for intance) is using the old interface which is something linux kernel 2.4 time frame. Since nobody plans to develop a udc for both frameworks I went for the newer framework. The gadget uses the same callbacks as the the at91 driver. It additionally requires usb_gadget_init_udc() and usb_gadget_exit_udc() to be exported by the driver. This is the -probe() and -exit() function from the kernel. The at91 driver does this in its board-setup code which is something I don't like. The fastboot protocol is described in [1]. Let me give a short summary based on the code I post (which is more or less clean up of [3]). It implements the protocol with a few extensions: - ep0 communication is only used for initial enumeration - one EP-IN BULK and one EP-OUT BULK is required for the communication between host and device. - the device waits until a command is sent by the host. This command is acknowledged (either as OKAY or FAIL). - one command is download:%08x. Here the Host specifies that it wants to send binary data. The gadget does _not_ know the purpose of the data, it has to suck it up. Once the transfer is complete the host sends another command like flash:%s which specifies where to write the earlier received data. - the boot command is used to boot the image. The code right now uses the do_bootm() function. However the expected format is different from the uImage format: - it contains phys addr + size of kernel and ram disk. - it contains phys addr + size of second. I don't know its purpose. Its user [2] is setting this to zero, the gadget code does not use it. - There is tags field. I assume that this are atags but it is also unused. - it contains a command line and a name of the image - after the Android header, the image follows. - the flash command checks in case of the MMC media for the sparse header. It is implemented on per-board. Two types are currently implemented: - CHUNK_TYPE_DONT_CARE: don't not write this part to media - CHUNK_TYPE_RAW: write this part 1:1 to media A third type is defined only: CHUNK_TYPE_FILL. It looks like RLE i.e. avoid sending blocks of 0x00 over the wire but write it to the media. - There is support for oem commands. The format sub command is passed to the board and creates a partition table on MMC. The second sub command is recovery which resets the board and starts linux from a recovery partition. - commands mmcerase and mmcwrite. Those seem to serve same purpose as erase and flash if the media is pointing to mmc except that the sparse case is not considered. - partitions (name, offset) are loaded from board coded. This looks like EFI in [3]. This should list everything fastboot specific unless I forgot something. One think that I don't like is the fact after download: we have have suck up the complete data stream. An advantage would be if we could write the data directly to flash/mmc. So we could have two buffers or so and will USB and MMC/NAND one one buffer is complete. Another thing is the custom sparse format. I would prefer to pipe the data via lzo instead. This not only shrinks the amount of 0x00 blocks but also compresses the data image which in case of MMC is mostly uncompressed. The boot image format that is used by Andorid is different from uImage but I don't see any advantages. AFAIK the uImage format is capable of including kernel + ramdisk into one image. I've been looking at DFU as an alternative. I think its main problem is the fact that it is ep0 based which limits the USB packet size to 64bytes on HighSpeed which makes it slower than necessary. Given the amount of features we require and the complexity what about implementing the whole gadget as a user space application with a minimal root file system? We could have graphical output during the update process instead some printf on serial line. Only an idea. Linux boots actually quite fast so it shouldn't be an argument. This would also make it easy to use ubiformat for nand upates in order not to lose the erase counters. The userland approach would use same linux udc driver so we wouldn't have two code basis for same driver which might grow apart. So, any comments on that? Suggestions? Anything? I would prefer a solution which is accepted by both projects Das U-Boot and Android in terms of the protocol and approach (u-boot implementation vs userland). [0] git://git.denx.de/u-boot-usb.git [1]
Re: [U-Boot] [PATCH] tsec: Configure the buffer descriptor bases to always include all of the descriptors
On Wed, Aug 10, 2011 at 7:29 AM, Detlev Zundel d...@denx.de wrote:
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 78ffc95..1805ca0 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -250,8 +250,8 @@ static void startup_tsec(struct eth_device *dev)
txIdx = 0;
/* Point to the buffer descriptors */
- out_be32(regs-tbase, (unsigned int)(rtx.txbd[txIdx]));
- out_be32(regs-rbase, (unsigned int)(rtx.rxbd[rxIdx]));
+ out_be32(regs-tbase, (unsigned int)(rtx.txbd[0]));
+ out_be32(regs-rbase, (unsigned int)(rtx.rxbd[0]));
/* Initialize the Rx Buffer descriptors */
for (i = 0; i PKTBUFSRX; i++) {
I see these two lines just before the code you change (one is even in
the context of your patch):
/* reset the indices to zero */
rxIdx = 0;
txIdx = 0;
So can you tell me, what your change actually does? I cannot remember
that we have concurrency issues here, or do we?
My apologies... I ported this patch from my work in u-boot 2009.11 and
did not notice that change above. I think explicitly using 0 when
assigning the base address pointers is clearer, though.
It seems the resetting of the indexes to 0 was added by Andy Fleming
in 063c12633d5ad74d52152d9c358e715475e17629, though the log doesn't
discuss it..
Best regards,
-Joe
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Re: [U-Boot] [PATCH] tsec: Configure the buffer descriptor bases to always include all of the descriptors
On Wed, Aug 10, 2011 at 9:10 AM, Andy Fleming aflem...@freescale.com wrote: On Aug 10, 2011, at 2:12 AM, Joe Hershberger wrote: Previously only the last N were included based on the current one in use. Signed-off-by: Joe Hershberger joe.hershber...@ni.com Cc: Joe Hershberger joe.hershber...@gmail.com Cc: Mingkai Hu mingkai...@freescale.com Cc: Andy Fleming aflem...@freescale.com Cc: Kumar Gala ga...@kernel.crashing.org Cc: Detlev Zundel d...@denx.de I'm curious if you were seeing a problem that this fixes? I was searching for a performance problem on the MPC8313, and discovered this, which seemed wrong. It was not, however, the source of my problem. --- drivers/net/tsec.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 78ffc95..1805ca0 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -250,8 +250,8 @@ static void startup_tsec(struct eth_device *dev) txIdx = 0; /* Point to the buffer descriptors */ - out_be32(regs-tbase, (unsigned int)(rtx.txbd[txIdx])); - out_be32(regs-rbase, (unsigned int)(rtx.rxbd[rxIdx])); + out_be32(regs-tbase, (unsigned int)(rtx.txbd[0])); + out_be32(regs-rbase, (unsigned int)(rtx.rxbd[0])); However, while I don't believe this fixes a technical problem, I believe this makes the code more straightforward. I agree. It is more straightforward to use 0 explicitly. So if this is a fix to a problem, we need more information to understand what you're really fixing. If this is just fixing something that looked wrong...: Acked-by: Andy Fleming aflem...@freescale.com It fixes something that was wrong before you committed 063c12633d5ad74d52152d9c358e715475e17629, but at this point, it's just cosmetic. Best regards, -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tsec: Configure the buffer descriptor bases to always include all of the descriptors
Hi Joe,
On Wed, Aug 10, 2011 at 7:29 AM, Detlev Zundel d...@denx.de wrote:
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 78ffc95..1805ca0 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -250,8 +250,8 @@ static void startup_tsec(struct eth_device *dev)
txIdx = 0;
/* Point to the buffer descriptors */
- out_be32(regs-tbase, (unsigned int)(rtx.txbd[txIdx]));
- out_be32(regs-rbase, (unsigned int)(rtx.rxbd[rxIdx]));
+ out_be32(regs-tbase, (unsigned int)(rtx.txbd[0]));
+ out_be32(regs-rbase, (unsigned int)(rtx.rxbd[0]));
/* Initialize the Rx Buffer descriptors */
for (i = 0; i PKTBUFSRX; i++) {
I see these two lines just before the code you change (one is even in
the context of your patch):
/* reset the indices to zero */
rxIdx = 0;
txIdx = 0;
So can you tell me, what your change actually does? I cannot remember
that we have concurrency issues here, or do we?
My apologies... I ported this patch from my work in u-boot 2009.11 and
did not notice that change above. I think explicitly using 0 when
assigning the base address pointers is clearer, though.
It seems the resetting of the indexes to 0 was added by Andy Fleming
in 063c12633d5ad74d52152d9c358e715475e17629, though the log doesn't
discuss it..
Yes, I see - it even slipped my review :( For the patch as such I don't
have a preference - looking at the code both ways really read the same
for me.
Cheers
Detlev
--
I've never understood the tendency to pick up tastes because they are popular.
In fact, I think it is foolish to do that. I mean, don't you know what you
like? People who are so weak that they will take their tastes from people
around them in the desperate desire to be accepted, I think of them as
cowards. -- Richard M. Stallman
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de
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Re: [U-Boot] [PATCH] omap4_panda: Ignore omap4 SPL called MLO
Hi Albert, On Wed, Aug 10, 2011 at 12:54 AM, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Joe, Le 10/08/2011 07:21, Joe Hershberger a écrit : Signed-off-by: Joe Hershbergerjoe.hershber...@ni.com Cc: Joe Hershbergerjoe.hershber...@gmail.com Cc: Sandeep Paulrajs-paul...@ti.com --- .gitignore | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/.gitignore b/.gitignore index dbf545f..f86ec35 100644 --- a/.gitignore +++ b/.gitignore @@ -19,6 +19,7 @@ # Top-level generic files # +/MLO /System.map /u-boot /u-boot.hex Why should this MLO be present at all in the U-Boot tree? Is this file a direct or indirect result of building the OMAP Panda board? It is a direct result of building an OMAP4 board... arch/arm/cpu/armv7/omap4/config.mk:27:ALL-y += $(OBJTREE)/MLO Best regards, -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] mmc: Fix mmc_send_status()
Hi Lei,
Hi Marek,
On Wed, Aug 10, 2011 at 3:24 PM, Marek Vasut marek.va...@gmail.com wrote:
The mmc_send_status() function sets cmd.arg = 0. That's incorrect, so fix it.
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
drivers/mmc/mmc.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
V2: Take SPI mode into account
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index cbd7567..00687d6 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -115,7 +115,8 @@ int mmc_send_status(struct mmc *mmc, int timeout)
cmd.cmdidx = MMC_CMD_SEND_STATUS;
cmd.resp_type = MMC_RSP_R1;
- cmd.cmdarg = 0;
+ if (!mmc_host_is_spi(mmc))
+ cmd.cmdarg = mmc-rca 16;
cmd.flags = 0;
do {
--
1.7.5.4
This patch works fine on my MMP3 board.
We have a formal way of saying that which as a bonus gets you into the
commit-logs ;)
Tested-by: Lei Wen adrian.w...@gmail.com
Cheers
Detlev
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Two roads diverged in a wood, and I-- / I took the one less traveled by, /
And that has made all the difference. -- Robert Frost
--
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Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de
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Re: [U-Boot] [PATCH 0/3] add mcf5307 support
Hi Angelo, The following patches add support for Freescale MCF5307 cpu. Below a brief of the changes: # On branch master # Changes to be committed: # (use git reset HEAD file... to unstage) # # new file: arch/m68k/cpu/mcf530x/Makefile # new file: arch/m68k/cpu/mcf530x/config.mk # new file: arch/m68k/cpu/mcf530x/cpu.c # new file: arch/m68k/cpu/mcf530x/cpu.h # new file: arch/m68k/cpu/mcf530x/cpu_init.c # new file: arch/m68k/cpu/mcf530x/interrupts.c # new file: arch/m68k/cpu/mcf530x/speed.c # new file: arch/m68k/cpu/mcf530x/start.S # new file: arch/m68k/include/asm/immap_5307.h # new file: arch/m68k/include/asm/m5307.h # # Changed but not updated: # (use git add file... to update what will be committed) # (use git checkout -- file... to discard changes in working directory) # # modified: arch/m68k/include/asm/cache.h # modified: arch/m68k/include/asm/immap.h # modified: arch/m68k/include/asm/timer.h # modified: include/common.h # You should get a more concise summary of your patches for free if you use git format-patch --cover-letter ..., i.e. see http://www.denx.de/wiki/U-Boot/Patches for details. Cheers Detlev -- Less talking -- more hacking -- Olin Shivers -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] add mcf5307 support
Hi Angelo, Cpu architecture files. # new file: arch/m68k/cpu/mcf530x/Makefile # new file: arch/m68k/cpu/mcf530x/config.mk # new file: arch/m68k/cpu/mcf530x/cpu.c # new file: arch/m68k/cpu/mcf530x/cpu.h # new file: arch/m68k/cpu/mcf530x/cpu_init.c # new file: arch/m68k/cpu/mcf530x/interrupts.c # new file: arch/m68k/cpu/mcf530x/speed.c # new file: arch/m68k/cpu/mcf530x/start.S Signed-off-by: Angelo Dureghello sysa...@gmail.com Which files are added is a detail already contained in the patch itself, it does not need to be included additionally. To find out how other people handle commits, simply use git log in the u-boot directory and give some consideration to its output. Cheers Detlev -- Helena ist verhältnismäßig leicht zu besetzen. Eine Frau, zarteste Jugend mit sinnlicher Reife verbindend; äußerst intelligent, indes von durchaus weiblicher Denkart; phlegmatisch, aber sensibel; unübertrefflich schön und dabei von sehr persönlichem Charme - mehr wird da nicht verlangt. -- Peter Hacks -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tsec: Configure the buffer descriptor bases to always include all of the descriptors
On Aug 10, 2011, at 2:24 PM, Detlev Zundel wrote:
Hi Joe,
On Wed, Aug 10, 2011 at 7:29 AM, Detlev Zundel d...@denx.de wrote:
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 78ffc95..1805ca0 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -250,8 +250,8 @@ static void startup_tsec(struct eth_device *dev)
txIdx = 0;
/* Point to the buffer descriptors */
- out_be32(regs-tbase, (unsigned int)(rtx.txbd[txIdx]));
- out_be32(regs-rbase, (unsigned int)(rtx.rxbd[rxIdx]));
+ out_be32(regs-tbase, (unsigned int)(rtx.txbd[0]));
+ out_be32(regs-rbase, (unsigned int)(rtx.rxbd[0]));
/* Initialize the Rx Buffer descriptors */
for (i = 0; i PKTBUFSRX; i++) {
I see these two lines just before the code you change (one is even in
the context of your patch):
/* reset the indices to zero */
rxIdx = 0;
txIdx = 0;
So can you tell me, what your change actually does? I cannot remember
that we have concurrency issues here, or do we?
My apologies... I ported this patch from my work in u-boot 2009.11 and
did not notice that change above. I think explicitly using 0 when
assigning the base address pointers is clearer, though.
It seems the resetting of the indexes to 0 was added by Andy Fleming
in 063c12633d5ad74d52152d9c358e715475e17629, though the log doesn't
discuss it..
Yes, I see - it even slipped my review :( For the patch as such I don't
have a preference - looking at the code both ways really read the same
for me.
Well, it wasn't added in that patch, exactly. What really happened is I
accidentally applied two patches, and then had to break them up again. That
part accidentally got put in the second patch. A careful review of the patch
history indicates that the indices have always been zeroed out beforehand
(though sometimes in separate functions).
All the same, it looks like this patch is a good idea, to me.
Andy
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Re: [U-Boot] [PATCH V2] mmc: Fix mmc_send_status()
On Aug 10, 2011, at 2:26 PM, Detlev Zundel wrote: Hi Lei, Hi Marek, On Wed, Aug 10, 2011 at 3:24 PM, Marek Vasut marek.va...@gmail.com wrote: The mmc_send_status() function sets cmd.arg = 0. That's incorrect, so fix it. Signed-off-by: Marek Vasut marek.va...@gmail.com Applied (with lei wen's tested-by). Thanks, Andy ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] add mcf5307 support
Hi Detlev, i don't have big experience with git, generally i use cvs/svn. I am posting changes/additions i have here in my local tree, since i am not an u-boot developer i don't think i am allowed to commit anything in the server repository. so git format-patch -n --cover-letter don't give any output. On 10/08/2011 21:41, Detlev Zundel wrote: Hi Angelo, Cpu architecture files. # new file: arch/m68k/cpu/mcf530x/Makefile # new file: arch/m68k/cpu/mcf530x/config.mk # new file: arch/m68k/cpu/mcf530x/cpu.c # new file: arch/m68k/cpu/mcf530x/cpu.h # new file: arch/m68k/cpu/mcf530x/cpu_init.c # new file: arch/m68k/cpu/mcf530x/interrupts.c # new file: arch/m68k/cpu/mcf530x/speed.c # new file: arch/m68k/cpu/mcf530x/start.S Signed-off-by: Angelo Dureghello sysa...@gmail.com Which files are added is a detail already contained in the patch itself, it does not need to be included additionally. To find out how other people handle commits, simply use git log in the u-boot directory and give some consideration to its output. Cheers Detlev ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 8/9] DM9000: change some printf to use debug instead
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Cc: Ben Warren biggerbadder...@gmail.com
---
drivers/net/dm9000x.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index b5c5573..9cd0195 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -232,7 +232,7 @@ dm9000_probe(void)
id_val |= DM9000_ior(DM9000_PIDL) 16;
id_val |= DM9000_ior(DM9000_PIDH) 24;
if (id_val == DM9000_ID) {
- printf(dm9000 i/o: 0x%x, id: 0x%x \n, CONFIG_DM9000_BASE,
+ DM9000_DBG(dm9000 i/o: 0x%x, id: 0x%x \n, CONFIG_DM9000_BASE,
id_val);
return 0;
} else {
@@ -298,19 +298,19 @@ static int dm9000_init(struct eth_device *dev, bd_t *bd)
switch (io_mode) {
case 0x0: /* 16-bit mode */
- printf(DM9000: running in 16 bit mode\n);
+ DM9000_DBG(DM9000: running in 16 bit mode\n);
db-outblk= dm9000_outblk_16bit;
db-inblk = dm9000_inblk_16bit;
db-rx_status = dm9000_rx_status_16bit;
break;
case 0x01: /* 32-bit mode */
- printf(DM9000: running in 32 bit mode\n);
+ DM9000_DBG(DM9000: running in 32 bit mode\n);
db-outblk= dm9000_outblk_32bit;
db-inblk = dm9000_inblk_32bit;
db-rx_status = dm9000_rx_status_32bit;
break;
case 0x02: /* 8 bit mode */
- printf(DM9000: running in 8 bit mode\n);
+ DM9000_DBG(DM9000: running in 8 bit mode\n);
db-outblk= dm9000_outblk_8bit;
db-inblk = dm9000_inblk_8bit;
db-rx_status = dm9000_rx_status_8bit;
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[U-Boot] [PATCH 6/9] mx1: improve PLL freq computation
Improve PLL freq computation by using the full resolution of the PLL registers
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Cc: Stefano Babic sba...@denx.de
---
arch/arm/cpu/arm920t/imx/speed.c | 29 +++--
1 files changed, 11 insertions(+), 18 deletions(-)
diff --git a/arch/arm/cpu/arm920t/imx/speed.c b/arch/arm/cpu/arm920t/imx/speed.c
index 1e29698..b1c2bd6 100644
--- a/arch/arm/cpu/arm920t/imx/speed.c
+++ b/arch/arm/cpu/arm920t/imx/speed.c
@@ -36,33 +36,26 @@
* the specified bus in HZ.
*/
/* - */
-
-ulong get_systemPLLCLK(void)
+static ulong get_PLLCLK(u32 sys_clk_freq, u32 pllctl0)
{
/* FIXME: We assume System_SEL = 0 here */
- u32 spctl0 = SPCTL0;
- u32 mfi = (spctl0 10) 0xf;
- u32 mfn = spctl0 0x3f;
- u32 mfd = (spctl0 16) 0x3f;
- u32 pd = (spctl0 26) 0xf;
+ u32 mfi = (pllctl0 10) 0xf;
+ u32 mfn = pllctl0 0x3ff;
+ u32 mfd = (pllctl0 16) 0x3ff;
+ u32 pd = (pllctl0 26) 0xf;
mfi = mfi=5 ? 5 : mfi;
+ return (2*(u64)sys_clk_freq * (mfi*(mfd+1) + mfn))/((mfd+1)*(pd+1));
+}
- return (2*(CONFIG_SYSPLL_CLK_FREQ10)*( (mfi10) +
(mfn10)/(mfd+1)))/(pd+1);
+ulong get_systemPLLCLK(void)
+{
+ return get_PLLCLK(CONFIG_SYSPLL_CLK_FREQ, SPCTL0);
}
ulong get_mcuPLLCLK(void)
{
- /* FIXME: We assume System_SEL = 0 here */
- u32 mpctl0 = MPCTL0;
- u32 mfi = (mpctl0 10) 0xf;
- u32 mfn = mpctl0 0x3f;
- u32 mfd = (mpctl0 16) 0x3f;
- u32 pd = (mpctl0 26) 0xf;
-
- mfi = mfi=5 ? 5 : mfi;
-
- return (2*(CONFIG_SYS_CLK_FREQ10)*( (mfi10) +
(mfn10)/(mfd+1)))/(pd+1);
+ return get_PLLCLK(CONFIG_SYS_CLK_FREQ, MPCTL0);
}
ulong get_FCLK(void)
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[U-Boot] [PATCH 9/9] arm920t: Fix jump to the relocated board_init_r
Jump to the relocated board_init_r according to the initial computation and remove computation against current PC addr as relocated address is already known and fixed. This helps to support CPU that miror flash to different address at power on boot such as Freescale iMX1/L Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org Cc: Albert Aribaud albert.u.b...@aribaud.net --- arch/arm/cpu/arm920t/start.S |4 +--- 1 files changed, 1 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index c308420..5c75289 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -292,9 +292,7 @@ _nand_boot_ofs: .word nand_boot #else ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 + add lr, r0, r6 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r6 /* dest_addr */ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 7/9] mx1: change a printf in speed.c to use debug instead
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Cc: Stefano Babic sba...@denx.de
---
arch/arm/cpu/arm920t/imx/speed.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm920t/imx/speed.c b/arch/arm/cpu/arm920t/imx/speed.c
index b1c2bd6..b8e42bf 100644
--- a/arch/arm/cpu/arm920t/imx/speed.c
+++ b/arch/arm/cpu/arm920t/imx/speed.c
@@ -67,7 +67,7 @@ ulong get_FCLK(void)
ulong get_HCLK(void)
{
u32 bclkdiv = (( CSCR 10 ) 0xf) + 1;
- printf(bclkdiv: %d\n, bclkdiv);
+ debug(bclkdiv: %d\n, bclkdiv);
return get_systemPLLCLK() / bclkdiv;
}
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[U-Boot] [PATCH 2/9] mx1: add i2c registers
Add i2c registers for Freescale imx1/L/S Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org Cc: Stefano Babic sba...@denx.de --- arch/arm/include/asm/arch-imx/imx-regs.h | 23 +++ 1 files changed, 23 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-imx/imx-regs.h b/arch/arm/include/asm/arch-imx/imx-regs.h index 0c26a36..a7b3404 100644 --- a/arch/arm/include/asm/arch-imx/imx-regs.h +++ b/arch/arm/include/asm/arch-imx/imx-regs.h @@ -638,4 +638,27 @@ extern void imx_gpio_mode(int gpio_mode); #define TSTAT_CAPT (11) /* Capture event */ #define TSTAT_COMP (1) /* Compare event */ +/* + * I2C module + */ +#define IADR __REG(IMX_I2C_BASE + 0x000) /* I2C Address Register */ +#define IFDR __REG(IMX_I2C_BASE + 0x004) /* I2C Frequency Divider Register*/ +#define I2CR __REG(IMX_I2C_BASE + 0x008) /* I2C Control Register */ +#define I2SR __REG(IMX_I2C_BASE + 0x00C) /* I2C Status Register */ +#define I2DR __REG(IMX_I2C_BASE + 0x010) /* I2C Data I/O Register */ +/* I2C Control Register Bit Fields */ +#define I2CR_IEN (17) /* I2C Enable */ +#define I2CR_IIEN (16) /* I2C Interrupt Enable */ +#define I2CR_MSTA (15) /* I2C Master/Slave Mode Select */ +#define I2CR_MTX (14) /* I2C Transmit/Receive Mode Select */ +#define I2CR_TXAK (13) /* I2C Transmit Acknowledge Enable */ +#define I2CR_RSTA (12) /* I2C Repeated START */ +#define I2SR_ICF (17) /* I2C Data Transfer */ +#define I2SR_IAAS (16) /* I2C Addressed As a Slave */ +#define I2SR_IBB (15) /* I2C Bus Busy */ +#define I2SR_IAL (14) /* I2C Arbitration Lost */ +#define I2SR_SRW (12) /* I2C Slave Read/Write */ +#define I2SR_IIF (11) /* I2C interrupt */ +#define I2SR_RXAK (10) /* I2C Received Acknowledge */ + #endif /* _IMX_REGS_H */ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/9] apf9328: add default board configuration file
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
include/configs/apf9328.h | 1034 +
1 files changed, 1034 insertions(+), 0 deletions(-)
create mode 100644 include/configs/apf9328.h
diff --git a/include/configs/apf9328.h b/include/configs/apf9328.h
new file mode 100644
index 000..b609887
--- /dev/null
+++ b/include/configs/apf9328.h
@@ -0,0 +1,1034 @@
+/*
+ * (C) Copyright 2005-2011 ej Armadeus Project eric.jarr...@armadeus.org
+ *
+ * Configuration settings for the Armadeus Project motherboard 9328.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * 2005/01/14 Initial version taken from the scb9328 configuration file
+ * 2005/03/10 apf9328 configuration file and trial to improve of
+ * hardware register control.
+ * 2005/08/16 added APF9328 fpgas and ethernet
+ * 2005/12/02 added filesystem boot over NFS
+ * 2006/11/26 added filesystem boot over NFS
+ * 2010/03/28 U-Boot 2010.03 migration + change timer unit to ms (fixme)
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_ENV_VERSION 4.0
+#define CONFIG_IDENT_STRING apf9328 patch 4.0
+
+#define CONFIG_ARM920T 1 /* this is an ARM920T CPU */
+#define CONFIG_IMX 1 /* in a Motorola MC9328MXL Chip */
+#define CONFIG_apf9328 1 /* on a Armadeus project board */
+#undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */
+#define CONFIG_SYS_DCACHE_OFF /* fix kernel 2.6.29 boot crash */
+/*
+ * Enable the call to misc_init_r() for miscellaneous platform
+ * dependent initialization.
+ */
+
+#define CONFIG_MISC_INIT_R
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+
+/*
+ * Select serial console configuration
+ */
+#define CONFIG_IMX_SERIAL
+#define CONFIG_IMX_SERIAL1
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+#define CONFIG_BAUDRATE115200
+
+/*
+ * Definition of u-boot build in commands. Check out CONFIG_CMD_DFL if
+ * neccessary in include/cmd_confdefs.h file. (Un)comment for getting
+ * functionality or size of u-boot code.
+ */
+
+#include config_cmd_default.h
+
+#define CONFIG_CMD_ASKENV /* ask for env variable */
+#define CONFIG_CMD_BSP /* Board Specific functions */
+#define CONFIG_CMD_CACHE /* icache, dcache */
+#define CONFIG_CMD_DATE/* support for RTC, date/time.. */
+#define CONFIG_CMD_DHCP/* DHCP Support */
+#define CONFIG_CMD_DIAG/* Diagnostics */
+#define CONFIG_CMD_EEPROM /* EEPROM read/write support*/
+#define CONFIG_CMD_FLASH /* flinfo, erase, protect */
+#define CONFIG_CMD_I2C /* I2C serial bus support */
+#define CONFIG_CMD_IMLS/* List all found images*/
+#define CONFIG_CMD_IMMAP /* IMMR dump support*/
+#define CONFIG_CMD_JFFS2 /* JFFS2 Support*/
+#define CONFIG_CMD_MTDPARTS/* MTD partition support*/
+#define CONFIG_CMD_PING/* ping support */
+#define CONFIG_CMD_SAVES /* save S record dump */
+#define CONFIG_CMD_SETEXPR /* setexpr support */
+#define CONFIG_CMD_SNTP/* SNTP support */
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_DNS
+
+#undef CONFIG_DISPLAY_BOARDINFO
+#undef CONFIG_DISPLAY_CPUINFO
+
+/*
+ * Select some advanced features of the commande line parser
+ */
+#define CONFIG_AUTO_COMPLETE 1 /* Enable auto completion of */
+ /* commands using TAB */
+#define CONFIG_SYS_HUSH_PARSER 1 /* enable the hush shell */
+#define CONFIG_SYS_PROMPT_HUSH_PS2 /* secondary prompt string */
+#define CONFIG_CMDLINE_EDITING 1
+
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+/*
+ * Boot options. Setting delay to -1 stops autostart count down.
+ */
+#define
[U-Boot] [PATCH 0/9] Series short description
The following series adds support for the Armadeus Project board apf9328 and also fixes some driver issues or improvements concerning the Freescale iMX1 cpu, DM9000 ethernet controler and the final call to the relocated board_init_r for the arm920t. The last arm920t patch should be applicable to the whole arm cpu family if some other CPU have the same behavior of mirroring the flash memory to a different address at power on reset. --- Eric Jarrige (9): mx1: export imx_gpio_mode() function mx1: add i2c registers apf9328: Add Armadeus Project board APF9328 apf9328: add apf9328 board in Makefile apf9328: add default board configuration file mx1: improve PLL freq computation mx1: change a printf in speed.c to use debug instead DM9000: change some printf to use debug instead arm920t: Fix jump to the relocated board_init_r MAINTAINERS |4 MAKEALL |1 arch/arm/cpu/arm920t/imx/speed.c | 31 - arch/arm/cpu/arm920t/start.S |4 arch/arm/include/asm/arch-imx/imx-regs.h | 30 + board/armadeus/apf9328/Makefile | 51 + board/armadeus/apf9328/apf9328.c | 91 +++ board/armadeus/apf9328/apf9328fpga.c | 89 +++ board/armadeus/apf9328/apf9328fpga.h | 31 + board/armadeus/apf9328/eeprom.c | 88 +++ board/armadeus/apf9328/fpga.c| 121 board/armadeus/apf9328/fpga.h| 30 + board/armadeus/apf9328/i2c.c | 276 board/armadeus/apf9328/lowlevel_init.S | 469 ++ boards.cfg |1 drivers/net/dm9000x.c|8 include/configs/apf9328.h| 1034 ++ 17 files changed, 2333 insertions(+), 26 deletions(-) create mode 100644 board/armadeus/apf9328/Makefile create mode 100644 board/armadeus/apf9328/apf9328.c create mode 100644 board/armadeus/apf9328/apf9328fpga.c create mode 100644 board/armadeus/apf9328/apf9328fpga.h create mode 100644 board/armadeus/apf9328/eeprom.c create mode 100644 board/armadeus/apf9328/fpga.c create mode 100644 board/armadeus/apf9328/fpga.h create mode 100644 board/armadeus/apf9328/i2c.c create mode 100644 board/armadeus/apf9328/lowlevel_init.S create mode 100644 include/configs/apf9328.h -- Best regards, Eric Jarrige ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] add mcf5307 support
Hi Angelo, i don't have big experience with git, generally i use cvs/svn. No problem, we all have to learn new things. I am posting changes/additions i have here in my local tree, since i am not an u-boot developer i don't think i am allowed to commit anything in the server repository. git is a distributed version control. The idea is that everybody carries a local copy of the revision history and commits changes to this local repository. Once ready, the changes are sent upstream and git even helps noticing changes that were introduced upstream which originated locally. so git format-patch -n --cover-letter don't give any output. Commit the changes that you have locally with git commit and use git format-patch -n --cover-letter last-mainline-commit where last-mainline-commit designates one of the possible ways to name a git commit, i.e. either a hash or a symbolic notation like HEAD~3. man gitworkflows may be a nice thing to read at this stage. Cheers Detlev -- WARNING: The external boundaries of India as depicted in map(s) are neither correct nor authentic. Other external boundaries as depicted in the map(s) may neither be correct nor authentic. -- Garmin MapSource manual -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tsec: Configure the buffer descriptor bases to always include all of the descriptors
Hi Andy, [...] It seems the resetting of the indexes to 0 was added by Andy Fleming in 063c12633d5ad74d52152d9c358e715475e17629, though the log doesn't discuss it.. Yes, I see - it even slipped my review :( For the patch as such I don't have a preference - looking at the code both ways really read the same for me. Well, it wasn't added in that patch, exactly. What really happened is I accidentally applied two patches, and then had to break them up again. That part accidentally got put in the second patch. A careful review of the patch history indicates that the indices have always been zeroed out beforehand (though sometimes in separate functions). It slipped my review nevertheless. All the same, it looks like this patch is a good idea, to me. Then submit an acked-by which should help the patch along. Cheers Detlev -- Für jemanden, der in eine Religion geboren wurde, in der das Ringen um eine einzige Seele ein Stafettenlauf über viele Jahrhunderte sein kann [..], hat das Tempo des Christentums etwas Schwindelerregendes. Wenn der Hinduismus friedlich dahinfließt wie der Ganges, dann ist das Christentum Toronto in der Rushhour.-- Yann Martel -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/9] apf9328: add apf9328 board in Makefile
add apf9328 board definition in makefile, MAKEALL and MAINTAINERS list Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org --- MAINTAINERS |4 MAKEALL |1 + boards.cfg |1 + 3 files changed, 6 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index f895e9a..48807fe 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -686,6 +686,10 @@ Grazvydas Ignotas nota...@gmail.com omap3_pandora ARM ARMV7 (OMAP3xx SoC) +Eric Jarrige eric.jarr...@armadeus.org + + apf9328 ARM920T (iMX1) + Gary Jennejohn ga...@denx.de smdk2400ARM920T diff --git a/MAKEALL b/MAKEALL index 3b98f03..f1aa6fc 100755 --- a/MAKEALL +++ b/MAKEALL @@ -320,6 +320,7 @@ LIST_ARM7= \ LIST_ARM9=\ a320evb \ + apf9328 \ ap920t \ ap922_XA10 \ ap926ejs\ diff --git a/boards.cfg b/boards.cfg index 6827cf3..1b4da54 100644 --- a/boards.cfg +++ b/boards.cfg @@ -49,6 +49,7 @@ lpc2292sodimmarm arm720t - - SMN42arm arm720t - siemenslpc2292 evb4510 arm arm720t - - s3c4510b a320evb arm arm920t - faradaya320 +apf9328 arm arm920t apf9328 armadeus imx at91rm9200ek arm arm920t at91rm9200ekatmel at91at91rm9200ek at91rm9200ek_ram arm arm920t at91rm9200ekatmel at91at91rm9200ek:RAMBOOT eb_cpux9k2 arm arm920t - BuS at91 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/9] mx1: export imx_gpio_mode() function
Add imx_gpio_mode() to Freescale imx1/L/S public functions Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org Cc: Stefano Babic sba...@denx.de --- arch/arm/include/asm/arch-imx/imx-regs.h |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-imx/imx-regs.h b/arch/arm/include/asm/arch-imx/imx-regs.h index ec94ba9..0c26a36 100644 --- a/arch/arm/include/asm/arch-imx/imx-regs.h +++ b/arch/arm/include/asm/arch-imx/imx-regs.h @@ -1,5 +1,12 @@ #ifndef _IMX_REGS_H #define _IMX_REGS_H + +#ifndef __ASSEMBLY__ + +extern void imx_gpio_mode(int gpio_mode); + +#endif /* __ASSEMBLY__ */ + /* * Motorola IMX system registers * ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/9] apf9328: Add Armadeus Project board APF9328
Add Armadeus Project board APF9328
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Signed-off-by: Nicolas Colombain nicolas.colomb...@armadeus.com
---
board/armadeus/apf9328/Makefile| 51 +++
board/armadeus/apf9328/apf9328.c | 91 ++
board/armadeus/apf9328/apf9328fpga.c | 89 ++
board/armadeus/apf9328/apf9328fpga.h | 31 ++
board/armadeus/apf9328/eeprom.c| 88 ++
board/armadeus/apf9328/fpga.c | 121
board/armadeus/apf9328/fpga.h | 30 ++
board/armadeus/apf9328/i2c.c | 276 +++
board/armadeus/apf9328/lowlevel_init.S | 469
9 files changed, 1246 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf9328/Makefile
create mode 100644 board/armadeus/apf9328/apf9328.c
create mode 100644 board/armadeus/apf9328/apf9328fpga.c
create mode 100644 board/armadeus/apf9328/apf9328fpga.h
create mode 100644 board/armadeus/apf9328/eeprom.c
create mode 100644 board/armadeus/apf9328/fpga.c
create mode 100644 board/armadeus/apf9328/fpga.h
create mode 100644 board/armadeus/apf9328/i2c.c
create mode 100644 board/armadeus/apf9328/lowlevel_init.S
diff --git a/board/armadeus/apf9328/Makefile b/board/armadeus/apf9328/Makefile
new file mode 100644
index 000..0f097cd
--- /dev/null
+++ b/board/armadeus/apf9328/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := apf9328.o i2c.o apf9328fpga.o fpga.o eeprom.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armadeus/apf9328/apf9328.c b/board/armadeus/apf9328/apf9328.c
new file mode 100644
index 000..2250221
--- /dev/null
+++ b/board/armadeus/apf9328/apf9328.c
@@ -0,0 +1,91 @@
+/*
+ * (C) Copyright 2005-2011
+ * Nicolas Colombin tho...@users.sourceforge.net
+ * Eric Jarrige eric.jarr...@armadeus.org
+ * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include asm/arch/imx-regs.h
+#include flash.h
+#include netdev.h
+#include apf9328fpga.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_arch_number = CONFIG_MACH_TYPE;
+ gd-bd-bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ /* dram_init must store complete ramsize in gd-ram_size */
+ gd-ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_1_BASE,
+ CONFIG_SYS_SDRAM_1_SIZE);
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+#if (CONFIG_NR_DRAM_BANKS 0)
+ gd-bd-bi_dram[0].start = CONFIG_SYS_SDRAM_1_BASE;
+ gd-bd-bi_dram[0].size = CONFIG_SYS_SDRAM_1_SIZE;
+#endif
+}
+
+/*
+ * Miscellaneous intialization
+ */
+int misc_init_r(void)
+{
+ char *s;
+
+#if (CONFIG_FPGA)
+ apf9328_init_fpga();
+#endif
Re: [U-Boot] [PATCH] tsec: Configure the buffer descriptor bases to always include all of the descriptors
On Aug 10, 2011, at 2:12 AM, Joe Hershberger wrote: Previously only the last N were included based on the current one in use. Signed-off-by: Joe Hershberger joe.hershber...@ni.com Cc: Joe Hershberger joe.hershber...@gmail.com Cc: Mingkai Hu mingkai...@freescale.com Cc: Andy Fleming aflem...@freescale.com Cc: Kumar Gala ga...@kernel.crashing.org Cc: Detlev Zundel d...@denx.de Acked-by: Andy Fleming aflem...@freescale.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] MII - Incorrect type specified for offset addr
I know I'm a bit late to this, but this doesn't sound right. MII isn't a very flexible protocol. The registers have to fit in 5 bits. In order for larger values to be used, you would need to be using clause 45 of MDIO, which requires not just 16-bit register offsets, but an additional argument (device address). There is currently support for clause 45 in the newer U-Boot PHY Lib code. On Mon, Jul 25, 2011 at 12:50 AM, Hebbar, Gururaja gururaja.heb...@ti.com wrote: Hi, We have an upcoming SOC with Ethernet controller which has registers with offsets crossing 0x110. In order to access these registers, we use miiphy_read() miiphy_write() api provided by Standard u-boot mii phy util code (common/miiphyutil.c). However the syntax of miiphy_read() miiphy_write() is as below int miiphy_read (char *devname, unsigned char addr, unsigned char reg, unsigned short *value); int miiphy_write (char *devname, unsigned char addr, unsigned char reg, unsigned short value); Here the reg argument is of type unsigned char which limits the offset to a max of 0xff. In linux, they are using u32 as type. Right now we have modified the type to short and using it. Is this correct? If yes, can we send a patch for the same? If not, what is the alternative? Thanks Regards Gururaja ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [u-boot-release] [Patch v2] powerpc/eeprom: cleanup mac command
York Sun wrote: Change the help message to be more helpful. Print argument format. Fix MAX_NUM_PORTS to comply with v1 NXID format. Signed-off-by: York Sunyork...@freescale.com Could you also fix the commands so that they take a number in decimal instead of hex? e.mac[index][i] = simple_strtoul(p, p, 16); ... e.mac_count = simple_strtoul(argv[2], NULL, 16); I know U-Boot uses hex for everything, but it doesn't make sense for this command. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [u-boot-release] [PATCH 7/7] powerpc/8xxx: Add support for interactive DDR programming interface
York Sun wrote:
+/* Option parameter Structures */
+typedef struct {
+ const char *option_name;
+ size_t offset;
+ unsigned int size;
+ const char printHex;
+} options_strings_t;
Does it make sense for only printHex (which should be print_hex) and
option_name to be const, but nothing else?
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Re: [U-Boot] [u-boot-release] [Patch v2] powerpc/eeprom: cleanup mac command
On Wednesday, August 10, 2011 21:27:28 Tabi Timur-B04825 wrote: York Sun wrote: Change the help message to be more helpful. Print argument format. Fix MAX_NUM_PORTS to comply with v1 NXID format. Signed-off-by: York Sunyork...@freescale.com Could you also fix the commands so that they take a number in decimal instead of hex? e.mac[index][i] = simple_strtoul(p, p, 16); ... e.mac_count = simple_strtoul(argv[2], NULL, 16); I know U-Boot uses hex for everything, but it doesn't make sense for this command. change it to 0 and then both should work -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] MII - Incorrect type specified for offset addr
On Wednesday, August 10, 2011 19:23:07 Andy Fleming wrote: I know I'm a bit late to this, but this doesn't sound right. MII isn't a very flexible protocol. The registers have to fit in 5 bits. In order for larger values to be used, you would need to be using clause 45 of MDIO, which requires not just 16-bit register offsets, but an additional argument (device address). There is currently support for clause 45 in the newer U-Boot PHY Lib code. it isnt uncommon for implementations to extend the spec -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] gpio: Expand cmd_gpio functionality and script friendliness
On Wednesday, August 10, 2011 02:27:42 Joe Hershberger wrote: Add quiet parameter to cmd_gpio for use when part of a script Enable repeat... especially useful when used with input and toggle Add outstate command that will return and print the state of an output a similar patch was posted somewhat recently but was declined. please see the archive for more info. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] gpio: Expand cmd_gpio functionality and script friendliness
Hi Mike, On Wed, Aug 10, 2011 at 8:33 PM, Mike Frysinger vap...@gentoo.org wrote: On Wednesday, August 10, 2011 02:27:42 Joe Hershberger wrote: Add quiet parameter to cmd_gpio for use when part of a script Enable repeat... especially useful when used with input and toggle Add outstate command that will return and print the state of an output a similar patch was posted somewhat recently but was declined. please see the archive for more info. I attempted to locate what you are referring to, but had no luck. I saw nothing that referenced cmd_gpio that was similar. Any clues about what aspects were rejected so I'll have a better idea what to search for? Possibly who rejected it? Thanks, -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] ftsdc010: add support of ftsdc010 mmc controller
Hi Andy, 2011/7/21 Macpaul Lin macp...@andestech.com: Faraday FTSDC010 controller is a SD/MMC controller for SoC chip. Signed-off-by: Macpaul Lin macp...@andestech.com --- Changes for v2: - headers: Fix typo from SDC_DATA_CTRL_REG_BLK_SIZE(x) to SDC_DATA_CTRL_REG_BLK_BYTES(x) Changes for v3: - Replace mmc_xxx function to ftsdc010_xxx. - Replace mmc_xxx structures to ftsdc010_xxx. - Remove unnessary cast for void type. - Remove unnessary offset caculation. - Fix clear variable in ftsdc010_pio_check_status. - Fix return value in ftsdc010_pio_check_status for command retry for hardware - Fix if branch for size and block checking in ftsdc010_setup_data. Just want to remind you there is a patch v3 waiting for reviewing which has been sent 3 weeks ago. Please check it when you have time. Thanks! -- Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/3] ARM: Clean arm/lib/cache.c, modify ARM1136 and ARM926 accordingly
This series try to clean the code of arch/arm/lib/cache.c Move ARM1136 cache operations into cpu/arm1136/cache.c Add ARM926EJS cache operations into cpu/arm926ejs/cache.c Hong Xu (3): ARM: Clean arch/arm/lib/cache.c ARM: ARM1136 - Remove flush_cache from arch/arm/lib/cache.c ARM: ARM926EJS - Add cache operations arch/arm/cpu/arm1136/Makefile |2 +- arch/arm/cpu/arm1136/cache.c| 33 + arch/arm/cpu/arm926ejs/Makefile |2 +- arch/arm/cpu/arm926ejs/cache.c | 142 +++ arch/arm/lib/cache.c| 55 +--- 5 files changed, 208 insertions(+), 26 deletions(-) create mode 100644 arch/arm/cpu/arm1136/cache.c create mode 100644 arch/arm/cpu/arm926ejs/cache.c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] ARM: Clean arch/arm/lib/cache.c
The default cache operations defined in arch/arm/lib/cache.c
do not perform any real cache operation, and instead a WARNING
will be emitted.
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
arch/arm/lib/cache.c | 55 -
1 files changed, 31 insertions(+), 24 deletions(-)
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 92b61a2..6af05ec 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -20,36 +20,43 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
+#include linux/compiler.h
+#include common.h
-/* for now: just dummy functions to satisfy the linker */
+#define EMIT_WARNING printf(WARNING: %s - CPU cache operation is not \
+implemented!\n, __func__)
-#include common.h
+/*
+ * Default implementations
+ *
+ * Warn user if CPU code does not implement necessary cache functions
+ */
+void __weak flush_cache(unsigned long start, unsigned long size)
+{
+ EMIT_WARNING;
+}
-void __flush_cache(unsigned long start, unsigned long size)
+void __weak flush_dcache_all(void)
{
-#if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
- void arm1136_cache_flush(void);
+ EMIT_WARNING;
+}
- arm1136_cache_flush();
-#endif
-#ifdef CONFIG_ARM926EJS
- /* test and clean, page 2-23 of arm926ejs manual */
- asm(0: mrc p15, 0, r15, c7, c10, 3\n\t bne 0b\n : : : memory);
- /* disable write buffer as well (page 2-22) */
- asm(mcr p15, 0, %0, c7, c10, 4 : : r (0));
-#endif
- return;
+void __weak flush_dcache_range(unsigned long start, unsigned long stop)
+{
+ EMIT_WARNING;
}
-void flush_cache(unsigned long start, unsigned long size)
- __attribute__((weak, alias(__flush_cache)));
-/*
- * Default implementation:
- * do a range flush for the entire range
- */
-void __flush_dcache_all(void)
+void __weak invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+ EMIT_WARNING;
+}
+
+void __weak invalidate_dcache_all(void)
+{
+ EMIT_WARNING;
+}
+
+void __weak invalidate_icache_all(void)
{
- flush_cache(0, ~0);
+ EMIT_WARNING;
}
-void flush_dcache_all(void)
- __attribute__((weak, alias(__flush_dcache_all)));
--
1.7.6
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[U-Boot] [PATCH 1/3] ARM: Clean arch/arm/lib/cache.c
The default cache operations defined in arch/arm/lib/cache.c
do not perform any real cache operation, and instead a WARNING
will be emitted.
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
CC: Aneesh V ane...@ti.com
CC: Marek Vasut marek.va...@gmail.com
CC: Reinhard Meyer u-b...@emk-elektronik.de
CC: Heiko Schocher h...@denx.de
---
arch/arm/lib/cache.c | 55 -
1 files changed, 31 insertions(+), 24 deletions(-)
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 92b61a2..6af05ec 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -20,36 +20,43 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
+#include linux/compiler.h
+#include common.h
-/* for now: just dummy functions to satisfy the linker */
+#define EMIT_WARNING printf(WARNING: %s - CPU cache operation is not \
+implemented!\n, __func__)
-#include common.h
+/*
+ * Default implementations
+ *
+ * Warn user if CPU code does not implement necessary cache functions
+ */
+void __weak flush_cache(unsigned long start, unsigned long size)
+{
+ EMIT_WARNING;
+}
-void __flush_cache(unsigned long start, unsigned long size)
+void __weak flush_dcache_all(void)
{
-#if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
- void arm1136_cache_flush(void);
+ EMIT_WARNING;
+}
- arm1136_cache_flush();
-#endif
-#ifdef CONFIG_ARM926EJS
- /* test and clean, page 2-23 of arm926ejs manual */
- asm(0: mrc p15, 0, r15, c7, c10, 3\n\t bne 0b\n : : : memory);
- /* disable write buffer as well (page 2-22) */
- asm(mcr p15, 0, %0, c7, c10, 4 : : r (0));
-#endif
- return;
+void __weak flush_dcache_range(unsigned long start, unsigned long stop)
+{
+ EMIT_WARNING;
}
-void flush_cache(unsigned long start, unsigned long size)
- __attribute__((weak, alias(__flush_cache)));
-/*
- * Default implementation:
- * do a range flush for the entire range
- */
-void __flush_dcache_all(void)
+void __weak invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+ EMIT_WARNING;
+}
+
+void __weak invalidate_dcache_all(void)
+{
+ EMIT_WARNING;
+}
+
+void __weak invalidate_icache_all(void)
{
- flush_cache(0, ~0);
+ EMIT_WARNING;
}
-void flush_dcache_all(void)
- __attribute__((weak, alias(__flush_dcache_all)));
--
1.7.6
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[U-Boot] [PATCH 2/3] ARM: ARM1136 - Remove flush_cache from arch/arm/lib/cache.c
arch/arm/lib/cache.c is cleaned and no real cache operation will be
defined in this file. So a new file arch/arm/cpu/arm1136/cache.c is
created. This file will define the real cache operations.
Signed-off-by: Hong Xu hong...@atmel.com
Tested-by: Elen Song elen.s...@atmel.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
arch/arm/cpu/arm1136/Makefile |2 +-
arch/arm/cpu/arm1136/cache.c | 33 +
2 files changed, 34 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm1136/cache.c
diff --git a/arch/arm/cpu/arm1136/Makefile b/arch/arm/cpu/arm1136/Makefile
index 930e0d1..5b5f330 100644
--- a/arch/arm/cpu/arm1136/Makefile
+++ b/arch/arm/cpu/arm1136/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(CPU).o
START = start.o
-COBJS = cpu.o
+COBJS = cpu.o cache.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/arm1136/cache.c b/arch/arm/cpu/arm1136/cache.c
new file mode 100644
index 000..02aa266
--- /dev/null
+++ b/arch/arm/cpu/arm1136/cache.c
@@ -0,0 +1,33 @@
+/*
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+void flush_cache(unsigned long start, unsigned long size)
+{
+#if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
+ void arm1136_cache_flush(void);
+
+ arm1136_cache_flush();
+#endif
+}
--
1.7.6
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