Re: [U-Boot] [U-Boot PATCH MX31:] smc911x MII made available, ping?
On 09/07/2011 11:47 PM, Wolfgang Denk wrote: Dear Stefano Babic, In message4e676571.5090...@denx.de you wrote: On 09/07/2011 07:40 AM, Helmut Raiger wrote: Hi Helmut, This is sitting here for more than 2 months, could someone please ACK and/or apply. I think that one reason for the delay is that you do not add the network maintainer (Wolfgang) as CC in V2 of your patch - I missed also this patch, and I send now after testing my tested-by as I did for V1. Even more so: the patch is flagged as for MX31, so I don;t even look at it. Best regards, Wolfgang Denk Damn, yes, my fault. In the heat of the action ... Thx, Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 2/3] Armada100: Enable Ethernet support for GplugD
-Original Message-
From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
Sent: Friday, September 02, 2011 10:49 AM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; vap...@gentoo.org; marek.va...@gmail.com; Ajay
Bhargav
Subject: [PATCH v5 2/3] Armada100: Enable Ethernet support for GplugD
This patch enables ethernet support for Marvell GplugD board. Network
related commands works.
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
Changes for v2:
- armada100_fec_initialize changed to armada100_fec_register
Changes for v3:
- fec base address as argument to armada100_fec_register
Changes for v4:
- Not changed
Changes for v5:
- Coding style cleanup
arch/arm/include/asm/arch-armada100/armada100.h | 57
+++
arch/arm/include/asm/arch-armada100/mfp.h | 19
board/Marvell/gplugd/gplugd.c | 38 +++
include/configs/gplugd.h| 19 +++-
4 files changed, 131 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-armada100/armada100.h
b/arch/arm/include/asm/arch-armada100/armada100.h
index 3d567eb..849638d 100644
--- a/arch/arm/include/asm/arch-armada100/armada100.h
+++ b/arch/arm/include/asm/arch-armada100/armada100.h
@@ -41,6 +41,10 @@
/* Functional Clock Selection Mask */
#define APBC_FNCLKSEL(x)(((x) 0xf) 4)
+/* Fast Ethernet Controller Clock register definition */
+#define FE_CLK_RST 0x1
+#define FE_CLK_ENA 0x8
+
/* Register Base Addresses */
#define ARMD1_DRAM_BASE 0xB000
#define ARMD1_TIMER_BASE 0xD4014000
@@ -85,6 +89,59 @@ struct armd1mpmu_registers {
};
/*
+ * Application Subsystem Power Management
+ * Refer Datasheet Appendix A.9
+ */
+struct armd1apmu_registers {
+ u32 pcr;/* 0x000 */
+ u32 ccr;/* 0x004 */
+ u32 pad1;
+ u32 ccsr; /* 0x00C */
+ u32 fc_timer; /* 0x010 */
+ u32 pad2;
+ u32 ideal_cfg; /* 0x018 */
+ u8 pad3[0x04C - 0x018 - 4];
+ u32 lcdcrc; /* 0x04C */
+ u32 cciccrc;/* 0x050 */
+ u32 sd1crc; /* 0x054 */
+ u32 sd2crc; /* 0x058 */
+ u32 usbcrc; /* 0x05C */
+ u32 nfccrc; /* 0x060 */
+ u32 dmacrc; /* 0x064 */
+ u32 pad4;
+ u32 buscrc; /* 0x06C */
+ u8 pad5[0x07C - 0x06C - 4];
+ u32 wake_clr; /* 0x07C */
+ u8 pad6[0x090 - 0x07C - 4];
+ u32 core_status;/* 0x090 */
+ u32 rfsc; /* 0x094 */
+ u32 imr;/* 0x098 */
+ u32 irwc; /* 0x09C */
+ u32 isr;/* 0x0A0 */
+ u8 pad7[0x0B0 - 0x0A0 - 4];
+ u32 mhst; /* 0x0B0 */
+ u32 msr;/* 0x0B4 */
+ u8 pad8[0x0C0 - 0x0B4 - 4];
+ u32 msst; /* 0x0C0 */
+ u32 pllss; /* 0x0C4 */
+ u32 smb;/* 0x0C8 */
+ u32 gccrc; /* 0x0CC */
+ u8 pad9[0x0D4 - 0x0CC - 4];
+ u32 smccrc; /* 0x0D4 */
+ u32 pad10;
+ u32 xdcrc; /* 0x0DC */
+ u32 sd3crc; /* 0x0E0 */
+ u32 sd4crc; /* 0x0E4 */
+ u8 pad11[0x0F0 - 0x0E4 - 4];
+ u32 cfcrc; /* 0x0F0 */
+ u32 mspcrc; /* 0x0F4 */
+ u32 cmucrc; /* 0x0F8 */
+ u32 fecrc; /* 0x0FC */
+ u32 pciecrc;/* 0x100 */
+ u32 epdcrc; /* 0x104 */
+};
+
+/*
* APB1 Clock Reset/Control Registers
* Refer Datasheet Appendix A.10
*/
diff --git a/arch/arm/include/asm/arch-armada100/mfp.h
b/arch/arm/include/asm/arch-armada100/mfp.h
index d6e0494..da76b58 100644
--- a/arch/arm/include/asm/arch-armada100/mfp.h
+++ b/arch/arm/include/asm/arch-armada100/mfp.h
@@ -64,6 +64,25 @@
#define MFP105_CI2C_SDA (MFP_REG(0x1a4) | MFP_AF1 |
MFP_DRIVE_MEDIUM)
#define MFP106_CI2C_SCL (MFP_REG(0x1a8) | MFP_AF1 |
MFP_DRIVE_MEDIUM)
+/* Fast Ethernet */
+#define MFP086_ETH_TXCLK (MFP_REG(0x158) | MFP_AF5 | MFP_DRIVE_MEDIUM)
+#define MFP087_ETH_TXEN (MFP_REG(0x15C) | MFP_AF5 |
MFP_DRIVE_MEDIUM)
+#define MFP088_ETH_TXDQ3 (MFP_REG(0x160) | MFP_AF5 | MFP_DRIVE_MEDIUM)
+#define MFP089_ETH_TXDQ2 (MFP_REG(0x164) | MFP_AF5 | MFP_DRIVE_MEDIUM)
+#define MFP090_ETH_TXDQ1 (MFP_REG(0x168) | MFP_AF5 | MFP_DRIVE_MEDIUM)
+#define MFP091_ETH_TXDQ0 (MFP_REG(0x16C) | MFP_AF5 | MFP_DRIVE_MEDIUM)
+#define MFP092_ETH_CRS (MFP_REG(0x170) | MFP_AF5 |
MFP_DRIVE_MEDIUM)
+#define MFP093_ETH_COL (MFP_REG(0x174) | MFP_AF5 |
MFP_DRIVE_MEDIUM)
+#define MFP094_ETH_RXCLK (MFP_REG(0x178) | MFP_AF5 | MFP_DRIVE_MEDIUM)
+#define MFP095_ETH_RXER (MFP_REG(0x17C) |
Re: [U-Boot] [PATCH v5 2/3] Armada100: Enable Ethernet support for GplugD
- Prafulla Wadaskar prafu...@marvell.com wrote: -Original Message- From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com] Sent: Friday, September 02, 2011 10:49 AM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; vap...@gentoo.org; marek.va...@gmail.com; Ajay Bhargav Subject: [PATCH v5 2/3] Armada100: Enable Ethernet support for GplugD [...] #define CONFIG_CMD_I2C #define CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS + +/* Disable DCACHE */ +#define CONFIG_SYS_DCACHE_OFF + Put below definition encapsulated in #ifdef CONFIG_CMD_NET +/* Network configuration */ +#define CONFIG_CMD_PING +#define CONFIG_NET_MULTI +#define CONFIG_ARMADA100_FEC + +/* DHCP Support */ +#define CONFIG_CMD_DHCP +#define CONFIG_BOOTP_DHCP_REQUEST_DELAY5 +#define CONFIG_BOOTP_SERVERIP You should remove this also during this commit. There should not be any hard coding for serverip and ipaddr + +/* Default Boot Parameters */ +#define CONFIG_ROOTPATH/tftpboot +#define CONFIG_SYS_IMG_NAMEuImage Similarly these are also not necessary, you may remove those too. Ack for rest of the code. Regards.. Prafulla . . Hi Prafulla, Thanks for reply, I will do the required changes and submit back.. Regards, Ajay Bhargav /* * mv-common.h should be defined after CMD configs since it used them -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 1/3] net: Adds Fast Ethernet Controller driver for Armada100
-Original Message- From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com] Sent: Friday, September 02, 2011 10:49 AM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; vap...@gentoo.org; marek.va...@gmail.com; Ajay Bhargav Subject: [PATCH v5 1/3] net: Adds Fast Ethernet Controller driver for Armada100 This patch adds support for Fast Ethernet Controller driver for Armada100 series. Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com --- Changes for v2: - removed random MAC generation - driver init function changed to register as per new naming convention - code cleanup (Thanks to Wolfgang, Marek Mike for tips) Changes for v3: - code cleanup Changes for v4: - Debug and Error messages updated - base_addr param for armada100_fec_register changed to unsigned long Changes for v5: - Coding style cleanup - removed unwanted function arch/arm/include/asm/arch-armada100/armada100.h |1 + drivers/net/Makefile|1 + drivers/net/armada100_fec.c | 736 +++ drivers/net/armada100_fec.h | 232 +++ include/netdev.h|1 + 5 files changed, 971 insertions(+), 0 deletions(-) create mode 100644 drivers/net/armada100_fec.c create mode 100644 drivers/net/armada100_fec.h diff --git a/arch/arm/include/asm/arch-armada100/armada100.h b/arch/arm/include/asm/arch-armada100/armada100.h index d5d125a..3d567eb 100644 --- a/arch/arm/include/asm/arch-armada100/armada100.h +++ b/arch/arm/include/asm/arch-armada100/armada100.h @@ -59,6 +59,7 @@ #define ARMD1_MPMU_BASE 0xD405 #define ARMD1_APMU_BASE 0xD4282800 #define ARMD1_CPU_BASE 0xD4282C00 +#define ARMD1_FEC_BASE 0xC080 This is not in order should be above 0xDxxx Otherwise Ack for rest of the code. Regards.. Prafulla . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 2/3] Armada100: Enable Ethernet support for GplugD
-Original Message- From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com] Sent: Thursday, September 08, 2011 10:09 AM To: Wolfgang Denk Cc: Prafulla Wadaskar; u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH v5 2/3] Armada100: Enable Ethernet support for GplugD - Wolfgang Denk w...@denx.de wrote: Dear Ajay Bhargav, In message 1314940721-1867-2-git-send-email-ajay.bhar...@einfochips.com you wrote: This patch enables ethernet support for Marvell GplugD board. Network related commands works. ... +#define CONFIG_BOOTP_SERVERIP Please remove this line. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Roses are red Violets are blue Some poems rhyme Dear Wolfgang, I asked Prafulla if he can remove that unwanted line. If it is not possible then I can resubmit the patch with that change. Hi Ajay, Ideally you should do it :-) there are also two more suggestions. Please do the needful, test it and post v6 patch series. Hi Wolfgang, I would like to pull this patch series into u-boot-marvell.git for Ben. I hope this will be okay with you. Regards.. Prafulla . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 2/3] Armada100: Enable Ethernet support for GplugD
- Prafulla Wadaskar prafu...@marvell.com wrote: -Original Message- From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com] Sent: Thursday, September 08, 2011 10:09 AM To: Wolfgang Denk Cc: Prafulla Wadaskar; u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH v5 2/3] Armada100: Enable Ethernet support for GplugD - Wolfgang Denk w...@denx.de wrote: Dear Ajay Bhargav, In message 1314940721-1867-2-git-send-email-ajay.bhar...@einfochips.com you wrote: This patch enables ethernet support for Marvell GplugD board. Network related commands works. ... +#define CONFIG_BOOTP_SERVERIP Please remove this line. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Roses are red Violets are blue Some poems rhyme Dear Wolfgang, I asked Prafulla if he can remove that unwanted line. If it is not possible then I can resubmit the patch with that change. Hi Ajay, Ideally you should do it :-) there are also two more suggestions. Please do the needful, test it and post v6 patch series. Hi Wolfgang, I would like to pull this patch series into u-boot-marvell.git for Ben. I hope this will be okay with you. Regards.. Prafulla . . Hi Prafulla, Sure I will do it. I am looking at your suggestions and will do the necessary changes. Thanks Regards, Ajay Bhargav ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] BeagleBoard: Added userbutton command
Dear Joel A Fernandes, In message 1313462214-3716-2-git-send-email-agnel.j...@gmail.com you wrote: From: Jason Kridner jkrid...@beagleboard.org Based on commit f1099c7c43caf5bac3bf6a65aa266fade4747072 Author: Greg Turner gregtur...@ti.com Date: Tue May 25 09:19:06 2010 -0500 New u-boot command for status of USER button on BeagleBoard-xM Modified bootcmd to check the staus at boot time and set filename of the boot script. * Moved to a BeagleBoard specific file. * Removed changes to default boot command from adding userbutton command. * Made to handle pre-xM boards. * Flipped polarity of the return value to avoid confusion. Success (0) is when the button is pressed. Failure (1) is when the button is NOT pressed. * Used latest revision getting function. * Used latest macros for board revision. * Added xM-C revision definition (optional, since it was default) * updated default configuration with UserButton functionality * Added a separate bootenv variable to load a user defined .txt file * Added an example, showing how a different environment file can be loaded with the user button pressed Your patch has a large number of cding style issues; please always run checkpatch before submitting patches. Also, I agree with Albert: there should be no need for a separate userbutton command. Please fix and resubmit. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The average woman would rather have beauty than brains, because the average man can see better than he can think. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH RFC] env: add command to set individual variables to default
Here I am proposing an implementation for setting individual variables
to their default values as outlined in
http://www.denx.de/wiki/U-Boot/TaskSetEnvironmentDefaults
For instance, to reset defautl values for variables bootcmd and bootdelay:
= env default bootcmd bootdelay
There are a few issues which are not fully covered.
[In braces I put the behavior of this patch].
1) Previous implementation of “env default” only worked for the whole
environment, and “-f” was necessary in order to prevent the unexperienced
user from messing up the environment by just typing command names.
Should this behavior be kept? [Yes]
2) When a variable is not defined in the default environment, should
it get deleted (if existing)? [Yes] Should a warning be issued? [No]
What if it is neither defined in the current nor in the default env?
3) Should it be possible to disable this feature (i.e. to save space)?
[No]
Any suggestions for a meaningful configuration token?
I was thinking of CONFIG_RESTORE_INDIVIDUAL_ENV_VARS.
4) This implementation comes mostly from himport_r().
It crossed my mind that it might also be useful to *import*
individual variables from a file (rather that the default env).
For instance:
env import [flags] addr size vars...
Would only import variables vars and ignore all others.
With this idea in mind I kept all himport_r()'s support for external files
(i.e., comments, separator other than '\0', quoting).
If no one else envisions any use for such import commands, the code could
obviously be much smaller and simpler.
Signed-off-by: Gerlando Falauto gerlando.fala...@keymile.com
Signed-off-by: Holger Brunck holger.bru...@keymile.com
cc: Wolfgang Denk w...@denx.de
---
common/cmd_nvedit.c | 12 +-
common/env_common.c | 106 +
include/environment.h |3 +
3 files changed, 119 insertions(+), 2 deletions(-)
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index b2c88ba..9822785 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -580,10 +580,17 @@ int envmatch(uchar *s1, int i2)
static int do_env_default(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[])
{
- if ((argc != 2) || (strcmp(argv[1], -f) != 0))
+ /* Check that we have at least one argument */
+ if (argc 2) {
return cmd_usage(cmdtp);
+ } else if ((argc == 2) (strcmp(argv[1], -f)) == 0) {
+ /* Reset the whole environment */
+ set_default_env(## Resetting to default environment\n);
+ return 0;
+ }
- set_default_env(## Resetting to default environment\n);
+ /* Reset individual variables */
+ env_default_vars(argc-1, argv+1);
return 0;
}
@@ -910,6 +917,7 @@ U_BOOT_CMD(
ask name [message] [size] - ask for environment variable\nenv
#endif
default -f - reset default environment\n
+ env default name [...] - reset variable(s) to their default value\n
#if defined(CONFIG_CMD_EDITENV)
env edit name - edit environment variable\n
#endif
diff --git a/common/env_common.c b/common/env_common.c
index c3e6388..b2d68f8 100644
--- a/common/env_common.c
+++ b/common/env_common.c
@@ -197,6 +197,112 @@ void set_default_env(const char *s)
}
/*
+ * import individual variables from an external environment
+ * (e.g. default environment).
+ * Most of this code comes straight from himport_r().
+ */
+static int env_import_vars(const char *env, const size_t size, const char sep,
+ int nvars, char * const vars[])
+{
+ char *data, *sp, *dp, *name, *value, *thisvalue;
+ int i;
+
+ /* we allocate new space to make sure we can write to the array */
+ data = malloc(size);
+ if (data == NULL) {
+ debug(env_default_vars: can't malloc %d bytes\n, size);
+ __set_errno(ENOMEM);
+ return 0;
+ }
+
+ /* Loop through all passed variables */
+ for (i = 0; i nvars; i++) {
+ debug(looking for a default value for %s\n, vars[i]);
+
+ memcpy(data, env, size);
+ dp = data;
+
+ /*
+* Unless proven otherwise, this variable
+* does not exist in the default env
+*/
+ thisvalue = ;
+ /* Parse environment; allow for '\0' and 'sep' as separators */
+ do {
+ /* skip leading white space */
+ while ((*dp == ' ') || (*dp == '\t'))
+ ++dp;
+
+ /* skip comment lines */
+ if (*dp == '#') {
+ while (*dp (*dp != sep))
+ ++dp;
+ ++dp;
+ continue;
+ }
+
+ /* parse name */
+ for (name = dp; *dp != '=' *dp
Re: [U-Boot] [PATCH v3] ns16550: change to allow 32 bit access to registers
Hi Wolfgang On 07/09/11 22:22, Wolfgang Denk wrote: Dear Dave Aldridge, In message 1314877212-31552-1-git-send-email-fovs...@gmail.com you wrote: If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory mapped access will be used to read/write the uart registers. This is especially useful for SoC devices that implement 16550 compatible uarts but that have peripheral access width constraints. Signed-off-by: Dave Aldridge fovs...@gmail.com ... --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -19,6 +19,12 @@ #ifdef CONFIG_SYS_NS16550_PORT_MAPPED #define serial_out(x,y) outb(x,(ulong)y) #define serial_in(y)inb((ulong)y) +#elif defined(CONFIG_SYS_NS16550_MEM32) (CONFIG_SYS_NS16550_REG_SIZE 0) +#define serial_out(x,y) out_be32(y,x) +#define serial_in(y)in_be32(y) +#elif defined(CONFIG_SYS_NS16550_MEM32) (CONFIG_SYS_NS16550_REG_SIZE 0) +#define serial_out(x,y) out_le32(y,x) +#define serial_in(y)in_le32(y) Sorry for the dumb question, but in which way is REG_SIZE 0 or REG_SIZE 0 connected to the endianess of the target system? My understanding is that this only defines how byte wide registers need to be padded, i. e. wether they are connected to the highest or to the lowest byte lane. THis has nothing to do with the endianess of the system, and it appears wrong to me, to imply such a relation here. Detlev, what do you think? No such thing as a dumb question. It is my understanding from the way that the REG_SIZE macro is currently being used in the driver that the endianess of the uart can be inferred in this way. #else #define serial_out(x,y) writeb(x,y) #define serial_in(y)readb(y) diff --git a/include/ns16550.h b/include/ns16550.h index 9ea81e9..d4ffac9 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -23,6 +23,8 @@ #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) #error Please define NS16550 registers size. +#elif defined(CONFIG_SYS_NS16550_MEM32) +#define UART_REG(x) unsigned int x; I think you should rather use an explicit 32 bit data type here; int may be 64 bits on some systems. Best regards, Wolfgang Denk Cheers Dave ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 3/3] Armada100: Enable 88E3015 PHY support for GplugD
This patch adds support for 88E3015 PHY for Marvell GplugD board.
This patch depends on series of patch which adds support for Marvell
GuruPlug-Display.
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
Changes for v2:
- Not changed
Changes for v3:
- code cleanup; removed unwated cast
Changes for v4:
- Not changed
Changes for v5:
- Coding style cleanup
Changes for v6:
- Not changed
board/Marvell/gplugd/gplugd.c | 33 +
include/configs/gplugd.h | 14 ++
2 files changed, 47 insertions(+), 0 deletions(-)
diff --git a/board/Marvell/gplugd/gplugd.c b/board/Marvell/gplugd/gplugd.c
index 8560b3f..b4f7f81 100644
--- a/board/Marvell/gplugd/gplugd.c
+++ b/board/Marvell/gplugd/gplugd.c
@@ -32,6 +32,8 @@
#include mvmfp.h
#include asm/arch/mfp.h
#include asm/arch/armada100.h
+#include asm/gpio.h
+#include miiphy.h
#ifdef CONFIG_ARMADA100_FEC
#include net.h
@@ -83,6 +85,11 @@ int board_init(void)
gd-bd-bi_arch_number = MACH_TYPE_SHEEVAD;
/* adress of boot parameters */
gd-bd-bi_boot_params = armd1_sdram_base(0) + 0x100;
+ /* Assert PHY_RST# */
+ gpio_direction_output(CONFIG_SYS_GPIO_PHY_RST, GPIO_LOW);
+ udelay(10);
+ /* Deassert PHY_RST# */
+ gpio_set_value(CONFIG_SYS_GPIO_PHY_RST, GPIO_HIGH);
return 0;
}
@@ -97,4 +104,30 @@ int board_eth_init(bd_t *bis)
return armada100_fec_register(ARMD1_FEC_BASE);
}
+
+#ifdef CONFIG_RESET_PHY_R
+/* Configure and initialize PHY chip 88E3015 */
+void reset_phy(void)
+{
+ u16 phy_adr;
+ const char *name = armd-fec0;
+
+ if (miiphy_set_current_dev(name))
+ return;
+
+ /* command to read PHY dev address */
+ if (miiphy_read(name, 0xff, 0xff, phy_adr)) {
+ printf(Err..%s could not read PHY dev address\n, __func__);
+ return;
+ }
+
+ /* Set Ethernet LED in TX blink mode */
+ miiphy_write(name, phy_adr, PHY_LED_MAN_REG, 0x00);
+ miiphy_write(name, phy_adr, PHY_LED_PAR_SEL_REG, PHY_LED_VAL);
+
+ /* reset the phy */
+ miiphy_reset(name, phy_adr);
+ debug(88E3015 Initialized on %s\n, name);
+}
+#endif /* CONFIG_RESET_PHY_R */
#endif /* CONFIG_ARMADA100_FEC */
diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h
index 3ad2de5..5f72163 100644
--- a/include/configs/gplugd.h
+++ b/include/configs/gplugd.h
@@ -77,6 +77,20 @@
#define CONFIG_BOOTP_DHCP_REQUEST_DELAY5
#endif /* CONFIG_CMD_NET */
+/* GPIO Support */
+#define CONFIG_MARVELL_GPIO
+
+/* PHY configuration */
+#define CONFIG_MII
+#define CONFIG_CMD_MII
+#define CONFIG_RESET_PHY_R
+/* 88E3015 register definition */
+#define PHY_LED_PAR_SEL_REG22
+#define PHY_LED_MAN_REG25
+#define PHY_LED_VAL0x5b/* LINK LED1, ACT LED2 */
+/* GPIO Configuration for PHY */
+#define CONFIG_SYS_GPIO_PHY_RST104 /* GPIO104 */
+
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros
--
1.7.0.4
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[U-Boot] [PATCH v6 1/3] net: Adds Fast Ethernet Controller driver for Armada100
This patch adds support for Fast Ethernet Controller driver for
Armada100 series.
Signed-off-by: Ajay Bhargav ajay.bhar...@einfochips.com
---
Changes for v2:
- removed random MAC generation
- driver init function changed to register as per new naming convention
- code cleanup (Thanks to Wolfgang, Marek Mike for tips)
Changes for v3:
- code cleanup
Changes for v4:
- Debug and Error messages updated
- base_addr param for armada100_fec_register changed to unsigned long
Changes for v5:
- Coding style cleanup
- removed unwanted function
Changes for v6:
- Coding style cleanup (Thanks Prafulla for tips)
arch/arm/include/asm/arch-armada100/armada100.h |1 +
drivers/net/Makefile|1 +
drivers/net/armada100_fec.c | 736 +++
drivers/net/armada100_fec.h | 232 +++
include/netdev.h|1 +
5 files changed, 971 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/armada100_fec.c
create mode 100644 drivers/net/armada100_fec.h
diff --git a/arch/arm/include/asm/arch-armada100/armada100.h
b/arch/arm/include/asm/arch-armada100/armada100.h
index d5d125a..9b9ed16 100644
--- a/arch/arm/include/asm/arch-armada100/armada100.h
+++ b/arch/arm/include/asm/arch-armada100/armada100.h
@@ -43,6 +43,7 @@
/* Register Base Addresses */
#define ARMD1_DRAM_BASE0xB000
+#define ARMD1_FEC_BASE 0xC080
#define ARMD1_TIMER_BASE 0xD4014000
#define ARMD1_APBC1_BASE 0xD4015000
#define ARMD1_APBC2_BASE 0xD4015800
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 819b197..34b4322 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -28,6 +28,7 @@ LIB := $(obj)libnet.o
COBJS-$(CONFIG_DRIVER_3C589) += 3c589.o
COBJS-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o
COBJS-$(CONFIG_ALTERA_TSE) += altera_tse.o
+COBJS-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
COBJS-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
COBJS-$(CONFIG_DRIVER_AX88180) += ax88180.o
COBJS-$(CONFIG_BCM570x) += bcm570x.o
diff --git a/drivers/net/armada100_fec.c b/drivers/net/armada100_fec.c
new file mode 100644
index 000..b526bcb
--- /dev/null
+++ b/drivers/net/armada100_fec.c
@@ -0,0 +1,736 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. www.einfochips.com
+ * Written-by: Ajay Bhargav ajay.bhar...@einfochips.com
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor www.marvell.com
+ * Contributor: Mahavir Jain mj...@marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+#include net.h
+#include malloc.h
+#include miiphy.h
+#include netdev.h
+#include asm/types.h
+#include asm/byteorder.h
+#include linux/err.h
+#include linux/mii.h
+#include asm/io.h
+#include asm/arch/armada100.h
+#include armada100_fec.h
+
+#define PHY_ADR_REQ 0xFF /* Magic number to read/write PHY address */
+
+#ifdef DEBUG
+static int eth_dump_regs(struct eth_device *dev)
+{
+ struct armdfec_device *darmdfec = to_darmdfec(dev);
+ struct armdfec_reg *regs = darmdfec-regs;
+ unsigned int i = 0;
+
+ printf(\noffset: phy_adr, value: 0x%x\n, readl(regs-phyadr));
+ printf(offset: smi, value: 0x%x\n, readl(regs-smi));
+ for (i = 0x400; i = 0x4e4; i += 4)
+ printf(offset: 0x%x, value: 0x%x\n,
+ i, readl(ARMD1_FEC_BASE + i));
+ return 0;
+}
+#endif
+
+static int armdfec_phy_timeout(u32 *reg, u32 flag, int cond)
+{
+ u32 timeout = PHY_WAIT_ITERATIONS;
+ u32 reg_val;
+
+ while (--timeout) {
+ reg_val = readl(reg);
+ if (cond (reg_val flag))
+ break;
+ else if (!cond !(reg_val flag))
+ break;
+ udelay(PHY_WAIT_MICRO_SECONDS);
+ }
+ return !timeout;
+}
+
+static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg,
+ u16 *value)
+{
+ struct eth_device *dev = eth_get_dev_by_name(devname);
+ struct armdfec_device *darmdfec = to_darmdfec(dev);
+ struct armdfec_reg *regs = darmdfec-regs;
+
[U-Boot] [PATCH] smc911x: Fix build warnings
Commit 6af1d41 smc911x MII made available was missing a few const
qualifiers. Fix the resulting in build warnings:
smc911x.c: In function 'smc911x_initialize':
smc911x.c:297: warning: passing argument 2 of 'miiphy_register' from
incompatible pointer type
smc911x.c:297: warning: passing argument 3 of 'miiphy_register' from
incompatible pointer type
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Helmut Raiger helmut.rai...@hale.at
---
drivers/net/smc911x.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 6cc236c..a677fd4 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -237,7 +237,7 @@ static int smc911x_rx(struct eth_device *dev)
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
/* wrapper for smc911x_eth_phy_read */
-static int smc911x_miiphy_read(char *devname, u8 phy, u8 reg, u16 *val)
+static int smc911x_miiphy_read(const char *devname, u8 phy, u8 reg, u16 *val)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
if (dev)
@@ -245,7 +245,7 @@ static int smc911x_miiphy_read(char *devname, u8 phy, u8
reg, u16 *val)
return -1;
}
/* wrapper for smc911x_eth_phy_write */
-static int smc911x_miiphy_write(char *devname, u8 phy, u8 reg, u16 val)
+static int smc911x_miiphy_write(const char *devname, u8 phy, u8 reg, u16 val)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
if (dev)
--
1.7.6
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Re: [U-Boot] [PATCH 1/2] net/eth.c: throw BUG for eth_get_dev_by_name(NULL)
Dear Helmut Raiger, In message 1314008237-24180-1-git-send-email-helmut.rai...@hale.at you wrote: eth_get_dev_by_name() is not safe to use for devname being NULL as it uses strcmp. This patch makes it fail with a BUG(). Signed-off-by: Helmut Raiger helmut.rai...@hale.at --- V2: use BUG_ON() instead of gracefully returning 0 net/eth.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de ...all the good computer designs are bootlegged; the formally planned products, if they are built at all, are dogs! - David E. Lundstrom, A Few Good Men From Univac, MIT Press, 1987 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/6] YAFFS2: cmd_yaffs2.c - fix build warnings
Fix these: cmd_yaffs2.c: In function 'do_ywr': cmd_yaffs2.c:69: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'ulong' cmd_yaffs2.c:69: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'ulong' Signed-off-by: Wolfgang Denk w...@denx.de --- common/cmd_yaffs2.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/common/cmd_yaffs2.c b/common/cmd_yaffs2.c index 7c01ea2..0e22d90 100644 --- a/common/cmd_yaffs2.c +++ b/common/cmd_yaffs2.c @@ -66,7 +66,7 @@ int do_ywr (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) ulong value = simple_strtoul(argv[2], NULL, 16); ulong numValues = simple_strtoul(argv[3], NULL, 16); -printf (Writing value (%x) %x times to %s... , value, numValues, filename); +printf (Writing value (%lx) %lx times to %s... , value, numValues, filename); cmd_yaffs_write_file(filename,value,numValues); -- 1.7.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/6] YAFFS2: fs/yaffs2/yaffscfg.c - fix build warnings
Fix these:
yaffscfg.c: In function 'cmd_yaffs_mread_file':
yaffscfg.c:316: warning: format '%08x' expects type 'unsigned int', but
argument 3 has type 'char *'
yaffscfg.c: In function 'cmd_yaffs_ls': yaffscfg.c:371: warning: format '%7d'
expects type 'int', but argument 3 has type 'off_t'
Signed-off-by: Wolfgang Denk w...@denx.de
---
fs/yaffs2/yaffscfg.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/fs/yaffs2/yaffscfg.c b/fs/yaffs2/yaffscfg.c
index 16e84a4..01399ea 100644
--- a/fs/yaffs2/yaffscfg.c
+++ b/fs/yaffs2/yaffscfg.c
@@ -313,7 +313,7 @@ void cmd_yaffs_mread_file(char *fn, char *addr)
yaffs_stat(fn,s);
- printf (Copy %s to 0x%08x... , fn, addr);
+ printf (Copy %s to 0x%p... , fn, addr);
h = yaffs_open(fn, O_RDWR,0);
if(h0)
{
@@ -368,7 +368,7 @@ void cmd_yaffs_ls(const char *mountpt, int longlist)
{
sprintf(tempstr, %s/%s, mountpt, de-d_name);
yaffs_stat(tempstr, stat);
- printf(%-25s\t%7d\n,de-d_name, stat.st_size);
+ printf(%-25s\t%7ld\n,de-d_name,
stat.st_size);
}
else
{
--
1.7.6
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[U-Boot] [PATCH 0/6] YAFFS2: fix build warnings
The following set of patches fixes the build warnings from the YAFFS2 code in a minimal-invasive way. No attempts are made to fix the coding style (imported from Linux), so the patches are not checkpatch clean. A more thorough clean up is probably a waste of efforts - instead, the code should be updated to a more recent version. Wolfgang Denk (6): YAFFS2: cmd_yaffs2.c - fix build warnings YAFFS2: fs/yaffs2/yaffscfg.c - fix build warnings YAFFS2: fs/yaffs2/Makefile - fix build warnings YAFFS2: fs/yaffs2/yaffs_nand.[hc] - fix build warnings YAFFS2: fs/yaffs2/yaffs_guts.c - fix build warnings YAFFS2: fs/yaffs2/yaffs_guts.c - fix build warnings common/cmd_yaffs2.c|2 +- fs/yaffs2/Makefile |2 +- fs/yaffs2/yaffs_guts.c | 25 + fs/yaffs2/yaffs_nand.c |2 +- fs/yaffs2/yaffs_nand.h |2 +- fs/yaffs2/yaffscfg.c |4 ++-- 6 files changed, 19 insertions(+), 18 deletions(-) -- 1.7.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 6/6] YAFFS2: fs/yaffs2/yaffs_guts.c - fix build warnings
Fix these:
yaffs_guts.c: In function 'yaffs_ReadDataFromFile':
yaffs_guts.c:4622: warning: pointer targets in passing argument 3 of
'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c:4622: warning: pointer targets in passing argument 4 of
'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c: In function 'yaffs_WriteDataToFile':
yaffs_guts.c:4745: warning: pointer targets in passing argument 3 of
'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c:4745: warning: pointer targets in passing argument 4 of
'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c: In function 'yaffs_ResizeFile':
yaffs_guts.c:4968: warning: pointer targets in passing argument 3 of
'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c:4968: warning: pointer targets in passing argument 4 of
'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c: In function 'yaffs_GutsInitialise':
yaffs_guts.c:7235: warning: assignment from incompatible pointer type
yaffs_guts.c: In function 'yaffs_CreateNewObject':
yaffs_guts.c:2143: warning: 'tn' may be used uninitialized in this function
yaffs_guts.c: In function 'yaffs_MknodObject':
yaffs_guts.c:2258: warning: 'str' may be used uninitialized in this function
Signed-off-by: Wolfgang Denk w...@denx.de
---
fs/yaffs2/yaffs_guts.c | 19 ++-
1 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/fs/yaffs2/yaffs_guts.c b/fs/yaffs2/yaffs_guts.c
index fc86a5c..c67a085 100644
--- a/fs/yaffs2/yaffs_guts.c
+++ b/fs/yaffs2/yaffs_guts.c
@@ -2140,7 +2140,7 @@ yaffs_Object *yaffs_CreateNewObject(yaffs_Device * dev,
int number,
{
yaffs_Object *theObject;
- yaffs_Tnode *tn;
+ yaffs_Tnode *tn = NULL;
if (number 0) {
number = yaffs_CreateNewObjectNumber(dev);
@@ -2255,7 +2255,7 @@ static yaffs_Object *yaffs_MknodObject(yaffs_ObjectType
type,
const YCHAR * aliasString, __u32 rdev)
{
yaffs_Object *in;
- YCHAR *str;
+ YCHAR *str = NULL;
yaffs_Device *dev = parent-myDev;
@@ -4605,8 +4605,8 @@ int yaffs_ReadDataFromFile(yaffs_Object * in, __u8 *
buffer, loff_t offset,
int nBytes)
{
- int chunk;
- int start;
+ __u32 chunk;
+ __u32 start;
int nToCopy;
int n = nBytes;
int nDone = 0;
@@ -4725,8 +4725,8 @@ int yaffs_WriteDataToFile(yaffs_Object * in, const __u8 *
buffer, loff_t offset,
int nBytes, int writeThrough)
{
- int chunk;
- int start;
+ __u32 chunk;
+ __u32 start;
int nToCopy;
int n = nBytes;
int nDone = 0;
@@ -4960,8 +4960,8 @@ int yaffs_ResizeFile(yaffs_Object * in, loff_t newSize)
{
int oldFileSize = in-variant.fileVariant.fileSize;
- int newSizeOfPartialChunk;
- int newFullChunks;
+ __u32 newSizeOfPartialChunk;
+ __u32 newFullChunks;
yaffs_Device *dev = in-myDev;
@@ -7232,7 +7232,8 @@ int yaffs_GutsInitialise(yaffs_Device * dev)
dev-nShortOpCaches = YAFFS_MAX_SHORT_OP_CACHES;
}
- buf = dev-srCache = YMALLOC(srCacheBytes);
+ dev-srCache = YMALLOC(srCacheBytes);
+ buf = (__u8 *)dev-srCache;
if(dev-srCache)
memset(dev-srCache,0,srCacheBytes);
--
1.7.6
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[U-Boot] [PATCH 3/6] YAFFS2: fs/yaffs2/Makefile - fix build warnings
Drop the -DNO_Y_INLINE setting to fix these: yaffs_guts.h:806: warning: 'yaffs_GetBlockInfo' defined but not used Impact on image size is negligible - for the VCMA9 board the text segment size grew from 496353 to 496357 bytes (i. e. 0.0008%); total image size even remained constant. Signed-off-by: Wolfgang Denk w...@denx.de --- fs/yaffs2/Makefile |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/fs/yaffs2/Makefile b/fs/yaffs2/Makefile index 7753cfc..6c50c81 100644 --- a/fs/yaffs2/Makefile +++ b/fs/yaffs2/Makefile @@ -31,7 +31,7 @@ SRCS:= $(COBJS-y:.o=.c) OBJS:= $(addprefix $(obj),$(COBJS-y)) # -DCONFIG_YAFFS_NO_YAFFS1 -CFLAGS +=-DCONFIG_YAFFS_DIRECT -DCONFIG_YAFFS_SHORT_NAMES_IN_RAM -DCONFIG_YAFFS_YAFFS2 -DNO_Y_INLINE -DLINUX_VERSION_CODE=0x20622 +CFLAGS +=-DCONFIG_YAFFS_DIRECT -DCONFIG_YAFFS_SHORT_NAMES_IN_RAM -DCONFIG_YAFFS_YAFFS2 -DLINUX_VERSION_CODE=0x20622 all: $(LIB) -- 1.7.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/6] YAFFS2: fs/yaffs2/yaffs_guts.c - fix build warnings
Fix these:
yaffs_guts.c: At top level:
yaffs_guts.c:400: warning: 'yaffs_SkipFullVerification' defined but not used
Testing shows no changes of the image sizes.
Signed-off-by: Wolfgang Denk w...@denx.de
---
fs/yaffs2/yaffs_guts.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/fs/yaffs2/yaffs_guts.c b/fs/yaffs2/yaffs_guts.c
index b368844..fc86a5c 100644
--- a/fs/yaffs2/yaffs_guts.c
+++ b/fs/yaffs2/yaffs_guts.c
@@ -391,17 +391,17 @@ static int yaffs_CountChunkBits(yaffs_Device * dev, int
blk)
* Verification code
*/
-static int yaffs_SkipVerification(yaffs_Device *dev)
+static Y_INLINE int yaffs_SkipVerification(yaffs_Device *dev)
{
return !(yaffs_traceMask (YAFFS_TRACE_VERIFY |
YAFFS_TRACE_VERIFY_FULL));
}
-static int yaffs_SkipFullVerification(yaffs_Device *dev)
+static Y_INLINE int yaffs_SkipFullVerification(yaffs_Device *dev)
{
return !(yaffs_traceMask (YAFFS_TRACE_VERIFY_FULL));
}
-static int yaffs_SkipNANDVerification(yaffs_Device *dev)
+static Y_INLINE int yaffs_SkipNANDVerification(yaffs_Device *dev)
{
return !(yaffs_traceMask (YAFFS_TRACE_VERIFY_NAND));
}
--
1.7.6
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[U-Boot] [PATCH 4/6] YAFFS2: fs/yaffs2/yaffs_nand.[hc] - fix build warnings
Fix these:
yaffs_guts.c: In function 'yaffs_Scan':
yaffs_guts.c:5436: warning: pointer targets in passing argument 4 of
'yaffs_QueryInitialBlockState' differ in signedness
yaffs_guts.c: In function 'yaffs_ScanBackwards':
yaffs_guts.c:6017: warning: pointer targets in passing argument 4 of
'yaffs_QueryInitialBlockState' differ in signedness
yaffs_nand.c: In function 'yaffs_QueryInitialBlockState':
yaffs_nand.c:109: warning: pointer targets in passing argument 4 of
'dev-queryNANDBlock' differ in signedness
yaffs_nand.c:113: warning: pointer targets in passing argument 4 of
'yaffs_TagsCompatabilityQueryNANDBlock' differ in signedness
Signed-off-by: Wolfgang Denk w...@denx.de
---
fs/yaffs2/yaffs_nand.c |2 +-
fs/yaffs2/yaffs_nand.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/fs/yaffs2/yaffs_nand.c b/fs/yaffs2/yaffs_nand.c
index e790be6..ce048cc 100644
--- a/fs/yaffs2/yaffs_nand.c
+++ b/fs/yaffs2/yaffs_nand.c
@@ -101,7 +101,7 @@ int yaffs_MarkBlockBad(yaffs_Device * dev, int blockNo)
int yaffs_QueryInitialBlockState(yaffs_Device * dev,
int blockNo,
yaffs_BlockState * state,
-unsigned *sequenceNumber)
+int *sequenceNumber)
{
blockNo -= dev-blockOffset;
diff --git a/fs/yaffs2/yaffs_nand.h b/fs/yaffs2/yaffs_nand.h
index 48e3f7e..f3bedcf 100644
--- a/fs/yaffs2/yaffs_nand.h
+++ b/fs/yaffs2/yaffs_nand.h
@@ -33,7 +33,7 @@ int yaffs_MarkBlockBad(yaffs_Device * dev, int blockNo);
int yaffs_QueryInitialBlockState(yaffs_Device * dev,
int blockNo,
yaffs_BlockState * state,
-unsigned *sequenceNumber);
+int *sequenceNumber);
int yaffs_EraseBlockInNAND(struct yaffs_DeviceStruct *dev,
int blockInNAND);
--
1.7.6
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Re: [U-Boot] [PATCH 0/3] omap: gpio: Use generic API (instead of custom)
Premi, Sanjeev wrote: [sp] Actually, I realized that PATCH 1 in the series depends upon: http://marc.info/?l=u-bootm=131515805732292w=2 I had mentioned 2 patches in the cover letter. Of the two, one is already included in u-boot-arm/master. This one is still not. Can you apply this patch and then try to apply this series? That did work. Compiled and tested on the dig297 board. Tested-by: Luca Ceresoli luca.ceres...@comelit.it Luca ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] mmc: omap: enable high capacity
On Sun, Sep 4, 2011 at 1:49 AM, Andy Fleming aflem...@gmail.com wrote: Isn't high-capacity capability also connected to board capabilities? Is it safe to enable this across all users of this driver? Hi, Host contoller IP supports High capacity. If High capacity card is connected to the board, then this flag is needed for card detection. This patch is tested on OMAP4430 platform. Haven't tested on omap3 but should be safe. Andy On Thu, Aug 25, 2011 at 9:46 AM, Balaji T K balaj...@ti.com wrote: Enable high capacity to host capability. Fixes eMMC detection on boot from MMC/SD card. Signed-off-by: Balaji T K balaj...@ti.com Signed-off-by: Aneesh V ane...@ti.com --- drivers/mmc/omap_hsmmc.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index ef12ecd..6627905 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -461,7 +461,8 @@ int omap_mmc_init(int dev_index) return 1; } mmc-voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - mmc-host_caps = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS; + mmc-host_caps = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS | + MMC_MODE_HC; mmc-f_min = 40; mmc-f_max = 5200; -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Bogus Warning: failed to set MAC address on Gumstix Overo
When booting master on a Gumstix Overo based system, I get the following messages during ethernet initialization: Net: smc911x-0 Warning: failed to set MAC address (Note that patch [1] is needed to move the Warning to a new line, otherwise it is after the previous line with no space) In this system, the ethernet chip is loading the MAC address from an attached eeprom, so the warning is inaccurate. I've looked at the code some, and it is not clear to me the best way to suppress this message for the case where the hardware configures its MAC address on reset. Philip [1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/107639 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Mailbox
I am happy to inform you that your draft of 800,000usd which has been under my custody has been cleared out for delivery to you and the courier company in charge is Fedex courier company(United Kingdom). Am presently away for some official dutties and i hope to stay for more than 6weeks. Kindly contact them immediately by clicking reply to so that they can let you know when delivery will be made to you.here is there contact number Tel- +447010039919(Mr Anthny moore).The tracking number will be provided to you by Fedex.You are to send your mobile details. You are requried to pay $85 USD as secuity deposite as they(Fedex) have refused to accept the amount because they dont know when you will contact them and so decided to avoid any sort of demurages.Make sure you confirm your postal address and telephone numbers to them when contacting them. All other chrages including delivey and premiun charges have been paid already by me.Thanks once more and do contact them as soon as you receive this email.Thanks form Mrs Clara. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] OMAP3: Overo: Update GPMC timing for ethernet chip.
On Wed, Sep 7, 2011 at 4:57 AM, Philip Balister phi...@balister.org wrote:
The existing timing does not quite meet the minimum requirements
in the LAN9221 datasheet. The timing in this patch solves problems
noticed on some parts.
Signed-off-by: Philip Balister phi...@opensdr.com
Acked-by: Steve Sakoman st...@sakoman.com
Tested-by: Steve Sakoman st...@sakoman.com
---
board/overo/overo.h | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/overo/overo.h b/board/overo/overo.h
index 68e1243..617c0c3 100644
--- a/board/overo/overo.h
+++ b/board/overo/overo.h
@@ -35,10 +35,10 @@ const omap3_sysinfo sysinfo = {
/* GPMC CS 5 connected to an SMSC LAN9221 ethernet controller */
#define NET_LAN9221_GPMC_CONFIG1 0x1000
-#define NET_LAN9221_GPMC_CONFIG2 0x00080701
+#define NET_LAN9221_GPMC_CONFIG2 0x00060700
#define NET_LAN9221_GPMC_CONFIG3 0x00020201
-#define NET_LAN9221_GPMC_CONFIG4 0x08030703
-#define NET_LAN9221_GPMC_CONFIG5 0x00060908
+#define NET_LAN9221_GPMC_CONFIG4 0x06000700
+#define NET_LAN9221_GPMC_CONFIG5 0x0006090A
#define NET_LAN9221_GPMC_CONFIG6 0x8703
#define NET_LAN9221_GPMC_CONFIG7 0x0f6c
--
1.7.4.4
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[U-Boot] [GIT PULL] Pull request: u-boot-imx
Hi Albert, Wolfgang has merged himself most of pending IMX patches. However, a few are missing and for the rest we agree we go on the normal way via pull request. With this pull request all IMX boards should be fixed. The following changes since commit 63cf97e825b8d821e2d3d6d6c6604634ac24810a: omap3: beagle: Fix build warning (2011-09-08 07:39:55 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master Fabio Estevam (2): MX25: tx25: Fix build by making use of GPIO framework MX25: tx25: Cleanup tx25.h config Stefano Babic (1): MX31: mx31pdk: make use of GPIO framework board/karo/tx25/tx25.c|1 + include/configs/mx31pdk.h |1 + include/configs/tx25.h| 16 3 files changed, 10 insertions(+), 8 deletions(-) Regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] OMAP3: Overo: Update GPMC timing for ethernet chip.
2011/9/8 Steve Sakoman sako...@gmail.com:
On Wed, Sep 7, 2011 at 4:57 AM, Philip Balister phi...@balister.org wrote:
The existing timing does not quite meet the minimum requirements
in the LAN9221 datasheet. The timing in this patch solves problems
noticed on some parts.
Signed-off-by: Philip Balister phi...@opensdr.com
Acked-by: Steve Sakoman st...@sakoman.com
Tested-by: Steve Sakoman st...@sakoman.com
---
board/overo/overo.h | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/overo/overo.h b/board/overo/overo.h
index 68e1243..617c0c3 100644
--- a/board/overo/overo.h
+++ b/board/overo/overo.h
@@ -35,10 +35,10 @@ const omap3_sysinfo sysinfo = {
/* GPMC CS 5 connected to an SMSC LAN9221 ethernet controller */
#define NET_LAN9221_GPMC_CONFIG1 0x1000
-#define NET_LAN9221_GPMC_CONFIG2 0x00080701
+#define NET_LAN9221_GPMC_CONFIG2 0x00060700
#define NET_LAN9221_GPMC_CONFIG3 0x00020201
-#define NET_LAN9221_GPMC_CONFIG4 0x08030703
-#define NET_LAN9221_GPMC_CONFIG5 0x00060908
+#define NET_LAN9221_GPMC_CONFIG4 0x06000700
+#define NET_LAN9221_GPMC_CONFIG5 0x0006090A
#define NET_LAN9221_GPMC_CONFIG6 0x8703
#define NET_LAN9221_GPMC_CONFIG7 0x0f6c
--
1.7.4.4
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Other boards like IGEP v2 board uses the same LAN9221 ethernet
controller, so this code is duplicated on overo.h and igep0020.h
files. Maybe could be a good idea move this part to
arch/arm/include/asm/arch-omap3/omap_gpmc.h or another file to not
duplicate the code.
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Re: [U-Boot] [PATCH] net: Add \n before warning message so it prints on a new line.
Hi Philip, Le 07/09/2011 13:57, Philip Balister a écrit : Signed-off-by: Philip Balisterphi...@opensdr.com --- net/eth.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/net/eth.c b/net/eth.c index dbd1e2d..67a8039 100644 --- a/net/eth.c +++ b/net/eth.c @@ -305,7 +305,7 @@ int eth_initialize(bd_t *bis) puts(\nWarning: eth device name has a space!\n); if (eth_write_hwaddr(dev, eth, eth_number)) - puts(Warning: failed to set MAC address\n); + puts(\nWarning: failed to set MAC address\n); I believe warning messages with \n on more than one end are frowned upon. eth_number++; dev = dev-next; Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MAKEALL: drop boards listed in boards.cfg
Pick them up automatically using $(boards_by_arch ...) Signed-off-by: Wolfgang Denk w...@denx.de --- We have a problem with the MIPS boards here: We have separate lists for mips4kc and au1xx0 (and again so for mips4kc_el and au1xx0_el), but in boards.cfg these are all listed with ARCH=mips. Is it important to make this difference? Also, we have mips5kc and mips5kc_el, but both lists are empty. Would it make sense to list these all under mips ? And how should we differentiate between LE and BE systems? Should we list LE systems with ARCH=mips_el ? Comments welcome... -wd MAKEALL | 50 -- 1 files changed, 4 insertions(+), 46 deletions(-) diff --git a/MAKEALL b/MAKEALL index 3d6b43e..4d18c11 100755 --- a/MAKEALL +++ b/MAKEALL @@ -300,66 +300,24 @@ LIST_SA=$(boards_by_cpu sa1100) ## ARM9 Systems # -LIST_ARM9=\ - a320evb \ - aspenite\ - da830evm\ - da850evm\ - edminiv2\ - guruplug\ - imx27lite \ - jadecpu \ - km_kirkwood \ - magnesium \ - mv88f6281gtw_ge \ - mx1ads \ - nhk8815 \ - nhk8815_onenand \ - omap1510inn \ +LIST_ARM9=$(boards_by_cpu arm920t)\ + $(boards_by_cpu arm926ejs) \ + $(boards_by_cpu arm925t)\ omap1610h2 \ omap1610inn \ - omap5912osk \ omap730p2 \ - openrd_base \ - openrd_client \ - openrd_ultimate \ - portl2 \ - rd6281a \ - scb9328 \ - sheevaplug \ - smdk2410\ - spear300\ - spear310\ - spear320\ - spear600\ - VCMA9 \ - versatileab \ - versatilepb \ - davinci_dvevm \ - davinci_schmoogie \ - davinci_sffsdr \ - davinci_sonata \ - davinci_dm355evm\ - davinci_dm355leopard\ - davinci_dm365evm\ - davinci_dm6467evm \ # ## ARM11 Systems # -LIST_ARM11= \ - omap2420h4 \ +LIST_ARM11=$(boards_by_cpu arm1136) \ apollon \ - imx31_litekit \ imx31_phycore \ imx31_phycore_eet \ - mx31ads \ mx31pdk \ mx31pdk_nand\ - qong\ smdk6400\ - tnetv107x_evm \ # -- 1.7.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] BeagleBoard: Added userbutton command
Hi Joel, Le 08/09/2011 16:56, Joel A Fernandes a écrit : Also, I agree with Albert: there should be no need for a separate userbutton command. Please fix and resubmit. If this patch is to be dropped, then I'm not sure why the need to resubmit? I gather the resubmit means resubmit the patch set minus this patch and renumbered accordingly. Thanks, Joel Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net: Add \n before warning message so it prints on a new line.
On 09/08/2011 11:01 AM, Albert ARIBAUD wrote: Hi Philip, Le 07/09/2011 13:57, Philip Balister a écrit : Signed-off-by: Philip Balisterphi...@opensdr.com --- net/eth.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/net/eth.c b/net/eth.c index dbd1e2d..67a8039 100644 --- a/net/eth.c +++ b/net/eth.c @@ -305,7 +305,7 @@ int eth_initialize(bd_t *bis) puts(\nWarning: eth device name has a space!\n); if (eth_write_hwaddr(dev, eth, eth_number)) - puts(Warning: failed to set MAC address\n); + puts(\nWarning: failed to set MAC address\n); I believe warning messages with \n on more than one end are frowned upon. Look closely at the patch, the warning message above has to do the same thing. Without the leading \n on the message, it prints directly after the ethernet chip name, with no space. This is not right. I chose to copy the existing code, rather than add a leading space. Philip eth_number++; dev = dev-next; Amicalement, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Bogus Warning: failed to set MAC address on Gumstix Overo
On 09/08/2011 10:40 AM, Wolfgang Denk wrote: Dear Philip Balister, In message4e68c67f.2080...@opensdr.com you wrote: When booting master on a Gumstix Overo based system, I get the following messages during ethernet initialization: Net: smc911x-0 Warning: failed to set MAC address (Note that patch [1] is needed to move the Warning to a new line, otherwise it is after the previous line with no space) In this system, the ethernet chip is loading the MAC address from an attached eeprom, so the warning is inaccurate. I've looked at the code The warning gets printed when eth_write_hwaddr() fails. What makes you claim that this is not correct? There _is_ a problem when eth_write_hwaddr() returns an error code. My point is the code shouldn't be trying to write the MAC address, when the MAC address is set in hardware. Earlier, (say 2011.6 but I am not being scientific here) u-boots did the write thing (IE not print the warning). This behavior has changed in the past few months. Philip ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] BeagleBoard: Added userbutton command
On Sep 8, 2011, at 11:03 AM, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Joel, Le 08/09/2011 16:56, Joel A Fernandes a écrit : Also, I agree with Albert: there should be no need for a separate userbutton command. Please fix and resubmit. If this patch is to be dropped, then I'm not sure why the need to resubmit? I gather the resubmit means resubmit the patch set minus this patch and renumbered accordingly. One thing that would be necessary is to replace the default bootcmd with one that uses the gpio command and to enable the gpio command. Thanks, Joel Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-ti/master
Albert, Please pull u-boot-ti/master. I checked all the patches for checkpatch errors and fixed all the warnings that i could. Some cannot be fixed. Sanjeev's patches update thr GPIO for OMAP. The GPIO on OMAP was causing issues which now seem to be fixed. Regards, Sandeep The following changes since commit 63cf97e825b8d821e2d3d6d6c6604634ac24810a: Sanjeev Premi (1): omap3: beagle: Fix build warning are available in the git repository at: git://git.denx.de/u-boot-ti.git master Aneesh V (4): omap4: factor out common part from board config headers omap4: make SDRAM init work for ES1.0 silicon omap4: IO settings omap4: fix pad configuration settings for SDP and Panda Howard D. Gray (1): ARMV7: OMAP3: Add 37xx ESx revision numbers. Jason Kridner (1): led: remove camel casing of led identifiers globally Joel A Fernandes (1): OMAP: Add function to get state of a GPIO output Michael Jones (2): ARMV7: OMAP: Write more than 1 byte at a time in i2c_write ARMV7: OMAP: I2C driver: cosmetic: make checkpatch-compatible Nagabhushana Netagunte (3): da830: modify the U-Boot prompt string da830: enable SPI flash boot mode da830: modify the MEMTEST start and end address Sandeep Paulraj (1): OMAP3 Beagle: Minor config cleanup Sanjeev Premi (3): omap: gpio: Use generic API omap: gpio: generic changes after changing API omap: gpio: Adapt board files to use generic API arch/arm/cpu/arm920t/ep93xx/led.c | 24 ++-- arch/arm/cpu/arm926ejs/at91/led.c | 12 +- arch/arm/cpu/armv7/omap-common/gpio.c | 105 ++-- arch/arm/cpu/armv7/omap3/sys_info.c | 13 ++- arch/arm/cpu/armv7/omap4/board.c| 62 +++ arch/arm/cpu/armv7/omap4/clocks.c |5 +- arch/arm/cpu/armv7/omap4/emif.c | 72 +--- arch/arm/cpu/armv7/omap4/sdram_elpida.c | 24 ++-- arch/arm/include/asm/arch-omap3/omap3.h | 10 + arch/arm/include/asm/arch-omap4/emif.h | 23 +--- arch/arm/include/asm/arch-omap4/omap4.h | 45 +- arch/arm/include/asm/omap_gpio.h| 13 -- arch/arm/lib/board.c| 32 ++-- board/atmel/at91rm9200ek/led.c | 12 +- board/cm_t35/leds.c | 10 +- board/comelit/dig297/dig297.c | 12 +- board/eukrea/cpu9260/led.c | 48 +++--- board/isee/igep0020/igep0020.c | 12 +- board/logicpd/zoom2/debug_board.c | 10 +- board/logicpd/zoom2/led.c | 66 board/logicpd/zoom2/zoom2.c | 10 +- board/overo/overo.c | 54 +++--- board/ti/beagle/beagle.c| 44 +++--- board/ti/beagle/led.c | 26 ++-- board/ti/evm/evm.c | 12 +- board/ti/panda/panda_mux_data.h | 41 ++--- board/ti/sdp4430/sdp4430_mux_data.h |9 +- common/cmd_led.c|8 +- doc/README.omap3| 20 +- drivers/i2c/omap24xx_i2c.c | 241 +--- include/configs/da830evm.h | 17 +- include/configs/omap3_beagle.h |1 - include/configs/omap4_common.h | 275 +++ include/configs/omap4_panda.h | 244 +-- include/configs/omap4_sdp4430.h | 245 +-- include/status_led.h| 32 ++-- 36 files changed, 892 insertions(+), 997 deletions(-) create mode 100644 include/configs/omap4_common.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Bogus Warning: failed to set MAC address on Gumstix Overo
Dear Philip Balister, In message 4e68da54.4000...@balister.org you wrote: My point is the code shouldn't be trying to write the MAC address, when the MAC address is set in hardware. Earlier, (say 2011.6 but I am not being scientific here) u-boots did the write thing (IE not print the warning). This behavior has changed in the past few months. Yes, we started unifying the code. Please see doc/README.drivers.eth What is the problem with running eth_write_hwaddr() on this system? _This_ should be fixed. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Pain is a thing of the mind. The mind can be controlled. -- Spock, Operation -- Annihilate! stardate 3287.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Breakage of cm4008, cm4116, cm4148 boards
Dear greg, now that w estart to build systems more systematically it turns out that the cm4008, cm4116, and cm4148 boards maintained by you are broken, for example: Configuring for cm4008 board... timer.c: In function 'timer_init': timer.c:37: error: 'TIMER_COUNT' undeclared (first use in this function) timer.c:37: error: (Each undeclared identifier is reported only once timer.c:37: error: for each function it appears in.) timer.c:38: error: 'TIMER_PULSE' undeclared (first use in this function) make[1]: *** [/work/wd/tmp-arm/arch/arm/cpu/arm920t/ks8695/timer.o] Error 1 make: *** [/work/wd/tmp-arm/arch/arm/cpu/arm920t/ks8695/libks8695.o] Error 2 make: *** Waiting for unfinished jobs board.c: In function '__dram_init_banksize': board.c:227: error: 'CONFIG_SYS_SDRAM_BASE' undeclared (first use in this function) board.c:227: error: (Each undeclared identifier is reported only once board.c:227: error: for each function it appears in.) board.c: In function 'board_init_f': board.c:270: error: 'CONFIG_SYS_INIT_SP_ADDR' undeclared (first use in this function) board.c:303: error: 'CONFIG_SYS_SDRAM_BASE' undeclared (first use in this function) make[1]: *** [/work/wd/tmp-arm/arch/arm/lib/board.o] Error 1 make[1]: *** Waiting for unfinished jobs make[1]: *** wait: No child processes. Stop. make: *** [/work/wd/tmp-arm/arch/arm/lib/libarm.o] Error 2 arm-linux-size: '/work/wd/tmp-arm/u-boot': No such file Can you please provide fixes for these boards, or should we remove them like all the other unmaitained and/or broken boards? Thanks in advance. Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Common sense and a sense of humor are the same thing, moving at different speeds. A sense of humor is just common sense, dancing. - Clive James ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Best Loan Offer
I am Sir Stephen Batt a private Loan lender and a cooperate financier for real estate and various types of business financing, we offer loans to individuals, firms and corporate bodies at 3% interest rate per annum and 3% interest rate monthly base, loan terms determinant, capital base between the amount of $5,000.00 to $50,000,000.00 US Dollars. Loan for developing businesses a competitive edge We offer the following kinds of loans Personal Loans (Secure and Unsecured) Business Loans (Secure and Unsecured) Consolidation Loan Combination Loan Low Down or Zero Money Financing Program Available Do contact us today on our Email: excelfu...@excelfunds.umail.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] BeagleBoard: Added userbutton command
On Thu, Sep 8, 2011 at 10:10 AM, Kridner, Jason j...@ti.com wrote: On Sep 8, 2011, at 11:03 AM, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Joel, Le 08/09/2011 16:56, Joel A Fernandes a écrit : Also, I agree with Albert: there should be no need for a separate userbutton command. Please fix and resubmit. If this patch is to be dropped, then I'm not sure why the need to resubmit? I gather the resubmit means resubmit the patch set minus this patch and renumbered accordingly. One thing that would be necessary is to replace the default bootcmd with one that uses the gpio command and to enable the gpio command. Sounds like a good idea, I will work on this and submit a patch soon. Thanks, Joel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-ti/master
Hi Sandeep, Le 08/09/2011 17:16, s-paul...@ti.com a écrit : Albert, Please pull u-boot-ti/master. I checked all the patches for checkpatch errors and fixed all the warnings that i could. Some cannot be fixed. Sanjeev's patches update thr GPIO for OMAP. The GPIO on OMAP was causing issues which now seem to be fixed. Regards, Sandeep The following changes since commit 63cf97e825b8d821e2d3d6d6c6604634ac24810a: Sanjeev Premi (1): omap3: beagle: Fix build warning are available in the git repository at: git://git.denx.de/u-boot-ti.git master Aneesh V (4): omap4: factor out common part from board config headers omap4: make SDRAM init work for ES1.0 silicon omap4: IO settings omap4: fix pad configuration settings for SDP and Panda Howard D. Gray (1): ARMV7: OMAP3: Add 37xx ESx revision numbers. Jason Kridner (1): led: remove camel casing of led identifiers globally Joel A Fernandes (1): OMAP: Add function to get state of a GPIO output Michael Jones (2): ARMV7: OMAP: Write more than 1 byte at a time in i2c_write ARMV7: OMAP: I2C driver: cosmetic: make checkpatch-compatible Nagabhushana Netagunte (3): da830: modify the U-Boot prompt string da830: enable SPI flash boot mode da830: modify the MEMTEST start and end address Sandeep Paulraj (1): OMAP3 Beagle: Minor config cleanup Sanjeev Premi (3): omap: gpio: Use generic API omap: gpio: generic changes after changing API omap: gpio: Adapt board files to use generic API arch/arm/cpu/arm920t/ep93xx/led.c | 24 ++-- arch/arm/cpu/arm926ejs/at91/led.c | 12 +- arch/arm/cpu/armv7/omap-common/gpio.c | 105 ++-- arch/arm/cpu/armv7/omap3/sys_info.c | 13 ++- arch/arm/cpu/armv7/omap4/board.c| 62 +++ arch/arm/cpu/armv7/omap4/clocks.c |5 +- arch/arm/cpu/armv7/omap4/emif.c | 72 +--- arch/arm/cpu/armv7/omap4/sdram_elpida.c | 24 ++-- arch/arm/include/asm/arch-omap3/omap3.h | 10 + arch/arm/include/asm/arch-omap4/emif.h | 23 +--- arch/arm/include/asm/arch-omap4/omap4.h | 45 +- arch/arm/include/asm/omap_gpio.h| 13 -- arch/arm/lib/board.c| 32 ++-- board/atmel/at91rm9200ek/led.c | 12 +- board/cm_t35/leds.c | 10 +- board/comelit/dig297/dig297.c | 12 +- board/eukrea/cpu9260/led.c | 48 +++--- board/isee/igep0020/igep0020.c | 12 +- board/logicpd/zoom2/debug_board.c | 10 +- board/logicpd/zoom2/led.c | 66 board/logicpd/zoom2/zoom2.c | 10 +- board/overo/overo.c | 54 +++--- board/ti/beagle/beagle.c| 44 +++--- board/ti/beagle/led.c | 26 ++-- board/ti/evm/evm.c | 12 +- board/ti/panda/panda_mux_data.h | 41 ++--- board/ti/sdp4430/sdp4430_mux_data.h |9 +- common/cmd_led.c|8 +- doc/README.omap3| 20 +- drivers/i2c/omap24xx_i2c.c | 241 +--- include/configs/da830evm.h | 17 +- include/configs/omap3_beagle.h |1 - include/configs/omap4_common.h | 275 +++ include/configs/omap4_panda.h | 244 +-- include/configs/omap4_sdp4430.h | 245 +-- include/status_led.h| 32 ++-- 36 files changed, 892 insertions(+), 997 deletions(-) create mode 100644 include/configs/omap4_common.h Rebasing and applying locally right now. What are these warnings that cannot be eliminated? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-ti/master
Hi Sandeep, Le 08/09/2011 17:16, s-paul...@ti.com a écrit : Albert, Please pull u-boot-ti/master. I checked all the patches for checkpatch errors and fixed all the warnings that i could. Some cannot be fixed. Sanjeev's patches update thr GPIO for OMAP. The GPIO on OMAP was causing issues which now seem to be fixed. Regards, Sandeep The following changes since commit 63cf97e825b8d821e2d3d6d6c6604634ac24810a: Sanjeev Premi (1): omap3: beagle: Fix build warning are available in the git repository at: git://git.denx.de/u-boot-ti.git master Aneesh V (4): omap4: factor out common part from board config headers omap4: make SDRAM init work for ES1.0 silicon omap4: IO settings omap4: fix pad configuration settings for SDP and Panda Howard D. Gray (1): ARMV7: OMAP3: Add 37xx ESx revision numbers. Jason Kridner (1): led: remove camel casing of led identifiers globally Joel A Fernandes (1): OMAP: Add function to get state of a GPIO output Michael Jones (2): ARMV7: OMAP: Write more than 1 byte at a time in i2c_write ARMV7: OMAP: I2C driver: cosmetic: make checkpatch-compatible Nagabhushana Netagunte (3): da830: modify the U-Boot prompt string da830: enable SPI flash boot mode da830: modify the MEMTEST start and end address Sandeep Paulraj (1): OMAP3 Beagle: Minor config cleanup Sanjeev Premi (3): omap: gpio: Use generic API omap: gpio: generic changes after changing API omap: gpio: Adapt board files to use generic API arch/arm/cpu/arm920t/ep93xx/led.c | 24 ++-- arch/arm/cpu/arm926ejs/at91/led.c | 12 +- arch/arm/cpu/armv7/omap-common/gpio.c | 105 ++-- arch/arm/cpu/armv7/omap3/sys_info.c | 13 ++- arch/arm/cpu/armv7/omap4/board.c| 62 +++ arch/arm/cpu/armv7/omap4/clocks.c |5 +- arch/arm/cpu/armv7/omap4/emif.c | 72 +--- arch/arm/cpu/armv7/omap4/sdram_elpida.c | 24 ++-- arch/arm/include/asm/arch-omap3/omap3.h | 10 + arch/arm/include/asm/arch-omap4/emif.h | 23 +--- arch/arm/include/asm/arch-omap4/omap4.h | 45 +- arch/arm/include/asm/omap_gpio.h| 13 -- arch/arm/lib/board.c| 32 ++-- board/atmel/at91rm9200ek/led.c | 12 +- board/cm_t35/leds.c | 10 +- board/comelit/dig297/dig297.c | 12 +- board/eukrea/cpu9260/led.c | 48 +++--- board/isee/igep0020/igep0020.c | 12 +- board/logicpd/zoom2/debug_board.c | 10 +- board/logicpd/zoom2/led.c | 66 board/logicpd/zoom2/zoom2.c | 10 +- board/overo/overo.c | 54 +++--- board/ti/beagle/beagle.c| 44 +++--- board/ti/beagle/led.c | 26 ++-- board/ti/evm/evm.c | 12 +- board/ti/panda/panda_mux_data.h | 41 ++--- board/ti/sdp4430/sdp4430_mux_data.h |9 +- common/cmd_led.c|8 +- doc/README.omap3| 20 +- drivers/i2c/omap24xx_i2c.c | 241 +--- include/configs/da830evm.h | 17 +- include/configs/omap3_beagle.h |1 - include/configs/omap4_common.h | 275 +++ include/configs/omap4_panda.h | 244 +-- include/configs/omap4_sdp4430.h | 245 +-- include/status_led.h| 32 ++-- 36 files changed, 892 insertions(+), 997 deletions(-) create mode 100644 include/configs/omap4_common.h Applied to u-boot-arm/master, thanks! Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net: Add \n before warning message so it prints on a new line.
Le 08/09/2011 17:04, Philip Balister a écrit : On 09/08/2011 11:01 AM, Albert ARIBAUD wrote: Hi Philip, Le 07/09/2011 13:57, Philip Balister a écrit : Signed-off-by: Philip Balisterphi...@opensdr.com --- net/eth.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/net/eth.c b/net/eth.c index dbd1e2d..67a8039 100644 --- a/net/eth.c +++ b/net/eth.c @@ -305,7 +305,7 @@ int eth_initialize(bd_t *bis) puts(\nWarning: eth device name has a space!\n); if (eth_write_hwaddr(dev, eth, eth_number)) - puts(Warning: failed to set MAC address\n); + puts(\nWarning: failed to set MAC address\n); I believe warning messages with \n on more than one end are frowned upon. Look closely at the patch, the warning message above has to do the same thing. Without the leading \n on the message, it prints directly after the ethernet chip name, with no space. This is not right. I chose to copy the existing code, rather than add a leading space. Just because original code has an error does not make it right to reproduce it. :) More seriously, heterogeneous \n placement makes it complicated to get and keep printing right -- for instance here the warning messages have a trailing \n but the code loop adds one at the end. I would prefer that the code do a first loop (while dev!= eth_devices) to try and set up ethernet devices, emitting simple warning\n messages as needed, then a second loop (for dev=0 to eth_number-1) to print a summary of the final list of eth devices found and initialized. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] mmc: omap: config VMMC, MMC1_PBIAS
Config VMMC voltage to 3V for MMC/SD card slot
and PBIAS settings needed for OMAP4
Fixes MMC/SD detection on boot from eMMC.
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/include/asm/arch-omap4/omap4.h |8 +++-
drivers/mmc/omap_hsmmc.c| 31 ---
drivers/power/twl6030.c |7 +++
include/configs/omap4_common.h |2 ++
include/configs/omap4_sdp4430.h |2 ++
include/twl6030.h |3 +++
6 files changed, 49 insertions(+), 4 deletions(-)
Index: u-boot/arch/arm/include/asm/arch-omap4/omap4.h
===
--- u-boot.orig/arch/arm/include/asm/arch-omap4/omap4.h 2011-09-07
15:25:24.0 +0530
+++ u-boot/arch/arm/include/asm/arch-omap4/omap4.h 2011-09-07
15:42:59.911624374 +0530
@@ -125,6 +125,10 @@
/* CONTROL_EFUSE_2 */
#define CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_1 0x00ffc000
+#define MMC1_PWRDNZ(1 26)
+#define MMC1_PBIASLITE_PWRDNZ (1 22)
+#define MMC1_PBIASLITE_VMODE (1 21)
+
#ifndef __ASSEMBLY__
struct s32ktimer {
@@ -141,7 +145,9 @@ struct omap4_sys_ctrl_regs {
unsigned int control_ldosram_iva_voltage_ctrl; /* 0x4A002320 */
unsigned int control_ldosram_mpu_voltage_ctrl; /* 0x4A002324 */
unsigned int control_ldosram_core_voltage_ctrl; /* 0x4A002328 */
- unsigned int pad3[260341];
+ unsigned int pad3[260277];
+ unsigned int control_pbiaslite; /* 0x4A100600 */
+ unsigned int pad4[63];
unsigned int control_efuse_1; /* 0x4A100700 */
unsigned int control_efuse_2; /* 0x4A100704 */
};
Index: u-boot/drivers/mmc/omap_hsmmc.c
===
--- u-boot.orig/drivers/mmc/omap_hsmmc.c2011-09-07 15:25:56.0
+0530
+++ u-boot/drivers/mmc/omap_hsmmc.c 2011-09-08 17:42:05.506320837 +0530
@@ -28,6 +28,7 @@
#include part.h
#include i2c.h
#include twl4030.h
+#include twl6030.h
#include asm/io.h
#include asm/arch/mmc_host_def.h
#include asm/arch/sys_proto.h
@@ -38,7 +39,27 @@
static int mmc_read_data(hsmmc_t *mmc_base, char *buf, unsigned int size);
static int mmc_write_data(hsmmc_t *mmc_base, const char *buf, unsigned int
siz);
static struct mmc hsmmc_dev[2];
-unsigned char mmc_board_init(hsmmc_t *mmc_base)
+
+#if defined(CONFIG_OMAP44XX) defined(CONFIG_TWL6030_POWER)
+static void omap4_vmmc_pbias_config(struct mmc *mmc)
+{
+ u32 value = 0;
+ struct omap4_sys_ctrl_regs *const ctrl =
+ (struct omap4_sys_ctrl_regs *)SYSCTRL_GENERAL_CORE_BASE;
+
+
+ value = readl(ctrl-control_pbiaslite);
+ value = ~(MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ);
+ writel(value, ctrl-control_pbiaslite);
+ /* set VMMC to 3V */
+ twl6030_power_mmc_init();
+ value = readl(ctrl-control_pbiaslite);
+ value |= MMC1_PBIASLITE_VMODE | MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ;
+ writel(value, ctrl-control_pbiaslite);
+}
+#endif
+
+unsigned char mmc_board_init(struct mmc *mmc)
{
#if defined(CONFIG_TWL4030_POWER)
twl4030_power_mmc_init();
@@ -67,7 +88,11 @@ unsigned char mmc_board_init(hsmmc_t *mm
prcm_base-iclken1_core);
#endif
-/* TODO add appropriate OMAP4 init - none currently necessary */
+#if defined(CONFIG_OMAP44XX) defined(CONFIG_TWL6030_POWER)
+ /* PBIAS config needed for MMC1 only */
+ if (mmc-block_dev.dev == 0)
+ omap4_vmmc_pbias_config(mmc);
+#endif
return 0;
}
@@ -108,7 +133,7 @@ static int mmc_init_setup(struct mmc *mm
unsigned int dsor;
ulong start;
- mmc_board_init(mmc_base);
+ mmc_board_init(mmc);
writel(readl(mmc_base-sysconfig) | MMC_SOFTRESET,
mmc_base-sysconfig);
Index: u-boot/drivers/power/twl6030.c
===
--- u-boot.orig/drivers/power/twl6030.c 2011-09-07 15:23:59.0 +0530
+++ u-boot/drivers/power/twl6030.c 2011-09-08 17:41:22.621998671 +0530
@@ -182,6 +182,13 @@ void twl6030_init_battery_charging(void)
return;
}
+void twl6030_power_mmc_init()
+{
+ /* set voltage to 3.0 and turnon for APP */
+ twl6030_i2c_write_u8(TWL6030_CHIP_PM, 0x15, VMMC_CFG_VOLTATE);
+ twl6030_i2c_write_u8(TWL6030_CHIP_PM, 0x21, VMMC_CFG_STATE);
+}
+
void twl6030_usb_device_settings()
{
u8 data = 0;
Index: u-boot/include/configs/omap4_sdp4430.h
===
--- u-boot.orig/include/configs/omap4_sdp4430.h 2011-09-07 15:25:24.0
+0530
+++ u-boot/include/configs/omap4_sdp4430.h 2011-09-07 15:29:29.317845163
+0530
@@ -37,7 +37,9 @@
#include configs/omap4_common.h
/* Battery
[U-Boot] [PATCH] Fix incorrect array size of phy settings for 405EX
Hello, I just noticed that on 405EX the bd_t-bi_phy* arrays have just 1 member, but should have two. So I propose this very simple patch. Best regards, Bernhard Weirich Signed-off-by: Bernhard Weirich bernhard.weir...@riedel.net --- u-boot-v2010.12-rc3-orig/arch/powerpc/include/asm/u-boot.h 2010-12-20 10:58:41.0 +0100 +++ u-boot-v2010.12-rc3/arch/powerpc/include/asm/u-boot.h 2011-09-08 18:25:57.136700984 +0200 @@ -132,7 +132,7 @@ defined(CONFIG_460EX) || defined(CONFIG_460GT) int bi_phynum[4]; /* Determines phy mapping */ int bi_phymode[4]; /* Determines phy mode */ -#elif defined(CONFIG_405EP) || defined(CONFIG_440) +#elif defined(CONFIG_405EP) || defined(CONFIG_440) || defined(CONFIG_405EX) int bi_phynum[2]; /* Determines phy mapping */ int bi_phymode[2]; /* Determines phy mode */ #else ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-ti/master
Hi Sandeep, Le 08/09/2011 17:16, s-paul...@ti.com a écrit : Albert, Please pull u-boot-ti/master. I checked all the patches for checkpatch errors and fixed all the warnings that i could. Some cannot be fixed. Sanjeev's patches update thr GPIO for OMAP. The GPIO on OMAP was causing issues which now seem to be fixed. Regards, Sandeep The following changes since commit 63cf97e825b8d821e2d3d6d6c6604634ac24810a: Sanjeev Premi (1): omap3: beagle: Fix build warning are available in the git repository at: git://git.denx.de/u-boot-ti.git master Aneesh V (4): omap4: factor out common part from board config headers omap4: make SDRAM init work for ES1.0 silicon omap4: IO settings omap4: fix pad configuration settings for SDP and Panda Howard D. Gray (1): ARMV7: OMAP3: Add 37xx ESx revision numbers. Jason Kridner (1): led: remove camel casing of led identifiers globally Joel A Fernandes (1): OMAP: Add function to get state of a GPIO output Michael Jones (2): ARMV7: OMAP: Write more than 1 byte at a time in i2c_write ARMV7: OMAP: I2C driver: cosmetic: make checkpatch-compatible Nagabhushana Netagunte (3): da830: modify the U-Boot prompt string da830: enable SPI flash boot mode da830: modify the MEMTEST start and end address Sandeep Paulraj (1): OMAP3 Beagle: Minor config cleanup Sanjeev Premi (3): omap: gpio: Use generic API omap: gpio: generic changes after changing API omap: gpio: Adapt board files to use generic API Rebasing and applying locally right now. What are these warnings that cannot be eliminated? u-boot does not have linux/gpio.h checkpatch complains about this. Regards, Sandeep ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-ti/master
Hi again Sandeep, Le 08/09/2011 18:52, Paulraj, Sandeep a écrit : What are these warnings that cannot be eliminated? u-boot does not have linux/gpio.h checkpatch complains about this. That brings us back to whether we can adapt checkpatch to our own needs. Thanks for the clarification. Regards, Sandeep Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 00/13] Add PXE support
Hi Wolfgang, On Wed, Aug 31, 2011 at 11:37:21AM -0400, Jason Hobbs wrote: This patch series adds PXE booting support to U-boot. It adds aseries of DHCP options to allow U-boot DHCP requests to be compliant with RFC 4578, and a set of commands to provide PXELINUX like behavior. Have you had a chance to review this version of the patch series? I believe this version addresses all of the comments I've received to this point. Please let me know if there are additional changes you want before these patches are pulled into mainline. Jason ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] OMAP3: Overo: Update GPMC timing for ethernet chip.
On 09/08/2011 10:45 AM, Enric Balletbò i Serra wrote:
2011/9/8 Steve Sakomansako...@gmail.com:
On Wed, Sep 7, 2011 at 4:57 AM, Philip Balisterphi...@balister.org wrote:
The existing timing does not quite meet the minimum requirements
in the LAN9221 datasheet. The timing in this patch solves problems
noticed on some parts.
Signed-off-by: Philip Balisterphi...@opensdr.com
Acked-by: Steve Sakomanst...@sakoman.com
Tested-by: Steve Sakomanst...@sakoman.com
---
board/overo/overo.h |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/overo/overo.h b/board/overo/overo.h
index 68e1243..617c0c3 100644
--- a/board/overo/overo.h
+++ b/board/overo/overo.h
@@ -35,10 +35,10 @@ const omap3_sysinfo sysinfo = {
/* GPMC CS 5 connected to an SMSC LAN9221 ethernet controller */
#define NET_LAN9221_GPMC_CONFIG10x1000
-#define NET_LAN9221_GPMC_CONFIG20x00080701
+#define NET_LAN9221_GPMC_CONFIG20x00060700
#define NET_LAN9221_GPMC_CONFIG30x00020201
-#define NET_LAN9221_GPMC_CONFIG40x08030703
-#define NET_LAN9221_GPMC_CONFIG50x00060908
+#define NET_LAN9221_GPMC_CONFIG40x06000700
+#define NET_LAN9221_GPMC_CONFIG50x0006090A
#define NET_LAN9221_GPMC_CONFIG60x8703
#define NET_LAN9221_GPMC_CONFIG70x0f6c
--
1.7.4.4
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Other boards like IGEP v2 board uses the same LAN9221 ethernet
controller, so this code is duplicated on overo.h and igep0020.h
files. Maybe could be a good idea move this part to
arch/arm/include/asm/arch-omap3/omap_gpmc.h or another file to not
duplicate the code.
Is there anyone around with an igep v2 board who could test/ack such a
patch?
Philip
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Re: [U-Boot] Setting CONFIG_SYS_TEXT_BASE when CONFIG_NAND_SPL is selected
On Mon, Sep 05, 2011 at 04:02:40PM -0300, Fabio Estevam wrote: diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config. index de2c642..b9932ec 100644 --- a/board/freescale/mx31pdk/config.mk +++ b/board/freescale/mx31pdk/config.mk @@ -1,5 +1,2 @@ -ifdef CONFIG_NAND_SPL CONFIG_SYS_TEXT_BASE = 0x87ec -else -CONFIG_SYS_TEXT_BASE = 0x87f0 -endif + ,but this causes the board not to boot. Does anyone have any ideas as to why the patch above does not work? CONFIG_SYS_TEXT_BASE_SPL should be used for the SPL address. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] OMAP3: Overo: Update GPMC timing for ethernet chip.
2011/9/8 Philip Balister phi...@opensdr.com:
On 09/08/2011 10:45 AM, Enric Balletbò i Serra wrote:
2011/9/8 Steve Sakomansako...@gmail.com:
On Wed, Sep 7, 2011 at 4:57 AM, Philip Balisterphi...@balister.org
wrote:
The existing timing does not quite meet the minimum requirements
in the LAN9221 datasheet. The timing in this patch solves problems
noticed on some parts.
Signed-off-by: Philip Balisterphi...@opensdr.com
Acked-by: Steve Sakomanst...@sakoman.com
Tested-by: Steve Sakomanst...@sakoman.com
---
board/overo/overo.h | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/overo/overo.h b/board/overo/overo.h
index 68e1243..617c0c3 100644
--- a/board/overo/overo.h
+++ b/board/overo/overo.h
@@ -35,10 +35,10 @@ const omap3_sysinfo sysinfo = {
/* GPMC CS 5 connected to an SMSC LAN9221 ethernet controller */
#define NET_LAN9221_GPMC_CONFIG1 0x1000
-#define NET_LAN9221_GPMC_CONFIG2 0x00080701
+#define NET_LAN9221_GPMC_CONFIG2 0x00060700
#define NET_LAN9221_GPMC_CONFIG3 0x00020201
-#define NET_LAN9221_GPMC_CONFIG4 0x08030703
-#define NET_LAN9221_GPMC_CONFIG5 0x00060908
+#define NET_LAN9221_GPMC_CONFIG4 0x06000700
+#define NET_LAN9221_GPMC_CONFIG5 0x0006090A
#define NET_LAN9221_GPMC_CONFIG6 0x8703
#define NET_LAN9221_GPMC_CONFIG7 0x0f6c
--
1.7.4.4
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Other boards like IGEP v2 board uses the same LAN9221 ethernet
controller, so this code is duplicated on overo.h and igep0020.h
files. Maybe could be a good idea move this part to
arch/arm/include/asm/arch-omap3/omap_gpmc.h or another file to not
duplicate the code.
Is there anyone around with an igep v2 board who could test/ack such a
patch?
Philip
Yes, I can, I expect test the patch tomorrow ...
Enric
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Re: [U-Boot] [PATCH 1/1] mmc: omap: enable high capacity
On Thu, Aug 25, 2011 at 7:46 AM, Balaji T K balaj...@ti.com wrote: Enable high capacity to host capability. Fixes eMMC detection on boot from MMC/SD card. Signed-off-by: Balaji T K balaj...@ti.com Signed-off-by: Aneesh V ane...@ti.com --- drivers/mmc/omap_hsmmc.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index ef12ecd..6627905 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -461,7 +461,8 @@ int omap_mmc_init(int dev_index) return 1; } mmc-voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - mmc-host_caps = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS; + mmc-host_caps = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS | + MMC_MODE_HC; mmc-f_min = 40; mmc-f_max = 5200; -- I tested a similar patch on a Tegra2 system, so: Acked-by: Simon Glass s...@chromium.org 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] U-Boot for AMCC Sequoia Board (PPC440EPX) fails to boot for version 2009.11-rc1 onwards
Has anyone tried the latest U-Boot on the above board lately? I am building the U-Boot image with sequoia_config option and have found it stops booting after version 2009_08. I get no text output for the versions that I have tried: 2009.11-rc1, 2009.11, 2010.03. latest (2011.06). There were a lot of 4xx changes in 2009.11-rc1 so perhaps one of those has changed how my board comes up. I am just starting to compare code files for differences in order to track it down. I am compiling with this ELDK gcc version 4.0.0 (DENX ELDK 4.1.4.0.0). I anyone has an idea why my U-Boot hangs please let me know. Thanks for any info. Doug Hayes The information contained in this electronic mail transmission may be privileged and confidential, and therefore, protected from disclosure. If you have received this communication in error, please notify us immediately by replying to this message and deleting it from your computer without copying or disclosing it. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 00/11] Support for both FEC interfaces on i.MX28
This patchset introduces support for both FEC ethernet interfaces on the i.MX28 CPU and clears most of the FIXME's the the driver. Marek Vasut (11): FEC: Use proper accessor to read register in debug call FEC: Use defined constant instead of magic number FEC: Kill mode select FIXME's FEC: Add RMII mode support FEC: Allow selection of MII mode via CONFIG_FEC_XCV_TYPE FEC: Abstract access to fec-eth in MII operations FEC: Allow multiple FECes FEC: Allow registering MII postconfiguration callback FEC: Add timeout for chip reset FEC: Squish got MAC from fuse message, make it debug() FEC: Move imx_get_mac_from_fuse() definition to fec_mxc.h arch/arm/include/asm/arch-mx25/imx-regs.h |1 - arch/arm/include/asm/arch-mx27/imx-regs.h |1 - arch/arm/include/asm/arch-mx35/imx-regs.h |2 - arch/arm/include/asm/arch-mx5/imx-regs.h |2 - drivers/net/fec_mxc.c | 170 +++-- drivers/net/fec_mxc.h |9 ++- include/netdev.h |7 +- 7 files changed, 128 insertions(+), 64 deletions(-) -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 01/11] FEC: Use proper accessor to read register in debug call
Signed-off-by: Marek Vasut marek.va...@gmail.com Cc: Ben Warren biggerbadder...@gmail.com Cc: Stefano Babic sba...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de --- drivers/net/fec_mxc.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index ab90afa..82fe1e4 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -117,7 +117,7 @@ static void fec_mii_setspeed(struct fec_priv *fec) writelimx_get_fecclk() / 100) + 2) / 5) 1, fec-eth-mii_speed); debug(fec_init: mii_speed %#lx\n, - fec-eth-mii_speed); + readl(fec-eth-mii_speed)); } static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr, uint16_t data) -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 02/11] FEC: Use defined constant instead of magic number
Signed-off-by: Marek Vasut marek.va...@gmail.com Cc: Ben Warren biggerbadder...@gmail.com Cc: Stefano Babic sba...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de --- drivers/net/fec_mxc.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 82fe1e4..8e0d30a 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -712,7 +712,7 @@ static int fec_probe(bd_t *bd) /* Reset chip. */ writel(readl(fec-eth-ecntrl) | FEC_ECNTRL_RESET, fec-eth-ecntrl); - while (readl(fec-eth-ecntrl) 1) + while (readl(fec-eth-ecntrl) FEC_ECNTRL_RESET) udelay(10); /* -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 03/11] FEC: Kill mode select FIXME's
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Ben Warren biggerbadder...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/net/fec_mxc.c | 26 ++
1 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 8e0d30a..bd76f97 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -400,6 +400,7 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
{
uint32_t base;
struct fec_priv *fec = (struct fec_priv *)dev-priv;
+ uint32_t rcntrl;
/* Initialize MAC address */
fec_set_hwaddr(dev);
@@ -442,19 +443,19 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
/*
* Set FEC-Lite receive control register(R_CNTRL):
*/
- if (fec-xcv_type == SEVENWIRE) {
- /*
-* Frame length=1518; 7-wire mode
-*/
- writel(0x05ee0020, fec-eth-r_cntrl); /* FIXME 0x05ee */
- } else {
- /*
-* Frame length=1518; MII mode;
-*/
- writel(0x05ee0024, fec-eth-r_cntrl); /* FIXME 0x05ee0004 */
+ /* Start with frame length = 1518, common for all modes. */
+ rcntrl = 1518 FEC_RCNTRL_MAX_FL_SHIFT;
+ if (fec-xcv_type == SEVENWIRE)
+ rcntrl |= FEC_RCNTRL_FCE;
+ else/* MII mode */
+ rcntrl |= FEC_RCNTRL_FCE | FEC_RCNTRL_MII_MODE;
+
+ writel(rcntrl, fec-eth-r_cntrl);
+
+ if (fec-xcv_type == MII10 || fec-xcv_type == MII100)
fec_mii_setspeed(fec);
- }
+
/*
* Set Opcode/Pause Duration Register
*/
@@ -731,7 +732,8 @@ static int fec_probe(bd_t *bd)
/*
* Frame length=1518; MII mode;
*/
- writel(0x05ee0024, fec-eth-r_cntrl); /* FIXME 0x05ee0004 */
+ writel((1518 FEC_RCNTRL_MAX_FL_SHIFT) | FEC_RCNTRL_FCE |
+ FEC_RCNTRL_MII_MODE, fec-eth-r_cntrl);
fec_mii_setspeed(fec);
sprintf(edev-name, FEC);
--
1.7.5.4
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[U-Boot] [PATCH 04/11] FEC: Add RMII mode support
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Ben Warren biggerbadder...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/net/fec_mxc.c |2 ++
drivers/net/fec_mxc.h |4 +++-
2 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index bd76f97..2b269d6 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -448,6 +448,8 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
rcntrl = 1518 FEC_RCNTRL_MAX_FL_SHIFT;
if (fec-xcv_type == SEVENWIRE)
rcntrl |= FEC_RCNTRL_FCE;
+ else if (fec-xcv_type == RMII)
+ rcntrl |= FEC_RCNTRL_RMII;
else/* MII mode */
rcntrl |= FEC_RCNTRL_FCE | FEC_RCNTRL_MII_MODE;
diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h
index 1ba5161..f16f9db 100644
--- a/drivers/net/fec_mxc.h
+++ b/drivers/net/fec_mxc.h
@@ -194,6 +194,7 @@ struct ethernet_regs {
#define FEC_RCNTRL_PROM0x0008
#define FEC_RCNTRL_BC_REJ 0x0010
#define FEC_RCNTRL_FCE 0x0020
+#define FEC_RCNTRL_RMII0x0100
#define FEC_TCNTRL_GTS 0x0001
#define FEC_TCNTRL_HBC 0x0002
@@ -257,7 +258,8 @@ struct fec_bd {
enum xceiver_type {
SEVENWIRE, /* 7-wire */
MII10, /* MII 10Mbps */
- MII100 /* MII 100Mbps */
+ MII100, /* MII 100Mbps */
+ RMII/* RMII */
};
/**
--
1.7.5.4
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[U-Boot] [PATCH 06/11] FEC: Abstract access to fec-eth in MII operations
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Ben Warren biggerbadder...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/net/fec_mxc.c | 18 ++
1 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index d75f40c..6f56a7a 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -71,6 +71,7 @@ static int fec_miiphy_read(const char *dev, uint8_t phyAddr,
uint8_t regAddr,
{
struct eth_device *edev = eth_get_dev_by_name(dev);
struct fec_priv *fec = (struct fec_priv *)edev-priv;
+ struct ethernet_regs *eth = fec-eth;
uint32_t reg; /* convenient holder for the PHY register */
uint32_t phy; /* convenient holder for the PHY */
@@ -80,18 +81,18 @@ static int fec_miiphy_read(const char *dev, uint8_t
phyAddr, uint8_t regAddr,
* reading from any PHY's register is done by properly
* programming the FEC's MII data register.
*/
- writel(FEC_IEVENT_MII, fec-eth-ievent);
+ writel(FEC_IEVENT_MII, eth-ievent);
reg = regAddr FEC_MII_DATA_RA_SHIFT;
phy = phyAddr FEC_MII_DATA_PA_SHIFT;
writel(FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA |
- phy | reg, fec-eth-mii_data);
+ phy | reg, eth-mii_data);
/*
* wait for the related interrupt
*/
start = get_timer(0);
- while (!(readl(fec-eth-ievent) FEC_IEVENT_MII)) {
+ while (!(readl(eth-ievent) FEC_IEVENT_MII)) {
if (get_timer(start) (CONFIG_SYS_HZ / 1000)) {
printf(Read MDIO failed...\n);
return -1;
@@ -101,12 +102,12 @@ static int fec_miiphy_read(const char *dev, uint8_t
phyAddr, uint8_t regAddr,
/*
* clear mii interrupt bit
*/
- writel(FEC_IEVENT_MII, fec-eth-ievent);
+ writel(FEC_IEVENT_MII, eth-ievent);
/*
* it's now safe to read the PHY's register
*/
- *retVal = readl(fec-eth-mii_data);
+ *retVal = readl(eth-mii_data);
debug(fec_miiphy_read: phy: %02x reg:%02x val:%#x\n, phyAddr,
regAddr, *retVal);
return 0;
@@ -128,6 +129,7 @@ static int fec_miiphy_write(const char *dev, uint8_t
phyAddr, uint8_t regAddr,
{
struct eth_device *edev = eth_get_dev_by_name(dev);
struct fec_priv *fec = (struct fec_priv *)edev-priv;
+ struct ethernet_regs *eth = fec-eth;
uint32_t reg; /* convenient holder for the PHY register */
uint32_t phy; /* convenient holder for the PHY */
@@ -137,13 +139,13 @@ static int fec_miiphy_write(const char *dev, uint8_t
phyAddr, uint8_t regAddr,
phy = phyAddr FEC_MII_DATA_PA_SHIFT;
writel(FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR |
- FEC_MII_DATA_TA | phy | reg | data, fec-eth-mii_data);
+ FEC_MII_DATA_TA | phy | reg | data, eth-mii_data);
/*
* wait for the MII interrupt
*/
start = get_timer(0);
- while (!(readl(fec-eth-ievent) FEC_IEVENT_MII)) {
+ while (!(readl(eth-ievent) FEC_IEVENT_MII)) {
if (get_timer(start) (CONFIG_SYS_HZ / 1000)) {
printf(Write MDIO failed...\n);
return -1;
@@ -153,7 +155,7 @@ static int fec_miiphy_write(const char *dev, uint8_t
phyAddr, uint8_t regAddr,
/*
* clear MII interrupt bit
*/
- writel(FEC_IEVENT_MII, fec-eth-ievent);
+ writel(FEC_IEVENT_MII, eth-ievent);
debug(fec_miiphy_write: phy: %02x reg:%02x val:%#x\n, phyAddr,
regAddr, data);
--
1.7.5.4
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[U-Boot] [PATCH 07/11] FEC: Allow multiple FECes
This patch allows user to register multiple FEC controllers. To preserve
compatibility with older boards, the mxcfec_register() call is still in place.
To use multiple controllers, new macro is in place, the mxcfec_register_multi(),
which takes more arguments. The syntax is:
mxcfec_register_multi(bd, FEC ID, FEC PHY ID on the MII bus, base address);
To disable the fecmxc_register() compatibility stuff, define the macro
CONFIG_FEC_MXC_MULTI. This will remove the requirement for defining IMX_FEC_BASE
and CONFIG_FEC_MXC_PHYADDR.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Ben Warren biggerbadder...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/net/fec_mxc.c | 79 ++--
drivers/net/fec_mxc.h |2 +
include/netdev.h |2 +-
3 files changed, 52 insertions(+), 31 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 6f56a7a..44b7919 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -51,18 +51,6 @@ struct nbuf {
uint8_t head[16]; /** MAC header(6 + 6 + 2) + 2(aligned) */
};
-struct fec_priv gfec = {
- .eth = (struct ethernet_regs *)IMX_FEC_BASE,
- .xcv_type = MII100,
- .rbd_base = NULL,
- .rbd_index = 0,
- .tbd_base = NULL,
- .tbd_index = 0,
- .bd= NULL,
- .rdb_ptr = NULL,
- .base_ptr = NULL,
-};
-
/*
* MII-interface related functions
*/
@@ -164,26 +152,27 @@ static int fec_miiphy_write(const char *dev, uint8_t
phyAddr, uint8_t regAddr,
static int miiphy_restart_aneg(struct eth_device *dev)
{
+ struct fec_priv *fec = (struct fec_priv *)dev-priv;
+
/*
* Wake up from sleep if necessary
* Reset PHY, then delay 300ns
*/
#ifdef CONFIG_MX27
- miiphy_write(dev-name, CONFIG_FEC_MXC_PHYADDR, MII_DCOUNTER, 0x00FF);
+ miiphy_write(dev-name, fec-phy_id, MII_DCOUNTER, 0x00FF);
#endif
- miiphy_write(dev-name, CONFIG_FEC_MXC_PHYADDR, MII_BMCR,
+ miiphy_write(dev-name, fec-phy_id, MII_BMCR,
BMCR_RESET);
udelay(1000);
/*
* Set the auto-negotiation advertisement register bits
*/
- miiphy_write(dev-name, CONFIG_FEC_MXC_PHYADDR, MII_ADVERTISE,
+ miiphy_write(dev-name, fec-phy_id, MII_ADVERTISE,
LPA_100FULL | LPA_100HALF | LPA_10FULL |
LPA_10HALF | PHY_ANLPAR_PSB_802_3);
- miiphy_write(dev-name, CONFIG_FEC_MXC_PHYADDR, MII_BMCR,
+ miiphy_write(dev-name, fec-phy_id, MII_BMCR,
BMCR_ANENABLE | BMCR_ANRESTART);
-
return 0;
}
@@ -191,6 +180,7 @@ static int miiphy_wait_aneg(struct eth_device *dev)
{
uint32_t start;
uint16_t status;
+ struct fec_priv *fec = (struct fec_priv *)dev-priv;
/*
* Wait for AN completion
@@ -202,7 +192,7 @@ static int miiphy_wait_aneg(struct eth_device *dev)
return -1;
}
- if (miiphy_read(dev-name, CONFIG_FEC_MXC_PHYADDR,
+ if (miiphy_read(dev-name, fec-phy_id,
MII_BMSR, status)) {
printf(%s: Autonegotiation failed. status: 0x%04x\n,
dev-name, status);
@@ -390,8 +380,8 @@ static int fec_open(struct eth_device *edev)
#endif
miiphy_wait_aneg(edev);
- miiphy_speed(edev-name, CONFIG_FEC_MXC_PHYADDR);
- miiphy_duplex(edev-name, CONFIG_FEC_MXC_PHYADDR);
+ miiphy_speed(edev-name, fec-phy_id);
+ miiphy_duplex(edev-name, fec-phy_id);
/*
* Enable SmartDMA receive task
@@ -406,7 +396,9 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
{
uint32_t base;
struct fec_priv *fec = (struct fec_priv *)dev-priv;
+ uint32_t mib_ptr = (uint32_t)fec-eth-rmon_t_drop;
uint32_t rcntrl;
+ int i;
/* Initialize MAC address */
fec_set_hwaddr(dev);
@@ -477,9 +469,8 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
/* clear MIB RAM */
- long *mib_ptr = (long *)(IMX_FEC_BASE + 0x200);
- while (mib_ptr = (long *)(IMX_FEC_BASE + 0x2FC))
- *mib_ptr++ = 0;
+ for (i = mib_ptr; i = mib_ptr + 0xfc; i += 4)
+ writel(0, i);
/* FIFO receive start register */
writel(0x520, fec-eth-r_fstart);
@@ -513,7 +504,7 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
*/
static void fec_halt(struct eth_device *dev)
{
- struct fec_priv *fec = gfec;
+ struct fec_priv *fec = (struct fec_priv *)dev-priv;
int counter = 0x;
/*
@@ -694,19 +685,28 @@ static int fec_recv(struct eth_device *dev)
return len;
}
-static int fec_probe(bd_t *bd)
+static int fec_probe(bd_t *bd, int dev_id, int phy_id, uint32_t
[U-Boot] [PATCH 08/11] FEC: Allow registering MII postconfiguration callback
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Ben Warren biggerbadder...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/net/fec_mxc.c | 14 +-
drivers/net/fec_mxc.h |1 +
include/netdev.h |5 +
3 files changed, 19 insertions(+), 1 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 44b7919..989e7b4 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -153,6 +153,7 @@ static int fec_miiphy_write(const char *dev, uint8_t
phyAddr, uint8_t regAddr,
static int miiphy_restart_aneg(struct eth_device *dev)
{
struct fec_priv *fec = (struct fec_priv *)dev-priv;
+ int ret = 0;
/*
* Wake up from sleep if necessary
@@ -173,7 +174,11 @@ static int miiphy_restart_aneg(struct eth_device *dev)
LPA_10HALF | PHY_ANLPAR_PSB_802_3);
miiphy_write(dev-name, fec-phy_id, MII_BMCR,
BMCR_ANENABLE | BMCR_ANRESTART);
- return 0;
+
+ if (fec-mii_postcall)
+ ret = fec-mii_postcall(fec-phy_id);
+
+ return ret;
}
static int miiphy_wait_aneg(struct eth_device *dev)
@@ -786,3 +791,10 @@ int fecmxc_initialize_multi(bd_t *bd, int dev_id, int
phy_id, uint32_t addr)
return lout;
}
+
+int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int))
+{
+ struct fec_priv *fec = (struct fec_priv *)dev-priv;
+ fec-mii_postcall = cb;
+ return 0;
+}
diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h
index e436c22..1a20388 100644
--- a/drivers/net/fec_mxc.h
+++ b/drivers/net/fec_mxc.h
@@ -277,6 +277,7 @@ struct fec_priv {
void *base_ptr;
int dev_id;
int phy_id;
+ int (*mii_postcall)(int);
};
/**
diff --git a/include/netdev.h b/include/netdev.h
index 6e70341..1e7f5c1 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -184,4 +184,9 @@ struct mv88e61xx_config {
int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
#endif /* CONFIG_MV88E61XX_SWITCH */
+/*
+ * Allow FEC to fine-tune MII configuration on boards which require this.
+ */
+int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
+
#endif /* _NETDEV_H_ */
--
1.7.5.4
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[U-Boot] [PATCH 09/11] FEC: Add timeout for chip reset
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Ben Warren biggerbadder...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/net/fec_mxc.c | 25 +
1 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 989e7b4..4518457 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -695,18 +695,22 @@ static int fec_probe(bd_t *bd, int dev_id, int phy_id,
uint32_t base_addr)
struct eth_device *edev;
struct fec_priv *fec;
unsigned char ethaddr[6];
+ uint32_t start;
+ int ret = 0;
/* create and fill edev struct */
edev = (struct eth_device *)malloc(sizeof(struct eth_device));
if (!edev) {
puts(fec_mxc: not enough malloc memory for eth_device\n);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto err1;
}
fec = (struct fec_priv *)malloc(sizeof(struct fec_priv));
if (!fec) {
puts(fec_mxc: not enough malloc memory for fec_priv\n);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto err2;
}
memset(edev, 0, sizeof(*edev));
@@ -726,8 +730,14 @@ static int fec_probe(bd_t *bd, int dev_id, int phy_id,
uint32_t base_addr)
/* Reset chip. */
writel(readl(fec-eth-ecntrl) | FEC_ECNTRL_RESET, fec-eth-ecntrl);
- while (readl(fec-eth-ecntrl) FEC_ECNTRL_RESET)
+ start = get_timer(0);
+ while (readl(fec-eth-ecntrl) FEC_ECNTRL_RESET) {
+ if (get_timer(start) (CONFIG_SYS_HZ * 5)) {
+ printf(FEC MXC: Timeout reseting chip\n);
+ goto err3;
+ }
udelay(10);
+ }
/*
* Set interrupt mask register
@@ -767,7 +777,14 @@ static int fec_probe(bd_t *bd, int dev_id, int phy_id,
uint32_t base_addr)
memcpy(edev-enetaddr, ethaddr, 6);
}
- return 0;
+ return ret;
+
+err3:
+ free(fec);
+err2:
+ free(edev);
+err1:
+ return ret;
}
#ifndefCONFIG_FEC_MXC_MULTI
--
1.7.5.4
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[U-Boot] [PATCH 10/11] FEC: Squish got MAC from fuse message, make it debug()
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Ben Warren biggerbadder...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/net/fec_mxc.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 4518457..fe0253e 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -773,7 +773,7 @@ static int fec_probe(bd_t *bd, int dev_id, int phy_id,
uint32_t base_addr)
eth_register(edev);
if (fec_get_hwaddr(edev, ethaddr) == 0) {
- printf(got MAC address from fuse: %pM\n, ethaddr);
+ debug(got MAC address from fuse: %pM\n, ethaddr);
memcpy(edev-enetaddr, ethaddr, 6);
}
--
1.7.5.4
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[U-Boot] [PATCH 11/11] FEC: Move imx_get_mac_from_fuse() definition to fec_mxc.h
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Ben Warren biggerbadder...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
arch/arm/include/asm/arch-mx25/imx-regs.h |1 -
arch/arm/include/asm/arch-mx27/imx-regs.h |1 -
arch/arm/include/asm/arch-mx35/imx-regs.h |2 --
arch/arm/include/asm/arch-mx5/imx-regs.h |2 --
drivers/net/fec_mxc.h |2 ++
5 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h
b/arch/arm/include/asm/arch-mx25/imx-regs.h
index 9e30f7c..c6efca6 100644
--- a/arch/arm/include/asm/arch-mx25/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx25/imx-regs.h
@@ -36,7 +36,6 @@
#ifndef __ASSEMBLY__
#ifdef CONFIG_FEC_MXC
extern void mx25_fec_init_pins(void);
-extern void imx_get_mac_from_fuse(unsigned char *mac);
#endif
/* Clock Control Module (CCM) registers */
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index b4b2fe6..83ab216 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -34,7 +34,6 @@ extern void mx27_uart1_init_pins(void);
#ifdef CONFIG_FEC_MXC
extern void mx27_fec_init_pins(void);
-extern void imx_get_mac_from_fuse(unsigned char *mac);
#endif /* CONFIG_FEC_MXC */
#ifdef CONFIG_MXC_MMC
diff --git a/arch/arm/include/asm/arch-mx35/imx-regs.h
b/arch/arm/include/asm/arch-mx35/imx-regs.h
index e741fb0..0c566f2 100644
--- a/arch/arm/include/asm/arch-mx35/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx35/imx-regs.h
@@ -178,8 +178,6 @@
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include asm/types.h
-extern void imx_get_mac_from_fuse(unsigned char *mac);
-
enum mxc_main_clocks {
CPU_CLK,
AHB_CLK,
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h
b/arch/arm/include/asm/arch-mx5/imx-regs.h
index a4e680b..098c300 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -282,8 +282,6 @@
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include asm/types.h
-extern void imx_get_mac_from_fuse(unsigned char *mac);
-
#define __REG(x) (*((volatile u32 *)(x)))
#define __REG16(x) (*((volatile u16 *)(x)))
#define __REG8(x) (*((volatile u8 *)(x)))
diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h
index 1a20388..8b26645 100644
--- a/drivers/net/fec_mxc.h
+++ b/drivers/net/fec_mxc.h
@@ -32,6 +32,8 @@
#ifndef __FEC_MXC_H
#define __FEC_MXC_H
+void imx_get_mac_from_fuse(unsigned char *mac);
+
/**
* Layout description of the FEC
*/
--
1.7.5.4
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[U-Boot] [PATCH 0/5] Random NAND fixes and improvements
This is a resend of the NAND fixes and improvements. These are squashed togethere here and sent as a batch. Marek Vasut (5): NAND: Really ignore bad blocks when scrubbing NAND: Add nand read.raw and write.raw commands NAND: Allow per-buffer allocation NAND: Make page, erase, oob size available via cmd_nand NAND: Add scrub.quiet command option common/cmd_nand.c| 70 +++-- drivers/mtd/nand/nand_base.c | 32 ++- drivers/mtd/nand/nand_util.c | 22 +++-- include/linux/mtd/mtd.h |1 + include/linux/mtd/nand.h |7 ++-- 5 files changed, 100 insertions(+), 32 deletions(-) -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/5] NAND: Really ignore bad blocks when scrubbing
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Scott Wood scottw...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/mtd/nand/nand_base.c |2 +-
drivers/mtd/nand/nand_util.c | 22 +-
include/linux/mtd/mtd.h |1 +
3 files changed, 7 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 1a95a91..d8d30e3 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2224,7 +2224,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct
erase_info *instr,
/*
* heck if we have a bad block, we do not erase bad blocks !
*/
- if (nand_block_checkbad(mtd, ((loff_t) page)
+ if (!instr-scrub nand_block_checkbad(mtd, ((loff_t) page)
chip-page_shift, 0, allowbbt)) {
printk(KERN_WARNING nand_erase: attempt to erase a
bad block at page 0x%08x\n, page);
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c
index 81bf366..0c3b7f7 100644
--- a/drivers/mtd/nand/nand_util.c
+++ b/drivers/mtd/nand/nand_util.c
@@ -57,12 +57,6 @@ typedef struct mtd_infomtd_info_t;
#define cpu_to_je16(x) (x)
#define cpu_to_je32(x) (x)
-/*/
-static int nand_block_bad_scrub(struct mtd_info *mtd, loff_t ofs, int getchip)
-{
- return 0;
-}
-
/**
* nand_erase_opts: - erase NAND flash with support for various options
* (jffs2 formating)
@@ -82,10 +76,10 @@ int nand_erase_opts(nand_info_t *meminfo, const
nand_erase_options_t *opts)
int bbtest = 1;
int result;
int percent_complete = -1;
- int (*nand_block_bad_old)(struct mtd_info *, loff_t, int) = NULL;
const char *mtd_device = meminfo-name;
struct mtd_oob_ops oob_opts;
struct nand_chip *chip = meminfo-priv;
+ struct nand_chip *priv_nand = meminfo-priv;
if ((opts-offset (meminfo-writesize - 1)) != 0) {
printf(Attempt to erase non page aligned data\n);
@@ -110,11 +104,9 @@ int nand_erase_opts(nand_info_t *meminfo, const
nand_erase_options_t *opts)
* and disable bad block table while erasing.
*/
if (opts-scrub) {
- struct nand_chip *priv_nand = meminfo-priv;
-
- nand_block_bad_old = priv_nand-block_bad;
- priv_nand-block_bad = nand_block_bad_scrub;
- /* we don't need the bad block table anymore...
+ erase.scrub = opts-scrub;
+ /*
+* We don't need the bad block table anymore...
* after scrub, there are no bad blocks left!
*/
if (priv_nand-bbt) {
@@ -204,12 +196,8 @@ int nand_erase_opts(nand_info_t *meminfo, const
nand_erase_options_t *opts)
if (!opts-quiet)
printf(\n);
- if (nand_block_bad_old) {
- struct nand_chip *priv_nand = meminfo-priv;
-
- priv_nand-block_bad = nand_block_bad_old;
+ if (opts-scrub)
priv_nand-scan_bbt(meminfo);
- }
return 0;
}
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index d36d584..141c960 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -55,6 +55,7 @@ struct erase_info {
u_long priv;
u_char state;
struct erase_info *next;
+ int scrub;
};
struct mtd_erase_region_info {
--
1.7.5.4
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[U-Boot] [PATCH 2/5] NAND: Add nand read.raw and write.raw commands
These commands should work around various hardware ECC and BCH methods.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Scott Wood scottw...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
common/cmd_nand.c | 14 ++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index 66e06a5..a1c8dfd 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -606,6 +606,20 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *
const argv[])
ret = nand-read_oob(nand, off, ops);
else
ret = nand-write_oob(nand, off, ops);
+ } else if (!strcmp(s, .raw)) {
+ /* Raw access */
+ mtd_oob_ops_t ops = {
+ .datbuf = (u8 *)addr,
+ .oobbuf = ((u8 *)addr) + nand-writesize,
+ .len = nand-writesize,
+ .ooblen = nand-oobsize,
+ .mode = MTD_OOB_RAW
+ };
+
+ if (read)
+ ret = nand-read_oob(nand, off, ops);
+ else
+ ret = nand-write_oob(nand, off, ops);
} else {
printf(Unknown nand command suffix '%s'.\n, s);
return 1;
--
1.7.5.4
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[U-Boot] [PATCH 3/5] NAND: Allow per-buffer allocation
Don't allocate NAND buffers as one block, but allocate them separately. This
allows systems where DMA to buffers happen to allocate these buffers properly
aligned.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Scott Wood scottw...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/mtd/nand/nand_base.c | 30 +++---
include/linux/mtd/nand.h |7 ---
2 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index d8d30e3..3093067 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2749,13 +2749,27 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
*/
int nand_scan_tail(struct mtd_info *mtd)
{
- int i;
+ int i, bufsize;
+ uint8_t *buf;
struct nand_chip *chip = mtd-priv;
- if (!(chip-options NAND_OWN_BUFFERS))
- chip-buffers = kmalloc(sizeof(*chip-buffers), GFP_KERNEL);
- if (!chip-buffers)
- return -ENOMEM;
+ if (!(chip-options NAND_OWN_BUFFERS)) {
+ chip-buffers = malloc(sizeof(struct nand_buffers));
+ if (!chip-buffers)
+ return -ENOMEM;
+
+ bufsize = NAND_MAX_PAGESIZE + (3 * NAND_MAX_OOBSIZE);
+ buf = malloc(bufsize);
+ if (!buf) {
+ free(chip-buffers);
+ return -ENOMEM;
+ }
+
+ chip-buffers-buffer = buf;
+ chip-buffers-ecccalc = buf;
+ chip-buffers-ecccode = buf + NAND_MAX_OOBSIZE;
+ chip-buffers-databuf = buf + (2 * NAND_MAX_OOBSIZE);
+ }
/* Set the internal oob buffer location, just after the page data */
chip-oob_poi = chip-buffers-databuf + mtd-writesize;
@@ -2996,6 +3010,8 @@ void nand_release(struct mtd_info *mtd)
/* Free bad block table memory */
kfree(chip-bbt);
- if (!(chip-options NAND_OWN_BUFFERS))
- kfree(chip-buffers);
+ if (!(chip-options NAND_OWN_BUFFERS)) {
+ free(chip-buffers-buffer);
+ free(chip-buffers);
+ }
}
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 987a2ec..c3449a9 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -370,9 +370,10 @@ struct nand_ecc_ctrl {
* consecutive order.
*/
struct nand_buffers {
- uint8_t ecccalc[NAND_MAX_OOBSIZE];
- uint8_t ecccode[NAND_MAX_OOBSIZE];
- uint8_t databuf[NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE];
+ uint8_t *buffer;
+ uint8_t *ecccalc;
+ uint8_t *ecccode;
+ uint8_t *databuf;
};
/**
--
1.7.5.4
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[U-Boot] [PATCH 4/5] NAND: Make page, erase, oob size available via cmd_nand
The nand info and nand device now set shell/environment variables:
nand_writesize ... nand page size
nand_oobsize . nand oob area size
nand_erasesize ... nand erase block size
The shell variables are only set if HUSH is enabled.
Also, the nand info command now displays this info.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Scott Wood scottw...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
common/cmd_nand.c | 42 +++---
1 files changed, 39 insertions(+), 3 deletions(-)
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index a1c8dfd..5b7e83d 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -27,6 +27,9 @@
#include asm/byteorder.h
#include jffs2/jffs2.h
#include nand.h
+#ifdef CONFIG_SYS_HUSH_PARSER
+#include hush.h
+#endif
#if defined(CONFIG_CMD_MTDPARTS)
@@ -362,15 +365,48 @@ usage:
#endif
-static void nand_print_info(int idx)
+static void nand_print_and_set_info(int idx)
{
nand_info_t *nand = nand_info[idx];
struct nand_chip *chip = nand-priv;
+ const int bufsz = 32;
+ char buf[bufsz];
+
printf(Device %d: , idx);
if (chip-numchips 1)
printf(%dx , chip-numchips);
printf(%s, sector size %u KiB\n,
nand-name, nand-erasesize 10);
+ printf( Page size %8d b\n, nand-writesize);
+ printf( OOB size %8d b\n, nand-oobsize);
+ printf( Erase size %8d b\n, nand-erasesize);
+
+ /* Set geometry info */
+#ifdef CONFIG_SYS_HUSH_PARSER
+ memset(buf, 0, bufsz);
+ sprintf(buf, nand_writesize=%x, nand-writesize);
+ set_local_var(buf, 0);
+
+ memset(buf, 0, bufsz);
+ sprintf(buf, nand_oobsize=%x, nand-oobsize);
+ set_local_var(buf, 0);
+
+ memset(buf, 0, bufsz);
+ sprintf(buf, nand_erasesize=%x, nand-erasesize);
+ set_local_var(buf, 0);
+#else
+ memset(buf, 0, bufsz);
+ sprintf(buf, %x, nand-writesize);
+ setenv(nand_writesize, buf);
+
+ memset(buf, 0, bufsz);
+ sprintf(buf, %x, nand-oobsize);
+ setenv(nand_oobsize, buf);
+
+ memset(buf, 0, bufsz);
+ sprintf(buf, %x, nand-erasesize);
+ setenv(nand_erasesize, buf);
+#endif
}
int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
@@ -407,7 +443,7 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *
const argv[])
putc('\n');
for (i = 0; i CONFIG_SYS_MAX_NAND_DEVICE; i++) {
if (nand_info[i].name)
- nand_print_info(i);
+ nand_print_and_set_info(i);
}
return 0;
}
@@ -418,7 +454,7 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *
const argv[])
if (dev 0 || dev = CONFIG_SYS_MAX_NAND_DEVICE)
puts(no devices available\n);
else
- nand_print_info(dev);
+ nand_print_and_set_info(dev);
return 0;
}
--
1.7.5.4
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[U-Boot] [PATCH 5/5] NAND: Add scrub.quiet command option
This allows the scrub command to scrub without asking the user if he really
wants to scrub the area. Useful in scripts.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Scott Wood scottw...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
common/cmd_nand.c | 14 +-
1 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index 5b7e83d..45179e9 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -502,11 +502,19 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *
const argv[])
int clean = argc 2 !strcmp(clean, argv[2]);
int o = clean ? 3 : 2;
int scrub = !strncmp(cmd, scrub, 5);
+ int scrub_quiet = !strncmp(cmd, scrub.quiet, 11);
int part = 0;
int chip = 0;
int spread = 0;
int args = 2;
+ /*
+* Quiet scrub is a special option only for the scrub command,
+* ignore it in the following construction.
+*/
+ if (scrub_quiet)
+ cmd[5] = 0;
+
if (cmd[5] != 0) {
if (!strcmp(cmd[5], .spread)) {
spread = 1;
@@ -543,7 +551,7 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *
const argv[])
opts.quiet = quiet;
opts.spread = spread;
- if (scrub) {
+ if (scrub !scrub_quiet) {
puts(Warning:
scrub option will erase all factory set
bad blocks!\n
@@ -569,6 +577,10 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *
const argv[])
return -1;
}
}
+
+ if (scrub_quiet)
+ opts.scrub = 1;
+
ret = nand_erase_opts(nand, opts);
printf(%s\n, ret ? ERROR : OK);
--
1.7.5.4
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[U-Boot] [PATCH 00/31] Support for the DENX M28 SoM
This series adds support for DENX M28 SoM and M28EVK kit. This series depends on previous series: * Support for both FEC interfaces on i.MX28 * Random NAND fixes and improvements Marek Vasut (31): iMX28: Initial support for iMX28 CPU iMX28: Add basic support for DENX M28EVK board iMX28: Add support for SSP MMC M28EVK: Enable MMC support iMX28: Add pinctrl and ocotp register definitions FEC: Add support for iMX28 quirks iMX28: Add CPU-specific FEC ethernet init M28EVK: Enable FEC0 and FEC1 iMX28: Add PINMUX control iMX28: Add RTC register definitions iMX28: Add I2C register definitions iMX28: Add I2C bus driver M28: Enable I2C, EEPROM and RTC iMX28: Add MMC SPL M28: Enable MMC SPL iMX28: Add GPIO control M28: Enable use of GPIO configurators iMX28: Add SPI driver M28EVK: Enable SPI and SPI flash iMX28: Add APBH DMA driver iMX28: Add BCH and GPMI register definitions iMX28: Add GPMI NAND driver M28: Enable NAND iMX28: Add driver for internal RTC M28: Enable the internal RTC instead of the M41T62 M28: Enable UBI and UBIFS M28: Save environment in NAND iMX28: Add image header generator tool M28: Add NAND update scripts i.MX28: Add u-boot.sb target to Makefile M28: Add doc/README.m28 documentation MAINTAINERS |1 + Makefile |5 + arch/arm/cpu/arm926ejs/mx28/Makefile | 46 + arch/arm/cpu/arm926ejs/mx28/clock.c | 359 +++ arch/arm/cpu/arm926ejs/mx28/gpio.c| 108 +++ arch/arm/cpu/arm926ejs/mx28/iomux.c | 111 +++ arch/arm/cpu/arm926ejs/mx28/mx28.c| 172 arch/arm/cpu/arm926ejs/mx28/timer.c | 143 +++ arch/arm/include/asm/arch-mx28/clock.h| 48 + arch/arm/include/asm/arch-mx28/dma.h | 170 arch/arm/include/asm/arch-mx28/gpio.h | 32 + arch/arm/include/asm/arch-mx28/imx-regs.h | 33 + arch/arm/include/asm/arch-mx28/iomux-mx28.h | 537 +++ arch/arm/include/asm/arch-mx28/iomux.h| 168 arch/arm/include/asm/arch-mx28/mx28.h | 32 + arch/arm/include/asm/arch-mx28/regs-apbh.h| 462 + arch/arm/include/asm/arch-mx28/regs-base.h| 88 ++ arch/arm/include/asm/arch-mx28/regs-bch.h | 226 + arch/arm/include/asm/arch-mx28/regs-clkctrl.h | 308 ++ arch/arm/include/asm/arch-mx28/regs-common.h | 66 ++ arch/arm/include/asm/arch-mx28/regs-gpmi.h| 218 + arch/arm/include/asm/arch-mx28/regs-i2c.h | 203 arch/arm/include/asm/arch-mx28/regs-ocotp.h | 169 arch/arm/include/asm/arch-mx28/regs-pinctrl.h | 1280 + arch/arm/include/asm/arch-mx28/regs-power.h | 409 arch/arm/include/asm/arch-mx28/regs-rtc.h | 143 +++ arch/arm/include/asm/arch-mx28/regs-ssp.h | 345 +++ arch/arm/include/asm/arch-mx28/regs-timrot.h | 167 arch/arm/include/asm/arch-mx28/regs-uartdbg.h | 182 board/denx/m28evk/Makefile| 49 + board/denx/m28evk/m28evk.c| 200 boards.cfg|1 + doc/README.m28| 223 + drivers/dma/Makefile |1 + drivers/dma/apbh_dma.c| 693 + drivers/i2c/Makefile |1 + drivers/i2c/mxs_i2c.c | 243 + drivers/mmc/Makefile |1 + drivers/mmc/mxsmmc.c | 354 +++ drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/mxs_nand.c | 1163 ++ drivers/net/fec_mxc.c | 44 +- drivers/rtc/Makefile |1 + drivers/rtc/mxsrtc.c | 88 ++ drivers/spi/Makefile |1 + drivers/spi/mxs_spi.c | 174 include/configs/m28evk.h | 276 ++ mmc_spl/board/denx/m28evk/Makefile| 102 ++ mmc_spl/board/denx/m28evk/m28_init.h | 36 + mmc_spl/board/denx/m28evk/mem_init.c | 218 + mmc_spl/board/denx/m28evk/mmc_boot.c | 271 ++ mmc_spl/board/denx/m28evk/power_init.c| 915 ++ mmc_spl/board/denx/m28evk/start.S | 402 mmc_spl/board/denx/m28evk/u-boot.bd | 14 + mmc_spl/board/denx/m28evk/u-boot.lds | 87 ++ tools/Makefile|6 + tools/mxsboot.c | 687 + 57 files changed, 12481 insertions(+), 2 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/mx28/Makefile create mode 100644 arch/arm/cpu/arm926ejs/mx28/clock.c create mode 100644 arch/arm/cpu/arm926ejs/mx28/gpio.c create mode 100644 arch/arm/cpu/arm926ejs/mx28/iomux.c create mode 100644
[U-Boot] [PATCH 03/31] iMX28: Add support for SSP MMC
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
arch/arm/include/asm/arch-mx28/mx28.h |2 +
drivers/mmc/Makefile |1 +
drivers/mmc/mxsmmc.c | 354 +
3 files changed, 357 insertions(+), 0 deletions(-)
create mode 100644 drivers/mmc/mxsmmc.c
diff --git a/arch/arm/include/asm/arch-mx28/mx28.h
b/arch/arm/include/asm/arch-mx28/mx28.h
index a262c05..a226ea4 100644
--- a/arch/arm/include/asm/arch-mx28/mx28.h
+++ b/arch/arm/include/asm/arch-mx28/mx28.h
@@ -27,4 +27,6 @@ int mx28_reset_block(struct mx28_register *reg);
int mx28_wait_mask_set(struct mx28_register *reg, uint32_t mask, int timeout);
int mx28_wait_mask_clr(struct mx28_register *reg, uint32_t mask, int timeout);
+int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int));
+
#endif /* __MX28_H__ */
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 6e94860..550d289 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -36,6 +36,7 @@ COBJS-$(CONFIG_MMC_SPI) += mmc_spi.o
COBJS-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
COBJS-$(CONFIG_MV_SDHCI) += mv_sdhci.o
COBJS-$(CONFIG_MXC_MMC) += mxcmmc.o
+COBJS-$(CONFIG_MXS_MMC) += mxsmmc.o
COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o
COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
new file mode 100644
index 000..79f793f
--- /dev/null
+++ b/drivers/mmc/mxsmmc.c
@@ -0,0 +1,354 @@
+/*
+ * Freescale i.MX28 SSP MMC driver
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * Based on code from LTIB:
+ * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
+ * Terry Lv
+ *
+ * Copyright 2007, Freescale Semiconductor, Inc
+ * Andy Fleming
+ *
+ * Based vaguely on the pxa mmc code:
+ * (C) Copyright 2003
+ * Kyle Harris, Nexus Technologies, Inc. khar...@nexus-tech.net
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include common.h
+#include malloc.h
+#include mmc.h
+#include asm/errno.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/regs-common.h
+#include asm/arch/regs-base.h
+#include asm/arch/regs-clkctrl.h
+#include asm/arch/regs-ssp.h
+#include asm/arch/mx28.h
+
+struct mxsmmc_priv {
+ int id;
+ struct mx28_ssp_regs*regs;
+ uint32_tclkseq_bypass;
+ uint32_t*clkctrl_ssp;
+ uint32_tbuswidth;
+ int (*mmc_is_wp)(int);
+};
+
+#defineMXSMMC_MAX_TIMEOUT 1
+
+/*
+ * Sends a command out on the bus. Takes the mmc pointer,
+ * a command pointer, and an optional data pointer.
+ */
+static int
+mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
+{
+ struct mxsmmc_priv *priv = (struct mxsmmc_priv *)mmc-priv;
+ struct mx28_ssp_regs *ssp_regs = priv-regs;
+ uint32_t reg;
+ int timeout;
+ uint32_t data_count;
+ uint32_t *data_ptr;
+ uint32_t ctrl0;
+
+ debug(MMC%d: CMD%d\n, mmc-block_dev.dev, cmd-cmdidx);
+
+ /* Check bus busy */
+ timeout = MXSMMC_MAX_TIMEOUT;
+ while (--timeout) {
+ udelay(1000);
+ reg = readl(ssp_regs-hw_ssp_status);
+ if (!(reg
+ (SSP_STATUS_BUSY | SSP_STATUS_DATA_BUSY |
+ SSP_STATUS_CMD_BUSY))) {
+ break;
+ }
+ }
+
+ if (!timeout) {
+ printf(MMC%d: Bus busy timeout!\n, mmc-block_dev.dev);
+ return TIMEOUT;
+ }
+
+ /* See if card is present */
+ if (readl(ssp_regs-hw_ssp_status) SSP_STATUS_CARD_DETECT) {
+ printf(MMC%d: No card detected!\n, mmc-block_dev.dev);
+ return NO_CARD_ERR;
+ }
+
+ /* Start building CTRL0 contents */
+ ctrl0 = priv-buswidth;
+
+ /* Set up command */
+ if (!(cmd-resp_type MMC_RSP_CRC))
+ ctrl0 |= SSP_CTRL0_IGNORE_CRC;
+ if (cmd-resp_type
[U-Boot] [PATCH 04/31] M28EVK: Enable MMC support
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
board/denx/m28evk/m28evk.c | 22 ++
include/configs/m28evk.h | 14 ++
2 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/board/denx/m28evk/m28evk.c b/board/denx/m28evk/m28evk.c
index 5f4f787..d3e6173 100644
--- a/board/denx/m28evk/m28evk.c
+++ b/board/denx/m28evk/m28evk.c
@@ -28,6 +28,8 @@
#include asm/arch/regs-common.h
#include asm/arch/regs-base.h
#include asm/arch/regs-clkctrl.h
+#include asm/arch/iomux-mx28.h
+#include asm/arch/gpio.h
#include asm/arch/clock.h
#include asm/arch/mx28.h
@@ -67,3 +69,23 @@ int dram_init(void)
gd-ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
return 0;
}
+
+#ifdef CONFIG_CMD_MMC
+static int m28_mmc_wp(int id)
+{
+ if (id != 0) {
+ printf(MXS MMC: Invalid card selected (card id = %d)\n, id);
+ return 1;
+ }
+
+ return mxs_gpio_get(MX28_PAD_AUART2_CTS__GPIO_3_10);
+}
+
+int board_mmc_init(bd_t *bis)
+{
+ /* Configure WP as output */
+ mxs_gpio_direction(MX28_PAD_AUART2_CTS__GPIO_3_10, 0);
+
+ return mxsmmc_initialize(bis, 0, m28_mmc_wp);
+}
+#endif
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index 4f41e26..1b4db7b 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -41,7 +41,12 @@
*/
#include config_cmd_default.h
#defineCONFIG_DISPLAY_CPUINFO
+#defineCONFIG_DOS_PARTITION
+
#defineCONFIG_CMD_CACHE
+#defineCONFIG_CMD_EXT2
+#defineCONFIG_CMD_FAT
+#defineCONFIG_CMD_MMC
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
@@ -92,6 +97,15 @@
#defineCONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600,
115200 }
/*
+ * MMC Driver
+ */
+#ifdef CONFIG_CMD_MMC
+#defineCONFIG_MMC
+#defineCONFIG_GENERIC_MMC
+#defineCONFIG_MXS_MMC
+#endif
+
+/*
* Boot Linux
*/
#defineCONFIG_CMDLINE_TAG
--
1.7.5.4
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[U-Boot] [PATCH 02/31] iMX28: Add basic support for DENX M28EVK board
This contains support for booting the board and output via DUART.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
MAINTAINERS|1 +
board/denx/m28evk/Makefile | 49
board/denx/m28evk/m28evk.c | 69
boards.cfg |1 +
include/configs/m28evk.h | 108
5 files changed, 228 insertions(+), 0 deletions(-)
create mode 100644 board/denx/m28evk/Makefile
create mode 100644 board/denx/m28evk/m28evk.c
create mode 100644 include/configs/m28evk.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 2f60a60..61a55a8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -847,6 +847,7 @@ Marek Vasut marek.va...@gmail.com
palmtc xscale/pxa
vpac270 xscale/pxa
zipitz2 xscale/pxa
+ m28evk i.MX28
efikamx i.MX51
Hugo Villeneuve hugo.villene...@lyrtech.com
diff --git a/board/denx/m28evk/Makefile b/board/denx/m28evk/Makefile
new file mode 100644
index 000..4037199
--- /dev/null
+++ b/board/denx/m28evk/Makefile
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := m28evk.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+clean:
+ rm -f $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/denx/m28evk/m28evk.c b/board/denx/m28evk/m28evk.c
new file mode 100644
index 000..5f4f787
--- /dev/null
+++ b/board/denx/m28evk/m28evk.c
@@ -0,0 +1,69 @@
+/*
+ * DENX M28 module
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/regs-common.h
+#include asm/arch/regs-base.h
+#include asm/arch/regs-clkctrl.h
+#include asm/arch/clock.h
+#include asm/arch/mx28.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Functions
+ */
+int board_early_init_f(void)
+{
+ /* IO0 clock at 480MHz */
+ mx28_set_ioclk(0, 48);
+ /* IO1 clock at 480MHz */
+ mx28_set_ioclk(1, 48);
+
+ /* SSP0 clock at 96MHz */
+ mx28_set_sspclk(0, 96000, 0);
+ /* SSP2 clock at 96MHz */
+ mx28_set_sspclk(2, 96000, 0);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* Will change it for MX28 EVK later */
+ gd-bd-bi_arch_number = CONFIG_M28_MACHID;
+ /* Adress of boot parameters */
+ gd-bd-bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ /* dram_init must store complete ramsize in gd-ram_size */
+ gd-ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
+ return 0;
+}
diff --git a/boards.cfg b/boards.cfg
index 8a5bfc1..c5d8a90 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -147,6 +147,7 @@ jadecpu arm
[U-Boot] [PATCH 06/31] FEC: Add support for iMX28 quirks
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Ben Warren biggerbadder...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/net/fec_mxc.c | 44 ++--
1 files changed, 42 insertions(+), 2 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index fe0253e..e21b6b5 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -42,6 +42,14 @@ DECLARE_GLOBAL_DATA_PTR;
#defineCONFIG_FEC_XCV_TYPE MII100
#endif
+/*
+ * The i.MX28 operates with packets in big endian. We need to swap them before
+ * sending and after receiving.
+ */
+#ifdef CONFIG_MX28
+#defineCONFIG_FEC_MXC_SWAP_PACKET
+#endif
+
#undef DEBUG
struct nbuf {
@@ -51,6 +59,32 @@ struct nbuf {
uint8_t head[16]; /** MAC header(6 + 6 + 2) + 2(aligned) */
};
+#ifdef CONFIG_FEC_MXC_SWAP_PACKET
+static void swap_packet(uint32_t *packet, int length)
+{
+ int i;
+
+ for (i = 0; i DIV_ROUND_UP(length, 4); i++)
+ packet[i] = __swab32(packet[i]);
+}
+#endif
+
+/*
+ * The i.MX28 has two ethernet interfaces, but they are not equal.
+ * Only the first one can access the MDIO bus.
+ */
+#ifdef CONFIG_MX28
+static inline struct ethernet_regs *fec_miiphy_fec_to_eth(struct fec_priv *fec)
+{
+ return (struct ethernet_regs *)MXS_ENET0_BASE;
+}
+#else
+static inline struct ethernet_regs *fec_miiphy_fec_to_eth(struct fec_priv *fec)
+{
+ return fec-eth;
+}
+#endif
+
/*
* MII-interface related functions
*/
@@ -59,7 +93,7 @@ static int fec_miiphy_read(const char *dev, uint8_t phyAddr,
uint8_t regAddr,
{
struct eth_device *edev = eth_get_dev_by_name(dev);
struct fec_priv *fec = (struct fec_priv *)edev-priv;
- struct ethernet_regs *eth = fec-eth;
+ struct ethernet_regs *eth = fec_miiphy_fec_to_eth(fec);
uint32_t reg; /* convenient holder for the PHY register */
uint32_t phy; /* convenient holder for the PHY */
@@ -117,7 +151,7 @@ static int fec_miiphy_write(const char *dev, uint8_t
phyAddr, uint8_t regAddr,
{
struct eth_device *edev = eth_get_dev_by_name(dev);
struct fec_priv *fec = (struct fec_priv *)edev-priv;
- struct ethernet_regs *eth = fec-eth;
+ struct ethernet_regs *eth = fec_miiphy_fec_to_eth(fec);
uint32_t reg; /* convenient holder for the PHY register */
uint32_t phy; /* convenient holder for the PHY */
@@ -572,6 +606,9 @@ static int fec_send(struct eth_device *dev, volatile void*
packet, int length)
* Note: We are always using the first buffer for transmission,
* the second will be empty and only used to stop the DMA engine
*/
+#ifdef CONFIG_FEC_MXC_SWAP_PACKET
+ swap_packet((uint32_t *)packet, length);
+#endif
writew(length, fec-tbd_base[fec-tbd_index].data_length);
writel((uint32_t)packet, fec-tbd_base[fec-tbd_index].data_pointer);
/*
@@ -668,6 +705,9 @@ static int fec_recv(struct eth_device *dev)
/*
* Fill the buffer and pass it to upper layers
*/
+#ifdef CONFIG_FEC_MXC_SWAP_PACKET
+ swap_packet((uint32_t *)frame-data, frame_length);
+#endif
memcpy(buff, frame-data, frame_length);
NetReceive(buff, frame_length);
len = frame_length;
--
1.7.5.4
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[U-Boot] [PATCH 07/31] iMX28: Add CPU-specific FEC ethernet init
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Ben Warren biggerbadder...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/mx28.c | 31 +++
1 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index e3df76b..dca54d2 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -129,3 +129,34 @@ int print_cpuinfo(void)
return 0;
}
#endif
+
+/*
+ * Initializes on-chip ethernet controllers.
+ */
+#ifdef CONFIG_CMD_NET
+int cpu_eth_init(bd_t *bis)
+{
+ struct mx28_clkctrl_regs *clkctrl_regs =
+ (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+
+ /* Turn on ENET clocks */
+ clrbits_le32(clkctrl_regs-hw_clkctrl_enet,
+ CLKCTRL_ENET_SLEEP | CLKCTRL_ENET_DISABLE);
+
+ /* Set up ENET PLL for 50 MHz */
+ /* Power on ENET PLL */
+ writel(CLKCTRL_PLL2CTRL0_POWER,
+ clkctrl_regs-hw_clkctrl_pll2ctrl0_set);
+
+ udelay(10);
+
+ /* Gate on ENET PLL */
+ writel(CLKCTRL_PLL2CTRL0_CLKGATE,
+ clkctrl_regs-hw_clkctrl_pll2ctrl0_clr);
+
+ /* Enable pad output */
+ setbits_le32(clkctrl_regs-hw_clkctrl_enet, CLKCTRL_ENET_CLK_OUT_EN);
+
+ return 0;
+}
+#endif
--
1.7.5.4
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 08/31] M28EVK: Enable FEC0 and FEC1
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Ben Warren biggerbadder...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
board/denx/m28evk/m28evk.c | 109
include/configs/m28evk.h | 22 +++--
2 files changed, 127 insertions(+), 4 deletions(-)
diff --git a/board/denx/m28evk/m28evk.c b/board/denx/m28evk/m28evk.c
index d3e6173..fea0227 100644
--- a/board/denx/m28evk/m28evk.c
+++ b/board/denx/m28evk/m28evk.c
@@ -28,10 +28,15 @@
#include asm/arch/regs-common.h
#include asm/arch/regs-base.h
#include asm/arch/regs-clkctrl.h
+#include asm/arch/regs-ocotp.h
#include asm/arch/iomux-mx28.h
#include asm/arch/gpio.h
#include asm/arch/clock.h
#include asm/arch/mx28.h
+#include linux/mii.h
+#include miiphy.h
+#include netdev.h
+#include errno.h
DECLARE_GLOBAL_DATA_PTR;
@@ -89,3 +94,107 @@ int board_mmc_init(bd_t *bis)
return mxsmmc_initialize(bis, 0, m28_mmc_wp);
}
#endif
+
+#ifdef CONFIG_CMD_NET
+
+#defineMII_OPMODE_STRAP_OVERRIDE 0x16
+#defineMII_PHY_CTRL1 0x1e
+#defineMII_PHY_CTRL2 0x1f
+
+int fecmxc_mii_postcall(int phy)
+{
+ miiphy_write(FEC1, phy, MII_BMCR, 0x9000);
+ miiphy_write(FEC1, phy, MII_OPMODE_STRAP_OVERRIDE, 0x0202);
+ if (phy == 3)
+ miiphy_write(FEC1, 3, MII_PHY_CTRL2, 0x8180);
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ struct mx28_clkctrl_regs *clkctrl_regs =
+ (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct eth_device *dev;
+ int ret;
+
+ ret = cpu_eth_init(bis);
+
+ clrsetbits_le32(clkctrl_regs-hw_clkctrl_enet,
+ CLKCTRL_ENET_TIME_SEL_MASK | CLKCTRL_ENET_CLK_OUT_EN,
+ CLKCTRL_ENET_TIME_SEL_RMII_CLK);
+
+ ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
+ if (ret) {
+ printf(FEC MXS: Unable to init FEC0\n);
+ return ret;
+ }
+
+ ret = fecmxc_initialize_multi(bis, 1, 3, MXS_ENET1_BASE);
+ if (ret) {
+ printf(FEC MXS: Unable to init FEC1\n);
+ return ret;
+ }
+
+ dev = eth_get_dev_by_name(FEC0);
+ if (!dev) {
+ printf(FEC MXS: Unable to get FEC0 device entry\n);
+ return -EINVAL;
+ }
+
+ ret = fecmxc_register_mii_postcall(dev, fecmxc_mii_postcall);
+ if (ret) {
+ printf(FEC MXS: Unable to register FEC0 mii postcall\n);
+ return ret;
+ }
+
+ dev = eth_get_dev_by_name(FEC1);
+ if (!dev) {
+ printf(FEC MXS: Unable to get FEC1 device entry\n);
+ return -EINVAL;
+ }
+
+ ret = fecmxc_register_mii_postcall(dev, fecmxc_mii_postcall);
+ if (ret) {
+ printf(FEC MXS: Unable to register FEC1 mii postcall\n);
+ return ret;
+ }
+
+ return ret;
+}
+
+#ifdef CONFIG_M28_FEC_MAC_IN_OCOTP
+
+#defineMXS_OCOTP_MAX_TIMEOUT 100
+void imx_get_mac_from_fuse(char *mac)
+{
+ struct mx28_ocotp_regs *ocotp_regs =
+ (struct mx28_ocotp_regs *)MXS_OCOTP_BASE;
+ uint32_t data;
+
+ memset(mac, 0, 6);
+
+ writel(OCOTP_CTRL_RD_BANK_OPEN, ocotp_regs-hw_ocotp_ctrl_set);
+
+ if (mx28_wait_mask_clr(ocotp_regs-hw_ocotp_ctrl_reg, OCOTP_CTRL_BUSY,
+ MXS_OCOTP_MAX_TIMEOUT)) {
+ printf(MXS FEC: Can't get MAC from OCOTP\n);
+ return;
+ }
+
+ data = readl(ocotp_regs-hw_ocotp_cust0);
+
+ mac[0] = 0x00;
+ mac[1] = 0x04;
+ mac[2] = (data 24) 0xff;
+ mac[3] = (data 16) 0xff;
+ mac[4] = (data 8) 0xff;
+ mac[5] = data 0xff;
+}
+#else
+void imx_get_mac_from_fuse(char *mac)
+{
+ memset(mac, 0, 6);
+}
+#endif
+
+#endif
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index 1b4db7b..9e0d705 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -44,13 +44,14 @@
#defineCONFIG_DOS_PARTITION
#defineCONFIG_CMD_CACHE
+#defineCONFIG_CMD_DHCP
#defineCONFIG_CMD_EXT2
#defineCONFIG_CMD_FAT
+#defineCONFIG_CMD_MII
#defineCONFIG_CMD_MMC
-#undef CONFIG_CMD_DHCP
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_PING
+#defineCONFIG_CMD_NET
+#defineCONFIG_CMD_NFS
+#defineCONFIG_CMD_PING
#defineCONFIG_CMD_SETEXPR
/*
@@ -106,6 +107,19 @@
#endif
/*
+ * Ethernet on SOC (FEC)
+ */
+#ifdef CONFIG_CMD_NET
+#defineCONFIG_NET_MULTI
+#defineCONFIG_ETHPRIME FEC0
+#defineCONFIG_FEC_MXC
+#defineCONFIG_FEC_MXC_MULTI
+#defineCONFIG_MII
+#defineCONFIG_DISCOVER_PHY
+#defineCONFIG_FEC_XCV_TYPE RMII
+#endif
+
+/*
* Boot Linux
*/
#defineCONFIG_CMDLINE_TAG
--
[U-Boot] [PATCH 10/31] iMX28: Add RTC register definitions
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
arch/arm/include/asm/arch-mx28/regs-rtc.h | 143 +
1 files changed, 143 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx28/regs-rtc.h
diff --git a/arch/arm/include/asm/arch-mx28/regs-rtc.h
b/arch/arm/include/asm/arch-mx28/regs-rtc.h
new file mode 100644
index 000..412f32d
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx28/regs-rtc.h
@@ -0,0 +1,143 @@
+/*
+ * Freescale i.MX28 RTC Register Definitions
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __REGS_RTC_H__
+#define __REGS_RTC_H__
+
+struct mx28_rtc_regs {
+ mx28_reg(hw_rtc_ctrl)
+ mx28_reg(hw_rtc_stat)
+ mx28_reg(hw_rtc_milliseconds)
+ mx28_reg(hw_rtc_seconds)
+ mx28_reg(hw_rtc_rtc_alarm)
+ mx28_reg(hw_rtc_watchdog)
+ mx28_reg(hw_rtc_persistent0)
+ mx28_reg(hw_rtc_persistent1)
+ mx28_reg(hw_rtc_persistent2)
+ mx28_reg(hw_rtc_persistent3)
+ mx28_reg(hw_rtc_persistent4)
+ mx28_reg(hw_rtc_persistent5)
+ mx28_reg(hw_rtc_debug)
+ mx28_reg(hw_rtc_version)
+};
+
+#defineRTC_CTRL_SFTRST (1 31)
+#defineRTC_CTRL_CLKGATE(1 30)
+#defineRTC_CTRL_SUPPRESS_COPY2ANALOG (1 6)
+#defineRTC_CTRL_FORCE_UPDATE (1 5)
+#defineRTC_CTRL_WATCHDOGEN (1 4)
+#defineRTC_CTRL_ONEMSEC_IRQ(1 3)
+#defineRTC_CTRL_ALARM_IRQ (1 2)
+#defineRTC_CTRL_ONEMSEC_IRQ_EN (1 1)
+#defineRTC_CTRL_ALARM_IRQ_EN (1 0)
+
+#defineRTC_STAT_RTC_PRESENT(1 31)
+#defineRTC_STAT_ALARM_PRESENT (1 30)
+#defineRTC_STAT_WATCHDOG_PRESENT (1 29)
+#defineRTC_STAT_XTAL32000_PRESENT (1 28)
+#defineRTC_STAT_XTAL32768_PRESENT (1 27)
+#defineRTC_STAT_STALE_REGS_MASK(0xff 16)
+#defineRTC_STAT_STALE_REGS_OFFSET 16
+#defineRTC_STAT_NEW_REGS_MASK (0xff 8)
+#defineRTC_STAT_NEW_REGS_OFFSET8
+
+#defineRTC_MILLISECONDS_COUNT_MASK 0x
+#defineRTC_MILLISECONDS_COUNT_OFFSET 0
+
+#defineRTC_SECONDS_COUNT_MASK 0x
+#defineRTC_SECONDS_COUNT_OFFSET0
+
+#defineRTC_ALARM_VALUE_MASK0x
+#defineRTC_ALARM_VALUE_OFFSET 0
+
+#defineRTC_WATCHDOG_COUNT_MASK 0x
+#defineRTC_WATCHDOG_COUNT_OFFSET 0
+
+#defineRTC_PERSISTENT0_ADJ_POSLIMITBUCK_MASK (0xf 28)
+#defineRTC_PERSISTENT0_ADJ_POSLIMITBUCK_OFFSET 28
+#defineRTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V83 (0x0 28)
+#defineRTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V78 (0x1 28)
+#defineRTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V73 (0x2 28)
+#defineRTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V68 (0x3 28)
+#defineRTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V62 (0x4 28)
+#defineRTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V57 (0x5 28)
+#defineRTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V52 (0x6 28)
+#defineRTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V48 (0x7 28)
+#defineRTC_PERSISTENT0_EXTERNAL_RESET (1 21)
+#defineRTC_PERSISTENT0_THERMAL_RESET (1 20)
+#defineRTC_PERSISTENT0_ENABLE_LRADC_PWRUP (1 18)
+#defineRTC_PERSISTENT0_AUTO_RESTART(1 17)
+#defineRTC_PERSISTENT0_DISABLE_PSWITCH (1 16)
+#defineRTC_PERSISTENT0_LOWERBIAS_MASK (0xf 14)
+#defineRTC_PERSISTENT0_LOWERBIAS_OFFSET14
+#defineRTC_PERSISTENT0_LOWERBIAS_NOMINAL (0x0 14)
+#defineRTC_PERSISTENT0_LOWERBIAS_M25P (0x1 14)
+#defineRTC_PERSISTENT0_LOWERBIAS_M50P (0x3 14)
+#define
[U-Boot] [PATCH 09/31] iMX28: Add PINMUX control
Taken from Linux kernel with minor modifications:
commit bf985969e27b507f734435a99df8bf745a3dbb2b
Author: Shawn Guo shawn@freescale.com
Date: Mon Dec 20 22:57:43 2010 +0800
ARM: mxs: Add iomux support
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/Makefile|2 +-
arch/arm/cpu/arm926ejs/mx28/iomux.c | 111 ++
arch/arm/include/asm/arch-mx28/iomux-mx28.h | 537 +++
arch/arm/include/asm/arch-mx28/iomux.h | 168 +
4 files changed, 817 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/mx28/iomux.c
create mode 100644 arch/arm/include/asm/arch-mx28/iomux-mx28.h
create mode 100644 arch/arm/include/asm/arch-mx28/iomux.h
diff --git a/arch/arm/cpu/arm926ejs/mx28/Makefile
b/arch/arm/cpu/arm926ejs/mx28/Makefile
index 98504f9..7845310 100644
--- a/arch/arm/cpu/arm926ejs/mx28/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx28/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-COBJS = clock.o mx28.o timer.o
+COBJS = clock.o mx28.o iomux.o timer.o
SRCS := $(START:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/arch/arm/cpu/arm926ejs/mx28/iomux.c
b/arch/arm/cpu/arm926ejs/mx28/iomux.c
new file mode 100644
index 000..b086a9e
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mx28/iomux.c
@@ -0,0 +1,111 @@
+/*
+ * Copyright 2004-2006,2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2008 by Sascha Hauer ker...@pengutronix.de
+ * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
+ * armli...@phytec.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#include common.h
+#include asm/errno.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/regs-common.h
+#include asm/arch/regs-base.h
+#include asm/arch/regs-clkctrl.h
+#include asm/arch/iomux.h
+
+#ifdefined(CONFIG_MX23)
+#defineDRIVE_OFFSET0x200
+#definePULL_OFFSET 0x400
+#elif defined(CONFIG_MX28)
+#defineDRIVE_OFFSET0x300
+#definePULL_OFFSET 0x600
+#else
+#error Please select CONFIG_MX23 or CONFIG_MX28
+#endif
+
+/*
+ * configures a single pad in the iomuxer
+ */
+int mxs_iomux_setup_pad(iomux_cfg_t pad)
+{
+ u32 reg, ofs, bp, bm;
+ void *iomux_base = (void *)MXS_PINCTRL_BASE;
+ struct mx28_register *mxs_reg;
+
+ /* muxsel */
+ ofs = 0x100;
+ ofs += PAD_BANK(pad) * 0x20 + PAD_PIN(pad) / 16 * 0x10;
+ bp = PAD_PIN(pad) % 16 * 2;
+ bm = 0x3 bp;
+ reg = readl(iomux_base + ofs);
+ reg = ~bm;
+ reg |= PAD_MUXSEL(pad) bp;
+ writel(reg, iomux_base + ofs);
+
+ /* drive */
+ ofs = DRIVE_OFFSET;
+ ofs += PAD_BANK(pad) * 0x40 + PAD_PIN(pad) / 8 * 0x10;
+ /* mA */
+ if (PAD_MA_VALID(pad)) {
+ bp = PAD_PIN(pad) % 8 * 4;
+ bm = 0x3 bp;
+ reg = readl(iomux_base + ofs);
+ reg = ~bm;
+ reg |= PAD_MA(pad) bp;
+ writel(reg, iomux_base + ofs);
+ }
+ /* vol */
+ if (PAD_VOL_VALID(pad)) {
+ bp = PAD_PIN(pad) % 8 * 4 + 2;
+ mxs_reg = (struct mx28_register *)(iomux_base + ofs);
+ if (PAD_VOL(pad))
+ writel(1 bp, mxs_reg-reg_set);
+ else
+ writel(1 bp, mxs_reg-reg_clr);
+ }
+
+ /* pull */
+ if (PAD_PULL_VALID(pad)) {
+ ofs = PULL_OFFSET;
+ ofs += PAD_BANK(pad) * 0x10;
+ bp = PAD_PIN(pad);
+ mxs_reg = (struct mx28_register *)(iomux_base + ofs);
+ if (PAD_PULL(pad))
+ writel(1 bp, mxs_reg-reg_set);
+ else
+ writel(1 bp, mxs_reg-reg_clr);
+ }
+
+ return 0;
+}
+
+int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned count)
+{
+ const iomux_cfg_t *p = pad_list;
+ int i;
+ int ret;
+
+ for (i = 0; i count; i++) {
+ ret = mxs_iomux_setup_pad(*p);
+ if (ret)
+ return
[U-Boot] [PATCH 11/31] iMX28: Add I2C register definitions
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
arch/arm/include/asm/arch-mx28/regs-i2c.h | 203 +
1 files changed, 203 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx28/regs-i2c.h
diff --git a/arch/arm/include/asm/arch-mx28/regs-i2c.h
b/arch/arm/include/asm/arch-mx28/regs-i2c.h
new file mode 100644
index 000..1bb20c3
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx28/regs-i2c.h
@@ -0,0 +1,203 @@
+/*
+ * Freescale i.MX28 I2C Register Definitions
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __REGS_I2C_H__
+#define __REGS_I2C_H__
+
+struct mx28_i2c_regs {
+ mx28_reg(hw_i2c_ctrl0)
+ mx28_reg(hw_i2c_timing0)
+ mx28_reg(hw_i2c_timing1)
+ mx28_reg(hw_i2c_timing2)
+ mx28_reg(hw_i2c_ctrl1)
+ mx28_reg(hw_i2c_stat)
+ mx28_reg(hw_i2c_queuectrl)
+ mx28_reg(hw_i2c_queuestat)
+ mx28_reg(hw_i2c_queuecmd)
+ mx28_reg(hw_i2c_queuedata)
+ mx28_reg(hw_i2c_data)
+ mx28_reg(hw_i2c_debug0)
+ mx28_reg(hw_i2c_debug1)
+ mx28_reg(hw_i2c_version)
+};
+
+#defineI2C_CTRL_SFTRST (1 31)
+#defineI2C_CTRL_CLKGATE(1 30)
+#defineI2C_CTRL_RUN(1 29)
+#defineI2C_CTRL_PREACK (1 27)
+#defineI2C_CTRL_ACKNOWLEDGE(1 26)
+#defineI2C_CTRL_SEND_NAK_ON_LAST (1 25)
+#defineI2C_CTRL_MULTI_MASTER (1 23)
+#defineI2C_CTRL_CLOCK_HELD (1 22)
+#defineI2C_CTRL_RETAIN_CLOCK (1 21)
+#defineI2C_CTRL_POST_SEND_STOP (1 20)
+#defineI2C_CTRL_PRE_SEND_START (1 19)
+#defineI2C_CTRL_SLAVE_ADDRESS_ENABLE (1 18)
+#defineI2C_CTRL_MASTER_MODE(1 17)
+#defineI2C_CTRL_DIRECTION (1 16)
+#defineI2C_CTRL_XFER_COUNT_MASK0x
+#defineI2C_CTRL_XFER_COUNT_OFFSET 0
+
+#defineI2C_TIMING0_HIGH_COUNT_MASK (0x3ff 16)
+#defineI2C_TIMING0_HIGH_COUNT_OFFSET 16
+#defineI2C_TIMING0_RCV_COUNT_MASK 0x3ff
+#defineI2C_TIMING0_RCV_COUNT_OFFSET0
+
+#defineI2C_TIMING1_LOW_COUNT_MASK (0x3ff 16)
+#defineI2C_TIMING1_LOW_COUNT_OFFSET16
+#defineI2C_TIMING1_XMIT_COUNT_MASK 0x3ff
+#defineI2C_TIMING1_XMIT_COUNT_OFFSET 0
+
+#defineI2C_TIMING2_BUS_FREE_MASK (0x3ff 16)
+#defineI2C_TIMING2_BUS_FREE_OFFSET 16
+#defineI2C_TIMING2_LEADIN_COUNT_MASK 0x3ff
+#defineI2C_TIMING2_LEADIN_COUNT_OFFSET 0
+
+#defineI2C_CTRL1_RD_QUEUE_IRQ (1 30)
+#defineI2C_CTRL1_WR_QUEUE_IRQ (1 29)
+#defineI2C_CTRL1_CLR_GOT_A_NAK (1 28)
+#defineI2C_CTRL1_ACK_MODE (1 27)
+#defineI2C_CTRL1_FORCE_DATA_IDLE (1 26)
+#defineI2C_CTRL1_FORCE_CLK_IDLE(1 25)
+#defineI2C_CTRL1_BCAST_SLAVE_EN(1 24)
+#defineI2C_CTRL1_SLAVE_ADDRESS_BYTE_MASK (0xff 16)
+#defineI2C_CTRL1_SLAVE_ADDRESS_BYTE_OFFSET 16
+#defineI2C_CTRL1_BUS_FREE_IRQ_EN (1 15)
+#defineI2C_CTRL1_DATA_ENGINE_CMPLT_IRQ_EN (1 14)
+#defineI2C_CTRL1_NO_SLAVE_ACK_IRQ_EN (1 13)
+#defineI2C_CTRL1_OVERSIZE_XFER_TERM_IRQ_EN (1 12)
+#defineI2C_CTRL1_EARLY_TERM_IRQ_EN (1 11)
+#defineI2C_CTRL1_MASTER_LOSS_IRQ_EN(1 10)
+#defineI2C_CTRL1_SLAVE_STOP_IRQ_EN (1 9)
+#defineI2C_CTRL1_SLAVE_IRQ_EN (1 8)
+#defineI2C_CTRL1_BUS_FREE_IRQ (1 7)
+#defineI2C_CTRL1_DATA_ENGINE_CMPLT_IRQ (1 6)
+#define
[U-Boot] [PATCH 12/31] iMX28: Add I2C bus driver
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Heiko Schocher h...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/i2c/Makefile |1 +
drivers/i2c/mxs_i2c.c | 243 +
2 files changed, 244 insertions(+), 0 deletions(-)
create mode 100644 drivers/i2c/mxs_i2c.c
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index a48047a..2fb521e 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_FSL_I2C) += fsl_i2c.o
COBJS-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
COBJS-$(CONFIG_I2C_MV) += mv_i2c.o
COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
+COBJS-$(CONFIG_I2C_MXS) += mxs_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c
new file mode 100644
index 000..cae50b1
--- /dev/null
+++ b/drivers/i2c/mxs_i2c.c
@@ -0,0 +1,243 @@
+/*
+ * Freescale i.MX28 I2C Driver
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include malloc.h
+#include asm/errno.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/regs-common.h
+#include asm/arch/regs-base.h
+#include asm/arch/regs-i2c.h
+#include asm/arch/mx28.h
+
+#defineMXS_I2C_MAX_TIMEOUT 100
+
+void mxs_i2c_reset(void)
+{
+ struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ int ret;
+
+ ret = mx28_reset_block(i2c_regs-hw_i2c_ctrl0_reg);
+ if (ret) {
+ debug(MXS I2C: Block reset timeout\n);
+ return;
+ }
+
+ writel(I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | I2C_CTRL1_NO_SLAVE_ACK_IRQ |
+ I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ |
+ I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ,
+ i2c_regs-hw_i2c_ctrl1_clr);
+
+ writel(I2C_QUEUECTRL_PIO_QUEUE_MODE, i2c_regs-hw_i2c_queuectrl_set);
+}
+
+void mxs_i2c_setup_read(uint8_t chip, int len)
+{
+ struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+
+ writel(I2C_QUEUECMD_RETAIN_CLOCK | I2C_QUEUECMD_PRE_SEND_START |
+ I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
+ (1 I2C_QUEUECMD_XFER_COUNT_OFFSET),
+ i2c_regs-hw_i2c_queuecmd);
+
+ writel((chip 1) | 1, i2c_regs-hw_i2c_data);
+
+ writel(I2C_QUEUECMD_SEND_NAK_ON_LAST | I2C_QUEUECMD_MASTER_MODE |
+ (len I2C_QUEUECMD_XFER_COUNT_OFFSET) |
+ I2C_QUEUECMD_POST_SEND_STOP, i2c_regs-hw_i2c_queuecmd);
+
+ writel(I2C_QUEUECTRL_QUEUE_RUN, i2c_regs-hw_i2c_queuectrl_set);
+}
+
+void mxs_i2c_write(uchar chip, uint addr, int alen,
+ uchar *buf, int blen, int stop)
+{
+ struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ uint32_t data;
+ int i, remain, off;
+
+ if ((alen 4) || (alen == 0)) {
+ debug(MXS I2C: Invalid address length\n);
+ return;
+ }
+
+ if (stop)
+ stop = I2C_QUEUECMD_POST_SEND_STOP;
+
+ writel(I2C_QUEUECMD_PRE_SEND_START |
+ I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
+ ((blen + alen + 1) I2C_QUEUECMD_XFER_COUNT_OFFSET) | stop,
+ i2c_regs-hw_i2c_queuecmd);
+
+ data = (chip 1) 24;
+
+ for (i = 0; i alen; i++) {
+ data = 8;
+ data |= ((char *)addr)[i] 24;
+ if ((i 3) == 2)
+ writel(data, i2c_regs-hw_i2c_data);
+ }
+
+ off = i;
+ for (; i off + blen; i++) {
+ data = 8;
+ data |= buf[i - off] 24;
+ if ((i 3) == 2)
+ writel(data, i2c_regs-hw_i2c_data);
+ }
+
+ remain = 24 - ((i 3) * 8);
+ if (remain)
+ writel(data remain, i2c_regs-hw_i2c_data);
+
+ writel(I2C_QUEUECTRL_QUEUE_RUN, i2c_regs-hw_i2c_queuectrl_set);
+}
+
+int mxs_i2c_wait_for_ack(void)
+{
+ struct mx28_i2c_regs *i2c_regs
[U-Boot] [PATCH 13/31] M28: Enable I2C, EEPROM and RTC
Signed-off-by: Marek Vasut marek.va...@gmail.com Cc: Heiko Schocher h...@denx.de Cc: Stefano Babic sba...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de --- include/configs/m28evk.h | 29 + 1 files changed, 29 insertions(+), 0 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 9e0d705..7e664fc 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -44,9 +44,12 @@ #defineCONFIG_DOS_PARTITION #defineCONFIG_CMD_CACHE +#defineCONFIG_CMD_DATE #defineCONFIG_CMD_DHCP +#defineCONFIG_CMD_EEPROM #defineCONFIG_CMD_EXT2 #defineCONFIG_CMD_FAT +#defineCONFIG_CMD_I2C #defineCONFIG_CMD_MII #defineCONFIG_CMD_MMC #defineCONFIG_CMD_NET @@ -120,6 +123,32 @@ #endif /* + * I2C + */ +#ifdef CONFIG_CMD_I2C +#defineCONFIG_I2C_MXS +#defineCONFIG_HARD_I2C +#defineCONFIG_SYS_I2C_SPEED40 +#endif + +/* + * EEPROM + */ +#ifdef CONFIG_CMD_EEPROM +#defineCONFIG_SYS_I2C_MULTI_EEPROMS +#defineCONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#endif + +/* + * RTC + */ +#ifdef CONFIG_CMD_DATE +#defineCONFIG_RTC_M41T62 +#defineCONFIG_SYS_I2C_RTC_ADDR 0x68 +#defineCONFIG_SYS_M41T11_BASE_YEAR 2000 +#endif + +/* * Boot Linux */ #defineCONFIG_CMDLINE_TAG -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 15/31] M28: Enable MMC SPL
Signed-off-by: Marek Vasut marek.va...@gmail.com Cc: Andy Fleming aflem...@gmail.com Cc: Stefano Babic sba...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de --- include/configs/m28evk.h | 11 +-- 1 files changed, 9 insertions(+), 2 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 7e664fc..edacf3d 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -69,8 +69,14 @@ #defineCONFIG_SYS_MEMTEST_START0x4000 /* Memtest start adr */ #defineCONFIG_SYS_MEMTEST_END 0x4040 /* 4 MB RAM test */ #defineCONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#defineCONFIG_SYS_INIT_SP_ADDR 0x18000 -#defineCONFIG_SYS_TEXT_BASE0x4000 +/* Point initial SP in SRAM so SPL can use it too. */ +#defineCONFIG_SYS_INIT_SP_ADDR 0x2000 +/* + * We need to sacrifice first 4 bytes of RAM here to avoid triggering some + * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot + * binary. In case there was more of this mess, 0x100 bytes are skipped. + */ +#defineCONFIG_SYS_TEXT_BASE0x4100 /* * U-Boot general configurations @@ -107,6 +113,7 @@ #defineCONFIG_MMC #defineCONFIG_GENERIC_MMC #defineCONFIG_MXS_MMC +#defineCONFIG_MMC_U_BOOT #endif /* -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 16/31] iMX28: Add GPIO control
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
arch/arm/cpu/arm926ejs/mx28/Makefile |2 +-
arch/arm/cpu/arm926ejs/mx28/gpio.c| 108 +
arch/arm/cpu/arm926ejs/mx28/mx28.c| 10 +++
arch/arm/include/asm/arch-mx28/gpio.h | 32 ++
4 files changed, 151 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/mx28/gpio.c
create mode 100644 arch/arm/include/asm/arch-mx28/gpio.h
diff --git a/arch/arm/cpu/arm926ejs/mx28/Makefile
b/arch/arm/cpu/arm926ejs/mx28/Makefile
index 7845310..e3f0a12 100644
--- a/arch/arm/cpu/arm926ejs/mx28/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx28/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-COBJS = clock.o mx28.o iomux.o timer.o
+COBJS = clock.o mx28.o gpio.o iomux.o timer.o
SRCS := $(START:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/arch/arm/cpu/arm926ejs/mx28/gpio.c
b/arch/arm/cpu/arm926ejs/mx28/gpio.c
new file mode 100644
index 000..00d2cca
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mx28/gpio.c
@@ -0,0 +1,108 @@
+/*
+ * Freescale i.MX28 GPIO control code
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include netdev.h
+#include asm/errno.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/regs-common.h
+#include asm/arch/regs-base.h
+#include asm/arch/iomux.h
+
+#ifdefined(CONFIG_MX23)
+#definePINCTRL_BANKS 3
+#definePINCTRL_DOUT(n) (0x0500 + ((n) * 0x10))
+#definePINCTRL_DIN(n) (0x0600 + ((n) * 0x10))
+#definePINCTRL_DOE(n) (0x0700 + ((n) * 0x10))
+#definePINCTRL_PIN2IRQ(n) (0x0800 + ((n) * 0x10))
+#definePINCTRL_IRQEN(n)(0x0900 + ((n) * 0x10))
+#definePINCTRL_IRQSTAT(n) (0x0c00 + ((n) * 0x10))
+#elif defined(CONFIG_MX28)
+#definePINCTRL_BANKS 5
+#definePINCTRL_DOUT(n) (0x0700 + ((n) * 0x10))
+#definePINCTRL_DIN(n) (0x0900 + ((n) * 0x10))
+#definePINCTRL_DOE(n) (0x0b00 + ((n) * 0x10))
+#definePINCTRL_PIN2IRQ(n) (0x1000 + ((n) * 0x10))
+#definePINCTRL_IRQEN(n)(0x1100 + ((n) * 0x10))
+#definePINCTRL_IRQSTAT(n) (0x1400 + ((n) * 0x10))
+#else
+#error Please select CONFIG_MX23 or CONFIG_MX28
+#endif
+
+#define GPIO_INT_FALL_EDGE 0x0
+#define GPIO_INT_LOW_LEV 0x1
+#define GPIO_INT_RISE_EDGE 0x2
+#define GPIO_INT_HIGH_LEV 0x3
+#define GPIO_INT_LEV_MASK (1 0)
+#define GPIO_INT_POL_MASK (1 1)
+
+void mxs_gpio_direction(iomux_cfg_t pad, int output)
+{
+ uint32_t bank = PAD_BANK(pad);
+ uint32_t offset = PINCTRL_DOE(bank);
+ struct mx28_register *reg =
+ (struct mx28_register *)(MXS_PINCTRL_BASE + offset);
+
+ if (output)
+ writel(1 PAD_PIN(pad), reg-reg_set);
+ else
+ writel(1 PAD_PIN(pad), reg-reg_clr);
+}
+
+int mxs_gpio_get(iomux_cfg_t pad)
+{
+ uint32_t bank = PAD_BANK(pad);
+ uint32_t offset = PINCTRL_DIN(bank);
+ struct mx28_register *reg =
+ (struct mx28_register *)(MXS_PINCTRL_BASE + offset);
+
+ return (readl(reg-reg) PAD_PIN(pad)) 1;
+}
+
+void mxs_gpio_set(iomux_cfg_t pad, int value)
+{
+ uint32_t bank = PAD_BANK(pad);
+ uint32_t offset = PINCTRL_DOUT(bank);
+ struct mx28_register *reg =
+ (struct mx28_register *)(MXS_PINCTRL_BASE + offset);
+
+ if (value)
+ writel(1 PAD_PIN(pad), reg-reg_set);
+ else
+ writel(1 PAD_PIN(pad), reg-reg_clr);
+}
+
+void mxs_gpio_init(void)
+{
+ int i;
+
+ for (i = 0; i PINCTRL_BANKS; i++) {
+ writel(0, MXS_PINCTRL_BASE + PINCTRL_PIN2IRQ(i));
+ writel(0, MXS_PINCTRL_BASE + PINCTRL_IRQEN(i));
+ /* Use SCT address here to clear the IRQSTAT bits */
+ writel(0x, MXS_PINCTRL_BASE +
[U-Boot] [PATCH 17/31] M28: Enable use of GPIO configurators
Signed-off-by: Marek Vasut marek.va...@gmail.com Cc: Stefano Babic sba...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de --- include/configs/m28evk.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index edacf3d..b48fdd4 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -35,6 +35,7 @@ #defineCONFIG_SYS_ICACHE_OFF #defineCONFIG_SYS_DCACHE_OFF #defineCONFIG_BOARD_EARLY_INIT_F +#defineCONFIG_ARCH_CPU_INIT /* * U-Boot Commands -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 18/31] iMX28: Add SPI driver
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/spi/Makefile |1 +
drivers/spi/mxs_spi.c | 174 +
2 files changed, 175 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/mxs_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 96c9642..9a0c475 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -36,6 +36,7 @@ COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
+COBJS-$(CONFIG_MXS_SPI) += mxs_spi.o
COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
new file mode 100644
index 000..b9c2f06
--- /dev/null
+++ b/drivers/spi/mxs_spi.c
@@ -0,0 +1,174 @@
+/*
+ * Freescale i.MX28 SPI driver
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include malloc.h
+#include spi.h
+#include asm/errno.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/regs-common.h
+#include asm/arch/regs-base.h
+#include asm/arch/regs-clkctrl.h
+#include asm/arch/regs-ssp.h
+#include asm/arch/iomux-mx28.h
+#include asm/arch/gpio.h
+#include asm/arch/mx28.h
+
+#defineMXS_SPI_MAX_TIMEOUT 100
+
+static inline struct mx28_ssp_regs *to_mxs_regs(struct spi_slave *slave)
+{
+ return (struct mx28_ssp_regs *)(MXS_SSP0_BASE + (slave-bus * 0x2000));
+}
+
+void spi_init(void)
+{
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct spi_slave *slave;
+ struct mx28_ssp_regs *ssp_regs;
+ uint32_t reg = 0;
+
+ if (bus 3) {
+ printf(MXS SPI: Max bus number is 3\n);
+ return NULL;
+ }
+
+ slave = malloc(sizeof(struct spi_slave));
+ if (!slave)
+ return NULL;
+
+ slave-bus = bus;
+ slave-cs = cs;
+
+ ssp_regs = to_mxs_regs(slave);
+
+ mx28_reset_block(ssp_regs-hw_ssp_ctrl0_reg);
+
+ writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT, ssp_regs-hw_ssp_ctrl0);
+
+ reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS;
+ reg |= (mode SPI_CPOL) ? SSP_CTRL1_POLARITY : 0;
+ reg |= (mode SPI_CPHA) ? SSP_CTRL1_PHASE : 0;
+ writel(reg, ssp_regs-hw_ssp_ctrl1);
+
+ writel(0, ssp_regs-hw_ssp_cmd0);
+
+ mx28_set_ssp_busclock(bus, max_hz / 1000);
+
+ return slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ free(slave);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+ return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+}
+
+void mxs_spi_start_xfer(struct spi_slave *slave)
+{
+ struct mx28_ssp_regs *ssp_regs = to_mxs_regs(slave);
+ writel(SSP_CTRL0_LOCK_CS, ssp_regs-hw_ssp_ctrl0_set);
+ writel(SSP_CTRL0_IGNORE_CRC, ssp_regs-hw_ssp_ctrl0_clr);
+}
+
+void mxs_spi_end_xfer(struct spi_slave *slave)
+{
+ struct mx28_ssp_regs *ssp_regs = to_mxs_regs(slave);
+ writel(SSP_CTRL0_LOCK_CS, ssp_regs-hw_ssp_ctrl0_clr);
+ writel(SSP_CTRL0_IGNORE_CRC, ssp_regs-hw_ssp_ctrl0_set);
+}
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags)
+{
+ struct mx28_ssp_regs *ssp_regs = to_mxs_regs(slave);
+ int len = bitlen / 8;
+ const char *tx = dout;
+ char *rx = din;
+
+ if (bitlen == 0)
+ return 0;
+
+ if (!rx !tx)
+ return 0;
+
+ if (flags SPI_XFER_BEGIN)
+ mxs_spi_start_xfer(slave);
+
+ while (len--) {
+ /* We transfer 1 byte */
+ writel(1, ssp_regs-hw_ssp_xfer_size);
+
+ if ((flags SPI_XFER_END) !len)
+ mxs_spi_end_xfer(slave);
+
+ if (tx)
+ writel(SSP_CTRL0_READ, ssp_regs-hw_ssp_ctrl0_clr);
+
[U-Boot] [PATCH 19/31] M28EVK: Enable SPI and SPI flash
Signed-off-by: Marek Vasut marek.va...@gmail.com Cc: Stefano Babic sba...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de --- include/configs/m28evk.h | 27 +++ 1 files changed, 27 insertions(+), 0 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index b48fdd4..dee276c 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -57,6 +57,8 @@ #defineCONFIG_CMD_NFS #defineCONFIG_CMD_PING #defineCONFIG_CMD_SETEXPR +#defineCONFIG_CMD_SF +#defineCONFIG_CMD_SPI /* * Memory configurations @@ -157,6 +159,31 @@ #endif /* + * SPI + */ +#ifdef CONFIG_CMD_SPI +#defineCONFIG_HARD_SPI +#defineCONFIG_MXS_SPI +#defineCONFIG_SPI_HALF_DUPLEX +#defineCONFIG_DEFAULT_SPI_BUS 2 +#defineCONFIG_DEFAULT_SPI_MODE SPI_MODE_0 + +/* SPI FLASH */ +#ifdef CONFIG_CMD_SF +#defineCONFIG_SPI_FLASH +#defineCONFIG_SPI_FLASH_STMICRO +#defineCONFIG_SPI_FLASH_CS 2 +#defineCONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#defineCONFIG_SF_DEFAULT_SPEED 2400 + +#defineCONFIG_ENV_SPI_CS 0 +#defineCONFIG_ENV_SPI_BUS 2 +#defineCONFIG_ENV_SPI_MAX_HZ 2400 +#defineCONFIG_ENV_SPI_MODE SPI_MODE_0 +#endif +#endif + +/* * Boot Linux */ #defineCONFIG_CMDLINE_TAG -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 20/31] iMX28: Add APBH DMA driver
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
arch/arm/include/asm/arch-mx28/dma.h | 170 +++
arch/arm/include/asm/arch-mx28/regs-apbh.h | 462 ++
drivers/dma/Makefile |1 +
drivers/dma/apbh_dma.c | 693
4 files changed, 1326 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx28/dma.h
create mode 100644 arch/arm/include/asm/arch-mx28/regs-apbh.h
create mode 100644 drivers/dma/apbh_dma.c
diff --git a/arch/arm/include/asm/arch-mx28/dma.h
b/arch/arm/include/asm/arch-mx28/dma.h
new file mode 100644
index 000..7061e7c
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx28/dma.h
@@ -0,0 +1,170 @@
+/*
+ * Freescale i.MX28 APBH DMA
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * Based on code from LTIB:
+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __DMA_H__
+#define __DMA_H__
+
+#include linux/list.h
+
+#ifndefCONFIG_ARCH_DMA_PIO_WORDS
+#defineDMA_PIO_WORDS 15
+#else
+#defineDMA_PIO_WORDS CONFIG_ARCH_DMA_PIO_WORDS
+#endif
+
+#define MXS_DMA_ALIGNMENT 32
+
+/*
+ * MXS DMA channels
+ */
+enum {
+ MXS_DMA_CHANNEL_AHB_APBH_SSP0 = 0,
+ MXS_DMA_CHANNEL_AHB_APBH_SSP1,
+ MXS_DMA_CHANNEL_AHB_APBH_SSP2,
+ MXS_DMA_CHANNEL_AHB_APBH_SSP3,
+ MXS_DMA_CHANNEL_AHB_APBH_GPMI0,
+ MXS_DMA_CHANNEL_AHB_APBH_GPMI1,
+ MXS_DMA_CHANNEL_AHB_APBH_GPMI2,
+ MXS_DMA_CHANNEL_AHB_APBH_GPMI3,
+ MXS_DMA_CHANNEL_AHB_APBH_GPMI4,
+ MXS_DMA_CHANNEL_AHB_APBH_GPMI5,
+ MXS_DMA_CHANNEL_AHB_APBH_GPMI6,
+ MXS_DMA_CHANNEL_AHB_APBH_GPMI7,
+ MXS_DMA_CHANNEL_AHB_APBH_SSP,
+ MXS_MAX_DMA_CHANNELS,
+};
+
+/*
+ * MXS DMA hardware command.
+ *
+ * This structure describes the in-memory layout of an entire DMA command,
+ * including space for the maximum number of PIO accesses. See the appropriate
+ * reference manual for a detailed description of what these fields mean to the
+ * DMA hardware.
+ */
+#defineMXS_DMA_DESC_COMMAND_MASK 0x3
+#defineMXS_DMA_DESC_COMMAND_OFFSET 0
+#defineMXS_DMA_DESC_COMMAND_NO_DMAXFER 0x0
+#defineMXS_DMA_DESC_COMMAND_DMA_WRITE 0x1
+#defineMXS_DMA_DESC_COMMAND_DMA_READ 0x2
+#defineMXS_DMA_DESC_COMMAND_DMA_SENSE 0x3
+#defineMXS_DMA_DESC_CHAIN (1 2)
+#defineMXS_DMA_DESC_IRQ(1 3)
+#defineMXS_DMA_DESC_NAND_LOCK (1 4)
+#defineMXS_DMA_DESC_NAND_WAIT_4_READY (1 5)
+#defineMXS_DMA_DESC_DEC_SEM(1 6)
+#defineMXS_DMA_DESC_WAIT4END (1 7)
+#defineMXS_DMA_DESC_HALT_ON_TERMINATE (1 8)
+#defineMXS_DMA_DESC_TERMINATE_FLUSH(1 9)
+#defineMXS_DMA_DESC_PIO_WORDS_MASK (0xf 12)
+#defineMXS_DMA_DESC_PIO_WORDS_OFFSET 12
+#defineMXS_DMA_DESC_BYTES_MASK (0x 16)
+#defineMXS_DMA_DESC_BYTES_OFFSET 16
+
+struct mxs_dma_cmd {
+ unsigned long next;
+ unsigned long data;
+ union {
+ dma_addr_t address;
+ unsigned long alternate;
+ };
+ unsigned long pio_words[DMA_PIO_WORDS];
+};
+
+/*
+ * MXS DMA command descriptor.
+ *
+ * This structure incorporates an MXS DMA hardware command structure, along
+ * with metadata.
+ */
+#defineMXS_DMA_DESC_FIRST (1 0)
+#defineMXS_DMA_DESC_LAST (1 1)
+#defineMXS_DMA_DESC_READY (1 31)
+
+struct mxs_dma_desc {
+ struct mxs_dma_cmd cmd;
+ unsigned intflags;
+ dma_addr_t address;
+ void*buffer;
+ struct list_headnode;
+};
+
+/**
+ * MXS DMA channel
+ *
+ * This structure represents a single DMA channel. The MXS platform code
+ * maintains an array of these structures to represent every DMA channel in the
+ * system (see mxs_dma_channels).
+ */
+#define
[U-Boot] [PATCH 21/31] iMX28: Add BCH and GPMI register definitions
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Scott Wood scottw...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
arch/arm/include/asm/arch-mx28/regs-bch.h | 226
arch/arm/include/asm/arch-mx28/regs-gpmi.h | 218 +++
2 files changed, 444 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx28/regs-bch.h
create mode 100644 arch/arm/include/asm/arch-mx28/regs-gpmi.h
diff --git a/arch/arm/include/asm/arch-mx28/regs-bch.h
b/arch/arm/include/asm/arch-mx28/regs-bch.h
new file mode 100644
index 000..b788895
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx28/regs-bch.h
@@ -0,0 +1,226 @@
+/*
+ * Freescale i.MX28 BCH Register Definitions
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * Based on code from LTIB:
+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __REGS_BCH_H__
+#define __REGS_BCH_H__
+
+struct mx28_bch_regs {
+ mx28_reg(hw_bch_ctrl)
+ mx28_reg(hw_bch_status0)
+ mx28_reg(hw_bch_mode)
+ mx28_reg(hw_bch_encodeptr)
+ mx28_reg(hw_bch_dataptr)
+ mx28_reg(hw_bch_metaptr)
+
+ uint32_treserved[4];
+
+ mx28_reg(hw_bch_layoutselect)
+ mx28_reg(hw_bch_flash0layout0)
+ mx28_reg(hw_bch_flash0layout1)
+ mx28_reg(hw_bch_flash1layout0)
+ mx28_reg(hw_bch_flash1layout1)
+ mx28_reg(hw_bch_flash2layout0)
+ mx28_reg(hw_bch_flash2layout1)
+ mx28_reg(hw_bch_flash3layout0)
+ mx28_reg(hw_bch_flash3layout1)
+ mx28_reg(hw_bch_dbgkesread)
+ mx28_reg(hw_bch_dbgcsferead)
+ mx28_reg(hw_bch_dbgsyndegread)
+ mx28_reg(hw_bch_dbgahbmread)
+ mx28_reg(hw_bch_blockname)
+ mx28_reg(hw_bch_version)
+};
+
+#defineBCH_CTRL_SFTRST (1 31)
+#defineBCH_CTRL_CLKGATE(1 30)
+#defineBCH_CTRL_DEBUGSYNDROME (1 22)
+#defineBCH_CTRL_M2M_LAYOUT_MASK(0x3 18)
+#defineBCH_CTRL_M2M_LAYOUT_OFFSET 18
+#defineBCH_CTRL_M2M_ENCODE (1 17)
+#defineBCH_CTRL_M2M_ENABLE (1 16)
+#defineBCH_CTRL_DEBUG_STALL_IRQ_EN (1 10)
+#defineBCH_CTRL_COMPLETE_IRQ_EN(1 8)
+#defineBCH_CTRL_BM_ERROR_IRQ (1 3)
+#defineBCH_CTRL_DEBUG_STALL_IRQ(1 2)
+#defineBCH_CTRL_COMPLETE_IRQ (1 0)
+
+#defineBCH_STATUS0_HANDLE_MASK (0xfff 20)
+#defineBCH_STATUS0_HANDLE_OFFSET 20
+#defineBCH_STATUS0_COMPLETED_CE_MASK (0xf 16)
+#defineBCH_STATUS0_COMPLETED_CE_OFFSET 16
+#defineBCH_STATUS0_STATUS_BLK0_MASK(0xff 8)
+#defineBCH_STATUS0_STATUS_BLK0_OFFSET 8
+#defineBCH_STATUS0_STATUS_BLK0_ZERO(0x00 8)
+#defineBCH_STATUS0_STATUS_BLK0_ERROR1 (0x01 8)
+#defineBCH_STATUS0_STATUS_BLK0_ERROR2 (0x02 8)
+#defineBCH_STATUS0_STATUS_BLK0_ERROR3 (0x03 8)
+#defineBCH_STATUS0_STATUS_BLK0_ERROR4 (0x04 8)
+#defineBCH_STATUS0_STATUS_BLK0_UNCORRECTABLE (0xfe 8)
+#defineBCH_STATUS0_STATUS_BLK0_ERASED (0xff 8)
+#defineBCH_STATUS0_ALLONES (1 4)
+#defineBCH_STATUS0_CORRECTED (1 3)
+#defineBCH_STATUS0_UNCORRECTABLE (1 2)
+
+#defineBCH_MODE_ERASE_THRESHOLD_MASK 0xff
+#defineBCH_MODE_ERASE_THRESHOLD_OFFSET 0
+
+#defineBCH_ENCODEPTR_ADDR_MASK 0x
+#defineBCH_ENCODEPTR_ADDR_OFFSET 0
+
+#defineBCH_DATAPTR_ADDR_MASK
[U-Boot] [PATCH 23/31] M28: Enable NAND
Signed-off-by: Marek Vasut marek.va...@gmail.com Cc: Scott Wood scottw...@freescale.com Cc: Stefano Babic sba...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de --- include/configs/m28evk.h | 13 + 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index dee276c..5cf62a2 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -53,6 +53,7 @@ #defineCONFIG_CMD_I2C #defineCONFIG_CMD_MII #defineCONFIG_CMD_MMC +#defineCONFIG_CMD_NAND #defineCONFIG_CMD_NET #defineCONFIG_CMD_NFS #defineCONFIG_CMD_PING @@ -120,6 +121,18 @@ #endif /* + * NAND + */ +#ifdef CONFIG_CMD_NAND +#defineCONFIG_NAND_MXS +#define CONFIG_APBH_DMA +#defineCONFIG_SYS_MAX_NAND_DEVICE 1 +#defineCONFIG_SYS_NAND_BASE0x6000 +#defineCONFIG_SYS_NAND_5_ADDR_CYCLE +#defineNAND_MAX_CHIPS 8 +#endif + +/* * Ethernet on SOC (FEC) */ #ifdef CONFIG_CMD_NET -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 24/31] iMX28: Add driver for internal RTC
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/rtc/Makefile |1 +
drivers/rtc/mxsrtc.c | 88 ++
2 files changed, 89 insertions(+), 0 deletions(-)
create mode 100644 drivers/rtc/mxsrtc.c
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index ca27745..5d7da6a 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -56,6 +56,7 @@ COBJS-$(CONFIG_RTC_MK48T59) += mk48t59.o
COBJS-$(CONFIG_RTC_MPC5200) += mpc5xxx.o
COBJS-$(CONFIG_RTC_MPC8xx) += mpc8xx.o
COBJS-$(CONFIG_RTC_MV) += mvrtc.o
+COBJS-$(CONFIG_RTC_MXS) += mxsrtc.o
COBJS-$(CONFIG_RTC_PCF8563) += pcf8563.o
COBJS-$(CONFIG_RTC_PL031) += pl031.o
COBJS-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
diff --git a/drivers/rtc/mxsrtc.c b/drivers/rtc/mxsrtc.c
new file mode 100644
index 000..648653d
--- /dev/null
+++ b/drivers/rtc/mxsrtc.c
@@ -0,0 +1,88 @@
+/*
+ * Freescale i.MX28 RTC Driver
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include rtc.h
+#include asm/io.h
+#include asm/arch/regs-common.h
+#include asm/arch/regs-base.h
+#include asm/arch/regs-rtc.h
+#include asm/arch/mx28.h
+
+#defineMXS_RTC_MAX_TIMEOUT 100
+
+/* Set time in seconds since 1970-01-01 */
+int mxs_rtc_set_time(uint32_t secs)
+{
+ struct mx28_rtc_regs *rtc_regs = (struct mx28_rtc_regs *)MXS_RTC_BASE;
+ int ret;
+
+ writel(secs, rtc_regs-hw_rtc_seconds);
+
+ /*
+* The 0x80 here means seconds were copied to analog. This information
+* is taken from the linux kernel driver for the STMP37xx RTC since
+* documentation doesn't mention it.
+*/
+ ret = mx28_wait_mask_clr(rtc_regs-hw_rtc_stat_reg,
+ 0x80 RTC_STAT_STALE_REGS_OFFSET, MXS_RTC_MAX_TIMEOUT);
+
+ if (ret)
+ printf(MXS RTC: Timeout waiting for update\n);
+
+ return ret;
+}
+
+int rtc_get(struct rtc_time *time)
+{
+ struct mx28_rtc_regs *rtc_regs = (struct mx28_rtc_regs *)MXS_RTC_BASE;
+ uint32_t secs;
+
+ secs = readl(rtc_regs-hw_rtc_seconds);
+ to_tm(secs, time);
+
+ return 0;
+}
+
+int rtc_set(struct rtc_time *time)
+{
+ uint32_t secs;
+
+ secs = mktime(time-tm_year, time-tm_mon, time-tm_mday,
+ time-tm_hour, time-tm_min, time-tm_sec);
+
+ return mxs_rtc_set_time(secs);
+}
+
+void rtc_reset(void)
+{
+ struct mx28_rtc_regs *rtc_regs = (struct mx28_rtc_regs *)MXS_RTC_BASE;
+ int ret;
+
+ /* Set time to 1970-01-01 */
+ mxs_rtc_set_time(0);
+
+ /* Reset the RTC block */
+ ret = mx28_reset_block(rtc_regs-hw_rtc_ctrl_reg);
+ if (ret)
+ printf(MXS RTC: Block reset timeout\n);
+}
--
1.7.5.4
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 22/31] iMX28: Add GPMI NAND driver
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Scott Wood scottw...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/mxs_nand.c | 1163 +++
2 files changed, 1164 insertions(+), 0 deletions(-)
create mode 100644 drivers/mtd/nand/mxs_nand.c
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..8b6e8bf 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -43,6 +43,7 @@ COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
COBJS-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
COBJS-$(CONFIG_NAND_MXC) += mxc_nand.o
+COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o
COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
new file mode 100644
index 000..4995e0b
--- /dev/null
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -0,0 +1,1163 @@
+/*
+ * Freescale i.MX28 NAND flash driver
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * Based on code from LTIB:
+ * Freescale GPMI NFC NAND Flash Driver
+ *
+ * Copyright (C) 2010 Freescale Semiconductor, Inc.
+ * Copyright (C) 2008 Embedded Alley Solutions, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include linux/mtd/mtd.h
+#include linux/mtd/nand.h
+#include linux/types.h
+#include common.h
+#include malloc.h
+#include asm/errno.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/regs-common.h
+#include asm/arch/regs-base.h
+#include asm/arch/regs-apbh.h
+#include asm/arch/regs-bch.h
+#include asm/arch/regs-gpmi.h
+#include asm/arch/mx28.h
+#include asm/arch/dma.h
+
+#defineMXS_NAND_DMA_DESCRIPTOR_COUNT 4
+
+#defineMXS_NAND_CHUNK_DATA_CHUNK_SIZE 512
+#defineMXS_NAND_METADATA_SIZE 10
+
+#defineMXS_NAND_COMMAND_BUFFER_SIZE32
+
+#defineMXS_NAND_BCH_TIMEOUT1
+
+struct mxs_nand_info {
+ int cur_chip;
+
+ uint32_tcmd_queue_len;
+
+ uint8_t *cmd_buf;
+ uint8_t *data_buf;
+ uint8_t *oob_buf;
+
+ uint8_t marking_block_bad;
+ uint8_t raw_oob_mode;
+
+ /* Functions with altered behaviour */
+ int (*hooked_read_oob)(struct mtd_info *mtd,
+ loff_t from, struct mtd_oob_ops *ops);
+ int (*hooked_write_oob)(struct mtd_info *mtd,
+ loff_t to, struct mtd_oob_ops *ops);
+ int (*hooked_block_markbad)(struct mtd_info *mtd,
+ loff_t ofs);
+
+ /* DMA descriptors */
+ struct mxs_dma_desc **desc;
+ uint32_tdesc_index;
+};
+
+struct nand_ecclayout fake_ecc_layout;
+
+static struct mxs_dma_desc *mxs_nand_get_dma_desc(struct mxs_nand_info *info)
+{
+ struct mxs_dma_desc *desc;
+
+ if (info-desc_index = MXS_NAND_DMA_DESCRIPTOR_COUNT) {
+ printf(MXS NAND: Too many DMA descriptors requested\n);
+ return NULL;
+ }
+
+ desc = info-desc[info-desc_index];
+ info-desc_index++;
+
+ return desc;
+}
+
+static void mxs_nand_return_dma_descs(struct mxs_nand_info *info)
+{
+ int i = info-desc_index;
+ struct mxs_dma_desc *desc;
+
+ for (--i; i = 0; i--) {
+ desc = info-desc[i];
+ memset(desc, 0, sizeof(struct mxs_dma_desc));
+ desc-address = (dma_addr_t)desc;
+ }
+
+ info-desc_index = 0;
+}
+
+static inline uint32_t mxs_nand_ecc_chunk_cnt(uint32_t page_data_size)
+{
+ return page_data_size / MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
+}
+
+static inline uint32_t mxs_nand_ecc_size_in_bits(uint32_t ecc_strength)
+{
+ return ecc_strength * 13;
+}
+
+static inline uint32_t mxs_nand_aux_status_offset(void)
+{
+ return (MXS_NAND_METADATA_SIZE + 0x3) ~0x3;
+}
+
+static inline uint32_t mxs_nand_aux_size(uint32_t page_size)
+{
+
[U-Boot] [PATCH 25/31] M28: Enable the internal RTC instead of the M41T62
Signed-off-by: Marek Vasut marek.va...@gmail.com Cc: Stefano Babic sba...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de --- include/configs/m28evk.h |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 5cf62a2..dbeb37e 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -166,10 +166,16 @@ * RTC */ #ifdef CONFIG_CMD_DATE +/* Use the internal RTC in the MXS chip */ +#defineCONFIG_RTC_INTERNAL +#ifdef CONFIG_RTC_INTERNAL +#defineCONFIG_RTC_MXS +#else #defineCONFIG_RTC_M41T62 #defineCONFIG_SYS_I2C_RTC_ADDR 0x68 #defineCONFIG_SYS_M41T11_BASE_YEAR 2000 #endif +#endif /* * SPI -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 26/31] M28: Enable UBI and UBIFS
Signed-off-by: Marek Vasut marek.va...@gmail.com Cc: Stefano Babic sba...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de --- include/configs/m28evk.h | 16 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index dbeb37e..0d4a0a3 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -130,6 +130,22 @@ #defineCONFIG_SYS_NAND_BASE0x6000 #defineCONFIG_SYS_NAND_5_ADDR_CYCLE #defineNAND_MAX_CHIPS 8 + +#defineCONFIG_CMD_UBI +#defineCONFIG_CMD_UBIFS +#defineCONFIG_CMD_MTDPARTS +#defineCONFIG_RBTREE +#defineCONFIG_LZO +#defineCONFIG_MTD_DEVICE +#defineCONFIG_MTD_PARTITIONS +#defineMTDIDS_DEFAULT nand0=gpmi-nand.0 +#defineMTDPARTS_DEFAULT\ + mtdparts=gpmi-nand.0: \ + 3m(bootloader)ro, \ + 128k(environment),\ + 128k(redundant-environment), \ + 4m(kernel), \ + -(filesystem) #endif /* -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 27/31] M28: Save environment in NAND
Signed-off-by: Marek Vasut marek.va...@gmail.com Cc: Stefano Babic sba...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Detlev Zundel d...@denx.de --- include/configs/m28evk.h | 11 +-- 1 files changed, 9 insertions(+), 2 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 0d4a0a3..c120c63 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -131,6 +131,15 @@ #defineCONFIG_SYS_NAND_5_ADDR_CYCLE #defineNAND_MAX_CHIPS 8 +/* Environment is in NAND */ +#defineCONFIG_ENV_IS_IN_NAND 1 +#defineCONFIG_ENV_SECT_SIZE(128 * 1024) +#defineCONFIG_ENV_SIZE (16 * 1024) +#defineCONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE +#defineCONFIG_ENV_OFFSET 0x30 +#defineCONFIG_ENV_OFFSET_REDUND\ + (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) + #defineCONFIG_CMD_UBI #defineCONFIG_CMD_UBIFS #defineCONFIG_CMD_MTDPARTS @@ -230,6 +239,4 @@ #defineCONFIG_LOADADDR 0x4200 #defineCONFIG_SYS_LOAD_ADDRCONFIG_LOADADDR -#defineCONFIG_ENV_IS_NOWHERE 1 - #endif /* __M28_H__ */ -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 28/31] iMX28: Add image header generator tool
This tool can now generate proper image for BootStream files.
NOTE: This tool now works only for NAND.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
tools/Makefile |6 +
tools/mxsboot.c | 687 +++
2 files changed, 693 insertions(+), 0 deletions(-)
create mode 100644 tools/mxsboot.c
diff --git a/tools/Makefile b/tools/Makefile
index fc741d3..2caac78 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -67,6 +67,7 @@ BIN_FILES-$(CONFIG_CMD_NET) += gen_eth_addr$(SFX)
BIN_FILES-$(CONFIG_CMD_LOADS) += img2srec$(SFX)
BIN_FILES-$(CONFIG_XWAY_SWAP_BYTES) += xway-swap-bytes$(SFX)
BIN_FILES-y += mkimage$(SFX)
+BIN_FILES-$(CONFIG_MX28) += mxsboot$(SFX)
BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
@@ -90,6 +91,7 @@ NOPED_OBJ_FILES-y += kwbimage.o
NOPED_OBJ_FILES-y += imximage.o
NOPED_OBJ_FILES-y += omapimage.o
NOPED_OBJ_FILES-y += mkimage.o
+OBJ_FILES-$(CONFIG_MX28) += mxsboot.o
OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o
NOPED_OBJ_FILES-y += os_support.o
OBJ_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1.o
@@ -204,6 +206,10 @@ $(obj)mpc86x_clk$(SFX):$(obj)mpc86x_clk.o
$(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
$(HOSTSTRIP) $@
+$(obj)mxsboot$(SFX): $(obj)mxsboot.o
+ $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
+ $(HOSTSTRIP) $@
+
$(obj)ncb$(SFX): $(obj)ncb.o
$(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
$(HOSTSTRIP) $@
diff --git a/tools/mxsboot.c b/tools/mxsboot.c
new file mode 100644
index 000..2feda19
--- /dev/null
+++ b/tools/mxsboot.c
@@ -0,0 +1,687 @@
+/*
+ * Freescale i.MX28 image generator
+ *
+ * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include fcntl.h
+#include malloc.h
+#include stdint.h
+#include stdio.h
+#include stdlib.h
+#include string.h
+#include sys/stat.h
+#include sys/types.h
+#include unistd.h
+
+/*
+ * Default BCB layout.
+ *
+ * TWEAK this if you have blown any OCOTP fuses.
+ */
+#defineSTRIDE_PAGES64
+#defineSTRIDE_COUNT4
+
+/*
+ * Layout for 256Mb big NAND with 2048b page size, 64b OOB size and
+ * 128kb erase size.
+ *
+ * TWEAK this if you have different kind of NAND chip.
+ */
+uint32_t nand_writesize = 2048;
+uint32_t nand_oobsize = 64;
+uint32_t nand_erasesize = 128 * 1024;
+
+/*
+ * Sector on which the SigmaTel boot partition (0x53) starts.
+ */
+uint32_t sd_sector = 2048;
+
+/*
+ * Each of the U-Boot bootstreams is at maximum 1MB big.
+ *
+ * TWEAK this if, for some wild reason, you need to boot bigger image.
+ */
+#defineMAX_BOOTSTREAM_SIZE (1 * 1024 * 1024)
+
+/* i.MX28 NAND controller-specific constants. DO NOT TWEAK! */
+#defineMXS_NAND_DMA_DESCRIPTOR_COUNT 4
+#defineMXS_NAND_CHUNK_DATA_CHUNK_SIZE 512
+#defineMXS_NAND_METADATA_SIZE 10
+#defineMXS_NAND_COMMAND_BUFFER_SIZE32
+
+struct mx28_nand_fcb {
+ uint32_tchecksum;
+ uint32_tfingerprint;
+ uint32_tversion;
+ struct {
+ uint8_t data_setup;
+ uint8_t data_hold;
+ uint8_t address_setup;
+ uint8_t dsample_time;
+ uint8_t nand_timing_state;
+ uint8_t rea;
+ uint8_t rloh;
+ uint8_t rhoh;
+ } timing;
+ uint32_tpage_data_size;
+ uint32_ttotal_page_size;
+ uint32_tsectors_per_block;
+ uint32_tnumber_of_nands;/* Ignored */
+ uint32_ttotal_internal_die; /* Ignored */
+ uint32_tcell_type; /* Ignored */
+ uint32_t
[U-Boot] [PATCH 29/31] M28: Add NAND update scripts
Add update_nand_full and update_nand_firmware scripts to make NAND bootable
or update NAND firmware.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
include/configs/m28evk.h | 34 ++
1 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index c120c63..5ca5f98 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -239,4 +239,38 @@
#defineCONFIG_LOADADDR 0x4200
#defineCONFIG_SYS_LOAD_ADDRCONFIG_LOADADDR
+/*
+ * Extra Environments
+ */
+#defineCONFIG_EXTRA_ENV_SETTINGS
\
+ update_nand_full_filename=u-boot.nand\0 \
+ update_nand_firmware_filename=u-boot.sb\0 \
+ update_nand_firmware_maxsz=0x10\0 \
+ update_nand_stride=0x40\0 /* MX28 datasheet ch. 12.12 */ \
+ update_nand_count=0x4\0 /* MX28 datasheet ch. 12.12 */ \
+ update_nand_get_fcb_size= /* Get size of FCB blocks */\
+ nand device 0 ; \
+ nand info ; \
+ setexpr fcb_sz ${update_nand_stride} * ${update_nand_count}; \
+ setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0 \
+ update_nand_full= /* Update FCB, DBBT and FW */ \
+ if tftp ${update_nand_full_filename} ; then \
+ run update_nand_get_fcb_size ;\
+ nand scrub.quiet 0x0 ${filesize} ;\
+ nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; \
+ setexpr update_off ${loadaddr} + ${update_nand_fcb} ; \
+ setexpr update_sz ${filesize} - ${update_nand_fcb} ; \
+ nand write ${update_off} ${update_nand_fcb} ${update_sz} ; \
+ fi\0 \
+ update_nand_firmware= /* Update only firmware */ \
+ if tftp ${update_nand_firmware_filename} ; then \
+ run update_nand_get_fcb_size ;\
+ setexpr fcb_sz ${update_nand_fcb} * 2 ; /* FCB + DBBT */ \
+ setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; \
+ setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz}; \
+ nand erase ${fcb_sz} ${fw_sz} ; \
+ nand write ${loadaddr} ${fcb_sz} ${filesize} ;\
+ nand write ${loadaddr} ${fw_off} ${filesize} ;\
+ fi\0
+
#endif /* __M28_H__ */
--
1.7.5.4
___
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http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 30/31] i.MX28: Add u-boot.sb target to Makefile
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
Makefile |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/Makefile b/Makefile
index ee05fb3..90f8d3a 100644
--- a/Makefile
+++ b/Makefile
@@ -398,6 +398,10 @@ $(obj)u-boot.ubl: $(obj)u-boot-nand.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-e $(CONFIG_SYS_TEXT_BASE) -d $ $@
+$(obj)u-boot.sb: $(obj)u-boot.bin $(obj)mmc_spl/u-boot-mmc-spl.bin
+ elftosb -zdf imx28 -c mmc_spl/board/denx/m28evk/u-boot.bd \
+ -o $(obj)u-boot.sb
+
GEN_UBOOT = \
UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \
sed -n -e
's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
@@ -980,6 +984,7 @@ clobber:clean
@rm -f $(obj)u-boot.kwb
@rm -f $(obj)u-boot.imx
@rm -f $(obj)u-boot.ubl
+ @rm -f $(obj)u-boot.sb
@rm -f $(obj)tools/{env/crc32.c,inca-swap-bytes}
@rm -f $(obj)arch/powerpc/cpu/mpc824x/bedbug_603e.c
@rm -fr $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
--
1.7.5.4
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[U-Boot] [PATCH 31/31] M28: Add doc/README.m28 documentation
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
---
doc/README.m28 | 223
1 files changed, 223 insertions(+), 0 deletions(-)
create mode 100644 doc/README.m28
diff --git a/doc/README.m28 b/doc/README.m28
new file mode 100644
index 000..b749ce0
--- /dev/null
+++ b/doc/README.m28
@@ -0,0 +1,223 @@
+DENX M28EVK
+===
+
+This document describes the DENX M28/M28EVK U-Boot port. This document mostly
+covers topics related to making the module/board bootable.
+
+Terminology
+---
+
+The dollar symbol ($) introduces a snipped of shell code. This shall be typed
+into the unix command prompt in U-Boot source code root directory.
+
+The (=) introduces a snipped of code that should by typed into U-Boot command
+prompt.
+
+Contents
+
+
+0) Files of the M28/M28EVK port
+1) Prerequisites
+2) Compiling U-Boot for M28
+3) Installation of U-Boot for M28EVK to SD card
+4) Installation of U-Boot for M28 to NAND flash
+
+0) Files of the M28/M28EVK port
+---
+
+arch/arm/cpu/arm926ejs/mx28/ - The CPU support code for the Freescale i.MX28
+arch/arm/include/asm/arch-mx28/- Header files for the Freescale i.MX28
+board/denx/m28evk/ - M28EVK board specific files
+include/configs/m28evk.h - M28EVK configuration file
+
+1) Prerequisites
+
+
+To make the M28 module or the M28 module or M28EVK board bootable, some tools
+are necessary. The first one is the elftosb tool distributed by Freescale
+Semiconductor. The other tool is the mxsboot tool found in U-Boot source
tree.
+
+Firstly, obtain the elftosb archive from the following location:
+
+ http://foss.doredevelopment.dk/mirrors/imx/elftosb-10.12.01.tar.gz
+
+We use a $VER variable here to denote the current version. At the time of
+writing of this document, that is 10.12.01. To obtain the file from command
+line, use:
+
+ $ VER=10.12.01
+ $ wget http://foss.doredevelopment.dk/mirrors/imx/elftosb-${VER}.tar.gz
+
+Extract the file:
+
+ $ tar xzf elftosb-${VER}.tar.gz
+
+Compile the file. We need to manually tell the linker to use also libm:
+
+ $ cd elftosb-${VER}/
+ $ make LIBS=-lstdc++ -lm elftosb
+
+Optionally, remove debugging symbols from elftosb:
+
+ $ strip bld/linux/elftosb
+
+Finally, install the elftosb binary. The install target is missing, so just
+copy the binary by hand:
+
+ $ sudo cp bld/linux/elftosb /usr/local/bin/
+
+Make sure the elftosb binary can be found in your $PATH, in this case this
+means /usr/local/bin/ has to be in your $PATH.
+
+2) Compiling U-Boot for M28
+---
+
+Compiling the U-Boot for M28 is straightforward and done as compiling U-Boot
+for any other ARM device. For cross-compiler setup, please refer to ELDK5.0
+documentation. First, clean up the source code:
+
+ $ make mrproper
+
+Next, configure U-Boot for M28EVK:
+
+ $ make m28evk_config
+
+Lastly, compile U-Boot and prepare a BootStream. The BootStream is a
special
+type of file, which the i.MX28 CPU can boot. This is handled by the following
+command:
+
+ $ make u-boot.sb
+
+HINT: To speed-up the build process, you can add -jN, where N is number of
+ compiler instances that'll run in parallel.
+
+The code produces u-boot.sb file. This file needs to be augmented with a
+proper header to allow successful boot from SD or NAND. Adding the header is
+discussed in the following chapters.
+
+3) Installation of U-Boot for M28EVK to SD card
+---
+
+To boot an M28 from SD, set the boot mode DIP switches according to i.MX28
+manual chapter 12.2.1 (Table 12-2), PORT=SSP0, SD/MMC master on SSP0, 3.3V.
+
+An SD card the i.MX28 CPU can use to boot U-Boot must contain a DOS partition
+table, which in turn carries a partition of special type and which contains a
+special header. The rest of partitions in the DOS partition table can be used
+by the user.
+
+To prepare such partition, use your favourite partitioning tool. The partition
+must have the following parameters:
+
+ * Start sector .. sector 2048
+ * Partition size at least 1024 kb
+ * Partition type 0x53 (sometimes OnTrack DM6 Aux3)
+
+For example in Linux fdisk, the sequence for a clear card is the following:
+
+ * o . create a clear partition table
+ * n . create new partition
+ * p . primary partition
+ * 1 . first partition
+ * 2048 .. first sector is 2048
+ * +1M ... make the partition 1Mb big
+ * t 1 ... change first partition ID
+ * 53 change the ID to 0x53 (OnTrack DM6 Aux3)
+ * create other partitions
+ * w
[U-Boot] some USB cleanup on EfikaMX
--- a/board/efikamx/efikamx-usb.c
+++ b/board/efikamx/efikamx-usb.c
@@ -154,6 +154,7 @@ void efika_usb_phy_reset(void)
gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
}
+
/*
* Configure control registers of the USB controller
*/
@@ -161,56 +162,56 @@ void control_regs_setup(void)
{
uint32_t tmp;
- tmp = readl(OTG_BASE_ADDR + 0x800);
- tmp = ~((1 27) | (1 24) | (1 12) | (1 11));
- tmp |= 1 8;
- writel(tmp, OTG_BASE_ADDR + 0x800);
+ tmp = readl(OTG_BASE_ADDR + MX51_USB_CTRL_OFFSET);
+ tmp = ~(MX51_OTG_WUE_BIT | MX51_OTG_PM_BIT | MX51_H1_ULPI_IE_BIT |
MX51_H1_WUE_BIT);
+ tmp |= MX51_H1_PM_BIT;
+ writel(tmp, OTG_BASE_ADDR + MX51_USB_CTRL_OFFSET);
- tmp = readl(OTG_BASE_ADDR + 0x808);
- tmp = ~(1 8);
- tmp |= 1 5;
- writel(tmp, OTG_BASE_ADDR + 0x808);
+ tmp = readl(OTG_BASE_ADDR + MX51_PHY_CTRL0_OFFSET);
+ tmp = ~MX51_OTG_OVERCURD_BIT;
+ tmp |= MX51_EHCI_POWERPINSE_BIT;
+ writel(tmp, OTG_BASE_ADDR + MX51_PHY_CTRL0_OFFSET);
- tmp = readl(OTG_BASE_ADDR + 0x80c);
- tmp = ~0x3;
- tmp |= 0x1;
- writel(tmp, OTG_BASE_ADDR + 0x80c);
+ tmp = readl(OTG_BASE_ADDR + MX51_PHY_CTRL1_OFFSET);
+ tmp = ~0x3; /* make sure bits 0 and 1 are set to zero */
+ tmp |= MX51_SYSCLOCK_24_MHZ_BIT;
+ writel(tmp, OTG_BASE_ADDR + MX51_PHY_CTRL1_OFFSET);
- tmp = readl(OTG_BASE_ADDR + 0x810);
- tmp |= 1 25;
- writel(tmp, OTG_BASE_ADDR + 0x810);
+ tmp = readl(OTG_BASE_ADDR + MX51_USB_CTRL1_OFFSET);
+ tmp |= MX51_H1_EXTCLKE_BIT;
+ writel(tmp, OTG_BASE_ADDR + MX51_USB_CTRL1_OFFSET);
- tmp = readl(OTG_BASE_ADDR + 0x814);
- tmp = ~((1 8) | (1 7));
- tmp |= 1 4;
- writel(tmp, OTG_BASE_ADDR + 0x814);
+ tmp = readl(OTG_BASE_ADDR + MX51_UH2_CTRL_OFFSET);
+ tmp = ~(MX51_H2_ULPI_IE_BIT | MX51_H2_WUE_BIT);
+ //Host 2 VBUS enable controlled by Host 2 controller
+ tmp |= MX51_H2_PM_BIT;
+ writel(tmp, OTG_BASE_ADDR + MX51_UH2_CTRL_OFFSET);
udelay(1);
}
-#defineULPI_VIEWPORT(base) (base + 0x170)
void ulpi_write(u32 base, u32 reg, u32 value)
{
- if (!(readl(ULPI_VIEWPORT(base)) (1 27))) {
- writel(1 31, ULPI_VIEWPORT(base));
- while (readl(ULPI_VIEWPORT(base)) (1 31));
+ if (!(readl(ULPI_VIEWPORT(base)) MX51_ULPI_SS_BIT)) {
+ writel(MX51_ULPI_WU_BIT, ULPI_VIEWPORT(base));
+ while (readl(ULPI_VIEWPORT(base)) MX51_ULPI_WU_BIT);
}
- writel((1 30) | (1 29) | (reg 16) | (value 0xff),
ULPI_VIEWPORT(base));
- while (readl(ULPI_VIEWPORT(base)) (1 30));
+ writel(MX51_ULPI_RWRUN | MX51_ULPI_RWCTRL | (reg 16) | (value
0xff), ULPI_VIEWPORT(base));
+ while (readl(ULPI_VIEWPORT(base)) MX51_ULPI_RWRUN);
}
u32 ulpi_read(u32 base, u32 reg)
{
u32 tmp;
- if (!(readl(ULPI_VIEWPORT(base)) (1 27))) {
- writel(1 31, ULPI_VIEWPORT(base));
- while (readl(ULPI_VIEWPORT(base)) (1 31));
+ if (!(readl(ULPI_VIEWPORT(base)) MX51_ULPI_SS_BIT)) {
+ writel(MX51_ULPI_WU_BIT, ULPI_VIEWPORT(base));
+ while (readl(ULPI_VIEWPORT(base)) MX51_ULPI_WU_BIT);
}
- writel((1 30) | (reg 16), ULPI_VIEWPORT(base));
+ writel(MX51_ULPI_RWRUN | (reg 16), ULPI_VIEWPORT(base));
do {
tmp = readl(ULPI_VIEWPORT(base));
- } while (tmp (1 30));
+ } while (tmp MX51_ULPI_RWRUN);
return (tmp 8) 0xff;
}
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index 67600ed..3af7928 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -169,9 +169,46 @@
#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
#endif
+/* Register offsets for MX51 */
+#define MX51_USB_CTRL_OFFSET 0x800
+#define MX51_PHY_CTRL0_OFFSET 0x808
+#define MX51_PHY_CTRL1_OFFSET 0x80c
+#define MX51_USB_CTRL1_OFFSET 0x810
+#define MX51_UH2_CTRL_OFFSET 0x814
+
+/* Some USB_CTRL register bits*/
+#define MX51_OTG_WUE_BIT (1 27)
+#define MX51_OTG_PM_BIT(1 24)
+#define MX51_H1_ULPI_IE_BIT(1 12)
+#define MX51_H1_WUE_BIT(1 11)
+#define MX51_H1_PM_BIT (1 8)
+
+/* Some PHY_CTRL_0 register bits */
+#define MX51_OTG_OVERCURD_BIT (1 8)
+#define MX51_EHCI_POWERPINSE_BIT (1 5)
+
+/* Some PHY_CTRL_1 register bits */
+#define MX51_SYSCLOCK_24_MHZ_BIT (1 0)
+
+/* Some USB_CTRL_1 register bits*/
+#define MX51_H1_EXTCLKE_BIT(1 25)
+
+/* Some USB Host 2 CTRL register bits*/
+#define MX51_H2_ULPI_IE_BIT(1 8)
+#define MX51_H2_WUE_BIT(1 7)
+#define MX51_H2_PM_BIT (1 4)
+
+#defineULPI_VIEWPORT(base) (base + 0x170)
+/* ULPI viewport control bits */
+#define MX51_ULPI_WU_BIT (1 31)
+#define MX51_ULPI_SS_BIT (1 27)
+#define MX51_ULPI_RWRUN
Re: [U-Boot] U-Boot for AMCC Sequoia Board (PPC440EPX) fails to boot for version 2009.11-rc1 onwards
Some extra info. U-Boot dies in get_async_pci_freq() (new feature) called from board_early_init_f() when trying to read a byte from 0xC005 (CONFIG_SYS_BCSR_BASE + 5). From: Hayes,Doug Sent: Thursday, September 08, 2011 4:25 PM To: 'u-boot@lists.denx.de' Subject: U-Boot for AMCC Sequoia Board (PPC440EPX) fails to boot for version 2009.11-rc1 onwards Has anyone tried the latest U-Boot on the above board lately? I am building the U-Boot image with sequoia_config option and have found it stops booting after version 2009_08. I get no text output for the versions that I have tried: 2009.11-rc1, 2009.11, 2010.03. latest (2011.06). There were a lot of 4xx changes in 2009.11-rc1 so perhaps one of those has changed how my board comes up. I am just starting to compare code files for differences in order to track it down. I am compiling with this ELDK gcc version 4.0.0 (DENX ELDK 4.1.4.0.0). I anyone has an idea why my U-Boot hangs please let me know. Thanks for any info. Doug Hayes The information contained in this electronic mail transmission may be privileged and confidential, and therefore, protected from disclosure. If you have received this communication in error, please notify us immediately by replying to this message and deleting it from your computer without copying or disclosing it. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/6] tegra2: Add more clock/pinmux functionality
This adds to the basic clock functionality already available. The concept of a peripheral ID is introduced, and all peripheral clock access is done using this ID. Functions are provided to start, query and adjust peripheral clocks, including automatic selection of the best available clock based on the requested rate (this replaces hard-coded divisors). On the pinmux side we can now select functions for pin groups using the new pinmux_set_func() function. Expanded functions are provided to adjust and query PLL clocks. With a full compliment of clock and pinmux functions, it should no longer be necessary for board/driver code to directly access clock registers. This change removes all such accesses. This functionality will be used for I2C, SPI, LCD, USB, keyboard, NAND and other drivers for Tegra2. At then end is a patch to enable MMC on Seaboard, to make it all worthwhile. Note: These patches include a definition of assert() which I will happily remove if the one sent upstream is accepted. Simon Glass (6): tegra2: Rename CLOCK_PLL_ID to CLOCK_ID tegra2: Clean up board code a little tegra2: Add more clock functions tegra2: Rename PIN_ to PINGRP_ tegra2: Add more pinmux functions tegra2: Enable MMC for Seaboard arch/arm/cpu/armv7/tegra2/ap20.c |5 +- arch/arm/cpu/armv7/tegra2/clock.c | 840 +++- arch/arm/cpu/armv7/tegra2/pinmux.c | 540 ++- arch/arm/include/asm/arch-tegra2/clk_rst.h | 84 +-- arch/arm/include/asm/arch-tegra2/clock.h | 149 - arch/arm/include/asm/arch-tegra2/pinmux.h | 444 ++- board/nvidia/common/board.c| 243 +++-- board/nvidia/common/board.h|4 +- board/nvidia/harmony/harmony.c | 26 + board/nvidia/seaboard/seaboard.c | 35 ++- drivers/mmc/tegra2_mmc.c | 94 +-- drivers/mmc/tegra2_mmc.h |1 + 12 files changed, 1972 insertions(+), 493 deletions(-) -- 1.7.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
