Re: [U-Boot] [PATCH v5 6/6] mx6cuboxi: Load the correct 'fdtfile' variable
Hi Fabio,
On 27/04/2015 12:11, Fabio Estevam wrote:
Hi Stefano,
On Mon, Apr 27, 2015 at 4:51 AM, Stefano Babic sba...@denx.de wrote:
+int board_late_init(void)
+{
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+ if (is_hummingboard())
+ setenv(board_name, HUMMINGBOARD);
+ else
+ setenv(board_name, CUBOXI);
+
+ if (is_mx6q)
This should be is_mx6q() and not is_mx6q
You are right.
Do you want me to resend the series or could you please change it
while applying it?
No, I will apply with this change. I wanted only track why I change the
code posted to ML.
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH v5 1/6] mx6cuboxi: Fix the defconfig name
On 25/04/2015 23:47, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com The correct name of the defconfig file is 'mx6cuboxi_defconfig'. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Changes since v4: - None board/solidrun/mx6cuboxi/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/solidrun/mx6cuboxi/MAINTAINERS b/board/solidrun/mx6cuboxi/MAINTAINERS index 3d468ed..a3506c2 100644 --- a/board/solidrun/mx6cuboxi/MAINTAINERS +++ b/board/solidrun/mx6cuboxi/MAINTAINERS @@ -3,4 +3,4 @@ M:Fabio Estevam fabio.este...@freescale.com S: Maintained F: board/solidrun/mx6cuboxi/ F: include/configs/mx6cuboxi.h -F: configs/mx6cuboxi_spl_defconfig +F: configs/mx6cuboxi_defconfig Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] x86: Check PIRQ routing table sanity in the F segment
Previously the PIRQ routing table sanity check was performed against
the original table provided by the platform codes. Now we switch to
check its sanity on the final table in the F segment as this one is
the one seen by the OS.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/lib/pirq_routing.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/x86/lib/pirq_routing.c b/arch/x86/lib/pirq_routing.c
index 5a2591a..7a34dcf 100644
--- a/arch/x86/lib/pirq_routing.c
+++ b/arch/x86/lib/pirq_routing.c
@@ -110,11 +110,7 @@ void pirq_route_irqs(struct irq_info *irq, int num)
u32 copy_pirq_routing_table(u32 addr, struct irq_routing_table *rt)
{
- if (rt-signature != PIRQ_SIGNATURE || rt-version != PIRQ_VERSION ||
- rt-size % 16) {
- debug(Interrupt Routing Table not valid\n);
- return addr;
- }
+ struct irq_routing_table *rom_rt;
/* Fix up the table checksum */
rt-checksum = table_compute_checksum(rt, rt-size);
@@ -125,5 +121,17 @@ u32 copy_pirq_routing_table(u32 addr, struct
irq_routing_table *rt)
debug(Copying Interrupt Routing Table to 0x%x\n, addr);
memcpy((void *)addr, rt, rt-size);
+ /*
+* We do the sanity check here against the copied table after memcpy,
+* as something might go wrong after the memcpy, which is normally
+* due to the F segment decode is not turned on to systeam RAM.
+*/
+ rom_rt = (struct irq_routing_table *)addr;
+ if (rom_rt-signature != PIRQ_SIGNATURE ||
+ rom_rt-version != PIRQ_VERSION || rom_rt-size % 16) {
+ printf(Interrupt Routing Table not valid\n);
+ return addr;
+ }
+
return addr + rt-size;
}
--
1.8.2.1
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Re: [U-Boot] [PATCH v5 6/6] mx6cuboxi: Load the correct 'fdtfile' variable
Hi Fabio,
On 25/04/2015 23:47, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Instead of hardcoding the 'fdtfile' variable, let's detect the SoC and
board variant on the fly and change the dtb name.
Based on the scheme done on am335x board.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v4:
- None
board/solidrun/mx6cuboxi/mx6cuboxi.c | 25 +
include/configs/mx6cuboxi.h | 19 ---
2 files changed, 41 insertions(+), 3 deletions(-)
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c
b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 83410b2..e06186e 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -212,6 +212,31 @@ int checkboard(void)
return 0;
}
+static bool is_mx6q(void)
+{
+ if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
+ return true;
+ else
+ return false;
+}
+
+int board_late_init(void)
+{
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+ if (is_hummingboard())
+ setenv(board_name, HUMMINGBOARD);
+ else
+ setenv(board_name, CUBOXI);
+
+ if (is_mx6q)
This should be is_mx6q() and not is_mx6q
+ setenv(board_rev, MX6Q);
+ else
+ setenv(board_rev, MX6DL);
+#endif
+
+ return 0;
+}
+
#ifdef CONFIG_SPL_BUILD
#include asm/arch/mx6-ddr.h
static const struct mx6dq_iomux_ddr_regs mx6q_ddr_ioregs = {
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 98b48d5..b569f34 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -29,6 +29,7 @@
#define CONFIG_SYS_MALLOC_LEN(2 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART
#define CONFIG_CMD_FUSE
@@ -81,14 +82,14 @@
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONSOLE_DEV ttymxc0
#define CONFIG_MMCROOT /dev/mmcblk0p2
-#define CONFIG_DEFAULT_FDT_FILE imx6q-hummingboard.dtb
#define CONFIG_SYS_FSL_USDHC_NUM 1
#define CONFIG_SYS_MMC_ENV_DEV 0 /* SDHC2 */
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
script=boot.scr\0 \
image=zImage\0 \
- fdtfile= CONFIG_DEFAULT_FDT_FILE \0 \
+ fdtfile=undefined\0 \
fdt_addr_r=0x1800\0 \
boot_fdt=try\0 \
ip_dyn=yes\0 \
@@ -156,9 +157,21 @@
fi; \
else \
bootz; \
- fi;\0
+ fi;\0 \
+ findfdt=\
+ if test $board_name = HUMMINGBOARD test $board_rev = MX6Q ;
then \
+ setenv fdtfile imx6q-hummingboard.dtb; fi; \
+ if test $board_name = HUMMINGBOARD test $board_rev = MX6DL
; then \
+ setenv fdtfile imx6dl-hummingboard.dtb; fi; \
+ if test $board_name = CUBOXI test $board_rev = MX6Q ; then
\
+ setenv fdtfile imx6q-cubox-i.dtb; fi; \
+ if test $board_name = CUBOXI test $board_rev = MX6DL ; then
\
For the history: checkpatch compliants about the length here, but I find
it *much* more readable on one line as splitted into more lines. I will
ignore these warnings.
Best regards,
Stefano
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Re: [U-Boot] [PATCH 1/2] spl: spl_mmc: Clearer structure in spl_mmc_load_image and cosmetics
Le mardi 21 avril 2015 à 09:32 -0400, Tom Rini a écrit : On Sun, Apr 19, 2015 at 09:30:08PM +0200, Paul Kocialkowski wrote: This refactors spl_mmc_load_image to use a switch/case structure and easier to understand spl_start_uboot checks. It also drops fallbacks on boot devices that were not selected in the first place. I don't like the dropping fallback on boot devices part and this is going to break existing setups. What some people do is on platforms where the ROM doesn't grok FAT they still have u-boot.img on FAT and just keep SPL written to the raw device. Then booting from both raw or RAW+FAT works. Just sent out v2 addressing these concerns, thanks for the review! Lines that go beyond 80 chars are also reduced by reducing the number of tabs. Debug and error strings are refctored to match a common style. I like the strings having a common style. Please make sure that checkpatch is happy about how you re-indent the code too, thanks. Checkpatch is happy indeed. signature.asc Description: This is a digitally signed message part ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 6/6] mx6cuboxi: Load the correct 'fdtfile' variable
Hi Stefano,
On Mon, Apr 27, 2015 at 4:51 AM, Stefano Babic sba...@denx.de wrote:
+int board_late_init(void)
+{
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+ if (is_hummingboard())
+ setenv(board_name, HUMMINGBOARD);
+ else
+ setenv(board_name, CUBOXI);
+
+ if (is_mx6q)
This should be is_mx6q() and not is_mx6q
You are right.
Do you want me to resend the series or could you please change it
while applying it?
Thanks,
Fabio Estevam
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Re: [U-Boot] [PATCH v5 3/6] mx6cuboxi: Introduce multi-SoC support
On 25/04/2015 23:47, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Cubox-i and Hummingboard support several MX6 SoCs: mx6solo, mx6dual-lite, mx6dual and mx6quad. Add support for the different SoC/memory sizes combinations. DDR initialization values were extracted from Solid-run internal U-boot. Tested on a CuBox-i4Pro, HummingBoard-i2eX and HummingBoard-i1. Signed-off-by: Rabeeh Khoury rab...@solid-run.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 4/6] mx6cuboxi: Differentiate Cubox-i and Hummingboard
On 25/04/2015 23:47, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Introduce is_hummingboard() function that reads GPIOs that can distinguish between Cubox-i and Hummingboard. Print the board name accordingly. Based on a patch from Rabeeh Khoury. Signed-off-by: Rabeeh Khoury rab...@solid-run.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 2/6] mx6cuboxi: Prepare for multi SoC support
On 25/04/2015 23:47, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Cubox-i and Hummingboard support several MX6 SoCs: mx6solo, mx6dual-lite, mx6dual and mx6quad. Use IOMUX_PADS() macro in order to prepare for the multi-SoC support. Also pass 'MX6QDL' in the defconfig to indicate it. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 6/6] mx6cuboxi: Load the correct 'fdtfile' variable
On 25/04/2015 23:47, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Instead of hardcoding the 'fdtfile' variable, let's detect the SoC and board variant on the fly and change the dtb name. Based on the scheme done on am335x board. Signed-off-by: Fabio Estevam fabio.este...@freescale.com ---Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 5/6] mx6cuboxi: Use more standard namings for fdt variables
On 25/04/2015 23:47, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com README file suggests to use 'fdtfile' for the dtb file name and 'fdt_addr_r' for the dtb address in RAM, so do as suggested. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] sandbox: Don't try distro_bootcmd by default
Hi Sjoerd,
On 26 April 2015 at 14:31, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote:
For the distro_bootcmds to succeed on the sandbox a bit of setup is
required (e.g. network configured or host image bound), so running them
by default isn't that useful.
Add a -b/--boot command to the sandbox binary, which triggers the
distro_bootcmds to run after the other command-line commands.
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
---
Patch is against the u-boot-x86/sandbox branch
arch/sandbox/cpu/start.c | 20 +---
arch/sandbox/include/asm/state.h | 1 +
include/configs/sandbox.h| 2 ++
3 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index ec01040..ed2c569 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -77,12 +77,18 @@ int sandbox_main_loop_init(void)
struct sandbox_state *state = state_get_current();
/* Execute command if required */
- if (state-cmd) {
- int retval;
+ if (state-cmd || state-boot) {
+ int retval = 0;
cli_init();
- retval = run_command_list(state-cmd, -1, 0);
+ if (state-cmd)
+ retval = run_command_list(state-cmd, -1, 0);
+
+ if (state-boot)
+ retval = cli_simple_run_command(run distro_bootcmd,
+ 0);
+
if (!state-interactive)
os_exit(retval);
}
@@ -90,6 +96,14 @@ int sandbox_main_loop_init(void)
return 0;
}
+static int sandbox_cmdline_cb_boot(struct sandbox_state *state,
+ const char *arg)
+{
+ state-boot = true;
+ return 0;
+}
+SANDBOX_CMDLINE_OPT_SHORT(boot, 'b', 0, Run distro boot commands);
+
static int sandbox_cmdline_cb_command(struct sandbox_state *state,
const char *arg)
{
diff --git a/arch/sandbox/include/asm/state.h
b/arch/sandbox/include/asm/state.h
index a0c24ba..02d9f0f 100644
--- a/arch/sandbox/include/asm/state.h
+++ b/arch/sandbox/include/asm/state.h
@@ -42,6 +42,7 @@ struct sandbox_spi_info {
struct sandbox_state {
const char *cmd;/* Command to execute */
bool interactive; /* Enable cmdline after execute */
+ bool boot; /* Automatically run distro bootcommands */
Can you rename this to something a bit more meaningful? Perhaps
'run_distro_boot' or something similar?
const char *fdt_fname; /* Filename of FDT binary */
const char *parse_err; /* Error to report from parsing */
int argc; /* Program arguments */
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 9394dd3..9d67afc 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -127,6 +127,8 @@
func(HOST, host, 1) \
func(HOST, host, 0)
+#define CONFIG_BOOTCOMMAND
+
#include config_distro_bootcmd.h
#define CONFIG_KEEP_SERVERADDR
--
2.1.4
Regards,
Simon
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Re: [U-Boot] [PATCH v2] net/phy: refactor RTL8211F initialization
On Fri, Apr 24, 2015 at 3:57 AM, Shengzhou Liu shengzhou@freescale.com wrote: RTL8211F needs to enalbe TXDLY for RGMII during phy initialization, so move it to rtl8211f_config for early initialization. Signed-off-by: Shengzhou Liu shengzhou@freescale.com cc: Joe Hershberger joe.hershber...@gmail.com Acked-by: Joe Hershberger joe.hershber...@ni.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/11] env: Simplify the reverse_strstr() interface
Hi Joe, On 27 April 2015 at 13:31, Joe Hershberger joe.hershber...@gmail.com wrote: Hi Simon, On Mon, Apr 27, 2015 at 2:24 PM, Joe Hershberger joe.hershber...@gmail.com wrote: Hi Simon, On Thu, Apr 23, 2015 at 11:34 PM, Simon Glass s...@chromium.org wrote: Hi Joe, On 21 April 2015 at 16:02, Joe Hershberger joe.hershber...@ni.com wrote: The logic to find the whole matching name was split needlessly between the reverse_strstr function and its caller. Fully contain it to make the interface for calling it more consistent. Signed-off-by: Joe Hershberger joe.hershber...@ni.com --- common/env_attr.c | 79 +-- 1 file changed, 41 insertions(+), 38 deletions(-) You could perhaps add some environment tests in test/ for this function, or access it through getenv(), etc. I'll look into adding some unit tests for the env stuff. I'd like to reuse a bit of the unit test code from DM tests... do you have any plans to generalize some of it? Or should I take a crack at some of it (that I want to reuse)? No plans, please go ahead! Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Regression in usb-storage in u-boot 2015.04 ???
Hi Iain, On 27 March 2015 at 02:42, Iain Paton ipat...@gmail.com wrote: On 26/03/15 19:08, Hans de Goede wrote: Perhaps someone can test the reproducer on another board with usb: on an A20-OLinuXino-lime2 U-Boot SPL 2015.04-rc4-00073-g07d8f86 (Mar 27 2015 - 08:05:11) DRAM: 1024 MiB CPU: 91200Hz, AXI/AHB/APB: 3/2/2 U-Boot 2015.04-rc4-00073-g07d8f86 (Mar 27 2015 - 08:05:11) Allwinner Technology CPU: Allwinner A20 (SUN7I) I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 *** Warning - bad CRC, using default environment In:serial Out: serial Err: serial SCSI: SUNXI SCSI INIT SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: dwmac.1c5 starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 1 USB Device(s) found USB1: USB EHCI 1.00 scanning bus 1 for devices... 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Hit any key to stop autoboot: 0 sunxi# usb start sunxi# usb reset resetting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 1 USB Device(s) found USB1: USB EHCI 1.00 scanning bus 1 for devices... EHCI timed out on TD - token=0x80008c80 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found that EHCI timeout appears to be random, it pops up maybe 20% of the time. I see this also, both with and without driver model. It seems like a bit of a worry. I can repeat this on the first use of USB from boot, around 20% of the time. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 09/11] net: Apply default format rules to all ethaddr
Hi Simon,
On Thu, Apr 23, 2015 at 11:34 PM, Simon Glass s...@chromium.org wrote:
On 21 April 2015 at 16:02, Joe Hershberger joe.hershber...@ni.com wrote:
Use a regular expression to apply the default formatting flags for all
ethaddr env vars.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
include/env_flags.h | 11 ---
test/dm/eth.c | 1 +
2 files changed, 9 insertions(+), 3 deletions(-)
Reviewed-by: Simon Glass s...@chromium.org
Q below.
diff --git a/include/env_flags.h b/include/env_flags.h
index 3ef6311..fc6d0d8 100644
--- a/include/env_flags.h
+++ b/include/env_flags.h
@@ -38,13 +38,18 @@ enum env_flags_varaccess {
#endif
#ifdef CONFIG_CMD_NET
+#ifdef CONFIG_REGEX
+#define ETHADDR_WILDCARD \\d?
+#else
+#define ETHADDR_WILDCARD
+#endif
#ifdef CONFIG_ENV_OVERWRITE
-#define ETHADDR_FLAGS ethaddr:ma,
+#define ETHADDR_FLAGS eth ETHADDR_WILDCARD addr:ma,
#else
#ifdef CONFIG_OVERWRITE_ETHADDR_ONCE
-#define ETHADDR_FLAGS ethaddr:mc,
+#define ETHADDR_FLAGS eth ETHADDR_WILDCARD addr:mc,
#else
-#define ETHADDR_FLAGS ethaddr:mo,
+#define ETHADDR_FLAGS eth ETHADDR_WILDCARD addr:mo,
#endif
#endif
#else
diff --git a/test/dm/eth.c b/test/dm/eth.c
index 4891f3a..9b714a1 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -89,6 +89,7 @@ static int dm_test_eth_rotate(struct dm_test_state *dms)
/* Invalidate eth1's MAC address */
net_ping_ip = string_to_ip(1.1.2.2);
strcpy(ethaddr, getenv(eth1addr));
Can you explain this next line, please?
+ setenv(.flags, eth1addr);
This is now needed to allow the eth1addr to be modified. The env
variable .flags overrides the static list that is compiled in. Since
the regex now applies the ethaddr rules to eth\d?addr all of the
ethaddr vars are restricted to write-once by default. You'll notice in
another test where this was already overridden for ethaddr since it
already had the flags applied.
This line has the effect of changing the flags for that variable to be
default (i.e. unrestricted).
setenv(eth1addr, NULL);
/* Make sure that the default is to rotate to the next interface */
--
1.7.11.5
Regards,
Simon
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Re: [U-Boot] [PATCH v3 0/7] Add support for Colibri Vybrid Modules
Hi Tom, On 27/04/2015 19:54, Tom Rini wrote: Anything preventing this patch from getting applied? I'll pick this up soon, thanks! This should go through u-boot-imx though ;-) For the record, since they aren't quite imx platforms I didn't want to throw another SoC on someone elses plate. Stefano, do you want to handle all the Vybrid stuf in the future? Thanks! Yes, I'll do - put in my queue to be merged. Regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] x86: Correct Minnowboard instructions to use the right descriptor
Hi Tom, On 25 April 2015 at 11:54, Tom Rini tr...@konsulko.com wrote: On Sat, Apr 25, 2015 at 11:46:43AM -0600, Simon Glass wrote: The descriptor provided with the FSP does not seem to work. Update the instructions to use the descriptor from the original Intel firmware. Signed-off-by: Simon Glass s...@chromium.org --- doc/README.x86 | 23 --- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/doc/README.x86 b/doc/README.x86 index 0355d1c..fe31f3d 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -127,15 +127,32 @@ board/intel/minnowmax/fsp.bin Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same directory: board/intel/minnowmax/vga.bin -You still need two more binary blobs. These come from the sample SPI image -provided in the FSP (SPI.bin at the time of writing). +You still need two more binary blobs. The first comes from the original +firmware image available from: + +http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip + +Unzip it: + + $ unzip 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip Use ifdtool in the U-Boot tools directory to extract the images from that file, for example: + $ ./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin + +This will provide the descriptor file - copy this into the correct place: + + $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin + +Then do the same with the sample SPI image provided in the FSP (SPI.bin at +the time of writing) to obtain the last image. Note that this will also +produce a flash descriptor file, but it does not seem to work, probably +because it is not designed for the Minnowmax. That is why you need to get +the flash descriptor from the original firmware as above. + $ ./tools/ifdtool -x BayleyBay/SPI.bin $ cp flashregion_2_intel_me.bin board/intel/minnowmax/me.bin - $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin Now you can build U-Boot and obtain u-boot.rom + Then you ... to flash u-boot.rom ? :) Thanks! There are some notes at the end about using a SPI emulator - em100. Should I add something for another SPI tool also? What type of SPI programmer do you have? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/7] Add support for Colibri Vybrid Modules
On Mon, Apr 27, 2015 at 3:18 PM, Marek Vasut ma...@denx.de wrote: On Monday, April 27, 2015 at 07:54:15 PM, Tom Rini wrote: [...] Ping!? Anything preventing this patch from getting applied? I'll pick this up soon, thanks! This should go through u-boot-imx though ;-) For the record, since they aren't quite imx platforms I didn't want to throw another SoC on someone elses plate. Stefano, do you want to handle all the Vybrid stuf in the future? Thanks! How are those not imx platform ? They look imx inside out ... it's just the naming which is weird. I agree; this is very close to i.MX and can go through the imx tree. -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 09/11] net: Apply default format rules to all ethaddr
Hi Joe,
On 27 April 2015 at 13:35, Joe Hershberger joe.hershber...@gmail.com wrote:
Hi Simon,
On Thu, Apr 23, 2015 at 11:34 PM, Simon Glass s...@chromium.org wrote:
On 21 April 2015 at 16:02, Joe Hershberger joe.hershber...@ni.com wrote:
Use a regular expression to apply the default formatting flags for all
ethaddr env vars.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
include/env_flags.h | 11 ---
test/dm/eth.c | 1 +
2 files changed, 9 insertions(+), 3 deletions(-)
Reviewed-by: Simon Glass s...@chromium.org
Q below.
diff --git a/include/env_flags.h b/include/env_flags.h
index 3ef6311..fc6d0d8 100644
--- a/include/env_flags.h
+++ b/include/env_flags.h
@@ -38,13 +38,18 @@ enum env_flags_varaccess {
#endif
#ifdef CONFIG_CMD_NET
+#ifdef CONFIG_REGEX
+#define ETHADDR_WILDCARD \\d?
+#else
+#define ETHADDR_WILDCARD
+#endif
#ifdef CONFIG_ENV_OVERWRITE
-#define ETHADDR_FLAGS ethaddr:ma,
+#define ETHADDR_FLAGS eth ETHADDR_WILDCARD addr:ma,
#else
#ifdef CONFIG_OVERWRITE_ETHADDR_ONCE
-#define ETHADDR_FLAGS ethaddr:mc,
+#define ETHADDR_FLAGS eth ETHADDR_WILDCARD addr:mc,
#else
-#define ETHADDR_FLAGS ethaddr:mo,
+#define ETHADDR_FLAGS eth ETHADDR_WILDCARD addr:mo,
#endif
#endif
#else
diff --git a/test/dm/eth.c b/test/dm/eth.c
index 4891f3a..9b714a1 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -89,6 +89,7 @@ static int dm_test_eth_rotate(struct dm_test_state *dms)
/* Invalidate eth1's MAC address */
net_ping_ip = string_to_ip(1.1.2.2);
strcpy(ethaddr, getenv(eth1addr));
Can you explain this next line, please?
+ setenv(.flags, eth1addr);
This is now needed to allow the eth1addr to be modified. The env
variable .flags overrides the static list that is compiled in. Since
the regex now applies the ethaddr rules to eth\d?addr all of the
ethaddr vars are restricted to write-once by default. You'll notice in
another test where this was already overridden for ethaddr since it
already had the flags applied.
This line has the effect of changing the flags for that variable to be
default (i.e. unrestricted).
OK I see. Would you mind adding this comment here in the code?
setenv(eth1addr, NULL);
/* Make sure that the default is to rotate to the next interface */
--
1.7.11.5
Regards,
Simon
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Re: [U-Boot] [PATCH 00/11] Improve env var handling for net stack
On Mon, Apr 27, 2015 at 2:53 PM, Simon Glass s...@chromium.org wrote: Hi Joe, On 27 April 2015 at 12:20, Joe Hershberger joe.hershber...@gmail.com wrote: Hi Simon, On Thu, Apr 23, 2015 at 11:32 PM, Simon Glass s...@chromium.org wrote: Hi Joe, On 21 April 2015 at 16:02, Joe Hershberger joe.hershber...@ni.com wrote: This includes moving CONFIG_REGEX to Kconfig and adding support for regex to the env_attr lists (when CONFIG_REGEX is enabled). This allows ethaddrs to all be checked for access and format by default. Also use callbacks to keep network stack variables up to date instead of polling them on each call to net_loop. This is a step in the right direction to refactoring the network stack to be similar to that of barebox. Joe Hershberger (11): sandbox: Enable some ENV commands kconfig: Move REGEX to Kconfig sandbox: Enable regex support env: Fix return values in env_attr_lookup() env: Simplify the reverse_strstr() interface env: Allow env_attr_walk to pass a priv * to callback env: Add regex support to env_attrs env: Distinguish finer between source of env change net: Apply default format rules to all ethaddr net: Use env callbacks for net variables net: Add default flags for common net env vars common/cmd_nvedit.c| 36 +--- common/env_attr.c | 179 - common/env_callback.c | 6 +- common/env_flags.c | 6 +- configs/acadia_defconfig | 1 + configs/bamboo_defconfig | 1 + configs/bubinga_defconfig | 1 + configs/canyonlands_defconfig | 1 + configs/dlvision-10g_defconfig | 1 + configs/dlvision_defconfig | 1 + configs/ebony_defconfig| 1 + configs/gdppc440etx_defconfig | 1 + configs/icon_defconfig | 1 + configs/intip_defconfig| 1 + configs/io64_defconfig | 1 + configs/io_defconfig | 1 + configs/iocon_defconfig| 1 + configs/katmai_defconfig | 1 + configs/kilauea_defconfig | 1 + configs/luan_defconfig | 1 + configs/m28evk_defconfig | 1 + configs/m53evk_defconfig | 1 + configs/makalu_defconfig | 1 + configs/neo_defconfig | 1 + configs/novena_defconfig | 1 + configs/ocotea_defconfig | 1 + configs/redwood_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/sequoia_defconfig | 1 + configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/t3corp_defconfig | 1 + configs/taihu_defconfig| 1 + configs/taishan_defconfig | 1 + configs/walnut_defconfig | 1 + configs/yosemite_defconfig | 1 + configs/yucca_defconfig| 1 + include/configs/amcc-common.h | 1 - include/configs/m28evk.h | 1 - include/configs/m53evk.h | 1 - include/configs/novena.h | 1 - include/configs/sandbox.h | 5 ++ include/configs/socfpga_arria5.h | 1 - include/configs/socfpga_cyclone5.h | 1 - include/env_attr.h | 10 +-- include/env_callback.h | 32 ++- include/env_flags.h| 23 - include/search.h | 2 + lib/Kconfig| 8 ++ net/net.c | 105 ++ test/dm/eth.c | 1 + 51 files changed, 358 insertions(+), 94 deletions(-) Looks good! I wonder if you could update a README somewhere to explain how it works? I'll update README to describe it. If I understand correctly, you need to enable CONFIG_REGEX for the eth1addr variable to work (for example). Is that right? If so, what is the code size impact? That's sort-of correct. Before the regex, only the ethaddr was checked for format, though the eth1addr, etc. all worked, just were unverified. I did some build tests... Without CONFIG_REGEX, the total size grew by 295 bytes (due to the other global changes). With CONFIG_REGEX enabled, the total size grew by 378 bytes. Enabling CONFIG_REGEX now adds 3633 bytes total. Probably because it is now actually being used? Perhaps I was unclear... Enabling CONFIG_REGEX for a target used to add 3550 bytes total (it was already used in env grep command and setexpr sub/gsub). So that means the code for using that lib on the env_attr names is only 83 bytes. This is definitely a size increase but IMO it is worth it and those using networking are likely less size-sensitive. I agree. This test was on BB Black (ARM). Raw data: textdata bss dec hex filename W/ patch W/O regex 394014 13324 305876 713214 ae1fe /tmp/u-boot-build/arm/u-boot W/ patch W/ regex
Re: [U-Boot] [PATCH 10/11] net: Use env callbacks for net variables
Hi Simon,
On Thu, Apr 23, 2015 at 11:34 PM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 21 April 2015 at 16:02, Joe Hershberger joe.hershber...@ni.com wrote:
Instead of checking for changes to the env each time we enter the
net_loop, use the env callbacks to update the values of the variables.
Don't update the variables when the source was programmatic, since the
variables were the source of the new value.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
include/env_callback.h | 22 ++-
net/net.c | 105
+
2 files changed, 110 insertions(+), 17 deletions(-)
Reviewed-by: Simon Glass s...@chromium.org
Q below.
diff --git a/include/env_callback.h b/include/env_callback.h
index 3de1093..91f3cc0 100644
--- a/include/env_callback.h
+++ b/include/env_callback.h
@@ -37,6 +37,26 @@
#define ENV_DOT_ESCAPE
#endif
+#ifdef CONFIG_CMD_DNS
+#define DNS_CALLBACK dnsip:dnsip,
+#else
+#define DNS_CALLBACK
+#endif
+
+#ifdef CONFIG_NET
+#define NET_CALLBACKS \
+ bootfile:bootfile, \
+ ipaddr:ipaddr, \
+ gatewayip:gatewayip, \
+ netmask:netmask, \
+ serverip:serverip, \
+ nvlan:nvlan, \
+ vlan:vlan, \
+ DNS_CALLBACK
+#else
+#define NET_CALLBACKS
+#endif
+
/*
* This list of callback bindings is static, but may be overridden by
defining
* a new association in the .callbacks environment variable.
@@ -44,7 +64,7 @@
#define ENV_CALLBACK_LIST_STATIC ENV_DOT_ESCAPE ENV_CALLBACK_VAR
:callbacks, \
ENV_DOT_ESCAPE ENV_FLAGS_VAR :flags, \
baudrate:baudrate, \
- bootfile:bootfile, \
+ NET_CALLBACKS \
loadaddr:loadaddr, \
SILENT_CALLBACK \
SPLASHIMAGE_CALLBACK \
diff --git a/net/net.c b/net/net.c
index a365df0..57111ad 100644
--- a/net/net.c
+++ b/net/net.c
@@ -208,6 +208,9 @@ int __maybe_unused net_busy_flag;
static int on_bootfile(const char *name, const char *value, enum env_op op,
int flags)
{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
switch (op) {
case env_op_create:
case env_op_overwrite:
@@ -222,6 +225,92 @@ static int on_bootfile(const char *name, const char
*value, enum env_op op,
}
U_BOOT_ENV_CALLBACK(bootfile, on_bootfile);
+static int on_ipaddr(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
Can you just do this?
if (flags H_PROGRAMMATIC)
Probably so, since it's not likely that we'll make a 4th state that
combines these flags even though they are all mutually exclusive.
+ return 0;
+
+ net_ip = string_to_ip(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(ipaddr, on_ipaddr);
+
+static int on_gatewayip(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_gateway = string_to_ip(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(gatewayip, on_gatewayip);
+
+static int on_netmask(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_netmask = string_to_ip(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(netmask, on_netmask);
+
+static int on_serverip(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_server_ip = string_to_ip(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(serverip, on_serverip);
+
+static int on_nvlan(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_native_vlan = string_to_vlan(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(nvlan, on_nvlan);
+
+static int on_vlan(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_our_vlan = string_to_vlan(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(vlan, on_vlan);
+
+#if defined(CONFIG_CMD_DNS)
+static int on_dnsip(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ if ((flags H_ORIGIN_FLAGS) == H_PROGRAMMATIC)
+ return 0;
+
+ net_dns_server = string_to_ip(value);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(dnsip, on_dnsip);
+#endif
+
/*
* Check if autoload is enabled. If so, use either NFS or TFTP to download
* the boot file.
@@ -252,22 +341,6 @@ void net_auto_load(void)
static void net_init_loop(void)
{
- static int env_changed_id;
- int env_id =
Re: [U-Boot] [PATCH 00/11] Improve env var handling for net stack
Hi Joe, On 27 April 2015 at 12:20, Joe Hershberger joe.hershber...@gmail.com wrote: Hi Simon, On Thu, Apr 23, 2015 at 11:32 PM, Simon Glass s...@chromium.org wrote: Hi Joe, On 21 April 2015 at 16:02, Joe Hershberger joe.hershber...@ni.com wrote: This includes moving CONFIG_REGEX to Kconfig and adding support for regex to the env_attr lists (when CONFIG_REGEX is enabled). This allows ethaddrs to all be checked for access and format by default. Also use callbacks to keep network stack variables up to date instead of polling them on each call to net_loop. This is a step in the right direction to refactoring the network stack to be similar to that of barebox. Joe Hershberger (11): sandbox: Enable some ENV commands kconfig: Move REGEX to Kconfig sandbox: Enable regex support env: Fix return values in env_attr_lookup() env: Simplify the reverse_strstr() interface env: Allow env_attr_walk to pass a priv * to callback env: Add regex support to env_attrs env: Distinguish finer between source of env change net: Apply default format rules to all ethaddr net: Use env callbacks for net variables net: Add default flags for common net env vars common/cmd_nvedit.c| 36 +--- common/env_attr.c | 179 - common/env_callback.c | 6 +- common/env_flags.c | 6 +- configs/acadia_defconfig | 1 + configs/bamboo_defconfig | 1 + configs/bubinga_defconfig | 1 + configs/canyonlands_defconfig | 1 + configs/dlvision-10g_defconfig | 1 + configs/dlvision_defconfig | 1 + configs/ebony_defconfig| 1 + configs/gdppc440etx_defconfig | 1 + configs/icon_defconfig | 1 + configs/intip_defconfig| 1 + configs/io64_defconfig | 1 + configs/io_defconfig | 1 + configs/iocon_defconfig| 1 + configs/katmai_defconfig | 1 + configs/kilauea_defconfig | 1 + configs/luan_defconfig | 1 + configs/m28evk_defconfig | 1 + configs/m53evk_defconfig | 1 + configs/makalu_defconfig | 1 + configs/neo_defconfig | 1 + configs/novena_defconfig | 1 + configs/ocotea_defconfig | 1 + configs/redwood_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/sequoia_defconfig | 1 + configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/t3corp_defconfig | 1 + configs/taihu_defconfig| 1 + configs/taishan_defconfig | 1 + configs/walnut_defconfig | 1 + configs/yosemite_defconfig | 1 + configs/yucca_defconfig| 1 + include/configs/amcc-common.h | 1 - include/configs/m28evk.h | 1 - include/configs/m53evk.h | 1 - include/configs/novena.h | 1 - include/configs/sandbox.h | 5 ++ include/configs/socfpga_arria5.h | 1 - include/configs/socfpga_cyclone5.h | 1 - include/env_attr.h | 10 +-- include/env_callback.h | 32 ++- include/env_flags.h| 23 - include/search.h | 2 + lib/Kconfig| 8 ++ net/net.c | 105 ++ test/dm/eth.c | 1 + 51 files changed, 358 insertions(+), 94 deletions(-) Looks good! I wonder if you could update a README somewhere to explain how it works? I'll update README to describe it. If I understand correctly, you need to enable CONFIG_REGEX for the eth1addr variable to work (for example). Is that right? If so, what is the code size impact? That's sort-of correct. Before the regex, only the ethaddr was checked for format, though the eth1addr, etc. all worked, just were unverified. I did some build tests... Without CONFIG_REGEX, the total size grew by 295 bytes (due to the other global changes). With CONFIG_REGEX enabled, the total size grew by 378 bytes. Enabling CONFIG_REGEX now adds 3633 bytes total. Probably because it is now actually being used? This is definitely a size increase but IMO it is worth it and those using networking are likely less size-sensitive. This test was on BB Black (ARM). Raw data: textdata bss dec hex filename W/ patch W/O regex 394014 13324 305876 713214 ae1fe /tmp/u-boot-build/arm/u-boot W/ patch W/ regex 397651 13324 305872 716847 af02f /tmp/u-boot-build/arm/u-boot W/O patch W/O regex 393811 13276 305832 712919 ae0d7 /tmp/u-boot-build/arm/u-boot W/O patch W/ regex 397333 13276 305860 716469 aeeb5 /tmp/u-boot-build/arm/u-boot Cheers, -Joe Regards, Simon
Re: [U-Boot] [PATCH v3 0/7] Add support for Colibri Vybrid Modules
On Monday, April 27, 2015 at 10:00:01 PM, Otavio Salvador wrote: On Mon, Apr 27, 2015 at 3:18 PM, Marek Vasut ma...@denx.de wrote: On Monday, April 27, 2015 at 07:54:15 PM, Tom Rini wrote: [...] Ping!? Anything preventing this patch from getting applied? I'll pick this up soon, thanks! This should go through u-boot-imx though ;-) For the record, since they aren't quite imx platforms I didn't want to throw another SoC on someone elses plate. Stefano, do you want to handle all the Vybrid stuf in the future? Thanks! How are those not imx platform ? They look imx inside out ... it's just the naming which is weird. I agree; this is very close to i.MX and can go through the imx tree. I'm having second thoughts :b Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Regression in usb-storage in u-boot 2015.04 ???
On Monday, April 27, 2015 at 09:57:52 PM, Simon Glass wrote: Hi Iain, On 27 March 2015 at 02:42, Iain Paton ipat...@gmail.com wrote: On 26/03/15 19:08, Hans de Goede wrote: Perhaps someone can test the reproducer on another board with usb: on an A20-OLinuXino-lime2 U-Boot SPL 2015.04-rc4-00073-g07d8f86 (Mar 27 2015 - 08:05:11) DRAM: 1024 MiB CPU: 91200Hz, AXI/AHB/APB: 3/2/2 U-Boot 2015.04-rc4-00073-g07d8f86 (Mar 27 2015 - 08:05:11) Allwinner Technology CPU: Allwinner A20 (SUN7I) I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 *** Warning - bad CRC, using default environment In:serial Out: serial Err: serial SCSI: SUNXI SCSI INIT SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: dwmac.1c5 starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 1 USB Device(s) found USB1: USB EHCI 1.00 scanning bus 1 for devices... 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Hit any key to stop autoboot: 0 sunxi# usb start sunxi# usb reset resetting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 1 USB Device(s) found USB1: USB EHCI 1.00 scanning bus 1 for devices... EHCI timed out on TD - token=0x80008c80 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found that EHCI timeout appears to be random, it pops up maybe 20% of the time. I see this also, both with and without driver model. It seems like a bit of a worry. I can repeat this on the first use of USB from boot, around 20% of the time. Just a random guess -- Try enabling cache debugging, maybe it's some alignment problem somewhere? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/3] x86: quark: Implement PIRQ routing
Intel Quark SoC has the same interrupt routing mechanism as the
Queensbay platform, only the difference is that PCI devices'
INTA/B/C/D are harcoded and cannot be changed freely.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/cpu/quark/Makefile | 2 +-
arch/x86/cpu/quark/irq.c | 173 +++
arch/x86/cpu/quark/quark.c | 8 ++
arch/x86/include/asm/arch-quark/device.h | 70 ++---
arch/x86/include/asm/arch-quark/irq.h| 55 ++
arch/x86/include/asm/arch-quark/quark.h | 15 +++
configs/galileo_defconfig| 1 +
include/configs/galileo.h| 1 +
8 files changed, 309 insertions(+), 16 deletions(-)
create mode 100644 arch/x86/cpu/quark/irq.c
create mode 100644 arch/x86/include/asm/arch-quark/irq.h
diff --git a/arch/x86/cpu/quark/Makefile b/arch/x86/cpu/quark/Makefile
index e87b424..1e37802 100644
--- a/arch/x86/cpu/quark/Makefile
+++ b/arch/x86/cpu/quark/Makefile
@@ -4,6 +4,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += car.o dram.o msg_port.o quark.o
+obj-y += car.o dram.o irq.o msg_port.o quark.o
obj-y += mrc.o mrc_util.o hte.o smc.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/quark/irq.c b/arch/x86/cpu/quark/irq.c
new file mode 100644
index 000..d6edd0c
--- /dev/null
+++ b/arch/x86/cpu/quark/irq.c
@@ -0,0 +1,173 @@
+/*
+ * Copyright (C) 2015, Bin Meng bmeng...@gmail.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include errno.h
+#include malloc.h
+#include asm/io.h
+#include asm/pci.h
+#include asm/post.h
+#include asm/processor.h
+#include asm/pirq_routing.h
+#include asm/arch/device.h
+#include asm/arch/quark.h
+#include asm/arch/irq.h
+
+static struct irq_routing_table *pirq_routing_table;
+
+bool pirq_check_irq_routed(int link, u8 irq)
+{
+ u8 pirq;
+
+ pirq = x86_pci_read_config8(QUARK_LEGACY_BRIDGE, LINK_N2V(link));
+ pirq = 0xf;
+
+ /* IRQ# 0/1/2/8/13 are reserved */
+ if (pirq 3 || pirq == 8 || pirq == 13)
+ return false;
+
+ return pirq == irq ? true : false;
+}
+
+int pirq_translate_link(int link)
+{
+ return LINK_V2N(link);
+}
+
+void pirq_assign_irq(int link, u8 irq)
+{
+ /* IRQ# 0/1/2/8/13 are reserved */
+ if (irq 3 || irq == 8 || irq == 13)
+ return;
+
+ x86_pci_write_config8(QUARK_LEGACY_BRIDGE, LINK_N2V(link), irq);
+}
+
+static inline void fill_irq_info(struct irq_info **slotp, int *entries, u8 bus,
+u8 device, u8 func, u8 pin, u8 pirq)
+{
+ struct irq_info *slot = *slotp;
+
+ slot-bus = bus;
+ slot-devfn = (device 3) | func;
+ slot-irq[pin - 1].link = LINK_N2V(pirq);
+ slot-irq[pin - 1].bitmap = PIRQ_BITMAP;
+ (*entries)++;
+ (*slotp)++;
+}
+
+__weak int board_fill_irq_info(struct irq_info *slot)
+{
+ return 0;
+}
+
+static int create_pirq_routing_table(void)
+{
+ struct irq_routing_table *rt;
+ struct irq_info *slot;
+ int irq_entries = 0;
+
+ rt = malloc(sizeof(struct irq_routing_table));
+ if (!rt)
+ return -ENOMEM;
+ memset((char *)rt, 0, sizeof(struct irq_routing_table));
+
+ /* Populate the PIRQ table fields */
+ rt-signature = PIRQ_SIGNATURE;
+ rt-version = PIRQ_VERSION;
+ rt-rtr_bus = 0;
+ rt-rtr_devfn = (QUARK_LGC_BRIDGE_DEV 3) | QUARK_LGC_BRIDGE_FUNC;
+ rt-rtr_vendor = PCI_VENDOR_ID_INTEL;
+ rt-rtr_device = PCI_DEVICE_ID_INTEL_ICH7_31;
+
+ slot = rt-slots;
+
+ /* Now fill in the irq_info entries in the PIRQ table */
+ fill_irq_info(slot, irq_entries, 0, QUARK_DEV_20,
+ QUARK_MMC_SDIO_FUNC, INTA, PIRQE);
+ fill_irq_info(slot, irq_entries, 0, QUARK_DEV_20,
+ QUARK_UART0_FUNC, INTB, PIRQF);
+ fill_irq_info(slot, irq_entries, 0, QUARK_DEV_20,
+ QUARK_USB_DEVICE_FUNC, INTC, PIRQG);
+ fill_irq_info(slot, irq_entries, 0, QUARK_DEV_20,
+ QUARK_USB_EHCI_FUNC, INTD, PIRQH);
+ fill_irq_info(slot, irq_entries, 0, QUARK_DEV_20,
+ QUARK_USB_OHCI_FUNC, INTD, PIRQH);
+ fill_irq_info(slot, irq_entries, 0, QUARK_DEV_20,
+ QUARK_UART1_FUNC, INTB, PIRQF);
+ fill_irq_info(slot, irq_entries, 0, QUARK_DEV_20,
+ QUARK_EMAC0_FUNC, INTC, PIRQG);
+ fill_irq_info(slot, irq_entries, 0, QUARK_DEV_20,
+ QUARK_EMAC1_FUNC, INTC, PIRQG);
+
+ fill_irq_info(slot, irq_entries, 0, QUARK_DEV_21,
+ QUARK_SPI0_FUNC, INTA, PIRQE);
+ fill_irq_info(slot, irq_entries, 0, QUARK_DEV_21,
+ QUARK_SPI1_FUNC, INTA, PIRQE);
+ fill_irq_info(slot, irq_entries, 0, QUARK_DEV_21,
+ QUARK_I2C_GPIO_FUNC, INTC, PIRQG);
+
+ /*
+* TODO:
+*
+* For some unknown
[U-Boot] [PATCH 2/3] x86: quark: Turn on legacy segments decode
By default the legacy segments (Ah-Bh, Eh-Fh)
do not decode to system RAM. Turn on the decode so that we can
write configuration tables in the F segment.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/cpu/quark/quark.c | 12
arch/x86/include/asm/arch-quark/quark.h | 7 +++
2 files changed, 19 insertions(+)
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index e4b19c2..4ffa437 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -72,6 +72,15 @@ static void quark_setup_bars(void)
CONFIG_PCIE_ECAM_BASE | MEM_BAR_EN);
}
+static void quark_enable_legacy_seg(void)
+{
+ u32 hmisc2;
+
+ hmisc2 = msg_port_read(MSG_PORT_HOST_BRIDGE, HMISC2);
+ hmisc2 |= (HMISC2_SEGE | HMISC2_SEGF | HMISC2_SEGAB);
+ msg_port_write(MSG_PORT_HOST_BRIDGE, HMISC2, hmisc2);
+}
+
int arch_cpu_init(void)
{
struct pci_controller *hose;
@@ -96,6 +105,9 @@ int arch_cpu_init(void)
*/
quark_setup_bars();
+ /* Turn on legacy segments (A/B/E/F) decode to system RAM */
+ quark_enable_legacy_seg();
+
unprotect_spi_flash();
return 0;
diff --git a/arch/x86/include/asm/arch-quark/quark.h
b/arch/x86/include/asm/arch-quark/quark.h
index ceb583e..6dd02fd 100644
--- a/arch/x86/include/asm/arch-quark/quark.h
+++ b/arch/x86/include/asm/arch-quark/quark.h
@@ -21,6 +21,13 @@
/* Port 0x03: Host Bridge Message Port Registers */
+/* Host Miscellaneous Controls 2 */
+#define HMISC2 0x03
+
+#define HMISC2_SEGE0x0002
+#define HMISC2_SEGF0x0004
+#define HMISC2_SEGAB 0x0010
+
/* Host Memory I/O Boundary */
#define HM_BOUND 0x08
--
1.8.2.1
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Re: [U-Boot] installing u-boot on a virtual x86 machine
2015-04-25 1:04 GMT+02:00 Bin Meng bmeng...@gmail.com: Hi Francesco, On Fri, Apr 24, 2015 at 3:20 PM, Francesco Lucconi lucc...@gmail.com wrote: I'm Francesco Lucconi from Italy, and I'm involved into a x86 project where my issue is to compile a u-boot (I'm currently using uboot-2015.01) and to install it into a VID (virtual image disk) of virtualbox. I've already tuned the MBR, registering two FAT16 partitions, one for u-boot and the other one for future kernel uImage and firmware development. In this moment I figured out that I've installed correctly the MBR cause I can see on the display strings I've applied on the MBR source code but it seems that u-boot.bin code doesn't run correctly, the system hangs out Could you give me any tips I didn't notice before? Could you elaborate more on what BIOS is being used, and what MBR codes is that? Is it grub? Regards, Bin @Simon Glass: About u-boot I'm using coreboot_x86 config, and with u-boot.srec I noticed that I received several prints of startup ( like this .. ) but later the virtual machine hangs up. @Bin Meng: I'm using BIOS embedded of Virtualbox platform and I've customized the 512 bytes MBR data with several debug prints and with the partitions table based on the features of my FAT16 partitions. Regards, Francesco ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Regression in usb-storage in u-boot 2015.04 ???
Hi, On 27-04-15 03:09, Marek Vasut wrote: On Friday, March 27, 2015 at 09:47:25 AM, Hans de Goede wrote: Hi, Hi! [...] scanning usb for storage devices... 1 Storage Device(s) found that EHCI timeout appears to be random, it pops up maybe 20% of the time. tried with a few different usb sticks and couldn't reproduce it. Thanks that confirms that it is a musb issue, and likely one which has been around for ages. Are there any updates on this musb issue please ? No, since most people who are doing usb booting are using boards with a proper ehci usb controller I've not investigated this further. Also this only happens after a usb reset, the first time the storage device works fine, iow this is a corner case. I agree it would be nice to fix it, but -ENOTIME. Regards, Hans ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] socfpga: implement arria V socdk SPI flash config in dts
On Mon 2015-04-27 03:08:27, Marek Vasut wrote: On Saturday, April 25, 2015 at 09:36:16 PM, Pavel Machek wrote: Arria V SocDK has same QSPI and SPI flash configuration as Socrates. Add support for it. Signed-off-by: Pavel Machek pa...@denx.de diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts index 4e529a1..1b86897 100644 --- a/arch/arm/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/dts/socfpga_arria5_socdk.dts I was just curious about this, but why are your patches missing diffstat ? diffstat was never required part of a patch. btw. I presume that there is no opposition to this patch, in my opinion it's perfectly OK. So this means thank you, applied? Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] spl: spl_mmc: Clearer structure in spl_mmc_load_image and cosmetics
This refactors spl_mmc_load_image to use a switch/case structure and easier
to understand spl_start_uboot checks. This also introduces some more automatic
fallback on the next mmc boot mode as long as it keeps failing.
Lines that go beyond 80 chars are also reduced by reducing the number of tabs.
Debug and error strings are refctored to match a common style.
Signed-off-by: Paul Kocialkowski cont...@paulk.fr
---
common/spl/spl_mmc.c | 124 +--
1 file changed, 70 insertions(+), 54 deletions(-)
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index e580f22..d8be1f0 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -21,7 +21,7 @@ static int mmc_load_image_raw_sector(struct mmc *mmc,
unsigned long sector)
struct image_header *header;
header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
- sizeof(struct image_header));
+sizeof(struct image_header));
/* read image header to find the image size load address */
err = mmc-block_dev.block_read(0, sector, 1, header);
@@ -35,7 +35,7 @@ static int mmc_load_image_raw_sector(struct mmc *mmc,
unsigned long sector)
/* convert size to sectors - round up */
image_size_sectors = (spl_image.size + mmc-read_bl_len - 1) /
- mmc-read_bl_len;
+mmc-read_bl_len;
/* Read the header too to avoid extra memcpy */
err = mmc-block_dev.block_read(0, sector, image_size_sectors,
@@ -44,7 +44,7 @@ static int mmc_load_image_raw_sector(struct mmc *mmc,
unsigned long sector)
end:
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
if (err == 0)
- printf(spl: mmc blk read err - %lu\n, err);
+ printf(spl: mmc block read error\n);
#endif
return (err == 0);
@@ -69,33 +69,37 @@ static int mmc_load_image_raw_partition(struct mmc *mmc,
int partition)
#ifdef CONFIG_SPL_OS_BOOT
static int mmc_load_image_raw_os(struct mmc *mmc)
{
- if (!mmc-block_dev.block_read(0,
- CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
- CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS,
- (void *)CONFIG_SYS_SPL_ARGS_ADDR)) {
+ unsigned long err;
+
+ err = mmc-block_dev.block_read(0,
+ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
+ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS,
+ (void *)CONFIG_SYS_SPL_ARGS_ADDR);
+ if (err) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
- printf(mmc args blk read error\n);
+ printf(spl: mmc block read error\n);
#endif
return -1;
}
return mmc_load_image_raw_sector(mmc,
-
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR);
+ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR);
}
#endif
void spl_mmc_load_image(void)
{
struct mmc *mmc;
- int err;
u32 boot_mode;
+ int err;
mmc_initialize(gd-bd);
+
/* We register only one device. So, the dev id is always 0 */
mmc = find_mmc_device(0);
if (!mmc) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
- puts(spl: mmc device not found!!\n);
+ puts(spl: mmc device not found\n);
#endif
hang();
}
@@ -103,16 +107,22 @@ void spl_mmc_load_image(void)
err = mmc_init(mmc);
if (err) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
- printf(spl: mmc init failed: err - %d\n, err);
+ printf(spl: mmc init failed with error: %d\n, err);
#endif
hang();
}
boot_mode = spl_boot_mode();
- if (boot_mode == MMCSD_MODE_RAW) {
- debug(boot mode - RAW\n);
+ switch (boot_mode) {
+ case MMCSD_MODE_RAW:
+ debug(spl: mmc boot mode: raw\n);
+
#ifdef CONFIG_SPL_OS_BOOT
- if (spl_start_uboot() || mmc_load_image_raw_os(mmc))
+ if (!spl_start_uboot()) {
+ err = mmc_load_image_raw_os(mmc);
+ if (!err)
+ return;
+ }
#endif
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
err = mmc_load_image_raw_partition(mmc,
@@ -121,34 +131,45 @@ void spl_mmc_load_image(void)
err = mmc_load_image_raw_sector(mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
#endif
+ if (!err)
+ return;
#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
- }
- if (err || boot_mode == MMCSD_MODE_FS) {
- debug(boot mode - FS\n);
+ case MMCSD_MODE_FS:
+ debug(spl: mmc boot mode: fs\n);
+
#ifdef
[U-Boot] [PATCH v2 2/2] spl: spl_mmc: Partition raw boot mode for eMMC
This adds support for providing a partition number instead of a sector for eMMC. Signed-off-by: Paul Kocialkowski cont...@paulk.fr --- common/spl/spl_mmc.c | 5 + 1 file changed, 5 insertions(+) diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index d8be1f0..9d8af51 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -194,8 +194,13 @@ void spl_mmc_load_image(void) return; } #endif +#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION + err = mmc_load_image_raw_partition(mmc, + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION); +#else err = mmc_load_image_raw_sector(mmc, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR); +#endif if (!err) return; #endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] t4240qds: apply some updates
From: Shaohui Xie shaohui@freescale.com
1. board/freescale/t4qds/t4_rcw.cfg
1.8GHz support is requested as default frequency, so update the rcw.
2. remove un-used configs
configs/T4160QDS_SPIFLASH_defconfig
configs/T4240QDS_SPIFLASH_defconfig
SPI boot is not available on T4QDS, so the configs should be removed.
3. board/freescale/t4qds/MAINTAINERS
Updated MAINTAINERS accordingly.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
board/freescale/t4qds/MAINTAINERS | 4 +---
board/freescale/t4qds/t4_rcw.cfg| 2 +-
configs/T4160QDS_SPIFLASH_defconfig | 4
configs/T4240QDS_SPIFLASH_defconfig | 4
4 files changed, 2 insertions(+), 12 deletions(-)
delete mode 100644 configs/T4160QDS_SPIFLASH_defconfig
delete mode 100644 configs/T4240QDS_SPIFLASH_defconfig
diff --git a/board/freescale/t4qds/MAINTAINERS
b/board/freescale/t4qds/MAINTAINERS
index f88ee7d..57635ab 100644
--- a/board/freescale/t4qds/MAINTAINERS
+++ b/board/freescale/t4qds/MAINTAINERS
@@ -1,16 +1,14 @@
T4QDS BOARD
-#M:-
+M: Shaohui Xie shaohui@freescale.com
S: Maintained
F: board/freescale/t4qds/
F: include/configs/T4240QDS.h
F: configs/T4160QDS_defconfig
F: configs/T4160QDS_NAND_defconfig
F: configs/T4160QDS_SDCARD_defconfig
-F: configs/T4160QDS_SPIFLASH_defconfig
F: configs/T4240QDS_defconfig
F: configs/T4240QDS_NAND_defconfig
F: configs/T4240QDS_SDCARD_defconfig
-F: configs/T4240QDS_SPIFLASH_defconfig
F: configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
T4160QDS_SECURE_BOOT BOARD
diff --git a/board/freescale/t4qds/t4_rcw.cfg b/board/freescale/t4qds/t4_rcw.cfg
index 6f09a7b..267494c 100644
--- a/board/freescale/t4qds/t4_rcw.cfg
+++ b/board/freescale/t4qds/t4_rcw.cfg
@@ -1,7 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
#serdes protocol 1_27_5_11
-16070019 18101916
+1607001b 18101b16
04362858 30548c00 ec02 f500
eeee 000307fc
0028
diff --git a/configs/T4160QDS_SPIFLASH_defconfig
b/configs/T4160QDS_SPIFLASH_defconfig
deleted file mode 100644
index 6146b00..000
--- a/configs/T4160QDS_SPIFLASH_defconfig
+++ /dev/null
@@ -1,4 +0,0 @@
-CONFIG_SYS_EXTRA_OPTIONS=PPC_T4160,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF4
-CONFIG_PPC=y
-CONFIG_MPC85xx=y
-CONFIG_TARGET_T4240QDS=y
diff --git a/configs/T4240QDS_SPIFLASH_defconfig
b/configs/T4240QDS_SPIFLASH_defconfig
deleted file mode 100644
index 14dc48a..000
--- a/configs/T4240QDS_SPIFLASH_defconfig
+++ /dev/null
@@ -1,4 +0,0 @@
-CONFIG_SYS_EXTRA_OPTIONS=PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF4
-CONFIG_PPC=y
-CONFIG_MPC85xx=y
-CONFIG_TARGET_T4240QDS=y
--
2.1.0.27.g96db324
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Re: [U-Boot] MinnowBoard Max uboot
Hi Simon, Thanks for the update and I will be glad to help with testing if needed. Tom -Original Message- From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass Sent: Sunday, April 26, 2015 8:36 PM To: Beaman, Thomas Cc: u-boot@lists.denx.de; Bin Meng; gabriel huau Subject: Re: MinnowBoard Max uboot Hi Thomas, On 12 March 2015 at 16:20, Simon Glass s...@chromium.org wrote: Hi Thomas, On 11 March 2015 at 05:06, Beaman, Thomas thomas.bea...@xerox.com wrote: Thank you, can you keep me updated if possible. OK I'll see if I can copy you on the patches. I got back into this last week and hope to have something to send to this in the next week or so. Regards, Simon Tom -Original Message- From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass Sent: Tuesday, March 10, 2015 1:21 PM To: Beaman, Thomas Cc: u-boot@lists.denx.de; Bin Meng; gabriel huau Subject: Re: MinnowBoard Max uboot Hi Tom, On 10 March 2015 at 05:24, Beaman, Thomas thomas.bea...@xerox.com wrote: Hi Simon, Do you know what will be the timeframe of when someone may be able to look at this in more detail. I will be able to help test any updates if needed I will take a look once I have things lined up for the next release, likely mid April. Regards, Simon Thanks, Tom -Original Message- From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass Sent: Monday, March 09, 2015 11:49 AM To: Beaman, Thomas Cc: u-boot@lists.denx.de; Bin Meng; gabriel huau Subject: Re: MinnowBoard Max uboot +Bin and Gabriel Hi Tom, On 9 March 2015 at 08:08, Beaman, Thomas thomas.bea...@xerox.com wrote: Hi Simon, I see you have put support for the MinnowBoard Max in the u-boot mainline. Thanks this is a very useful addition. I have been able to follow your readme and build a working bare metal uboot. Using the built uboot I can load and bring up a Linux Kernel. What I noticed from the running kernel is that only one of the two cores on the E3825 is running. In the power PC uboots I usually see a section for the multiple cores in the .dts file. My questions is how do I get both CPUs running on this board. Is it a uboot .dts file setup that will enable this, or is something in the kernel start up that does this. As a test I boot the same kernel using the EFI BIOS on the minnow board and both CPUs are running. Any suggestions or comments you have would be welcomed. My guess is that the LAPIC CPU start-up is missing. It isn't 100% clear what the FSP does and does not do, but perhaps it does not do that. I did make something of a start on this with ivybridge but it isn't complete, and it seems to be needed here. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] hummingboard: Remove mx6solo specific support
Hummingboard dual, dual-lite and solo are now supported via SPL mechanism. Remove the previous hummingboard support, which does not use SPL and supported only the solo variant. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- arch/arm/Kconfig | 5 - board/solidrun/hummingboard/Kconfig| 15 -- board/solidrun/hummingboard/MAINTAINERS| 6 - board/solidrun/hummingboard/Makefile | 9 -- board/solidrun/hummingboard/README | 40 -- board/solidrun/hummingboard/hummingboard.c | 182 --- board/solidrun/hummingboard/solo.cfg | 25 configs/hummingboard_solo_defconfig| 3 - include/configs/hummingboard.h | 224 - 9 files changed, 509 deletions(-) delete mode 100644 board/solidrun/hummingboard/Kconfig delete mode 100644 board/solidrun/hummingboard/MAINTAINERS delete mode 100644 board/solidrun/hummingboard/Makefile delete mode 100644 board/solidrun/hummingboard/README delete mode 100644 board/solidrun/hummingboard/hummingboard.c delete mode 100644 board/solidrun/hummingboard/solo.cfg delete mode 100644 configs/hummingboard_solo_defconfig delete mode 100644 include/configs/hummingboard.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7c383cb..b97f72b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -542,10 +542,6 @@ config TARGET_GW_VENTANA select CPU_V7 select SUPPORT_SPL -config TARGET_HUMMINGBOARD - bool Support hummingboard - select CPU_V7 - config TARGET_KOSAGI_NOVENA bool Support Kosagi Novena select CPU_V7 @@ -862,7 +858,6 @@ source board/siemens/pxm2/Kconfig source board/siemens/rut/Kconfig source board/silica/pengwyn/Kconfig source board/solidrun/mx6cuboxi/Kconfig -source board/solidrun/hummingboard/Kconfig source board/spear/spear300/Kconfig source board/spear/spear310/Kconfig source board/spear/spear320/Kconfig diff --git a/board/solidrun/hummingboard/Kconfig b/board/solidrun/hummingboard/Kconfig deleted file mode 100644 index 36b7904..000 --- a/board/solidrun/hummingboard/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_HUMMINGBOARD - -config SYS_BOARD - default hummingboard - -config SYS_VENDOR - default solidrun - -config SYS_SOC - default mx6 - -config SYS_CONFIG_NAME - default hummingboard - -endif diff --git a/board/solidrun/hummingboard/MAINTAINERS b/board/solidrun/hummingboard/MAINTAINERS deleted file mode 100644 index c0c062a..000 --- a/board/solidrun/hummingboard/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -HUMMINGBOARD BOARD -M: Jon Nettleton jon.nettle...@gmail.com -S: Maintained -F: board/solidrun/hummingboard/ -F: include/configs/hummingboard.h -F: configs/hummingboard_solo_defconfig diff --git a/board/solidrun/hummingboard/Makefile b/board/solidrun/hummingboard/Makefile deleted file mode 100644 index 042a2f0..000 --- a/board/solidrun/hummingboard/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2013 Freescale Semiconductor, Inc. -# Copyright (C) 2013, Boundary Devices i...@boundarydevices.com -# Copyright (C) 2013, Jon Nettleton jon.nettle...@gmail.com -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := hummingboard.o diff --git a/board/solidrun/hummingboard/README b/board/solidrun/hummingboard/README deleted file mode 100644 index cfd62d4..000 --- a/board/solidrun/hummingboard/README +++ /dev/null @@ -1,40 +0,0 @@ -U-Boot for SolidRun Hummingboard - - -This file contains information for the port of U-Boot to the Hummingboard. - -For more details about Hummingboard, please refer to: -http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware - -(Carrier-One was the previous name of Hummingboard). - -Building U-boot for Hummingboard - - -To build U-Boot for the Hummingboard Solo version: - -$ make hummingboard_solo_config -$ make - -Flashing U-boot into the SD card - - -- After the 'make' command completes, the generated 'u-boot.imx' binary must be -flashed into the SD card: - -$ sudo dd if=u-boot.imx of=/dev/mmcblk0 bs=1k seek=1; sync - -(Note - the SD card node may vary, so adjust this as needed). - -Also, a more detailed explanation on how to format the SD card is available -at doc/README.imximage. - -- Insert the micro SD card into the slot located in the bottom of the board - -- Connect a 3.3V USB to serial converter cable to the host PC. The MX6 UART -signals are available in the 26 pin connector as shown at: -http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware -(Check for 26 pin header layout). - -- Power up the board via USB cable (CON201) and U-boot messages will appear in -the serial console. diff --git a/board/solidrun/hummingboard/hummingboard.c b/board/solidrun/hummingboard/hummingboard.c deleted file mode 100644 index 52c384b..000 ---
[U-Boot] [PATCH 2/2] mx6cuboxi: Mention Cubox-i in the README
Cubox-i boards are also supported, so update the README file. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- board/solidrun/mx6cuboxi/README | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/board/solidrun/mx6cuboxi/README b/board/solidrun/mx6cuboxi/README index 3050c48..b417ff0 100644 --- a/board/solidrun/mx6cuboxi/README +++ b/board/solidrun/mx6cuboxi/README @@ -1,7 +1,7 @@ -How to use U-boot on Solid-run mx6 hummingboard +How to use U-boot on Solid-run mx6 Hummingboard and Cubox-i +--- -- Build U-boot for hummingboard: +- Build U-boot for Hummingboard/Cubox-i: $ make mrproper $ make mx6cuboxi_defconfig @@ -17,5 +17,5 @@ sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync -- Insert the SD card in the hummingboard, power it up and U-boot messages -should come up. +- Insert the SD card in the board, power it up and U-boot messages should +come up. -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot PATCH 3/8] spi: Zap ftssp010_spi driver
Hi Axel, On 22 April 2015 at 06:09, Axel Lin axel@ingics.com wrote: 2015-04-22 2:26 GMT+08:00 Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com: Zap ftssp010_spi driver since the boards used this driver is no longer been active. I'm not sure if this is correct thing to do... It's fine to drop unmaintained boards, but a driver can/may be used by different boards. So If someday the boards(or new boards) that need this driver becomes active, it needs to add back this(and all required) driver(s). I understand your point, but if none of the sw using these drivers will make orphan driver and to reduce the code size atleast some thing is not used now. Ok, if any boards require these may be they will write or reuse it from past that depends on the future decision. Any comments from ML? thanks! -- Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3] i2c: mxc: refactor i2c driver and support dm
1. Introduce a new structure `struct mxc_i2c_bus`, this structure will
used for non-DM and DM.
2. Remove `struct mxc_i2c_regs` structure, but use register offset to access
registers based on `base` entry of `struct mxc_i2c_bus`.
3. Remove most `#ifdef I2C_QUIRK_REG`. Using driver_data to contain platform
flags. A new flag is introduced, I2C_QUIRK_FLAG.
4. Most functions use `struct mxc_i2c_bus` as one of the parameters.
Make most functions common to DM and non-DM, try to avoid duplicated code.
5. Support DM. Pinmux setting is still set by setup_i2c, but we do not
need bus_i2c_init for DM.
6. struct i2c_parms and struct sram_data are removed.
7. Remove bus_i2c_read bus_i2c_write prototype in header file. The frist
paramter of bus_i2c_init is modified to i2c index. Add new prototype
i2c_idle_bus and force_idle_bus. Since bus_i2c_init is not good for
DM I2C and pinctrl is missed, we use a weak function for i2c_idle_bus
for DM part.
Board file take the responsibility to implement this function, like this:
int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus)
{
if (i2c_bus-index == 0)
force_idle_bus(i2c_pads_info0);
else if (i2c_bus-index == 1)
force_idle_bus(i2c_pads_info1);
else
xx
}
Signed-off-by: Peng Fan peng@freescale.com
---
Changes v3:
1. remove bus_i2c_init for DM, introuduce a weak function i2c_idle_bus.
2. remove static return type for force_idle_bus, since we need to call
it in i2c_idle_bus which may be implemented in board file. This does
not hurt for non-DM.
Changes v2:
1. Refactor driver, remove register access based on structure, but use
'base + offset'
2. Introduce mxc_i2c_bus structure
3. Introduce I2C_QUIRK_FLAG and remove most I2C_QUIRK_REG and use
driver_data to contain the flags for different platforms
4. Avoid duplicated code between DM and non-DM part
5. The function name i2c_init_transfer is not changed.
6. Remove bus_i2c_read/write prototype from header file
7. change bus_i2c_init's first parameter to i2c index
8. Rename patch name, since refactor non-DM part.
arch/arm/imx-common/i2c-mxv7.c| 7 +-
arch/arm/include/asm/imx-common/mxc_i2c.h | 38 +-
drivers/i2c/mxc_i2c.c | 575 --
3 files changed, 426 insertions(+), 194 deletions(-)
diff --git a/arch/arm/imx-common/i2c-mxv7.c b/arch/arm/imx-common/i2c-mxv7.c
index 1a632e7..f3a5c3f 100644
--- a/arch/arm/imx-common/i2c-mxv7.c
+++ b/arch/arm/imx-common/i2c-mxv7.c
@@ -12,7 +12,7 @@
#include asm/imx-common/mxc_i2c.h
#include watchdog.h
-static int force_idle_bus(void *priv)
+int force_idle_bus(void *priv)
{
int i;
int sda, scl;
@@ -99,8 +99,9 @@ int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
if (ret)
goto err_idle;
- bus_i2c_init(i2c_bases[i2c_index], speed, slave_addr,
- force_idle_bus, p);
+#ifndef CONFIG_DM_I2C
+ bus_i2c_init(i2c_index, speed, slave_addr, force_idle_bus, p);
+#endif
return 0;
diff --git a/arch/arm/include/asm/imx-common/mxc_i2c.h
b/arch/arm/include/asm/imx-common/mxc_i2c.h
index af86163..355b25e 100644
--- a/arch/arm/include/asm/imx-common/mxc_i2c.h
+++ b/arch/arm/include/asm/imx-common/mxc_i2c.h
@@ -19,6 +19,36 @@ struct i2c_pads_info {
struct i2c_pin_ctrl sda;
};
+/*
+ * Information about i2c controller
+ * struct mxc_i2c_bus - information about the i2c[x] bus
+ * @index: i2c bus index
+ * @base: Address of I2C bus controller
+ * @driver_data: Flags for different platforms, such as I2C_QUIRK_FLAG.
+ * @speed: Speed of I2C bus
+ * @pads_info: pinctrl info for this i2c bus, will be used when pinctrl is ok.
+ * The following two is only to be compatible with non-DM part.
+ * @idle_bus_fn: function to force bus idle
+ * @idle_bus_data: parameter for idle_bus_fun
+ */
+struct mxc_i2c_bus {
+ /*
+* board file can use this index to locate which i2c_pads_info is for
+* i2c_idle_bus. When pinmux is implement, this entry can be
+* discarded. Here we do not use dev-seq, because we do not want to
+* export device to board file.
+*/
+ int index;
+ ulong base;
+ ulong driver_data;
+ int speed;
+ struct i2c_pads_info *pads_info;
+#ifndef CONFIG_DM_I2C
+ int (*idle_bus_fn)(void *p);
+ void *idle_bus_data;
+#endif
+};
+
#if defined(CONFIG_MX6QDL)
#define I2C_PADS(name, scl_i2c, scl_gpio, scl_gp, sda_i2c, sda_gpio, sda_gp) \
struct i2c_pads_info mx6q_##name = {\
@@ -54,10 +84,8 @@ struct i2c_pads_info {
int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
struct i2c_pads_info *p);
-void bus_i2c_init(void *base, int speed, int slave_addr,
+void bus_i2c_init(int index, int speed, int slave_addr,
int (*idle_bus_fn)(void *p), void *p);
-int
[U-Boot] Upgrading U-Boot stops Linux booting.
Hi, I am having some trouble and wondered if anyone has any suggestions. I have a iMX6 (Quad core, 1Gb Ram) based board by Digi.com. It follows pretty closely the Sabrelite reference design. I am trying to boot Android from SATA on this board. Booting from the SD card works fine, using the u-boot supplied with Android, however booting from SATA hangs. I get the following boot output when booting from SD U-Boot 2013.04 - dub-2.3.0.3-git (Mar 20 2015 - 19:01:46) CPU: Freescale i.MX6Q rev1.5 at 792 MHz CPU: Temperature 22 C, calibration data: 0x57f4e869 reading uImage-ccimx6sbc.bin 4773736 bytes read in 233 ms (19.5 MiB/s) reading uImage-imx6q-ccimx6sbc.dtb ** Unable to read file uImage-imx6q-ccimx6sbc.dtb ** reading uramdisk.img 27 bytes read in 30 ms (8.9 MiB/s) ## Booting kernel from Legacy Image at 1200 ... Image Name: Linux-3.0.35 Image Type: ARM Linux Kernel Image (uncompressed) Data Size:4773672 Bytes = 4.6 MiB Load Address: 10008000 Entry Point: 10008000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 1900 ... Image Name: Android u-boot ramdisk Image Type: ARM Linux RAMDisk Image (gzip compressed) Data Size:278824 Bytes = 272.3 KiB Load Address: Entry Point: Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ... Uncompressing Linux... done, booting the kernel. Initializing cgroup subsys cpu Linux version 3.0.35 (ben@FNR-BEN-PC) (gcc version 4.6.x-google 20120106 (prerelease) (GCC) ) #6 SMP PREEMPT Thu Apr 23 10:35:09 BST 2015 However this version of u-boot hangs when trying to boot from SATA. For the same board I am also booting a version of Linux, with a newer u-boot. U-Boot 2014.10-00573-g11ada92-dirty (Apr 08 2015 - 09:20:20) CPU: Freescale i.MX6Q rev1.5 at 792 MHz Booting from mmc ... reading uImage 4213792 bytes read in 249 ms (16.1 MiB/s) reading imx6q-ccimx6sbc.dtb 51277 bytes read in 21 ms (2.3 MiB/s) ## Booting kernel from Legacy Image at 1200 ... Image Name: Linux-3.10.54-dey+gb1b3828 Image Type: ARM Linux Kernel Image (uncompressed) Data Size:4213728 Bytes = 4 MiB Load Address: 10008000 Entry Point: 10008000 Verifying Checksum ... OK ## Flattened Device Tree blob at 1800 Booting using the fdt blob at 0x1800 Loading Kernel Image ... OK Using Device Tree in place at 1800, end 1800f84c Starting kernel ... Booting Linux on physical CPU 0x0 Linux version 3.10.54-dey+gb1b3828 (ben@FNR-BEN-PC) (gcc version 4.8.3 (Buildroot 2014.11-rc2-00045-g3036252-dirty) ) #3 SMP Tue Jan 20 13:56:05 GMT 2015 Newer kernel and u-boot and everything boots. Now if I try this newer version of u-boot with the Android kernel and do the following U-Boot sata device 0 SATA device 0: Model: ATP IG SlimSATA Firm: 20130702 Ser#: 9900114033100401 Type: Hard Disk Capacity: 3775.5 MB = 3.6 GB (7732368 x 512) ... is now current device U-Boot fatload sata 0:1 0x1200 uimage-ccimx6sbc.bin reading uimage-ccimx6sbc.bin 4773736 bytes read in 91 ms (50 MiB/s) U-Boot fatload sata 0:1 0x1900 uramdisk.img reading uramdisk.img 27 bytes read in 13 ms (20.5 MiB/s) U-Boot bootm 0x1200 0x1900 ## Booting kernel from Legacy Image at 1200 ... Image Name: Linux-3.0.35 Image Type: ARM Linux Kernel Image (uncompressed) Data Size:4773672 Bytes = 4.6 MiB Load Address: 10008000 Entry Point: 10008000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 1900 ... Image Name: Android u-boot ramdisk Image Type: ARM Linux RAMDisk Image (gzip compressed) Data Size:278824 Bytes = 272.3 KiB Load Address: Entry Point: Verifying Checksum ... OK Loading Kernel Image ... OK Starting kernel ... and then the kernel just seems to hang. The entry points and load addresses are the same, so I am not sure what is happening. Is there something obvious I am missing ? I would rather use a newer u-boot than try to retro fit and SATA changes to the older version. many thanks for any help Ben ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] bugfix i.mx6 pwm: prevent overflow of period_c * duty_ns by casting duty_ns to ull first. This bug came up when trying to create a 200 Hz PWM.
--- drivers/pwm/pwm-imx-util.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) mode change 100644 = 100755 drivers/pwm/pwm-imx-util.c diff --git a/drivers/pwm/pwm-imx-util.c b/drivers/pwm/pwm-imx-util.c index f1d0b35..777a8bf 100644 --- a/drivers/pwm/pwm-imx-util.c +++ b/drivers/pwm/pwm-imx-util.c @@ -56,7 +56,7 @@ int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c, *prescale = *period_c / 0x1 + 1; *period_c /= *prescale; - c = (unsigned long long)(*period_c * duty_ns); + c = *period_c * (unsigned long long) duty_ns; do_div(c, period_ns); *duty_c = c; -- 1.8.2.3 DISCLAIMER The contents of this e-mail are intended for the named addressee only. It contains information which may be confidential and which may also be privileged. Unless you are the named addressee (or authorised to receive for the addressee) you may not copy or use it, or disclose it to anyone else. If you received it in error please notify us immediately and then destroy it. Further, we make every effort to keep our network free from viruses. However, you do need to verify that this email and any attachments are free of viruses as we can take no responsibility for any computer virus which might be transferred by way of this e-mail. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] switching to single .config configuration issues
Hi everyone, I'm working on the latest u-boot 2015.04 trying to rebase my repository to latest code. And I have question regarding patch e02ee2548afe (kconfig: switch to single .config configuration) Issues that I face in the current solution (single .config): For my usage most of the CONFIG options will not supported in the SPL, we need the SPL very tiny and most of the CONFIG will be enabled in the u-boot, need to undef/disable(set=n) for every CONFIG in scripts/Makefile.uncmd_spl/ include/config_uncmd_spl.h Also for future usage if we want to delete the defines of the commands from the include file and move it to defconfig file, then need to undef them in the SPL code. Do you planning for another solution for this issue? Thanks, Hanna ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot 1/7] dm: spi: zynq_spi: Convert to driver model
Hi Simon,
On 23 April 2015 at 23:53, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On 23 April 2015 at 08:15, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:
This converts the zynq spi driver to use the driver model.
Minimal functional changes like using meaningful name on
structure members wrt mainlined dm spi drivers.
- input_hz - frequency
- req_hz - freq
- base - regs
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Simon Glass s...@chromium.org
Cc: Michal Simek michal.si...@xilinx.com
Cc: Siva Durga Prasad Paladugu siva...@xilinx.com
---
Note: Siva Durga Prasad, can you test this on zc770_xm010
drivers/spi/zynq_spi.c | 305
+
1 file changed, 181 insertions(+), 124 deletions(-)
Acked-by: Simon Glass s...@chromium.org
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index ff1ec6a..62edbbe 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -1,5 +1,6 @@
/*
* (C) Copyright 2013 Inc.
+ * (C) Copyright 2015 Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com
*
* Xilinx Zynq PS SPI controller driver (master mode only)
*
@@ -8,6 +9,8 @@
#include config.h
#include common.h
+#include dm.h
+#include errno.h
#include malloc.h
#include spi.h
#include asm/io.h
@@ -44,180 +47,142 @@ struct zynq_spi_regs {
u32 rxdr; /* 0x20 */
};
-/* zynq spi slave */
-struct zynq_spi_slave {
- struct spi_slave slave;
- struct zynq_spi_regs *base;
- u8 mode;
- u8 fifo_depth;
+
+/* zynq spi platform data */
+struct zynq_spi_platdata {
+ struct zynq_spi_regs *regs;
+ u32 frequency; /* input frequency */
u32 speed_hz;
- u32 input_hz;
- u32 req_hz;
};
-static inline struct zynq_spi_slave *to_zynq_spi_slave(struct spi_slave
*slave)
-{
- return container_of(slave, struct zynq_spi_slave, slave);
-}
+/* zynq spi priv */
+struct zynq_spi_priv {
+ struct zynq_spi_regs *regs;
+ u8 cs;
+ u8 mode;
+ u8 fifo_depth;
+ u32 freq; /* required frequency */
+};
-static inline struct zynq_spi_regs *get_zynq_spi_base(int dev)
+static inline struct zynq_spi_regs *get_zynq_spi_regs(struct udevice *bus)
I see you remove this in a latest patch.
Yes, added dts node for retrieving reg.
{
- if (dev)
+ if (bus-seq)
return (struct zynq_spi_regs *)ZYNQ_SPI_BASEADDR1;
else
return (struct zynq_spi_regs *)ZYNQ_SPI_BASEADDR0;
}
[snip]
thanks!
--
Jagan.
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[U-Boot] HUSH logical AND/OR expressions
Trying to get a better handle of HUSH shell expressions, this does not work as I expect: = false true || echo ECHO = false false || echo ECHO none prints ECHO, seems like a bug? This the only one that prints ECHO = true false || echo ECHO Jocke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Compile u-boot with specific options (bootargs)
Hello, after a lot of attempts, I've finally managed to automatize deployment of images on i.mx6 sabresd using network. I initially boot from SD card, where there is u-boot. The boot.scr makes u-boot download a kernel and a minimal rootfs (a .cpio.gz.uboot) and boot on RAM. From this minimal image, I download the real image and write it on the eMMC. I also donwload u-boot.imx and write it on the boot0 partition of the eMMC. When rebooting without the SD card (so I boot with the u-boot written on boot0), I boot using this in u-boot: fatload mmc 2:1 0x1200 zImage ; fatload mmc 2:1 0x1800 imx6q-sabresd-ldo.dtb ; setenv bootargs console=ttymxc0,115200 root=/dev/mmcblk3p2 ; bootz 0x1200 - 0x1800 It works well, but to boot I have to manually enter the command above. As I use u-boot.imx, it seems that I can't use a boot.scr: boot0 is a special partition, I can't do much with it save write a file using dd, so I can't copy a boot.scr on it without erasing u-boot.imx. If I can't use a script, I'll have to compile u-boot to obtain a u-boot.imx with the correct boot procedure, right? But I don't know how to do that. I've searched, but I haven't find anything fitting my needs. Any help would be appreciated, thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot PATCH v2] sf: Fix to compute proper sector_size
On 27 April 2015 at 10:54, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Fri, Apr 24, 2015 at 5:43 PM, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:
Upto now flash sector_size is assigned from params which isn't
necessarily a sector size from vendor, so based on the SECT_*
flags from flash_params the erase_size will compute and it will
become the sector_size finally.
Bug report (from Bin Meng):
= sf probe
SF: Detected SST25VF016B with page size 256 Bytes, erase size 4 KiB,
total 2 MiB, mapped at ffe0
= sf erase 0 +100
SF: 65536 bytes @ 0x0 Erased: OK
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Reported-by: Bin Meng bmeng...@gmail.com
Tested-by: Bin Meng bmeng...@gmail.com
But please see my comments blow.
---
Changes for v2:
-
drivers/mtd/spi/sf_internal.h | 3 ++-
drivers/mtd/spi/sf_probe.c| 3 +++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index bd834dc..bef8701 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -119,7 +119,8 @@ int sst_write_bp(struct spi_flash *flash, u32 offset,
size_t len,
* @name: Device name
([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
* @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
* @ext_jedec: Device ext_jedec ID
- * @sector_size: Sector size of this device
+ * @sector_size: Isn't necessarily a sector size from vendor,
+ * the size here is what works with Sector erase (64KB)
Ok I will replace CMD_ERASE_64K instead of Sector erase (64KB)
the size listed here is what works with CMD_ERASE_64K
Any comments?
Sector - sector. Also I think we should remove (64KB) here as it is
confusing.
* @nr_sectors:No.of sectors on this device
* @e_rd_cmd: Enum list for read commands
* @flags: Important param, for flash specific behaviour
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index de8d0b7..3f6b882 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -184,6 +184,9 @@ static int spi_flash_validate_params(struct spi_slave
*spi, u8 *idcode,
flash-erase_size = flash-sector_size;
}
+ /* Now erase size becomes valid sector size */
+ flash-sector_size = flash-erase_size;
+
/* Look for the fastest read cmd */
cmd = fls(params-e_rd_cmd flash-spi-op_mode_rx);
if (cmd) {
--
thanks!
--
Jagan.
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Re: [U-Boot] [U-Boot 0/7] dm: spi: Convert few drivers to driver model
Hi Siva Durga Prasad, On 23 April 2015 at 19:45, Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com wrote: Driver model conversion, patches. - drivers/spi/zynq_spi.c and drivers/spi/xilinx_spi.c thanks! -- Jagan. Jagannadha Sutradharudu Teki (7): dm: spi: zynq_spi: Convert to driver model zynq: Kconfig: Enable dm spi and spi_flash dts: zynq: Add zynq spi controller nodes spi: zynq_spi: Add fdt support in driver dts: zynq: Enable spi1 for zc770_xm010 board dm: spi: xilinx_spi: Convert to driver model spi: xilinx_spi: Add asm/io.h include file Can you just test and let me know any comments from your side. arch/arm/Kconfig | 2 + arch/arm/dts/zynq-7000.dtsi | 26 +++ arch/arm/dts/zynq-zc770-xm010.dts | 4 + arch/arm/include/asm/arch-zynq/hardware.h | 2 - doc/device-tree-bindings/spi/spi-zynq.txt | 29 +++ drivers/spi/xilinx_spi.c | 213 +++- drivers/spi/zynq_spi.c| 312 ++ 7 files changed, 372 insertions(+), 216 deletions(-) create mode 100644 doc/device-tree-bindings/spi/spi-zynq.txt -- 1.9.1 thanks! -- Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 12/20] x86: Add an mfence macro
Provide access to this x86 instruction from C code.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/cpu.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index c839291..37aa6b9 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -151,6 +151,11 @@ static inline int flag_is_changeable_p(uint32_t flag)
return ((f1^f2) flag) != 0;
}
+static inline void mfence(void)
+{
+ __asm__ __volatile__(mfence\t\n : : : memory);
+}
+
/**
* cpu_enable_paging_pae() - Enable PAE-paging
*
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH 16/20] x86: Add functions to set and clear bits on MSRs
Since we do these sorts of operations a lot, it is useful to have a simpler
API, similar to clrsetbits_le32().
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/msr.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 1955a75..5349519 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -128,6 +128,25 @@ static inline void wrmsr(unsigned msr, unsigned low,
unsigned high)
#define wrmsrl(msr, val) \
native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) 32))
+static inline void msr_clrsetbits_64(unsigned msr, u64 clear, u64 set)
+{
+ u64 val;
+
+ val = native_read_msr(msr);
+ val = ~clear;
+ val |= set;
+ wrmsrl(msr, val);
+}
+
+static inline void msr_setbits_64(unsigned msr, u64 set)
+{
+ u64 val;
+
+ val = native_read_msr(msr);
+ val |= set;
+ wrmsrl(msr, val);
+}
+
/* rdmsr with exception handling */
#define rdmsr_safe(msr, p1, p2)\
({ \
--
2.2.0.rc0.207.ga3a616c
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Re: [U-Boot] [PATCH 1/2] hummingboard: Remove mx6solo specific support
On Mon, Apr 27, 2015 at 09:20:52AM -0300, Fabio Estevam wrote: Hummingboard dual, dual-lite and solo are now supported via SPL mechanism. Remove the previous hummingboard support, which does not use SPL and supported only the solo variant. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 15/20] x86: Add multi-processor init
Most modern x86 CPUs include more than one CPU core. The OS normally requires
that these 'Application Processors' (APs) be brought up by the boot loader.
Add the required support to U-Boot to init additional APs.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/Kconfig | 25 ++
arch/x86/cpu/Makefile| 2 +
arch/x86/cpu/ivybridge/model_206ax.c | 4 +-
arch/x86/cpu/mp_init.c | 507 +++
arch/x86/cpu/sipi.S | 217 +++
arch/x86/include/asm/mp.h| 94 +++
arch/x86/include/asm/sipi.h | 79 ++
arch/x86/include/asm/smm.h | 14 +
8 files changed, 940 insertions(+), 2 deletions(-)
create mode 100644 arch/x86/cpu/mp_init.c
create mode 100644 arch/x86/cpu/sipi.S
create mode 100644 arch/x86/include/asm/mp.h
create mode 100644 arch/x86/include/asm/sipi.h
create mode 100644 arch/x86/include/asm/smm.h
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 30a08ec..ae0e05f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -422,6 +422,31 @@ source arch/x86/cpu/quark/Kconfig
source arch/x86/cpu/queensbay/Kconfig
+config MAX_CPUS
+int Maximum number of CPUs permitted
+default 4
+help
+ When using multi-CPU chips it is possible for U-Boot to start up
+ more than one CPU. The stack memory used by all of these CPUs is
+ pre-allocated so at present U-Boot wants to know the maximum
+ number of CPUs that may be present. Set this to at least as high
+ as the number of CPUs in your system (it uses about 4KB of RAM for
+ each CPU).
+
+config SMP
+ bool Enable Symmetric Multiprocessing
+ default n
+ help
+ Enable use of more than one CPU in U-Boot and the Operating System
+ when loaded. Each CPU will be started up and information can be
+ obtained using the 'cpu' command. If this option is disabled, then
+ only one CPU will be enabled regardless of the number of CPUs
+ available.
+
+config STACK_SIZE
+ hex
+ default 0x1000
+
config TSC_CALIBRATION_BYPASS
bool Bypass Time-Stamp Counter (TSC) calibration
default n
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 6ded0a7..9a08ab4 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -19,6 +19,8 @@ obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
obj-$(CONFIG_INTEL_QUARK) += quark/
obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
obj-y += lapic.o
+obj-$(CONFIG_SMP) += mp_init.o
obj-y += mtrr.o
obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_SMP) += sipi.o
obj-y += turbo.o
diff --git a/arch/x86/cpu/ivybridge/model_206ax.c
b/arch/x86/cpu/ivybridge/model_206ax.c
index 11dc625..8b08c40 100644
--- a/arch/x86/cpu/ivybridge/model_206ax.c
+++ b/arch/x86/cpu/ivybridge/model_206ax.c
@@ -435,8 +435,8 @@ static int intel_cores_init(struct x86_cpu_priv *cpu)
debug(CPU: %u has core %u\n, cpu-apic_id, new_cpu-apic_id);
-#if CONFIG_SMP CONFIG_MAX_CPUS 1
- /* Start the new cpu */
+#if 0 CONFIG_SMP CONFIG_MAX_CPUS 1
+ /* TODO(s...@chromium.org): Start the new cpu */
if (!start_cpu(new_cpu)) {
/* Record the error in cpu? */
printk(BIOS_ERR, CPU %u would not start!\n,
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
new file mode 100644
index 000..f660c9d
--- /dev/null
+++ b/arch/x86/cpu/mp_init.c
@@ -0,0 +1,507 @@
+/*
+ * Copyright (C) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Based on code from the coreboot file of the same name
+ */
+
+#include common.h
+#include cpu.h
+#include dm.h
+#include errno.h
+#include malloc.h
+#include asm/atomic.h
+#include asm/cpu.h
+#include asm/interrupt.h
+#include asm/lapic.h
+#include asm/mp.h
+#include asm/mtrr.h
+#include asm/sipi.h
+#include asm/smm.h
+#include dm/device-internal.h
+#include dm/uclass-internal.h
+#include linux/linkage.h
+
+/* This also needs to match the sipi.S assembly code for saved MSR encoding */
+struct saved_msr {
+ uint32_t index;
+ uint32_t lo;
+ uint32_t hi;
+} __packed;
+
+
+/*
+ * The SIPI vector is loaded at the SMM_DEFAULT_BASE. The reason is that the
+ * memory range is already reserved so the OS cannot use it. That region is
+ * free to use for AP bringup before SMM is initialised.
+ */
+static const uint32_t sipi_vector_location = SMM_DEFAULT_BASE;
+static const int sipi_vector_location_size = SMM_DEFAULT_SIZE;
+
+struct mp_flight_plan {
+ int num_records;
+ struct mp_flight_record *records;
+};
+
+static struct mp_flight_plan mp_info;
+
+struct cpu_map {
+ struct udevice *dev;
+ int apic_id;
+ int err_code;
+};
+
+static inline void barrier_wait(atomic_t *b)
+{
+ while (atomic_read(b) == 0)
+ asm(pause);
+ mfence();
+}
+
+static
[U-Boot] [PATCH 18/20] x86: Add a CPU driver for baytrail
This driver supports multi-core init and sets up the CPU frequencies
correctly.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/baytrail/Makefile | 1 +
arch/x86/cpu/baytrail/cpu.c | 206 +++
arch/x86/include/asm/arch-baytrail/msr.h | 30 +
3 files changed, 237 insertions(+)
create mode 100644 arch/x86/cpu/baytrail/cpu.c
create mode 100644 arch/x86/include/asm/arch-baytrail/msr.h
diff --git a/arch/x86/cpu/baytrail/Makefile b/arch/x86/cpu/baytrail/Makefile
index 8914e8b..c78b644 100644
--- a/arch/x86/cpu/baytrail/Makefile
+++ b/arch/x86/cpu/baytrail/Makefile
@@ -4,6 +4,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
+obj-y += cpu.o
obj-y += early_uart.o
obj-y += fsp_configs.o
obj-y += pci.o
diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c
new file mode 100644
index 000..5a2a8ee
--- /dev/null
+++ b/arch/x86/cpu/baytrail/cpu.c
@@ -0,0 +1,206 @@
+/*
+ * Copyright (C) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Based on code from coreboot
+ */
+
+#include common.h
+#include cpu.h
+#include dm.h
+#include asm/cpu.h
+#include asm/lapic.h
+#include asm/mp.h
+#include asm/msr.h
+#include asm/turbo.h
+#include asm/arch/msr.h
+
+#ifdef CONFIG_SMP
+static int enable_smis(struct udevice *cpu, void *unused)
+{
+ return 0;
+}
+
+static struct mp_flight_record mp_steps[] = {
+ MP_FR_BLOCK_APS(mp_init_cpu, NULL, mp_init_cpu, NULL),
+ /* Wait for APs to finish initialization before proceeding. */
+ MP_FR_BLOCK_APS(NULL, NULL, enable_smis, NULL),
+};
+
+static int detect_num_cpus(void)
+{
+ int ecx = 0;
+
+ /*
+* Use the algorithm described in Intel 64 and IA-32 Architectures
+* Software Developer's Manual Volume 3 (3A, 3B 3C): System
+* Programming Guide, Jan-2015. Section 8.9.2: Hierarchical Mapping
+* of CPUID Extended Topology Leaf.
+*/
+ while (1) {
+ struct cpuid_result leaf_b;
+
+ leaf_b = cpuid_ext(0xb, ecx);
+
+ /*
+* Bay Trail doesn't have hyperthreading so just determine the
+* number of cores by from level type (ecx[15:8] == * 2)
+*/
+ if ((leaf_b.ecx 0xff00) == 0x0200)
+ return leaf_b.ebx 0x;
+ ecx++;
+ }
+}
+
+static int baytrail_init_cpus(void)
+{
+ struct mp_params mp_params;
+
+ lapic_setup();
+
+ mp_params.num_cpus = detect_num_cpus();
+ mp_params.parallel_microcode_load = 0,
+ mp_params.flight_plan = mp_steps[0];
+ mp_params.num_records = ARRAY_SIZE(mp_steps);
+ mp_params.microcode_pointer = 0;
+
+ if (mp_init(mp_params)) {
+ printf(Warning: MP init failure\n);
+ return -EIO;
+ }
+
+ return 0;
+}
+#endif
+
+int x86_init_cpus(void)
+{
+#ifdef CONFIG_SMP
+ debug(Init additional CPUs\n);
+ baytrail_init_cpus();
+#endif
+
+ return 0;
+}
+
+void set_max_freq(void)
+{
+ msr_t perf_ctl;
+ msr_t msr;
+
+ /* Enable speed step */
+ msr = msr_read(MSR_IA32_MISC_ENABLES);
+ msr.lo |= (1 16);
+ msr_write(MSR_IA32_MISC_ENABLES, msr);
+
+ /*
+* Set guaranteed ratio [21:16] from IACORE_RATIOS to bits [15:8] of
+* the PERF_CTL
+*/
+ msr = msr_read(MSR_IACORE_RATIOS);
+ perf_ctl.lo = (msr.lo 0x3f) 8;
+
+ /*
+* Set guaranteed vid [21:16] from IACORE_VIDS to bits [7:0] of
+* the PERF_CTL
+*/
+ msr = msr_read(MSR_IACORE_VIDS);
+ perf_ctl.lo |= (msr.lo 0x7f) 16;
+ perf_ctl.hi = 0;
+
+ msr_write(MSR_IA32_PERF_CTL, perf_ctl);
+}
+
+static int cpu_x86_baytrail_probe(struct udevice *dev)
+{
+ debug(Init baytrail core\n);
+
+ /*
+* On bay trail the turbo disable bit is actually scoped at the
+* building-block level, not package. For non-BSP cores that are
+* within a building block, enable turbo. The cores within the BSP's
+* building block will just see it already enabled and move on.
+*/
+ if (lapicid())
+ turbo_enable();
+
+ /* Dynamic L2 shrink enable and threshold */
+ msr_clrsetbits_64(MSR_PMG_CST_CONFIG_CONTROL, 0x3f000f, 0xe0008),
+
+ /* Disable C1E */
+ msr_clrsetbits_64(MSR_POWER_CTL, 2, 0);
+ msr_setbits_64(MSR_POWER_MISC, 0x44);
+
+ /* Set this core to max frequency ratio */
+ set_max_freq();
+
+ return 0;
+}
+
+static unsigned bus_freq(void)
+{
+ msr_t clk_info = msr_read(MSR_BSEL_CR_OVERCLOCK_CONTROL);
+ switch (clk_info.lo 0x3) {
+ case 0:
+ return 8333;
+ case 1:
+ return 1;
+ case 2:
+ return 1;
+ case 3:
+ return 11666;
+ default:
+ return 0;
+ }
[U-Boot] [PATCH 20/20] x86: Enable multi-core init for Minnowboard MAX
Enable the CPU uclass and Simple Firmware interface for Minnowbaord MAX. This
enables multi-core support in Linux.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/dts/minnowmax.dts | 20
configs/minnowmax_defconfig | 4
2 files changed, 24 insertions(+)
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index ecd4a89..1d08e8c 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -26,6 +26,26 @@
stdout-path = /serial;
};
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ device_type = cpu;
+ compatible = intel,baytrail-cpu;
+ reg = 0;
+ intel,apic-id = 0;
+ };
+
+ cpu@1 {
+ device_type = cpu;
+ compatible = intel,baytrail-cpu;
+ reg = 1;
+ intel,apic-id = 4;
+ };
+
+ };
+
spi {
#address-cells = 1;
#size-cells = 0;
diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index d1add19..6b70de2 100644
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -8,3 +8,7 @@ CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
CONFIG_MMCONF_BASE_ADDRESS=0xe000
CONFIG_HAVE_INTEL_ME=y
+CONFIG_SFI=y
+CONFIG_CPU=y
+CONFIG_CMD_CPU=y
+CONFIG_SMP=y
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH 10/20] x86: Add atomic operations
Add a subset of this header file from Linux 4.0 to support atomic operations
in U-Boot.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/atomic.h | 115 ++
1 file changed, 115 insertions(+)
create mode 100644 arch/x86/include/asm/atomic.h
diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h
new file mode 100644
index 000..806f787
--- /dev/null
+++ b/arch/x86/include/asm/atomic.h
@@ -0,0 +1,115 @@
+#ifndef _ASM_X86_ATOMIC_H
+#define _ASM_X86_ATOMIC_H
+
+#include linux/compiler.h
+#include linux/types.h
+#include asm/processor.h
+
+typedef struct { volatile int counter; } atomic_t;
+
+/*
+ * Atomic operations that C can't guarantee us. Useful for
+ * resource counting etc..
+ */
+
+#define ATOMIC_INIT(i) { (i) }
+
+/**
+ * atomic_read - read atomic variable
+ * @v: pointer of type atomic_t
+ *
+ * Atomically reads the value of @v.
+ */
+static inline int atomic_read(const atomic_t *v)
+{
+ return ACCESS_ONCE((v)-counter);
+}
+
+/**
+ * atomic_set - set atomic variable
+ * @v: pointer of type atomic_t
+ * @i: required value
+ *
+ * Atomically sets the value of @v to @i.
+ */
+static inline void atomic_set(atomic_t *v, int i)
+{
+ v-counter = i;
+}
+
+/**
+ * atomic_add - add integer to atomic variable
+ * @i: integer value to add
+ * @v: pointer of type atomic_t
+ *
+ * Atomically adds @i to @v.
+ */
+static inline void atomic_add(int i, atomic_t *v)
+{
+ asm volatile(LOCK_PREFIX addl %1,%0
+: +m (v-counter)
+: ir (i));
+}
+
+/**
+ * atomic_sub - subtract integer from atomic variable
+ * @i: integer value to subtract
+ * @v: pointer of type atomic_t
+ *
+ * Atomically subtracts @i from @v.
+ */
+static inline void atomic_sub(int i, atomic_t *v)
+{
+ asm volatile(LOCK_PREFIX subl %1,%0
+: +m (v-counter)
+: ir (i));
+}
+
+/**
+ * atomic_inc - increment atomic variable
+ * @v: pointer of type atomic_t
+ *
+ * Atomically increments @v by 1.
+ */
+static inline void atomic_inc(atomic_t *v)
+{
+ asm volatile(LOCK_PREFIX incl %0
+: +m (v-counter));
+}
+
+/**
+ * atomic_dec - decrement atomic variable
+ * @v: pointer of type atomic_t
+ *
+ * Atomically decrements @v by 1.
+ */
+static inline void atomic_dec(atomic_t *v)
+{
+ asm volatile(LOCK_PREFIX decl %0
+: +m (v-counter));
+}
+
+/**
+ * atomic_inc_short - increment of a short integer
+ * @v: pointer to type int
+ *
+ * Atomically adds 1 to @v
+ * Returns the new value of @u
+ */
+static inline short int atomic_inc_short(short int *v)
+{
+ asm(LOCK_PREFIX addw $1, %0 : +m (*v));
+ return *v;
+}
+
+/* These are x86-specific, used by some header files */
+#define atomic_clear_mask(mask, addr) \
+ asm volatile(LOCK_PREFIX andl %0,%1 \
+: : r (~(mask)), m (*(addr)) : memory)
+
+#define atomic_set_mask(mask, addr)\
+ asm volatile(LOCK_PREFIX orl %0,%1\
+: : r ((unsigned)(mask)), m (*(addr)) \
+: memory)
+
+#endif /* _ASM_X86_ATOMIC_H */
--
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[U-Boot] [PATCH 19/20] x86: Tidy up the LAPIC init code
We don't need to support really old x86 CPUs, so drop this code.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/lapic.c | 20
arch/x86/include/asm/lapic.h | 7 ---
2 files changed, 12 insertions(+), 15 deletions(-)
diff --git a/arch/x86/cpu/lapic.c b/arch/x86/cpu/lapic.c
index 4690603..0c9c324 100644
--- a/arch/x86/cpu/lapic.c
+++ b/arch/x86/cpu/lapic.c
@@ -15,7 +15,6 @@
void lapic_setup(void)
{
-#if NEED_LAPIC == 1
/* Only Pentium Pro and later have those MSR stuff */
debug(Setting up local apic: );
@@ -46,12 +45,17 @@ void lapic_setup(void)
(LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
LAPIC_DELIVERY_MODE_NMI));
- debug(apic_id: 0x%02lx, , lapicid());
-#else /* !NEED_LLAPIC */
- /* Only Pentium Pro and later have those MSR stuff */
- debug(Disabling local apic: );
- disable_lapic();
-#endif /* !NEED_LAPIC */
- debug(done.\n);
+ debug(apic_id: 0x%02lx\n, lapicid());
post_code(POST_LAPIC);
}
+
+void lapic_enable(void)
+{
+ msr_t msr;
+
+ msr = msr_read(LAPIC_BASE_MSR);
+ msr.hi = 0xff00;
+ msr.lo = 0x07ff;
+ msr.lo |= LAPIC_DEFAULT_BASE | LAPIC_BASE_MSR_ENABLE;
+ msr_write(LAPIC_BASE_MSR, msr);
+}
diff --git a/arch/x86/include/asm/lapic.h b/arch/x86/include/asm/lapic.h
index 0a7f443..dff75c5 100644
--- a/arch/x86/include/asm/lapic.h
+++ b/arch/x86/include/asm/lapic.h
@@ -14,13 +14,6 @@
#include asm/msr.h
#include asm/processor.h
-/* See if I need to initialize the local apic */
-#if CONFIG_SMP || CONFIG_IOAPIC
-# define NEED_LAPIC 1
-#else
-# define NEED_LAPIC 0
-#endif
-
static inline __attribute__((always_inline))
unsigned long lapic_read(unsigned long reg)
{
--
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[U-Boot] [PATCH 14/20] x86: Provide access to the IDT
Add a function to return the address of the Interrupt Descriptor Table.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/interrupts.c| 5 +
arch/x86/include/asm/interrupt.h | 2 ++
2 files changed, 7 insertions(+)
diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c
index a21d2a6..c777d36 100644
--- a/arch/x86/cpu/interrupts.c
+++ b/arch/x86/cpu/interrupts.c
@@ -147,6 +147,11 @@ int cpu_init_interrupts(void)
return 0;
}
+void *x86_get_idt(void)
+{
+ return idt_ptr;
+}
+
void __do_irq(int irq)
{
printf(Unhandled IRQ : %d\n, irq);
diff --git a/arch/x86/include/asm/interrupt.h b/arch/x86/include/asm/interrupt.h
index 25abde7..0a75f89 100644
--- a/arch/x86/include/asm/interrupt.h
+++ b/arch/x86/include/asm/interrupt.h
@@ -38,4 +38,6 @@ extern char exception_stack[];
*/
void configure_irq_trigger(int int_num, bool is_level_triggered);
+void *x86_get_idt(void);
+
#endif
--
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[U-Boot] [PATCH 09/20] Add a 'cpu' command to print CPU information
Add a simple command which provides access to a list of available CPUs along
with descriptions and basic information.
Signed-off-by: Simon Glass s...@chromium.org
---
common/Kconfig | 8
common/Makefile | 1 +
common/cmd_cpu.c | 113 +++
3 files changed, 122 insertions(+)
create mode 100644 common/cmd_cpu.c
diff --git a/common/Kconfig b/common/Kconfig
index 5d7e48a..15759f7 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -31,6 +31,14 @@ config CMD_CONSOLE
help
Print console devices and information.
+config CMD_CPU
+ bool cpu
+ help
+ Print information about available CPUs. This normally shows the
+ number of CPUs, type (e.g. manufacturer, architecture, product or
+ internal name) and clock frequency. Other information may be
+ available depending on the CPU driver.
+
config CMD_LICENSE
bool license
help
diff --git a/common/Makefile b/common/Makefile
index fba3830..9084c73 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_CMD_CBFS) += cmd_cbfs.o
obj-$(CONFIG_CMD_CLK) += cmd_clk.o
obj-$(CONFIG_CMD_CONSOLE) += cmd_console.o
obj-$(CONFIG_CMD_CPLBINFO) += cmd_cplbinfo.o
+obj-$(CONFIG_CMD_CPU) += cmd_cpu.o
obj-$(CONFIG_DATAFLASH_MMC_SELECT) += cmd_dataflash_mmc_mux.o
obj-$(CONFIG_CMD_DATE) += cmd_date.o
obj-$(CONFIG_CMD_DEMO) += cmd_demo.o
diff --git a/common/cmd_cpu.c b/common/cmd_cpu.c
new file mode 100644
index 000..c3e229f
--- /dev/null
+++ b/common/cmd_cpu.c
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass s...@chromium.org
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include command.h
+#include cpu.h
+#include dm.h
+
+static const char *cpu_feature_name[CPU_FEAT_COUNT] = {
+ L1 cache,
+ MMU,
+};
+
+static int print_cpu_list(bool detail)
+{
+ struct udevice *dev;
+ struct uclass *uc;
+ char buf[100];
+ int ret;
+
+ ret = uclass_get(UCLASS_CPU, uc);
+ if (ret) {
+ printf(Cannot find CPU uclass\n);
+ return ret;
+ }
+ uclass_foreach_dev(dev, uc) {
+ struct cpu_platdata *plat = dev_get_parent_platdata(dev);
+ struct cpu_info info;
+ bool first;
+ int i;
+
+ ret = cpu_get_desc(dev, buf, sizeof(buf));
+ printf(%3d: %-10s %s\n, dev-seq, dev-name,
+ ret ? no description : buf);
+ if (!detail)
+ continue;
+ ret = cpu_get_info(dev, info);
+ if (ret) {
+ printf(\t(no detail available);
+ if (ret != -ENOSYS)
+ printf(: err=%d\n, ret);
+ printf()\n);
+ continue;
+ }
+ printf(\tID = %d, freq = , plat-cpu_id);
+ print_freq(info.cpu_freq, );
+ first = true;
+ for (i = 0; i CPU_FEAT_COUNT; i++) {
+ if (info.features (1 i)) {
+ printf(%s%s, first ? : : , ,
+ cpu_feature_name[i]);
+ first = false;
+ }
+ }
+ printf(\n);
+ }
+
+ return 0;
+}
+
+static int do_cpu_list(cmd_tbl_t *cmdtp, int flag, int argc, char *const
argv[])
+{
+ if (print_cpu_list(false))
+ return CMD_RET_FAILURE;
+
+ return 0;
+}
+
+static int do_cpu_detail(cmd_tbl_t *cmdtp, int flag, int argc,
+char *const argv[])
+{
+ if (print_cpu_list(true))
+ return CMD_RET_FAILURE;
+
+ return 0;
+}
+
+static cmd_tbl_t cmd_cpu_sub[] = {
+ U_BOOT_CMD_MKENT(list, 2, 1, do_cpu_list, , ),
+ U_BOOT_CMD_MKENT(detail, 4, 0, do_cpu_detail, , ),
+};
+
+/*
+ * Process a cpu sub-command
+ */
+static int do_cpu(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ cmd_tbl_t *c = NULL;
+
+ /* Strip off leading 'cpu' command argument */
+ argc--;
+ argv++;
+
+ if (argc)
+ c = find_cmd_tbl(argv[0], cmd_cpu_sub, ARRAY_SIZE(cmd_cpu_sub));
+
+ if (c)
+ return c-cmd(cmdtp, flag, argc, argv);
+ else
+ return CMD_RET_USAGE;
+}
+
+U_BOOT_CMD(
+ cpu, 2, 1, do_cpu,
+ display information about CPUs,
+ list - list available CPUs\n
+ cpu detail - show CPU detail
+);
--
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[U-Boot] [PATCH 06/20] Add print_freq() to display frequencies nicely
Add a function similar to print_size() that works for frequencies. It can
handle from Hz to GHz.
Signed-off-by: Simon Glass s...@chromium.org
---
include/display_options.h | 11 +++
lib/display_options.c | 41 +
2 files changed, 52 insertions(+)
diff --git a/include/display_options.h b/include/display_options.h
index c222ea2..10b4641 100644
--- a/include/display_options.h
+++ b/include/display_options.h
@@ -23,6 +23,17 @@
void print_size(uint64_t size, const char *suffix);
/**
+ * print_freq() - Print a frequency with a suffix
+ *
+ * print frequencies as x.xx GHz, xxx KHz, etc as needed; allow for
+ * optional trailing string (like \n)
+ *
+ * @freq: Frequency to print in Hz
+ * @suffix String to print after the frequency
+ */
+void print_freq(uint64_t freq, const char *suffix);
+
+/**
* print_buffer() - Print data buffer in hex and ascii form
*
* Data reads are buffered so that each memory address is only read once.
diff --git a/lib/display_options.c b/lib/display_options.c
index 3f32bcd..cf6f50b 100644
--- a/lib/display_options.c
+++ b/lib/display_options.c
@@ -7,6 +7,7 @@
#include config.h
#include common.h
+#include div64.h
#include inttypes.h
#include version.h
#include linux/ctype.h
@@ -22,6 +23,46 @@ int display_options (void)
return 0;
}
+#ifndef CONFIG_SH
+/* SH gcc 4.6 toolchain produces undefined reference to '__umoddi3' here */
+void print_freq(uint64_t freq, const char *s)
+{
+ unsigned long m = 0, n;
+ uint32_t f;
+ static const char names[] = {'G', 'M', 'K'};
+ unsigned long d = 1e9;
+ char c = 0;
+ unsigned int i;
+
+ for (i = 0; i ARRAY_SIZE(names); i++, d /= 10) {
+ if (freq = d) {
+ c = names[i];
+ break;
+ }
+ }
+
+ if (!c) {
+ printf(% PRIu64 Hz%s, freq, s);
+ return;
+ }
+
+ f = do_div(freq, d);
+ n = freq;
+
+ /* If there's a remainder, show the first few digits */
+ if (f) {
+ m = f % 1000;
+ while (!(m % 10))
+ m /= 10;
+ }
+
+ printf(%lu, n);
+ if (m)
+ printf(.%ld, m);
+ printf( %cHz%s, c, s);
+}
+#endif
+
void print_size(uint64_t size, const char *s)
{
unsigned long m = 0, n;
--
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Re: [U-Boot] [PATCH v6 2/4] mtd, nand: move common functions from cmd_nand.c to common place
On Mon, 2015-04-27 at 07:42 +0200, Heiko Schocher wrote: move common functions from cmd_nand.c (for calculating offset and size from cmdline paramter) to common place, so they could used from other commands which use mtd partitions. For onenand the arg_off_size() is left in common/cmd_onenand.c. It should use now the common arg_off() function, but as I could not test onenand I let it there ... Signed-off-by: Heiko Schocher h...@denx.de Reviewed-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com --- Changes in v6: None Changes in v2: - none Series-changes: 3 - add comments from scott wood: - align MTD_DEV_TYPE_NAND correct - remove unnecessary inline - rework jffs2 header problem later - rebase with d6c1ffc7d23f4fe4ae8c91101861055b8e1501b6 Series-changes: 4 - rebased against 385a08a60f042061b004642d6b9bb6cfb794ad5a Series-changes: 5 - add comment from Scott Wood: keep the continuation line aligned with the arguments Series-changes: 6 - add Reviewed-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com - fix Tom Rinis mail addr - add comment from Scott Wood: - fix indentation level - add mtd_ prefix - move str2off and str2long into common place, as they are no mtd specific functions and change return value from int to bool common/cmd_nand.c | 148 ++-- common/cmd_onenand.c| 19 ++- common/cmd_test.c | 12 +--- drivers/mtd/Makefile| 4 +- drivers/mtd/mtd_uboot.c | 99 include/linux/mtd/mtd.h | 5 ++ include/vsprintf.h | 2 + lib/vsprintf.c | 16 ++ 8 files changed, 164 insertions(+), 141 deletions(-) create mode 100644 drivers/mtd/mtd_uboot.c Acked-by: Scott Wood scottw...@freescale.com -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] cmd_part: fix usage text
Fix the usage info from: part part uuid interface dev:part to part uuid interface dev:part Signed-off-by: Maxin B. John maxin.j...@enea.com --- common/cmd_part.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/cmd_part.c b/common/cmd_part.c index d04588e..8483c12 100644 --- a/common/cmd_part.c +++ b/common/cmd_part.c @@ -128,7 +128,7 @@ static int do_part(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) U_BOOT_CMD( part, CONFIG_SYS_MAXARGS, 1, do_part, disk partition related commands, - part uuid interface dev:part\n + uuid interface dev:part\n - print partition UUID\n part uuid interface dev:part varname\n - set environment variable to partition UUID\n -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/20] x86: Disable -Werror
On Tue, Apr 28, 2015 at 6:48 AM, Simon Glass s...@chromium.org wrote: This is annoying during development and serves no useful purpose since warnings are clearly displayed now that we are using Kbuild. Remove this option. Signed-off-by: Simon Glass s...@chromium.org --- arch/x86/cpu/config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/cpu/config.mk b/arch/x86/cpu/config.mk index 84aeaf3..4c4d0c7 100644 --- a/arch/x86/cpu/config.mk +++ b/arch/x86/cpu/config.mk @@ -7,7 +7,7 @@ CROSS_COMPILE ?= i386-linux- -PLATFORM_CPPFLAGS += -D__I386__ -Werror +PLATFORM_CPPFLAGS += -D__I386__ # DO NOT MODIFY THE FOLLOWING UNLESS YOU REALLY KNOW WHAT YOU ARE DOING! LDPPFLAGS += -DRESET_SEG_START=0x -- Reviewed-by: Bin Meng bmeng...@gmail.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/20] Move display_options functions to their own header
Hi Simon, On Tue, Apr 28, 2015 at 6:48 AM, Simon Glass s...@chromium.org wrote: Before adding one more function, create a separate header to help reduce the size of common.h. Add the missing function comments and tidy up. Signed-off-by: Simon Glass s...@chromium.org --- Reviewed-by: Bin Meng bmeng...@gmail.com But please see comments below. include/common.h | 16 +--- include/display_options.h | 48 +++ lib/display_options.c | 13 - 3 files changed, 49 insertions(+), 28 deletions(-) create mode 100644 include/display_options.h diff --git a/include/common.h b/include/common.h index cde3474..d4d704a 100644 --- a/include/common.h +++ b/include/common.h @@ -192,22 +192,8 @@ intcpu_init(void); /* */ phys_size_t initdram (int); -intdisplay_options (void); -/** - * print_size() - Print a size with a suffic - * - * print sizes as xxx KiB, xxx.y KiB, xxx MiB, xxx.y MiB, - * xxx GiB, xxx.y GiB, etc as needed; allow for optional trailing string - * (like \n) - * - * @size: Size to print - * @suffix String to print after the size - */ -void print_size(uint64_t size, const char *suffix); - -int print_buffer(ulong addr, const void *data, uint width, uint count, -uint linelen); +#include display_options.h /* common/main.c */ void main_loop (void); diff --git a/include/display_options.h b/include/display_options.h new file mode 100644 index 000..c222ea2 --- /dev/null +++ b/include/display_options.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2015 Google, Inc + * + * (C) Copyright 2000-2002 + * Wolfgang Denk, DENX Software Engineering, w...@denx.de. + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __display_options_h +#define __display_options_h I think we need capital letters here for the macro. +/** + * print_size() - Print a size with a suffix + * + * print sizes as xxx KiB, xxx.y KiB, xxx MiB, xxx.y MiB, print-Print + * xxx GiB, xxx.y GiB, etc as needed; allow for optional trailing string + * (like \n) + * + * @size: Size to print + * @suffix String to print after the size + */ +void print_size(uint64_t size, const char *suffix); + +/** + * print_buffer() - Print data buffer in hex and ascii form + * + * Data reads are buffered so that each memory address is only read once. + * This is useful when displaying the contents of volatile registers. + * + * @addr: Starting address to display at start of line + * @data: pointer to data buffer + * @width: data value width. May be 1, 2, or 4. + * @count: number of values to display + * @linelen: Number of values to print per line; specify 0 for default length + */ +int print_buffer(ulong addr, const void *data, uint width, uint count, +uint linelen); + +/** + * display_options() - display the version string / build tag + * + * This displays the U-Boot version string. If a build tag is available this + * is displayed also. + */ +int display_options(void); + +#endif diff --git a/lib/display_options.c b/lib/display_options.c index d5d17b2..3f32bcd 100644 --- a/lib/display_options.c +++ b/lib/display_options.c @@ -63,19 +63,6 @@ void print_size(uint64_t size, const char *s) printf ( %ciB%s, c, s); } -/* - * Print data buffer in hex and ascii form to the terminal. - * - * data reads are buffered so that each memory address is only read once. - * Useful when displaying the contents of volatile registers. - * - * parameters: - *addr: Starting address to display at start of line - *data: pointer to data buffer - *width: data value width. May be 1, 2, or 4. - *count: number of values to display - *linelen: Number of values to print per line; specify 0 for default length - */ #define MAX_LINE_LENGTH_BYTES (64) #define DEFAULT_LINE_LENGTH_BYTES (16) int print_buffer(ulong addr, const void *data, uint width, uint count, -- Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6 0/26] tegra: Add eDP support for nyan-big
Hi Tom, Jimmy,
On 14 April 2015 at 21:03, Simon Glass s...@chromium.org wrote:
This series adds eDP support for nyan-big so that the display works.
Nyan-big is based on tegra124.
Some support is added for new clocks to make this work. The drm_dp_helper.h
file is brought in from Linux since many of the DisplayPort constants are
generic. A very simple uclass is added for DisplayPort, and the Tegra
driver makes use of that. The U-Boot EDID support is enhanced to read some
additional information (detailed timings).
There is existing video support for Tegra20, but I don't think it works for
Tegra30/114 (is this correct?). This series relies on detecting the display
at run-time as I cannot find a good device tree binding for things like
display depth. But if we could resolve that then it might be possible to
move Tegra20 over to use the same driver, etc. There is clearly a lot in
common with the display controllers - I have exploited this with the header
file but not with the C file.
HDMI is not supported at present. If this is easy and there is an existing
driver to follow along with then I might be able to incorporate it later.
This series is available at u-boot-dm/nyan-working
Any comments on this new version please?
Changes in v6:
- Add a comment about tegra_dc_dp_check_sink()
- Add more debug() statements
- Add new patch to sort the uclasses
- Fix incorrect use of DP_MAIN_LINK_CHANNEL_CODING_SET register
- Improve retry logic in tegra_dc_dp_check_sink()
- Report failure when we cannot init the eDP display
Changes in v4:
- Rebase on u-boot-dm/next since this series is still pending
Changes in v3:
- Add full link training support
- Change parameters of update_display_mode()
- Fix 64-bit maths error
- Fix trainging typo
- Reorder parameters to tegra_dc_sor_attach()
- Set scramble_ena to 1 on start-up so that link training succeeds
- Simplify timouts to remove repeated multiplication by 1000
- Use real error return values in tegra_dc_dpaux_write_chunk() and others
- Use sor pointer in struct tegra_dp_priv
Changes in v2:
- Rebase on top of u-boot-dm
- Remove definition of BIT()
Simon Glass (26):
dm: core: Sort the uclasses
dm: gpio: Add error handling and a function to claim vector GPIOs
fdt: Add binding decode function for display-timings
tegra: Move the pwm into tegra-common
tegra: pwm: Allow the clock rate to be left as is
tegra: Move checkboard() into the board code
tegra: Add a board ID function
power: Export register access functions from as3722
tegra: Provide a function to allow LCD PMIC setup
tegra: Add support for setting up a as3722 PMIC
tegra: nyan-big: Add LCD PMIC init and board ID
tegra124: dts: Add host1x node to provide display information
tegra: config: Use CONFIG_LCD to detect LCD presence
tegra: clock: Add checking for invalid clock IDs
tegra: clock: Split the clock source code into a separate function
tegra124: clock: Add display clocks and functions
tegra: Move display controller header into common
video: Add drm_dp_helper.h
edid: Add a function to read detailed monitor timings
dm: video: Add a uclass for display port
tegra: dts: nyan-big: Add definitions for eDP display
tegra: video: Support serial output resource (SOR) on tegra124
tegra: video: Add Embedded DisplayPort driver
tegra: video: support eDP displays on Tegra124 devices
tegra: config: nyan-big: Enable LCD
tegra124: video: Add full link training for eDP
arch/arm/dts/tegra124-nyan-big.dts | 47 +
arch/arm/dts/tegra124.dtsi | 84 +
arch/arm/include/asm/arch-tegra/clk_rst.h | 15 +-
arch/arm/include/asm/arch-tegra/clock.h| 14 +
.../include/asm/{arch-tegra20 = arch-tegra}/dc.h | 67 +-
arch/arm/include/asm/arch-tegra/pwm.h | 60 +
arch/arm/include/asm/arch-tegra/sys_proto.h| 19 +-
arch/arm/include/asm/arch-tegra124/clock-tables.h |3 +-
arch/arm/include/asm/arch-tegra124/clock.h | 21 +
arch/arm/include/asm/arch-tegra124/display.h | 58 +
arch/arm/include/asm/arch-tegra124/pwm.h | 14 +
arch/arm/include/asm/arch-tegra20/display.h|2 +-
arch/arm/include/asm/arch-tegra20/pwm.h| 54 +-
arch/arm/mach-tegra/Makefile |1 +
arch/arm/mach-tegra/board.c|8 -
arch/arm/mach-tegra/clock.c| 83 +-
arch/arm/mach-tegra/{tegra20 = }/pwm.c|7 +-
arch/arm/mach-tegra/tegra124/clock.c | 141 +-
arch/arm/mach-tegra/tegra20/Makefile |1 -
arch/arm/mach-tegra/tegra20/display.c |2 +-
board/nvidia/common/board.c| 40 +-
board/nvidia/nyan-big/nyan-big.c | 34 +-
common/edid.c | 105 ++
configs/nyan-big_defconfig
Re: [U-Boot] [PATCH] dm: i2c-gpio: Remove redundant dm_gpio_set_value() call
On 25 April 2015 at 21:05, Axel Lin axel@ingics.com wrote: dm_gpio_set_dir_flags() will also set gpio output value when switching to gpio output. So it's not necessary to call dm_gpio_set_value() after dm_gpio_set_dir_flags() call. Signed-off-by: Axel Lin axel@ingics.com --- drivers/i2c/i2c-gpio.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions(-) Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 08/20] dm: Implement a CPU uclass
It is useful to be able to keep track of the available CPUs in a multi-CPU
system. This uclass is mostly intended for use with SMP systems.
The uclass provides methods for getting basic information about each CPU.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/Kconfig | 2 ++
drivers/Makefile | 1 +
drivers/cpu/Kconfig | 8 +
drivers/cpu/Makefile | 7
drivers/cpu/cpu-uclass.c | 61 +++
include/cpu.h| 84
include/dm/uclass-id.h | 1 +
7 files changed, 164 insertions(+)
create mode 100644 drivers/cpu/Kconfig
create mode 100644 drivers/cpu/Makefile
create mode 100644 drivers/cpu/cpu-uclass.c
create mode 100644 include/cpu.h
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 941aa0c..1f40887 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -2,6 +2,8 @@ menu Device Drivers
source drivers/core/Kconfig
+source drivers/cpu/Kconfig
+
source drivers/demo/Kconfig
source drivers/pci/Kconfig
diff --git a/drivers/Makefile b/drivers/Makefile
index 5ef58c0..405b64b 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_DM_DEMO) += demo/
obj-$(CONFIG_BIOSEMU) += bios_emulator/
obj-y += block/
obj-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount/
+obj-$(CONFIG_CPU) += cpu/
obj-y += crypto/
obj-$(CONFIG_FPGA) += fpga/
obj-y += hwmon/
diff --git a/drivers/cpu/Kconfig b/drivers/cpu/Kconfig
new file mode 100644
index 000..23745e3
--- /dev/null
+++ b/drivers/cpu/Kconfig
@@ -0,0 +1,8 @@
+config CPU
+ bool Enable CPU drivers using Driver Model
+ help
+ This allows drivers to be provided for CPUs and their type to be
+ specified in the board's device tree. For boards which support
+ multiple CPUs, they normally have to be set up in U-Boot so that
+ they can work correctly in the OS. This provides a framework for
+ finding out information about available CPUs and making changes.
diff --git a/drivers/cpu/Makefile b/drivers/cpu/Makefile
new file mode 100644
index 000..8710160
--- /dev/null
+++ b/drivers/cpu/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2015 Google, Inc
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+obj-$(CONFIG_CPU) += cpu-uclass.o
diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c
new file mode 100644
index 000..ab18ee2
--- /dev/null
+++ b/drivers/cpu/cpu-uclass.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2015 Google, Inc
+ * Written by Simon Glass s...@chromium.org
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include cpu.h
+#include dm.h
+#include dm/lists.h
+#include dm/root.h
+
+int cpu_get_desc(struct udevice *dev, char *buf, int size)
+{
+ struct cpu_ops *ops = cpu_get_ops(dev);
+
+ if (!ops-get_desc)
+ return -ENOSYS;
+
+ return ops-get_desc(dev, buf, size);
+}
+
+int cpu_get_info(struct udevice *dev, struct cpu_info *info)
+{
+ struct cpu_ops *ops = cpu_get_ops(dev);
+
+ if (!ops-get_desc)
+ return -ENOSYS;
+
+ return ops-get_info(dev, info);
+}
+
+U_BOOT_DRIVER(cpu_bus) = {
+ .name = cpu_bus,
+ .id = UCLASS_SIMPLE_BUS,
+ .per_child_platdata_auto_alloc_size = sizeof(struct cpu_platdata),
+};
+
+static int uclass_cpu_init(struct uclass *uc)
+{
+ struct udevice *dev;
+ int node;
+ int ret;
+
+ node = fdt_path_offset(gd-fdt_blob, /cpus);
+ if (node 0)
+ return 0;
+
+ ret = device_bind_driver_to_node(dm_root(), cpu_bus, cpus, node,
+dev);
+
+ return ret;
+}
+
+UCLASS_DRIVER(cpu) = {
+ .id = UCLASS_CPU,
+ .name = cpu,
+ .flags = DM_UC_FLAG_SEQ_ALIAS,
+ .init = uclass_cpu_init,
+};
diff --git a/include/cpu.h b/include/cpu.h
new file mode 100644
index 000..46467d0
--- /dev/null
+++ b/include/cpu.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass s...@chromium.org
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __cpu_h
+#define __cpu_h
+
+/**
+ * struct cpu_platdata - platform data for a CPU
+ *
+ * This can be accessed with dev_get_parent_platdata() for any UCLASS_CPU
+ * device.
+ *
+ * @cpu_id:Platform-specific way of identifying the CPU.
+ */
+struct cpu_platdata {
+ int cpu_id;
+};
+
+/* CPU features - mostly just a placeholder for now */
+enum {
+ CPU_FEAT_L1_CACHE = 0,/* Supports level 1 cache */
+ CPU_FEAT_MMU= 1,/* Supports virtual memory */
+
+ CPU_FEAT_COUNT,
+};
+
+/**
+ * struct cpu_info - Information about a CPU
+ *
+ * @cpu_freq: Current CPU frequency in Hz
+ * @features: Flags for supported CPU features
+ */
+struct cpu_info {
+ ulong cpu_freq;
+ ulong features;
+};
+
+struct cpu_ops {
+
Re: [U-Boot] [PATCH 03/20] x86: Remove unwanted MMC debugging
On Tue, Apr 28, 2015 at 6:48 AM, Simon Glass s...@chromium.org wrote:
This printf() should not have made it into the code.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/baytrail/valleyview.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/x86/cpu/baytrail/valleyview.c
b/arch/x86/cpu/baytrail/valleyview.c
index a3e837d..9915da5 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -16,7 +16,6 @@ static struct pci_device_id mmc_supported[] = {
int cpu_mmc_init(bd_t *bis)
{
- printf(mmc init\n);
return pci_mmc_init(ValleyView SDHCI, mmc_supported,
ARRAY_SIZE(mmc_supported));
}
--
Reviewed-by: Bin Meng bmeng...@gmail.com
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[U-Boot] [PATCH 2/4] mx6cuboxi: Add USB host support
From: Fabio Estevam fabio.este...@freescale.com
Enable USB Host1 port.
Signed-off-by: Rabeeh Khoury rab...@solid-run.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/solidrun/mx6cuboxi/mx6cuboxi.c | 26 ++
include/configs/mx6cuboxi.h | 12
2 files changed, 38 insertions(+)
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c
b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index eab92f1..9aa0259 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -31,6 +31,8 @@
#include asm/io.h
#include asm/arch/sys_proto.h
#include spl.h
+#include usb.h
+#include usb/ehci-fsl.h
DECLARE_GLOBAL_DATA_PTR;
@@ -52,6 +54,7 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
#define ETH_PHY_RESET IMX_GPIO_NR(4, 15)
+#define USB_H1_VBUSIMX_GPIO_NR(1, 0)
int dram_init(void)
{
@@ -79,6 +82,10 @@ static iomux_v3_cfg_t const hb_cbi_sense[] = {
IOMUX_PADS(PAD_EIM_DA4__GPIO3_IO04 | MUX_PAD_CTRL(UART_PAD_CTRL)),
};
+static iomux_v3_cfg_t const usb_pads[] = {
+ IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
static void setup_iomux_uart(void)
{
SETUP_IOMUX_PADS(uart1_pads);
@@ -253,6 +260,21 @@ static int setup_display(void)
}
#endif /* CONFIG_VIDEO_IPUV3 */
+#ifdef CONFIG_USB_EHCI_MX6
+static void setup_usb(void)
+{
+ SETUP_IOMUX_PADS(usb_pads);
+}
+
+int board_ehci_hcd_init(int port)
+{
+ if (port == 1)
+ gpio_direction_output(USB_H1_VBUS, 1);
+
+ return 0;
+}
+#endif
+
int board_early_init_f(void)
{
int ret = 0;
@@ -261,6 +283,10 @@ int board_early_init_f(void)
#ifdef CONFIG_VIDEO_IPUV3
ret = setup_display();
#endif
+
+#ifdef CONFIG_USB_EHCI_MX6
+ setup_usb();
+#endif
return ret;
}
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 207a2a6..e7a18c6 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -82,6 +82,18 @@
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
+/* USB */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX6
+#define CONFIG_USB_STORAGE
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT2
+
#define CONFIG_SYS_NO_FLASH
/* Command definition */
--
1.9.1
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[U-Boot] [PATCH 1/4] mx6cuboxi: Add HDMI output support
From: Fabio Estevam fabio.este...@freescale.com
Add HDMI output using PLL5 as the source for the IPU DI clocks,
and accurate VESA timings.
These settings are based on the patch from Soeren Moch sm...@web.de
submitted for the tbs2910 mx6 based board.
It allows the display to work properly at 1024x768@60.
This should make the hdmi output signal compatible with most if not all
modern displays.
Signed-off-by: Jon Nettleton jon.nettle...@gmail.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/solidrun/mx6cuboxi/mx6cuboxi.c | 101 ++-
include/configs/mx6cuboxi.h | 18 ++-
2 files changed, 117 insertions(+), 2 deletions(-)
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c
b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index d3a32c1..eab92f1 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -18,9 +18,11 @@
#include asm/arch/imx-regs.h
#include asm/arch/iomux.h
#include asm/arch/mx6-pins.h
+#include asm/arch/mxc_hdmi.h
#include asm/errno.h
#include asm/gpio.h
#include asm/imx-common/iomux-v3.h
+#include asm/imx-common/video.h
#include mmc.h
#include fsl_esdhc.h
#include miiphy.h
@@ -159,10 +161,107 @@ int board_eth_init(bd_t *bis)
return cpu_eth_init(bis);
}
+#ifdef CONFIG_VIDEO_IPUV3
+static void do_enable_hdmi(struct display_info_t const *dev)
+{
+ imx_enable_hdmi_phy();
+}
+
+struct display_info_t const displays[] = {
+ {
+ .bus= -1,
+ .addr = 0,
+ .pixfmt = IPU_PIX_FMT_RGB24,
+ .detect = detect_hdmi,
+ .enable = do_enable_hdmi,
+ .mode = {
+ .name = HDMI,
+ /* 1024x768@60Hz (VESA)*/
+ .refresh= 60,
+ .xres = 1024,
+ .yres = 768,
+ .pixclock = 15384,
+ .left_margin= 160,
+ .right_margin = 24,
+ .upper_margin = 29,
+ .lower_margin = 3,
+ .hsync_len = 136,
+ .vsync_len = 6,
+ .sync = FB_SYNC_EXT,
+ .vmode = FB_VMODE_NONINTERLACED
+ }
+ }
+};
+
+size_t display_count = ARRAY_SIZE(displays);
+
+static int setup_display(void)
+{
+ struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+ int reg;
+ int timeout = 10;
+
+ enable_ipu_clock();
+ imx_setup_hdmi();
+
+ /* set video pll to 455MHz (24MHz * (37+11/12) / 2) */
+ setbits_le32(ccm-analog_pll_video, BM_ANADIG_PLL_VIDEO_POWERDOWN);
+
+ reg = readl(ccm-analog_pll_video);
+ reg = ~BM_ANADIG_PLL_VIDEO_DIV_SELECT;
+ reg |= BF_ANADIG_PLL_VIDEO_DIV_SELECT(37);
+ reg = ~BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT;
+ reg |= BF_ANADIG_PLL_VIDEO_POST_DIV_SELECT(1);
+ writel(reg, ccm-analog_pll_video);
+
+ writel(BF_ANADIG_PLL_VIDEO_NUM_A(11), ccm-analog_pll_video_num);
+ writel(BF_ANADIG_PLL_VIDEO_DENOM_B(12), ccm-analog_pll_video_denom);
+
+ reg = ~BM_ANADIG_PLL_VIDEO_POWERDOWN;
+ writel(reg, ccm-analog_pll_video);
+
+ while (timeout--)
+ if (readl(ccm-analog_pll_video) BM_ANADIG_PLL_VIDEO_LOCK)
+ break;
+ if (timeout 0) {
+ printf(Warning: video pll lock timeout!\n);
+ return -ETIMEDOUT;
+ }
+
+ reg = readl(ccm-analog_pll_video);
+ reg |= BM_ANADIG_PLL_VIDEO_ENABLE;
+ reg = ~BM_ANADIG_PLL_VIDEO_BYPASS;
+ writel(reg, ccm-analog_pll_video);
+
+ /* gate ipu1_di0_clk */
+ clrbits_le32(ccm-CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK);
+
+ /* select video_pll clock / 7 for ipu1_di0_clk - 65MHz pixclock */
+ reg = readl(ccm-chsccdr);
+ reg = ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK |
+MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK |
+MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK);
+ reg |= (2 MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET) |
+ (6 MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET) |
+ (0 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
+ writel(reg, ccm-chsccdr);
+
+ /* enable ipu1_di0_clk */
+ setbits_le32(ccm-CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK);
+
+ return 0;
+}
+#endif /* CONFIG_VIDEO_IPUV3 */
+
int board_early_init_f(void)
{
+ int ret = 0;
setup_iomux_uart();
- return 0;
+
+#ifdef CONFIG_VIDEO_IPUV3
+ ret = setup_display();
+#endif
+ return ret;
}
int board_init(void)
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index b569f34..207a2a6 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -27,7 +27,7 @@
#define CONFIG_IMX6_THERMAL
#define
Re: [U-Boot] [PATCH v2 5/6] sunxi: axp: Add driver-model support to the axp_gpio code
Hi Hans,
On 26 April 2015 at 03:51, Hans de Goede hdego...@redhat.com wrote:
Add driver-model support to the axp_gpio code, note that this needs a small
tweak to the driver-model version of sunxi_name_to_gpio to deal with the
vbus detect and enable pins which are not standard numbered gpios.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/include/asm/arch-sunxi/gpio.h | 6 --
drivers/gpio/axp_gpio.c| 39
++
drivers/gpio/sunxi_gpio.c | 14 +++-
3 files changed, 56 insertions(+), 3 deletions(-)
Reviewed-by: Simon Glass s...@chromium.org
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 902e95b..2d66077 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -204,8 +204,10 @@ enum sunxi_gpio_number {
#define SUNXI_GPIO_PULL_DOWN 2
/* Virtual AXP0 GPIOs */
-#define SUNXI_GPIO_AXP0_VBUS_DETECT8
-#define SUNXI_GPIO_AXP0_VBUS_ENABLE9
+#define SUNXI_GPIO_AXP0_PREFIX AXP0-
+#define SUNXI_GPIO_AXP0_VBUS_DETECT4
+#define SUNXI_GPIO_AXP0_VBUS_ENABLE5
+#define SUNXI_GPIO_AXP0_GPIO_COUNT 6
void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32
val);
void sunxi_gpio_set_cfgpin(u32 pin, u32 val);
diff --git a/drivers/gpio/axp_gpio.c b/drivers/gpio/axp_gpio.c
index d04ec22..17358e6 100644
--- a/drivers/gpio/axp_gpio.c
+++ b/drivers/gpio/axp_gpio.c
@@ -9,6 +9,10 @@
#include common.h
#include asm/arch/gpio.h
#include asm/arch/pmic_bus.h
+#include asm/gpio.h
+#include dm.h
+#include dm/device-internal.h
+#include dm/root.h
#include errno.h
#ifdef CONFIG_AXP152_POWER
@@ -135,13 +139,48 @@ int axp_gpio_set_value(struct udevice *dev, unsigned
pin, int val)
}
}
+#ifdef CONFIG_DM_GPIO
+static const struct dm_gpio_ops gpio_axp_ops = {
+ .direction_input= axp_gpio_direction_input,
+ .direction_output = axp_gpio_direction_output,
+ .get_value = axp_gpio_get_value,
+ .set_value = axp_gpio_set_value,
+};
+
+static int gpio_axp_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ /* Tell the uclass how many GPIOs we have */
+ uc_priv-bank_name = strdup(SUNXI_GPIO_AXP0_PREFIX);
+ uc_priv-gpio_count = SUNXI_GPIO_AXP0_GPIO_COUNT;
+
+ return 0;
+}
+
U_BOOT_DRIVER()
+struct driver gpio_axp_driver = {
+ .name = gpio_axp,
+ .id = UCLASS_GPIO,
+ .ops= gpio_axp_ops,
+ .probe = gpio_axp_probe,
+};
+#endif
+
int axp_gpio_init(void)
{
+ __maybe_unused struct udevice *dev;
int ret;
ret = pmic_bus_init();
if (ret)
return ret;
+#ifdef CONFIG_DM_GPIO
+ /* There is no devicetree support for the axp yet, so bind directly */
+ ret = device_bind(dm_root(), gpio_axp_driver, AXP, NULL, -1, dev);
+ if (ret)
+ return ret;
+#endif
+
return 0;
}
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index 5a0b5e4..21c3ff1 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -172,7 +172,19 @@ int sunxi_name_to_gpio(const char *name)
{
unsigned int gpio;
int ret;
-
+#if !defined CONFIG_SPL_BUILD defined CONFIG_AXP_GPIO
+ char lookup[8];
+
+ if (strcasecmp(name, AXP0-VBUS-DETECT) == 0) {
+ sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX %d,
+ SUNXI_GPIO_AXP0_VBUS_DETECT);
+ name = lookup;
+ } else if (strcasecmp(name, AXP0-VBUS-ENABLE) == 0) {
+ sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX %d,
+ SUNXI_GPIO_AXP0_VBUS_ENABLE);
+ name = lookup;
+ }
+#endif
ret = gpio_lookup_name(name, NULL, NULL, gpio);
return ret ? ret : gpio;
--
2.3.5
Regards,
Simon
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Re: [U-Boot] [PATCH v2 6/6] sunxi: axp: Remove non driver-model support from the axp gpio code
Hi Hans,
On 26 April 2015 at 03:51, Hans de Goede hdego...@redhat.com wrote:
Now that all sunxi boards are using driver-model for gpio (*), we can remove
the non driver-model support from the axp gpio code, and the glue to call
into the axp gpio code from the sunxi_gpio non driver-model code.
*) For the regular u-boot build, SPL still uses non driver-model gpio for
now, but the SPL never uses axp gpios support and we were already not building
axp-gpio support for the SPL.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/include/asm/arch-sunxi/gpio.h | 7 ---
drivers/gpio/axp_gpio.c| 17 -
drivers/gpio/sunxi_gpio.c | 32
3 files changed, 8 insertions(+), 48 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 2d66077..081e7d1 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -225,11 +225,4 @@ int axp_gpio_init(void);
static inline int axp_gpio_init(void) { return 0; }
#endif
-struct udevice;
-
-int axp_gpio_direction_input(struct udevice *dev, unsigned offset);
-int axp_gpio_direction_output(struct udevice *dev, unsigned offset, int val);
-int axp_gpio_get_value(struct udevice *dev, unsigned offset);
-int axp_gpio_set_value(struct udevice *dev, unsigned offset, int val);
-
#endif /* _SUNXI_GPIO_H */
diff --git a/drivers/gpio/axp_gpio.c b/drivers/gpio/axp_gpio.c
index 17358e6..956bb84 100644
--- a/drivers/gpio/axp_gpio.c
+++ b/drivers/gpio/axp_gpio.c
@@ -25,6 +25,8 @@
#error Unknown AXP model
#endif
+static int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val);
+
static u8 axp_get_gpio_ctrl_reg(unsigned pin)
{
switch (pin) {
@@ -40,7 +42,7 @@ static u8 axp_get_gpio_ctrl_reg(unsigned pin)
return 0;
}
-int axp_gpio_direction_input(struct udevice *dev, unsigned pin)
+static int axp_gpio_direction_input(struct udevice *dev, unsigned pin)
{
u8 reg;
@@ -58,7 +60,8 @@ int axp_gpio_direction_input(struct udevice *dev, unsigned
pin)
}
}
-int axp_gpio_direction_output(struct udevice *dev, unsigned pin, int val)
+static int axp_gpio_direction_output(struct udevice *dev, unsigned pin,
+int val)
{
__maybe_unused int ret;
u8 reg;
@@ -83,7 +86,7 @@ int axp_gpio_direction_output(struct udevice *dev, unsigned
pin, int val)
}
}
-int axp_gpio_get_value(struct udevice *dev, unsigned pin)
+static int axp_gpio_get_value(struct udevice *dev, unsigned pin)
{
u8 reg, val, mask;
int ret;
@@ -115,7 +118,7 @@ int axp_gpio_get_value(struct udevice *dev, unsigned pin)
return (val mask) ? 1 : 0;
}
-int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val)
+static int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val)
{
u8 reg;
@@ -139,7 +142,6 @@ int axp_gpio_set_value(struct udevice *dev, unsigned pin,
int val)
}
}
-#ifdef CONFIG_DM_GPIO
static const struct dm_gpio_ops gpio_axp_ops = {
.direction_input= axp_gpio_direction_input,
.direction_output = axp_gpio_direction_output,
@@ -164,23 +166,20 @@ struct driver gpio_axp_driver = {
.ops= gpio_axp_ops,
.probe = gpio_axp_probe,
};
-#endif
int axp_gpio_init(void)
{
- __maybe_unused struct udevice *dev;
+ struct udevice *dev;
int ret;
ret = pmic_bus_init();
if (ret)
return ret;
-#ifdef CONFIG_DM_GPIO
/* There is no devicetree support for the axp yet, so bind directly */
ret = device_bind(dm_root(), gpio_axp_driver, AXP, NULL, -1, dev);
Is there really no compatible string you can use?
device_bind_driver(dm_root(), gpio_axp, AXP, dev)
if (ret)
return ret;
-#endif
return 0;
}
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index 21c3ff1..f988130 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -74,10 +74,6 @@ int gpio_free(unsigned gpio)
int gpio_direction_input(unsigned gpio)
{
-#if !defined CONFIG_SPL_BUILD defined CONFIG_AXP_GPIO
- if (gpio = SUNXI_GPIO_AXP0_START)
- return axp_gpio_direction_input(NULL, gpio -
SUNXI_GPIO_AXP0_START);
-#endif
sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
return 0;
@@ -85,11 +81,6 @@ int gpio_direction_input(unsigned gpio)
int gpio_direction_output(unsigned gpio, int value)
{
-#if !defined CONFIG_SPL_BUILD defined CONFIG_AXP_GPIO
- if (gpio = SUNXI_GPIO_AXP0_START)
- return axp_gpio_direction_output(NULL, gpio -
SUNXI_GPIO_AXP0_START,
-value);
-#endif
sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
Re: [U-Boot] [PATCH v2 4/6] sunxi: axp: Move axp gpio code to a separate axpi-gpio driver
On 26 April 2015 at 03:51, Hans de Goede hdego...@redhat.com wrote: Move the axp-gpio code out of the drivers/power/axp*.c code, and into a new separate axpi-gpio driver. This change drops supports for the gpio3 pin on the axp209, as that requires special handling, and no boards are using it. Besides cleaning things up by moving the code to a separate driver, as a bonus this change also adds support for the (non vusb) gpio pins on the axp221 and the gpio pins on the axp152. The new axp-gpio driver gets its own Kconfig option, and is only enabled on boards which need it. Besides that it only gets enabled in the regular u-boot build and not for the SPL as we never need it in the SPL. Signed-off-by: Hans de Goede hdego...@redhat.com Reviewed-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/29] fdt: arm: Drop device tree padding
Hi Masahiro, On 22 April 2015 at 23:40, Masahiro Yamada yamada.masah...@socionext.com wrote: Hi Simon, 2015-02-28 14:06 GMT+09:00 Simon Glass s...@chromium.org: The 4KB padding doesn't seem necessary since we don't normally adjust the control device tree file within U-Boot. Signed-off-by: Simon Glass s...@chromium.org --- arch/arm/dts/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index fac16cc..121725e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -53,7 +53,7 @@ dtb-$(CONFIG_SOCFPGA) += socfpga_cyclone5_socrates.dtb targets += $(dtb-y) -DTC_FLAGS += -R 4 -p 0x1000 +DTC_FLAGS += -R 4 PHONY += dtbs dtbs: $(addprefix $(obj)/, $(dtb-y)) I think -R 4 is not necessary, either. We do not use the reserve map for OF_CONROL. This option was also introduced by commit bbb0b128c, but its git-description does not explain the reason for its necessity. I vote for dropping DTC_FLAGS += -R 4 -p 0x1000 line from ./arch/arm/dts/Makefile ./arch/powerpc/dts/Makefile ./arch/microblaze/dts/Makefile ./arch/sandbox/dts/Makefile ./arch/x86/dts/Makefile ./arch/arc/dts/Makefile Agreed, thanks for spotting this. I'll work up a patch. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] sunxi: axp: Move axp pmic register helpers to a separate file
On 26 April 2015 at 03:51, Hans de Goede hdego...@redhat.com wrote: Move the register helpers used to access the registers via p2wi resp. rsb bus on the otherwise identical axp221 and axp223 pmics to a separate file, so that they can be used by the upcoming standalone axp gpio driver too. Signed-off-by: Hans de Goede hdego...@redhat.com --- arch/arm/cpu/armv7/sunxi/Makefile | 2 + arch/arm/cpu/armv7/sunxi/pmic_bus.c| 93 arch/arm/include/asm/arch-sunxi/pmic_bus.h | 18 +++ drivers/power/axp221.c | 172 + include/axp221.h | 7 -- 5 files changed, 166 insertions(+), 126 deletions(-) create mode 100644 arch/arm/cpu/armv7/sunxi/pmic_bus.c create mode 100644 arch/arm/include/asm/arch-sunxi/pmic_bus.h Reviewed-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/6] sunxi: axp: Add support for i2c based PMICs to the pmic-bus helpers
On 26 April 2015 at 03:51, Hans de Goede hdego...@redhat.com wrote: Add support for the axp152 and axp209 PMICs to the pmic register access helpers. This is a preparation patch for moving the axp gpio code to a separate gpio driver. Signed-off-by: Hans de Goede hdego...@redhat.com --- arch/arm/cpu/armv7/sunxi/Makefile | 2 ++ arch/arm/cpu/armv7/sunxi/pmic_bus.c | 35 +++ 2 files changed, 29 insertions(+), 8 deletions(-) Reviewed-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/6] sunxi: axp: Change axp_gpio_foo prototypes to match gpio uclass ops
On 26 April 2015 at 03:51, Hans de Goede hdego...@redhat.com wrote: Change the axp_gpio_foo function prototypes to match the gpio uclass op prototypes, this is a preparation patch for moving the axp gpio code to a separate driver-model gpio driver. Note that the ugly calls with a NULL udev pointer in drivers/gpio/sunxi_gpio.c this adds are removed in a later patch. Signed-off-by: Hans de Goede hdego...@redhat.com --- drivers/gpio/sunxi_gpio.c | 8 drivers/power/axp209.c| 10 +- drivers/power/axp221.c| 10 +- include/axp209.h | 10 ++ include/axp221.h | 10 ++ 5 files changed, 26 insertions(+), 22 deletions(-) Reviewed-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/4] logos: Add Solidrun's logo
From: Fabio Estevam fabio.este...@freescale.com
Let Solidrun's logo appear on Cuboxi and Hummingboard by default.
Signed-off-by: Rabeeh Khoury rab...@solid-run.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
tools/logos/solidrun.bmp | Bin 0 - 5558 bytes
1 file changed, 0 insertions(+), 0 deletions(-)
create mode 100644 tools/logos/solidrun.bmp
diff --git a/tools/logos/solidrun.bmp b/tools/logos/solidrun.bmp
new file mode 100644
index
..93db1f8f1649b1c2d81751b4403a9534b68d4167
GIT binary patch
literal 5558
zcmeHK=~ool6~F8vXhV~NDFuaA0yaS!gMg@j*ai~n*o(35h9{-n#IS^(25ISgES%#
zR#_BKmasIPB#N6lXEmPMl7_OeQVP9`S#KXR+8mts@DF!Lq%oPJgB-R}8z3lR
zn50SPHcT@W;1W{CVTg3bx?5F(oCvg(pwuAR*xgC@JZO@bKrbdv`hb`E@`L=OxN
z%|m?rEXZW7Fh9QphYr1l+1YuRp4P*uQ=fxQw+QFXorPVyGLiQZrlyv_$tf6)AAbW!
zj{Fs6{)2YDfyBhOaR0sz9zULg6DLMd_D`r4$I5W!Ol(z+qNBpxw!@O{~9{Gv`|(y
z1pfY5F9)NuCAq!mi7WSkXP95ELW_Yik)yPAX8lh0vdVhX~-Mv-5H`*@4bEJ#j%
zgE*hU;ls=5=OQdDd=66SBJAB;5BdmTzpsb3FuMp#RaO-9pi!cRJ{(8=cMpq
zg`^|{jEsB+w{H)@($X?SMSTNgL4%MR0K`Mcr3mV`Gp0mvFCxUX*^GVz_Z8xv
zfZ^++ESpb3T9@WVjTYl$BqqyNb~^X@h{Z5i#YG2ofl{aaLoXVi^~uiI)JhG4EOdu
zczGp3OpFfo4RGK9gK}FKwH}+xVhcHxLn6PJO#PD9ejPWQSNJqj{Xb!{1kkA9w7dI
zgI@m(4jycQ+S)Pn^)%t1(2()=yMp{-S5DeGcTdEbP(kh5#RTySB`Oif;Qqnt6c!0
z@CN4o70Uk^^Y}-MsUCUGxaURGzlnSJ7UTC{IC}IIVt$5lU%V4V{j_9(^sr)~y5_
z@y6MoOXsxjC5P^K5`?Y(ioKj8aw)PIe+4wqK1rA|I6AsROUonla}f-N1@!wG
zJU#2Mwq{{`d=YaufieCEdzp?arFHisMT!{7dL_Up26wUU!w0Xpu2k(_K1Sfj0B{
zA~5iyL;e61UFwMcRU~AnwtgG+;^4-wPl!54aKn`mW-Y2@*{D^?yUOT(q-d?+=
z=-kbA_D=iV@CiaeBrKTOh6HaHZwQ+!p#dtx*0rOx7qQWh(FbGuD6*Am_RF4;}y
zxnC@5G1J^!6V~1X;1QSYokQBi1l8eBvrIz_h5;Ex?RX+{#c?$y9Mw-=SmN*X
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z(NfhR-Ygb9bMxSk$8qQFjH4T8tTkBD)u7UEOuSXrv2_gkb^NO7kks||8=DGc44
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zOvF!sqy5Fwj`qf~B~hW=qcqo1R9e-^_Omr{VI-yWAyxrj$9g7NN`1VAL6R+#
z$p(ajIYuZ79+n_cgcX)5lLwWfP`w!l8ZHENupsv^htjYC`1q$xR2xn`TW=TcU
zwM-OOVX1A$ZX8523FGLOF_URX_LBg=AK{w#7~jCLj_nDhkD*B`s-42n=%uUm|w
zD@9RHD!a1cNxePq9BBYsi5sp_bxuq_$$vs8o$gY`Z)x8tgBP%8`+gCc2U9d1y4Z
zMwh130+2aqQZ$g+qZAWk~JaW*KRAe63V*Ok3oV|Eg@7N4klX{mpUFU?CBzI*;JU
z^_O3;(pGHOTZx5kq%);GDq8s~R)iTop%IF%d=Cr=6HJ+5%N7TLrP~#z5Gvn^QRpZx
zU`|vX77oJkWR^HATCFW6LMy_SA8V!9HGQcx=IeJO!hdzdgdSF13KkvtpW{iH?@{
z=yaLWGBAv;f+7$k2+b+7mdxD3K95vkTVPCZyq@`shQwjv-U0F*5g`9eBST7`@q#8
zu6bTRQht!W4%vfuOsQeQA`l3+`giWBQ;|y!fQZsXi`Q#*J)4I4tQQa#IyrurOBx
zO?wG#{Q6jQHh8=3QvL`GIXox`WOO1{n9Wn5sF}jt++3pj0{`0v+{Tx7EjyUHCU?7
zJ2*I;-)BQ-8o!b}t@U3c+^)dQ+zBr`wfNxJ`}LVVoj;9$6`1Uy4s4dUI=q%Fp@Dx
zDvt0A#CAIq_dU=3LwqbgD{!!?)e^ig5K^tT)V;~1mQeWVlMq`=T(l%VUCp%@+NwwW
zz$E%XlPb|_?U~9uiUTCFW}ENz(^B8C7z7?xxSrASo84wEUV-40`L3{zd3jq
s__?{iI3NG1|KS@3ow2JR;4EPVZq27Vh`MLc2-RATHKG252K6!0YcJV@Et;
literal 0
HcmV?d1
--
1.9.1
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[U-Boot] [PATCH 3/4] mx6cuboxi: Allow HDMI and USB keyboard to be stdout/stdin
From: Fabio Estevam fabio.este...@freescale.com There are users of Cuboxi and Hummingboard that use these boards without connecting them to a USB/serial adapter. Allow such usage by allowing the HDMI port to act as stdout and USB keyboard as stdin. The serial console still also works as stdin/stdout. Signed-off-by: Rabeeh Khoury rab...@solid-run.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx6cuboxi.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index e7a18c6..38c358e 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -81,6 +81,7 @@ #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP +#define CONFIG_CONSOLE_MUX /* USB */ #define CONFIG_CMD_USB @@ -93,6 +94,9 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT2 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL +#define CONFIG_PREBOOT usb start #define CONFIG_SYS_NO_FLASH @@ -115,6 +119,9 @@ #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ + stdin=serial,usbkbd\0 \ + stdout=serial,vga\0 \ + stderr=serial,vga\0 \ script=boot.scr\0 \ image=zImage\0 \ fdtfile=undefined\0 \ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/20] Fix comment nits in board_f.c
On Tue, Apr 28, 2015 at 6:48 AM, Simon Glass s...@chromium.org wrote:
Try to make it a little clearer.
Signed-off-by: Simon Glass s...@chromium.org
---
common/board_f.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index 322e070..fbbad1b 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -73,7 +73,7 @@ DECLARE_GLOBAL_DATA_PTR;
#endif
/*
- * sjg: IMO this code should be
+ * TODO(s...@chromium.org): IMO this code should be
* refactored to a single function, something like:
*
* void led_set_state(enum led_colour_t colour, int on);
@@ -300,7 +300,7 @@ __weak ulong board_get_usable_ram_top(ulong total_size)
{
#ifdef CONFIG_SYS_SDRAM_BASE
/*
-* Detect whether we have so much RAM it goes past the end of our
+* Detect whether we have so much RAM that it goes past the end of our
* 32-bit address space. If so, clip the usable RAM so it doesn't.
*/
if (gd-ram_top CONFIG_SYS_SDRAM_BASE)
@@ -507,7 +507,7 @@ static int reserve_global_data(void)
static int reserve_fdt(void)
{
/*
-* If the device tree is sitting immediate above our image then we
+* If the device tree is sitting immediately above our image then we
* must relocate it. If it is embedded in the data section, then it
* will be relocated with other data.
*/
@@ -535,7 +535,7 @@ static int reserve_stacks(void)
gd-start_addr_sp = ~0xf;
/*
-* let the architecture specific code tailor gd-start_addr_sp and
+* let the architecture-specific code tailor gd-start_addr_sp and
* gd-irq_sp
*/
return arch_reserve_stacks();
@@ -556,7 +556,6 @@ static int setup_board_part1(void)
/*
* Save local variables to board info struct
*/
-
bd-bi_memstart = CONFIG_SYS_SDRAM_BASE;/* start of memory */
bd-bi_memsize = gd-ram_size; /* size in bytes */
--
Reviewed-by: Bin Meng bmeng...@gmail.com
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Re: [U-Boot] [PATCH 06/20] Add print_freq() to display frequencies nicely
Hi Simon,
On Tue, Apr 28, 2015 at 6:48 AM, Simon Glass s...@chromium.org wrote:
Add a function similar to print_size() that works for frequencies. It can
handle from Hz to GHz.
Signed-off-by: Simon Glass s...@chromium.org
---
include/display_options.h | 11 +++
lib/display_options.c | 41 +
2 files changed, 52 insertions(+)
diff --git a/include/display_options.h b/include/display_options.h
index c222ea2..10b4641 100644
--- a/include/display_options.h
+++ b/include/display_options.h
@@ -23,6 +23,17 @@
void print_size(uint64_t size, const char *suffix);
/**
+ * print_freq() - Print a frequency with a suffix
+ *
+ * print frequencies as x.xx GHz, xxx KHz, etc as needed; allow for
print-Print
+ * optional trailing string (like \n)
+ *
+ * @freq: Frequency to print in Hz
+ * @suffix String to print after the frequency
+ */
+void print_freq(uint64_t freq, const char *suffix);
+
+/**
* print_buffer() - Print data buffer in hex and ascii form
*
* Data reads are buffered so that each memory address is only read once.
diff --git a/lib/display_options.c b/lib/display_options.c
index 3f32bcd..cf6f50b 100644
--- a/lib/display_options.c
+++ b/lib/display_options.c
@@ -7,6 +7,7 @@
#include config.h
#include common.h
+#include div64.h
#include inttypes.h
#include version.h
#include linux/ctype.h
@@ -22,6 +23,46 @@ int display_options (void)
return 0;
}
+#ifndef CONFIG_SH
+/* SH gcc 4.6 toolchain produces undefined reference to '__umoddi3' here */
+void print_freq(uint64_t freq, const char *s)
+{
+ unsigned long m = 0, n;
+ uint32_t f;
+ static const char names[] = {'G', 'M', 'K'};
+ unsigned long d = 1e9;
+ char c = 0;
+ unsigned int i;
+
+ for (i = 0; i ARRAY_SIZE(names); i++, d /= 10) {
I think this is broken. Should be d /= 1000;
+ if (freq = d) {
+ c = names[i];
+ break;
+ }
+ }
+
+ if (!c) {
+ printf(% PRIu64 Hz%s, freq, s);
+ return;
+ }
+
+ f = do_div(freq, d);
+ n = freq;
+
+ /* If there's a remainder, show the first few digits */
+ if (f) {
+ m = f % 1000;
This is broken too. Should be m = f % d;
+ while (!(m % 10))
And I think you need add a variable to control how many first few
digits you want to show in this loop.
+ m /= 10;
+ }
+
+ printf(%lu, n);
+ if (m)
+ printf(.%ld, m);
+ printf( %cHz%s, c, s);
+}
+#endif
+
void print_size(uint64_t size, const char *s)
{
unsigned long m = 0, n;
--
Regards,
Bin
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[U-Boot] [PATCH 00/20] x86: Add CPU uclass and multi-core support for Minnowboard MAX
This series adds a new CPU uclass which is intended to be useful on any architecture. So far it has a very simple interface and a command to show CPU details. This series also introduces multi-core init for x86. It is implemented and enabled on Minnowboard MAX, a single/dual-core Atom board. A CPU driver is implemented for generic x86 and Baytrail. The Simple Firmware Interface is used to provide these details to the kernel, since ACPI is not yet available. With these changes Minnowboard MAX can boot into Linux with both cores enabled. This series is available at u-boot-x86 branch 'cpu-working'. Simon Glass (20): Fix comment nits in board_f.c dm: core: Add a function to bind a driver for a device tree node x86: Remove unwanted MMC debugging x86: Disable -Werror Move display_options functions to their own header Add print_freq() to display frequencies nicely x86: Add support for the Simple Firmware Interface (SFI) dm: Implement a CPU uclass Add a 'cpu' command to print CPU information x86: Add atomic operations x86: Add defines for fixed MTRRs x86: Add an mfence macro x86: Store the GDT pointer in global_data x86: Provide access to the IDT x86: Add multi-processor init x86: Add functions to set and clear bits on MSRs x86: Allow CPUs to be set up after relocation x86: Add a CPU driver for baytrail x86: Tidy up the LAPIC init code x86: Enable multi-core init for Minnowboard MAX arch/x86/Kconfig | 53 arch/x86/cpu/Makefile| 2 + arch/x86/cpu/baytrail/Makefile | 1 + arch/x86/cpu/baytrail/cpu.c | 206 + arch/x86/cpu/baytrail/valleyview.c | 1 - arch/x86/cpu/config.mk | 2 +- arch/x86/cpu/cpu.c | 38 +++ arch/x86/cpu/interrupts.c| 5 + arch/x86/cpu/ivybridge/model_206ax.c | 4 +- arch/x86/cpu/lapic.c | 20 +- arch/x86/cpu/mp_init.c | 507 +++ arch/x86/cpu/sipi.S | 217 + arch/x86/dts/minnowmax.dts | 20 ++ arch/x86/include/asm/arch-baytrail/msr.h | 30 ++ arch/x86/include/asm/atomic.h| 115 +++ arch/x86/include/asm/cpu.h | 19 ++ arch/x86/include/asm/global_data.h | 1 + arch/x86/include/asm/interrupt.h | 2 + arch/x86/include/asm/lapic.h | 7 - arch/x86/include/asm/mp.h| 94 ++ arch/x86/include/asm/msr.h | 19 ++ arch/x86/include/asm/mtrr.h | 14 + arch/x86/include/asm/sipi.h | 79 + arch/x86/include/asm/smm.h | 14 + arch/x86/include/asm/u-boot-x86.h| 2 + arch/x86/lib/Makefile| 1 + arch/x86/lib/sfi.c | 171 +++ arch/x86/lib/zimage.c| 7 + common/Kconfig | 8 + common/Makefile | 1 + common/board_f.c | 9 +- common/board_r.c | 2 +- common/cmd_cpu.c | 113 +++ configs/minnowmax_defconfig | 4 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/core/lists.c | 9 +- drivers/cpu/Kconfig | 8 + drivers/cpu/Makefile | 7 + drivers/cpu/cpu-uclass.c | 61 include/common.h | 16 +- include/cpu.h| 84 + include/display_options.h| 59 include/dm/lists.h | 16 + include/dm/uclass-id.h | 1 + include/linux/sfi.h | 139 + lib/display_options.c| 54 +++- 47 files changed, 2191 insertions(+), 54 deletions(-) create mode 100644 arch/x86/cpu/baytrail/cpu.c create mode 100644 arch/x86/cpu/mp_init.c create mode 100644 arch/x86/cpu/sipi.S create mode 100644 arch/x86/include/asm/arch-baytrail/msr.h create mode 100644 arch/x86/include/asm/atomic.h create mode 100644 arch/x86/include/asm/mp.h create mode 100644 arch/x86/include/asm/sipi.h create mode 100644 arch/x86/include/asm/smm.h create mode 100644 arch/x86/lib/sfi.c create mode 100644 common/cmd_cpu.c create mode 100644 drivers/cpu/Kconfig create mode 100644 drivers/cpu/Makefile create mode 100644 drivers/cpu/cpu-uclass.c create mode 100644 include/cpu.h create mode 100644 include/display_options.h create mode 100644 include/linux/sfi.h -- 2.2.0.rc0.207.ga3a616c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/5] x86: Kconfig: Divide the target selection to vendor/model
Let arch/x86/Kconfig prompt board vendor first, then select the board model under that vendor. This way arch/x86/Kconfig only needs concern board vendor and leave the supported target list to board/vendor/Kconfig. Signed-off-by: Bin Meng bmeng...@gmail.com --- arch/x86/Kconfig| 92 ++--- board/coreboot/Kconfig | 26 +++ board/google/Kconfig| 43 + board/intel/Kconfig | 51 configs/chromebook_link_defconfig | 1 + configs/chromebox_panther_defconfig | 1 + configs/coreboot-x86_defconfig | 1 + configs/crownbay_defconfig | 1 + configs/galileo_defconfig | 1 + configs/minnowmax_defconfig | 1 + 10 files changed, 139 insertions(+), 79 deletions(-) create mode 100644 board/coreboot/Kconfig create mode 100644 board/google/Kconfig create mode 100644 board/intel/Kconfig diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index aaceaef..c3cc144 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -11,79 +11,25 @@ config SYS_VSNPRINTF default y choice - prompt Target select + prompt Mainboard vendor + default VENDOR_COREBOOT -config TARGET_COREBOOT - bool Support coreboot - help - This target is used for running U-Boot on top of Coreboot. In - this case Coreboot does the early inititalisation, and U-Boot - takes over once the RAM, video and CPU are fully running. - U-Boot is loaded as a fallback payload from Coreboot, in - Coreboot terminology. This method was used for the Chromebook - Pixel when launched. - -config TARGET_CHROMEBOOK_LINK - bool Support Chromebook link - help - This is the Chromebook Pixel released in 2013. It uses an Intel - i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of - SDRAM. It has a Panther Point platform controller hub, PCIe - WiFi and Bluetooth. It also includes a 720p webcam, USB SD - reader, microphone and speakers, display port and 32GB SATA - solid state drive. There is a Chrome OS EC connected on LPC, - and it provides a 2560x1700 high resolution touch-enabled LCD - display. - -config TARGET_CHROMEBOX_PANTHER - bool Support Chromebox panther (not available) - select n - help - Note: At present this must be used with Coreboot. See README.x86 - for instructions. - - This is the Asus Chromebox CN60 released in 2014. It uses an Intel - Haswell Celeron 2955U Dual Core CPU with 2GB of SDRAM. It has a - Lynx Point platform controller hub, PCIe WiFi and Bluetooth. It also - includes a USB SD reader, four USB3 ports, display port and HDMI - video output and a 16GB SATA solid state drive. There is no Chrome - OS EC on this model. - -config TARGET_CROWNBAY - bool Support Intel Crown Bay CRB - help - This is the Intel Crown Bay Customer Reference Board. It contains - the Intel Atom Processor E6xx populated on the COM Express module - with 1GB DDR2 soldered down memory and a carrier board with the - Intel Platform Controller Hub EG20T, other system components and - peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS. - -config TARGET_MINNOWMAX - bool Support Intel Minnowboard MAX - help - This is the Intel Minnowboard MAX. It contains an Atom E3800 - processor in a small form factor with Ethernet, micro-SD, USB 2, - USB 3, SATA, serial console, some GPIOs and HDMI 1.3 video out. - It requires some binary blobs - see README.x86 for details. +config VENDOR_COREBOOT + bool coreboot - Note that PCIE_ECAM_BASE is set up by the FSP so the value used - by U-Boot matches that value. +config VENDOR_GOOGLE + bool Google -config TARGET_GALILEO - bool Support Intel Galileo - help - This is the Intel Galileo board, which is the first in a family of - Arduino-certified development and prototyping boards based on Intel - architecture. It includes an Intel Quark SoC X1000 processor, a 32-bit - single-core, single-thread, Intel Pentium processor instrunction set - architecture (ISA) compatible, operating at speeds up to 400Mhz, - along with 256MB DDR3 memory. It supports a wide range of industry - standard I/O interfaces, including a full-sized mini-PCIe slot, - one 100Mb Ethernet port, a microSD card slot, a USB host port and - a USB client port. +config VENDOR_INTEL + bool Intel endchoice +# board-specific options below +source board/coreboot/Kconfig +source board/google/Kconfig +source board/intel/Kconfig + config DM_SPI default y @@ -473,18 +419,6 @@ config IRQ_SLOT_COUNT should be enough for most boards. If this
[U-Boot] [PATCH 2/5] x86: Kconfig: Move platform options forward
Move platform-specific options under in arch/x86/Kconfig forward right after the board-specific options but before any architecture-specific options. When it comes to the same Kconfig option, board-specific one takes take the highest precedence, then platform-specific one, and finally architecture-specific one. Signed-off-by: Bin Meng bmeng...@gmail.com --- arch/x86/Kconfig | 19 +-- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index c3cc144..43062cd 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -30,6 +30,15 @@ source board/coreboot/Kconfig source board/google/Kconfig source board/intel/Kconfig +# platform-specific options below +source arch/x86/cpu/baytrail/Kconfig +source arch/x86/cpu/coreboot/Kconfig +source arch/x86/cpu/ivybridge/Kconfig +source arch/x86/cpu/quark/Kconfig +source arch/x86/cpu/queensbay/Kconfig + +# architecture-specific options below + config DM_SPI default y @@ -358,16 +367,6 @@ config FSP_TEMP_RAM_ADDR Stack top address which is used in FspInit after DRAM is ready and CAR is disabled. -source arch/x86/cpu/baytrail/Kconfig - -source arch/x86/cpu/coreboot/Kconfig - -source arch/x86/cpu/ivybridge/Kconfig - -source arch/x86/cpu/quark/Kconfig - -source arch/x86/cpu/queensbay/Kconfig - config TSC_CALIBRATION_BYPASS bool Bypass Time-Stamp Counter (TSC) calibration default n -- 1.8.2.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/5] x86: Kconfig: Move DM_SPI DM_SPI_FLASH to arch/Kconfig
Since all x86 boards have been converted to use DM_SPI and DM_SPI_FLASH, move them to arch/Kconfig x86 section. Signed-off-by: Bin Meng bmeng...@gmail.com --- arch/Kconfig | 2 ++ arch/x86/Kconfig | 6 -- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 1102346..200588a 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -93,6 +93,8 @@ config X86 select DM select DM_SERIAL select DM_GPIO + select DM_SPI + select DM_SPI_FLASH endchoice diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 2387fb7..f3a600e 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -39,12 +39,6 @@ source arch/x86/cpu/queensbay/Kconfig # architecture-specific options below -config DM_SPI - default y - -config DM_SPI_FLASH - default y - config SYS_MALLOC_F_LEN default 0x800 -- 1.8.2.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/5] x86: Kconfig: Remove deprecated CONFIG_SYS_EXTRA_OPTIONS
Currently all x86 boards still use CONFIG_SYS_EXTRA_OPTIONS to define the text base address. Since it is deprecated, just remove it and use CONFIG_SYS_TEXT_BASE directly. Signed-off-by: Bin Meng bmeng...@gmail.com --- Kconfig| 2 +- board/coreboot/coreboot/Kconfig| 3 +++ board/google/chromebook_link/Kconfig | 3 +++ board/google/chromebox_panther/Kconfig | 3 +++ board/intel/crownbay/Kconfig | 3 +++ board/intel/galileo/Kconfig| 3 +++ board/intel/minnowmax/Kconfig | 3 +++ configs/chromebook_link_defconfig | 1 - configs/chromebox_panther_defconfig| 1 - configs/coreboot-x86_defconfig | 1 - configs/crownbay_defconfig | 1 - configs/galileo_defconfig | 1 - configs/minnowmax_defconfig| 1 - 13 files changed, 19 insertions(+), 7 deletions(-) diff --git a/Kconfig b/Kconfig index 41d4784..85faff7 100644 --- a/Kconfig +++ b/Kconfig @@ -178,7 +178,7 @@ config SYS_EXTRA_OPTIONS new boards should not use this option. config SYS_TEXT_BASE - depends on SPARC || ARC + depends on SPARC || ARC || X86 hex Text Base help TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture diff --git a/board/coreboot/coreboot/Kconfig b/board/coreboot/coreboot/Kconfig index 981de1f..6a04158 100644 --- a/board/coreboot/coreboot/Kconfig +++ b/board/coreboot/coreboot/Kconfig @@ -9,6 +9,9 @@ config SYS_VENDOR config SYS_SOC default coreboot +config SYS_TEXT_BASE + default 0x0111 + comment coreboot-specific options config SYS_CONFIG_NAME diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig index ea45472..9c8d020 100644 --- a/board/google/chromebook_link/Kconfig +++ b/board/google/chromebook_link/Kconfig @@ -12,6 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default chromebook_link +config SYS_TEXT_BASE + default 0xfff0 + config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR diff --git a/board/google/chromebox_panther/Kconfig b/board/google/chromebox_panther/Kconfig index 11df55a..e3604eb 100644 --- a/board/google/chromebox_panther/Kconfig +++ b/board/google/chromebox_panther/Kconfig @@ -12,6 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default chromebox_panther +config SYS_TEXT_BASE + default 0xfff0 + # Panther actually uses haswell, not ivybridge, so this is just a placeholder config BOARD_SPECIFIC_OPTIONS # dummy def_bool y diff --git a/board/intel/crownbay/Kconfig b/board/intel/crownbay/Kconfig index 762663a..b30701a 100644 --- a/board/intel/crownbay/Kconfig +++ b/board/intel/crownbay/Kconfig @@ -12,6 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default crownbay +config SYS_TEXT_BASE + default 0xfff0 + config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR diff --git a/board/intel/galileo/Kconfig b/board/intel/galileo/Kconfig index 85afbbc..6515bac 100644 --- a/board/intel/galileo/Kconfig +++ b/board/intel/galileo/Kconfig @@ -12,6 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default galileo +config SYS_TEXT_BASE + default 0xfff1 + config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR diff --git a/board/intel/minnowmax/Kconfig b/board/intel/minnowmax/Kconfig index 43c50a5..f2a0b71 100644 --- a/board/intel/minnowmax/Kconfig +++ b/board/intel/minnowmax/Kconfig @@ -12,6 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default minnowmax +config SYS_TEXT_BASE + default 0xfff0 + config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 9cfc65b..81222d2 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -1,4 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS=SYS_TEXT_BASE=0xfff0 CONFIG_X86=y CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_LINK=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index c4db232..91189c9 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -1,4 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS=SYS_TEXT_BASE=0xfff0 CONFIG_X86=y CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOX_PANTHER=y diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig index eb192ae..799853f 100644 --- a/configs/coreboot-x86_defconfig +++ b/configs/coreboot-x86_defconfig @@ -1,4 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS=SYS_TEXT_BASE=0x0111 CONFIG_X86=y CONFIG_VENDOR_COREBOOT=y CONFIG_TARGET_COREBOOT=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index de84650..61d1fcc 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -1,4 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS=SYS_TEXT_BASE=0xfff0 CONFIG_X86=y
[U-Boot] [PATCH 3/5] x86: Kconfig: MARK_GRAPHICS_MEM_WRCOMB cosmetics
Remove the ending period of the MARK_GRAPHICS_MEM_WRCOMB option. Also fix the indention of its help text. Signed-off-by: Bin Meng bmeng...@gmail.com --- arch/x86/Kconfig | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 43062cd..2387fb7 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -181,12 +181,12 @@ config X86_RAMTEST detecting obvious failures. config MARK_GRAPHICS_MEM_WRCOMB - bool Mark graphics memory as write-combining. + bool Mark graphics memory as write-combining default n help -The graphics performance may increase if the graphics -memory is set as write-combining cache type. This option -enables marking the graphics memory as write-combining. + The graphics performance may increase if the graphics + memory is set as write-combining cache type. This option + enables marking the graphics memory as write-combining. menu Display -- 1.8.2.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] builderthread.py: Keep 'SPL'
On i.MX platforms the SPL binary is called SPL so make sure we keep that. Cc: Simon Glass s...@chromium.org Signed-off-by: Tom Rini tr...@konsulko.com --- tools/buildman/builderthread.py |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py index a65084b..e15d13c 100644 --- a/tools/buildman/builderthread.py +++ b/tools/buildman/builderthread.py @@ -342,7 +342,7 @@ class BuilderThread(threading.Thread): # Now write the actual build output if keep_outputs: self.CopyFiles(result.out_dir, build_dir, '', ['u-boot*', '*.bin', -'*.map', '*.img', 'MLO', 'include/autoconf.mk', +'*.map', '*.img', 'MLO', 'SPL', 'include/autoconf.mk', 'spl/u-boot-spl*']) def CopyFiles(self, out_dir, build_dir, dirname, patterns): -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] builderthread.py: Keep 'SPL'
On 27 April 2015 at 09:34, Tom Rini tr...@konsulko.com wrote: On i.MX platforms the SPL binary is called SPL so make sure we keep that. Cc: Simon Glass s...@chromium.org Signed-off-by: Tom Rini tr...@konsulko.com --- tools/buildman/builderthread.py |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] sf: Fix to compute proper sector_size
Upto now flash sector_size is assigned from params which isn't
necessarily a sector size from vendor, so based on the SECT_*
flags from flash_params the erase_size will compute and it will
become the sector_size finally.
Bug report (from Bin Meng):
= sf probe
SF: Detected SST25VF016B with page size 256 Bytes, erase size 4 KiB,
total 2 MiB, mapped at ffe0
= sf erase 0 +100
SF: 65536 bytes @ 0x0 Erased: OK
Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Reported-by: Bin Meng bmeng...@gmail.com
Tested-by: Bin Meng bmeng...@gmail.com
---
Changes for v3:
- Updated comments
Changes for v2:
- Minimize the code logic
drivers/mtd/spi/sf_internal.h | 3 ++-
drivers/mtd/spi/sf_probe.c| 3 +++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index bd834dc..4158e13 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -119,7 +119,8 @@ int sst_write_bp(struct spi_flash *flash, u32 offset,
size_t len,
* @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
* @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
* @ext_jedec: Device ext_jedec ID
- * @sector_size: Sector size of this device
+ * @sector_size: Isn't necessarily a sector size from vendor,
+ * the size listed here is what works with CMD_ERASE_64K
* @nr_sectors:No.of sectors on this device
* @e_rd_cmd: Enum list for read commands
* @flags: Important param, for flash specific behaviour
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index de8d0b7..3f6b882 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -184,6 +184,9 @@ static int spi_flash_validate_params(struct spi_slave *spi,
u8 *idcode,
flash-erase_size = flash-sector_size;
}
+ /* Now erase size becomes valid sector size */
+ flash-sector_size = flash-erase_size;
+
/* Look for the fastest read cmd */
cmd = fls(params-e_rd_cmd flash-spi-op_mode_rx);
if (cmd) {
--
1.9.1
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Re: [U-Boot] installing u-boot on a virtual x86 machine
Hi Francesco, On 27 April 2015 at 00:56, Francesco Lucconi lucc...@gmail.com wrote: 2015-04-25 1:04 GMT+02:00 Bin Meng bmeng...@gmail.com: Hi Francesco, On Fri, Apr 24, 2015 at 3:20 PM, Francesco Lucconi lucc...@gmail.com wrote: I'm Francesco Lucconi from Italy, and I'm involved into a x86 project where my issue is to compile a u-boot (I'm currently using uboot-2015.01) and to install it into a VID (virtual image disk) of virtualbox. I've already tuned the MBR, registering two FAT16 partitions, one for u-boot and the other one for future kernel uImage and firmware development. In this moment I figured out that I've installed correctly the MBR cause I can see on the display strings I've applied on the MBR source code but it seems that u-boot.bin code doesn't run correctly, the system hangs out Could you give me any tips I didn't notice before? Could you elaborate more on what BIOS is being used, and what MBR codes is that? Is it grub? Regards, Bin @Simon Glass: About u-boot I'm using coreboot_x86 config, and with u-boot.srec I noticed that I received several prints of startup ( like this .. ) but later the virtual machine hangs up. Did you follow the instruction sin README.x86? Can you provide console output? @Bin Meng: I'm using BIOS embedded of Virtualbox platform and I've customized the 512 bytes MBR data with several debug prints and with the partitions table based on the features of my FAT16 partitions. Regards, Francesco Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] spi: omap3: Fix timeout handling
On 24 April 2015 at 17:04, D. Dueck davidcdu...@googlemail.com wrote:
As requested:
Tested-by: David Dueck davidcdu...@googlemail.com
Am Freitag, 24. April 2015 schrieb Jagan Teki :
On 7 April 2015 at 05:55, Tom Rini tr...@konsulko.com wrote:
On Wed, Apr 01, 2015 at 04:21:50PM +0100, Andy Pont wrote:
Hi David,
snipped for brevity
for (i = 0; i len; i++) {
/* wait till TX register is empty (TXS == 1) */
+ start = get_timer(0);
while (!(readl(ds-regs-channel[ds-slave.cs].chstat)
OMAP3_MCSPI_CHSTAT_TXS)) {
- if (--timeout = 0) {
+ if (get_timer(start) SPI_WAIT_TIMEOUT) {
printf(SPI TXS timed out,
status=0x%08x\n,
readl(ds-regs-channel[ds-
slave.cs].chstat));
return -1;
I have a couple of questions...
Firstly, when in SPL is there access to the get_timer() function?
We call timer_init() from board_init_r() in SPL, prior to diving down
into loading (or checking for Falcon vs Regular) so this is safe.
Secondly, when using Falcon mode to load Linux directly from SPI
(Falcon
mode) then we want to maximise the throughput and save every CPU cycle
we
possibly can. Adding yet another function call into the for loop and
hence
calling it a couple of million times seems, on the face of it, like it
is
going to slow things down.
I'd like to see measurements to prove me wrong but this both seems like
a bad idea (optimizing by being incorrect, this gives us a correct
timeout check like other drivers do) and really unlikely I would think
to be noticable. Since we'll be doing the same code-paths in both
regular and SPL, trying to time things (by loading a big file) would be
easy enough I think. Thanks!
Ping
Applied to u-boot-spi/master
thanks!
--
Jagan.
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Re: [U-Boot] [PATCH 3/4][v2]include:configs:ls1021atwr: Enable USB IP support
On Monday, April 27, 2015 at 07:44:15 AM, Ramneek Mehresh wrote:
[...]
diff --git a/include/linux/usb/xhci-fsl.h
b/include/linux/usb/xhci-fsl.h index 8eaab2c..329abf7 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -46,6 +46,11 @@
#define USBOTGSS_IRQ_SET_1_OEVT_EN BIT(16)
#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN BIT(17)
+#ifdef CONFIG_LS102XA
+#define CONFIG_SYS_FSL_XHCI_USB1_ADDR
+CONFIG_SYS_LS102XA_XHCI_USB1_ADDR #define
+CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
Do you need to define this _bogus_ address at all? If so, then the driver
which depends on this is broken. Why can't you just define a list of
addresses instead ? You would be able to use ARRAY_SIZE() in the driver
to determine how many controllers there are then. This is how it would
look like:
#define CONFIG_FOO_BAR_ADDRS { USB1_ADDR, USB2_ADDR, ...,
USBn_ADDR }
In the driver, there'd be:
type addrs[] = CONFIG_FOO_BAR_ADDRS;
I agree to use an array for defining list of controller addresses. However,
the no. of controller(s) to be initialized on a particular platform is
determined by CONFIG_USB_MAX_CONTROLLER_COUNT used in usb_init() function.
This macro is defined in each platform file, and defines the index
argument passed on to xhci_hcd_init(). There may be some platform on which
we can have more than one controller in soc, but only one is used (exposed
via external connector). Hence, CONFIG_USB_MAX_CONTROLLER_COUNT is
defined by platform header file.
Ah right, sorry. Keep the CONFIG_USB_MAX_CONTROLLER_COUNT macro then.
Hence, I can assign controller address on the basis of address:
struct fsl_xhci *ctx = fsl_xhci;
ctx-hcd = addrs[index];
Yeah
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] socfpga: implement arria V socdk SPI flash config in dts
On Monday, April 27, 2015 at 08:09:41 AM, Pavel Machek wrote: On Mon 2015-04-27 03:08:27, Marek Vasut wrote: On Saturday, April 25, 2015 at 09:36:16 PM, Pavel Machek wrote: Arria V SocDK has same QSPI and SPI flash configuration as Socrates. Add support for it. Signed-off-by: Pavel Machek pa...@denx.de diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts index 4e529a1..1b86897 100644 --- a/arch/arm/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/dts/socfpga_arria5_socdk.dts I was just curious about this, but why are your patches missing diffstat ? diffstat was never required part of a patch. Would be nice to have though. btw. I presume that there is no opposition to this patch, in my opinion it's perfectly OK. So this means thank you, applied? No, that's applied, thanks ;-) Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] stm32f4: fix serial output
2015-04-24 21:27 GMT+02:00 kunhuahuang huangkun...@gmail.com:
This patch fix the serial output.
The source is from Kamil Lulko's stm32f429-discovery board support
Signed-off-by: kunhuahuang huangkun...@gmail.com
---
drivers/serial/serial_stm32.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 3c80096..693a7fa 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -81,6 +81,10 @@ static int stm32_serial_getc(void)
static void stm32_serial_putc(const char c)
{
struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
+
+ if(c == '\n')
+ stm32_serial_putc('\r');
+
while ((readl(usart-sr) USART_SR_FLAG_TXE) == 0)
;
writel(c, usart-dr);
--
1.9.1
Please fix checkpatch.pl error:
ERROR: space required before the open parenthesis '('
#26: FILE: drivers/serial/serial_stm32.c:85:
+ if(c == '\n')
total: 1 errors, 0 warnings, 0 checks, 10 lines checked
Other than that looks good!
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Re: [U-Boot] [PATCH v2] gpio: stm32_gpio: Use clrsetbits_le32() at appropriate places
On 26/04/15 04:32, Axel Lin wrote: Signed-off-by: Axel Lin axel@ingics.com Reviewed-by:Kamil Lulko rev13 at wp.pl http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 4/4 v3] mtd: sf: Add CONFIG_SPI_N25Q256A_RESET for software-reset
On Saturday, April 25, 2015 at 09:48:31 PM, Pavel Machek wrote: On Thu 2014-10-02 00:34:48, Jagan Teki wrote: On 2 October 2014 00:27, Stefan Roese s...@denx.de wrote: On 01.10.2014 20:25, Marek Vasut wrote: On Wednesday, October 01, 2014 at 05:13:11 PM, Stefan Roese wrote: This is needed for the SoCFPGA booting from SPI NOR flash e.g. (N25Q256A). With these changes, the SoCrates can boot and re-boot (reset) from SPI NOR flash without any problems. Seems like your SPI NOR reset logic is buggy. Does any of [1] apply to your board please? [1] http://www.rocketboards.org/foswiki/Documentation/SocBoardQspiBoot Yes. This seems to be that case. But I can't change it right now. So this solution with the soft-reset is better than nothing. If this is some think that must require, any possibility to this resetting prior to u-boot? like preloader or in first stage boot loader or something. u-boot-spl 2013.01/altera set it up like this for us; and mainline u-boot-spl does not work on socfpga... that's why we need to do it here, and that's why you don't see it on your board. As discussed in person, please rebase and repost. You're right that it's a good idea to add an option to restart the SPI NOR in software if needed be. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/7] Add support for Colibri Vybrid Modules
On Thu, Apr 23, 2015 at 11:13:47PM +0200, Marek Vasut wrote:
On Thursday, April 23, 2015 at 03:13:51 PM, Tom Rini wrote:
On Thu, Apr 23, 2015 at 06:08:43PM +0530, maitysancha...@gmail.com wrote:
Hello,
On 15-04-15 16:24:21, Sanchayan Maity wrote:
Hello,
This is the third version of the patchset which adds support for the
Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested
using the serial loader over UART. Compile tested for
vf610twr_defconfig and vf610twr_nand_defconfig as well.
First patch in the series refactors the DDR related code for use by
both the tower board and colibri modules. It also introduces a DDR3
based JEDEC timing structure.
Second third and fourth patch in this series are improvement patches
related to RTC, SoC/CPU detection and caches.
Fifth patch introduces USB support for Vybrid modules. Much of the code
is similar to the ehci-mx6 driver. Both host and client modes are
working and DFU has also been tested with client. Currently, we
restrict the ports to be in one of host and client mode.
Sixth patch adds the actual support for the Colibri modules.
Comments and feedback are most welcome. Thanks for the feedback till
now.
The patchset is based and tested on the latest master branch as of
this writing.
Discussion on the version 2 of the patchset can be found at the below
link:
https://www.mail-archive.com/u-boot@lists.denx.de/msg168727.html
Discussion on the version 1 of the patchset can be found at the below
link:
https://www.mail-archive.com/u-boot@lists.denx.de/msg168136.html
Changes since v2:
- Rework the USB driver to use register + offset method in light of
discussion which Fabio Estevam pointed out instead of the regular
struct{} method which v2 used. The discussion is at the below link:
https://www.marc.info/?l=u-bootm=142609602127309w=2
- Reorder the patchset, putting the USB support in the end and add an
additional patch for adding USB support to Colibri modules. By chance
if more discussions happen on the USB support, this allows picking up
of atleast the first patches on which no issues have been reported so
far.
- The register definitions have been moved under arch/arm/include/asm/
imx-common in the regs-usbphy.h file. This was agreed on after
discussion with Marek and some input from Peter Chen. Since it is not
clear if SoC's other than Freescale's use the Sigmatel Phy's which seem
to be use in iMX/VF/MXS, put the USH PHY register definitions in
imx-common rather than include/usb in a chipidea specific file.
- Remove setting of a PLL divisor select which was added for USB but is
actually not required considering default value. It also seems to break
USB after my latest rebase. The file in question concerning the change
is colibri_vf.c. PLL divisor selects the PLL Multiplication factor
which by default is 0, setting Fout = Fref * 20 giving 480MHz. The
earlier patch set this to 1 giving Fout = Fref * 22 where Fref =
24MHz.
- Rebased on the latest master branch.
Changes since v1:
- Rework the USB driver to use register offsets using the regular
struct {} method
- Some cleanups and fixes in the sixth patch for the colibri_vf.h file
which takes care of environment variables in uboot
- Purge some useless defines in the fifth and sixth patch which were
related to USB.
Ping!?
Anything preventing this patch from getting applied?
I'll pick this up soon, thanks!
This should go through u-boot-imx though ;-)
For the record, since they aren't quite imx platforms I didn't want to
throw another SoC on someone elses plate. Stefano, do you want to
handle all the Vybrid stuf in the future? Thanks!
--
Tom
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[U-Boot] [PATCH v2] stm32f4: add serial print port
Add the stm32F4 board's serial ports support.
User can use it easily.
The user only need to edit the number of the usart.
The patch also fix the serial print out.
Last, this version of patch fix the first patch checkpatch.pl error.
Thanks to Kamil Lulko.
Signed-off-by: kunhuahuang huangkun...@gmail.com
---
arch/arm/include/asm/arch-stm32f4/gpio.h | 32 +
board/st/stm32f429-discovery/stm32f429-discovery.c | 16 ++---
drivers/serial/serial_stm32.c | 75 ++
include/configs/stm32f429-discovery.h | 10 ++-
4 files changed, 111 insertions(+), 22 deletions(-)
diff --git a/arch/arm/include/asm/arch-stm32f4/gpio.h
b/arch/arm/include/asm/arch-stm32f4/gpio.h
index 7cd866e..dd33b96 100644
--- a/arch/arm/include/asm/arch-stm32f4/gpio.h
+++ b/arch/arm/include/asm/arch-stm32f4/gpio.h
@@ -11,6 +11,38 @@
#ifndef _STM32_GPIO_H_
#define _STM32_GPIO_H_
+#if (CONFIG_STM32_USART == 1)
+#define STM32_GPIO_PORT_X STM32_GPIO_PORT_A
+#define STM32_GPIO_PIN_TX STM32_GPIO_PIN_9
+#define STM32_GPIO_PIN_RX STM32_GPIO_PIN_10
+#define STM32_GPIO_USARTSTM32_GPIO_AF7
+
+#elif (CONFIG_STM32_USART == 2)
+#define STM32_GPIO_PORT_X STM32_GPIO_PORT_D
+#define STM32_GPIO_PIN_TX STM32_GPIO_PIN_5
+#define STM32_GPIO_PIN_RX STM32_GPIO_PIN_6
+#define STM32_GPIO_USARTSTM32_GPIO_AF7
+
+#elif (CONFIG_STM32_USART == 3)
+#define STM32_GPIO_PORT_X STM32_GPIO_PORT_C
+#define STM32_GPIO_PIN_TX STM32_GPIO_PIN_10
+#define STM32_GPIO_PIN_RX STM32_GPIO_PIN_11
+#define STM32_GPIO_USARTSTM32_GPIO_AF7
+
+#elif (CONFIG_STM32_USART == 6)
+#define STM32_GPIO_PORT_X STM32_GPIO_PORT_G
+#define STM32_GPIO_PIN_TX STM32_GPIO_PIN_14
+#define STM32_GPIO_PIN_RX STM32_GPIO_PIN_9
+#define STM32_GPIO_USARTSTM32_GPIO_AF8
+
+#else
+#define STM32_GPIO_PORT_X STM32_GPIO_PORT_A
+#define STM32_GPIO_PIN_TX STM32_GPIO_PIN_9
+#define STM32_GPIO_PIN_RX STM32_GPIO_PIN_10
+#define STM32_GPIO_USARTSTM32_GPIO_AF7
+
+#endif
+
enum stm32_gpio_port {
STM32_GPIO_PORT_A = 0,
STM32_GPIO_PORT_B,
diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c
b/board/st/stm32f429-discovery/stm32f429-discovery.c
index 2c4830f..2dd5d93 100644
--- a/board/st/stm32f429-discovery/stm32f429-discovery.c
+++ b/board/st/stm32f429-discovery/stm32f429-discovery.c
@@ -33,21 +33,21 @@ const struct stm32_gpio_ctl gpio_ctl_usart = {
.otype = STM32_GPIO_OTYPE_PP,
.speed = STM32_GPIO_SPEED_50M,
.pupd = STM32_GPIO_PUPD_UP,
- .af = STM32_GPIO_AF7
+ .af = STM32_GPIO_USART
};
-static const struct stm32_gpio_dsc usart1_gpio[] = {
- {STM32_GPIO_PORT_A, STM32_GPIO_PIN_9}, /* TX */
- {STM32_GPIO_PORT_A, STM32_GPIO_PIN_10}, /* RX */
+static const struct stm32_gpio_dsc usart_gpio[] = {
+ {STM32_GPIO_PORT_X, STM32_GPIO_PIN_TX}, /* TX */
+ {STM32_GPIO_PORT_X, STM32_GPIO_PIN_RX}, /* RX */
};
-int uart1_setup_gpio(void)
+int uart_setup_gpio(void)
{
int i;
int rv = 0;
- for (i = 0; i ARRAY_SIZE(usart1_gpio); i++) {
- rv = stm32_gpio_config(usart1_gpio[i], gpio_ctl_usart);
+ for (i = 0; i ARRAY_SIZE(usart_gpio); i++) {
+ rv = stm32_gpio_config(usart_gpio[i], gpio_ctl_usart);
if (rv)
goto out;
}
@@ -272,7 +272,7 @@ int board_early_init_f(void)
{
int res;
- res = uart1_setup_gpio();
+ res = uart_setup_gpio();
if (res)
return res;
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 3c80096..8b2830b 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -10,11 +10,34 @@
#include serial.h
#include asm/arch/stm32.h
+/*
+ * Set up the usart port
+ */
+#if (CONFIG_STM32_USART = 1) (CONFIG_STM32_USART = 6)
+#define USART_PORT (CONFIG_STM32_USART - 1)
+#else
+#define USART_PORT 0
+#endif
+/*
+ * Set up the usart base address
+ *
+ * --STM32_USARTD_BASE means default setting
+ */
#define STM32_USART1_BASE (STM32_APB2PERIPH_BASE + 0x1000)
-#define RCC_APB2ENR_USART1EN (1 4)
-
-#define USART_BASE STM32_USART1_BASE
-#define RCC_USART_ENABLE RCC_APB2ENR_USART1EN
+#define STM32_USART2_BASE (STM32_APB1PERIPH_BASE + 0x4400)
+#define STM32_USART3_BASE (STM32_APB1PERIPH_BASE + 0x4800)
+#define STM32_USART6_BASE (STM32_APB2PERIPH_BASE + 0x1400)
+#define STM32_USARTD_BASE STM32_USART1_BASE
+/*
+ * RCC USART specific definitions
+ *
+ * --RCC_ENR_USARTDEN means default setting
+ */
+#define RCC_ENR_USART1EN (1 4)
+#define RCC_ENR_USART2EN (1 17)
+#define RCC_ENR_USART3EN (1 18)
+#define RCC_ENR_USART6EN (1 5)
+#define RCC_ENR_USARTDEN RCC_ENR_USART1EN
struct stm32_serial {
u32 sr;
@@ -39,6 +62,24 @@ struct stm32_serial {
DECLARE_GLOBAL_DATA_PTR;
+static const unsigned long usart_base[] = {
+ STM32_USART1_BASE,
+
Re: [U-Boot] [PATCH] bugfix i.mx6 pwm: prevent overflow of period_c * duty_ns by casting duty_ns to ull first. This bug came up when trying to create a 200 Hz PWM.
Hello Brecht Neyrinck, Am 27.04.2015 14:11, schrieb Brecht Neyrinck: --- drivers/pwm/pwm-imx-util.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) mode change 100644 = 100755 drivers/pwm/pwm-imx-util.c diff --git a/drivers/pwm/pwm-imx-util.c b/drivers/pwm/pwm-imx-util.c index f1d0b35..777a8bf 100644 --- a/drivers/pwm/pwm-imx-util.c +++ b/drivers/pwm/pwm-imx-util.c @@ -56,7 +56,7 @@ int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c, *prescale = *period_c / 0x1 + 1; *period_c /= *prescale; - c = (unsigned long long)(*period_c * duty_ns); + c = *period_c * (unsigned long long) duty_ns; Thanks for this ... Hmm... this code is directly from linux drivers/pwm/pwm-imx.c ... Do you have running a linux on your hw? Could you verify this in linux too? Thanks! Acked-by: Heiko Schocher h...@denx.de bye, Heiko do_div(c, period_ns); *duty_c = c; -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 03/20] x86: Remove unwanted MMC debugging
This printf() should not have made it into the code.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/baytrail/valleyview.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/x86/cpu/baytrail/valleyview.c
b/arch/x86/cpu/baytrail/valleyview.c
index a3e837d..9915da5 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -16,7 +16,6 @@ static struct pci_device_id mmc_supported[] = {
int cpu_mmc_init(bd_t *bis)
{
- printf(mmc init\n);
return pci_mmc_init(ValleyView SDHCI, mmc_supported,
ARRAY_SIZE(mmc_supported));
}
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH 13/20] x86: Store the GDT pointer in global_data
When we start up additional CPUs we want them to use the same Global
Descriptor Table. Store the address of this in global_data so we can
reference it later.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/cpu.c | 1 +
arch/x86/include/asm/global_data.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 13b3baa..74bfed2 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -133,6 +133,7 @@ static void load_gdt(const u64 *boot_gdt, u16 num_entries)
void setup_gdt(gd_t *id, u64 *gdt_addr)
{
+ id-arch.gdt = gdt_addr;
/* CS: code, read/execute, 4 GB, base 0 */
gdt_addr[X86_GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xf);
diff --git a/arch/x86/include/asm/global_data.h
b/arch/x86/include/asm/global_data.h
index 5ee06eb..4d9eac6 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -68,6 +68,7 @@ struct arch_global_data {
/* MRC training data to save for the next boot */
char *mrc_output;
unsigned int mrc_output_len;
+ void *gdt; /* Global descriptor table */
};
#endif
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH 05/20] Move display_options functions to their own header
Before adding one more function, create a separate header to help reduce the size of common.h. Add the missing function comments and tidy up. Signed-off-by: Simon Glass s...@chromium.org --- include/common.h | 16 +--- include/display_options.h | 48 +++ lib/display_options.c | 13 - 3 files changed, 49 insertions(+), 28 deletions(-) create mode 100644 include/display_options.h diff --git a/include/common.h b/include/common.h index cde3474..d4d704a 100644 --- a/include/common.h +++ b/include/common.h @@ -192,22 +192,8 @@ intcpu_init(void); /* */ phys_size_t initdram (int); -intdisplay_options (void); -/** - * print_size() - Print a size with a suffic - * - * print sizes as xxx KiB, xxx.y KiB, xxx MiB, xxx.y MiB, - * xxx GiB, xxx.y GiB, etc as needed; allow for optional trailing string - * (like \n) - * - * @size: Size to print - * @suffix String to print after the size - */ -void print_size(uint64_t size, const char *suffix); - -int print_buffer(ulong addr, const void *data, uint width, uint count, -uint linelen); +#include display_options.h /* common/main.c */ void main_loop (void); diff --git a/include/display_options.h b/include/display_options.h new file mode 100644 index 000..c222ea2 --- /dev/null +++ b/include/display_options.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2015 Google, Inc + * + * (C) Copyright 2000-2002 + * Wolfgang Denk, DENX Software Engineering, w...@denx.de. + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __display_options_h +#define __display_options_h + +/** + * print_size() - Print a size with a suffix + * + * print sizes as xxx KiB, xxx.y KiB, xxx MiB, xxx.y MiB, + * xxx GiB, xxx.y GiB, etc as needed; allow for optional trailing string + * (like \n) + * + * @size: Size to print + * @suffix String to print after the size + */ +void print_size(uint64_t size, const char *suffix); + +/** + * print_buffer() - Print data buffer in hex and ascii form + * + * Data reads are buffered so that each memory address is only read once. + * This is useful when displaying the contents of volatile registers. + * + * @addr: Starting address to display at start of line + * @data: pointer to data buffer + * @width: data value width. May be 1, 2, or 4. + * @count: number of values to display + * @linelen: Number of values to print per line; specify 0 for default length + */ +int print_buffer(ulong addr, const void *data, uint width, uint count, +uint linelen); + +/** + * display_options() - display the version string / build tag + * + * This displays the U-Boot version string. If a build tag is available this + * is displayed also. + */ +int display_options(void); + +#endif diff --git a/lib/display_options.c b/lib/display_options.c index d5d17b2..3f32bcd 100644 --- a/lib/display_options.c +++ b/lib/display_options.c @@ -63,19 +63,6 @@ void print_size(uint64_t size, const char *s) printf ( %ciB%s, c, s); } -/* - * Print data buffer in hex and ascii form to the terminal. - * - * data reads are buffered so that each memory address is only read once. - * Useful when displaying the contents of volatile registers. - * - * parameters: - *addr: Starting address to display at start of line - *data: pointer to data buffer - *width: data value width. May be 1, 2, or 4. - *count: number of values to display - *linelen: Number of values to print per line; specify 0 for default length - */ #define MAX_LINE_LENGTH_BYTES (64) #define DEFAULT_LINE_LENGTH_BYTES (16) int print_buffer(ulong addr, const void *data, uint width, uint count, -- 2.2.0.rc0.207.ga3a616c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
