Re: [U-Boot] [PATCH 03/19] arm: socfpga: Add driver for flash to program FPGA

[Chee, Tien Fong]

On Isn, 2017-09-04 at 11:39 +0200, Marek Vasut wrote:
> On 09/04/2017 09:08 AM, Chee, Tien Fong wrote:
> > 
> > On Rab, 2017-08-30 at 10:52 +0200, Marek Vasut wrote:
> > > 
> > > On 08/30/2017 10:05 AM, Chee, Tien Fong wrote:
> > > > 
> > > > 
> > > > On Sel, 2017-08-29 at 13:55 +0200, Marek Vasut wrote:
> > > > > 
> > > > > 
> > > > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> > > > > > 
> > > > > > 
> > > > > > 
> > > > > > From: Tien Fong Chee 
> > > > > > 
> > > > > > This driver handles FPGA program operation from flash
> > > > > > loading
> > > > > > RBF to memory and then to program FPGA.
> > > > > > 
> > > > > > Signed-off-by: Tien Fong Chee 
> > > > > > ---
> > > > > >  .../include/mach/fpga_manager_arria10.h|   27
> > > > > > ++
> > > > > >  drivers/fpga/socfpga_arria10.c |  386
> > > > > > +++-
> > > > > >  include/altera.h   |6
> > > > > > +
> > > > > >  include/configs/socfpga_common.h   |4
> > > > > > +
> > > > > >  4 files changed, 422 insertions(+), 1 deletions(-)
> > > > > > 
> > > > > > diff --git a/arch/arm/mach-
> > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > b/arch/arm/mach-
> > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > index 9cbf696..93a9122 100644
> > > > > > --- a/arch/arm/mach-
> > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > +++ b/arch/arm/mach-
> > > > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > > > @@ -8,6 +8,8 @@
> > > > > >  #ifndef _FPGA_MANAGER_ARRIA10_H_
> > > > > >  #define _FPGA_MANAGER_ARRIA10_H_
> > > > > >  
> > > > > > +#include 
> > > > > > +
> > > > > >  #define ALT_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR_SET_MSK  
> > > > > > 
> > > > > > BIT(0)
> > > > > >  #define ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK
> > > > > > 
> > > > > > BIT(1)
> > > > > >  #define ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK   
> > > > > > 
> > > > > > BIT(2)
> > > > > > @@ -89,11 +91,36 @@ struct socfpga_fpga_manager {
> > > > > >     u32  imgcfg_fifo_status;
> > > > > >  };
> > > > > >  
> > > > > > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > > > > > +enum rbf_type {unknown, periph_section, core_section};
> > > > > > +enum rbf_security {invalid, unencrypted, encrypted};
> > > > > > +
> > > > > > +struct rbf_info {
> > > > > > +   enum rbf_type section;
> > > > > > +   enum rbf_security security;
> > > > > > +};
> > > > > > +
> > > > > > +struct flash_info {
> > > > > > +   char *interface;
> > > > > > +   char *dev_part;
> > > > > > +   char *filename;
> > > > > > +   int fstype;
> > > > > > +   u32 remaining;
> > > > > > +   u32 flash_offset;
> > > > > > +   struct rbf_info rbfinfo;
> > > > > > +   struct image_header header;
> > > > > > +};
> > > > > > +#endif
> > > > > > +
> > > > > >  /* Functions */
> > > > > >  int fpgamgr_program_init(u32 * rbf_data, size_t rbf_size);
> > > > > >  int fpgamgr_program_finish(void);
> > > > > >  int is_fpgamgr_user_mode(void);
> > > > > >  int fpgamgr_wait_early_user_mode(void);
> > > > > > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > > > > > +const char *get_cff_filename(const void *fdt, int *len,
> > > > > > u32
> > > > > > core);
> > > > > > +const char *get_cff_devpart(const void *fdt, int *len);
> > > > > > +#endif
> > > > > >  
> > > > > >  #endif /* __ASSEMBLY__ */
> > > > > >  
> > > > > > diff --git a/drivers/fpga/socfpga_arria10.c
> > > > > > b/drivers/fpga/socfpga_arria10.c
> > > > > > index 5c1a68a..90c55e5 100644
> > > > > > --- a/drivers/fpga/socfpga_arria10.c
> > > > > > +++ b/drivers/fpga/socfpga_arria10.c
> > > > > > @@ -13,6 +13,12 @@
> > > > > >  #include 
> > > > > >  #include 
> > > > > >  #include 
> > > > > > +#include 
> > > > > > +#include 
> > > > > > +#include 
> > > > > > +#include 
> > > > > > +#include 
> > > > > > +#include 
> > > > > >  #include 
> > > > > >  #include 
> > > > > >  
> > > > > > @@ -22,6 +28,10 @@
> > > > > >  #define COMPRESSION_OFFSET 229
> > > > > >  #define FPGA_TIMEOUT_MSEC  1000  /* timeout in ms */
> > > > > >  #define FPGA_TIMEOUT_CNT   0x100
> > > > > > +#define RBF_UNENCRYPTED0xa65c
> > > > > > +#define RBF_ENCRYPTED  0xa65d
> > > > > > +#define ARRIA10RBF_PERIPH  0x0001
> > > > > > +#define ARRIA10RBF_CORE0x8001
> > > > > >  
> > > > > >  DECLARE_GLOBAL_DATA_PTR;
> > > > > >  
> > > > > > @@ -118,7 +128,7 @@ static int
> > > > > > wait_for_nconfig_pin_and_nstatus_pin(void)
> > > > > >     return wait_for_bit(__func__,
> > > > > >     _manager_base-
> > > > > > >imgcfg_stat,
> > > > > >     mask,
> > > > > > -   false, FPGA_TIMEOUT_MSEC,
> > > > > > false);
> > > > > > +   true, FPGA_TIMEOUT_MSEC,
> > > > > > false);
> > > > > >  }
> > > > > >  
> > > > > >  static int wait_for_f2s_nstatus_pin(unsigned long value)
> 

[U-Boot] [PATCH] ARM: mvebu: add SAR frequency values for 1.8/2.0GHz

[Chris Packham]

The Armada-38x has 1.8GHz and 2.0GHz variants. Add entries for these
variants to the sar_freq_tab.

Signed-off-by: Chris Packham 
---

 arch/arm/mach-mvebu/cpu.c | 16 +---
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index f7f83bfa3655..74a63dd6560b 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -112,13 +112,15 @@ static const struct sar_freq_modes sar_freq_tab[] = {
 #elif defined(CONFIG_ARMADA_38X)
 /* SAR frequency values for Armada 38x */
 static const struct sar_freq_modes sar_freq_tab[] = {
-   {  0x0,  0x0,  666, 333, 333 },
-   {  0x2,  0x0,  800, 400, 400 },
-   {  0x4,  0x0, 1066, 533, 533 },
-   {  0x6,  0x0, 1200, 600, 600 },
-   {  0x8,  0x0, 1332, 666, 666 },
-   {  0xc,  0x0, 1600, 800, 800 },
-   { 0xff, 0xff,0,   0,   0 }  /* 0xff marks end of array */
+   {  0x0,  0x0,  666,  333, 333 },
+   {  0x2,  0x0,  800,  400, 400 },
+   {  0x4,  0x0, 1066,  533, 533 },
+   {  0x6,  0x0, 1200,  600, 600 },
+   {  0x8,  0x0, 1332,  666, 666 },
+   {  0xc,  0x0, 1600,  800, 800 },
+   { 0x10,  0x0, 1866,  933, 933 },
+   { 0x13,  0x0, 2000, 1000, 933 },
+   { 0xff, 0xff,0,0,   0 } /* 0xff marks end of array */
 };
 #else
 /* SAR frequency values for Armada XP */
-- 
2.14.1

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Re: [U-Boot] [PATCH v1 1/2] imx: add macro to detect whether USB has been initialized

[Stefan Agner]

On 2017-09-04 19:57, Eric Nelson wrote:
> Hi Stefan,
> 
> On 09/04/2017 06:21 PM, Stefan Agner wrote:
>> From: Stefan Agner 
>>
>> This macro allows to detect whether the boot ROM initialized USB
>> already (serial downloader). This is helpful to reliably detect
>> if the system has been recovered via USB serial downloader.
>>
>> Signed-off-by: Stefan Agner 
>> Acked-by: Marcel Ziswiler 
>> ---
>> Hi Stefano,
>>
>> I noted already in my initial post that detection of serial
>> downloader mode is somewhat brittle:
>> https://lists.denx.de/pipermail/u-boot/2017-August/301952.html
>>
>> This came up quite fast now also for other boards:
>> https://www.mail-archive.com/u-boot@lists.denx.de/msg262234.html
>>
>> We use this patches since quite some time. Also NXP uses this
>> detection method to start their mfgr tools... Altough a hack,
>> maybe we should still add it upstream?
>>
>> --
>> Stefan
>>
>>
>>   arch/arm/include/asm/arch-mx6/imx-regs.h | 7 +++
>>   1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h 
>> b/arch/arm/include/asm/arch-mx6/imx-regs.h
>> index 86e267087a..895ef4de83 100644
>> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
>> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
>> @@ -985,5 +985,12 @@ struct pwm_regs {
>>  u32 pr;
>>  u32 cnr;
>>   };
> 
> It seems as if you've already named a constant, so you might as well
> #define and use it (USBPH0_PWD or USB0_PWD).

Agreed.

> 
> The reference manual seems to call it RXPWDRX though.

I guess taking the latest naming from the manual make sense. Will update
in v2.

Before I send out v2, I'd like to know from Stefano whether he agrees
with the general direction of the patch.



> 
>> +
>> +/*
>> + * If ROM fell back to USB recover mode, USBPH0_PWD will be clear to use USB
>> + * If boot from the other mode, USB0_PWD will keep reset value
>> + */
>> +#define is_boot_from_usb(void) (!(readl(USB_PHY0_BASE_ADDR) & (1<<20)))
>> +
>>   #endif /* __ASSEMBLER__*/
>>   #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */
>>
> If I'm reading your comment correctly, the RXPWDRX bit will be set (the
> PHY will be powered down) unless it was enabled by the Boot ROM.
> 
> Won't this also be clear if you've run 'usb start' under U-Boot?

Yes, this only works before a USB initialization...

This should be fine for the use case I have in mind (see patch 2).

Note this idea is borrowed from NXP downstream and seems to work here:
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/arch/arm/include/asm/arch-mx7/imx-regs.h?h=imx_v2016.03_4.1.15_2.0.0_ga#n1204

--
Stefan
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[U-Boot] [PATCH] arm64: ls1012ardb: Add distro boot support

[Rajesh Bhagat]

Include common config_distro_defaults.h and config_distro_bootcmd.h
for u-boot enviroments to support automatical distro boot which
scan boot.scr from external storage devices(e.g. SD and USB)
and execute autoboot script.

Signed-off-by: Bhaskar Upadhaya 
Signed-off-by: Rajesh Bhagat 
---
 configs/ls1012ardb_qspi_defconfig |  1 +
 include/configs/ls1012a_common.h  | 16 
 include/configs/ls1012ardb.h  | 34 ++
 3 files changed, 47 insertions(+), 4 deletions(-)

diff --git a/configs/ls1012ardb_qspi_defconfig 
b/configs/ls1012ardb_qspi_defconfig
index 81702e3..39d7a54 100644
--- a/configs/ls1012ardb_qspi_defconfig
+++ b/configs/ls1012ardb_qspi_defconfig
@@ -50,3 +50,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_STORAGE=y
+CONFIG_DISTRO_DEFAULTS=y
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 020c506..14d4f07 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -90,6 +90,14 @@
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE   128
 
+#include 
+#ifndef CONFIG_SPL_BUILD
+#define BOOT_TARGET_DEVICES(func) \
+   func(MMC, mmc, 0) \
+   func(USB, usb, 0)
+#include 
+#endif
+
 /* Initial environment variables */
 #define CONFIG_EXTRA_ENV_SETTINGS  \
"verify=no\0"   \
@@ -101,14 +109,14 @@
"kernel_load=0xa000\0"  \
"kernel_size=0x280\0"   \
 
-#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
-   "$kernel_start $kernel_size && "\
-   "bootm $kernel_load"
+#undef CONFIG_BOOTCOMMAND
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd"
+#endif
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE  512 /* Console I/O Buffer Size */
 #define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING 1
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_MAXARGS 64  /* max command args */
 
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index e9edcd2..f6b0f1e 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -70,6 +70,40 @@
 #define CONFIG_SYS_MEMTEST_START   0x8000
 #define CONFIG_SYS_MEMTEST_END 0x9fff
 
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#define CONFIG_EXTRA_ENV_SETTINGS  \
+   "verify=no\0"   \
+   "fdt_high=0x\0" \
+   "initrd_high=0x\0"  \
+   "fdt_addr=0x00f0\0" \
+   "kernel_addr=0x0100\0"  \
+   "scriptaddr=0x8000\0"   \
+   "fdtheader_addr_r=0x8010\0" \
+   "kernelheader_addr_r=0x8020\0"  \
+   "kernel_addr_r=0x8100\0"\
+   "fdt_addr_r=0x9000\0"   \
+   "load_addr=0xa000\0"\
+   "kernel_size=0x280\0"   \
+   "console=ttyS0,115200\0"\
+   BOOTENV \
+   "boot_scripts=ls1012ardb_boot.scr\0"\
+   "scan_dev_for_boot_part="   \
+"part list ${devtype} ${devnum} devplist; "\
+"env exists devplist || setenv devplist 1; "   \
+"for distro_bootpart in ${devplist}; do "  \
+ "if fstype ${devtype} "   \
+ "${devnum}:${distro_bootpart} "   \
+ "bootfstype; then "   \
+ "run scan_dev_for_boot; " \
+ "fi; "\
+ "done\0"  \
+   "installer=load mmc 0:2 $load_addr "\
+  "/flex_installer_arm64.itb; "\
+  "bootm $load_addr#$board\0"  \
+   "qspi_bootcmd=echo Trying load from qspi..;"\
+   "sf probe && sf read $load_addr "   \
+   "$kernel_addr $kernel_size && bootm $load_addr#$board\0" \
+
 
 #include 
 
-- 
2.7.4

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Re: [U-Boot] [PATCH] libfdt: Initialize the stack variable

[J. William Campbell]

On 9/4/2017 8:41 PM, Chee, Tien Fong wrote:

On Rab, 2017-08-30 at 06:31 -0700, J. William Campbell wrote:

On 8/29/2017 10:15 PM, tien.fong.c...@intel.com wrote:

From: Tien Fong Chee 

Report Coverity log:
The code uses a variable that has not
been initialized, leading to unpredictable
or unintended results.

Reported-by: Coverity (CID: 60519)
Signed-off-by: Tien Fong Chee 
---
   lib/libfdt/fdt_wip.c |2 +-
   1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/lib/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
index 45fb964..01adad0 100644
--- a/lib/libfdt/fdt_wip.c
+++ b/lib/libfdt/fdt_wip.c
@@ -115,7 +115,7 @@ int fdt_find_regions(const void *fdt, char *
const inc[], int inc_count,
     struct fdt_region region[], int max_regions,
     char *path, int path_len, int
add_string_tab)
   {
-   int stack[FDT_MAX_DEPTH];
+   int stack[FDT_MAX_DEPTH] = { 0 };

It seems to me that one of three things must be true. 1) Coverity
can't
correctly analyze the code and stack[] is not used in an un-
initialized
manner, 2) stack is used in an un-initialized manner but the result
is
not used in that case and is a "don't care" or 3) there is a bug in
the
code. It seems that just initializing the variable to 0 is a "Bad
Idea(tm)". If it is case 1 or 2, there should be a Coverity code
annotation comment added to that effect, and if it is case 3, it
should
be fixed. Initializing this variable makes the binary larger to no
purpose unless there is a bug already.

Best Regards,
J. William Campbell

Yeah, i agree with you, state machine design should ensure stack[] is
not used in a uninitialized manner. Hence, i need input from whom
familiar with this function, whether this warning fall in anyone of
these conditions. If we just direct init the stack[], and this solution
will make extra 128 bytes in binary, but having variable with default
value is also good pratice from software quality perspective.
Yes, if the default value has a rationale. On the surface, there is no 
way to know that 0 is a "good" initial value. There may be a reason that 
it is, but if we don't know for sure, it is just a "random" number. I 
hope whoever wrote this will speak up and say why the variable is never 
used before it is initialized. Thank you for being so diligent.


Best Regards,
Bill Campbell



    char *end;
    int nextoffset = 0;
    uint32_t tag;



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Re: [U-Boot] [PATCH 07/19] arm: socfpga: Add DRAM bank size initialization function

[Chee, Tien Fong]

On Isn, 2017-09-04 at 11:40 +0200, Marek Vasut wrote:
> On 09/04/2017 09:11 AM, Chee, Tien Fong wrote:
> > 
> > On Rab, 2017-08-30 at 10:56 +0200, Marek Vasut wrote:
> > > 
> > > On 08/30/2017 10:36 AM, Chee, Tien Fong wrote:
> > > > 
> > > > 
> > > > On Sel, 2017-08-29 at 13:59 +0200, Marek Vasut wrote:
> > > > > 
> > > > > 
> > > > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> > > > > > 
> > > > > > 
> > > > > > 
> > > > > > From: Tien Fong Chee 
> > > > > > 
> > > > > > Add function for both multiple DRAM bank and single DRAM
> > > > > > bank
> > > > > > size
> > > > > > initialization. This common functionality could be used by
> > > > > > every
> > > > > > single
> > > > > > SOCFPGA board.
> > > > > > 
> > > > > > Signed-off-by: Tien Fong Chee 
> > > > > > ---
> > > > > >  arch/arm/mach-socfpga/board.c|   12 
> > > > > >  include/configs/socfpga_common.h |1 +
> > > > > >  2 files changed, 13 insertions(+), 0 deletions(-)
> > > > > > 
> > > > > > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
> > > > > > socfpga/board.c
> > > > > > index a41d089..3f2e30a 100644
> > > > > > --- a/arch/arm/mach-socfpga/board.c
> > > > > > +++ b/arch/arm/mach-socfpga/board.c
> > > > > > @@ -29,6 +29,18 @@ int board_init(void)
> > > > > >     return 0;
> > > > > >  }
> > > > > >  
> > > > > > +int dram_init_banksize(void)
> > > > > > +{
> > > > > > +#if !defined(CONFIG_SYS_SDRAM_BASE) &&
> > > > > > !defined(CONFIG_SYS_SDRAM_SIZE)
> > > > > > +   fdtdec_setup_memory_banksize();
> > > > > This should work on al boards, so why do you need this macro
> > > > > ?
> > > > > Also, this should go into arch/arm/ , not board/
> > > > > 
> > > > In case these macros are not defined, then we need to get the
> > > > info
> > > > from
> > > > DTS. This is in arch/arm/mach-socpfga/board.c . I found some in
> > > > arch/arm, and other in board/ .
> > > Every socfpga platform in u-boot has a dts, so you can always
> > > extract
> > > the memory config from it and it's the preferred method.
> > > 
> > This implementation supports both method, from header or DTS.
> We want to support only the DT method, so drop the other one.
> 
Okay, noted.
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Re: [U-Boot] [PATCH] libfdt: Initialize the stack variable

[Chee, Tien Fong]

On Rab, 2017-08-30 at 06:31 -0700, J. William Campbell wrote:
> On 8/29/2017 10:15 PM, tien.fong.c...@intel.com wrote:
> > 
> > From: Tien Fong Chee 
> > 
> > Report Coverity log:
> > The code uses a variable that has not
> > been initialized, leading to unpredictable
> > or unintended results.
> > 
> > Reported-by: Coverity (CID: 60519)
> > Signed-off-by: Tien Fong Chee 
> > ---
> >   lib/libfdt/fdt_wip.c |2 +-
> >   1 files changed, 1 insertions(+), 1 deletions(-)
> > 
> > diff --git a/lib/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
> > index 45fb964..01adad0 100644
> > --- a/lib/libfdt/fdt_wip.c
> > +++ b/lib/libfdt/fdt_wip.c
> > @@ -115,7 +115,7 @@ int fdt_find_regions(const void *fdt, char *
> > const inc[], int inc_count,
> >      struct fdt_region region[], int max_regions,
> >      char *path, int path_len, int
> > add_string_tab)
> >   {
> > -   int stack[FDT_MAX_DEPTH];
> > +   int stack[FDT_MAX_DEPTH] = { 0 };
> It seems to me that one of three things must be true. 1) Coverity
> can't 
> correctly analyze the code and stack[] is not used in an un-
> initialized 
> manner, 2) stack is used in an un-initialized manner but the result
> is 
> not used in that case and is a "don't care" or 3) there is a bug in
> the 
> code. It seems that just initializing the variable to 0 is a "Bad 
> Idea(tm)". If it is case 1 or 2, there should be a Coverity code 
> annotation comment added to that effect, and if it is case 3, it
> should 
> be fixed. Initializing this variable makes the binary larger to no 
> purpose unless there is a bug already.
> 
> Best Regards,
> J. William Campbell
Yeah, i agree with you, state machine design should ensure stack[] is
not used in a uninitialized manner. Hence, i need input from whom
familiar with this function, whether this warning fall in anyone of
these conditions. If we just direct init the stack[], and this solution
will make extra 128 bytes in binary, but having variable with default
value is also good pratice from software quality perspective.
> > 
> >     char *end;
> >     int nextoffset = 0;
> >     uint32_t tag;
> 
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Re: [U-Boot] [PATCH v1 1/2] imx: add macro to detect whether USB has been initialized

[Eric Nelson]

Hi Stefan,

On 09/04/2017 06:21 PM, Stefan Agner wrote:

From: Stefan Agner 

This macro allows to detect whether the boot ROM initialized USB
already (serial downloader). This is helpful to reliably detect
if the system has been recovered via USB serial downloader.

Signed-off-by: Stefan Agner 
Acked-by: Marcel Ziswiler 
---
Hi Stefano,

I noted already in my initial post that detection of serial
downloader mode is somewhat brittle:
https://lists.denx.de/pipermail/u-boot/2017-August/301952.html

This came up quite fast now also for other boards:
https://www.mail-archive.com/u-boot@lists.denx.de/msg262234.html

We use this patches since quite some time. Also NXP uses this
detection method to start their mfgr tools... Altough a hack,
maybe we should still add it upstream?

--
Stefan


  arch/arm/include/asm/arch-mx6/imx-regs.h | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h 
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 86e267087a..895ef4de83 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -985,5 +985,12 @@ struct pwm_regs {
u32 pr;
u32 cnr;
  };


It seems as if you've already named a constant, so you might as well
#define and use it (USBPH0_PWD or USB0_PWD).

The reference manual seems to call it RXPWDRX though.


+
+/*
+ * If ROM fell back to USB recover mode, USBPH0_PWD will be clear to use USB
+ * If boot from the other mode, USB0_PWD will keep reset value
+ */
+#defineis_boot_from_usb(void) (!(readl(USB_PHY0_BASE_ADDR) & (1<<20)))
+
  #endif /* __ASSEMBLER__*/
  #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */


If I'm reading your comment correctly, the RXPWDRX bit will be set (the
PHY will be powered down) unless it was enabled by the Boot ROM.

Won't this also be clear if you've run 'usb start' under U-Boot?

Please advise,


Eric
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Re: [U-Boot] video: ipu_common: fix build error

[Eric Nelson]

Hi Peng,

Can you tell that I'm hunting a bug in an old version?

I'm seeing a **very** intermittent regression between U-Boot
versions 2015.07 and 2016.05 and happened to spot something
in this patch.

On 04/27/2016 07:07 PM, Peng Fan wrote:

Some toolchains fail to build
"clk->rate = (u64)(clk->parent->rate * 16) / div;"
And the cast usage is wrong.

Use the following code to fix the issue,
"
   do_div(parent_rate, div);
   clk->rate = parent_rate;
"

Reported-by: Peter Robinson 
Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Tom Rini 
Cc: Anatolij Gustschin 
Cc: Peter Robinson 
Reviewed-by: Tom Rini 
Tested-by: Peter Robinson 
---

Hi Peter,

  Please help test this patch to see whether this fix your issue or not.
  Thanks for pointing out this issue.

Thanks,
Peng.

  drivers/video/ipu_common.c | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c
index 36d4b23..5676a0f 100644
--- a/drivers/video/ipu_common.c
+++ b/drivers/video/ipu_common.c
@@ -352,7 +352,9 @@ static int ipu_pixel_clk_set_rate(struct clk *clk, unsigned 
long rate)
 */
__raw_writel((div / 16) << 16, DI_BS_CLKGEN1(clk->id));
  


Did you intend to lose a multiply by 16 here?


-   clk->rate = (u64)(clk->parent->rate * 16) / div;
+   do_div(parent_rate, div);
+
+   clk->rate = parent_rate;
  
  	return 0;

  }



Please advise,


Eric
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Re: [U-Boot] [U-Boot,2/3] imx: mx6: correct IPU clock

[Eric Nelson]

Hi all,

Adding my normal e-mail account to the chain, since the other account
isn't registered on the list.

On 09/04/2017 07:37 PM, Eric Nelson wrote:

Hi Peng,

Pardon the reference to an old update, but do you have a description
of the symptoms that brought about this patch?

On 03/09/2016 01:07 AM, Peng Fan wrote:

The CONFIG_IPUV3_CLK should be 26400, to i.MX6DL, it should be
19800.

Signed-off-by: Peng Fan 
Signed-off-by: Sandor Yu 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Peter Robinson 
---
  include/configs/mx6sabre_common.h | 6 +-
  1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/configs/mx6sabre_common.h 
b/include/configs/mx6sabre_common.h

index 29d1f91..a6d821b 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -225,7 +225,11 @@
  #define CONFIG_BMP_16BPP
  #define CONFIG_VIDEO_LOGO
  #define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_IPUV3_CLK 26000
+#ifdef CONFIG_MX6DL
+#define CONFIG_IPUV3_CLK 19800
+#else
+#define CONFIG_IPUV3_CLK 26400
+#endif



Note that this should probably be applied for other boards
which are compiled for multiple CPU types.

At least the Boundary Nitrogen boards, but probably others
like Wand have ordering options for DL or Solo processors
and may need the reduced clock rate.



  #define CONFIG_IMX_HDMI
  #define CONFIG_IMX_VIDEO_SKIP


Please advise,


Eric


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[U-Boot] CONFIG_ENV_ADDR vs CONFIG_ENV_OFFSET

[Adam Ford]

A significant number of omap3 boards use CONFIG_ENV_ADDR and
CONFIG_ENV_OFFSET together.

When CONFIG_ENV_IS_IN_FLASH is defined, environment.h appears to
define CONFIG_ENV_ADDR as CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET if
CONFIG_ENV_ADDR is not defined, so it assumes that CONFIG_ENV_OFFSET
is defined.

It then tries to define CONFIG_ENV_OFFSET  as CONFIG_ENV_ADDR -
CONFIG_SYS_FLASH_BASE if CONFIG_ENV_OFFSET is not defined, so it
assumes that CONFIG_ENV_ADDR is defined, the finally there is an error
case only when neither are defined.

Since it seems like these should be two different values, can/should
we remove one of them when they are both set to the same value?  Is
one preferred over another?

MTD parts shows the u-boot-env listed as an offset into NAND, so using
CONFIG_ENV_OFFSET would be somewhat consistent to me.

adam
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Re: [U-Boot] rockchip: enable rk322x sysreset driver

[Kever Yang]

Hi Philipp,

Could you share how long will you applied the patches after you 
review and ack?


I want to use U-Boot v2017.09 as a base for rk3229 and rk3399, but 
many patches are


still pending in the list.


Thanks,
- Kever
On 08/19/2017 12:08 AM, Philipp Tomsich wrote:

The sysreset driver for rk322x is ready but not enabled,
add it to Makefile to make sure it's enabled.

Signed-off-by: Kever Yang 
Reviewed-by: Simon Glass 
Reviewed-by: Philipp Tomsich 
---

  drivers/sysreset/Makefile | 1 +
  1 file changed, 1 insertion(+)


Acked-by: Philipp Tomsich 




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Re: [U-Boot] [U-Boot, 3/3] rockchip: firefly-rk3399: enable ATF and dwmmc

[Kever Yang]

Hi Philipp,

Could you merge this patch first?
For the other two patches, I can send later after I figure out how 
to do it.


Thanks,
- Kever
On 08/18/2017 09:15 PM, Philipp Tomsich wrote:

enable the ATF option and SDCard in defconfig.

Signed-off-by: Kever Yang 
Acked-by: Philipp Tomsich 
---

  configs/firefly-rk3399_defconfig | 6 --
  1 file changed, 4 insertions(+), 2 deletions(-)


Reviewed-by: Philipp Tomsich 




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[U-Boot] [PATCH] include/configs: remove references to SMNAND_ENV_OFFSET

[Adam Ford]

In mancy cases both CONFIG_ENV_OFFSET and CONFIG_ENV_ADDR point
to an otherwise-unused SMNAND_ENV_OFFSET.
This patch will set both CONFIG_ENV_OFFSET and CONFIG_ENV_ADDR to
whatever value was defined by SMNAND_ENV_OFFSET.

Signed-off-by: Adam Ford 
---
 include/configs/am3517_crane.h   | 5 ++---
 include/configs/am3517_evm.h | 5 ++---
 include/configs/cm_t35.h | 5 ++---
 include/configs/cm_t3517.h   | 5 ++---
 include/configs/devkit8000.h | 3 +--
 include/configs/mcx.h| 5 ++---
 include/configs/omap3_beagle.h   | 5 ++---
 include/configs/omap3_cairo.h| 5 ++---
 include/configs/omap3_evm.h  | 5 ++---
 include/configs/omap3_logic.h| 5 ++---
 include/configs/omap3_overo.h| 6 ++
 include/configs/omap3_pandora.h  | 5 ++---
 include/configs/omap3_zoom1.h| 5 ++---
 include/configs/tam3517-common.h | 5 ++---
 include/configs/tao3530.h| 3 +--
 15 files changed, 28 insertions(+), 44 deletions(-)

diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index edaa384..c5fe3dc 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -207,11 +207,10 @@
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_FLASH_BASE
 
 #define CONFIG_NAND_OMAP_GPMC
-#define SMNAND_ENV_OFFSET  0x26 /* environment starts here */
 
 #define CONFIG_SYS_ENV_SECT_SIZE   (128 << 10) /* 128 KiB sector */
-#define CONFIG_ENV_OFFSET  SMNAND_ENV_OFFSET
-#define CONFIG_ENV_ADDRSMNAND_ENV_OFFSET
+#define CONFIG_ENV_OFFSET  0x26
+#define CONFIG_ENV_ADDR0x26
 
 /*---
  * CFI FLASH driver setup
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 5435ca8..d0cf740 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -278,9 +278,8 @@
 
 #define CONFIG_SYS_ENV_SECT_SIZE   (128 << 10) /* 128 KiB */
 #define CONFIG_ENV_SIZECONFIG_SYS_ENV_SECT_SIZE
-#define SMNAND_ENV_OFFSET  0x26 /* environment starts here */
-#define CONFIG_ENV_OFFSET  SMNAND_ENV_OFFSET
-#define CONFIG_ENV_ADDRSMNAND_ENV_OFFSET
+#define CONFIG_ENV_OFFSET  0x26
+#define CONFIG_ENV_ADDR0x26
 
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index d30b783..30e20b8 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -207,9 +207,8 @@
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
 
-#define SMNAND_ENV_OFFSET  0x26 /* environment starts here */
-#define CONFIG_ENV_OFFSET  SMNAND_ENV_OFFSET
-#define CONFIG_ENV_ADDRSMNAND_ENV_OFFSET
+#define CONFIG_ENV_OFFSET  0x26
+#define CONFIG_ENV_ADDR0x26
 
 #if defined(CONFIG_CMD_NET)
 #define CONFIG_SMC911X
diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
index 282b7ae..c166bf7 100644
--- a/include/configs/cm_t3517.h
+++ b/include/configs/cm_t3517.h
@@ -209,9 +209,8 @@
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
 
-#define SMNAND_ENV_OFFSET  0x26 /* environment starts here */
-#define CONFIG_ENV_OFFSET  SMNAND_ENV_OFFSET
-#define CONFIG_ENV_ADDRSMNAND_ENV_OFFSET
+#define CONFIG_ENV_OFFSET  0x26
+#define CONFIG_ENV_ADDR0x26
 
 #if defined(CONFIG_CMD_NET)
 #define CONFIG_DRIVER_TI_EMAC
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 2bf0983..bd325e1 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -174,9 +174,8 @@
0x0100) /* 16MB */
 
 /* NAND and environment organization  */
-#define SMNAND_ENV_OFFSET  0x26 /* environment starts here */
 
-#define CONFIG_ENV_OFFSET  SMNAND_ENV_OFFSET
+#define CONFIG_ENV_OFFSET  0x26
 
 /* SRAM config */
 #define CONFIG_SYS_SRAM_START  0x4020
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index c06d618..030e403 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -247,12 +247,11 @@
 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
-#define SMNAND_ENV_OFFSET  0x18 /* environment starts here */
 
 /* Redundant Environment */
 #define CONFIG_SYS_ENV_SECT_SIZE   (128 << 10) /* 128 KiB */
-#define CONFIG_ENV_OFFSET  SMNAND_ENV_OFFSET
-#define CONFIG_ENV_ADDR   

Re: [U-Boot] [PATCH] gitignore: add intermediates from libfdt build

[Bin Meng]

On Thu, Aug 31, 2017 at 8:52 PM, Simon Glass  wrote:
> On 29 August 2017 at 17:47, Philipp Tomsich
>  wrote:
>> Since ee95d10 (fdt: Build the new python libfdt module), a number of
>> additional files are auto-generated/installed into the tools directory.
>> List these in .gitignore to suppress having them listed as untracked.
>>
>> Signed-off-by: Philipp Tomsich 
>> References: ee95d10 (fdt: Build the new python libfdt module)
>>
>> ---
>>
>>  .gitignore | 8 
>>  1 file changed, 8 insertions(+)
>
> Reviewed-by: Simon Glass 

I just noticed this. Shouldn't this be put in the tools/.gitignore instead?

I have a similar patch @ http://patchwork.ozlabs.org/patch/809493/

Regards,
Bin
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[U-Boot] [PATCH v1 2/2] imx_common: detect USB serial downloader reliably

[Stefan Agner]

From: Stefan Agner 

The current mechanism using SCR/GPR registers work well when
the serial downloader boot mode has been selected explicitly
(either via boot mode pins or using bmode command). However,
in case the system entered boot ROM due to unbootable primary
boot devices (e.g. empty eMMC), the SPL fails to detect that
it has been downloaded through serial loader and tries to
continue booting from eMMC:
  Trying to boot from MMC1
  mmc_load_image_raw_sector: mmc block read error
  SPL: failed to boot from all boot devices
  ### ERROR ### Please RESET the board ###

The only known way to reliably detect USB serial downloader
is by checking the USB PHY receiver block power state...

Signed-off-by: Stefan Agner 
Acked-by: Marcel Ziswiler 
---

 arch/arm/mach-imx/spl.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 258578ac25..8e8e2f755b 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -31,6 +31,10 @@ u32 spl_boot_device(void)
if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
return BOOT_DEVICE_BOARD;
 
+   /* Check USB state in case we entered serial downloader as fallback */
+   if (is_boot_from_usb())
+   return BOOT_DEVICE_BOARD;
+
/* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
 /* EIM: See 8.5.1, Table 8-9 */
-- 
2.14.1

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[U-Boot] [PATCH v1 1/2] imx: add macro to detect whether USB has been initialized

[Stefan Agner]

From: Stefan Agner 

This macro allows to detect whether the boot ROM initialized USB
already (serial downloader). This is helpful to reliably detect
if the system has been recovered via USB serial downloader.

Signed-off-by: Stefan Agner 
Acked-by: Marcel Ziswiler 
---
Hi Stefano,

I noted already in my initial post that detection of serial
downloader mode is somewhat brittle:
https://lists.denx.de/pipermail/u-boot/2017-August/301952.html

This came up quite fast now also for other boards:
https://www.mail-archive.com/u-boot@lists.denx.de/msg262234.html

We use this patches since quite some time. Also NXP uses this
detection method to start their mfgr tools... Altough a hack,
maybe we should still add it upstream?

--
Stefan


 arch/arm/include/asm/arch-mx6/imx-regs.h | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h 
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 86e267087a..895ef4de83 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -985,5 +985,12 @@ struct pwm_regs {
u32 pr;
u32 cnr;
 };
+
+/*
+ * If ROM fell back to USB recover mode, USBPH0_PWD will be clear to use USB
+ * If boot from the other mode, USB0_PWD will keep reset value
+ */
+#defineis_boot_from_usb(void) (!(readl(USB_PHY0_BASE_ADDR) & (1<<20)))
+
 #endif /* __ASSEMBLER__*/
 #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */
-- 
2.14.1

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[U-Boot] [PATCH 1/3] efi_loader: rename __efi_hello_world_*

[Heinrich Schuchardt]

In scripts/Makefile.lib we build section including helloworld.efi.
This allows to load the EFI binary with command 'bootefi hello'.

scripts/Makefile.lib contains explicit references to strings
containing helloworld and hello_world. This makes it impossible
to generalize the coding to accomodate additional built in
EFI binaries.

Let us rename the variables __efi_hello_world_* to
__efi_helloworld_*.

Signed-off-by: Heinrich Schuchardt 
---
 cmd/bootefi.c  | 4 ++--
 include/asm-generic/sections.h | 4 ++--
 scripts/Makefile.lib   | 8 
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index a3768158a2..c5bfab1147 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -298,14 +298,14 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int 
argc, char * const argv[])
return CMD_RET_USAGE;
 #ifdef CONFIG_CMD_BOOTEFI_HELLO
if (!strcmp(argv[1], "hello")) {
-   ulong size = __efi_hello_world_end - __efi_hello_world_begin;
+   ulong size = __efi_helloworld_end - __efi_helloworld_begin;
 
saddr = env_get("loadaddr");
if (saddr)
addr = simple_strtoul(saddr, NULL, 16);
else
addr = CONFIG_SYS_LOAD_ADDR;
-   memcpy((char *)addr, __efi_hello_world_begin, size);
+   memcpy((char *)addr, __efi_helloworld_begin, size);
} else
 #endif
{
diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h
index daf021b647..b6535705a5 100644
--- a/include/asm-generic/sections.h
+++ b/include/asm-generic/sections.h
@@ -22,8 +22,8 @@ extern char __kprobes_text_start[], __kprobes_text_end[];
 extern char __entry_text_start[], __entry_text_end[];
 extern char __initdata_begin[], __initdata_end[];
 extern char __start_rodata[], __end_rodata[];
-extern char __efi_hello_world_begin[];
-extern char __efi_hello_world_end[];
+extern char __efi_helloworld_begin[];
+extern char __efi_helloworld_end[];
 
 /* Start and end of .ctors section - used for constructor calls. */
 extern char __ctors_start[], __ctors_end[];
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 7f97e8ebf3..164c234b4c 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -350,11 +350,11 @@ cmd_S_efi=
\
 (  \
echo '.section .rodata.efi.init,"a"';   \
echo '.balign 16';  \
-   echo '.global __efi_hello_world_begin'; \
-   echo '__efi_hello_world_begin:';\
+   echo '.global __efi_helloworld_begin';  \
+   echo '__efi_helloworld_begin:'; \
echo '.incbin "$<" ';   \
-   echo '__efi_hello_world_end:';  \
-   echo '.global __efi_hello_world_end';   \
+   echo '__efi_helloworld_end:';   \
+   echo '.global __efi_helloworld_end';\
echo '.balign 16';  \
 ) > $@
 
-- 
2.11.0

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[U-Boot] [PATCH 3/3] efi_loader: usage of always in Makefile

[Heinrich Schuchardt]

Variable always should only be appended but not overwritten by
lib/efi_loader/Makefile.

Remove variable efiprogs which is not otherwise used.

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/Makefile | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index 6bca05aeb4..5200497230 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -10,8 +10,9 @@
 CFLAGS_helloworld.o := $(CFLAGS_EFI)
 CFLAGS_REMOVE_helloworld.o := $(CFLAGS_NON_EFI)
 
-efiprogs-$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE) += helloworld.efi
-always := $(efiprogs-y)
+ifneq ($(CONFIG_CMD_BOOTEFI_HELLO_COMPILE),)
+always += helloworld.efi
+endif
 
 obj-$(CONFIG_CMD_BOOTEFI_HELLO) += helloworld_efi.o
 obj-y += efi_image_loader.o efi_boottime.o efi_runtime.o efi_console.o
-- 
2.11.0

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[U-Boot] [PATCH 2/3] scripts/Makefile.lib: generalize building built in EFI app

[Heinrich Schuchardt]

Replace all occurences of helloworld by generalized forms.
This allows us to build additional EFI applications that are
included into the U-Boot binary without loading
scripts/Makefile.lib with specific filenames.

Signed-off-by: Heinrich Schuchardt 
---
 scripts/Makefile.lib | 28 +++-
 1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 164c234b4c..c73464b854 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -342,20 +342,22 @@ cmd_S_ttf=
\
 $(obj)/%.S: $(src)/%.ttf
$(call cmd,S_ttf)
 
-# EFI Hello World application
+# EFI applications
+# A Makefile target *.efi is built as EFI application.
+# A Makefile target *_efi.S wraps *.efi as built-in EFI application.
 # ---
 
 # Generate an assembly file to wrap the EFI app
-cmd_S_efi= \
-(  \
-   echo '.section .rodata.efi.init,"a"';   \
-   echo '.balign 16';  \
-   echo '.global __efi_helloworld_begin';  \
-   echo '__efi_helloworld_begin:'; \
-   echo '.incbin "$<" ';   \
-   echo '__efi_helloworld_end:';   \
-   echo '.global __efi_helloworld_end';\
-   echo '.balign 16';  \
+cmd_S_efi= \
+(  \
+   echo '.section .rodata.$*.init,"a"';\
+   echo '.balign 16';  \
+   echo '.global __efi_$*_begin';  \
+   echo '__efi_$*_begin:'; \
+   echo '.incbin "$<" ';   \
+   echo '__efi_$*_end:';   \
+   echo '.global __efi_$*_end';\
+   echo '.balign 16';  \
 ) > $@
 
 $(obj)/%_efi.S: $(obj)/%.efi
@@ -366,7 +368,7 @@ cmd_efi_objcopy = $(OBJCOPY) -j .header -j .text -j .sdata 
-j .data -j \
.dynamic -j .dynsym  -j .rel* -j .rela* -j .reloc \
$(if $(EFI_TARGET),$(EFI_TARGET),-O binary) $^ $@
 
-$(obj)/%.efi: $(obj)/%.so
+$(obj)/%.efi: $(obj)/%_efi.so
$(call cmd,efi_objcopy)
 
 quiet_cmd_efi_ld = LD  $@
@@ -375,7 +377,7 @@ cmd_efi_ld = $(LD) -nostdlib -znocombreloc -T 
$(EFI_LDS_PATH) -shared \
 
 EFI_LDS_PATH = $(srctree)/arch/$(ARCH)/lib/$(EFI_LDS)
 
-$(obj)/helloworld.so: $(obj)/helloworld.o arch/$(ARCH)/lib/$(EFI_CRT0) \
+$(obj)/%_efi.so: $(obj)/%.o $(%_deps) arch/$(ARCH)/lib/$(EFI_CRT0) \
arch/$(ARCH)/lib/$(EFI_RELOC)
$(call cmd,efi_ld)
 
-- 
2.11.0

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[U-Boot] [PATCH 0/3] Clean up make process for EFI payload

[Heinrich Schuchardt]

Currently we have a single EFI application that we can deliver
integrated into U-Boot. It is a hello world application that
can be called with 'bootefi hello'.

The Makefiles do not easily accomodate further EFI payloads
like a unit test for the EFI API or an EFI shell.

This patch series changes Makefile.lib to allow additional
EFI payloads. Required fixes to the helloworld app are
provided.

Further work will be needed to accomodate EFI payloads built
out of multiple source files.

Heinrich Schuchardt (3):
  efi_loader: rename __efi_hello_world_*
  scripts/Makefile.lib: generalize building built in EFI app
  efi_loader: usage of always in Makefile

 cmd/bootefi.c  |  4 ++--
 include/asm-generic/sections.h |  4 ++--
 lib/efi_loader/Makefile|  5 +++--
 scripts/Makefile.lib   | 28 +++-
 4 files changed, 22 insertions(+), 19 deletions(-)

-- 
2.11.0

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[U-Boot] [PATCH] doc: remove duplicate text in README.gpt

[alison]

From: Alison Chaiken 

Signed-off-by: Alison Chaiken 
---
 doc/README.gpt | 10 --
 1 file changed, 10 deletions(-)

diff --git a/doc/README.gpt b/doc/README.gpt
index 517df551e7..d3db8bce1c 100644
--- a/doc/README.gpt
+++ b/doc/README.gpt
@@ -233,16 +233,6 @@ The GPT functionality may be tested with the 'sandbox' 
board by
 creating a disk image as described under 'Block Device Emulation' in
 board/sandbox/README.sandbox:
 
-=>host bind 0 ./disk.raw
-=> gpt read host 0
-[ . . . ]
-=> gpt flip host 0
-[ . . . ]
-
-The GPT functionality may be tested with the 'sandbox' board by
-creating a disk image as described under 'Block Device Emulation' in
-board/sandbox/README.sandbox:
-
 =>host bind 0 ./disk.raw
 => gpt read host 0
 [ . . . ]
-- 
2.14.1

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[U-Boot] [Bug] Installation of sources fails on case insensitive filesystems

[Stefan Weil]

This problem was initially reported for QEMU
(which includes the U-Boot sources):

https://bugs.launchpad.net/qemu/+bug/1714750

It is caused by scripts/Kconfig and scripts/kconfig
which occupy the same name on filesystems which don't
distinguish the case.

Maybe this can be fixed in the planned next release
of U-Boot?

Kind regards,
Stefan Weil
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[U-Boot] Bad URL for mailing list info in "Contacts" web page

[Stefan Weil]

Hi,

Could somebody please fix the listinfo URL on
http://www.denx.de/wiki/U-Boot/Contacts
?

https://lists.denx.de/mailman/listinfo/u-boot does not work.
https://lists.denx.de/listinfo/u-boot works.

I don't know which state should be the correct one.

Thanks,
Stefan Weil

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Re: [U-Boot] [PATCH v5 4/9] armv8: Add workaround for USB erratum A-008997

[Michael Lawnick]

Am 04.09.2017 um 12:46 schrieb Ran Wang:
...

  arch/arm/cpu/armv8/fsl-layerscape/Kconfig  |  6 ++
  arch/arm/cpu/armv8/fsl-layerscape/soc.c| 24 ++

...

Maybe I'm a bit pedentatic, but this doesn't sound for ARMv8 but for 
fsl-layerscape patch ...


--
KR
Michael

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[U-Boot] [PATCH 1/1] sunxi: Add support for A20-OLinuXino-MICRO-eMMC

[Stefan Mavrodiev]

From rev.J A20-OLinuXino-MICRO has eMMC option. For now this is
only 4GB, but in the future size may increase.

The dts file is the same from mainline kernel.

Signed-off-by: Stefan Mavrodiev 
---
 arch/arm/dts/Makefile   |  1 +
 arch/arm/dts/sun7i-a20-olinuxino-micro-emmc.dts | 70 +
 board/sunxi/MAINTAINERS |  5 ++
 configs/A20-OLinuXino_MICRO-eMMC_defconfig  | 28 ++
 4 files changed, 104 insertions(+)
 create mode 100644 arch/arm/dts/sun7i-a20-olinuxino-micro-emmc.dts
 create mode 100644 configs/A20-OLinuXino_MICRO-eMMC_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 762429c..a6f2cba 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -282,6 +282,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-olinuxino-lime2.dtb \
sun7i-a20-olinuxino-lime2-emmc.dtb \
sun7i-a20-olinuxino-micro.dtb \
+   sun7i-a20-olinuxino-micro-emmc.dtb \
sun7i-a20-orangepi.dtb \
sun7i-a20-orangepi-mini.dtb \
sun7i-a20-pcduino3.dtb \
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-micro-emmc.dts 
b/arch/arm/dts/sun7i-a20-olinuxino-micro-emmc.dts
new file mode 100644
index 000..d99e7b1
--- /dev/null
+++ b/arch/arm/dts/sun7i-a20-olinuxino-micro-emmc.dts
@@ -0,0 +1,70 @@
+ /*
+ * Copyright 2017 Olimex Ltd.
+ * Stefan Mavrodiev 
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "sun7i-a20-olinuxino-micro.dts"
+
+/ {
+   model = "Olimex A20-OLinuXino-MICRO-eMMC";
+   compatible = "olimex,a20-olinuxino-micro-emmc", "allwinner,sun7i-a20";
+
+   mmc2_pwrseq: pwrseq {
+   compatible = "mmc-pwrseq-emmc";
+   reset-gpios = < 2 16 GPIO_ACTIVE_LOW>;
+   };
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+   vmmc-supply = <_vcc3v3>;
+   bus-width = <4>;
+   non-removable;
+   mmc-pwrseq = <_pwrseq>;
+   status = "okay";
+
+   emmc: emmc@0 {
+   reg = <0>;
+   compatible = "mmc-card";
+   broken-hpi;
+   };
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index ff6eea2..eddf38f 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -83,6 +83,11 @@ M:   FUKAUMI Naoki 
 S: Maintained
 F: configs/A20-OLinuXino-Lime_defconfig
 
+A20-OLINUXINO-MICRO-EMMC BOARD
+M: Stefan Mavrodiev 
+S: Maintained
+F: configs/A20-OLinuXino_MICRO-eMMC_defconfig
+
 A20-OLINUXINO-LIME2 BOARD
 M: Iain Paton 
 S: Maintained
diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig 
b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
new file mode 100644
index 000..cfcb770
--- /dev/null
+++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
@@ -0,0 +1,28 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN7I=y
+CONFIG_DRAM_CLK=384
+CONFIG_MMC0_CD_PIN="PH1"
+CONFIG_MMC3_CD_PIN="PH11"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_I2C1_ENABLE=y

[U-Boot] Please pull u-boot-sh/rmobile branch

[Nobuhiro Iwamatsu]

Hi Tom,

git request-pull f7f79b4493b8beeb1de099d1d1c86049b018ef5c
git://git.denx.de/u-boot-sh.git rmobile
The following changes since commit f7f79b4493b8beeb1de099d1d1c86049b018ef5c:

  ARM: rmobile: Enable MMC and USB DM on ULCB (2017-08-26 07:04:49 +0900)

are available in the git repository at:

  git://git.denx.de/u-boot-sh.git rmobile

for you to fetch changes up to 0d0915bef756cb708c84462b8b2ade2606370167:

  ARM: rmobile: Add missing IPSR18 bits to R8A7795 PFC (2017-09-05
07:51:39 +0900)


Marek Vasut (3):
  ARM: rmobile: Replace CONFIG_RAVB with CONFIG_RENESAS_RAVB in boards
  ARM: rmobile: Drop board_mmc_init
  ARM: rmobile: Add missing IPSR18 bits to R8A7795 PFC

 arch/arm/mach-rmobile/pfc-r8a7795.c   | 42
++
 board/renesas/salvator-x/salvator-x.c | 11 +++
 board/renesas/ulcb/ulcb.c | 11 +++
 3 files changed, 48 insertions(+), 16 deletions(-)

-- 
Nobuhiro Iwamatsu
   iwamatsu at {nigauri.org / debian.org}
   GPG ID: 40AD1FA6
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[U-Boot] [PATCH v2] video: ipuv3_fb: skip IPU shutdown if IPU was not enabled before

[Anatolij Gustschin]

Boards can skip display interface init using board_video_skip().
If display interface was not initialized (e.g. no ipuv3 framebuffer
registered or IPU clock disabled), booting Linux stops due to the
crash in IPU shutdown function, when accessing IPU registers.
Check IPU clock and skip shutdown if clock is not enabled.

Signed-off-by: Anatolij Gustschin 
---
Changes in v2:
- fixed build breakage when building mx5 targets

 drivers/video/ipu.h  | 1 +
 drivers/video/ipu_common.c   | 5 +
 drivers/video/mxc_ipuv3_fb.c | 3 +++
 3 files changed, 9 insertions(+)

diff --git a/drivers/video/ipu.h b/drivers/video/ipu.h
index 348be58..ff91d18 100644
--- a/drivers/video/ipu.h
+++ b/drivers/video/ipu.h
@@ -253,6 +253,7 @@ struct clk *clk_get_parent(struct clk *clk);
 
 void ipu_dump_registers(void);
 int ipu_probe(void);
+bool ipu_clk_enabled(void);
 
 void ipu_dmfc_init(int dmfc_type, int first);
 void ipu_init_dc_mappings(void);
diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c
index f8d4488..f259fb9 100644
--- a/drivers/video/ipu_common.c
+++ b/drivers/video/ipu_common.c
@@ -1243,3 +1243,8 @@ int ipu_set_ldb_clock(int rate)
 
return 0;
 }
+
+bool ipu_clk_enabled(void)
+{
+   return g_ipu_clk_enabled;
+}
diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c
index 0d0a0a9..1ab5cb7 100644
--- a/drivers/video/mxc_ipuv3_fb.c
+++ b/drivers/video/mxc_ipuv3_fb.c
@@ -571,6 +571,9 @@ void ipuv3_fb_shutdown(void)
int i;
struct ipu_stat *stat = (struct ipu_stat *)IPU_STAT;
 
+   if (!ipu_clk_enabled())
+   return;
+
for (i = 0; i < ARRAY_SIZE(mxcfb_info); i++) {
struct fb_info *fbi = mxcfb_info[i];
if (fbi) {
-- 
2.7.4

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[U-Boot] [PATCH v3 12/14] config: sandbox: Add unit tests

[Pantelis Antoniou]

Add unit tests for sandbox default config.

Signed-off-by: Pantelis Antoniou 
---
 configs/sandbox_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 4c4e480..54120c2 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -189,7 +189,9 @@ CONFIG_CMD_DHRYSTONE=y
 CONFIG_TPM=y
 CONFIG_LZ4=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_UNIT_TEST=y
 CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
 CONFIG_UT_ENV=y
+CONFIG_UT_OVERLAY=y
-- 
2.1.4

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[U-Boot] [PATCH v3 08/14] fit: fdt overlays doc

[Pantelis Antoniou]

Signed-off-by: Pantelis Antoniou 
---
 doc/uImage.FIT/command_syntax_extensions.txt |  12 +-
 doc/uImage.FIT/overlay-fdt-boot.txt  | 221 +++
 doc/uImage.FIT/source_file_format.txt|   6 +-
 3 files changed, 236 insertions(+), 3 deletions(-)
 create mode 100644 doc/uImage.FIT/overlay-fdt-boot.txt

diff --git a/doc/uImage.FIT/command_syntax_extensions.txt 
b/doc/uImage.FIT/command_syntax_extensions.txt
index 6c99b1c..676f992 100644
--- a/doc/uImage.FIT/command_syntax_extensions.txt
+++ b/doc/uImage.FIT/command_syntax_extensions.txt
@@ -36,7 +36,7 @@ Old uImage:
 New uImage:
 8.  bootm 
 9.  bootm []:
-10. bootm []#
+10. bootm []#[#;
+   entry = <0x8200>;
+   };
+   fdt@1 {
+   data = /incbin/("./foo-reva.dtb");
+   type = "flat_dt";
+   arch = "arm";
+   };
+   fdt@2 {
+   data = /incbin/("./foo-revb.dtb");
+   type = "flat_dt";
+   arch = "arm";
+   };
+   fdt@3 {
+   data = /incbin/("./foo-reva-bar.dtb");
+   type = "flat_dt";
+   arch = "arm";
+   };
+   fdt@4 {
+   data = /incbin/("./foo-revb-bar.dtb");
+   type = "flat_dt";
+   arch = "arm";
+   };
+   fdt@5 {
+   data = /incbin/("./foo-revb-baz.dtb");
+   type = "flat_dt";
+   arch = "arm";
+   };
+   fdt@6 {
+   data = /incbin/("./foo-revb-bar-baz.dtb");
+   type = "flat_dt";
+   arch = "arm";
+   };
+   };
+
+   configurations {
+   default = "foo-reva.dtb;
+   foo-reva.dtb {
+   kernel = "kernel@1";
+   fdt = "fdt@1";
+   };
+   foo-revb.dtb {
+   kernel = "kernel@1";
+   fdt = "fdt@2";
+   };
+   foo-reva-bar.dtb {
+   kernel = "kernel@1";
+   fdt = "fdt@3";
+   };
+   foo-revb-bar.dtb {
+   kernel = "kernel@1";
+

[U-Boot] [PATCH v3 14/14] test: overlay: Add unit test for stacked overlay

[Pantelis Antoniou]

Verify that stacked overlays work.

Signed-off-by: Pantelis Antoniou 
---
 test/overlay/Makefile |  1 +
 test/overlay/cmd_ut_overlay.c | 34 ++-
 test/overlay/test-fdt-overlay-stacked.dts | 21 +++
 3 files changed, 55 insertions(+), 1 deletion(-)
 create mode 100644 test/overlay/test-fdt-overlay-stacked.dts

diff --git a/test/overlay/Makefile b/test/overlay/Makefile
index 907f085..416645c 100644
--- a/test/overlay/Makefile
+++ b/test/overlay/Makefile
@@ -13,3 +13,4 @@ DTC_FLAGS += -@
 # DT overlays
 obj-y += test-fdt-base.dtb.o
 obj-y += test-fdt-overlay.dtb.o
+obj-y += test-fdt-overlay-stacked.dtb.o
diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c
index 7106f42..24891ee 100644
--- a/test/overlay/cmd_ut_overlay.c
+++ b/test/overlay/cmd_ut_overlay.c
@@ -20,6 +20,7 @@
 
 extern u32 __dtb_test_fdt_base_begin;
 extern u32 __dtb_test_fdt_overlay_begin;
+extern u32 __dtb_test_fdt_overlay_stacked_begin;
 
 static int ut_fdt_getprop_u32_by_index(void *fdt, const char *path,
const char *name, int index,
@@ -201,6 +202,19 @@ static int fdt_overlay_local_phandles(struct 
unit_test_state *uts)
 }
 OVERLAY_TEST(fdt_overlay_local_phandles, 0);
 
+static int fdt_overlay_stacked(struct unit_test_state *uts)
+{
+   void *fdt = uts->priv;
+   u32 val = 0;
+
+   ut_assertok(ut_fdt_getprop_u32(fdt, "/new-local-node",
+  "stacked-test-int-property", ));
+   ut_asserteq(43, val);
+
+   return CMD_RET_SUCCESS;
+}
+OVERLAY_TEST(fdt_overlay_stacked, 0);
+
 int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
struct unit_test *tests = ll_entry_start(struct unit_test,
@@ -210,7 +224,8 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
struct unit_test *test;
void *fdt_base = &__dtb_test_fdt_base_begin;
void *fdt_overlay = &__dtb_test_fdt_overlay_begin;
-   void *fdt_base_copy, *fdt_overlay_copy;
+   void *fdt_overlay_stacked = &__dtb_test_fdt_overlay_stacked_begin;
+   void *fdt_base_copy, *fdt_overlay_copy, *fdt_overlay_stacked_copy;
 
uts = calloc(1, sizeof(*uts));
if (!uts)
@@ -228,6 +243,10 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
if (!fdt_overlay_copy)
return -ENOMEM;
 
+   fdt_overlay_stacked_copy = malloc(FDT_COPY_SIZE);
+   if (!fdt_overlay_stacked_copy)
+   return -ENOMEM;
+
/*
 * Resize the FDT to 4k so that we have room to operate on
 *
@@ -245,9 +264,21 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
ut_assertok(fdt_open_into(fdt_overlay, fdt_overlay_copy,
  FDT_COPY_SIZE));
 
+   /*
+* Resize the stacked overlay to 4k so that we have room to operate on
+*
+* (and relocate it since the memory might be mapped
+* read-only)
+*/
+   ut_assertok(fdt_open_into(fdt_overlay_stacked, fdt_overlay_stacked_copy,
+ FDT_COPY_SIZE));
+
/* Apply the overlay */
ut_assertok(fdt_overlay_apply(fdt_base_copy, fdt_overlay_copy));
 
+   /* Apply the stacked overlay */
+   ut_assertok(fdt_overlay_apply(fdt_base_copy, fdt_overlay_stacked_copy));
+
if (argc == 1)
printf("Running %d environment tests\n", n_ents);
 
@@ -263,6 +294,7 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
 
printf("Failures: %d\n", uts->fail_count);
 
+   free(fdt_overlay_stacked_copy);
free(fdt_overlay_copy);
free(fdt_base_copy);
free(uts);
diff --git a/test/overlay/test-fdt-overlay-stacked.dts 
b/test/overlay/test-fdt-overlay-stacked.dts
new file mode 100644
index 000..9fb7c7b
--- /dev/null
+++ b/test/overlay/test-fdt-overlay-stacked.dts
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2016 NextThing Co
+ * Copyright (c) 2016 Free Electrons
+ * Copyright (c) 2018 Konsulko Group
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+   /* Test that we can reference an overlay symbol */
+   fragment@0 {
+   target = <>;
+
+   __overlay__ {
+   stacked-test-int-property = <43>;
+   };
+   };
+};
-- 
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[U-Boot] [PATCH v3 03/14] fdt: Switch to using the verbose overlay application method

[Pantelis Antoniou]

The verbose overlay application method prints out more helpful
messages, so switch to it.

Signed-off-by: Pantelis Antoniou 
---
 cmd/fdt.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/cmd/fdt.c b/cmd/fdt.c
index 118613f..362a621 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -669,11 +669,10 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
if (!fdt_valid())
return CMD_RET_FAILURE;
 
-   ret = fdt_overlay_apply(working_fdt, blob);
-   if (ret) {
-   printf("fdt_overlay_apply(): %s\n", fdt_strerror(ret));
+   /* apply method prints messages on error */
+   ret = fdt_overlay_apply_verbose(working_fdt, blob);
+   if (ret)
return CMD_RET_FAILURE;
-   }
}
 #endif
/* resize the fdt */
-- 
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[U-Boot] [PATCH v3 11/14] dtbo: make dtbos special

[Pantelis Antoniou]

Special rule for dtbo generation

Signed-off-by: Pantelis Antoniou 
---
 scripts/Makefile.lib | 17 +
 1 file changed, 17 insertions(+)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 9ce47b4..2a7ed70 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -321,6 +321,23 @@ $(obj)/%.dtb: $(src)/%.dts FORCE
 
 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
 
+# DTCO
+# ---
+
+quiet_cmd_dtco = DTCO$@
+# Rule for objects only; does not put specific u-boot include at the end
+# No generation of assembly file either
+# Modified for U-Boot
+cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
+   $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ; \
+   $(DTC) -@ -O dtb -o $@ -b 0 \
+   -i $(dir $<) $(DTC_FLAGS) \
+   -d $(depfile).dtc.tmp $(dtc-tmp) ; \
+   cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
+
+$(obj)/%.dtbo: $(src)/%.dts FORCE
+   $(call if_changed_dep,dtco)
+
 # Fonts
 # ---
 
-- 
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[U-Boot] [PATCH v3 04/14] fdt: Allow stacked overlays phandle references

[Pantelis Antoniou]

This patch enables an overlay to refer to a previous overlay's
labels by performing a merge of symbol information at application
time.

In a nutshell it allows an overlay to refer to a symbol that a previous
overlay has defined. It requires both the base and all the overlays
to be compiled with the -@ command line switch so that symbol
information is included.

base.dts


/dts-v1/;
/ {
foo: foonode {
foo-property;
};
};

$ dtc -@ -I dts -O dtb -o base.dtb base.dts

bar.dts
---

/dts-v1/;
/plugin/;
/ {
fragment@1 {
target = <>;
__overlay__ {
overlay-1-property;
bar: barnode {
bar-property;
};
};
};
};

$ dtc -@ -I dts -O dtb -o bar.dtb bar.dts

baz.dts
---

/dts-v1/;
/plugin/;
/ {
fragment@1 {
target = <>;
__overlay__ {
overlay-2-property;
baz: baznode {
baz-property;
};
};
};
};

$ dtc -@ -I dts -O dtb -o baz.dtb baz.dts

Applying the overlays:

$ fdtoverlay -i base.dtb -o target.dtb bar.dtb baz.dtb

Dumping:

$ fdtdump target.dtb
/ {
foonode {
overlay-1-property;
foo-property;
linux,phandle = <0x0001>;
phandle = <0x0001>;
barnode {
overlay-2-property;
phandle = <0x0002>;
linux,phandle = <0x0002>;
bar-property;
baznode {
phandle = <0x0003>;
linux,phandle = <0x0003>;
baz-property;
};
};
};
__symbols__ {
baz = "/foonode/barnode/baznode";
bar = "/foonode/barnode";
foo = "/foonode";
};
};

Signed-off-by: Pantelis Antoniou 
Signed-off-by: David Gibson 
---
 lib/libfdt/fdt_overlay.c | 228 ++-
 1 file changed, 206 insertions(+), 22 deletions(-)

diff --git a/lib/libfdt/fdt_overlay.c b/lib/libfdt/fdt_overlay.c
index ceb9687..bd81241 100644
--- a/lib/libfdt/fdt_overlay.c
+++ b/lib/libfdt/fdt_overlay.c
@@ -39,6 +39,7 @@ static uint32_t overlay_get_target_phandle(const void *fdto, 
int fragment)
  * @fdt: Base device tree blob
  * @fdto: Device tree overlay blob
  * @fragment: node offset of the fragment in the overlay
+ * @pathp: pointer which receives the path of the target (or NULL)
  *
  * overlay_get_target() retrieves the target offset in the base
  * device tree of a fragment, no matter how the actual targetting is
@@ -49,37 +50,47 @@ static uint32_t overlay_get_target_phandle(const void 
*fdto, int fragment)
  *  Negative error code on error
  */
 static int overlay_get_target(const void *fdt, const void *fdto,
- int fragment)
+ int fragment, char const **pathp)
 {
uint32_t phandle;
-   const char *path;
-   int path_len;
+   const char *path = NULL;
+   int path_len = 0, ret;
 
/* Try first to do a phandle based lookup */
phandle = overlay_get_target_phandle(fdto, fragment);
if (phandle == (uint32_t)-1)
return -FDT_ERR_BADPHANDLE;
 
-   if (phandle)
-   return fdt_node_offset_by_phandle(fdt, phandle);
+   /* no phandle, try path */
+   if (!phandle) {
+   /* And then a path based lookup */
+   path = fdt_getprop(fdto, fragment, "target-path", _len);
+   if (path)
+   ret = fdt_path_offset(fdt, path);
+   else
+   ret = path_len;
+   } else
+   ret = fdt_node_offset_by_phandle(fdt, phandle);
 
-   /* And then a path based lookup */
-   path = fdt_getprop(fdto, fragment, "target-path", _len);
-   if (!path) {
-   /*
-* If we haven't found either a target or a
-* target-path property in a node that contains a
-* __overlay__ subnode (we wouldn't be called
-* otherwise), consider it a improperly written
-* overlay
-*/
-   if (path_len == -FDT_ERR_NOTFOUND)
-   return -FDT_ERR_BADOVERLAY;
+   /*
+   * If we haven't found 

[U-Boot] [PATCH v3 09/14] doc: Document how to apply fdt overlays

[Pantelis Antoniou]

We have the capability to apply overlays on the command line but
we didn't have a document explaining how.

Signed-off-by: Pantelis Antoniou 
---
 doc/README.fdt-overlays | 37 +
 1 file changed, 37 insertions(+)
 create mode 100644 doc/README.fdt-overlays

diff --git a/doc/README.fdt-overlays b/doc/README.fdt-overlays
new file mode 100644
index 000..ee868ec
--- /dev/null
+++ b/doc/README.fdt-overlays
@@ -0,0 +1,37 @@
+U-Boot FDT Overlay usage (without FIT images)
+=
+
+FDT overlays are now available for use even without FIT images.
+It is not as automagic as with FIT images though and require a few
+manual steps.
+
+1. Figure out where to place both the base device tree blob and the
+overlay. Make sure you have enough space to grow the base tree without
+overlapping anything.
+
+=> setenv fdtaddr 0x87f0
+=> setenv fdtovaddr 0x87fc
+
+2. Load the base blob and overlay blobs
+
+=> load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/base.dtb
+=> load ${devtype} ${bootpart} ${fdtovaddr} ${bootdir}/overlay.dtb
+
+3. Set it as the working fdt tree.
+
+=> fdtaddr $fdtaddr
+
+4. Grow it enough so it can 'fit' all the applied overlays
+
+=> fdt resize 8192
+
+5. You are now ready to apply the overlay.
+
+=> fdt apply $fdtovaddr
+
+Please note that in case of an error, both the base and overlays are going
+to be invalidated, so keep copies to avoid reloading.
+
+Pantelis Antoniou
+pantelis.anton...@konsulko.com
+11/7/2017
-- 
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[U-Boot] [PATCH v3 13/14] ut: fix fdt_getprop_u32() change

[Pantelis Antoniou]

fdt_getprop_u32 is not exported and it's different than what the
unit test uses. Rename u32 prop access methods to something that's
unit test specific.

Signed-off-by: Pantelis Antoniou 
---
 test/overlay/cmd_ut_overlay.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c
index cbef720..7106f42 100644
--- a/test/overlay/cmd_ut_overlay.c
+++ b/test/overlay/cmd_ut_overlay.c
@@ -21,7 +21,7 @@
 extern u32 __dtb_test_fdt_base_begin;
 extern u32 __dtb_test_fdt_overlay_begin;
 
-static int fdt_getprop_u32_by_index(void *fdt, const char *path,
+static int ut_fdt_getprop_u32_by_index(void *fdt, const char *path,
const char *name, int index,
u32 *out)
 {
@@ -42,10 +42,10 @@ static int fdt_getprop_u32_by_index(void *fdt, const char 
*path,
return 0;
 }
 
-static int fdt_getprop_u32(void *fdt, const char *path, const char *name,
+static int ut_fdt_getprop_u32(void *fdt, const char *path, const char *name,
   u32 *out)
 {
-   return fdt_getprop_u32_by_index(fdt, path, name, 0, out);
+   return ut_fdt_getprop_u32_by_index(fdt, path, name, 0, out);
 }
 
 static int fdt_getprop_str(void *fdt, const char *path, const char *name,
@@ -68,7 +68,7 @@ static int fdt_overlay_change_int_property(struct 
unit_test_state *uts)
void *fdt = uts->priv;
u32 val = 0;
 
-   ut_assertok(fdt_getprop_u32(fdt, "/test-node", "test-int-property",
+   ut_assertok(ut_fdt_getprop_u32(fdt, "/test-node", "test-int-property",
));
ut_asserteq(43, val);
 
@@ -158,11 +158,11 @@ static int fdt_overlay_local_phandle(struct 
unit_test_state *uts)
local_phandle = fdt_get_phandle(fdt, off);
ut_assert(local_phandle);
 
-   ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle",
+   ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", 
"test-several-phandle",
 0, ));
ut_asserteq(local_phandle, val);
 
-   ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle",
+   ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", 
"test-several-phandle",
 1, ));
ut_asserteq(local_phandle, val);
 
@@ -189,11 +189,11 @@ static int fdt_overlay_local_phandles(struct 
unit_test_state *uts)
test_phandle = fdt_get_phandle(fdt, off);
ut_assert(test_phandle);
 
-   ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 0,
+   ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 0,
 ));
ut_asserteq(test_phandle, val);
 
-   ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 1,
+   ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 1,
 ));
ut_asserteq(local_phandle, val);
 
-- 
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[U-Boot] [PATCH v3 05/14] fit: Allow multiple images per property

[Pantelis Antoniou]

As part of the fdt overlay support which need it, allow
a list of configurations per property.

Signed-off-by: Pantelis Antoniou 
---
 common/image-fit.c | 18 +++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/common/image-fit.c b/common/image-fit.c
index 109ecfa..74e5557 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1484,20 +1484,32 @@ int fit_conf_get_node(const void *fit, const char 
*conf_uname)
return noffset;
 }
 
-int fit_conf_get_prop_node(const void *fit, int noffset,
+int fit_conf_get_prop_node_count(const void *fit, int noffset,
const char *prop_name)
 {
-   char *uname;
+   return fdt_stringlist_count(fit, noffset, prop_name);
+}
+
+int fit_conf_get_prop_node_index(const void *fit, int noffset,
+   const char *prop_name, int index)
+{
+   const char *uname;
int len;
 
/* get kernel image unit name from configuration kernel property */
-   uname = (char *)fdt_getprop(fit, noffset, prop_name, );
+   uname = fdt_stringlist_get(fit, noffset, prop_name, index, );
if (uname == NULL)
return len;
 
return fit_image_get_node(fit, uname);
 }
 
+int fit_conf_get_prop_node(const void *fit, int noffset,
+   const char *prop_name)
+{
+   return fit_conf_get_prop_node_index(fit, noffset, prop_name, 0);
+}
+
 /**
  * fit_conf_print - prints out the FIT configuration details
  * @fit: pointer to the FIT format image header
-- 
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[U-Boot] [PATCH v3 07/14] fit: Introduce methods for applying overlays on fit-load

[Pantelis Antoniou]

Introduce an overlay based method for constructing a base DT blob
to pass to the kernel.

It is based on a specific method now to get the FDT from a FIT image
named boot_get_fdt_fit().

Signed-off-by: Pantelis Antoniou 
---
 common/image-fdt.c |   7 +--
 common/image-fit.c | 181 +++--
 include/image.h|  25 
 3 files changed, 205 insertions(+), 8 deletions(-)

diff --git a/common/image-fdt.c b/common/image-fdt.c
index da4d007..a2ef409 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -356,17 +356,16 @@ int boot_get_fdt(int flag, int argc, char * const argv[], 
uint8_t arch,
if (fit_check_format(buf)) {
ulong load, len;
 
-   fdt_noffset = fit_image_load(images,
+   fdt_noffset = boot_get_fdt_fit(images,
fdt_addr, _uname_fdt,
_uname_config,
-   arch, IH_TYPE_FLATDT,
-   BOOTSTAGE_ID_FIT_FDT_START,
-   FIT_LOAD_OPTIONAL, , );
+   arch, , );
 
images->fit_hdr_fdt = map_sysmem(fdt_addr, 0);
images->fit_uname_fdt = fit_uname_fdt;
images->fit_noffset_fdt = fdt_noffset;
fdt_addr = load;
+
break;
} else
 #endif
diff --git a/common/image-fit.c b/common/image-fit.c
index e75cb64..7f17fd1 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #include 
+#include 
 DECLARE_GLOBAL_DATA_PTR;
 #endif /* !USE_HOSTCC*/
 
@@ -434,6 +435,10 @@ void fit_image_print(const void *fit, int image_noffset, 
const char *p)
printf("0x%08lx\n", load);
}
 
+   /* optional load address for FDT */
+   if (type == IH_TYPE_FLATDT && !fit_image_get_load(fit, image_noffset, 
))
+   printf("%s  Load Address: 0x%08lx\n", p, load);
+
if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_STANDALONE) ||
(type == IH_TYPE_RAMDISK)) {
ret = fit_image_get_entry(fit, image_noffset, );
@@ -1454,6 +1459,8 @@ int fit_conf_get_node(const void *fit, const char 
*conf_uname)
 {
int noffset, confs_noffset;
int len;
+   const char *s;
+   char *conf_uname_copy = NULL;
 
confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH);
if (confs_noffset < 0) {
@@ -1475,12 +1482,29 @@ int fit_conf_get_node(const void *fit, const char 
*conf_uname)
debug("Found default configuration: '%s'\n", conf_uname);
}
 
+   s = strchr(conf_uname, '#');
+   if (s) {
+   len = s - conf_uname;
+   conf_uname_copy = malloc(len + 1);
+   if (!conf_uname_copy) {
+   debug("Can't allocate uname copy: '%s'\n",
+   conf_uname);
+   return -ENOMEM;
+   }
+   memcpy(conf_uname_copy, conf_uname, len);
+   conf_uname_copy[len] = '\0';
+   conf_uname = conf_uname_copy;
+   }
+
noffset = fdt_subnode_offset(fit, confs_noffset, conf_uname);
if (noffset < 0) {
debug("Can't get node offset for configuration unit name: '%s' 
(%s)\n",
  conf_uname, fdt_strerror(noffset));
}
 
+   if (conf_uname_copy)
+   free(conf_uname_copy);
+
return noffset;
 }
 
@@ -1527,7 +1551,7 @@ void fit_conf_print(const void *fit, int noffset, const 
char *p)
char *desc;
const char *uname;
int ret;
-   int loadables_index;
+   int fdt_index, loadables_index;
 
/* Mandatory properties */
ret = fit_get_desc(fit, noffset, );
@@ -1549,9 +1573,17 @@ void fit_conf_print(const void *fit, int noffset, const 
char *p)
if (uname)
printf("%s  Init Ramdisk: %s\n", p, uname);
 
-   uname = fdt_getprop(fit, noffset, FIT_FDT_PROP, NULL);
-   if (uname)
-   printf("%s  FDT:  %s\n", p, uname);
+   for (fdt_index = 0;
+uname = fdt_stringlist_get(fit, noffset, FIT_FDT_PROP,
+   fdt_index, NULL), uname;
+fdt_index++) {
+
+   if (fdt_index == 0)
+   printf("%s  FDT:  ", p);
+   else
+   printf("%s", p);
+   printf("%s\n", uname);
+   }
 
uname = fdt_getprop(fit, noffset, FIT_FPGA_PROP, NULL);
if (uname)
@@ -1888,3 +1920,144 @@ int boot_get_setup_fit(bootm_headers_t *images, uint8_t 
arch,
 
return ret;
 }
+
+#ifndef 

[U-Boot] [PATCH v3 10/14] doc: overlays: Tweak documentation regarding overlays

[Pantelis Antoniou]

From: Franklin S Cooper Jr 

Pull some information regarding overlays from commit messages and
put them directly within the documentation. Also add some information
regarding required dtc version to properly use overlays.

Signed-off-by: Franklin S Cooper Jr 
---
 doc/README.fdt-overlays | 85 +++--
 doc/uImage.FIT/overlay-fdt-boot.txt |  8 +++-
 2 files changed, 87 insertions(+), 6 deletions(-)

diff --git a/doc/README.fdt-overlays b/doc/README.fdt-overlays
index ee868ec..39139cb 100644
--- a/doc/README.fdt-overlays
+++ b/doc/README.fdt-overlays
@@ -1,9 +1,76 @@
-U-Boot FDT Overlay usage (without FIT images)
+U-Boot FDT Overlay usage
 =
 
-FDT overlays are now available for use even without FIT images.
-It is not as automagic as with FIT images though and require a few
-manual steps.
+Overlays Syntax
+---
+
+Overlays require slightly different syntax compared to traditional overlays.
+Please refer to dt-object-internal.txt in the dtc sources for information
+regarding the internal format of overlays:
+https://git.kernel.org/pub/scm/utils/dtc/dtc.git/tree/Documentation/dt-object-internal.txt
+
+Building Overlays
+-
+
+In a nutshell overlays provides a means to manipulate a symbol a previous dtb
+or overlay has defined. It requires both the base and all the overlays
+to be compiled with the -@ command line switch so that symbol information is
+included.
+
+Note support for -@ option can only be found in dtc version 1.4.4 or newer.
+Only version 4.14 or higher of the Linux kernel includes a built in version
+of dtc that meets this requirement.
+
+Building an overlay follows the same process as building a traditional dtb.
+
+For example:
+
+base.dts
+
+
+   /dts-v1/;
+   / {
+   foo: foonode {
+   foo-property;
+   };
+   };
+
+   $ dtc -@ -I dts -O dtb -o base.dtb base.dts
+
+bar.dts
+---
+
+   /dts-v1/;
+   /plugin/;
+   / {
+   fragment@1 {
+   target = <>;
+   __overlay__ {
+   overlay-1-property;
+   bar: barnode {
+   bar-property;
+   };
+   };
+   };
+   };
+
+   $ dtc -@ -I dts -O dtb -o bar.dtb bar.dts
+
+Ways to Utilize Overlays in U-boot
+--
+
+There are two ways to apply overlays in U-boot.
+1. Include and define overlays within a FIT image and have overlays
+   automatically applied.
+
+2. Manually load and apply overlays
+
+The remainder of this document will discuss using overlays via the manual
+approach. For information on using overlays as part of a FIT image please see:
+doc/uImage.FIT/overlay-fdt-boot.txt
+
+Manually Loading and Applying Overlays
+--
 
 1. Figure out where to place both the base device tree blob and the
 overlay. Make sure you have enough space to grow the base tree without
@@ -29,6 +96,16 @@ overlapping anything.
 
 => fdt apply $fdtovaddr
 
+6. Boot system like you would do with a traditional dtb.
+
+For bootm:
+
+=> bootm ${kerneladdr} - ${fdtaddr}
+
+For bootz:
+
+=> bootz ${kerneladdr} - ${fdtaddr}
+
 Please note that in case of an error, both the base and overlays are going
 to be invalidated, so keep copies to avoid reloading.
 
diff --git a/doc/uImage.FIT/overlay-fdt-boot.txt 
b/doc/uImage.FIT/overlay-fdt-boot.txt
index dbdf2a1..63e47da 100644
--- a/doc/uImage.FIT/overlay-fdt-boot.txt
+++ b/doc/uImage.FIT/overlay-fdt-boot.txt
@@ -1,5 +1,5 @@
-U-Boot FDT Overlay usage
-
+U-Boot FDT Overlay FIT usage
+
 
 Introduction
 
@@ -8,6 +8,10 @@ of similar boards and their expansion options. The same kernel 
on DT enabled
 platforms can support this easily enough by providing a DT blob upon boot
 that matches the desired configuration.
 
+This document focuses on specifically using overlays as part of a FIT image.
+General information regarding overlays including its syntax and building it
+can be found in doc/README.fdt-overlays
+
 Configuration without overlays
 --
 
-- 
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[U-Boot] [PATCH v3 01/14] Introduce fdt_setprop_placeholder() method

[Pantelis Antoniou]

In some cases you need to add a property but the contents of it
are not known at creation time, merely the extend of it.

This method allows you to create a property of a given size (filled
with garbage) while a pointer to the property data will be provided.

Signed-off-by: Pantelis Antoniou 
[dwg: Corrected commit message]
Signed-off-by: David Gibson 
---
 lib/libfdt/fdt_rw.c | 20 +---
 lib/libfdt/libfdt.h | 31 +++
 2 files changed, 48 insertions(+), 3 deletions(-)

diff --git a/lib/libfdt/fdt_rw.c b/lib/libfdt/fdt_rw.c
index 80a3212..3dc7752 100644
--- a/lib/libfdt/fdt_rw.c
+++ b/lib/libfdt/fdt_rw.c
@@ -228,8 +228,8 @@ int fdt_set_name(void *fdt, int nodeoffset, const char 
*name)
return 0;
 }
 
-int fdt_setprop(void *fdt, int nodeoffset, const char *name,
-   const void *val, int len)
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+   int len, void **prop_data)
 {
struct fdt_property *prop;
int err;
@@ -242,8 +242,22 @@ int fdt_setprop(void *fdt, int nodeoffset, const char 
*name,
if (err)
return err;
 
+   *prop_data = prop->data;
+   return 0;
+}
+
+int fdt_setprop(void *fdt, int nodeoffset, const char *name,
+   const void *val, int len)
+{
+   void *prop_data;
+   int err;
+
+   err = fdt_setprop_placeholder(fdt, nodeoffset, name, len, _data);
+   if (err)
+   return err;
+
if (len)
-   memcpy(prop->data, val, len);
+   memcpy(prop_data, val, len);
return 0;
 }
 
diff --git a/lib/libfdt/libfdt.h b/lib/libfdt/libfdt.h
index f3f9cad..6af94cb 100644
--- a/lib/libfdt/libfdt.h
+++ b/lib/libfdt/libfdt.h
@@ -1405,6 +1405,37 @@ int fdt_setprop(void *fdt, int nodeoffset, const char 
*name,
const void *val, int len);
 
 /**
+ * fdt_setprop _placeholder - allocate space for a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @len: length of the property value
+ * @prop_data: return pointer to property data
+ *
+ * fdt_setprop_placeholer() allocates the named property in the given node.
+ * If the property exists it is resized. In either case a pointer to the
+ * property data is returned.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ * 0, on success
+ * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ * contain the new property value
+ * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_BADMAGIC,
+ * -FDT_ERR_BADVERSION,
+ * -FDT_ERR_BADSTATE,
+ * -FDT_ERR_BADSTRUCTURE,
+ * -FDT_ERR_BADLAYOUT,
+ * -FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+   int len, void **prop_data);
+
+/**
  * fdt_setprop_u32 - set a property to a 32-bit integer
  * @fdt: pointer to the device tree blob
  * @nodeoffset: offset of the node whose property to change
-- 
2.1.4

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[U-Boot] [PATCH v3 06/14] fit: Do not throw away extra configuration on fit_image_load()

[Pantelis Antoniou]

fit_image_load() threw away the extra configuration parts when
loading. We need them around for applying extra overlays for
building the boot fdt.

Signed-off-by: Pantelis Antoniou 
---
 common/image-fit.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/common/image-fit.c b/common/image-fit.c
index 74e5557..e75cb64 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1653,6 +1653,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
int cfg_noffset, noffset;
const char *fit_uname;
const char *fit_uname_config;
+   const char *fit_base_uname_config;
const void *fit;
const void *buf;
size_t size;
@@ -1668,6 +1669,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
fit = map_sysmem(addr, 0);
fit_uname = fit_unamep ? *fit_unamep : NULL;
fit_uname_config = fit_uname_configp ? *fit_uname_configp : NULL;
+   fit_base_uname_config = NULL;
prop_name = fit_get_image_type_property(image_type);
printf("## Loading %s from FIT Image at %08lx ...\n", prop_name, addr);
 
@@ -1701,11 +1703,11 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
BOOTSTAGE_SUB_NO_UNIT_NAME);
return -ENOENT;
}
-   fit_uname_config = fdt_get_name(fit, cfg_noffset, NULL);
-   printf("   Using '%s' configuration\n", fit_uname_config);
+   fit_base_uname_config = fdt_get_name(fit, cfg_noffset, NULL);
+   printf("   Using '%s' configuration\n", fit_base_uname_config);
if (image_type == IH_TYPE_KERNEL) {
/* Remember (and possibly verify) this config */
-   images->fit_uname_cfg = fit_uname_config;
+   images->fit_uname_cfg = fit_base_uname_config;
if (IMAGE_ENABLE_VERIFY && images->verify) {
puts("   Verifying Hash Integrity ... ");
if (fit_config_verify(fit, cfg_noffset)) {
@@ -1861,7 +1863,8 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
if (fit_unamep)
*fit_unamep = (char *)fit_uname;
if (fit_uname_configp)
-   *fit_uname_configp = (char *)fit_uname_config;
+   *fit_uname_configp = (char *)(fit_uname_config ? :
+ fit_base_uname_config);
 
return noffset;
 }
-- 
2.1.4

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[U-Boot] [PATCH v3 00/14] uboot overlays, FIT image & unittest

[Pantelis Antoniou]

This patchset allows uboot to handle overlays in a manner that uses
a base DT blob and an arbitrary number of DT overlays blobs.

While it is intended to be used with FIT images since handling a multitude
of device tree blobs manually is a chore, manual fdt overlay application
is supported and described.

Changes since v2:
* Addressed review comments by splitting patches and documenting methods.
* Patch preserving extra configuration on fit-load

The patchset is available at

https://github.com/pantoniou/u-boot/tree/uboot-overlays

and is against mainline u-boot as pulled today, 4/9/2017.

Franklin S Cooper Jr (1):
  doc: overlays: Tweak documentation regarding overlays

Pantelis Antoniou (13):
  Introduce fdt_setprop_placeholder() method
  fdt: Introduce helper method fdt_overlay_apply_verbose()
  fdt: Switch to using the verbose overlay application method
  fdt: Allow stacked overlays phandle references
  fit: Allow multiple images per property
  fit: Do not throw away extra configuration on fit_image_load()
  fit: Introduce methods for applying overlays on fit-load
  fit: fdt overlays doc
  doc: Document how to apply fdt overlays
  dtbo: make dtbos special
  config: sandbox: Add unit tests
  ut: fix fdt_getprop_u32() change
  test: overlay: Add unit test for stacked overlay

 cmd/fdt.c|   7 +-
 common/fdt_support.c |  31 
 common/image-fdt.c   |   7 +-
 common/image-fit.c   | 210 ++--
 configs/sandbox_defconfig|   2 +
 doc/README.fdt-overlays  | 114 ++
 doc/uImage.FIT/command_syntax_extensions.txt |  12 +-
 doc/uImage.FIT/overlay-fdt-boot.txt  | 225 ++
 doc/uImage.FIT/source_file_format.txt|   6 +-
 include/fdt_support.h|   2 +
 include/image.h  |  25 +++
 lib/libfdt/fdt_overlay.c | 228 ---
 lib/libfdt/fdt_rw.c  |  20 ++-
 lib/libfdt/libfdt.h  |  31 
 scripts/Makefile.lib |  17 ++
 test/overlay/Makefile|   1 +
 test/overlay/cmd_ut_overlay.c|  50 --
 test/overlay/test-fdt-overlay-stacked.dts|  21 +++
 18 files changed, 953 insertions(+), 56 deletions(-)
 create mode 100644 doc/README.fdt-overlays
 create mode 100644 doc/uImage.FIT/overlay-fdt-boot.txt
 create mode 100644 test/overlay/test-fdt-overlay-stacked.dts

-- 
2.1.4

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[U-Boot] [PATCH v3 02/14] fdt: Introduce helper method fdt_overlay_apply_verbose()

[Pantelis Antoniou]

Introduce fdt_overlay_apply_verbose, a method that applies an
overlay but in the case of an error produces a helpful message.

In addition if a base tree is found to be missing the __symbols__
node the message will point out that the probable reason is that
the base tree was miscompiled without the -@ option.

Signed-off-by: Pantelis Antoniou 
---
 common/fdt_support.c  | 31 +++
 include/fdt_support.h |  2 ++
 2 files changed, 33 insertions(+)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 916a448..f4f9543 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -1655,3 +1655,34 @@ int fdt_fixup_display(void *blob, const char *path, 
const char *display)
}
return toff;
 }
+
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+/**
+ * fdt_overlay_apply_verbose - Apply an overlay with verbose error reporting
+ *
+ * @fdt: ptr to device tree
+ * @fdto: ptr to device tree overlay
+ *
+ * Convenience function to apply an overlay and display helpful messages
+ * in the case of an error
+ */
+int fdt_overlay_apply_verbose(void *fdt, void *fdto)
+{
+   int err;
+   bool has_symbols;
+
+   err = fdt_path_offset(fdt, "/__symbols__");
+   has_symbols = err >= 0;
+
+   err = fdt_overlay_apply(fdt, fdto);
+   if (err < 0) {
+   printf("failed on fdt_overlay_apply(): %s\n",
+   fdt_strerror(err));
+   if (!has_symbols) {
+   printf("base fdt does did not have a /__symbols__ 
node\n");
+   printf("make sure you've compiled with -@\n");
+   }
+   }
+   return err;
+}
+#endif
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 5ef78cc..2bca4d7 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -264,6 +264,8 @@ int arch_fixup_memory_node(void *blob);
 int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width,
u32 height, u32 stride, const char *format);
 
+int fdt_overlay_apply_verbose(void *fdt, void *fdto);
+
 #endif /* ifdef CONFIG_OF_LIBFDT */
 
 #ifdef USE_HOSTCC
-- 
2.1.4

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Re: [U-Boot] [ANN] U-Boot v2017.09-rc4 released

[Paul Barker]

On Mon, Sep 4, 2017 at 2:05 PM, Tom Rini  wrote:
> Hey all,
>
> It's release day and v2017.09-rc4 is out.  It's a week until release
> day.  Please let me know if you know of any regressions, thanks!
>
> --
> Tom

I looks like u-boot v2017.09-rc4 is still unable to boot Linux on
Raspberry Pi devices. I've just tested this now on a Raspberry Pi
(original Model B) and confirmed that it gets stuck at "Starting
kernel ...". This was also broken in v2017.07 but it's a regression
against v2017.05 where this was working. For reference see
https://lists.denx.de/pipermail/u-boot/2017-August/300857.html and
replies.

I don't think we have a root cause or a full solution yet, but
re-enabling CONFIG_OF_EMBED in all Raspberry Pi defconfigs should at
least give us a workaround for now that will allow Linux to boot. Is
this something we can get into the v2017.09 release at this stage? If
so I'm happy to send the patch and do the testing.

Cheers,

-- 
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Togán Labs Ltd
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[U-Boot] Please pull u-boot-dm

[Simon Glass]

Hi Tom,

Here are a few bug fixes and doc changes, including the CONFIG_BLK
migration timeline.


The following changes since commit 6935aec0e3f0064698d8970a00b908f5a162b93f:

  Makefile: Suppress output of python libfdt build command (2017-09-03
15:30:37 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-dm.git

for you to fetch changes up to d944bf6b5e5c0248eebb035d3f6a67dec70d7dd9:

  dm: core: Add livetree documentation (2017-09-04 02:10:06 -0600)


Hannes Schmelzer (1):
  fdt: fix 'prop (...) not found!' error in 'fdt set' command

Philipp Tomsich (1):
  gitignore: add intermediates from libfdt build

Simon Glass (2):
  dm: Add migration plan for CONFIG_BLK
  dm: core: Add livetree documentation

 .gitignore |   8 ++
 cmd/fdt.c  |   8 +-
 doc/driver-model/MIGRATION.txt |  20 +++
 doc/driver-model/livetree.txt  | 272
+
 4 files changed, 303 insertions(+), 5 deletions(-)
 create mode 100644 doc/driver-model/MIGRATION.txt
 create mode 100644 doc/driver-model/livetree.txt

Regards,
Simon
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Re: [U-Boot] [PATCH 1/3] dm: Add migration plan for CONFIG_BLK

[sjg]

Hi Tom,

On 7 August 2017 at 09:39, Tom Rini  wrote:
> On Sat, Aug 05, 2017 at 03:45:53PM -0600, Simon Glass wrote:
>
>> The CONFIG_BLK conversion involves quite invasive changes in the U-Boot
>> code, with #ifdefs and different code paths. We should try to move over to
>> this soon so we can drop the old code.
>>
>> Set a deadline of 9 months for this work, rounded up to the next release.
>>
>> Signed-off-by: Simon Glass 
>
> Reviewed-by: Tom Rini 
>
> And I've gone and made a calendar reminder to make v2018.01 have a scary
> build warning about this conversion too.

OK sounds good. I see that I didn't cc many maintainers on this one.
Might be worth having a (less scary) message with the next release :-)

Regards,
Simon

Applied to u-boot-dm, thanks!
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Re: [U-Boot] [PATCH v2] dm: core: Add livetree documentation

[sjg]

On 08/31/2017 02:00 PM, Simon Glass wrote:
> On 31 August 2017 at 19:59, Simon Glass  wrote:
>> Add some documentation for the live device tree support in U-Boot. This
>> was missing from the initial series.
>>
>> Signed-off-by: Simon Glass 
>> Suggested-by: Lukasz Majewski 
>
> Reviewed-by: Łukasz Majewski 
>
> (I hope this is OK, I just fixed the typos)
>

Thanks :-)

-- 
Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de

Applied to u-boot-dm, thanks!
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Re: [U-Boot] [PATCH] fdt: fix 'prop (...) not found!' error in 'fdt set' command

[sjg]

On 18 August 2017 at 06:41, Hannes Schmelzer  wrote:
> This commit brings things back to the well known working state of the
> command.
> -
> With commit 9620d87259572ef21f0df60988d9a932ca673779
> (cmd/fdt: support single value replacement within an array)
>
> there was an error introduced modifying (inserting) a property to a
> device-tree node.
> fdt_getprop(...) returnes a len with -1 for a non-existing property, but
> a memcpy with len -1 isn't a good idea and things went wrong (crash).
> -
> Some times later Tom did repair this
> with commit 99bb38e2cce9d99238458e0f6d1880c6d2e80a4d
> (fdt: Check for NULL return from fdt_getprop in 'fdt set')
>
> This repairs the crash but the behaviour of the command isn't like
> before, it makes it impossible to insert a property.
> -
>
> Signed-off-by: Hannes Schmelzer 
>
> ---
>
>  cmd/fdt.c | 8 +++-
>  1 file changed, 3 insertions(+), 5 deletions(-)

Acked-by: Simon Glass 

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Re: [U-Boot] [PATCH] gitignore: add intermediates from libfdt build

[sjg]

On 29 August 2017 at 17:47, Philipp Tomsich
 wrote:
> Since ee95d10 (fdt: Build the new python libfdt module), a number of
> additional files are auto-generated/installed into the tools directory.
> List these in .gitignore to suppress having them listed as untracked.
>
> Signed-off-by: Philipp Tomsich 
> References: ee95d10 (fdt: Build the new python libfdt module)
>
> ---
>
>  .gitignore | 8 
>  1 file changed, 8 insertions(+)

Reviewed-by: Simon Glass 

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Re: [U-Boot] [PATCH v9 00/10] STiH410-B2260: add reset, usb and fastboot support

[Patrice CHOTARD]

Hi

Just a gentle reminder to not forget this series

Thanks

On 07/18/2017 02:31 PM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> This series adds :
>   _ update existing sdhci driver to use reset framework
>   _ add usb phy driver
>   _ add fastboot support
> 
> With all this feature enable, it's now possible to
>   _ boot on usb mass storage device
>   _ boot from kernel image and dtb previously loaded using tftp
>   _ update mmc partiton using fastboot
> 
> v9:   _ update doc/device-tree-bindings/phy/phy-stih407-usb.txt requested by
> Marek Vasut in patch 4
>   _ move inclusion of linux/usb/otg.h from include/dwc3-sti-glue.h to 
> drivers/usb/host/dwc3-sti-glue.c
> requested by Marek Vasut in patch 7
> 
> v8:   _ update failpath label names in path 7 requested by Marek Vasut
> 
> v7:   _ rebase on top of dm/master to use last livetree update
>   _ replace fdtdec_parse_phandle_with_args() by 
> dev_read_phandle_with_args() in patch 4
>   _ replace uclass_get_device_by_of_offset() by 
> uclass_get_device_by_ofnode() in patch 4
> 
> v6:   _ generic ehci/ohci drivers extension has been send separately
>   _ add reviewed-by Simon Glass
> 
> v5: _ extend generic ehci with phy
>   _ extend generic ohci with clock, reset and phy
>   _ remove specifi STi ehci and ohci drivers and use generic ohci/ehci
>ones
>   _ update stih410-b2260 device tree to use ehci and ohci generic
> drivers
> 
> v4: _ use PHY uclass currently available on dm-next branch,
> update sti ehci, ohci and xhci drivers to use new PHY uclass.
> 
> v3:   _ remove reset driver (already applied on u-boot-dm tree by Simon
> Glass)
>   _ patch 4: add new USB PHY uclass requested by Simon Glass
>   _ patch 5: convert STi usb phy driver to new USB PHY uclass
>   _ patch 6/7: update echi/ohci drivers to use USB PHY uclass
>   _ patch 8/9: rework xhci-sti.c and dwc3-sti.c. Previously, xhci-sti 
> driver binded
> dwc3-sti (STi glue driver) which was not correct. Now we respect the 
> device
> tree hierarchy, ie the STi dwc3 glue driver is first probed, then 
> bind the
> xhci-sti driver.
>   
> v2:   _ add Reviewed-by: Jaehoon Chung  in patches 
> 2,3 and 4
>   _ fix remarks done by Marek Vasut :
>   _ patch 5 : replace bitfield_replace() by clrsetbits_le32()
>   _ patch 6 : update error messages and add remove callback
>   _ patch 8 : put board specific defines in a separate patch
>   _ patch 7: use setbits_le32() instead of read, modify, write
> sequence and add missing parenthesis
>   _ squash previous patches 7,9,11,12,14,16,17,18,19,20 and 21
> in patch 14
> 
> 
> 
> Patrice Chotard (8):
> Patrice Chotard (10):
>mmc: sti_sdhci: Rework sti_mmc_core_config()
>ARM: dts: stih410-family: Add missing reset_names for mmc1 node
>mmc: sti_sdhci: Use reset framework
>usb: phy: Add STi USB2 PHY
>STiH410-B2260: enable USB Host Networking
>STiH410-B2260: enable USB, fastboot, reset, PHY related flags
>usb: dwc3: Add dwc3 glue driver support for STi
>ARM: dts: STiH410: set DWC3 dual role mode to peripheral
>ARM: dts: STiH410: update ehci and ohci compatible
>board: STiH410-B2260: add fastboot support
> 
>   arch/arm/dts/stih407-family.dtsi |   3 +-
>   arch/arm/dts/stih410.dtsi|  11 +-
>   arch/arm/include/asm/arch-stih410/sys_proto.h|  11 +
>   board/st/stih410-b2260/board.c   |  42 
>   configs/stih410-b2260_defconfig  |  39 +++-
>   doc/device-tree-bindings/phy/phy-stih407-usb.txt |  24 +++
>   doc/device-tree-bindings/usb/dwc3-st.txt |  60 ++
>   drivers/mmc/sti_sdhci.c  |  62 +++---
>   drivers/phy/Kconfig  |   8 +
>   drivers/phy/Makefile |   1 +
>   drivers/phy/sti_usb_phy.c| 181 
>   drivers/usb/host/Kconfig |   9 +
>   drivers/usb/host/Makefile|   1 +
>   drivers/usb/host/dwc3-sti-glue.c | 257 
> +++
>   include/configs/stih410-b2260.h  |  16 ++
>   include/dwc3-sti-glue.h  |  41 
>   16 files changed, 730 insertions(+), 36 deletions(-)
>   create mode 100644 arch/arm/include/asm/arch-stih410/sys_proto.h
>   create mode 100644 doc/device-tree-bindings/phy/phy-stih407-usb.txt
>   create mode 100644 doc/device-tree-bindings/usb/dwc3-st.txt
>   create mode 100644 drivers/phy/sti_usb_phy.c
>   create mode 100644 drivers/usb/host/dwc3-sti-glue.c
>   create mode 100644 include/dwc3-sti-glue.h
> 
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[U-Boot] [PATCH v5 1/1] mmc: Add MMC support for stm32h7 Socs

[patrice.chotard]

From: Patrice Chotard 

This patch adds SD/MMC support for STM32H7 SoCs.

Here is an extraction of SDMMC main features, embedded in
STM32H7 SoCs.
The SD/MMC block include the following:
 _ Full compliance with MultiMediaCard System Specification
   Version 4.51. Card support for three different databus modes:
   1-bit (default), 4-bit and 8-bit.
 _ Full compatibility with previous versions of MultiMediaCards
   (backward compatibility).
 _ Full compliance with SD memory card specifications version 4.1.
   (SDR104 SDMMC_CK speed limited to maximum allowed IO speed,
SPI mode and UHS-II mode not supported).
 _ Full compliance with SDIO card specification version 4.0.
   Card support for two different databus modes: 1-bit (default)
   and 4-bit. (SDR104 SDMMC_CK speed limited to maximum allowed IO
   speed, SPI mode and UHS-II mode not supported).
 _ Data transfer up to 208 Mbyte/s for the 8 bit mode.
   (depending maximum allowed IO speed).
 _ Data and command output enable signals to control external
   bidirectional drivers.

The current version of the SDMMC supports only one SD/SDIO/MMC card
at any one time and a stack of MMC Version 4.51 or previous.

Signed-off-by: Christophe Kerello 
Signed-off-by: Patrice Chotard 
---

v5: _ give a more meaningful name to stm32_sdmmc2_start_cmd() last param
_ use readl_poll_timeout() instead of using while in stm32_sdmmc2_end_cmd()
v4: _ replace mmc_create() usage by mmc_bind() callback
_ rename struct stm32_sdmmc2_host to stm32_sdmmc2_priv
v3: _ use registers offset instead of registers struct description
_ rename clk_reg_add and pwr_reg_add to respectively clk_reg_msk and 
pwr_reg_msk
_ don't exit in error if DT bus-width value is not correct, force it to 1
  and continue
v2: _ add .get_cd() callback support

 drivers/mmc/Kconfig|   8 +
 drivers/mmc/Makefile   |   1 +
 drivers/mmc/stm32_sdmmc2.c | 608 +
 3 files changed, 617 insertions(+)
 create mode 100644 drivers/mmc/stm32_sdmmc2.c

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 82b8d75..6ac7ab2 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -377,6 +377,14 @@ config GENERIC_ATMEL_MCI
  the SD Memory Card Specification V2.0, the SDIO V2.0 specification
  and CE-ATA V1.1.
 
+config STM32_SDMMC2
+   bool "STMicroelectronics STM32H7 SD/MMC Host Controller support"
+   depends on DM_MMC && BLK && OF_CONTROL && DM_MMC_OPS
+   help
+ This selects support for the SD/MMC controller on STM32H7 SoCs.
+ If you have a board based on such a SoC and with a SD/MMC slot,
+ say Y or M here.
+
 endif
 
 config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 2d781c3..2584663 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
 obj-$(CONFIG_MMC_SANDBOX)  += sandbox_mmc.o
 obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
 obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
+obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
 
 # SDHCI
 obj-$(CONFIG_MMC_SDHCI)+= sdhci.o
diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
new file mode 100644
index 000..0e1f40b
--- /dev/null
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -0,0 +1,608 @@
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ * Author(s): Patrice CHOTARD,  for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct stm32_sdmmc2_plat {
+   struct mmc_config cfg;
+   struct mmc mmc;
+};
+
+struct stm32_sdmmc2_priv {
+   fdt_addr_t base;
+   struct clk clk;
+   struct reset_ctl reset_ctl;
+   struct gpio_desc cd_gpio;
+   u32 clk_reg_msk;
+   u32 pwr_reg_msk;
+};
+
+struct stm32_sdmmc2_ctx {
+   u32 cache_start;
+   u32 cache_end;
+   u32 data_length;
+   bool dpsm_abort;
+};
+
+/* SDMMC REGISTERS OFFSET */
+#define SDMMC_POWER0x00/* SDMMC power control */
+#define SDMMC_CLKCR0x04/* SDMMC clock control */
+#define SDMMC_ARG  0x08/* SDMMC argument  */
+#define SDMMC_CMD  0x0C/* SDMMC command   */
+#define SDMMC_RESP10x14/* SDMMC response 1*/
+#define SDMMC_RESP20x18/* SDMMC response 2*/
+#define SDMMC_RESP30x1C/* SDMMC response 3*/
+#define SDMMC_RESP40x20/* SDMMC response 4*/
+#define SDMMC_DTIMER   0x24/* SDMMC data timer*/
+#define SDMMC_DLEN 0x28/* SDMMC data length   */
+#define SDMMC_DCTRL0x2C/* 

Re: [U-Boot] [PATCH v2 2/4] block: ide: Fix block read/write with driver model

[Heinrich Schuchardt]

On 09/04/2017 11:08 AM, Bin Meng wrote:
> This converts the IDE driver to driver model so that block read and
> write are fully functional.
> 
> Fixes: b7c6baef ("x86: Convert MMC to driver model")
> Reported-by: Heinrich Schuchardt 
> Signed-off-by: Bin Meng 
> 
> ---
> 
> Changes in v2:
> - Fixed 'fatls ide 0' issue
> 
>  drivers/block/blk-uclass.c |  2 +-
>  drivers/block/ide.c| 68 
> ++
>  include/dm/uclass-id.h |  1 +
>  3 files changed, 70 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
> index e5f00dc..8e58580 100644
> --- a/drivers/block/blk-uclass.c
> +++ b/drivers/block/blk-uclass.c
> @@ -26,7 +26,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
>  };
>  
>  static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
> - [IF_TYPE_IDE]   = UCLASS_INVALID,
> + [IF_TYPE_IDE]   = UCLASS_IDE,
>   [IF_TYPE_SCSI]  = UCLASS_SCSI,
>   [IF_TYPE_ATAPI] = UCLASS_INVALID,
>   [IF_TYPE_USB]   = UCLASS_MASS_STORAGE,
> diff --git a/drivers/block/ide.c b/drivers/block/ide.c
> index ce51153..58b295e 100644
> --- a/drivers/block/ide.c
> +++ b/drivers/block/ide.c
> @@ -827,12 +827,20 @@ void ide_init(void)
>   ide_ident(_dev_desc[i]);
>   dev_print(_dev_desc[i]);
>  
> +#ifndef CONFIG_BLK
>   if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
>   /* initialize partition type */
>   part_init(_dev_desc[i]);
>   }
> +#endif
>   }
>   WATCHDOG_RESET();
> +
> +#ifdef CONFIG_BLK
> + struct udevice *dev;
> +
> + uclass_first_device(UCLASS_IDE, );
> +#endif
>  }
>  
>  /* We only need to swap data if we are running on a big endian cpu. */
> @@ -1147,6 +1155,21 @@ int ide_device_present(int dev)
>  #endif
>  
>  #ifdef CONFIG_BLK
> +static int ide_blk_probe(struct udevice *udev)
> +{
> + struct blk_desc *desc = dev_get_uclass_platdata(udev);
> + int devnum = desc->devnum;
> +
> + /* fill in device vendor/product/rev strings */
> + strncpy(desc->vendor, ide_dev_desc[devnum].vendor, BLK_VEN_SIZE);
> + strncpy(desc->product, ide_dev_desc[devnum].product, BLK_PRD_SIZE);
> + strncpy(desc->revision, ide_dev_desc[devnum].revision, BLK_REV_SIZE);
> +
> + part_init(desc);
> +
> + return 0;
> +}
> +
>  static const struct blk_ops ide_blk_ops = {
>   .read   = ide_read,
>   .write  = ide_write,
> @@ -1156,6 +1179,51 @@ U_BOOT_DRIVER(ide_blk) = {
>   .name   = "ide_blk",
>   .id = UCLASS_BLK,
>   .ops= _blk_ops,
> + .probe  = ide_blk_probe,
> +};
> +
> +static int ide_probe(struct udevice *udev)
> +{
> + struct udevice *blk_dev;
> + char name[20];
> + int blksz;
> + lbaint_t size;
> + int i;
> + int ret;
> +
> + for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
> + if (ide_dev_desc[i].type != DEV_TYPE_UNKNOWN) {
> + sprintf(name, "blk#%d", i);
> +
> + blksz = ide_dev_desc[i].blksz;
> + size = blksz * ide_dev_desc[i].lba;
> + ret = blk_create_devicef(udev, "ide_blk", name,
> +  IF_TYPE_IDE, i,
> +  blksz, size, _dev);
> + if (ret)
> + return ret;
> + }
> + }
> +
> + return 0;
> +}
> +
> +U_BOOT_DRIVER(ide) = {
> + .name   = "ide",
> + .id = UCLASS_IDE,
> + .probe  = ide_probe,
> +};
> +
> +struct pci_device_id ide_supported[] = {
> + { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0x00) },
> + { }
> +};
> +
> +U_BOOT_PCI_DEVICE(ide, ide_supported);
> +
> +UCLASS_DRIVER(ide) = {
> + .name   = "ide",
> + .id = UCLASS_IDE,
>  };
>  #else
>  U_BOOT_LEGACY_BLK(ide) = {
> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
> index 1a50199..3fc2083 100644
> --- a/include/dm/uclass-id.h
> +++ b/include/dm/uclass-id.h
> @@ -41,6 +41,7 @@ enum uclass_id {
>   UCLASS_I2C_EEPROM,  /* I2C EEPROM device */
>   UCLASS_I2C_GENERIC, /* Generic I2C device */
>   UCLASS_I2C_MUX, /* I2C multiplexer */
> + UCLASS_IDE, /* IDE device */
>   UCLASS_IRQ, /* Interrupt controller */
>   UCLASS_KEYBOARD,/* Keyboard input device */
>   UCLASS_LED, /* Light-emitting diode (LED) */
> 

Hello Bin,

I assume the same sort of changes as in ide.c is needed in
drivers/ata/sata.c too.

When booting I see these error messages:
** Bad device scsi 0 **
Error: Invalid Boot Flag (found 0x, expected 0xaa55)

qemu-system-x86_64 -m 1G -bios denx/u-boot.rom -nographic \
-netdev \

Re: [U-Boot] [PATCH v2 2/4] block: ide: Fix block read/write with driver model

[Heinrich Schuchardt]

On 09/04/2017 11:08 AM, Bin Meng wrote:
> This converts the IDE driver to driver model so that block read and
> write are fully functional.
> 
> Fixes: b7c6baef ("x86: Convert MMC to driver model")

Now I am able to load a file from the IDE disk and execute it with
bootefi. Thanks a lot for fixing this.

I think this is release critical and should be merged into 2017.09.

Tested-by: Heinrich Schuchardt 
> Reported-by: Heinrich Schuchardt 
> Signed-off-by: Bin Meng 
> 
> ---
> 
> Changes in v2:
> - Fixed 'fatls ide 0' issue
> 
>  drivers/block/blk-uclass.c |  2 +-
>  drivers/block/ide.c| 68 
> ++
>  include/dm/uclass-id.h |  1 +
>  3 files changed, 70 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
> index e5f00dc..8e58580 100644
> --- a/drivers/block/blk-uclass.c
> +++ b/drivers/block/blk-uclass.c
> @@ -26,7 +26,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
>  };
>  
>  static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
> - [IF_TYPE_IDE]   = UCLASS_INVALID,
> + [IF_TYPE_IDE]   = UCLASS_IDE,
>   [IF_TYPE_SCSI]  = UCLASS_SCSI,
>   [IF_TYPE_ATAPI] = UCLASS_INVALID,
>   [IF_TYPE_USB]   = UCLASS_MASS_STORAGE,
> diff --git a/drivers/block/ide.c b/drivers/block/ide.c
> index ce51153..58b295e 100644
> --- a/drivers/block/ide.c
> +++ b/drivers/block/ide.c
> @@ -827,12 +827,20 @@ void ide_init(void)
>   ide_ident(_dev_desc[i]);
>   dev_print(_dev_desc[i]);
>  
> +#ifndef CONFIG_BLK
>   if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
>   /* initialize partition type */
>   part_init(_dev_desc[i]);
>   }
> +#endif
>   }
>   WATCHDOG_RESET();
> +
> +#ifdef CONFIG_BLK
> + struct udevice *dev;
> +
> + uclass_first_device(UCLASS_IDE, );
> +#endif
>  }
>  
>  /* We only need to swap data if we are running on a big endian cpu. */
> @@ -1147,6 +1155,21 @@ int ide_device_present(int dev)
>  #endif
>  
>  #ifdef CONFIG_BLK
> +static int ide_blk_probe(struct udevice *udev)
> +{
> + struct blk_desc *desc = dev_get_uclass_platdata(udev);
> + int devnum = desc->devnum;
> +
> + /* fill in device vendor/product/rev strings */
> + strncpy(desc->vendor, ide_dev_desc[devnum].vendor, BLK_VEN_SIZE);
> + strncpy(desc->product, ide_dev_desc[devnum].product, BLK_PRD_SIZE);
> + strncpy(desc->revision, ide_dev_desc[devnum].revision, BLK_REV_SIZE);
> +
> + part_init(desc);
> +
> + return 0;
> +}
> +
>  static const struct blk_ops ide_blk_ops = {
>   .read   = ide_read,
>   .write  = ide_write,
> @@ -1156,6 +1179,51 @@ U_BOOT_DRIVER(ide_blk) = {
>   .name   = "ide_blk",
>   .id = UCLASS_BLK,
>   .ops= _blk_ops,
> + .probe  = ide_blk_probe,
> +};
> +
> +static int ide_probe(struct udevice *udev)
> +{
> + struct udevice *blk_dev;
> + char name[20];
> + int blksz;
> + lbaint_t size;
> + int i;
> + int ret;
> +
> + for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
> + if (ide_dev_desc[i].type != DEV_TYPE_UNKNOWN) {
> + sprintf(name, "blk#%d", i);
> +
> + blksz = ide_dev_desc[i].blksz;
> + size = blksz * ide_dev_desc[i].lba;
> + ret = blk_create_devicef(udev, "ide_blk", name,
> +  IF_TYPE_IDE, i,
> +  blksz, size, _dev);
> + if (ret)
> + return ret;
> + }
> + }
> +
> + return 0;
> +}
> +
> +U_BOOT_DRIVER(ide) = {
> + .name   = "ide",
> + .id = UCLASS_IDE,
> + .probe  = ide_probe,
> +};
> +
> +struct pci_device_id ide_supported[] = {
> + { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0x00) },
> + { }
> +};
> +
> +U_BOOT_PCI_DEVICE(ide, ide_supported);
> +
> +UCLASS_DRIVER(ide) = {
> + .name   = "ide",
> + .id = UCLASS_IDE,
>  };
>  #else
>  U_BOOT_LEGACY_BLK(ide) = {
> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
> index 1a50199..3fc2083 100644
> --- a/include/dm/uclass-id.h
> +++ b/include/dm/uclass-id.h
> @@ -41,6 +41,7 @@ enum uclass_id {
>   UCLASS_I2C_EEPROM,  /* I2C EEPROM device */
>   UCLASS_I2C_GENERIC, /* Generic I2C device */
>   UCLASS_I2C_MUX, /* I2C multiplexer */
> + UCLASS_IDE, /* IDE device */
>   UCLASS_IRQ, /* Interrupt controller */
>   UCLASS_KEYBOARD,/* Keyboard input device */
>   UCLASS_LED, /* Light-emitting diode (LED) */
> 

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Re: [U-Boot] crypto/fsl: fix obj-yy in Makefile

[Tom Rini]

On Sun, Sep 03, 2017 at 07:17:10PM +0200, Clemens Gruber wrote:

> When enabling CONFIG_CMD_BLOB and/or CONFIG_CMD_DEKBLOB, the build fails
> with a linker error:
>   ...
>   LD  u-boot
> arch/arm/mach-imx/built-in.o: In function `blob_encap_dek':
> /home/clemens/dev/u-boot/arch/arm/mach-imx/cmd_dek.c:46: undefined
> reference to `blob_dek'
> 
> This is due to an error in the Makefile, resulting in obj-yy/obj-yn/..
> and fsl_blob.o is therefore not linked.
> 
> Fix it by splitting it up into two obj-y lines.
> 
> Signed-off-by: Clemens Gruber 
> Reviewed-by: Fabio Estevam 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [ANN] U-Boot v2017.09-rc4 released

[Tom Rini]

Hey all,

It's release day and v2017.09-rc4 is out.  It's a week until release
day.  Please let me know if you know of any regressions, thanks!

-- 
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Re: [U-Boot] git: mailrc: Update e-mail address

[Tom Rini]

On Sun, Sep 03, 2017 at 06:13:11PM +0200, Lukasz Majewski wrote:

> Signed-off-by: Lukasz Majewski 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PATCH v3 1/2] dm: core: add clocks node scan

[patrice.chotard]

From: Patrice Chotard 

Currently, all fixed-clock declared in "clocks" node in device tree
can be binded by clk_fixed_rate.c driver only if each of them have
the "simple-bus" compatible string.
This constraint has been invoked here [1].

This patch offers a solution to avoid adding "simple-bus" compatible
string to nodes that are not busses.

[1] https://patchwork.ozlabs.org/patch/558837/

Signed-off-by: Patrice Chotard 
---

v3: _ rename dm_extended_scan_dt() to dm_extended_scan_fdt() to insure 
  function naming consistency
_ update dm_extended_scan_fdt() description

 drivers/core/root.c | 34 --
 include/dm/root.h   | 14 ++
 2 files changed, 46 insertions(+), 2 deletions(-)

diff --git a/drivers/core/root.c b/drivers/core/root.c
index d691d6f..757d109 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -312,8 +312,38 @@ int dm_scan_fdt(const void *blob, bool pre_reloc_only)
 #endif
return dm_scan_fdt_node(gd->dm_root, blob, 0, pre_reloc_only);
 }
+#else
+static int dm_scan_fdt_node(struct udevice *parent, const void *blob,
+   int offset, bool pre_reloc_only)
+{
+   return 0;
+}
 #endif
 
+int dm_extended_scan_fdt(const void *blob, bool pre_reloc_only)
+{
+   int node, ret;
+
+   ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
+   if (ret) {
+   debug("dm_scan_fdt() failed: %d\n", ret);
+   return ret;
+   }
+
+   /* bind fixed-clock */
+   node = ofnode_to_offset(ofnode_path("/clocks"));
+   /* if no DT "clocks" node, no need to go further */
+   if (node < 0)
+   return ret;
+
+   ret = dm_scan_fdt_node(gd->dm_root, gd->fdt_blob, node,
+  pre_reloc_only);
+   if (ret)
+   debug("dm_scan_fdt_node() failed: %d\n", ret);
+
+   return ret;
+}
+
 __weak int dm_scan_other(bool pre_reloc_only)
 {
return 0;
@@ -335,9 +365,9 @@ int dm_init_and_scan(bool pre_reloc_only)
}
 
if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) {
-   ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
+   ret = dm_extended_scan_fdt(gd->fdt_blob, pre_reloc_only);
if (ret) {
-   debug("dm_scan_fdt() failed: %d\n", ret);
+   debug("dm_extended_scan_dt() failed: %d\n", ret);
return ret;
}
}
diff --git a/include/dm/root.h b/include/dm/root.h
index 50a6011..b075eef 100644
--- a/include/dm/root.h
+++ b/include/dm/root.h
@@ -56,6 +56,20 @@ int dm_scan_platdata(bool pre_reloc_only);
 int dm_scan_fdt(const void *blob, bool pre_reloc_only);
 
 /**
+ * dm_extended_scan_fdt() - Scan the device tree and bind drivers
+ *
+ * This calls dm_scna_dft() which scans the device tree and creates a driver
+ * for each node. the top-level subnodes are examined and also all sub-nodes
+ * of "clocks" node.
+ *
+ * @blob: Pointer to device tree blob
+ * @pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
+ * flag. If false bind all drivers.
+ * @return 0 if OK, -ve on error
+ */
+int dm_extended_scan_fdt(const void *blob, bool pre_reloc_only);
+
+/**
  * dm_scan_other() - Scan for other devices
  *
  * Some devices may not be visible to Driver Model. This weak function can
-- 
1.9.1

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[U-Boot] [PATCH v3 2/2] dm: test: replace dm_scan_dt() by of dm_extended_scan_fdt() in dm_do_test

[patrice.chotard]

From: Patrice Chotard 

This allows to scan the DT including all "clocks" node's sub-nodes
in which fixed-clock are defined.
All fixed-clock should be defined inside a clocks node which collect all
external oscillators. Until now, all clocks sub-nodes can't be binded except
if the "simple-bus" compatible string is added which is a hack.

Update test.dts by moving clk_fixed node inside clocks.

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---


 arch/sandbox/dts/test.dts | 10 ++
 test/dm/test-main.c   |  2 +-
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 65b2f8e..e67d428 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -127,10 +127,12 @@
compatible = "denx,u-boot-fdt-test";
};
 
-   clk_fixed: clk-fixed {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <1234>;
+   clocks {
+   clk_fixed: clk-fixed {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <1234>;
+   };
};
 
clk_sandbox: clk-sbox {
diff --git a/test/dm/test-main.c b/test/dm/test-main.c
index 9d88d31..4478e6b 100644
--- a/test/dm/test-main.c
+++ b/test/dm/test-main.c
@@ -92,7 +92,7 @@ static int dm_do_test(struct unit_test_state *uts, struct 
unit_test *test,
if (test->flags & DM_TESTF_PROBE_TEST)
ut_assertok(do_autoprobe(uts));
if (test->flags & DM_TESTF_SCAN_FDT)
-   ut_assertok(dm_scan_fdt(gd->fdt_blob, false));
+   ut_assertok(dm_extended_scan_fdt(gd->fdt_blob, false));
 
/*
 * Silence the console and rely on console reocrding to get
-- 
1.9.1

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[U-Boot] [PATCH v3 0/2] dm: core: add clocks node scan

[patrice.chotard]

From: Patrice Chotard 

v3: _ rename dm_extended_scan_dt() to dm_extended_scan_fdt() to insure 
  function naming consistency
_ update dm_extended_scan_fdt() description

v2: _ implement this feature in dm_extended_scan_dt() which can be called 
  from test/dm/test-main.c to insure that test scan DT clocks
  sub-nodes
_ replace fdt_path_offset() by ofnode_path()
_ update sandbox dedicated test

Patrice Chotard (2):
  dm: core: add clocks node scan
  dm: test: replace dm_scan_dt() by of dm_extended_scan_fdt() in
dm_do_test

 arch/sandbox/dts/test.dts | 10 ++
 drivers/core/root.c   | 34 --
 include/dm/root.h | 14 ++
 test/dm/test-main.c   |  2 +-
 4 files changed, 53 insertions(+), 7 deletions(-)

-- 
1.9.1

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Re: [U-Boot] [PATCH v2 1/2] dm: core: add clocks node scan

[Patrice CHOTARD]

Hi Simon

On 08/13/2017 11:35 PM, Simon Glass wrote:
> +Rob Clark who is doing a similar thing with the /chosen node
> 
> Hi Patrice,
> 
> On 8 August 2017 at 06:34,   wrote:
>> From: Patrice Chotard 
>>
>> Currently, all fixed-clock declared in "clocks" node in device tree
>> can be binded by clk_fixed_rate.c driver only if each of them have
>> the "simple-bus" compatible string.
>> This constraint has been invoked here [1].
>>
>> This patch offers a solution to avoid adding "simple-bus" compatible
>> string to nodes that are not busses.
>>
>> [1] https://patchwork.ozlabs.org/patch/558837/
>>
>> Signed-off-by: Patrice Chotard 
>> ---
>>
>> v2: _ implement this feature in dm_extended_scan_dt() which can be called
>>from test/dm/test-main.c to insure that test scan DT clocks
>>sub-nodes
>>  _ replace fdt_path_offset() by ofnode_path()
>>
>>   drivers/core/root.c | 34 --
>>   include/dm/root.h   | 14 ++
>>   2 files changed, 46 insertions(+), 2 deletions(-)
> 
> This looks good but please add a sandbox test to test/dm/clk.c

There is already a dedicated clk test for fixed-clock in test/dm/clk.c.

To check that fixed-clock is correctly binded with this patch i simply 
updates the arch/sandbox/dts/test.dts by adding clk_fixed node inside
clocks {
...
};

See patch 2.

> 
>>
>> diff --git a/drivers/core/root.c b/drivers/core/root.c
>> index d691d6f..748ef9c 100644
>> --- a/drivers/core/root.c
>> +++ b/drivers/core/root.c
>> @@ -312,8 +312,38 @@ int dm_scan_fdt(const void *blob, bool pre_reloc_only)
>>   #endif
>>  return dm_scan_fdt_node(gd->dm_root, blob, 0, pre_reloc_only);
>>   }
>> +#else
>> +static int dm_scan_fdt_node(struct udevice *parent, const void *blob,
>> +   int offset, bool pre_reloc_only)
>> +{
>> +   return 0;
>> +}
>>   #endif
>>
>> +int dm_extended_scan_dt(const void *blob, bool pre_reloc_only)
>> +{
>> +   int node, ret;
>> +
>> +   ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
>> +   if (ret) {
>> +   debug("dm_scan_fdt() failed: %d\n", ret);
>> +   return ret;
>> +   }
>> +
>> +   /* bind fixed-clock */
>> +   node = ofnode_to_offset(ofnode_path("/clocks"));
>> +   /* if no DT "clocks" node, no need to go further */
>> +   if (node < 0)
>> +   return ret;
>> +
>> +   ret = dm_scan_fdt_node(gd->dm_root, gd->fdt_blob, node,
>> +  pre_reloc_only);
>> +   if (ret)
>> +   debug("dm_scan_fdt_node() failed: %d\n", ret);
>> +
>> +   return ret;
>> +}
>> +
>>   __weak int dm_scan_other(bool pre_reloc_only)
>>   {
>>  return 0;
>> @@ -335,9 +365,9 @@ int dm_init_and_scan(bool pre_reloc_only)
>>  }
>>
>>  if (CONFIG_IS_ENABLED(OF_CONTROL) && 
>> !CONFIG_IS_ENABLED(OF_PLATDATA)) {
>> -   ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
>> +   ret = dm_extended_scan_dt(gd->fdt_blob, pre_reloc_only);
>>  if (ret) {
>> -   debug("dm_scan_fdt() failed: %d\n", ret);
>> +   debug("dm_extended_scan_dt() failed: %d\n", ret);
>>  return ret;
>>  }
>>  }
>> diff --git a/include/dm/root.h b/include/dm/root.h
>> index 50a6011..3426830 100644
>> --- a/include/dm/root.h
>> +++ b/include/dm/root.h
>> @@ -56,6 +56,20 @@ int dm_scan_platdata(bool pre_reloc_only);
>>   int dm_scan_fdt(const void *blob, bool pre_reloc_only);
>>
>>   /**
>> + * dm_extended_scan_dt() - Scan the device tree and bind drivers
> 
> For consistency dm_extended_scan_fdt()

ok

> 
>> + *
>> + * This scans the device tree and creates a driver for each node.
>> + * the top-level subnodes are examined and also all sub-nodes of "clocks"
>> + * node
> 
> Should mention that this calls dm_scan_fdt()

ok i will add it.

> 
>> + *
>> + * @blob: Pointer to device tree blob
>> + * @pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
>> + * flag. If false bind all drivers.
>> + * @return 0 if OK, -ve on error
>> + */
>> +int dm_extended_scan_dt(const void *blob, bool pre_reloc_only);
>> +
>> +/**
>>* dm_scan_other() - Scan for other devices
>>*
>>* Some devices may not be visible to Driver Model. This weak function can
>> --
>> 1.9.1
>>
> 
> Regards,
> Simon
> 
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[U-Boot] [PATCH 2/2] rockchip: rk3368: add the missing target and pinctrl config for sheep board

[Andy Yan]

Add the missing target and pinctrl config for rk3368 sheep board

Signed-off-by: Andy Yan 
---

 configs/sheep-rk3368_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig
index da6b93a..b00ca47 100644
--- a/configs/sheep-rk3368_defconfig
+++ b/configs/sheep-rk3368_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3368=y
+CONFIG_TARGET_SHEEP=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep"
 CONFIG_DEBUG_UART=y
 CONFIG_ENV_IS_NOWHERE=y
@@ -16,6 +17,7 @@ CONFIG_CLK=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0xFF1b
 CONFIG_DEBUG_UART_CLOCK=2400
-- 
2.7.4


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[U-Boot] [PATCH 1/2] rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings

[Andy Yan]

Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS

Signed-off-by: Andy Yan 
---

 include/configs/rk3368_common.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index a89c69a..2ed1fb1 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -52,6 +52,7 @@
 #include 
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
+   ENV_MEM_LAYOUT_SETTINGS \
BOOTENV
 
 #endif
-- 
2.7.4


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[U-Boot] [PATCH v5 6/9] armv7: Add workaround for USB erratum A-009008

[Ran Wang]

USB High Speed (HS) EYE Height Adjustment
USB HS speed eye diagram fails with the default value at
many corners, particularly at a high temperature

Optimal eye at TXREFTUNE value to 0x9 is observed, change
set the same value.

Signed-off-by: Sriram Dash 
Signed-off-by: Suresh Gupta 
Signed-off-by: Ran Wang 
---
Change in v4:
Use clrsetbits_be32() instead.

Change in v4:
Change 1001 to 0x9 in the commit message to match the code.
Clean up the math in register setting.
Rename USB_TXVREFTUNE TO SCFG_USB_TXVREFTUNE.

Change in v3:
- none

Change in v2:
In function erratum_a009008():
1.Put a blank line after variable declaration.

 arch/arm/cpu/armv7/ls102xa/Kconfig|  6 ++
 arch/arm/cpu/armv7/ls102xa/soc.c  | 15 +++
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  4 
 3 files changed, 25 insertions(+)

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index fadfce4f05..599cc28249 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -5,6 +5,7 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
+   select SYS_FSL_ERRATUM_A009008
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE if SYS_FSL_DDR
@@ -52,6 +53,11 @@ config SECURE_BOOT
 config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315"
 
+config SYS_FSL_ERRATUM_A009008
+   bool
+   help
+   Workaround for USB erratum A009008
+
 config SYS_FSL_SRDS_1
bool
 
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index b84a1a686a..1c59a62a0e 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -60,6 +60,18 @@ unsigned int get_soc_major_rev(void)
return major;
 }
 
+static void erratum_a009008(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009008
+   u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+
+   clrsetbits_be32(scfg + SCFG_USB3PRM1CR / 4,
+   0xF << 6,
+   SCFG_USB_TXVREFTUNE << 6);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */
+}
+
+
 void s_init(void)
 {
 }
@@ -146,6 +158,9 @@ int arch_soc_init(void)
 */
out_be32(>eddrtqcfg, 0x63b20042);
 
+   /* Erratum */
+   erratum_a009008();
+
return 0;
 }
 
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h 
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index c34fd63e66..ba59f40382 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -173,6 +173,10 @@ struct ccsr_gur {
 #define SCFG_PMCINTECR_ETSECERRG1  0x0004
 #define SCFG_CLUSTERPMCR_WFIL2EN   0x8000
 
+#define SCFG_BASE  0x0157
+#define SCFG_USB3PRM1CR0x070
+#define SCFG_USB_TXVREFTUNE0x9
+
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
u32 dpslpcr;
-- 
2.14.1

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[U-Boot] [PATCH v5 9/9] armv7: Add workaround for USB erratum A-009007

[Ran Wang]

Rx Compliance tests may fail intermittently at high
jitter frequencies using default register values

Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.

Signed-off-by: Sriram Dash 
Signed-off-by: Rajesh Bhagat 
Signed-off-by: Suresh Gupta 
Signed-off-by: Ran Wang 
---
Change in v5:
- none

Change in v4:
Update commit message about register setting.

Change in v3:
- none

Change in v2:
In function erratum_a009007():
1.Put a blank line after variable declaration.

 arch/arm/cpu/armv7/ls102xa/Kconfig|  6 ++
 arch/arm/cpu/armv7/ls102xa/soc.c  | 12 
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  7 +++
 3 files changed, 25 insertions(+)

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index ee09dd6fed..a77bb06cf9 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -8,6 +8,7 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A008997
+   select SYS_FSL_ERRATUM_A009007
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE if SYS_FSL_DDR
@@ -70,6 +71,11 @@ config SYS_FSL_ERRATUM_A008997
help
Workaround for USB PHY erratum A008997
 
+config SYS_FSL_ERRATUM_A009007
+   bool
+   help
+   Workaround for USB PHY erratum A009007
+
 config SYS_FSL_SRDS_1
bool
 
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index f409ad7f44..57c6f3e53c 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -92,6 +92,17 @@ static void erratum_a008997(void)
 #endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
 }
 
+static void erratum_a009007(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009007
+   void __iomem *usb_phy = (void __iomem *)USB_PHY_BASE;
+
+   out_le16(usb_phy + USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1);
+   out_le16(usb_phy + USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_2);
+   out_le16(usb_phy + USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_3);
+   out_le16(usb_phy + USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_4);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A009007 */
+}
 
 void s_init(void)
 {
@@ -183,6 +194,7 @@ int arch_soc_init(void)
erratum_a009008();
erratum_a009798();
erratum_a008997();
+   erratum_a009007();
 
return 0;
 }
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h 
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index e5c06170da..157643eb91 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -181,6 +181,13 @@ struct ccsr_gur {
 #define SCFG_USB_PCSTXSWINGFULL_MASK   0xFE00
 #define SCFG_USB_PCSTXSWINGFULL_VAL0x8E00
 
+#define USB_PHY_BASE   0x0851
+#define USB_PHY_RX_OVRD_IN_HI  0x200c
+#define USB_PHY_RX_EQ_VAL_10x
+#define USB_PHY_RX_EQ_VAL_20x8000
+#define USB_PHY_RX_EQ_VAL_30x8004
+#define USB_PHY_RX_EQ_VAL_40x800C
+
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
u32 dpslpcr;
-- 
2.14.1

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[U-Boot] [PATCH v5 4/9] armv8: Add workaround for USB erratum A-008997

[Ran Wang]

Low Frequency Periodic Signaling(LFPS) Peak-to-Peak Differential
Output Voltage Test Compliance fails using default transmitter
settings

Change config of transmitter signal swings by setting register
PCSTXSWINGFULL to 0x47 to pass compliance tests.

Signed-off-by: Sriram Dash 
Signed-off-by: Rajesh Bhagat 
Signed-off-by: Suresh Gupta 
Signed-off-by: Ran Wang 
---
Change in v5:
Use scfg_clrsetbits32() instead.

Change in v4:
Update commit message about register setting.
Clean up the math in set_usb_pcstxswingfull().
Rename USB_PCSTXSWINGFULL to SCFG_USB_PCSTXSWINGFULL.

Change in v3:
Use inline function to make code cleaner.
Correct typo of 'CONFIG_ARCH_LS1043A'.

Change in v2:
In function erratum_a008997():
1.Put a blank line after variable declaration.

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig  |  6 ++
 arch/arm/cpu/armv8/fsl-layerscape/soc.c| 24 ++
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  4 
 3 files changed, 34 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 6677f2309a..9449d629ea 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -24,6 +24,7 @@ config ARCH_LS1043A
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
+   select SYS_FSL_ERRATUM_A008997
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select ARCH_EARLY_INIT_R
@@ -48,6 +49,7 @@ config ARCH_LS1046A
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
+   select SYS_FSL_ERRATUM_A008997
select SYS_FSL_HAS_DDR4
select SYS_FSL_SRDS_2
select ARCH_EARLY_INIT_R
@@ -86,6 +88,7 @@ config ARCH_LS2080A
select SYS_FSL_ERRATUM_A009203
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
+   select SYS_FSL_ERRATUM_A008997
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
 
@@ -235,6 +238,9 @@ config SYS_FSL_ERRATUM_A009008
 config SYS_FSL_ERRATUM_A009798
bool "Workaround for USB PHY erratum A009798"
 
+config SYS_FSL_ERRATUM_A008997
+   bool "Workaround for USB PHY erratum A008997"
+
 config MAX_CPUS
int "Maximum number of CPUs permitted for Layerscape"
default 4 if ARCH_LS1043A
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 6238953658..99fba5fcaa 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -95,6 +95,28 @@ static void erratum_a009798(void)
 #endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
 }
 
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+static inline void set_usb_pcstxswingfull(u32 __iomem *scfg, u32 offset)
+{
+   scfg_clrsetbits32(scfg + offset / 4,
+   0x7F << 9,
+   SCFG_USB_PCSTXSWINGFULL << 9);
+}
+#endif
+
+static void erratum_a008997(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008997
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+   u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+
+   set_usb_pcstxswingfull(scfg, SCFG_USB3PRM2CR_USB1);
+   set_usb_pcstxswingfull(scfg, SCFG_USB3PRM2CR_USB2);
+   set_usb_pcstxswingfull(scfg, SCFG_USB3PRM2CR_USB3);
+#endif
+#endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
+}
+
 #if defined(CONFIG_FSL_LSCH3)
 /*
  * This erratum requires setting a value to eddrtqcr1 to
@@ -243,6 +265,7 @@ void fsl_lsch3_early_init_f(void)
erratum_a008336();
erratum_a009008();
erratum_a009798();
+   erratum_a008997();
 #ifdef CONFIG_CHAIN_OF_TRUST
/* In case of Secure Boot, the IBR configures the SMMU
* to allow only Secure transactions.
@@ -520,6 +543,7 @@ void fsl_lsch2_early_init_f(void)
erratum_a010539();
erratum_a009008();
erratum_a009798();
+   erratum_a008997();
 }
 #endif
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 323c09..1601ec6baa 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -340,10 +340,14 @@ struct ccsr_gur {
 
 #define SCFG_BASE  0x0157
 #define SCFG_USB3PRM1CR_USB1   0x070
+#define SCFG_USB3PRM2CR_USB1   0x074
 #define SCFG_USB3PRM1CR_USB2   0x07C
+#define SCFG_USB3PRM2CR_USB2   0x080
 #define SCFG_USB3PRM1CR_USB3   0x088
+#define SCFG_USB3PRM2CR_USB3   0x08c
 #define SCFG_USB_TXVREFTUNE0x9
 #define SCFG_USB_SQRXTUNE_MASK 0x7
+#define SCFG_USB_PCSTXSWINGFULL0x47
 

[U-Boot] [PATCH v5 5/9] armv8: Add workaround for USB erratum A-009007

[Ran Wang]

Rx Compliance tests may fail intermittently at high
jitter frequencies using default register values.

Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.

Signed-off-by: Sriram Dash 
Signed-off-by: Rajesh Bhagat 
Signed-off-by: Suresh Gupta 
Signed-off-by: Ran Wang 
---
Change in v5:
- none

Change in v4:
Update commit message about register setting.
Rename some registers which belong to SCFG.

Change in v3:
- none

Change in v2:
In function erratum_a009007():
1.Put a blank line after variable declaration.
2.Create a mcro to run for each USB for easier to read and maintain.

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig  | 12 ++-
 arch/arm/cpu/armv8/fsl-layerscape/soc.c| 40 ++
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  8 +
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  9 +
 4 files changed, 68 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 9449d629ea..c5c5f4e130 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -25,6 +25,7 @@ config ARCH_LS1043A
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A008997
+   select SYS_FSL_ERRATUM_A009007
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select ARCH_EARLY_INIT_R
@@ -50,6 +51,7 @@ config ARCH_LS1046A
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A008997
+   select SYS_FSL_ERRATUM_A009007
select SYS_FSL_HAS_DDR4
select SYS_FSL_SRDS_2
select ARCH_EARLY_INIT_R
@@ -89,6 +91,7 @@ config ARCH_LS2080A
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A008997
+   select SYS_FSL_ERRATUM_A009007
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
 
@@ -239,7 +242,14 @@ config SYS_FSL_ERRATUM_A009798
bool "Workaround for USB PHY erratum A009798"
 
 config SYS_FSL_ERRATUM_A008997
-   bool "Workaround for USB PHY erratum A008997"
+   bool
+   help
+   Workaround for USB PHY erratum A008997
+
+config SYS_FSL_ERRATUM_A009007
+   bool
+   help
+   Workaround for USB PHY erratum A009007
 
 config MAX_CPUS
int "Maximum number of CPUs permitted for Layerscape"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 99fba5fcaa..dce6912166 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -117,6 +117,44 @@ static void erratum_a008997(void)
 #endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
 }
 
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+
+#define PROGRAM_USB_PHY_RX_OVRD_IN_HI(phy) \
+   out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1);  
\
+   out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_2);  
\
+   out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_3);  
\
+   out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_4)
+
+#elif defined(CONFIG_ARCH_LS2080A)
+
+#define PROGRAM_USB_PHY_RX_OVRD_IN_HI(phy) \
+   out_le16((phy) + DCSR_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1); \
+   out_le16((phy) + DCSR_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_2); \
+   out_le16((phy) + DCSR_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_3); \
+   out_le16((phy) + DCSR_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_4)
+
+#endif
+
+static void erratum_a009007(void)
+{
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+   void __iomem *usb_phy = (void __iomem *)SCFG_USB_PHY1;
+
+   PROGRAM_USB_PHY_RX_OVRD_IN_HI(usb_phy);
+
+   usb_phy = (void __iomem *)SCFG_USB_PHY2;
+   PROGRAM_USB_PHY_RX_OVRD_IN_HI(usb_phy);
+
+   usb_phy = (void __iomem *)SCFG_USB_PHY3;
+   PROGRAM_USB_PHY_RX_OVRD_IN_HI(usb_phy);
+#elif defined(CONFIG_ARCH_LS2080A)
+   void __iomem *dcsr = (void __iomem *)DCSR_BASE;
+
+   PROGRAM_USB_PHY_RX_OVRD_IN_HI(dcsr + DCSR_USB_PHY1);
+   PROGRAM_USB_PHY_RX_OVRD_IN_HI(dcsr + DCSR_USB_PHY2);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A009007 */
+}
+
 #if defined(CONFIG_FSL_LSCH3)
 /*
  * This erratum requires setting a value to eddrtqcr1 to
@@ -266,6 +304,7 @@ void fsl_lsch3_early_init_f(void)
erratum_a009008();
erratum_a009798();
erratum_a008997();
+   erratum_a009007();
 #ifdef CONFIG_CHAIN_OF_TRUST
/* In case of Secure Boot, the IBR configures the SMMU
* to allow only Secure transactions.
@@ -544,6 +583,7 @@ void fsl_lsch2_early_init_f(void)
erratum_a009008();
erratum_a009798();

[U-Boot] [PATCH v5 8/9] armv7: Add workaround for USB erratum A-008997

[Ran Wang]

Low Frequency Periodic Singaling (LFPS) Peak-to-Peak Differential
Output Voltage Test Compliance fails using default transmitter settings

Change config of transmitter signal swings by setting register
PCSTXSWINGFULL to 0x47 to pass compliance tests.

Signed-off-by: Sriram Dash 
Signed-off-by: Rajesh Bhagat 
Signed-off-by: Suresh Gupta 
Signed-off-by: Ran Wang 
---
Change in v5:
Use clrsetbits_be32() instead.

Change in v4:
Update commit message about register setting.
Rename USB_PCSTXSWINGFULL to SCFG_USB_PCSTXSWINGFULL.

Change in v3:
- none

Change in v2:
In function erratum_a008997():
1.Put a blank line after variable declaration.

 arch/arm/cpu/armv7/ls102xa/Kconfig|  6 ++
 arch/arm/cpu/armv7/ls102xa/soc.c  | 13 +
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  3 +++
 3 files changed, 22 insertions(+)

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index f09766cf03..ee09dd6fed 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -7,6 +7,7 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
+   select SYS_FSL_ERRATUM_A008997
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE if SYS_FSL_DDR
@@ -64,6 +65,11 @@ config SYS_FSL_ERRATUM_A009798
help
Workaround for USB PHY erratum A009798
 
+config SYS_FSL_ERRATUM_A008997
+   bool
+   help
+   Workaround for USB PHY erratum A008997
+
 config SYS_FSL_SRDS_1
bool
 
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index a0e3c85421..f409ad7f44 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -81,6 +81,18 @@ static void erratum_a009798(void)
 #endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
 }
 
+static void erratum_a008997(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008997
+   u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+
+   clrsetbits_be32(scfg + SCFG_USB3PRM2CR / 4,
+   SCFG_USB_PCSTXSWINGFULL_MASK,
+   SCFG_USB_PCSTXSWINGFULL_VAL);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
+}
+
+
 void s_init(void)
 {
 }
@@ -170,6 +182,7 @@ int arch_soc_init(void)
/* Erratum */
erratum_a009008();
erratum_a009798();
+   erratum_a008997();
 
return 0;
 }
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h 
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 5762d3308a..e5c06170da 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -177,6 +177,9 @@ struct ccsr_gur {
 #define SCFG_USB3PRM1CR0x070
 #define SCFG_USB_TXVREFTUNE0x9
 #define SCFG_USB_SQRXTUNE_MASK 0x7
+#define SCFG_USB3PRM2CR0x074
+#define SCFG_USB_PCSTXSWINGFULL_MASK   0xFE00
+#define SCFG_USB_PCSTXSWINGFULL_VAL0x8E00
 
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
-- 
2.14.1

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[U-Boot] [PATCH v5 7/9] armv7: Add workaround for USB erratum A-009798

[Ran Wang]

The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receive
Compliance test failure for a 100mV threshold.

Shift the threshold from ~100mV towards ~130mV by setting SQRXTUNE
to 0x0 to pass USB High Speed Receiver Sensitivity Compliance test.

Signed-off-by: Sriram Dash 
Signed-off-by: Rajesh Bhagat 
Signed-off-by: Suresh Gupta 
Signed-off-by: Ran Wang 
---
Change in v5:
Use clrbits_be32() instead.

Change in v4:
Update commit message about register setting.
Clean up the math in register setting.
Redefine SQRXTUNE to make code clearer.

Change in v3:
- none

Change in v2:
In function erratum_a009798():
1.Put a blank line after variable declaration.

 arch/arm/cpu/armv7/ls102xa/Kconfig|  8 +++-
 arch/arm/cpu/armv7/ls102xa/soc.c  | 10 ++
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  1 +
 3 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 599cc28249..f09766cf03 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -6,6 +6,7 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A009008
+   select SYS_FSL_ERRATUM_A009798
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE if SYS_FSL_DDR
@@ -56,7 +57,12 @@ config SYS_FSL_ERRATUM_A010315
 config SYS_FSL_ERRATUM_A009008
bool
help
-   Workaround for USB erratum A009008
+   Workaround for USB PHY erratum A009008
+
+config SYS_FSL_ERRATUM_A009798
+   bool
+   help
+   Workaround for USB PHY erratum A009798
 
 config SYS_FSL_SRDS_1
bool
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 1c59a62a0e..a0e3c85421 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -71,6 +71,15 @@ static void erratum_a009008(void)
 #endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */
 }
 
+static void erratum_a009798(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009798
+   u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+
+   clrbits_be32(scfg + SCFG_USB3PRM1CR / 4,
+   SCFG_USB_SQRXTUNE_MASK << 23);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
+}
 
 void s_init(void)
 {
@@ -160,6 +169,7 @@ int arch_soc_init(void)
 
/* Erratum */
erratum_a009008();
+   erratum_a009798();
 
return 0;
 }
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h 
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index ba59f40382..5762d3308a 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -176,6 +176,7 @@ struct ccsr_gur {
 #define SCFG_BASE  0x0157
 #define SCFG_USB3PRM1CR0x070
 #define SCFG_USB_TXVREFTUNE0x9
+#define SCFG_USB_SQRXTUNE_MASK 0x7
 
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
-- 
2.14.1

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[U-Boot] [PATCH v5 3/9] armv8: Add workaround for USB erratum A-009798

[Ran Wang]

The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receiver
Compliance test failure for a 100mV threshold.

Shift the threshold from ~100mV towards ~130mV by setting SQRXTUNE
to 0x0 to pass USB High Speed Receiver Sensitivity Compliance test.

Signed-off-by: Sriram Dash 
Signed-off-by: Rajesh Bhagat 
Signed-off-by: Suresh Gupta 
Signed-off-by: Ran Wang 
---
Change in v5:
Use scfg_clrbits32() instead.

Change in v4:
Update commit message about register setting.
Clean up the math in set_usb_sqrxtune().
Rename USB_TXVREFTUNE to SCFG_USB_TXVREFTUNE.

Change in v3:
Use inline function to make code cleaner.

Change in v2:
In function erratum_a009798():
1.Put a blank line after variable declaration.
2.Move common code together.

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig  |  5 +
 arch/arm/cpu/armv8/fsl-layerscape/soc.c| 24 ++
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  1 +
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  1 +
 4 files changed, 31 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index d8936a4334..6677f2309a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -23,6 +23,7 @@ config ARCH_LS1043A
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_ERRATUM_A009008
+   select SYS_FSL_ERRATUM_A009798
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select ARCH_EARLY_INIT_R
@@ -46,6 +47,7 @@ config ARCH_LS1046A
select SYS_FSL_ERRATUM_A010165
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_ERRATUM_A009008
+   select SYS_FSL_ERRATUM_A009798
select SYS_FSL_HAS_DDR4
select SYS_FSL_SRDS_2
select ARCH_EARLY_INIT_R
@@ -83,6 +85,7 @@ config ARCH_LS2080A
select SYS_FSL_ERRATUM_A010165
select SYS_FSL_ERRATUM_A009203
select SYS_FSL_ERRATUM_A009008
+   select SYS_FSL_ERRATUM_A009798
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
 
@@ -229,6 +232,8 @@ config SYS_FSL_ERRATUM_A010539
 config SYS_FSL_ERRATUM_A009008
bool "Workaround for USB PHY erratum A009008"
 
+config SYS_FSL_ERRATUM_A009798
+   bool "Workaround for USB PHY erratum A009798"
 
 config MAX_CPUS
int "Maximum number of CPUs permitted for Layerscape"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index ea71fa0dc7..6238953658 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -63,6 +63,7 @@ static void erratum_a009008(void)
 {
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009008
u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+
 #if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
set_usb_txvreftune(scfg, SCFG_USB3PRM1CR_USB1);
set_usb_txvreftune(scfg, SCFG_USB3PRM1CR_USB2);
@@ -73,6 +74,27 @@ static void erratum_a009008(void)
 #endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */
 }
 
+static inline void set_usb_sqrxtune(u32 __iomem *scfg, u32 offset)
+{
+   scfg_clrbits32(scfg + offset / 4,
+   SCFG_USB_SQRXTUNE_MASK << 23);
+}
+
+static void erratum_a009798(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009798
+   u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+   set_usb_sqrxtune(scfg, SCFG_USB3PRM1CR_USB1);
+   set_usb_sqrxtune(scfg, SCFG_USB3PRM1CR_USB2);
+   set_usb_sqrxtune(scfg, SCFG_USB3PRM1CR_USB3);
+#elif defined(CONFIG_ARCH_LS2080A)
+   set_usb_sqrxtune(scfg, SCFG_USB3PRM1CR);
+#endif
+#endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
+}
+
 #if defined(CONFIG_FSL_LSCH3)
 /*
  * This erratum requires setting a value to eddrtqcr1 to
@@ -220,6 +242,7 @@ void fsl_lsch3_early_init_f(void)
erratum_a008514();
erratum_a008336();
erratum_a009008();
+   erratum_a009798();
 #ifdef CONFIG_CHAIN_OF_TRUST
/* In case of Secure Boot, the IBR configures the SMMU
* to allow only Secure transactions.
@@ -496,6 +519,7 @@ void fsl_lsch2_early_init_f(void)
erratum_a009660();
erratum_a010539();
erratum_a009008();
+   erratum_a009798();
 }
 #endif
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index c60d8ddfa2..323c09 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -343,6 +343,7 @@ struct ccsr_gur {
 #define SCFG_USB3PRM1CR_USB2   0x07C
 #define SCFG_USB3PRM1CR_USB3   0x088
 #define SCFG_USB_TXVREFTUNE0x9

[U-Boot] [PATCH v5 2/9] armv8: Add workaround for USB erratum A-009008

[Ran Wang]

USB High Speed (HS) EYE Height Adjustment
USB HS speed eye diagram fails with the default value at
many corners, particularly at a high temperature

Optimal eye at TXREFTUNE value to 0x9 is observed, change
set the same value.

Signed-off-by: Ran Wang 
---
Change in v5:
Use scfg_clrsetbits32() instead.

Change in v4:
Change 1001 to 0x9 in the commit message to match the code.
Clean up the math in set_usb_txvreftune().
Rename USB_TXVREFTUNE to SCFG_USB_TXVREFTUNE.

Change in v3:
Use inline function to make code cleaner.

Change in v2:
In function erratum_a009008():
1.Put a blank line after variable declaration.
2.Move common code together.

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig  |  7 +++
 arch/arm/cpu/armv8/fsl-layerscape/soc.c| 23 ++
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  6 ++
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  1 +
 4 files changed, 37 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index cdeef26fe5..d8936a4334 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -22,6 +22,7 @@ config ARCH_LS1043A
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A010539
+   select SYS_FSL_ERRATUM_A009008
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select ARCH_EARLY_INIT_R
@@ -44,6 +45,7 @@ config ARCH_LS1046A
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010165
select SYS_FSL_ERRATUM_A010539
+   select SYS_FSL_ERRATUM_A009008
select SYS_FSL_HAS_DDR4
select SYS_FSL_SRDS_2
select ARCH_EARLY_INIT_R
@@ -80,6 +82,7 @@ config ARCH_LS2080A
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010165
select SYS_FSL_ERRATUM_A009203
+   select SYS_FSL_ERRATUM_A009008
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
 
@@ -223,6 +226,10 @@ config SYS_FSL_ERRATUM_A010315
 config SYS_FSL_ERRATUM_A010539
bool "Workaround for PIN MUX erratum A010539"
 
+config SYS_FSL_ERRATUM_A009008
+   bool "Workaround for USB PHY erratum A009008"
+
+
 config MAX_CPUS
int "Maximum number of CPUs permitted for Layerscape"
default 4 if ARCH_LS1043A
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 639e9d2ddc..ea71fa0dc7 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -52,6 +52,27 @@ bool soc_has_aiop(void)
return false;
 }
 
+static inline void set_usb_txvreftune(u32 __iomem *scfg, u32 offset)
+{
+   scfg_clrsetbits32(scfg + offset / 4,
+   0xF << 6,
+   SCFG_USB_TXVREFTUNE << 6);
+}
+
+static void erratum_a009008(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009008
+   u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+   set_usb_txvreftune(scfg, SCFG_USB3PRM1CR_USB1);
+   set_usb_txvreftune(scfg, SCFG_USB3PRM1CR_USB2);
+   set_usb_txvreftune(scfg, SCFG_USB3PRM1CR_USB3);
+#elif defined(CONFIG_ARCH_LS2080A)
+   set_usb_txvreftune(scfg, SCFG_USB3PRM1CR);
+#endif
+#endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */
+}
+
 #if defined(CONFIG_FSL_LSCH3)
 /*
  * This erratum requires setting a value to eddrtqcr1 to
@@ -198,6 +219,7 @@ void fsl_lsch3_early_init_f(void)
 #endif
erratum_a008514();
erratum_a008336();
+   erratum_a009008();
 #ifdef CONFIG_CHAIN_OF_TRUST
/* In case of Secure Boot, the IBR configures the SMMU
* to allow only Secure transactions.
@@ -473,6 +495,7 @@ void fsl_lsch2_early_init_f(void)
erratum_a009929();
erratum_a009660();
erratum_a010539();
+   erratum_a009008();
 }
 #endif
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 4afc338b8e..c60d8ddfa2 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -338,6 +338,12 @@ struct ccsr_gur {
 #define SCFG_USBPWRFAULT_USB2_SHIFT2
 #define SCFG_USBPWRFAULT_USB1_SHIFT0
 
+#define SCFG_BASE  0x0157
+#define SCFG_USB3PRM1CR_USB1   0x070
+#define SCFG_USB3PRM1CR_USB2   0x07C
+#define SCFG_USB3PRM1CR_USB3   0x088
+#define SCFG_USB_TXVREFTUNE0x9
+
 #define SCFG_SNPCNFGCR_SECRDSNP0x8000
 #define SCFG_SNPCNFGCR_SECWRSNP0x4000
 #define SCFG_SNPCNFGCR_SATARDSNP   0x0080
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 59410aa7e7..01b24d03f1 100644

[U-Boot] [PATCH v5 1/9] armv8: Add scfg_clrsetbits_32(), scfg_clrbits_32()

[Ran Wang]

Some erratum patch might need it to program registers.

Signed-off-by: Ran Wang 
---
Change in v4:
New patch file

 arch/arm/include/asm/arch-fsl-layerscape/soc.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h 
b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index aeb12739aa..b0b8ed5c66 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -29,9 +29,13 @@
 #ifdef CONFIG_SYS_FSL_CCSR_SCFG_LE
 #define scfg_in32(a)   in_le32(a)
 #define scfg_out32(a, v)   out_le32(a, v)
+#define scfg_clrbits32(addr, clear) clrbits_le32(addr, clear)
+#define scfg_clrsetbits32(addr, clear, set) clrsetbits_le32(addr, clear, set)
 #elif defined(CONFIG_SYS_FSL_CCSR_SCFG_BE)
 #define scfg_in32(a)   in_be32(a)
 #define scfg_out32(a, v)   out_be32(a, v)
+#define scfg_clrbits32(addr, clear) clrbits_be32(addr, clear)
+#define scfg_clrsetbits32(addr, clear, set) clrsetbits_be32(addr, clear, set)
 #endif
 
 #ifdef CONFIG_SYS_FSL_PEX_LUT_LE
-- 
2.14.1

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Re: [U-Boot] [PATCH 07/19] arm: socfpga: Add DRAM bank size initialization function

[Marek Vasut]

On 09/04/2017 09:11 AM, Chee, Tien Fong wrote:
> On Rab, 2017-08-30 at 10:56 +0200, Marek Vasut wrote:
>> On 08/30/2017 10:36 AM, Chee, Tien Fong wrote:
>>>
>>> On Sel, 2017-08-29 at 13:59 +0200, Marek Vasut wrote:

 On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
>
>
> From: Tien Fong Chee 
>
> Add function for both multiple DRAM bank and single DRAM bank
> size
> initialization. This common functionality could be used by
> every
> single
> SOCFPGA board.
>
> Signed-off-by: Tien Fong Chee 
> ---
>  arch/arm/mach-socfpga/board.c|   12 
>  include/configs/socfpga_common.h |1 +
>  2 files changed, 13 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
> socfpga/board.c
> index a41d089..3f2e30a 100644
> --- a/arch/arm/mach-socfpga/board.c
> +++ b/arch/arm/mach-socfpga/board.c
> @@ -29,6 +29,18 @@ int board_init(void)
>   return 0;
>  }
>  
> +int dram_init_banksize(void)
> +{
> +#if !defined(CONFIG_SYS_SDRAM_BASE) &&
> !defined(CONFIG_SYS_SDRAM_SIZE)
> + fdtdec_setup_memory_banksize();
 This should work on al boards, so why do you need this macro ?
 Also, this should go into arch/arm/ , not board/

>>> In case these macros are not defined, then we need to get the info
>>> from
>>> DTS. This is in arch/arm/mach-socpfga/board.c . I found some in
>>> arch/arm, and other in board/ .
>> Every socfpga platform in u-boot has a dts, so you can always extract
>> the memory config from it and it's the preferred method.
>>
> This implementation supports both method, from header or DTS.

We want to support only the DT method, so drop the other one.

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 03/19] arm: socfpga: Add driver for flash to program FPGA

[Marek Vasut]

On 09/04/2017 09:08 AM, Chee, Tien Fong wrote:
> On Rab, 2017-08-30 at 10:52 +0200, Marek Vasut wrote:
>> On 08/30/2017 10:05 AM, Chee, Tien Fong wrote:
>>>
>>> On Sel, 2017-08-29 at 13:55 +0200, Marek Vasut wrote:

 On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
>
>
> From: Tien Fong Chee 
>
> This driver handles FPGA program operation from flash loading
> RBF to memory and then to program FPGA.
>
> Signed-off-by: Tien Fong Chee 
> ---
>  .../include/mach/fpga_manager_arria10.h|   27 ++
>  drivers/fpga/socfpga_arria10.c |  386
> +++-
>  include/altera.h   |6 +
>  include/configs/socfpga_common.h   |4 +
>  4 files changed, 422 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-
> socfpga/include/mach/fpga_manager_arria10.h b/arch/arm/mach-
> socfpga/include/mach/fpga_manager_arria10.h
> index 9cbf696..93a9122 100644
> --- a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
> +++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
> @@ -8,6 +8,8 @@
>  #ifndef _FPGA_MANAGER_ARRIA10_H_
>  #define _FPGA_MANAGER_ARRIA10_H_
>  
> +#include 
> +
>  #define ALT_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR_SET_MSK
> BIT(0)
>  #define ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK   
> BIT(1)
>  #define ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK 
> BIT(2)
> @@ -89,11 +91,36 @@ struct socfpga_fpga_manager {
>   u32  imgcfg_fifo_status;
>  };
>  
> +#if defined(CONFIG_CMD_FPGA_LOADFS)
> +enum rbf_type {unknown, periph_section, core_section};
> +enum rbf_security {invalid, unencrypted, encrypted};
> +
> +struct rbf_info {
> + enum rbf_type section;
> + enum rbf_security security;
> +};
> +
> +struct flash_info {
> + char *interface;
> + char *dev_part;
> + char *filename;
> + int fstype;
> + u32 remaining;
> + u32 flash_offset;
> + struct rbf_info rbfinfo;
> + struct image_header header;
> +};
> +#endif
> +
>  /* Functions */
>  int fpgamgr_program_init(u32 * rbf_data, size_t rbf_size);
>  int fpgamgr_program_finish(void);
>  int is_fpgamgr_user_mode(void);
>  int fpgamgr_wait_early_user_mode(void);
> +#if defined(CONFIG_CMD_FPGA_LOADFS)
> +const char *get_cff_filename(const void *fdt, int *len, u32
> core);
> +const char *get_cff_devpart(const void *fdt, int *len);
> +#endif
>  
>  #endif /* __ASSEMBLY__ */
>  
> diff --git a/drivers/fpga/socfpga_arria10.c
> b/drivers/fpga/socfpga_arria10.c
> index 5c1a68a..90c55e5 100644
> --- a/drivers/fpga/socfpga_arria10.c
> +++ b/drivers/fpga/socfpga_arria10.c
> @@ -13,6 +13,12 @@
>  #include 
>  #include 
>  #include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
>  #include 
>  #include 
>  
> @@ -22,6 +28,10 @@
>  #define COMPRESSION_OFFSET   229
>  #define FPGA_TIMEOUT_MSEC1000  /* timeout in ms */
>  #define FPGA_TIMEOUT_CNT 0x100
> +#define RBF_UNENCRYPTED  0xa65c
> +#define RBF_ENCRYPTED0xa65d
> +#define ARRIA10RBF_PERIPH0x0001
> +#define ARRIA10RBF_CORE  0x8001
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> @@ -118,7 +128,7 @@ static int
> wait_for_nconfig_pin_and_nstatus_pin(void)
>   return wait_for_bit(__func__,
>   _manager_base->imgcfg_stat,
>   mask,
> - false, FPGA_TIMEOUT_MSEC, false);
> + true, FPGA_TIMEOUT_MSEC, false);
>  }
>  
>  static int wait_for_f2s_nstatus_pin(unsigned long value)
> @@ -453,6 +463,281 @@ int fpgamgr_program_finish(void)
>   return 0;
>  }
>  
> +#if defined(CONFIG_CMD_FPGA_LOADFS)
> +const char *get_cff_filename(const void *fdt, int *len, u32
> core)
> +{
> + const char *cff_filename = NULL;
> + const char *cell;
> + int nodeoffset;
> + nodeoffset = fdt_subnode_offset(fdt, 0, "chosen");
> +
> + if (nodeoffset >= 0) {
> + if (core)
> + cell = fdt_getprop(fdt,
> + nodeoffset,
> + "cffcore-file",
> + len);
> + else
> + cell = fdt_getprop(fdt, nodeoffset,
> "cff-
> file", len);
 This should be a property of the FPGA , not the system . You can
 have
 multiple FPGAs and then this would become a problem.

>>> This setting is for the only one FPGA inside our SoCFPGA.
>> You just said it 

[U-Boot] [PATCH] armv8: fsl: i2c: Put I2C related code under CONFIG_SYS_I2C

[Sriram Dash]

I2C code is put under CONFIG_SYS_I2C

Signed-off-by: Sriram Dash 
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 639e9d2..66afcea 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -155,8 +155,8 @@ static void erratum_rcw_src(void)
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009203
 static void erratum_a009203(void)
 {
-   u8 __iomem *ptr;
 #ifdef CONFIG_SYS_I2C
+   u8 __iomem *ptr;
 #ifdef I2C1_BASE_ADDR
ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
 
-- 
1.9.1

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[U-Boot] [PATCH] armv8: fsl: ifc: Put IFC related code under CONFIG_FSL_IFC

[Sriram Dash]

IFC code is put under CONFIG_FSL_IFC

Signed-off-by: Sriram Dash 
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c|  2 ++
 arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 10 ++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 639e9d2..a538d76 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -192,7 +192,9 @@ void bypass_smmu(void)
 void fsl_lsch3_early_init_f(void)
 {
erratum_rcw_src();
+#ifdef CONFIG_FSL_IFC
init_early_memctl_regs();   /* tighten IFC timing */
+#endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009203
erratum_a009203();
 #endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h 
b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
index c4e5ecc..f231688 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
@@ -102,6 +102,7 @@ static struct mm_region early_map[] = {
{ CONFIG_SYS_FSL_QSPI_BASE1, CONFIG_SYS_FSL_QSPI_BASE1,
  CONFIG_SYS_FSL_QSPI_SIZE1,
  PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE},
+#ifdef CONFIG_FSL_IFC
/* For IFC Region #1, only the first 4MB is cache-enabled */
{ CONFIG_SYS_FSL_IFC_BASE1, CONFIG_SYS_FSL_IFC_BASE1,
  CONFIG_SYS_FSL_IFC_SIZE1_1,
@@ -116,6 +117,7 @@ static struct mm_region early_map[] = {
  CONFIG_SYS_FSL_IFC_SIZE1,
  PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#endif
{ CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
  CONFIG_SYS_FSL_DRAM_SIZE1,
 #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
@@ -125,11 +127,13 @@ static struct mm_region early_map[] = {
 #endif
  PTE_BLOCK_OUTER_SHARE | PTE_BLOCK_NS
},
+#ifdef CONFIG_FSL_IFC
/* Map IFC region #2 up to CONFIG_SYS_FLASH_BASE for NAND boot */
{ CONFIG_SYS_FSL_IFC_BASE2, CONFIG_SYS_FSL_IFC_BASE2,
  CONFIG_SYS_FLASH_BASE - CONFIG_SYS_FSL_IFC_BASE2,
  PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#endif
{ CONFIG_SYS_FSL_DCSR_BASE, CONFIG_SYS_FSL_DCSR_BASE,
  CONFIG_SYS_FSL_DCSR_SIZE,
  PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
@@ -159,10 +163,12 @@ static struct mm_region early_map[] = {
  CONFIG_SYS_FSL_QSPI_SIZE,
  PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#ifdef CONFIG_FSL_IFC
{ CONFIG_SYS_FSL_IFC_BASE, CONFIG_SYS_FSL_IFC_BASE,
  CONFIG_SYS_FSL_IFC_SIZE,
  PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#endif
{ CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
  CONFIG_SYS_FSL_DRAM_SIZE1,
 #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
@@ -206,10 +212,12 @@ static struct mm_region final_map[] = {
  PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN
},
+#ifdef CONFIG_FSL_IFC
{ CONFIG_SYS_FSL_IFC_BASE2, CONFIG_SYS_FSL_IFC_BASE2,
  CONFIG_SYS_FSL_IFC_SIZE2,
  PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#endif
{ CONFIG_SYS_FSL_DCSR_BASE, CONFIG_SYS_FSL_DCSR_BASE,
  CONFIG_SYS_FSL_DCSR_SIZE,
  PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
@@ -304,10 +312,12 @@ static struct mm_region final_map[] = {
  PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN
},
+#ifdef CONFIG_FSL_IFC
{ CONFIG_SYS_FSL_IFC_BASE, CONFIG_SYS_FSL_IFC_BASE,
  CONFIG_SYS_FSL_IFC_SIZE,
  PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#endif
{ CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
  CONFIG_SYS_FSL_DRAM_SIZE1,
  PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-- 
1.9.1

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[U-Boot] [PATCH] armv8: Remove dependency of SERDES for LS CHASIS3

[Sriram Dash]

Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 3.

Signed-off-by: Sriram Dash 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++--
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   | 2 ++
 arch/arm/cpu/armv8/fsl-layerscape/soc.c   | 2 ++
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index cdeef26..355f8bb 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -58,6 +58,8 @@ config ARCH_LS2080A
select ARM_ERRATA_829520
select ARM_ERRATA_833471
select FSL_LSCH3
+   select SYS_FSL_SRDS_1
+   select SYS_HAS_SERDES
select SYS_FSL_DDR
select SYS_FSL_DDR_LE
select SYS_FSL_DDR_VER_50
@@ -93,8 +95,6 @@ config FSL_LSCH2
 
 config FSL_LSCH3
bool
-   select SYS_FSL_SRDS_1
-   select SYS_HAS_SERDES
 
 config FSL_MC_ENET
bool "Management Complex network"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index c6fede3..3ce2ffc 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -12,7 +12,9 @@
 #include 
 #include 
 #include 
+#ifdef CONFIG_SYS_HAS_SERDES
 #include 
+#endif
 #include 
 #include 
 #include 
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 639e9d2..72acb45 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -8,7 +8,9 @@
 #include 
 #include 
 #include 
+#ifdef CONFIG_SYS_HAS_SERDES
 #include 
+#endif
 #include 
 #include 
 #include 
-- 
1.9.1

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Re: [U-Boot] ** Can't read Driver Desriptor Block **

[Bin Meng]

Hi Heinrich,

On Mon, Sep 4, 2017 at 3:30 PM, Bin Meng  wrote:
> Hi Heinrich,
>
> On Mon, Sep 4, 2017 at 1:41 PM, Heinrich Schuchardt  
> wrote:
>> On 09/04/2017 05:59 AM, Bin Meng wrote:
>>> Hi Heinrich,
>>>
>>> On Fri, Sep 1, 2017 at 1:24 AM, Heinrich Schuchardt  
>>> wrote:
 On 08/31/2017 02:55 PM, Bin Meng wrote:
> Hi Simon,
>
> On Thu, Aug 31, 2017 at 8:52 PM, Simon Glass  wrote:
>> Hi Bin,
>>
>> On 31 August 2017 at 10:53, Bin Meng  wrote:
>>> Hi Heinrich,
>>>
>>> On Thu, Aug 31, 2017 at 5:19 AM, Heinrich Schuchardt 
>>>  wrote:
 On 08/30/2017 06:37 AM, Heinrich Schuchardt wrote:
>
>
> On 08/30/2017 03:54 AM, Bin Meng wrote:
>> Hi Heinrich,
>>
>> On Wed, Aug 30, 2017 at 4:26 AM, Heinrich Schuchardt 
>>  wrote:
>>> Hello Simon,
>>>
>>> U-Boot HEAD qemu-86_defconfig cannot discover an IDE disk with one 
>>> FAT
>>> partition in qemu-system-x86_64.
>>>
>>> By bisection I found this patch.
>>>
>>> b7c6baef2891ce8978cbfddb66e944943473ac21
>>> x86: Convert MMC to driver model
>>>
>>> With this patch I get
>>>
>>> IDE:   Bus 0: OK Bus 1: OK
>>>   Device 0: Model: QEMU HARDDISK  Firm: 2.5+ Ser#: QM1
>>> Type: Hard Disk
>>> Supports 48-bit addressing
>>> Capacity: 128.0 MB = 0.1 GB (262144 x 512)
>>> ** Can't read Driver Desriptor Block **
>>>   Device 1: not available
>>>   Device 2: Model: QEMU Firm: 2.5+ Ser#: QEMU DVD-ROM
>>> Type: Removable CD ROM
>>> Capacity: not available
>>>   Device 3: not available
>>>
>>> => ide info
>>> =>
>>>
>>> Without the patch I get=> ide info
>>> Device 0: Model: QEMU HARDDISK  Firm: 2.5+ Ser#: QM1
>>> Type: Hard Disk
>>> Supports 48-bit addressing
>>> Capacity: 128.0 MB = 0.1 GB (262144 x 512)
>>> Device 2: Model: QEMU Firm: 2.5+ Ser#: QEMU DVD-ROM
>>> Type: Removable CD ROM
>>> Capacity: not available
>>>
>>> I think we observe two independent errors here:
>>>
>>> - The hard disk Device 0 is not read.
>>> - The ide command stops at the first device that is not available.
>>>
>>> I guess only the first is caused by your patch.
>>
>> Both logs look fine to me. The "Can't read Driver Desriptor Block"
>> comes from part_mac.c. Did you verify the actual IDE read/write fails
>> with current HEAD?
>>
>> Regards,
>> Bin
>>
>
> Hello Bin,
>
> I have not checked block level read but used the shell commands for 
> testing.
>
> Before the patch I can read the directory of the drive:
>
> => ide info
> Device 0: Model: QEMU HARDDISK  Firm: 2.5+ Ser#: QM1
> Type: Hard Disk
> Supports 48-bit addressing
> Capacity: 128.0 MB = 0.1 GB (262144 x 512)
> Device 2: Model: QEMU Firm: 2.5+ Ser#: QEMU DVD-ROM
> Type: Removable CD ROM
> Capacity: not available
> => fat2ls ide 0:1
> Unknown command 'fat2ls' - try 'help'
> => fatls ide 0:1
>164768   snp.efi
> 0   file1
> 0   file2
>
>
> After the patch (including HEAD) I cannot read the directory and 
> cannot
> load the file snp.efi either:
>
> => ide info
> => fatls ide 0:1
> ** Bad device ide 0 **
> =>
> => fatls mmc 0:1
> ** Bad device mmc 0 **
>
>
> In both cases I have loaded the same image with:
>
> export BUILD_ROM=y
> make distclean && make qemu-x86_defconfig && make -j6
>
> qemu-system-x86_64 -m 1G -bios u-boot.rom -nographic \
> -netdev \
> user,id=eth0,tftp=tftp,net=192.168.76.0/24,dhcpstart=192.168.76.9 \
> -device e1000,netdev=eth0 -machine pc-i440fx-2.8 -hda img
>
> Best regards
>
> Heinrich
>

 Hello Bin, hello Simon,

 I think the bug is in functions ide_init (drivers/block/ide.c).

 Platform X86 implies CONFIG_BLK=y.

 So we should initialize ide_dev_desc[i].bdev.

 We don't, so blk_dread fails after finding no read operation with 
 ENOSYS
 when called from part_test_dos.

 The 

[U-Boot] [PATCH v2 4/4] cmd: ide: Make the first device the default one

[Bin Meng]

At present the IDE device number is initialized to -1, which means
we cannot type "ide read" command before setting the device number
via "ide device #".

For convenience, let's set the first device as the default one.

Signed-off-by: Bin Meng 

---

Changes in v2: None

 cmd/ide.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cmd/ide.c b/cmd/ide.c
index e3c3242..bdb5980 100644
--- a/cmd/ide.c
+++ b/cmd/ide.c
@@ -30,7 +30,7 @@
 #endif
 
 /* Current I/O Device  */
-static int curr_device = -1;
+static int curr_device;
 
 int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 {
-- 
2.9.2

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[U-Boot] [PATCH v2 2/4] block: ide: Fix block read/write with driver model

[Bin Meng]

This converts the IDE driver to driver model so that block read and
write are fully functional.

Fixes: b7c6baef ("x86: Convert MMC to driver model")
Reported-by: Heinrich Schuchardt 
Signed-off-by: Bin Meng 

---

Changes in v2:
- Fixed 'fatls ide 0' issue

 drivers/block/blk-uclass.c |  2 +-
 drivers/block/ide.c| 68 ++
 include/dm/uclass-id.h |  1 +
 3 files changed, 70 insertions(+), 1 deletion(-)

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index e5f00dc..8e58580 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -26,7 +26,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
-   [IF_TYPE_IDE]   = UCLASS_INVALID,
+   [IF_TYPE_IDE]   = UCLASS_IDE,
[IF_TYPE_SCSI]  = UCLASS_SCSI,
[IF_TYPE_ATAPI] = UCLASS_INVALID,
[IF_TYPE_USB]   = UCLASS_MASS_STORAGE,
diff --git a/drivers/block/ide.c b/drivers/block/ide.c
index ce51153..58b295e 100644
--- a/drivers/block/ide.c
+++ b/drivers/block/ide.c
@@ -827,12 +827,20 @@ void ide_init(void)
ide_ident(_dev_desc[i]);
dev_print(_dev_desc[i]);
 
+#ifndef CONFIG_BLK
if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
/* initialize partition type */
part_init(_dev_desc[i]);
}
+#endif
}
WATCHDOG_RESET();
+
+#ifdef CONFIG_BLK
+   struct udevice *dev;
+
+   uclass_first_device(UCLASS_IDE, );
+#endif
 }
 
 /* We only need to swap data if we are running on a big endian cpu. */
@@ -1147,6 +1155,21 @@ int ide_device_present(int dev)
 #endif
 
 #ifdef CONFIG_BLK
+static int ide_blk_probe(struct udevice *udev)
+{
+   struct blk_desc *desc = dev_get_uclass_platdata(udev);
+   int devnum = desc->devnum;
+
+   /* fill in device vendor/product/rev strings */
+   strncpy(desc->vendor, ide_dev_desc[devnum].vendor, BLK_VEN_SIZE);
+   strncpy(desc->product, ide_dev_desc[devnum].product, BLK_PRD_SIZE);
+   strncpy(desc->revision, ide_dev_desc[devnum].revision, BLK_REV_SIZE);
+
+   part_init(desc);
+
+   return 0;
+}
+
 static const struct blk_ops ide_blk_ops = {
.read   = ide_read,
.write  = ide_write,
@@ -1156,6 +1179,51 @@ U_BOOT_DRIVER(ide_blk) = {
.name   = "ide_blk",
.id = UCLASS_BLK,
.ops= _blk_ops,
+   .probe  = ide_blk_probe,
+};
+
+static int ide_probe(struct udevice *udev)
+{
+   struct udevice *blk_dev;
+   char name[20];
+   int blksz;
+   lbaint_t size;
+   int i;
+   int ret;
+
+   for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
+   if (ide_dev_desc[i].type != DEV_TYPE_UNKNOWN) {
+   sprintf(name, "blk#%d", i);
+
+   blksz = ide_dev_desc[i].blksz;
+   size = blksz * ide_dev_desc[i].lba;
+   ret = blk_create_devicef(udev, "ide_blk", name,
+IF_TYPE_IDE, i,
+blksz, size, _dev);
+   if (ret)
+   return ret;
+   }
+   }
+
+   return 0;
+}
+
+U_BOOT_DRIVER(ide) = {
+   .name   = "ide",
+   .id = UCLASS_IDE,
+   .probe  = ide_probe,
+};
+
+struct pci_device_id ide_supported[] = {
+   { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0x00) },
+   { }
+};
+
+U_BOOT_PCI_DEVICE(ide, ide_supported);
+
+UCLASS_DRIVER(ide) = {
+   .name   = "ide",
+   .id = UCLASS_IDE,
 };
 #else
 U_BOOT_LEGACY_BLK(ide) = {
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 1a50199..3fc2083 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -41,6 +41,7 @@ enum uclass_id {
UCLASS_I2C_EEPROM,  /* I2C EEPROM device */
UCLASS_I2C_GENERIC, /* Generic I2C device */
UCLASS_I2C_MUX, /* I2C multiplexer */
+   UCLASS_IDE, /* IDE device */
UCLASS_IRQ, /* Interrupt controller */
UCLASS_KEYBOARD,/* Keyboard input device */
UCLASS_LED, /* Light-emitting diode (LED) */
-- 
2.9.2

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[U-Boot] [PATCH v2 1/4] blk: Use macros for block device vendor/product/rev string size

[Bin Meng]

So far these are using magic numbers. Replace them with macros.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 include/blk.h | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/include/blk.h b/include/blk.h
index a106f9c..fced138 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -36,6 +36,10 @@ enum if_type {
IF_TYPE_COUNT,  /* Number of interface types */
 };
 
+#define BLK_VEN_SIZE   41
+#define BLK_PRD_SIZE   21
+#define BLK_REV_SIZE   9
+
 /*
  * With driver model (CONFIG_BLK) this is uclass platform data, accessible
  * with dev_get_uclass_platdata(dev)
@@ -60,9 +64,9 @@ struct blk_desc {
lbaint_tlba;/* number of blocks */
unsigned long   blksz;  /* block size */
int log2blksz;  /* for convenience: log2(blksz) */
-   charvendor[40+1];   /* IDE model, SCSI Vendor */
-   charproduct[20+1];  /* IDE Serial no, SCSI product */
-   charrevision[8+1];  /* firmware revision */
+   charvendor[BLK_VEN_SIZE];   /* device vendor string */
+   charproduct[BLK_PRD_SIZE];  /* device product number */
+   charrevision[BLK_REV_SIZE]; /* firmware revision */
 #if CONFIG_IS_ENABLED(BLK)
/*
 * For now we have a few functions which take struct blk_desc as a
-- 
2.9.2

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[U-Boot] [PATCH v2 3/4] block: ide: Don't bother to create BLK device if no CDROM inserted

[Bin Meng]

When there is no CDROM inserted, the block size is zero hence there
is no need to create a BLK device for it.

Signed-off-by: Bin Meng 
---

Changes in v2: None

 drivers/block/ide.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/block/ide.c b/drivers/block/ide.c
index 58b295e..8125ff8 100644
--- a/drivers/block/ide.c
+++ b/drivers/block/ide.c
@@ -1197,6 +1197,13 @@ static int ide_probe(struct udevice *udev)
 
blksz = ide_dev_desc[i].blksz;
size = blksz * ide_dev_desc[i].lba;
+
+   /*
+* With CDROM, if there is no CD inserted, blksz will
+* be zero, don't bother to create IDE block device.
+*/
+   if (!blksz)
+   continue;
ret = blk_create_devicef(udev, "ide_blk", name,
 IF_TYPE_IDE, i,
 blksz, size, _dev);
-- 
2.9.2

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Re: [U-Boot] ** Can't read Driver Desriptor Block **

[Bin Meng]

Hi Heinrich,

On Mon, Sep 4, 2017 at 1:41 PM, Heinrich Schuchardt  wrote:
> On 09/04/2017 05:59 AM, Bin Meng wrote:
>> Hi Heinrich,
>>
>> On Fri, Sep 1, 2017 at 1:24 AM, Heinrich Schuchardt  
>> wrote:
>>> On 08/31/2017 02:55 PM, Bin Meng wrote:
 Hi Simon,

 On Thu, Aug 31, 2017 at 8:52 PM, Simon Glass  wrote:
> Hi Bin,
>
> On 31 August 2017 at 10:53, Bin Meng  wrote:
>> Hi Heinrich,
>>
>> On Thu, Aug 31, 2017 at 5:19 AM, Heinrich Schuchardt 
>>  wrote:
>>> On 08/30/2017 06:37 AM, Heinrich Schuchardt wrote:


 On 08/30/2017 03:54 AM, Bin Meng wrote:
> Hi Heinrich,
>
> On Wed, Aug 30, 2017 at 4:26 AM, Heinrich Schuchardt 
>  wrote:
>> Hello Simon,
>>
>> U-Boot HEAD qemu-86_defconfig cannot discover an IDE disk with one 
>> FAT
>> partition in qemu-system-x86_64.
>>
>> By bisection I found this patch.
>>
>> b7c6baef2891ce8978cbfddb66e944943473ac21
>> x86: Convert MMC to driver model
>>
>> With this patch I get
>>
>> IDE:   Bus 0: OK Bus 1: OK
>>   Device 0: Model: QEMU HARDDISK  Firm: 2.5+ Ser#: QM1
>> Type: Hard Disk
>> Supports 48-bit addressing
>> Capacity: 128.0 MB = 0.1 GB (262144 x 512)
>> ** Can't read Driver Desriptor Block **
>>   Device 1: not available
>>   Device 2: Model: QEMU Firm: 2.5+ Ser#: QEMU DVD-ROM
>> Type: Removable CD ROM
>> Capacity: not available
>>   Device 3: not available
>>
>> => ide info
>> =>
>>
>> Without the patch I get=> ide info
>> Device 0: Model: QEMU HARDDISK  Firm: 2.5+ Ser#: QM1
>> Type: Hard Disk
>> Supports 48-bit addressing
>> Capacity: 128.0 MB = 0.1 GB (262144 x 512)
>> Device 2: Model: QEMU Firm: 2.5+ Ser#: QEMU DVD-ROM
>> Type: Removable CD ROM
>> Capacity: not available
>>
>> I think we observe two independent errors here:
>>
>> - The hard disk Device 0 is not read.
>> - The ide command stops at the first device that is not available.
>>
>> I guess only the first is caused by your patch.
>
> Both logs look fine to me. The "Can't read Driver Desriptor Block"
> comes from part_mac.c. Did you verify the actual IDE read/write fails
> with current HEAD?
>
> Regards,
> Bin
>

 Hello Bin,

 I have not checked block level read but used the shell commands for 
 testing.

 Before the patch I can read the directory of the drive:

 => ide info
 Device 0: Model: QEMU HARDDISK  Firm: 2.5+ Ser#: QM1
 Type: Hard Disk
 Supports 48-bit addressing
 Capacity: 128.0 MB = 0.1 GB (262144 x 512)
 Device 2: Model: QEMU Firm: 2.5+ Ser#: QEMU DVD-ROM
 Type: Removable CD ROM
 Capacity: not available
 => fat2ls ide 0:1
 Unknown command 'fat2ls' - try 'help'
 => fatls ide 0:1
164768   snp.efi
 0   file1
 0   file2


 After the patch (including HEAD) I cannot read the directory and cannot
 load the file snp.efi either:

 => ide info
 => fatls ide 0:1
 ** Bad device ide 0 **
 =>
 => fatls mmc 0:1
 ** Bad device mmc 0 **


 In both cases I have loaded the same image with:

 export BUILD_ROM=y
 make distclean && make qemu-x86_defconfig && make -j6

 qemu-system-x86_64 -m 1G -bios u-boot.rom -nographic \
 -netdev \
 user,id=eth0,tftp=tftp,net=192.168.76.0/24,dhcpstart=192.168.76.9 \
 -device e1000,netdev=eth0 -machine pc-i440fx-2.8 -hda img

 Best regards

 Heinrich

>>>
>>> Hello Bin, hello Simon,
>>>
>>> I think the bug is in functions ide_init (drivers/block/ide.c).
>>>
>>> Platform X86 implies CONFIG_BLK=y.
>>>
>>> So we should initialize ide_dev_desc[i].bdev.
>>>
>>> We don't, so blk_dread fails after finding no read operation with ENOSYS
>>> when called from part_test_dos.
>>>
>>> The following comment in include/blk.h confirms that bdev has to be 
>>> filled:
>>>
>>> #if CONFIG_IS_ENABLED(BLK)
>>> /*
>>> * For now we have a few functions which take struct blk_desc as a
>>> * parameter. This field allows 

[U-Boot] [PATCH 1/1] efi_loader: helloworld.c: remove superfluous include

[Heinrich Schuchardt]

Remove a superfluous include from helloworld.c

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/helloworld.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/lib/efi_loader/helloworld.c b/lib/efi_loader/helloworld.c
index 03e65ab133..77130a36dd 100644
--- a/lib/efi_loader/helloworld.c
+++ b/lib/efi_loader/helloworld.c
@@ -8,7 +8,6 @@
  */
 
 #include 
-#include 
 #include 
 
 efi_status_t EFIAPI efi_main(efi_handle_t handle,
-- 
2.11.0

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Re: [U-Boot] [PATCH 07/19] arm: socfpga: Add DRAM bank size initialization function

[Chee, Tien Fong]

On Rab, 2017-08-30 at 10:56 +0200, Marek Vasut wrote:
> On 08/30/2017 10:36 AM, Chee, Tien Fong wrote:
> > 
> > On Sel, 2017-08-29 at 13:59 +0200, Marek Vasut wrote:
> > > 
> > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> > > > 
> > > > 
> > > > From: Tien Fong Chee 
> > > > 
> > > > Add function for both multiple DRAM bank and single DRAM bank
> > > > size
> > > > initialization. This common functionality could be used by
> > > > every
> > > > single
> > > > SOCFPGA board.
> > > > 
> > > > Signed-off-by: Tien Fong Chee 
> > > > ---
> > > >  arch/arm/mach-socfpga/board.c|   12 
> > > >  include/configs/socfpga_common.h |1 +
> > > >  2 files changed, 13 insertions(+), 0 deletions(-)
> > > > 
> > > > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-
> > > > socfpga/board.c
> > > > index a41d089..3f2e30a 100644
> > > > --- a/arch/arm/mach-socfpga/board.c
> > > > +++ b/arch/arm/mach-socfpga/board.c
> > > > @@ -29,6 +29,18 @@ int board_init(void)
> > > >     return 0;
> > > >  }
> > > >  
> > > > +int dram_init_banksize(void)
> > > > +{
> > > > +#if !defined(CONFIG_SYS_SDRAM_BASE) &&
> > > > !defined(CONFIG_SYS_SDRAM_SIZE)
> > > > +   fdtdec_setup_memory_banksize();
> > > This should work on al boards, so why do you need this macro ?
> > > Also, this should go into arch/arm/ , not board/
> > > 
> > In case these macros are not defined, then we need to get the info
> > from
> > DTS. This is in arch/arm/mach-socpfga/board.c . I found some in
> > arch/arm, and other in board/ .
> Every socfpga platform in u-boot has a dts, so you can always extract
> the memory config from it and it's the preferred method.
> 
This implementation supports both method, from header or DTS.
> > 
> > > 
> > > > 
> > > > 
> > > > +#else
> > > > +   gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
> > > > +   gd->bd->bi_dram[0].size =  CONFIG_SYS_SDRAM_SIZE;
> > > > +#endif
> > > > +
> > > > +   return 0;
> > > > +}
> > > > +
> > > >  #ifdef CONFIG_USB_GADGET
> > > >  struct dwc2_plat_otg_data socfpga_otg_data = {
> > > >     .usb_gusbcfg= 0x1417,
> > > > diff --git a/include/configs/socfpga_common.h
> > > > b/include/configs/socfpga_common.h
> > > > index c15d244..05b03bd 100644
> > > > --- a/include/configs/socfpga_common.h
> > > > +++ b/include/configs/socfpga_common.h
> > > > @@ -47,6 +47,7 @@
> > > >     (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> > > >  
> > > >  #define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
> > > > +#define CONFIG_SYS_SDRAM_SIZE  PHYS_SDRAM_1_SIZE
> > > >  #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> > > >  #define CONFIG_SYS_TEXT_BASE   0x0840
> > > >  #else
> > > > 
> 
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Re: [U-Boot] [PATCH 05/19] arm: socfpga: Enhance FPGA program support with at least 4 byte data

[Chee, Tien Fong]

On Rab, 2017-08-30 at 10:55 +0200, Marek Vasut wrote:
> On 08/30/2017 10:24 AM, Chee, Tien Fong wrote:
> > 
> > On Sel, 2017-08-29 at 13:58 +0200, Marek Vasut wrote:
> > > 
> > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> > > > 
> > > > 
> > > > From: Tien Fong Chee 
> > > > 
> > > > This patch enables FPGA program with minimum 4 byte data size.
> > > What does that mean ? Expand the description, it's inobvious
> > > 
> > The exisitng FPGA program function only support the FPGA data which
> > size is >= 32 bytes. For the size smaller than that, the operation
> > would have failed.
> Because ... ?
> 
> And you fix it how ... ?
> 
> That should be in the commit message, describe the problem and how
> you
> fix it.
> 
Okay.
> > 
> > > 
> > > > 
> > > > 
> > > > Signed-off-by: Tien Fong Chee 
> > > > ---
> > > >  drivers/fpga/socfpga.c |   14 --
> > > >  1 files changed, 8 insertions(+), 6 deletions(-)
> > > > 
> > > > diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
> > > > index 28fa16b..6e14ebd 100644
> > > > --- a/drivers/fpga/socfpga.c
> > > > +++ b/drivers/fpga/socfpga.c
> > > > @@ -1,5 +1,5 @@
> > > >  /*
> > > > - * Copyright (C) 2012 Altera Corporation 
> > > > + * Copyright (C) 2012-2017 Altera Corporation 
> > > >   * All rights reserved.
> > > >   *
> > > >   * SPDX-License-Identifier:BSD-3-Clause
> > > > @@ -55,18 +55,20 @@ void fpgamgr_program_write(const void
> > > > *rbf_data, size_t rbf_size)
> > > >     uint32_t loops4 = DIV_ROUND_UP(rbf_size % 32, 4);
> > > >  
> > > >     asm volatile(
> > > > +   "   cmp %2, #0\n"
> > > > +   "   beq 2f\n"
> > > >     "1: ldmia   %0!,{r0-r7}\n"
> > > >     "   stmia   %1!,{r0-r7}\n"
> > > >     "   sub %1, #32\n"
> > > >     "   subs%2, #1\n"
> > > >     "   bne 1b\n"
> > > > -   "   cmp %3, #0\n"
> > > > -   "   beq 3f\n"
> > > > -   "2: ldr %2, [%0],   
> > > > #4\n
> > > > "
> > > > +   "2: cmp %3, #0\n"
> > > > +   "   beq 4f\n"
> > > > +   "3: ldr %2, [%0],   
> > > > #4\n
> > > > "
> > > >     "   str %2, [%1]\n"
> > > >     "   subs%3, #1\n"
> > > > -   "   bne 2b\n"
> > > > -   "3: nop\n"
> > > > +   "   bne 3b\n"
> > > > +   "4: nop\n"
> > > >     : "+r"(src), "+r"(dst), "+r"(loops32),
> > > > "+r"(loops4) :
> > > >     : "r0", "r1", "r2", "r3", "r4", "r5", "r6",
> > > > "r7",
> > > > "cc");
> > > >  }
> > > > 
> 
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Re: [U-Boot] [PATCH 03/19] arm: socfpga: Add driver for flash to program FPGA

[Chee, Tien Fong]

On Rab, 2017-08-30 at 10:52 +0200, Marek Vasut wrote:
> On 08/30/2017 10:05 AM, Chee, Tien Fong wrote:
> > 
> > On Sel, 2017-08-29 at 13:55 +0200, Marek Vasut wrote:
> > > 
> > > On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> > > > 
> > > > 
> > > > From: Tien Fong Chee 
> > > > 
> > > > This driver handles FPGA program operation from flash loading
> > > > RBF to memory and then to program FPGA.
> > > > 
> > > > Signed-off-by: Tien Fong Chee 
> > > > ---
> > > >  .../include/mach/fpga_manager_arria10.h|   27 ++
> > > >  drivers/fpga/socfpga_arria10.c |  386
> > > > +++-
> > > >  include/altera.h   |6 +
> > > >  include/configs/socfpga_common.h   |4 +
> > > >  4 files changed, 422 insertions(+), 1 deletions(-)
> > > > 
> > > > diff --git a/arch/arm/mach-
> > > > socfpga/include/mach/fpga_manager_arria10.h b/arch/arm/mach-
> > > > socfpga/include/mach/fpga_manager_arria10.h
> > > > index 9cbf696..93a9122 100644
> > > > --- a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
> > > > +++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
> > > > @@ -8,6 +8,8 @@
> > > >  #ifndef _FPGA_MANAGER_ARRIA10_H_
> > > >  #define _FPGA_MANAGER_ARRIA10_H_
> > > >  
> > > > +#include 
> > > > +
> > > >  #define ALT_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR_SET_MSK  
> > > > BIT(0)
> > > >  #define ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK 
> > > > BIT(1)
> > > >  #define ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK   
> > > > BIT(2)
> > > > @@ -89,11 +91,36 @@ struct socfpga_fpga_manager {
> > > >     u32  imgcfg_fifo_status;
> > > >  };
> > > >  
> > > > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > > > +enum rbf_type {unknown, periph_section, core_section};
> > > > +enum rbf_security {invalid, unencrypted, encrypted};
> > > > +
> > > > +struct rbf_info {
> > > > +   enum rbf_type section;
> > > > +   enum rbf_security security;
> > > > +};
> > > > +
> > > > +struct flash_info {
> > > > +   char *interface;
> > > > +   char *dev_part;
> > > > +   char *filename;
> > > > +   int fstype;
> > > > +   u32 remaining;
> > > > +   u32 flash_offset;
> > > > +   struct rbf_info rbfinfo;
> > > > +   struct image_header header;
> > > > +};
> > > > +#endif
> > > > +
> > > >  /* Functions */
> > > >  int fpgamgr_program_init(u32 * rbf_data, size_t rbf_size);
> > > >  int fpgamgr_program_finish(void);
> > > >  int is_fpgamgr_user_mode(void);
> > > >  int fpgamgr_wait_early_user_mode(void);
> > > > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > > > +const char *get_cff_filename(const void *fdt, int *len, u32
> > > > core);
> > > > +const char *get_cff_devpart(const void *fdt, int *len);
> > > > +#endif
> > > >  
> > > >  #endif /* __ASSEMBLY__ */
> > > >  
> > > > diff --git a/drivers/fpga/socfpga_arria10.c
> > > > b/drivers/fpga/socfpga_arria10.c
> > > > index 5c1a68a..90c55e5 100644
> > > > --- a/drivers/fpga/socfpga_arria10.c
> > > > +++ b/drivers/fpga/socfpga_arria10.c
> > > > @@ -13,6 +13,12 @@
> > > >  #include 
> > > >  #include 
> > > >  #include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > >  #include 
> > > >  #include 
> > > >  
> > > > @@ -22,6 +28,10 @@
> > > >  #define COMPRESSION_OFFSET 229
> > > >  #define FPGA_TIMEOUT_MSEC  1000  /* timeout in ms */
> > > >  #define FPGA_TIMEOUT_CNT   0x100
> > > > +#define RBF_UNENCRYPTED0xa65c
> > > > +#define RBF_ENCRYPTED  0xa65d
> > > > +#define ARRIA10RBF_PERIPH  0x0001
> > > > +#define ARRIA10RBF_CORE0x8001
> > > >  
> > > >  DECLARE_GLOBAL_DATA_PTR;
> > > >  
> > > > @@ -118,7 +128,7 @@ static int
> > > > wait_for_nconfig_pin_and_nstatus_pin(void)
> > > >     return wait_for_bit(__func__,
> > > >     _manager_base->imgcfg_stat,
> > > >     mask,
> > > > -   false, FPGA_TIMEOUT_MSEC, false);
> > > > +   true, FPGA_TIMEOUT_MSEC, false);
> > > >  }
> > > >  
> > > >  static int wait_for_f2s_nstatus_pin(unsigned long value)
> > > > @@ -453,6 +463,281 @@ int fpgamgr_program_finish(void)
> > > >     return 0;
> > > >  }
> > > >  
> > > > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > > > +const char *get_cff_filename(const void *fdt, int *len, u32
> > > > core)
> > > > +{
> > > > +   const char *cff_filename = NULL;
> > > > +   const char *cell;
> > > > +   int nodeoffset;
> > > > +   nodeoffset = fdt_subnode_offset(fdt, 0, "chosen");
> > > > +
> > > > +   if (nodeoffset >= 0) {
> > > > +   if (core)
> > > > +   cell = fdt_getprop(fdt,
> > > > +   nodeoffset,
> > > > +   "cffcore-file",
> > > > +

Re: [U-Boot] [PATCH 01/23] efi_loader: allow return value in EFI_CALL

[Simon Glass]

Hi Alex,

On 31 August 2017 at 21:58, Alexander Graf  wrote:
>
> On 08/31/2017 02:51 PM, Simon Glass wrote:
>>
>> On 27 August 2017 at 06:51, Heinrich Schuchardt  wrote:
>>>
>>> Macro EFI_CALL was introduced to call an UEFI function.
>>
>> Should this be 'an EFI'. Or 'a UEFI'?
>
>
> In a nutshell, EFI is the v1, proprietary, for pay, closed protocol while 
> UEFI is v2 and what edk2 implements, what you can get specs for, etc. But 
> since people started implementing things for v1 back in the day and they are 
> reasonable compatible, nobody calls UEFI UEFI, but just EFI :).
>
> It's a mess and I certainly didn't help it by calling everything EFI, but 
> it's what we're in and we should rather stay coherent IMHO. So EFI_CALL 
> really does call UEFI functions ;).

OK that's fine. Using EFI consistently seems like a good idea.

Regards,
Simon
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Re: [U-Boot] [next PATCH v2 2/2] ARM: mvebu: add additional information to board_add_ram_info()

[Stefan Roese]

On 04.09.2017 07:38, Chris Packham wrote:

From: Joshua Scott 

Display more information about the current RAM configuration. With these
changes the output on a 88F6820 board is

   SoC:   MV88F6820-A0 at 1600 MHz
   DRAM:  2 GiB (800 MHz, 32-bit, ECC not enabled)

Signed-off-by: Joshua Scott 
Signed-off-by: Chris Packham 
---
One of the hardware designers at $dayjob expressed a desire to keep
track of various tweaks to the DDR setup during hardware debugging
sessions. This is the result.

I've based this on what is available for the fsl platforms. It might be
nice to add a few more things but I'm concious of keeping the
information relevant and succinct.

Changes in v2:
- A375 and A38x have 16/32b DDR bus

  arch/arm/mach-mvebu/dram.c | 45 +
  1 file changed, 45 insertions(+)


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [next PATCH v2 1/2] ARM: mvebu: Add SoC IDs for Marvell's integrated CPUs

[Stefan Roese]

On 04.09.2017 07:38, Chris Packham wrote:

These SoCs are network packet processors (switch chips) with integrated
ARMv7 cores. They share a great deal of commonality with the Armada-XP
CPUs.

Signed-off-by: Chris Packham 
---
There are actually a number of IDs for these chips, probably a dozen in
total. I haven't enumerated them all in this patch, the 98DX4251,
98DX3336 and 98DX3236 are the base versions in their respective ranges.
These 3 IDs also happen to suit my immediate need but I can add the
additional ones in an follow up patch or a re-roll of this one.

Changes in v2:
- none

  arch/arm/mach-mvebu/cpu.c  | 14 ++
  arch/arm/mach-mvebu/include/mach/cpu.h |  1 +
  arch/arm/mach-mvebu/include/mach/soc.h |  3 +++
  3 files changed, 18 insertions(+)


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH] mvebu: turris_omnia: Only set eth?addr env if CONFIG_CMD_NET

[Stefan Roese]

Hi Marek,

On 03.09.2017 15:13, Marek Behún wrote:

Otherwise the linking will fail since eth_env_set_enetaddr cannot
be found.

Signed-off-by: Marek Behun 
---
  board/CZ.NIC/turris_omnia/turris_omnia.c | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c 
b/board/CZ.NIC/turris_omnia/turris_omnia.c
index af66837909..7db3b8ff3b 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -470,6 +470,7 @@ out:
return 0;
  }
  
+#if defined(CONFIG_ATSHA204A) && defined(CONFIG_CMD_NET)

  static void increment_mac(u8 *mac)
  {
int i;
@@ -480,10 +481,11 @@ static void increment_mac(u8 *mac)
break;
}
  }
+#endif
  
  int misc_init_r(void)

  {
-#ifdef CONFIG_ATSHA204A
+#if defined(CONFIG_ATSHA204A) && defined(CONFIG_CMD_NET)
int err;
struct udevice *dev = get_atsha204a_dev();
u8 mac0[4], mac1[4], mac[6];



Perhaps its better to select or imply ATSHA204A and CMD_NET for
turris_omnia in Kconfig instead. You can then remove all the #ifdef's
from the code here.

Just curious:
Where did you see this compile / linking problem. Compiling current
mainline does not cause any issues.

Thanks,
Stefan
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[U-Boot] [RESEND PATCH v3 5/7] Kconfig: Add LTC3882 voltage regulator config

[Rajesh Bhagat]

Adds below LTC3882 voltage regulator config:
CONFIG_VOL_MONITOR_LTC3882_READ
CONFIG_VOL_MONITOR_LTC3882_SET

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
 board/freescale/common/Kconfig | 16 
 1 file changed, 16 insertions(+)

diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig
index 8a5c456..3f44797 100644
--- a/board/freescale/common/Kconfig
+++ b/board/freescale/common/Kconfig
@@ -18,3 +18,19 @@ config CMD_ESBC_VALIDATE
 
esbc_validate - validate signature using RSA verification
esbc_halt - put the core in spin loop (Secure Boot Only)
+
+config VOL_MONITOR_LTC3882_READ
+   depends on VID
+   bool "Enable the LTC3882 voltage monitor read"
+   default n
+   help
+This option enables LTC3882 voltage monitor read
+functionality. It is used by common VID driver.
+
+config VOL_MONITOR_LTC3882_SET
+   depends on VID
+   bool "Enable the LTC3882 voltage monitor set"
+   default n
+   help
+This option enables LTC3882 voltage monitor set
+functionality. It is used by common VID driver.
-- 
2.7.4

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[U-Boot] [RESEND PATCH v3 7/7] ls1088a: Add VID support for QDS and RDB platforms

[Rajesh Bhagat]

This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems.
It reads the fusesr register and changes the VDD accordingly by adjusting the
voltage via LTC3882 regulator.

This patch also takes care of the special case of 0.9V VDD is present in
fusesr register. In that case,it also changes the SERDES voltage by disabling
the SERDES, changing the SVDD and then re-enabling SERDES.

Signed-off-by: Raghav Dogra 
Signed-off-by: Ashish Kumar 
Signed-off-by: Amrita Kumari 
Signed-off-by: Rajesh Bhagat 
---
Changes in v3:
 Restructured LS1088A VID support to use common VID driver
 Removed APIs getLSB/MSB and used bit operations.

Changes in v2:
 Checkpatch errors fixed

 board/freescale/ls1088a/ls1088a.c | 120 ++
 include/configs/ls1088aqds.h  |  13 +
 include/configs/ls1088ardb.h  |  14 +
 3 files changed, 147 insertions(+)

diff --git a/board/freescale/ls1088a/ls1088a.c 
b/board/freescale/ls1088a/ls1088a.c
index d1de4d1..e26d792 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -18,9 +18,13 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "../common/qixis.h"
 #include "ls1088a_qixis.h"
+#include "../common/vid.h"
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -295,6 +299,120 @@ void board_retimer_init(void)
/*return the default channel*/
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
 }
+int i2c_multiplexer_select_vid_channel(u8 channel)
+{
+   return select_i2c_ch_pca9547(channel);
+}
+
+#ifdef CONFIG_TARGET_LS1088AQDS
+/* read the current value(SVDD) of the LTM Regulator Voltage */
+int get_serdes_volt(void)
+{
+   int  ret, vcode = 0;
+   u8 chan = PWM_CHANNEL0;
+
+   /* Select the PAGE 0 using PMBus commands PAGE for VDD */
+   ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
+   PMBUS_CMD_PAGE, 1, , 1);
+   if (ret) {
+   printf("VID: failed to select VDD Page 0\n");
+   return ret;
+   }
+
+   /* Read the output voltage using PMBus command READ_VOUT */
+   ret = i2c_read(I2C_SVDD_MONITOR_ADDR,
+  PMBUS_CMD_READ_VOUT, 1, (void *), 2);
+   if (ret) {
+   printf("VID: failed to read the volatge\n");
+   return ret;
+   }
+   return vcode;
+}
+
+int set_serdes_volt(int svdd)
+{
+   int ret, vdd_last;
+   u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND,
+   svdd & 0xFF, (svdd & 0xFF00) >> 8};
+
+   /* Write the desired voltage code to the SVDD regulator */
+   ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
+   PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *), 5);
+   if (ret) {
+   printf("VID: I2C failed to write to the volatge regulator\n");
+   return -1;
+   }
+
+   /* Wait for the volatge to get to the desired value */
+   do {
+   vdd_last = get_serdes_volt();
+   if (vdd_last < 0) {
+   printf("VID: Couldn't read sensor abort VID adjust\n");
+   return -1;
+   }
+   } while (vdd_last != svdd);
+
+   return 1;
+}
+#else
+int get_serdes_volt(void)
+{
+   return 0;
+}
+
+int set_serdes_volt(int svdd)
+{
+   int ret;
+   u8 brdcfg4;
+
+   printf("SVDD changing of RDB\n");
+
+   /* Read the BRDCFG54 via CLPD */
+   ret = i2c_read(CONFIG_SYS_I2C_FPGA_ADDR,
+   QIXIS_BRDCFG4_OFFSET, 1, (void *), 1);
+   if (ret) {
+   printf("VID: I2C failed to read the CPLD BRDCFG4\n");
+   return -1;
+   }
+
+   brdcfg4 = brdcfg4 | 0x08;
+
+   /* Write to the BRDCFG4 */
+   ret = i2c_write(CONFIG_SYS_I2C_FPGA_ADDR,
+   QIXIS_BRDCFG4_OFFSET, 1, (void *), 1);
+   if (ret) {
+   debug("VID: I2C failed to set the SVDD CPLD BRDCFG4\n");
+   return -1;
+   }
+
+   /* Wait for the volatge to get to the desired value */
+   udelay(1);
+
+   return 1;
+}
+#endif
+
+/* this function disables the SERDES, changes the SVDD Voltage and enables it*/
+int board_adjust_vdd(int vdd)
+{
+   int ret = 0;
+
+   debug("%s: vdd = %d\n", __func__, vdd);
+
+   /* Special settings to be performed when voltage is 900mV */
+   if (vdd == 900) {
+#ifdef CONFIG_SYS_FSL_DDR
+   ddr_enable_0v9_volt(true);
+#endif
+   ret = setup_serdes_volt(vdd);
+   if (ret < 0) {
+   ret = -1;
+   goto exit;
+   }
+   }
+exit:
+   return ret;
+}
 
 int board_init(void)
 {
@@ -314,6 +432,8 @@ int board_init(void)
/* invert AQR105 IRQ pins polarity */
out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR105_IRQ_MASK);
 #endif
+   if (adjust_vdd(0) < 0)
+   printf("core voltage not 

[U-Boot] [RESEND PATCH v3 3/7] board: common: vid: Add board specific vdd adjust API

[Rajesh Bhagat]

Adds a board specific API namely board_adjust_vdd which
is required to define the board VDD adjust settings.

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
 board/freescale/common/vid.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index f4fc95b..921841f 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -34,6 +34,14 @@ int __weak board_vdd_drop_compensation(void)
 }
 
 /*
+ * Board specific settings for specific voltage value
+ */
+int __weak board_adjust_vdd(int vdd)
+{
+   return 0;
+}
+
+/*
  * Get the i2c address configuration for the IR regulator chip
  *
  * There are some variance in the RDB HW regarding the I2C address 
configuration
@@ -453,6 +461,11 @@ int adjust_vdd(ulong vdd_override)
vdd_last = set_voltage(i2caddress, vdd_current);
}
 
+   if (board_adjust_vdd(vdd_target) < 0) {
+   ret = -1;
+   goto exit;
+   }
+
if (vdd_last > 0)
printf("VID: Core voltage after adjustment is at %d mV\n",
   vdd_last);
-- 
2.7.4

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[U-Boot] [RESEND PATCH v3 2/7] board: common:vid: Add LS1088A VID Supported voltage values

[Rajesh Bhagat]

Adds below voltage values supported by LS1088A Soc:

1.025 V(default), 0.9875V, 0.9750 V, 0.9V, 1.0 V, 1.0125 V, 1.0250 V

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
 board/freescale/common/vid.c | 21 +
 1 file changed, 21 insertions(+)

diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index d6d1bfc..f4fc95b 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -296,15 +296,28 @@ int adjust_vdd(ulong vdd_override)
unsigned long vdd_string_override;
char *vdd_string;
static const uint16_t vdd[32] = {
+#ifdef CONFIG_ARCH_LS1088A
+   10250,
+   9875,
+#else
10500,
0,  /* reserved */
+#endif
9750,
0,  /* reserved */
+#ifdef CONFIG_ARCH_LS1088A
+   0,  /* reserved */
+#else
9500,
+#endif
0,  /* reserved */
0,  /* reserved */
0,  /* reserved */
+#ifdef CONFIG_ARCH_LS1088A
+   9000,
+#else
0,  /* reserved */
+#endif
0,  /* reserved */
0,  /* reserved */
0,  /* reserved */
@@ -313,10 +326,18 @@ int adjust_vdd(ulong vdd_override)
0,  /* reserved */
0,  /* reserved */
1,  /* 1.V */
+#ifdef CONFIG_ARCH_LS1088A
+   10125,
+#else
0,  /* reserved */
+#endif
10250,
0,  /* reserved */
+#ifdef CONFIG_ARCH_LS1088A
+   0,  /* reserved */
+#else
10500,
+#endif
0,  /* reserved */
0,  /* reserved */
0,  /* reserved */
-- 
2.7.4

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[U-Boot] [RESEND PATCH v3 6/7] board: common: vid: Add support for LTC3882 voltage regulator chip

[Rajesh Bhagat]

Restructures common driver to support LTC3882 voltage regulator
chip.

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
Changes in v3:
 Restructured LS1088A VID support to use common VID driver
 Added the coding for voltage in comments i.e. 1/4096V
 Removed APIs getLSB/MSB and used bit operations.

Changes in v2:
 Checkpatch errors fixed

 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  9 ++-
 board/freescale/common/vid.c   | 76 ++
 include/configs/ls1088aqds.h   | 16 +
 include/configs/ls1088ardb.h   | 15 +
 4 files changed, 114 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 2706ea8..1394b75 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -184,10 +184,15 @@ struct ccsr_gur {
u32 gpporcr3;
u32 gpporcr4;
u8  res_030[0x60-0x30];
-#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 2
 #define FSL_CHASSIS3_DCFG_FUSESR_VID_MASK  0x1F
-#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT  7
 #define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK   0x1F
+#if defined(CONFIG_ARCH_LS1088A)
+#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 25
+#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT  20
+#else
+#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 2
+#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT  7
+#endif
u32 dcfg_fusesr;/* Fuse status register */
u8  res_064[0x70-0x64];
u32 devdisr;/* Device disable control 1 */
diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index cdf877d..42201d3 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -171,6 +171,36 @@ static int read_voltage_from_IR(int i2caddress)
 }
 #endif
 
+#ifdef CONFIG_VOL_MONITOR_LTC3882_READ
+/* read the current value of the LTC Regulator Voltage */
+static int read_voltage_from_LTC(int i2caddress)
+{
+   int  ret, vcode = 0;
+   u8 chan = PWM_CHANNEL0;
+
+   /* select the PAGE 0 using PMBus commands PAGE for VDD*/
+   ret = i2c_write(I2C_VOL_MONITOR_ADDR,
+   PMBUS_CMD_PAGE, 1, , 1);
+   if (ret) {
+   printf("VID: failed to select VDD Page 0\n");
+   return ret;
+   }
+
+   /*read the output voltage using PMBus command READ_VOUT*/
+   ret = i2c_read(I2C_VOL_MONITOR_ADDR,
+  PMBUS_CMD_READ_VOUT, 1, (void *), 2);
+   if (ret) {
+   printf("VID: failed to read the volatge\n");
+   return ret;
+   }
+
+   /* Scale down to the real mV as LTC resolution is 1/4096V,rounding up */
+   vcode = DIV_ROUND_UP(vcode * 1000, 4096);
+
+   return vcode;
+}
+#endif
+
 static int read_voltage(int i2caddress)
 {
int voltage_read;
@@ -178,6 +208,8 @@ static int read_voltage(int i2caddress)
voltage_read = read_voltage_from_INA220(i2caddress);
 #elif defined CONFIG_VOL_MONITOR_IR36021_READ
voltage_read = read_voltage_from_IR(i2caddress);
+#elif defined CONFIG_VOL_MONITOR_LTC3882_READ
+   voltage_read = read_voltage_from_LTC(i2caddress);
 #else
return -1;
 #endif
@@ -278,6 +310,42 @@ static int set_voltage_to_IR(int i2caddress, int vdd)
debug("VID: Current voltage is %d mV\n", vdd_last);
return vdd_last;
 }
+
+#endif
+
+#ifdef CONFIG_VOL_MONITOR_LTC3882_SET
+/* this function sets the VDD and returns the value set */
+static int set_voltage_to_LTC(int i2caddress, int vdd)
+{
+   int ret, vdd_last, vdd_target = vdd;
+
+   /* Scale up to the LTC resolution is 1/4096V */
+   vdd = (vdd * 4096) / 1000;
+
+   /* 5-byte buffer which needs to be sent following the
+* PMBus command PAGE_PLUS_WRITE.
+*/
+   u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND,
+   vdd & 0xFF, (vdd & 0xFF00) >> 8};
+
+   /* Write the desired voltage code to the regulator */
+   ret = i2c_write(I2C_VOL_MONITOR_ADDR,
+   PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *), 5);
+   if (ret) {
+   printf("VID: I2C failed to write to the volatge regulator\n");
+   return -1;
+   }
+
+   /* Wait for the volatge to get to the desired value */
+   do {
+   vdd_last = read_voltage_from_LTC(i2caddress);
+   if (vdd_last < 0) {
+   printf("VID: Couldn't read sensor abort VID adjust\n");
+   return -1;
+   }
+   } while (vdd_last != vdd_target);
+   return vdd_last;
+}
 #endif
 
 static int set_voltage(int i2caddress, int vdd)
@@ -286,6 +354,8 @@ static int set_voltage(int i2caddress, int vdd)
 
 #ifdef CONFIG_VOL_MONITOR_IR36021_SET
vdd_last = 

[U-Boot] [RESEND PATCH v3 0/7] Add VID support for QDS and RDB platforms

[Rajesh Bhagat]

Adds LTC3882 voltage regulator chip support in common VID driver.
And adds VID support for LS1088A QDS and RDB platforms.

Rajesh Bhagat (7):
  armv8: lsch3: Add serdes and DDR voltage setup
  board: common:vid: Add LS1088A VID Supported voltage values
  board: common: vid: Add board specific vdd adjust API
  board: common: vid: Move IR chip specific code in flag
  Kconfig: Add LTC3882 voltage regulator config
  board: common: vid: Add support for LTC3882 voltage regulator chip
  ls1088a: Add VID support for QDS and RDB platforms

 .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c| 274 +
 arch/arm/cpu/armv8/fsl-layerscape/soc.c|  34 +--
 .../include/asm/arch-fsl-layerscape/fsl_serdes.h   |   2 +-
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  43 +++-
 arch/arm/include/asm/arch-fsl-layerscape/soc.h |   1 +
 board/freescale/common/Kconfig |  16 ++
 board/freescale/common/vid.c   | 120 -
 board/freescale/ls1088a/ls1088a.c  | 120 +
 include/configs/ls1088aqds.h   |  29 +++
 include/configs/ls1088ardb.h   |  29 +++
 10 files changed, 647 insertions(+), 21 deletions(-)

-- 
Changes in v3:
 Restructured LS1088A VID support to use common VID driver
 Cosmetic review comments fixed
 Added __iomem for accessing registers
 Added the coding for voltage in comments i.e. 1/4096V
 Removed APIs getLSB/MSB and used bit operations. 

Changes in v2:
 Checkpatch errors fixed

Depends on below patches:
http://patchwork.ozlabs.org/patch/803042
http://patchwork.ozlabs.org/patch/803043
http://patchwork.ozlabs.org/patch/803045

2.7.4

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[U-Boot] [RESEND PATCH v3 4/7] board: common: vid: Move IR chip specific code in flag

[Rajesh Bhagat]

Moves IR chip (IR36021) specific code in flag to resolve
compilation issue where it is not present. For example,
LS1088A is having a new LTC3882 voltage chip.

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
 board/freescale/common/vid.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index 921841f..cdf877d 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -184,6 +184,7 @@ static int read_voltage(int i2caddress)
return voltage_read;
 }
 
+#ifdef CONFIG_VOL_MONITOR_IR36021_SET
 /*
  * We need to calculate how long before the voltage stops to drop
  * or increase. It returns with the loop count. Each loop takes
@@ -243,7 +244,6 @@ static int wait_for_voltage_stable(int i2caddress)
return vdd_current;
 }
 
-#ifdef CONFIG_VOL_MONITOR_IR36021_SET
 /* Set the voltage to the IR chip */
 static int set_voltage_to_IR(int i2caddress, int vdd)
 {
@@ -298,7 +298,12 @@ int adjust_vdd(ulong vdd_override)
int re_enable = disable_interrupts();
struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
u32 fusesr;
+#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
+   defined(CONFIG_VOL_MONITOR_IR36021_READ)
u8 vid, buf;
+#else
+   u8 vid;
+#endif
int vdd_target, vdd_current, vdd_last;
int ret, i2caddress;
unsigned long vdd_string_override;
@@ -369,6 +374,8 @@ int adjust_vdd(ulong vdd_override)
ret = -1;
goto exit;
}
+#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
+   defined(CONFIG_VOL_MONITOR_IR36021_READ)
ret = find_ir_chip_on_i2c();
if (ret < 0) {
printf("VID: Could not find voltage regulator on I2C.\n");
@@ -393,6 +400,7 @@ int adjust_vdd(ulong vdd_override)
ret = -1;
goto exit;
}
+#endif
 
/* get the voltage ID from fuse status register */
fusesr = in_le32(>dcfg_fusesr);
-- 
2.7.4

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[U-Boot] [RESEND PATCH v3 1/7] armv8: lsch3: Add serdes and DDR voltage setup

[Rajesh Bhagat]

Adds SERDES voltage and reset SERDES lanes API and makes
enable/disable DDR controller support 0.9V API common.

Signed-off-by: Ashish Kumar 
Signed-off-by: Rajesh Bhagat 
---
Changes in v3:
 Restructured LS1088A VID support to use common VID driver
 Cosmetic review comments fixed
 Added __iomem for accessing registers

Changes in v2:
 Checkpatch errors fixed

 .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c| 274 +
 arch/arm/cpu/armv8/fsl-layerscape/soc.c|  34 +--
 .../include/asm/arch-fsl-layerscape/fsl_serdes.h   |   2 +-
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  34 +++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h |   1 +
 5 files changed, 327 insertions(+), 18 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 179cac6..39f2cdf 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -158,6 +158,280 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 
sd_prctl_mask,
serdes_prtcl_map[NONE] = 1;
 }
 
+__weak int get_serdes_volt(void)
+{
+   return -1;
+}
+
+__weak int set_serdes_volt(int svdd)
+{
+   return -1;
+}
+
+int setup_serdes_volt(u32 svdd)
+{
+   struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+   struct ccsr_serdes __iomem *serdes1_base;
+   u32 cfg_rcwsrds1 = gur_in32(>rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]);
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   struct ccsr_serdes __iomem *serdes2_base;
+   u32 cfg_rcwsrds2 = gur_in32(>rcwsr[FSL_CHASSIS3_SRDS2_REGSR - 1]);
+#endif
+   u32 cfg_tmp, reg = 0;
+   int svdd_cur, svdd_tar;
+   int ret = 1;
+   int i;
+
+   /* Only support switch SVDD to 900mV */
+   if (svdd != 900)
+   return -1;
+
+   /* Scale up to the LTC resolution is 1/4096V */
+   svdd = (svdd * 4096) / 1000;
+
+   svdd_tar = svdd;
+   svdd_cur = get_serdes_volt();
+   if (svdd_cur < 0)
+   return -EINVAL;
+
+   debug("%s: current SVDD: %x; target SVDD: %x\n",
+ __func__, svdd_cur, svdd_tar);
+   if (svdd_cur == svdd_tar)
+   return 0;
+
+   serdes1_base = (void *)CONFIG_SYS_FSL_LSCH3_SERDES_ADDR;
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   serdes2_base =  (void *)(CONFIG_SYS_FSL_LSCH3_SERDES_ADDR + 0x1);
+#endif
+
+   /* Put the all enabled lanes in reset */
+#ifdef CONFIG_SYS_FSL_SRDS_1
+   cfg_tmp = cfg_rcwsrds1 & FSL_CHASSIS3_SRDS1_PRTCL_MASK;
+   cfg_tmp >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT;
+
+   for (i = 0; i < 4 && cfg_tmp & (0xf << (3 - i)); i++) {
+   reg = in_le32(_base->lane[i].gcr0);
+   reg &= 0xFF9F;
+   out_le32(_base->lane[i].gcr0, reg);
+   }
+#endif
+
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   cfg_tmp = cfg_rcwsrds2 & FSL_CHASSIS3_SRDS2_PRTCL_MASK;
+   cfg_tmp >>= FSL_CHASSIS3_SRDS2_PRTCL_SHIFT;
+
+   for (i = 0; i < 4 && cfg_tmp & (0xf << (3 - i)); i++) {
+   reg = in_le32(_base->lane[i].gcr0);
+   reg &= 0xFF9F;
+   out_le32(_base->lane[i].gcr0, reg);
+   }
+#endif
+
+   /* Put the all enabled PLL in reset */
+#ifdef CONFIG_SYS_FSL_SRDS_1
+   cfg_tmp = cfg_rcwsrds1 & 0x3;
+   for (i = 0; i < 2 && !(cfg_tmp & (0x1 << (1 - i))); i++) {
+   reg = in_le32(_base->bank[i].rstctl);
+   reg &= 0xFFBF;
+   reg |= 0x1000;
+   out_le32(_base->bank[i].rstctl, reg);
+   }
+   udelay(1);
+
+   reg = in_le32(_base->bank[i].rstctl);
+   reg &= 0xFF1F;
+   out_le32(_base->bank[i].rstctl, reg);
+#endif
+
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   cfg_tmp = cfg_rcwsrds1 & 0xC;
+   cfg_tmp >>= 2;
+   for (i = 0; i < 2 && !(cfg_tmp & (0x1 << (1 - i))); i++) {
+   reg = in_le32(_base->bank[i].rstctl);
+   reg &= 0xFFBF;
+   reg |= 0x1000;
+   out_le32(_base->bank[i].rstctl, reg);
+   }
+   udelay(1);
+
+   reg = in_le32(_base->bank[i].rstctl);
+   reg &= 0xFF1F;
+   out_le32(_base->bank[i].rstctl, reg);
+#endif
+
+   /* Put the Rx/Tx calibration into reset */
+#ifdef CONFIG_SYS_FSL_SRDS_1
+   reg = in_le32(_base->srdstcalcr);
+   reg &= 0xF7FF;
+   out_le32(_base->srdstcalcr, reg);
+   reg = in_le32(_base->srdsrcalcr);
+   reg &= 0xF7FF;
+   out_le32(_base->srdsrcalcr, reg);
+#endif
+
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   reg = in_le32(_base->srdstcalcr);
+   reg &= 0xF7FF;
+   out_le32(_base->srdstcalcr, reg);
+   reg = in_le32(_base->srdsrcalcr);
+   reg &= 0xF7FF;
+   out_le32(_base->srdsrcalcr, reg);
+#endif
+
+   ret = set_serdes_volt(svdd);
+   if (ret < 0) {
+   printf("could not change SVDD\n");
+   ret = 

[U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

[Hannes Schmelzer]

"U-Boot"  schrieb am 01.09.2017 16:39:03:

> Von: Jagan Teki 
> An: Hannes Schmelzer 
> Kopie: "u-boot@lists.denx.de >> u-boot" , 
e...@systemsoft.no
> Datum: 01.09.2017 16:39
> Betreff: Re: [U-Boot] QSPI "sf probe ...", "sf read ..." on Altera SoC 
FPGA
> Gesendet von: "U-Boot" 
> 
> On Fri, Sep 1, 2017 at 5:23 PM, Hannes Schmelzer 
 wrote:
> > Hi Eldor,
> >
> > just found your post in the mailinglist.
> >
> > https://lists.denx.de/pipermail/u-boot/2016-December/276491.html
> >
> > Reason why i'm searched there is, that i've now excactly same problem 
as
> > you.
> 
> Can you give some details, issue came-up while 'sf probe' or 'sf read' ?

Hi Jagan,
please have a look into the weblink to the denx mailing list server.
I have basically same trouble as eldor reported the days ago.

A simple 'sf probe' ends up in a 
### ERROR ### Please RESET the board ###
Interesting detail is, that the information about the flash (type, size, 
...) is printed out quite before the "hang".

On wednesday i have the next time-slot to access the socfpga devkit board.
So i could bring in more details if necessary.

> 
> thanks!
> -- 
> Jagan Teki

cheers,
Hannes


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