Re: [PATCH 01/26] Revert "pci: pci-uclass: Dynamically allocate the PCI regions"

2021-02-09 Thread Stefan Roese

Hi Simon, Bin & Tom,

On 10.02.21 06:10, Simon Glass wrote:

Hi Bin,

On Tue, 9 Feb 2021 at 17:47, Bin Meng  wrote:


Hi Simon,

On Sun, Feb 7, 2021 at 11:34 PM Simon Glass  wrote:


Hi Bin,

On Sun, 7 Feb 2021 at 08:11, Bin Meng  wrote:


This reverts commit e002474158d1054a7a2ff9a66149384c639ff242.

Commit e002474158d1 ("pci: pci-uclass: Dynamically allocate the PCI regions")
changes 'struct pci_controller'.regions from pre-allocated array of
regions to dynamically allocated, which unfortunately broken lots of
boards that still use the non-DM PCI driver.

We may update every non-DM PCI board codes to do the dynamical
allocation of PCI regions but that's a lot of work (e.g.: almost
all Freescale PowerPC boards are broken now and need to be fixed).
Let's do the easy way.


No one has noticed since July, apparently. I think it would be better
to disable PCI on these boards, until either someone migrates them or
they are removed. The PCI deadline was about 18 months ago.



Yep, but I'd like to keep this revert instead of just fixing the
qemu-ppce500 here, to give people a chance to test their original
non-DM version of PCI driver before the DM conversion.

Once all boards have converted to DM PCI, we can revert this revert patch again.


I'm fine with that if Tom is. But deleting unmaintained code is always
another option!


Sorry for chiming in this late in this discussion. If we decide to
revert this patch, this will break OcteonTX/TX2 support. As we need
a higher value for the PCI regions here. Originally we just increased
MAX_PCI_REGIONS to 10. This dynamic allocation superseeded this change.
This increase might introduce size issues on other platforms though.

So please keep this in mind that with the revert the value of
MAX_PCI_REGIONS needs to get increased to 10 - at least for Octeon TX.

Thanks,
Stefan


Re: [PATCH 14/25] arm: Remove sheevaplug board

2021-02-09 Thread Chris Packham
On Wed, 10 Feb 2021, 2:07 AM Tom Rini,  wrote:

> This board has not been converted to CONFIG_DM_MMC by the deadline of
> v2019.04, which is almost two years ago.  In addition there are other DM
> migrations it is also missing.  Remove it.
>

We did get the odd bug report from debian for sheevaplug. They were
reasonably popular with enthusiasts at one point. Personally I wouldn't
miss this board but it might be worth a heads up (hence adding Vagrant C.
to the Cc).


> Cc: Prafulla Wadaskar 
> Signed-off-by: Tom Rini 
> ---
>  arch/arm/dts/Makefile|   3 +-
>  arch/arm/dts/kirkwood-sheevaplug-common.dtsi | 104 --
>  arch/arm/dts/kirkwood-sheevaplug.dts |  42 --
>  arch/arm/mach-kirkwood/Kconfig   |   4 -
>  board/Marvell/sheevaplug/Kconfig |  12 --
>  board/Marvell/sheevaplug/MAINTAINERS |   6 -
>  board/Marvell/sheevaplug/Makefile|   7 -
>  board/Marvell/sheevaplug/kwbimage.cfg| 144 ---
>  board/Marvell/sheevaplug/sheevaplug.c| 135 -
>  board/Marvell/sheevaplug/sheevaplug.h|  24 
>  configs/sheevaplug_defconfig |  55 ---
>  include/configs/sheevaplug.h |  73 --
>  12 files changed, 1 insertion(+), 608 deletions(-)
>  delete mode 100644 arch/arm/dts/kirkwood-sheevaplug-common.dtsi
>  delete mode 100644 arch/arm/dts/kirkwood-sheevaplug.dts
>  delete mode 100644 board/Marvell/sheevaplug/Kconfig
>  delete mode 100644 board/Marvell/sheevaplug/MAINTAINERS
>  delete mode 100644 board/Marvell/sheevaplug/Makefile
>  delete mode 100644 board/Marvell/sheevaplug/kwbimage.cfg
>  delete mode 100644 board/Marvell/sheevaplug/sheevaplug.c
>  delete mode 100644 board/Marvell/sheevaplug/sheevaplug.h
>  delete mode 100644 configs/sheevaplug_defconfig
>  delete mode 100644 include/configs/sheevaplug.h
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index b8f88bca0af9..12a74ed0eb08 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -58,8 +58,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \
> kirkwood-ns2lite.dtb \
> kirkwood-ns2max.dtb \
> kirkwood-ns2mini.dtb \
> -   kirkwood-pogo_e02.dtb \
> -   kirkwood-sheevaplug.dtb
> +   kirkwood-pogo_e02.dtb
>
>  dtb-$(CONFIG_MACH_S900) += \
> bubblegum_96.dtb
> diff --git a/arch/arm/dts/kirkwood-sheevaplug-common.dtsi
> b/arch/arm/dts/kirkwood-sheevaplug-common.dtsi
> deleted file mode 100644
> index 0a698d3b7393..
> --- a/arch/arm/dts/kirkwood-sheevaplug-common.dtsi
> +++ /dev/null
> @@ -1,104 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0
> -/*
> - * kirkwood-sheevaplug-common.dtsi - Common parts for Sheevaplugs
> - *
> - * Copyright (C) 2013 Simon Baatz 
> - */
> -
> -#include "kirkwood.dtsi"
> -#include "kirkwood-6281.dtsi"
> -
> -/ {
> -   memory {
> -   device_type = "memory";
> -   reg = <0x 0x2000>;
> -   };
> -
> -   chosen {
> -   bootargs = "console=ttyS0,115200n8 earlyprintk";
> -   stdout-path = 
> -   };
> -
> -   ocp@f100 {
> -   pinctrl: pin-controller@1 {
> -
> -   pmx_usb_power_enable: pmx-usb-power-enable {
> -   marvell,pins = "mpp29";
> -   marvell,function = "gpio";
> -   };
> -   pmx_led_red: pmx-led-red {
> -   marvell,pins = "mpp46";
> -   marvell,function = "gpio";
> -   };
> -   pmx_led_blue: pmx-led-blue {
> -   marvell,pins = "mpp49";
> -   marvell,function = "gpio";
> -   };
> -   pmx_sdio_cd: pmx-sdio-cd {
> -   marvell,pins = "mpp44";
> -   marvell,function = "gpio";
> -   };
> -   pmx_sdio_wp: pmx-sdio-wp {
> -   marvell,pins = "mpp47";
> -   marvell,function = "gpio";
> -   };
> -   };
> -   serial@12000 {
> -   status = "okay";
> -   };
> -   };
> -
> -   regulators {
> -   compatible = "simple-bus";
> -   #address-cells = <1>;
> -   #size-cells = <0>;
> -   pinctrl-0 = <_usb_power_enable>;
> -   pinctrl-names = "default";
> -
> -   usb_power: regulator@1 {
> -   compatible = "regulator-fixed";
> -   reg = <1>;
> -   regulator-name = "USB Power";
> -   regulator-min-microvolt = <500>;
> -   regulator-max-microvolt = <500>;
> -   enable-active-high;
> 

Re: [PATCH 24/25] arm: Remove db-88f6281-bp board

2021-02-09 Thread Chris Packham
On Wed, 10 Feb 2021, 2:04 AM Tom Rini,  wrote:

> This board has not been converted to CONFIG_DM_MMC by the deadline of
> v2019.04, which is almost two years ago.  In addition there are other DM
> migrations it is also missing.  Remove it.
>
> Cc: Chris Packham 
> Signed-off-by: Tom Rini 
>

I did have every intention of finishing off the migration but the reference
board I have has gathered plenty of dust. So reluctantly

Acked-by: Chris Packham 

---
>  arch/arm/dts/Makefile   |   2 -
>  arch/arm/dts/kirkwood-db-88f6281-spi.dts|  48 -
>  arch/arm/dts/kirkwood-db-88f6281.dts|  26 -
>  arch/arm/dts/kirkwood-db.dtsi   |  94 -
>  arch/arm/mach-kirkwood/Kconfig  |   4 -
>  board/Marvell/db-88f6281-bp/.gitignore  |   1 -
>  board/Marvell/db-88f6281-bp/Kconfig |  12 ---
>  board/Marvell/db-88f6281-bp/MAINTAINERS |  10 --
>  board/Marvell/db-88f6281-bp/Makefile|  12 ---
>  board/Marvell/db-88f6281-bp/db-88f6281-bp.c | 106 
>  board/Marvell/db-88f6281-bp/kwbimage.cfg.in |  36 ---
>  configs/db-88f6281-bp-nand_defconfig|  64 
>  configs/db-88f6281-bp-spi_defconfig |  63 
>  include/configs/db-88f6281-bp.h |  83 ---
>  14 files changed, 561 deletions(-)
>  delete mode 100644 arch/arm/dts/kirkwood-db-88f6281-spi.dts
>  delete mode 100644 arch/arm/dts/kirkwood-db-88f6281.dts
>  delete mode 100644 arch/arm/dts/kirkwood-db.dtsi
>  delete mode 100644 board/Marvell/db-88f6281-bp/.gitignore
>  delete mode 100644 board/Marvell/db-88f6281-bp/Kconfig
>  delete mode 100644 board/Marvell/db-88f6281-bp/MAINTAINERS
>  delete mode 100644 board/Marvell/db-88f6281-bp/Makefile
>  delete mode 100644 board/Marvell/db-88f6281-bp/db-88f6281-bp.c
>  delete mode 100644 board/Marvell/db-88f6281-bp/kwbimage.cfg.in
>  delete mode 100644 configs/db-88f6281-bp-nand_defconfig
>  delete mode 100644 configs/db-88f6281-bp-spi_defconfig
>  delete mode 100644 include/configs/db-88f6281-bp.h
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index f0944b7590cf..cbaa9f29c1b5 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -39,8 +39,6 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \
> kirkwood-atl-sbx81lifxcat.dtb \
> kirkwood-blackarmor-nas220.dtb \
> kirkwood-d2net.dtb \
> -   kirkwood-db-88f6281.dtb \
> -   kirkwood-db-88f6281-spi.dtb \
> kirkwood-dns325.dtb \
> kirkwood-dockstar.dtb \
> kirkwood-dreamplug.dtb \
> diff --git a/arch/arm/dts/kirkwood-db-88f6281-spi.dts
> b/arch/arm/dts/kirkwood-db-88f6281-spi.dts
> deleted file mode 100644
> index 50b1b0d4a535..
> --- a/arch/arm/dts/kirkwood-db-88f6281-spi.dts
> +++ /dev/null
> @@ -1,48 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0
> -/*
> - * Marvell DB-88F6281-BP Development Board Setup
> - *
> - * Saeed Bishara 
> - * Thomas Petazzoni 
> - *
> - */
> -
> -/dts-v1/;
> -
> -#include "kirkwood-db-88f6281.dts"
> -
> -/ {
> -   aliases {
> -   spi0 = 
> -   };
> -};
> -
> - {
> -   status = "okay";
> -
> -   flash@0 {
> -   #address-cells = <1>;
> -   #size-cells = <1>;
> -   compatible = "st,m25p128", "jedec,spi-nor", "spi-flash";
> -   reg = <0>;
> -   spi-max-frequency = <5000>;
> -   mode = <0>;
> -
> -   partition@u-boot {
> -   reg = <0x 0x00c0>;
> -   label = "u-boot";
> -   };
> -   partition@u-boot-env {
> -   reg = <0x00c0 0x0004>;
> -   label = "u-boot-env";
> -   };
> -   partition@unused {
> -   reg = <0x0010 0x00f0>;
> -   label = "unused";
> -   };
> -   };
> -};
> -
> - {
> -   status = "disabled";
> -};
> diff --git a/arch/arm/dts/kirkwood-db-88f6281.dts
> b/arch/arm/dts/kirkwood-db-88f6281.dts
> deleted file mode 100644
> index 2adb17c955aa..
> --- a/arch/arm/dts/kirkwood-db-88f6281.dts
> +++ /dev/null
> @@ -1,26 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0
> -/*
> - * Marvell DB-88F6281-BP Development Board Setup
> - *
> - * Saeed Bishara 
> - * Thomas Petazzoni 
> - *
> - */
> -
> -/dts-v1/;
> -
> -#include "kirkwood-db.dtsi"
> -#include "kirkwood-6281.dtsi"
> -
> -/ {
> -   model = "Marvell DB-88F6281-BP Development Board";
> -   compatible = "marvell,db-88f6281-bp", "marvell,kirkwood-88f6281",
> "marvell,kirkwood";
> -};
> -
> - {
> -status = "okay";
> -};
> -
> - {
> -   status = "okay";
> -};
> diff --git a/arch/arm/dts/kirkwood-db.dtsi b/arch/arm/dts/kirkwood-db.dtsi
> deleted file mode 100644
> index b81d8e8298a3..
> --- a/arch/arm/dts/kirkwood-db.dtsi
> +++ /dev/null
> @@ -1,94 +0,0 @@
> -// SPDX-License-Identifier: 

Re: [PATCH 1/1] efi_loader: fix get_last_capsule()

2021-02-09 Thread Heinrich Schuchardt
Am 10. Februar 2021 07:43:25 MEZ schrieb AKASHI Takahiro 
:
>On Wed, Feb 10, 2021 at 07:05:10AM +0100, Heinrich Schuchardt wrote:
>> Am 10. Februar 2021 01:38:38 MEZ schrieb AKASHI Takahiro
>:
>> >On Tue, Feb 09, 2021 at 09:37:42PM +0100, Heinrich Schuchardt wrote:
>> >> fix get_last_capsule() leads to writes beyond the stack allocated
>> >buffer.
>> >> This was indicated when enabling the stack protector.
>> >> 
>> >> utf16_utf8_strcpy() only stops copying when reaching '\0'. The
>> >current
>> >> invocation always writes beyond the end of value[].
>> >> 
>> >> The output length of utf16_utf8_strcpy() may be longer than the
>> >number of
>> >> UTF-16 tokens. E.g has "CapsuleКиев" has 11 UTF-16 tokens but 15
>> >UTF-8
>> >
>> >First of all, "CapsuleLast" is a read-only variable from user's
>> >viewpoint,
>> >and is maintained solely by efi code. Then its value is expected to
>> >always
>> >be sane.
>> >The case you suggested above is quite unlikely.
>> 
>> What happens if the user tries to create a variable of the same name,
>e.g. in the variable store on disk?
>
>If this is your concern, the best solution would be to prohibit
>users to create system-managed (read-only) variables, like CapsuleLast.
>
>If a user can create such a variable with an arbitrary value,
>it will hurt the system's integrity.
>
>> 
>> >
>> >Although I don't think we need this patch,
>> 
>> Why do you think the patch is not necessary given that the current
>code is writing ouside buffers?
>
>My assumption here is, as I said,
>> >First of all, "CapsuleLast" is a read-only variable from user's
>> >viewpoint,
>> >and is maintained solely by efi code. Then its value is expected to
>> >always
>> >be sane.
>
>-Takahiro Akashi
>
>
>> >
>> >> tokens. Hence, using utf16_utf8_strcpy() without checking the
>input
>> >may
>> >> lead to further writes beyond value[].
>> >> 
>> >> The current invocation of strict_strtoul() reads beyond the end of
>> >value[].
>> >> 
>> >> A non-hexadecimal value after "Capsule" (e.g. "Capsule") must
>> >result in
>> >> an error. We cat catch this by checking the return value of
>> >strict_strtoul().
>> >> 
>> >> A value that is too short after "Capsule" (e.g. "Capsule0") must
>> >result in
>> >> an error. We must check the string length of value[].
>> >> 
>> >> Signed-off-by: Heinrich Schuchardt 
>> >> ---
>> >>  lib/efi_loader/efi_capsule.c | 18 +-
>> >>  1 file changed, 13 insertions(+), 5 deletions(-)
>> >> 
>> >> diff --git a/lib/efi_loader/efi_capsule.c
>> >b/lib/efi_loader/efi_capsule.c
>> >> index d39d731080..0017f0c0db 100644
>> >> --- a/lib/efi_loader/efi_capsule.c
>> >> +++ b/lib/efi_loader/efi_capsule.c
>> >> @@ -42,20 +42,28 @@ static struct efi_file_handle *bootdev_root;
>> >>  static __maybe_unused unsigned int get_last_capsule(void)
>> >>  {
>> >>   u16 value16[11]; /* "Capsule": non-null-terminated */
>> >> - char value[11], *p;
>> >> + char value[5];
>> >>   efi_uintn_t size;
>> >>   unsigned long index = 0x;
>> >>   efi_status_t ret;
>> >> + int i;
>> >> 
>> >>   size = sizeof(value16);
>> >>   ret = efi_get_variable_int(L"CapsuleLast",
>> >_guid_capsule_report,
>> >>  NULL, , value16, NULL);
>> >> - if (ret != EFI_SUCCESS || u16_strncmp(value16, L"Capsule", 7))
>> >> + if (ret != EFI_SUCCESS || size != 22 ||
>> >> + u16_strncmp(value16, L"Capsule", 7))
>> >>   goto err;
>> >> + for (i = 0; i < 4; ++i) {
>> >> + u16 c = value16[i + 7];
>> >> 
>> >> - p = value;
>> >> - utf16_utf8_strcpy(, value16);
>> >> - strict_strtoul([7], 16, );
>> >> + if (!c)
>> >> + goto err;
>> >
>> >Is this check necessary assuming size == 22?

The value of bytes 19-22 could be zero.


>> 
>> Ok. Instead we should check for > 0x7f here to avoid illegal codes.
>> 
>> Best regards
>> 
>> Heinrich
>> 
>> >
>> >
>> >> + value[i] = c;
>> >
>> >You are implicitly casting the value from u16 to u8 here.
>> >This may lead to making an illegal code legal.
>> >
>> >-Takahiro Akashi
>> >
>> >> + }
>> >> + value[4] = 0;
>> >> + if (strict_strtoul(value, 16, ))
>> >> + index = 0x;
>> >>  err:
>> >>   return index;
>> >>  }
>> >> --
>> >> 2.30.0
>> >> 
>> 



Re: [PATCH 1/1] efi_loader: fix get_last_capsule()

2021-02-09 Thread Heinrich Schuchardt
Am 10. Februar 2021 07:43:25 MEZ schrieb AKASHI Takahiro 
:
>On Wed, Feb 10, 2021 at 07:05:10AM +0100, Heinrich Schuchardt wrote:
>> Am 10. Februar 2021 01:38:38 MEZ schrieb AKASHI Takahiro
>:
>> >On Tue, Feb 09, 2021 at 09:37:42PM +0100, Heinrich Schuchardt wrote:
>> >> fix get_last_capsule() leads to writes beyond the stack allocated
>> >buffer.
>> >> This was indicated when enabling the stack protector.
>> >> 
>> >> utf16_utf8_strcpy() only stops copying when reaching '\0'. The
>> >current
>> >> invocation always writes beyond the end of value[].
>> >> 
>> >> The output length of utf16_utf8_strcpy() may be longer than the
>> >number of
>> >> UTF-16 tokens. E.g has "CapsuleКиев" has 11 UTF-16 tokens but 15
>> >UTF-8
>> >
>> >First of all, "CapsuleLast" is a read-only variable from user's
>> >viewpoint,
>> >and is maintained solely by efi code. Then its value is expected to
>> >always
>> >be sane.
>> >The case you suggested above is quite unlikely.
>> 
>> What happens if the user tries to create a variable of the same name,
>e.g. in the variable store on disk?
>
>If this is your concern, the best solution would be to prohibit
>users to create system-managed (read-only) variables, like CapsuleLast.
>
>If a user can create such a variable with an arbitrary value,
>it will hurt the system's integrity.
>
>> 
>> >
>> >Although I don't think we need this patch,
>> 
>> Why do you think the patch is not necessary given that the current
>code is writing ouside buffers?
>
>My assumption here is, as I said,
>> >First of all, "CapsuleLast" is a read-only variable from user's
>> >viewpoint,
>> >and is maintained solely by efi code. Then its value is expected to
>> >always
>> >be sane.

Even if the value is sane, the current code overwrites the stack of the caller? 
This becomes visible when the stack protector is enabled. Why don't you want to 
fix it?

Best regards

Heinrich

>
>-Takahiro Akashi
>
>
>> >
>> >> tokens. Hence, using utf16_utf8_strcpy() without checking the
>input
>> >may
>> >> lead to further writes beyond value[].
>> >> 
>> >> The current invocation of strict_strtoul() reads beyond the end of
>> >value[].
>> >> 
>> >> A non-hexadecimal value after "Capsule" (e.g. "Capsule") must
>> >result in
>> >> an error. We cat catch this by checking the return value of
>> >strict_strtoul().
>> >> 
>> >> A value that is too short after "Capsule" (e.g. "Capsule0") must
>> >result in
>> >> an error. We must check the string length of value[].
>> >> 
>> >> Signed-off-by: Heinrich Schuchardt 
>> >> ---
>> >>  lib/efi_loader/efi_capsule.c | 18 +-
>> >>  1 file changed, 13 insertions(+), 5 deletions(-)
>> >> 
>> >> diff --git a/lib/efi_loader/efi_capsule.c
>> >b/lib/efi_loader/efi_capsule.c
>> >> index d39d731080..0017f0c0db 100644
>> >> --- a/lib/efi_loader/efi_capsule.c
>> >> +++ b/lib/efi_loader/efi_capsule.c
>> >> @@ -42,20 +42,28 @@ static struct efi_file_handle *bootdev_root;
>> >>  static __maybe_unused unsigned int get_last_capsule(void)
>> >>  {
>> >>   u16 value16[11]; /* "Capsule": non-null-terminated */
>> >> - char value[11], *p;
>> >> + char value[5];
>> >>   efi_uintn_t size;
>> >>   unsigned long index = 0x;
>> >>   efi_status_t ret;
>> >> + int i;
>> >> 
>> >>   size = sizeof(value16);
>> >>   ret = efi_get_variable_int(L"CapsuleLast",
>> >_guid_capsule_report,
>> >>  NULL, , value16, NULL);
>> >> - if (ret != EFI_SUCCESS || u16_strncmp(value16, L"Capsule", 7))
>> >> + if (ret != EFI_SUCCESS || size != 22 ||
>> >> + u16_strncmp(value16, L"Capsule", 7))
>> >>   goto err;
>> >> + for (i = 0; i < 4; ++i) {
>> >> + u16 c = value16[i + 7];
>> >> 
>> >> - p = value;
>> >> - utf16_utf8_strcpy(, value16);
>> >> - strict_strtoul([7], 16, );
>> >> + if (!c)
>> >> + goto err;
>> >
>> >Is this check necessary assuming size == 22?
>> 
>> Ok. Instead we should check for > 0x7f here to avoid illegal codes.
>> 
>> Best regards
>> 
>> Heinrich
>> 
>> >
>> >
>> >> + value[i] = c;
>> >
>> >You are implicitly casting the value from u16 to u8 here.
>> >This may lead to making an illegal code legal.
>> >
>> >-Takahiro Akashi
>> >
>> >> + }
>> >> + value[4] = 0;
>> >> + if (strict_strtoul(value, 16, ))
>> >> + index = 0x;
>> >>  err:
>> >>   return index;
>> >>  }
>> >> --
>> >> 2.30.0
>> >> 
>> 



Re: [PATCH 1/1] efi_loader: fix get_last_capsule()

2021-02-09 Thread AKASHI Takahiro
On Wed, Feb 10, 2021 at 07:05:10AM +0100, Heinrich Schuchardt wrote:
> Am 10. Februar 2021 01:38:38 MEZ schrieb AKASHI Takahiro 
> :
> >On Tue, Feb 09, 2021 at 09:37:42PM +0100, Heinrich Schuchardt wrote:
> >> fix get_last_capsule() leads to writes beyond the stack allocated
> >buffer.
> >> This was indicated when enabling the stack protector.
> >> 
> >> utf16_utf8_strcpy() only stops copying when reaching '\0'. The
> >current
> >> invocation always writes beyond the end of value[].
> >> 
> >> The output length of utf16_utf8_strcpy() may be longer than the
> >number of
> >> UTF-16 tokens. E.g has "CapsuleКиев" has 11 UTF-16 tokens but 15
> >UTF-8
> >
> >First of all, "CapsuleLast" is a read-only variable from user's
> >viewpoint,
> >and is maintained solely by efi code. Then its value is expected to
> >always
> >be sane.
> >The case you suggested above is quite unlikely.
> 
> What happens if the user tries to create a variable of the same name, e.g. in 
> the variable store on disk?

If this is your concern, the best solution would be to prohibit
users to create system-managed (read-only) variables, like CapsuleLast.

If a user can create such a variable with an arbitrary value,
it will hurt the system's integrity.

> 
> >
> >Although I don't think we need this patch,
> 
> Why do you think the patch is not necessary given that the current code is 
> writing ouside buffers?

My assumption here is, as I said,
> >First of all, "CapsuleLast" is a read-only variable from user's
> >viewpoint,
> >and is maintained solely by efi code. Then its value is expected to
> >always
> >be sane.

-Takahiro Akashi


> >
> >> tokens. Hence, using utf16_utf8_strcpy() without checking the input
> >may
> >> lead to further writes beyond value[].
> >> 
> >> The current invocation of strict_strtoul() reads beyond the end of
> >value[].
> >> 
> >> A non-hexadecimal value after "Capsule" (e.g. "Capsule") must
> >result in
> >> an error. We cat catch this by checking the return value of
> >strict_strtoul().
> >> 
> >> A value that is too short after "Capsule" (e.g. "Capsule0") must
> >result in
> >> an error. We must check the string length of value[].
> >> 
> >> Signed-off-by: Heinrich Schuchardt 
> >> ---
> >>  lib/efi_loader/efi_capsule.c | 18 +-
> >>  1 file changed, 13 insertions(+), 5 deletions(-)
> >> 
> >> diff --git a/lib/efi_loader/efi_capsule.c
> >b/lib/efi_loader/efi_capsule.c
> >> index d39d731080..0017f0c0db 100644
> >> --- a/lib/efi_loader/efi_capsule.c
> >> +++ b/lib/efi_loader/efi_capsule.c
> >> @@ -42,20 +42,28 @@ static struct efi_file_handle *bootdev_root;
> >>  static __maybe_unused unsigned int get_last_capsule(void)
> >>  {
> >>u16 value16[11]; /* "Capsule": non-null-terminated */
> >> -  char value[11], *p;
> >> +  char value[5];
> >>efi_uintn_t size;
> >>unsigned long index = 0x;
> >>efi_status_t ret;
> >> +  int i;
> >> 
> >>size = sizeof(value16);
> >>ret = efi_get_variable_int(L"CapsuleLast",
> >_guid_capsule_report,
> >>   NULL, , value16, NULL);
> >> -  if (ret != EFI_SUCCESS || u16_strncmp(value16, L"Capsule", 7))
> >> +  if (ret != EFI_SUCCESS || size != 22 ||
> >> +  u16_strncmp(value16, L"Capsule", 7))
> >>goto err;
> >> +  for (i = 0; i < 4; ++i) {
> >> +  u16 c = value16[i + 7];
> >> 
> >> -  p = value;
> >> -  utf16_utf8_strcpy(, value16);
> >> -  strict_strtoul([7], 16, );
> >> +  if (!c)
> >> +  goto err;
> >
> >Is this check necessary assuming size == 22?
> 
> Ok. Instead we should check for > 0x7f here to avoid illegal codes.
> 
> Best regards
> 
> Heinrich
> 
> >
> >
> >> +  value[i] = c;
> >
> >You are implicitly casting the value from u16 to u8 here.
> >This may lead to making an illegal code legal.
> >
> >-Takahiro Akashi
> >
> >> +  }
> >> +  value[4] = 0;
> >> +  if (strict_strtoul(value, 16, ))
> >> +  index = 0x;
> >>  err:
> >>return index;
> >>  }
> >> --
> >> 2.30.0
> >> 
> 


Re: [PATCH 1/1] efi_loader: fix get_last_capsule()

2021-02-09 Thread Heinrich Schuchardt
Am 10. Februar 2021 01:38:38 MEZ schrieb AKASHI Takahiro 
:
>On Tue, Feb 09, 2021 at 09:37:42PM +0100, Heinrich Schuchardt wrote:
>> fix get_last_capsule() leads to writes beyond the stack allocated
>buffer.
>> This was indicated when enabling the stack protector.
>> 
>> utf16_utf8_strcpy() only stops copying when reaching '\0'. The
>current
>> invocation always writes beyond the end of value[].
>> 
>> The output length of utf16_utf8_strcpy() may be longer than the
>number of
>> UTF-16 tokens. E.g has "CapsuleКиев" has 11 UTF-16 tokens but 15
>UTF-8
>
>First of all, "CapsuleLast" is a read-only variable from user's
>viewpoint,
>and is maintained solely by efi code. Then its value is expected to
>always
>be sane.
>The case you suggested above is quite unlikely.

What happens if the user tries to create a variable of the same name, e.g. in 
the variable store on disk?


>
>Although I don't think we need this patch,

Why do you think the patch is not necessary given that the current code is 
writing ouside buffers?

>
>> tokens. Hence, using utf16_utf8_strcpy() without checking the input
>may
>> lead to further writes beyond value[].
>> 
>> The current invocation of strict_strtoul() reads beyond the end of
>value[].
>> 
>> A non-hexadecimal value after "Capsule" (e.g. "Capsule") must
>result in
>> an error. We cat catch this by checking the return value of
>strict_strtoul().
>> 
>> A value that is too short after "Capsule" (e.g. "Capsule0") must
>result in
>> an error. We must check the string length of value[].
>> 
>> Signed-off-by: Heinrich Schuchardt 
>> ---
>>  lib/efi_loader/efi_capsule.c | 18 +-
>>  1 file changed, 13 insertions(+), 5 deletions(-)
>> 
>> diff --git a/lib/efi_loader/efi_capsule.c
>b/lib/efi_loader/efi_capsule.c
>> index d39d731080..0017f0c0db 100644
>> --- a/lib/efi_loader/efi_capsule.c
>> +++ b/lib/efi_loader/efi_capsule.c
>> @@ -42,20 +42,28 @@ static struct efi_file_handle *bootdev_root;
>>  static __maybe_unused unsigned int get_last_capsule(void)
>>  {
>>  u16 value16[11]; /* "Capsule": non-null-terminated */
>> -char value[11], *p;
>> +char value[5];
>>  efi_uintn_t size;
>>  unsigned long index = 0x;
>>  efi_status_t ret;
>> +int i;
>> 
>>  size = sizeof(value16);
>>  ret = efi_get_variable_int(L"CapsuleLast",
>_guid_capsule_report,
>> NULL, , value16, NULL);
>> -if (ret != EFI_SUCCESS || u16_strncmp(value16, L"Capsule", 7))
>> +if (ret != EFI_SUCCESS || size != 22 ||
>> +u16_strncmp(value16, L"Capsule", 7))
>>  goto err;
>> +for (i = 0; i < 4; ++i) {
>> +u16 c = value16[i + 7];
>> 
>> -p = value;
>> -utf16_utf8_strcpy(, value16);
>> -strict_strtoul([7], 16, );
>> +if (!c)
>> +goto err;
>
>Is this check necessary assuming size == 22?

Ok. Instead we should check for > 0x7f here to avoid illegal codes.

Best regards

Heinrich

>
>
>> +value[i] = c;
>
>You are implicitly casting the value from u16 to u8 here.
>This may lead to making an illegal code legal.
>
>-Takahiro Akashi
>
>> +}
>> +value[4] = 0;
>> +if (strict_strtoul(value, 16, ))
>> +index = 0x;
>>  err:
>>  return index;
>>  }
>> --
>> 2.30.0
>> 



Re: [PATCH 01/26] Revert "pci: pci-uclass: Dynamically allocate the PCI regions"

2021-02-09 Thread Simon Glass
Hi Bin,

On Tue, 9 Feb 2021 at 17:47, Bin Meng  wrote:
>
> Hi Simon,
>
> On Sun, Feb 7, 2021 at 11:34 PM Simon Glass  wrote:
> >
> > Hi Bin,
> >
> > On Sun, 7 Feb 2021 at 08:11, Bin Meng  wrote:
> > >
> > > This reverts commit e002474158d1054a7a2ff9a66149384c639ff242.
> > >
> > > Commit e002474158d1 ("pci: pci-uclass: Dynamically allocate the PCI 
> > > regions")
> > > changes 'struct pci_controller'.regions from pre-allocated array of
> > > regions to dynamically allocated, which unfortunately broken lots of
> > > boards that still use the non-DM PCI driver.
> > >
> > > We may update every non-DM PCI board codes to do the dynamical
> > > allocation of PCI regions but that's a lot of work (e.g.: almost
> > > all Freescale PowerPC boards are broken now and need to be fixed).
> > > Let's do the easy way.
> >
> > No one has noticed since July, apparently. I think it would be better
> > to disable PCI on these boards, until either someone migrates them or
> > they are removed. The PCI deadline was about 18 months ago.
> >
>
> Yep, but I'd like to keep this revert instead of just fixing the
> qemu-ppce500 here, to give people a chance to test their original
> non-DM version of PCI driver before the DM conversion.
>
> Once all boards have converted to DM PCI, we can revert this revert patch 
> again.

I'm fine with that if Tom is. But deleting unmaintained code is always
another option!

>
> > Tom, do you know the situation here?
> >

Regards,
Simon


Re: [PATCH u-boot-dm + u-boot-spi v2 1/7] dm: core: add test for ofnode_get_addr_size_index()

2021-02-09 Thread Simon Glass
On Tue, 9 Feb 2021 at 07:45, Marek Behún  wrote:
>
> Add test for ofnode_get_addr_size_index(), which will test OF address
> translation.
>
> Signed-off-by: Marek Behún 
> Cc: Simon Glass 
> ---
>  test/dm/ofnode.c | 23 +++
>  1 file changed, 23 insertions(+)

Reviewed-by: Simon Glass 


Re: [PATCH u-boot-dm + u-boot-spi v2 2/7] dm: core: add non-translating version of ofnode_get_addr_size_index()

2021-02-09 Thread Simon Glass
On Tue, 9 Feb 2021 at 07:45, Marek Behún  wrote:
>
> Add functions ofnode_get_addr_size_index_notrans(), which is a
> non-translating version of ofnode_get_addr_size_index().
>
> Some addresses are not meant to be translated, for example those of MTD
> fixed-partitions.
>
> Signed-off-by: Marek Behún 
> Cc: Dario Binacchi 
> Cc: Simon Glass 
> ---
>  drivers/core/ofnode.c | 19 ---
>  include/dm/ofnode.h   | 17 +
>  test/dm/ofnode.c  |  6 ++
>  3 files changed, 39 insertions(+), 3 deletions(-)

Reviewed-by: Simon Glass 


Re: [PATCH v5 2/4] button: add a simple Analog to Digital Converter device based button driver

2021-02-09 Thread Simon Glass
Hi Marek,

On Tue, 9 Feb 2021 at 01:43, Marek Szyprowski  wrote:
>
> Hi Simon,
>
> On 08.02.2021 18:08, Simon Glass wrote:
> > On Mon, 8 Feb 2021 at 09:10, Marek Szyprowski  
> > wrote:
> >> On 06.02.2021 17:21, Simon Glass wrote:
> >>> On Thu, 4 Feb 2021 at 03:36, Marek Szyprowski  
> >>> wrote:
>  ...
>  Could you give me a bit more hints or point where to start? I've tried
>  to build sandbox, but it fails for v2021.01 release (I've did make
>  sandbox_defconfig && make all). I assume I would need to add adc and
>  adc-keys devices to some sandbox dts and some code triggering and
>  checking the key values, but that's all I know now.
> >>> Well you do need to be able to build sandbox or you will get
> >>> nowhere...what error did you get? Once we understand what went wrong
> >>> we can update the docs. Maybe it is missing a dependency.
> >> $ gcc --version
> >> gcc (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0
> >> Copyright (C) 2017 Free Software Foundation, Inc.
> >> This is free software; see the source for copying conditions. There is NO
> >> warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
> >>
> >> $ git checkout v2021.01
> >>
> >> $ make sandbox_defconfig
> >> #
> >> # configuration written to .config
> >> #
> >>
> >> $ make
> >> scripts/kconfig/conf  --syncconfig Kconfig
> >> CFG u-boot.cfg
> >> GEN include/autoconf.mk
> >> GEN include/autoconf.mk.dep
> >> CFGCHK  u-boot.cfg
> >> UPD include/generated/timestamp_autogenerated.h
> >> HOSTCC  tools/mkenvimage.o
> >> HOSTLD  tools/mkenvimage
> >> HOSTCC  tools/fit_image.o
> >> HOSTCC  tools/image-host.o
> >> HOSTCC  tools/dumpimage.o
> >> HOSTLD  tools/dumpimage
> >> HOSTCC  tools/mkimage.o
> >> HOSTLD  tools/mkimage
> >> HOSTLD  tools/fit_info
> >> HOSTLD  tools/fit_check_sign
> >>
> >> ...
> >>
> >> CC  arch/sandbox/cpu/cpu.o
> >> In file included from include/common.h:26:0,
> >>from arch/sandbox/cpu/cpu.c:6:
> >> include/asm/global_data.h:112:58: warning: call-clobbered register used
> >> for global register variable
> >>#define DECLARE_GLOBAL_DATA_PTR  register volatile gd_t *gd asm ("r9")
> >> ^
> >> include/dm/of.h:86:1: note: in expansion of macro ‘DECLARE_GLOBAL_DATA_PTR’
> >>DECLARE_GLOBAL_DATA_PTR;
> > This is pretty mysterious. Are you sure you are using an x86_64 machine?
>
> I've finally found what caused the issue on my build system. It is
> x86_64 machine, but after some old cross-builds I had an 'asm' symlink
> in u-boot/include directory pointing to arch/arm directory. I'm quite
> surprised that it has not been removed by make clean/distclean/mrproper
> combo.

OK. I wonder if this is after building a U-Boot from 2013? I will send a patch.

Regards,
Simon


[PATCH v2 1/1] timer: imx-gpt: Add timer support for i.MX SoCs family

2021-02-09 Thread Jesse Taube
This timer driver is using GPT Timer (General Purpose Timer) available on 
almost all i.MX SoCs family.
Since this driver is only meant to provide u-boot's timer and counter, and most 
of the i.MX* SoCs use a 24Mhz crystal, let's only deal with that specific 
source.

Signed-off-by: Giulio Benetti 
Signed-off-by: Jesse Taube 

---
 drivers/timer/Kconfig |   7 ++
 drivers/timer/Makefile|   1 +
 drivers/timer/imx-gpt-timer.c | 132 ++
 3 files changed, 140 insertions(+)
 create mode 100644 drivers/timer/imx-gpt-timer.c

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 80743a2551..ee81dfa776 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -227,4 +227,11 @@ config MCHP_PIT64B_TIMER
  Select this to enable support for Microchip 64-bit periodic
  interval timer.
 
+config IMX_GPT_TIMER
+   bool "NXP i.MX GPT timer support"
+   depends on TIMER
+   help
+ Select this to enable support for the timer found on
+ NXP i.MX devices.
+
 endmenu
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index eb5c48cc6c..e214ba7268 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -25,3 +25,4 @@ obj-$(CONFIG_STM32_TIMER) += stm32_timer.o
 obj-$(CONFIG_X86_TSC_TIMER)+= tsc_timer.o
 obj-$(CONFIG_MTK_TIMER)+= mtk_timer.o
 obj-$(CONFIG_MCHP_PIT64B_TIMER)+= mchp-pit64b-timer.o
+obj-$(CONFIG_IMX_GPT_TIMER)+= imx-gpt-timer.o
diff --git a/drivers/timer/imx-gpt-timer.c b/drivers/timer/imx-gpt-timer.c
new file mode 100644
index 00..58c37db300
--- /dev/null
+++ b/drivers/timer/imx-gpt-timer.c
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020
+ * Author(s): Giulio Benetti 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#define GPT_CR_SWR 0x8000
+#define GPT_CR_CLKSRC  0x01C0
+#define GPT_CR_EN_24M  0x4000
+#define GPT_CR_EN  0x0001
+#define GPT_PR_PRESCALER   0x0FFF
+#define GPT_PR_PRESCALER24M0xF000
+
+#define NO_CLOCK   (0)
+#define IPG_CLK(1 << 6)
+#define IPG_CLK_HF (2 << 6)
+#define IPG_EXT(3 << 6)
+#define IPG_CLK_32K(4 << 6)
+#define IPG_CLK_24M(5 << 6)
+
+struct imx_gpt_timer_regs {
+   u32 cr;
+   u32 pr;
+   u32 sr;
+   u32 ir;
+   u32 ocr1;
+   u32 ocr2;
+   u32 ocr3;
+   u32 icr1;
+   u32 icr2;
+   u32 cnt;
+};
+
+struct imx_gpt_timer_priv {
+   struct imx_gpt_timer_regs *base;
+};
+
+static u64 imx_gpt_timer_get_count(struct udevice *dev)
+{
+   struct imx_gpt_timer_priv *priv = dev_get_priv(dev);
+   struct imx_gpt_timer_regs *regs = priv->base;
+
+   return readl(>cnt);
+}
+
+static int imx_gpt_timer_probe(struct udevice *dev)
+{
+   struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+   struct imx_gpt_timer_priv *priv = dev_get_priv(dev);
+   struct imx_gpt_timer_regs *regs;
+   struct clk clk;
+   fdt_addr_t addr;
+   u32 prescaler;
+   u32 rate;
+   int ret;
+
+   addr = dev_read_addr(dev);
+   if (addr == FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   priv->base = (struct imx_gpt_timer_regs *)addr;
+
+   ret = clk_get_by_index(dev, 0, );
+   if (ret < 0)
+   return ret;
+
+   ret = clk_enable();
+   if (ret) {
+   dev_err(dev, "Failed to enable clock\n");
+   return ret;
+   }
+
+   regs = priv->base;
+
+   /* Reset the timer */
+   setbits_le32(>cr, GPT_CR_SWR);
+
+   /* Wait for timer to finish reset */
+   while (readl(>cr) & GPT_CR_SWR)
+   ;
+
+   /* Get timer clock rate */
+   rate = clk_get_rate();
+   if ((int)rate <= 0) {
+   dev_err(dev, "Could not get clock rate...\n");
+   return -EINVAL;
+   }
+   /* Only support 24MHz clock */
+   if (rate != 2400UL) {
+   dev_err(dev, "Clock rate other than 24MHz not supported...\n");
+   return -EINVAL;
+   }
+   /* We set timer prescaler to obtain a 1MHz timer counter frequency */
+   prescaler = (rate / CONFIG_SYS_HZ_CLOCK) - 1;
+   writel(GPT_PR_PRESCALER & prescaler, >pr);
+   /* Set timer frequency to 1MHz */
+   uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK;
+
+   clrbits_le32(>cr, GPT_CR_CLKSRC);
+   setbits_le32(>cr, IPG_CLK);
+   /* Start timer */
+   setbits_le32(>cr, GPT_CR_EN);
+
+   return 0;
+}
+
+static const struct timer_ops imx_gpt_timer_ops = {
+   .get_count = imx_gpt_timer_get_count,
+};
+
+static const struct udevice_id imx_gpt_timer_ids[] = {
+ 

[PATCH v2 0/1] Add driver support for the IMX General Purpose Timer (GPT) available

2021-02-09 Thread Jesse Taube
Giulio Benetti (3):
  timer: imx-gpt: Add timer support for i.MX SoCs family

Jesse Taube (1):
  timer: imx-gpt: Add timer support for i.MX SoCs family

 drivers/timer/Kconfig |   7 ++
 drivers/timer/Makefile|   1 +
 drivers/timer/imx-gpt-timer.c | 132 ++
 3 files changed, 140 insertions(+)
 create mode 100644 drivers/timer/imx-gpt-timer.c

---
V1->V2:
* Fixed indentation
* Fixed capitals
* Made timer work on only 24MHz clock
---
-- 
2.30.0



[PATCH 13/16] ppc: Remove MPC8641HPCN board

2021-02-09 Thread Tom Rini
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Priyanka Jain 
Signed-off-by: Tom Rini 
---
 arch/powerpc/cpu/mpc86xx/Kconfig  |   7 -
 board/freescale/common/pixis.h|  24 -
 board/freescale/mpc8641hpcn/Kconfig   |  12 -
 board/freescale/mpc8641hpcn/MAINTAINERS   |   7 -
 board/freescale/mpc8641hpcn/Makefile  |   8 -
 board/freescale/mpc8641hpcn/README| 186 ---
 board/freescale/mpc8641hpcn/ddr.c | 107 
 board/freescale/mpc8641hpcn/law.c |  43 --
 board/freescale/mpc8641hpcn/mpc8641hpcn.c | 247 -
 configs/MPC8641HPCN_36BIT_defconfig   |  48 --
 configs/MPC8641HPCN_defconfig |  48 --
 include/configs/MPC8641HPCN.h | 632 --
 12 files changed, 1369 deletions(-)
 delete mode 100644 board/freescale/mpc8641hpcn/Kconfig
 delete mode 100644 board/freescale/mpc8641hpcn/MAINTAINERS
 delete mode 100644 board/freescale/mpc8641hpcn/Makefile
 delete mode 100644 board/freescale/mpc8641hpcn/README
 delete mode 100644 board/freescale/mpc8641hpcn/ddr.c
 delete mode 100644 board/freescale/mpc8641hpcn/law.c
 delete mode 100644 board/freescale/mpc8641hpcn/mpc8641hpcn.c
 delete mode 100644 configs/MPC8641HPCN_36BIT_defconfig
 delete mode 100644 configs/MPC8641HPCN_defconfig
 delete mode 100644 include/configs/MPC8641HPCN.h

diff --git a/arch/powerpc/cpu/mpc86xx/Kconfig b/arch/powerpc/cpu/mpc86xx/Kconfig
index 294485794bdf..7de42b5f2576 100644
--- a/arch/powerpc/cpu/mpc86xx/Kconfig
+++ b/arch/powerpc/cpu/mpc86xx/Kconfig
@@ -13,12 +13,6 @@ config TARGET_SBC8641D
select ARCH_MPC8641
select BOARD_EARLY_INIT_F
 
-config TARGET_MPC8641HPCN
-   bool "Support MPC8641HPCN"
-   select ARCH_MPC8641
-   select FSL_DDR_INTERACTIVE
-   imply SCSI
-
 config TARGET_XPEDITE517X
bool "Support xpedite517x"
select ARCH_MPC8641
@@ -57,7 +51,6 @@ config SYS_FSL_NUM_LAWS
Number of local access windows. This is fixed per SoC.
If not sure, do not change.
 
-source "board/freescale/mpc8641hpcn/Kconfig"
 source "board/sbc8641d/Kconfig"
 source "board/xes/xpedite517x/Kconfig"
 
diff --git a/board/freescale/common/pixis.h b/board/freescale/common/pixis.h
index 36c94862a55b..049f1967c595 100644
--- a/board/freescale/common/pixis.h
+++ b/board/freescale/common/pixis.h
@@ -72,30 +72,6 @@ typedef struct pixis {
u8 res2[34];
 } __attribute__ ((packed)) pixis_t;
 
-#elif defined(CONFIG_TARGET_MPC8641HPCN)
-typedef struct pixis {
-   u8 id;
-   u8 ver;
-   u8 pver;
-   u8 csr;
-   u8 rst;
-   u8 pwr;
-   u8 aux;
-   u8 spd;
-   u8 res[8];
-   u8 vctl;
-   u8 vstat;
-   u8 vcfgen0;
-   u8 vcfgen1;
-   u8 vcore0;
-   u8 res1;
-   u8 vboot;
-   u8 vspeed[2];
-   u8 vclkh;
-   u8 vclkl;
-   u8 watch;
-   u8 res3[36];
-} __attribute__ ((packed)) pixis_t;
 #else
 #error Need to define pixis_t for this board
 #endif
diff --git a/board/freescale/mpc8641hpcn/Kconfig 
b/board/freescale/mpc8641hpcn/Kconfig
deleted file mode 100644
index ae45d6333748..
--- a/board/freescale/mpc8641hpcn/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_MPC8641HPCN
-
-config SYS_BOARD
-   default "mpc8641hpcn"
-
-config SYS_VENDOR
-   default "freescale"
-
-config SYS_CONFIG_NAME
-   default "MPC8641HPCN"
-
-endif
diff --git a/board/freescale/mpc8641hpcn/MAINTAINERS 
b/board/freescale/mpc8641hpcn/MAINTAINERS
deleted file mode 100644
index c95721876751..
--- a/board/freescale/mpc8641hpcn/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-MPC8641HPCN BOARD
-M: Priyanka Jain 
-S: Maintained
-F: board/freescale/mpc8641hpcn/
-F: include/configs/MPC8641HPCN.h
-F: configs/MPC8641HPCN_defconfig
-F: configs/MPC8641HPCN_36BIT_defconfig
diff --git a/board/freescale/mpc8641hpcn/Makefile 
b/board/freescale/mpc8641hpcn/Makefile
deleted file mode 100644
index 86b87193dd66..
--- a/board/freescale/mpc8641hpcn/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-
-obj-y  += mpc8641hpcn.o
-obj-y  += law.o
-obj-$(CONFIG_SYS_FSL_DDR2) += ddr.o
diff --git a/board/freescale/mpc8641hpcn/README 
b/board/freescale/mpc8641hpcn/README
deleted file mode 100644
index 77909a838332..
--- a/board/freescale/mpc8641hpcn/README
+++ /dev/null
@@ -1,186 +0,0 @@
-Freescale MPC8641HPCN board
-===
-
-Created 05/24/2006 Haiying Wang

-
-1. Building U-Boot
---
-The 86xx HPCN code base is known to compile using:
-Binutils 2.15, Gcc 3.4.3, Glibc 2.3.3
-
-$ make MPC8641HPCN_config
-Configuring 

[PATCH 10/16] ppc: Remove MPC8544DS board

2021-02-09 Thread Tom Rini
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Priyanka Jain 
Signed-off-by: Tom Rini 
---
 arch/powerpc/cpu/mpc85xx/Kconfig  |   6 -
 board/freescale/mpc8544ds/Kconfig |  12 -
 board/freescale/mpc8544ds/MAINTAINERS |   6 -
 board/freescale/mpc8544ds/Makefile|  10 -
 board/freescale/mpc8544ds/README  | 122 
 board/freescale/mpc8544ds/ddr.c   |  56 
 board/freescale/mpc8544ds/law.c   |  17 --
 board/freescale/mpc8544ds/mpc8544ds.c | 321 
 board/freescale/mpc8544ds/tlb.c   |  74 -
 configs/MPC8544DS_defconfig   |  52 
 include/configs/MPC8544DS.h   | 408 --
 11 files changed, 1084 deletions(-)
 delete mode 100644 board/freescale/mpc8544ds/Kconfig
 delete mode 100644 board/freescale/mpc8544ds/MAINTAINERS
 delete mode 100644 board/freescale/mpc8544ds/Makefile
 delete mode 100644 board/freescale/mpc8544ds/README
 delete mode 100644 board/freescale/mpc8544ds/ddr.c
 delete mode 100644 board/freescale/mpc8544ds/law.c
 delete mode 100644 board/freescale/mpc8544ds/mpc8544ds.c
 delete mode 100644 board/freescale/mpc8544ds/tlb.c
 delete mode 100644 configs/MPC8544DS_defconfig
 delete mode 100644 include/configs/MPC8544DS.h

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index c1a377067106..28c9f113d3f5 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -52,11 +52,6 @@ config TARGET_MPC8541CDS
bool "Support MPC8541CDS"
select ARCH_MPC8541
 
-config TARGET_MPC8544DS
-   bool "Support MPC8544DS"
-   select ARCH_MPC8544
-   imply PANIC_HANG
-
 config TARGET_MPC8548CDS
bool "Support MPC8548CDS"
select ARCH_MPC8548
@@ -1443,7 +1438,6 @@ config SYS_FSL_LBC_CLK_DIV
 
 source "board/freescale/corenet_ds/Kconfig"
 source "board/freescale/mpc8541cds/Kconfig"
-source "board/freescale/mpc8544ds/Kconfig"
 source "board/freescale/mpc8548cds/Kconfig"
 source "board/freescale/mpc8555cds/Kconfig"
 source "board/freescale/mpc8568mds/Kconfig"
diff --git a/board/freescale/mpc8544ds/Kconfig 
b/board/freescale/mpc8544ds/Kconfig
deleted file mode 100644
index c3e25b89a028..
--- a/board/freescale/mpc8544ds/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_MPC8544DS
-
-config SYS_BOARD
-   default "mpc8544ds"
-
-config SYS_VENDOR
-   default "freescale"
-
-config SYS_CONFIG_NAME
-   default "MPC8544DS"
-
-endif
diff --git a/board/freescale/mpc8544ds/MAINTAINERS 
b/board/freescale/mpc8544ds/MAINTAINERS
deleted file mode 100644
index 74e7249e4734..
--- a/board/freescale/mpc8544ds/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-MPC8544DS BOARD
-M: Priyanka Jain 
-S: Maintained
-F: board/freescale/mpc8544ds/
-F: include/configs/MPC8544DS.h
-F: configs/MPC8544DS_defconfig
diff --git a/board/freescale/mpc8544ds/Makefile 
b/board/freescale/mpc8544ds/Makefile
deleted file mode 100644
index 1693ae84330e..
--- a/board/freescale/mpc8544ds/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright 2007 Freescale Semiconductor, Inc.
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-
-obj-y  += mpc8544ds.o
-obj-y  += ddr.o
-obj-y  += law.o
-obj-y  += tlb.o
diff --git a/board/freescale/mpc8544ds/README b/board/freescale/mpc8544ds/README
deleted file mode 100644
index b49c3c07c405..
--- a/board/freescale/mpc8544ds/README
+++ /dev/null
@@ -1,122 +0,0 @@
-Overview
-
-The MPC8544DS system is similar to the 85xx CDS systems such
-as the MPC8548CDS due to the similar E500 core.  However, it
-is placed on the same board as the 8641 HPCN system.
-
-
-Flash Banks

-Like the 85xx CDS systems, the 8544 DS board has two flash banks.
-They are both present on boot, but there locations can be swapped
-using the dip-switch SW10, bit 2.
-
-However, unlike the CDS systems, but similar to the 8641 HPCN
-board, a runtime reset through the FPGA can also affect a swap
-on the flash bank mappings for the next reset cycle.
-
-Irrespective of the switch SW10[2], booting is always from the
-boot bank at 0xfff8_.
-
-
-Memory Map
---
-
-0xff80_ - 0xffbf_  Alternate bank  4MB
-0xffc0_ - 0x_  Boot bank   4MB
-
-0xffb8_Alternate image start   512KB
-0xfff8_Boot image start512KB
-
-
-Flashing Images

-
-For example, to place a new image in the alternate flash bank
-and then reset with that new image temporarily, use this:
-
-tftp 100 u-boot.bin.8544ds
-erase ffb8 ffbf
-cp.b 100 ffb8 8
-pixis_reset altbank
-
-
-To overwrite the image in 

[PATCH 09/16] ppc: Remove MPC8349ITX board

2021-02-09 Thread Tom Rini
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Signed-off-by: Tom Rini 
---
 arch/powerpc/cpu/mpc83xx/Kconfig|   6 -
 board/freescale/mpc8349itx/Kconfig  |  12 -
 board/freescale/mpc8349itx/MAINTAINERS  |   8 -
 board/freescale/mpc8349itx/Makefile |   6 -
 board/freescale/mpc8349itx/README   | 186 --
 board/freescale/mpc8349itx/mpc8349itx.c | 401 -
 board/freescale/mpc8349itx/pci.c| 104 --
 configs/MPC8349ITXGP_defconfig  | 188 --
 configs/MPC8349ITX_LOWBOOT_defconfig| 196 ---
 configs/MPC8349ITX_defconfig| 195 ---
 include/configs/MPC8349ITX.h| 441 
 11 files changed, 1743 deletions(-)
 delete mode 100644 board/freescale/mpc8349itx/Kconfig
 delete mode 100644 board/freescale/mpc8349itx/MAINTAINERS
 delete mode 100644 board/freescale/mpc8349itx/Makefile
 delete mode 100644 board/freescale/mpc8349itx/README
 delete mode 100644 board/freescale/mpc8349itx/mpc8349itx.c
 delete mode 100644 board/freescale/mpc8349itx/pci.c
 delete mode 100644 configs/MPC8349ITXGP_defconfig
 delete mode 100644 configs/MPC8349ITX_LOWBOOT_defconfig
 delete mode 100644 configs/MPC8349ITX_defconfig
 delete mode 100644 include/configs/MPC8349ITX.h

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 2bae08e27863..f34acf7fa7f5 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -75,11 +75,6 @@ config TARGET_MPC8349EMDS_SDRAM
select SYS_FSL_DDR_BE
select SYS_FSL_HAS_DDR2
 
-config TARGET_MPC8349ITX
-   bool "Support MPC8349ITX"
-   select ARCH_MPC8349
-   imply CMD_IRQ
-
 config TARGET_MPC837XEMDS
bool "Support MPC837XEMDS"
select ARCH_MPC837X
@@ -336,7 +331,6 @@ source "board/freescale/mpc8315erdb/Kconfig"
 source "board/freescale/mpc8323erdb/Kconfig"
 source "board/freescale/mpc832xemds/Kconfig"
 source "board/freescale/mpc8349emds/Kconfig"
-source "board/freescale/mpc8349itx/Kconfig"
 source "board/freescale/mpc837xemds/Kconfig"
 source "board/freescale/mpc837xerdb/Kconfig"
 source "board/ids/ids8313/Kconfig"
diff --git a/board/freescale/mpc8349itx/Kconfig 
b/board/freescale/mpc8349itx/Kconfig
deleted file mode 100644
index ce3fffda7d82..
--- a/board/freescale/mpc8349itx/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_MPC8349ITX
-
-config SYS_BOARD
-   default "mpc8349itx"
-
-config SYS_VENDOR
-   default "freescale"
-
-config SYS_CONFIG_NAME
-   default "MPC8349ITX"
-
-endif
diff --git a/board/freescale/mpc8349itx/MAINTAINERS 
b/board/freescale/mpc8349itx/MAINTAINERS
deleted file mode 100644
index d0388ad6e55c..
--- a/board/freescale/mpc8349itx/MAINTAINERS
+++ /dev/null
@@ -1,8 +0,0 @@
-MPC8349ITX BOARD
-#M:-
-S: Maintained
-F: board/freescale/mpc8349itx/
-F: include/configs/MPC8349ITX.h
-F: configs/MPC8349ITX_defconfig
-F: configs/MPC8349ITX_LOWBOOT_defconfig
-F: configs/MPC8349ITXGP_defconfig
diff --git a/board/freescale/mpc8349itx/Makefile 
b/board/freescale/mpc8349itx/Makefile
deleted file mode 100644
index 803cba09ffb9..
--- a/board/freescale/mpc8349itx/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) Freescale Semiconductor, Inc. 2006.
-
-obj-y += mpc8349itx.o
-obj-$(CONFIG_PCI) += pci.o
diff --git a/board/freescale/mpc8349itx/README 
b/board/freescale/mpc8349itx/README
deleted file mode 100644
index 3012b837377d..
--- a/board/freescale/mpc8349itx/README
+++ /dev/null
@@ -1,186 +0,0 @@
-Freescale MPC8349E-mITX and MPC8349E-mITX-GP Boards

-
-1. Board Description
-
-   The MPC8349E-mITX and MPC8349E-mITX-GP are reference boards featuring
-   the Freescale MPC8349E processor in a Mini-ITX form factor.
-
-   The MPC8349E-mITX-GP is an MPC8349E-mITX with the following differences:
-
-   A) One 8MB on-board flash EEPROM chip, instead of two.
-   B) No SATA controller
-   C) No Compact Flash slot
-   D) No Mini-PCI slot
-   E) No Vitesse 7385 5-port Ethernet switch
-   F) No 4-port USB Type-A interface
-
-2. Board Switches and Jumpers
-
-2.0Descriptions for all of the board jumpers can be found in the User
-   Guide.  Of particular interest to U-Boot developers is jumper J22:
-
-   Pos.NameDefault Description
-   ---
-   A   LGPL0   ON (0)  HRCW source, bit 0
-   B   LGPL1   ON (0)  HRCW source, bit 1
-   C   LGPL3   ON (0)  HRCW source, bit 2
-   D   LGPL5   

[PATCH 12/16] ppc: Remove MPC8610HPCD board

2021-02-09 Thread Tom Rini
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Priyanka Jain 
Signed-off-by: Tom Rini 
---
 arch/powerpc/cpu/mpc86xx/Kconfig  |   6 -
 board/freescale/common/pixis.h|  30 -
 board/freescale/mpc8610hpcd/Kconfig   |  12 -
 board/freescale/mpc8610hpcd/MAINTAINERS   |   6 -
 board/freescale/mpc8610hpcd/Makefile  |   7 -
 board/freescale/mpc8610hpcd/README|  73 ---
 board/freescale/mpc8610hpcd/ddr.c |  56 --
 board/freescale/mpc8610hpcd/law.c |  21 -
 board/freescale/mpc8610hpcd/mpc8610hpcd.c | 335 ---
 board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c |  72 ---
 configs/MPC8610HPCD_defconfig |  37 --
 include/configs/MPC8610HPCD.h | 559 --
 12 files changed, 1214 deletions(-)
 delete mode 100644 board/freescale/mpc8610hpcd/Kconfig
 delete mode 100644 board/freescale/mpc8610hpcd/MAINTAINERS
 delete mode 100644 board/freescale/mpc8610hpcd/Makefile
 delete mode 100644 board/freescale/mpc8610hpcd/README
 delete mode 100644 board/freescale/mpc8610hpcd/ddr.c
 delete mode 100644 board/freescale/mpc8610hpcd/law.c
 delete mode 100644 board/freescale/mpc8610hpcd/mpc8610hpcd.c
 delete mode 100644 board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
 delete mode 100644 configs/MPC8610HPCD_defconfig
 delete mode 100644 include/configs/MPC8610HPCD.h

diff --git a/arch/powerpc/cpu/mpc86xx/Kconfig b/arch/powerpc/cpu/mpc86xx/Kconfig
index 0f253051f26d..294485794bdf 100644
--- a/arch/powerpc/cpu/mpc86xx/Kconfig
+++ b/arch/powerpc/cpu/mpc86xx/Kconfig
@@ -13,11 +13,6 @@ config TARGET_SBC8641D
select ARCH_MPC8641
select BOARD_EARLY_INIT_F
 
-config TARGET_MPC8610HPCD
-   bool "Support MPC8610HPCD"
-   select ARCH_MPC8610
-   select BOARD_EARLY_INIT_F
-
 config TARGET_MPC8641HPCN
bool "Support MPC8641HPCN"
select ARCH_MPC8641
@@ -62,7 +57,6 @@ config SYS_FSL_NUM_LAWS
Number of local access windows. This is fixed per SoC.
If not sure, do not change.
 
-source "board/freescale/mpc8610hpcd/Kconfig"
 source "board/freescale/mpc8641hpcn/Kconfig"
 source "board/sbc8641d/Kconfig"
 source "board/xes/xpedite517x/Kconfig"
diff --git a/board/freescale/common/pixis.h b/board/freescale/common/pixis.h
index f927f2c754da..36c94862a55b 100644
--- a/board/freescale/common/pixis.h
+++ b/board/freescale/common/pixis.h
@@ -72,36 +72,6 @@ typedef struct pixis {
u8 res2[34];
 } __attribute__ ((packed)) pixis_t;
 
-#elif defined(CONFIG_TARGET_MPC8610HPCD)
-typedef struct pixis {
-   u8 id;
-   u8 ver; /* also called arch */
-   u8 pver;
-   u8 csr;
-   u8 rst;
-   u8 pwr;
-   u8 aux;
-   u8 spd;
-   u8 brdcfg0;
-   u8 brdcfg1;
-   u8 res[4];
-   u8 led;
-   u8 serno;
-   u8 vctl;
-   u8 vstat;
-   u8 vcfgen0;
-   u8 vcfgen1;
-   u8 vcore0;
-   u8 res1;
-   u8 vboot;
-   u8 vspeed[2];
-   u8 res2;
-   u8 sclk[3];
-   u8 res3;
-   u8 watch;
-   u8 res4[33];
-} __attribute__ ((packed)) pixis_t;
-
 #elif defined(CONFIG_TARGET_MPC8641HPCN)
 typedef struct pixis {
u8 id;
diff --git a/board/freescale/mpc8610hpcd/Kconfig 
b/board/freescale/mpc8610hpcd/Kconfig
deleted file mode 100644
index 8f713beaa842..
--- a/board/freescale/mpc8610hpcd/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_MPC8610HPCD
-
-config SYS_BOARD
-   default "mpc8610hpcd"
-
-config SYS_VENDOR
-   default "freescale"
-
-config SYS_CONFIG_NAME
-   default "MPC8610HPCD"
-
-endif
diff --git a/board/freescale/mpc8610hpcd/MAINTAINERS 
b/board/freescale/mpc8610hpcd/MAINTAINERS
deleted file mode 100644
index 9b1e0cd4e56b..
--- a/board/freescale/mpc8610hpcd/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-MPC8610HPCD BOARD
-M: Priyanka Jain 
-S: Maintained
-F: board/freescale/mpc8610hpcd/
-F: include/configs/MPC8610HPCD.h
-F: configs/MPC8610HPCD_defconfig
diff --git a/board/freescale/mpc8610hpcd/Makefile 
b/board/freescale/mpc8610hpcd/Makefile
deleted file mode 100644
index 3a02a0641690..
--- a/board/freescale/mpc8610hpcd/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-# Copyright 2007 Freescale Semiconductor, Inc.
-
-obj-y  += mpc8610hpcd.o
-obj-$(CONFIG_SYS_FSL_DDR2) += ddr.o
-obj-y  += law.o
-obj-$(CONFIG_FSL_DIU_FB)   += mpc8610hpcd_diu.o
diff --git a/board/freescale/mpc8610hpcd/README 
b/board/freescale/mpc8610hpcd/README
deleted file mode 100644
index 066e625d484d..
--- a/board/freescale/mpc8610hpcd/README
+++ /dev/null
@@ -1,73 +0,0 @@
-Freescale MPC8610HPCD board
-===
-
-
-Building U-Boot

-
-$ make MPC8610HPCD_config
- 

[PATCH 16/16] ata: Make LIBATA means AHCI is enabled mandatory.

2021-02-09 Thread Tom Rini
The migration deadline for having LIBATA mean that AHCI is also enabled
was v2019.07.  As that has long since passed, adjust the Kconfig
dependencies.

Signed-off-by: Tom Rini 
---
 Makefile| 11 ---
 drivers/ata/Kconfig |  6 --
 2 files changed, 4 insertions(+), 13 deletions(-)

diff --git a/Makefile b/Makefile
index 9d6ac5e16fe5..a71b66c8449a 100644
--- a/Makefile
+++ b/Makefile
@@ -1064,17 +1064,6 @@ ifneq 
($(CONFIG_DM_USB)$(CONFIG_OF_CONTROL)$(CONFIG_BLK),yyy)
@echo >&2 ""
 endif
 endif
-ifeq ($(CONFIG_LIBATA),y)
-ifneq ($(CONFIG_AHCI),y)
-   @echo >&2 "= WARNING =="
-   @echo >&2 "This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
-   @echo >&2 "enabled. Please update the storage controller driver to use"
-   @echo >&2 "CONFIG_AHCI before the v2019.07 release."
-   @echo >&2 "Failure to update by the deadline may result in board 
removal."
-   @echo >&2 "See doc/driver-model/migration.rst for more info."
-   @echo >&2 ""
-endif
-endif
 ifeq ($(CONFIG_PCI),y)
 ifneq ($(CONFIG_DM_PCI),y)
@echo >&2 "= WARNING =="
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 9ff4b8736c1f..5bbd76a3c70c 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -77,8 +77,9 @@ config DWC_AHSATA_AHCI
 
 config FSL_SATA
bool "Enable Freescale SATA controller driver support"
+   select AHCI
select LIBATA
-   select AHCI if BLK
+   depends on BLK
help
  Enable this driver to support the SATA controller found in
  some Freescale PowerPC SoCs.
@@ -94,8 +95,9 @@ config SATA_MV
 
 config SATA_SIL
bool "Enable Silicon Image SIL3131 / SIL3132 / SIL3124 SATA driver 
support"
+   select AHCI
select LIBATA
-   select AHCI if BLK
+   depends on BLK
help
  Enable this driver to support the SIL3131, SIL3132 and SIL3124
  SATA controllers.
-- 
2.17.1



[PATCH 14/16] boards: Disable CMD_SATA on platforms that no longer have a SATA driver enabled

2021-02-09 Thread Tom Rini
There are a number of platforms that depend on a SATA driver that has
been converted to require AHCI but the platforms themselves are behind
on other migrations that would make it trivial to enable AHCI.  Disable
SATA in these cases.

Signed-off-by: Tom Rini 
---
 arch/powerpc/cpu/mpc83xx/Kconfig  |  2 --
 arch/powerpc/cpu/mpc85xx/Kconfig  | 20 ---
 configs/MPC8315ERDB_defconfig |  1 -
 configs/MPC837XERDB_SLAVE_defconfig   |  1 -
 configs/MPC837XERDB_defconfig |  1 -
 configs/cgtqmx6eval_defconfig |  1 -
 ...trolcenterd_36BIT_SDCARD_DEVELOP_defconfig |  1 -
 configs/controlcenterd_36BIT_SDCARD_defconfig |  1 -
 configs/udoo_defconfig|  1 -
 include/configs/udoo.h|  1 -
 10 files changed, 30 deletions(-)

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index f34acf7fa7f5..b19c3cefabab 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -79,8 +79,6 @@ config TARGET_MPC837XEMDS
bool "Support MPC837XEMDS"
select ARCH_MPC837X
select BOARD_EARLY_INIT_F
-   imply CMD_SATA
-   imply FSL_SATA
 
 config TARGET_MPC837XERDB
bool "Support MPC837XERDB"
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 870ab800e86b..4d3d310d07b4 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -45,7 +45,6 @@ config TARGET_P5040DS
select PHYS_64BIT
select ARCH_P5040
select BOARD_LATE_INIT if CHAIN_OF_TRUST
-   imply CMD_SATA
imply PANIC_HANG
 
 config TARGET_MPC8541CDS
@@ -75,7 +74,6 @@ config TARGET_P1010RDB_PA
select SUPPORT_SPL
select SUPPORT_TPL
imply CMD_EEPROM
-   imply CMD_SATA
imply PANIC_HANG
 
 config TARGET_P1010RDB_PB
@@ -85,7 +83,6 @@ config TARGET_P1010RDB_PB
select SUPPORT_SPL
select SUPPORT_TPL
imply CMD_EEPROM
-   imply CMD_SATA
imply PANIC_HANG
 
 config TARGET_P1020RDB_PC
@@ -154,7 +151,6 @@ config TARGET_T1040RDB
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
-   imply CMD_SATA
imply PANIC_HANG
 
 config TARGET_T1040D4RDB
@@ -163,7 +159,6 @@ config TARGET_T1040D4RDB
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
-   imply CMD_SATA
imply PANIC_HANG
 
 config TARGET_T1042RDB
@@ -172,7 +167,6 @@ config TARGET_T1042RDB
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
-   imply CMD_SATA
 
 config TARGET_T1042D4RDB
bool "Support T1042D4RDB"
@@ -180,7 +174,6 @@ config TARGET_T1042D4RDB
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
-   imply CMD_SATA
imply PANIC_HANG
 
 config TARGET_T1042RDB_PI
@@ -189,7 +182,6 @@ config TARGET_T1042RDB_PI
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
-   imply CMD_SATA
imply PANIC_HANG
 
 config TARGET_T2080QDS
@@ -528,10 +520,8 @@ config ARCH_P1010
imply CMD_EEPROM
imply CMD_MTDPARTS
imply CMD_NAND
-   imply CMD_SATA
imply CMD_PCI
imply CMD_REGINFO
-   imply FSL_SATA
 
 config ARCH_P1011
bool
@@ -791,9 +781,7 @@ config ARCH_P5020
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_ELBC
-   imply CMD_SATA
imply CMD_REGINFO
-   imply FSL_SATA
 
 config ARCH_P5040
bool
@@ -816,9 +804,7 @@ config ARCH_P5040
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_ELBC
-   imply CMD_SATA
imply CMD_REGINFO
-   imply FSL_SATA
 
 config ARCH_QEMU_E500
bool
@@ -886,9 +872,7 @@ config ARCH_T1040
select FSL_IFC
imply CMD_MTDPARTS
imply CMD_NAND
-   imply CMD_SATA
imply CMD_REGINFO
-   imply FSL_SATA
 
 config ARCH_T1042
bool
@@ -910,9 +894,7 @@ config ARCH_T1042
select FSL_IFC
imply CMD_MTDPARTS
imply CMD_NAND
-   imply CMD_SATA
imply CMD_REGINFO
-   imply FSL_SATA
 
 config ARCH_T2080
bool
@@ -985,10 +967,8 @@ config ARCH_T4160
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
-   imply CMD_SATA
imply CMD_NAND
imply CMD_REGINFO
-   imply FSL_SATA
 
 config ARCH_T4240
bool
diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig
index f03fec92f867..1a8983584e9e 100644
--- a/configs/MPC8315ERDB_defconfig
+++ b/configs/MPC8315ERDB_defconfig
@@ -118,7 +118,6 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_PCI=y
-CONFIG_CMD_SATA=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 

[PATCH 15/16] drivers: ata: Remove mvsata_ide driver

2021-02-09 Thread Tom Rini
The mvsata_ide driver was due for DM conversion by v2019.07.  As that
has long passed, remove the driver and disable it in the boards which
had enabled it.

Signed-off-by: Tom Rini 
---
 Makefile |  10 -
 arch/arm/mach-kirkwood/include/mach/config.h |   2 -
 configs/dns325_defconfig |   1 -
 configs/dreamplug_defconfig  |   1 -
 configs/ds109_defconfig  |   1 -
 configs/edminiv2_defconfig   |   1 -
 configs/goflexhome_defconfig |   1 -
 configs/guruplug_defconfig   |   1 -
 configs/ib62x0_defconfig |   1 -
 configs/nas220_defconfig |   1 -
 configs/nsa310s_defconfig|   1 -
 drivers/ata/Kconfig  |   6 -
 drivers/ata/Makefile |   1 -
 drivers/ata/mvsata_ide.c | 199 ---
 include/configs/dns325.h |   8 -
 include/configs/dreamplug.h  |   7 -
 include/configs/ds109.h  |   7 -
 include/configs/edminiv2.h   |   3 -
 include/configs/goflexhome.h |   7 -
 include/configs/guruplug.h   |   7 -
 include/configs/ib62x0.h |   3 -
 include/configs/nas220.h |   8 -
 include/configs/nsa310s.h|   2 -
 include/configs/sheevaplug.h |   3 -
 scripts/config_whitelist.txt |   2 -
 25 files changed, 284 deletions(-)
 delete mode 100644 drivers/ata/mvsata_ide.c

diff --git a/Makefile b/Makefile
index ebbedb1fb1af..9d6ac5e16fe5 100644
--- a/Makefile
+++ b/Makefile
@@ -1064,16 +1064,6 @@ ifneq 
($(CONFIG_DM_USB)$(CONFIG_OF_CONTROL)$(CONFIG_BLK),yyy)
@echo >&2 ""
 endif
 endif
-ifeq ($(CONFIG_MVSATA_IDE),y)
-   @echo >&2 "= WARNING =="
-   @echo >&2 "This board does use CONFIG_MVSATA_IDE which is not"
-   @echo >&2 "ported to driver-model (DM) yet. Please update the storage"
-   @echo >&2 "controller driver to use CONFIG_AHCI before the v2019.07"
-   @echo >&2 "release."
-   @echo >&2 "Failure to update by the deadline may result in board 
removal."
-   @echo >&2 "See doc/driver-model/migration.rst for more info."
-   @echo >&2 ""
-endif
 ifeq ($(CONFIG_LIBATA),y)
 ifneq ($(CONFIG_AHCI),y)
@echo >&2 "= WARNING =="
diff --git a/arch/arm/mach-kirkwood/include/mach/config.h 
b/arch/arm/mach-kirkwood/include/mach/config.h
index 3bd032e08790..ef68fc86b22e 100644
--- a/arch/arm/mach-kirkwood/include/mach/config.h
+++ b/arch/arm/mach-kirkwood/include/mach/config.h
@@ -74,8 +74,6 @@
  */
 #ifdef CONFIG_IDE
 #define __io
-#define CONFIG_IDE_PREINIT
-#define CONFIG_MVSATA_IDE_USE_PORT1
 /* Needs byte-swapping for ATA data register */
 #define CONFIG_IDE_SWAP_IO
 /* Data, registers and alternate blocks are at the same offset */
diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig
index a5fe9cd33160..493c802d5208 100644
--- a/configs/dns325_defconfig
+++ b/configs/dns325_defconfig
@@ -36,7 +36,6 @@ CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NETCONSOLE=y
 CONFIG_DM=y
-CONFIG_MVSATA_IDE=y
 CONFIG_BLK=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 2c27726fcde4..b4dedc9e59b1 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -34,7 +34,6 @@ CONFIG_ENV_SPI_MAX_HZ=5000
 CONFIG_ENV_ADDR=0x10
 CONFIG_NETCONSOLE=y
 CONFIG_DM=y
-CONFIG_MVSATA_IDE=y
 CONFIG_BLK=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig
index e412e3f5937c..77c094b76637 100644
--- a/configs/ds109_defconfig
+++ b/configs/ds109_defconfig
@@ -30,7 +30,6 @@ CONFIG_ENV_SPI_MAX_HZ=5000
 CONFIG_ENV_ADDR=0x3D
 CONFIG_NETCONSOLE=y
 CONFIG_DM=y
-CONFIG_MVSATA_IDE=y
 CONFIG_BLK=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig
index 916775e9ed17..0aacb35e44c4 100644
--- a/configs/edminiv2_defconfig
+++ b/configs/edminiv2_defconfig
@@ -32,7 +32,6 @@ CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xFFF84000
 CONFIG_NETCONSOLE=y
-CONFIG_MVSATA_IDE=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index b271822dcbfd..6e3e6325e921 100644
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -37,7 +37,6 @@ CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NETCONSOLE=y
 CONFIG_DM=y
-CONFIG_MVSATA_IDE=y
 CONFIG_BLK=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
diff --git a/configs/guruplug_defconfig 

[PATCH 11/16] ppc: Remove MPC8572DS board

2021-02-09 Thread Tom Rini
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Priyanka Jain 
Signed-off-by: Tom Rini 
---
 arch/powerpc/cpu/mpc85xx/Kconfig  |   9 -
 board/freescale/common/pixis.h|  29 --
 board/freescale/mpc8572ds/Kconfig |  12 -
 board/freescale/mpc8572ds/MAINTAINERS |   7 -
 board/freescale/mpc8572ds/Makefile|  10 -
 board/freescale/mpc8572ds/README  | 166 ---
 board/freescale/mpc8572ds/ddr.c   | 166 ---
 board/freescale/mpc8572ds/law.c   |  19 -
 board/freescale/mpc8572ds/mpc8572ds.c | 260 ---
 board/freescale/mpc8572ds/tlb.c   |  87 
 configs/MPC8572DS_36BIT_defconfig |  56 ---
 configs/MPC8572DS_defconfig   |  54 ---
 include/configs/MPC8572DS.h   | 600 --
 13 files changed, 1475 deletions(-)
 delete mode 100644 board/freescale/mpc8572ds/Kconfig
 delete mode 100644 board/freescale/mpc8572ds/MAINTAINERS
 delete mode 100644 board/freescale/mpc8572ds/Makefile
 delete mode 100644 board/freescale/mpc8572ds/README
 delete mode 100644 board/freescale/mpc8572ds/ddr.c
 delete mode 100644 board/freescale/mpc8572ds/law.c
 delete mode 100644 board/freescale/mpc8572ds/mpc8572ds.c
 delete mode 100644 board/freescale/mpc8572ds/tlb.c
 delete mode 100644 configs/MPC8572DS_36BIT_defconfig
 delete mode 100644 configs/MPC8572DS_defconfig
 delete mode 100644 include/configs/MPC8572DS.h

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 28c9f113d3f5..870ab800e86b 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -68,14 +68,6 @@ config TARGET_MPC8569MDS
bool "Support MPC8569MDS"
select ARCH_MPC8569
 
-config TARGET_MPC8572DS
-   bool "Support MPC8572DS"
-   select ARCH_MPC8572
-# Use DDR3 controller with DDR2 DIMMs on this board
-   select SYS_FSL_DDRC_GEN3
-   imply SCSI
-   imply PANIC_HANG
-
 config TARGET_P1010RDB_PA
bool "Support P1010RDB_PA"
select ARCH_P1010
@@ -1442,7 +1434,6 @@ source "board/freescale/mpc8548cds/Kconfig"
 source "board/freescale/mpc8555cds/Kconfig"
 source "board/freescale/mpc8568mds/Kconfig"
 source "board/freescale/mpc8569mds/Kconfig"
-source "board/freescale/mpc8572ds/Kconfig"
 source "board/freescale/p1010rdb/Kconfig"
 source "board/freescale/p1_p2_rdb_pc/Kconfig"
 source "board/freescale/p2041rdb/Kconfig"
diff --git a/board/freescale/common/pixis.h b/board/freescale/common/pixis.h
index 40053c45bb75..f927f2c754da 100644
--- a/board/freescale/common/pixis.h
+++ b/board/freescale/common/pixis.h
@@ -72,35 +72,6 @@ typedef struct pixis {
u8 res2[34];
 } __attribute__ ((packed)) pixis_t;
 
-#elif defined(CONFIG_TARGET_MPC8572DS)
-typedef struct pixis {
-   u8 id;
-   u8 ver;
-   u8 pver;
-   u8 csr;
-   u8 rst;
-   u8 pwr1;
-   u8 aux1;
-   u8 spd;
-   u8 aux2;
-   u8 res[7];
-   u8 vctl;
-   u8 vstat;
-   u8 vcfgen0;
-   u8 vcfgen1;
-   u8 vcore0;
-   u8 res1;
-   u8 vboot;
-   u8 vspeed[3];
-   u8 res2[2];
-   u8 sclk[3];
-   u8 dclk[3];
-   u8 res3[2];
-   u8 watch;
-   u8 led;
-   u8 res4[25];
-} __attribute__ ((packed)) pixis_t;
-
 #elif defined(CONFIG_TARGET_MPC8610HPCD)
 typedef struct pixis {
u8 id;
diff --git a/board/freescale/mpc8572ds/Kconfig 
b/board/freescale/mpc8572ds/Kconfig
deleted file mode 100644
index 38132cf3feba..
--- a/board/freescale/mpc8572ds/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_MPC8572DS
-
-config SYS_BOARD
-   default "mpc8572ds"
-
-config SYS_VENDOR
-   default "freescale"
-
-config SYS_CONFIG_NAME
-   default "MPC8572DS"
-
-endif
diff --git a/board/freescale/mpc8572ds/MAINTAINERS 
b/board/freescale/mpc8572ds/MAINTAINERS
deleted file mode 100644
index d7e9b1f41f41..
--- a/board/freescale/mpc8572ds/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-MPC8572DS BOARD
-M: Priyanka Jain 
-S: Maintained
-F: board/freescale/mpc8572ds/
-F: include/configs/MPC8572DS.h
-F: configs/MPC8572DS_defconfig
-F: configs/MPC8572DS_36BIT_defconfig
diff --git a/board/freescale/mpc8572ds/Makefile 
b/board/freescale/mpc8572ds/Makefile
deleted file mode 100644
index 5318e3be7280..
--- a/board/freescale/mpc8572ds/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright 2007 Freescale Semiconductor, Inc.
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-
-obj-y  += mpc8572ds.o
-obj-y  += ddr.o
-obj-y  += law.o
-obj-y  += tlb.o
diff --git a/board/freescale/mpc8572ds/README b/board/freescale/mpc8572ds/README
deleted file mode 100644
index f1ffdd173087..
--- a/board/freescale/mpc8572ds/README
+++ /dev/null
@@ -1,166 

[PATCH 06/16] arm: Remove dms-ba16 board

2021-02-09 Thread Tom Rini
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Akshay Bhat 
Cc: Ken Lin 
Signed-off-by: Tom Rini 
---
 arch/arm/mach-imx/mx6/Kconfig|   7 -
 board/advantech/dms-ba16/Kconfig |  31 --
 board/advantech/dms-ba16/MAINTAINERS |   8 -
 board/advantech/dms-ba16/Makefile|   6 -
 board/advantech/dms-ba16/clocks.cfg  |  25 -
 board/advantech/dms-ba16/ddr-setup.cfg   |  39 --
 board/advantech/dms-ba16/dms-ba16.c  | 629 ---
 board/advantech/dms-ba16/dms-ba16_1g.cfg |  24 -
 board/advantech/dms-ba16/dms-ba16_2g.cfg |  24 -
 board/advantech/dms-ba16/micron-1g.cfg   |  63 ---
 board/advantech/dms-ba16/samsung-2g.cfg  |  63 ---
 configs/dms-ba16-1g_defconfig|  66 ---
 configs/dms-ba16_defconfig   |  65 ---
 include/configs/advantech_dms-ba16.h | 222 
 14 files changed, 1272 deletions(-)
 delete mode 100644 board/advantech/dms-ba16/Kconfig
 delete mode 100644 board/advantech/dms-ba16/MAINTAINERS
 delete mode 100644 board/advantech/dms-ba16/Makefile
 delete mode 100644 board/advantech/dms-ba16/clocks.cfg
 delete mode 100644 board/advantech/dms-ba16/ddr-setup.cfg
 delete mode 100644 board/advantech/dms-ba16/dms-ba16.c
 delete mode 100644 board/advantech/dms-ba16/dms-ba16_1g.cfg
 delete mode 100644 board/advantech/dms-ba16/dms-ba16_2g.cfg
 delete mode 100644 board/advantech/dms-ba16/micron-1g.cfg
 delete mode 100644 board/advantech/dms-ba16/samsung-2g.cfg
 delete mode 100644 configs/dms-ba16-1g_defconfig
 delete mode 100644 configs/dms-ba16_defconfig
 delete mode 100644 include/configs/advantech_dms-ba16.h

diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index dacfe623903c..ebc5e6c01d97 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -111,12 +111,6 @@ choice
prompt "MX6 board select"
optional
 
-config TARGET_ADVANTECH_DMS_BA16
-   bool "Advantech dms-ba16"
-   depends on MX6Q
-   select BOARD_LATE_INIT
-   imply CMD_SATA
-
 config TARGET_APALIS_IMX6
bool "Toradex Apalis iMX6 board"
depends on MX6Q
@@ -700,7 +694,6 @@ config SYS_SOC
 
 source "board/ge/bx50v3/Kconfig"
 source "board/ge/b1x5v2/Kconfig"
-source "board/advantech/dms-ba16/Kconfig"
 source "board/aristainetos/Kconfig"
 source "board/armadeus/opos6uldev/Kconfig"
 source "board/bachmann/ot1200/Kconfig"
diff --git a/board/advantech/dms-ba16/Kconfig b/board/advantech/dms-ba16/Kconfig
deleted file mode 100644
index 040eb866b53d..
--- a/board/advantech/dms-ba16/Kconfig
+++ /dev/null
@@ -1,31 +0,0 @@
-if TARGET_ADVANTECH_DMS_BA16
-
-choice
-   prompt "DDR Size"
-   default SYS_DDR_2G
-
-config SYS_DDR_1G
-   bool "1GiB"
-
-config SYS_DDR_2G
-   bool "2GiB"
-
-endchoice
-
-config IMX_CONFIG
-   default "board/advantech/dms-ba16/dms-ba16_2g.cfg" if SYS_DDR_2G
-   default "board/advantech/dms-ba16/dms-ba16_1g.cfg" if SYS_DDR_1G
-
-config SYS_BOARD
-   default "dms-ba16"
-
-config SYS_VENDOR
-   default "advantech"
-
-config SYS_SOC
-   default "mx6"
-
-config SYS_CONFIG_NAME
-   default "advantech_dms-ba16"
-
-endif
diff --git a/board/advantech/dms-ba16/MAINTAINERS 
b/board/advantech/dms-ba16/MAINTAINERS
deleted file mode 100644
index e8ea3dd7b3cf..
--- a/board/advantech/dms-ba16/MAINTAINERS
+++ /dev/null
@@ -1,8 +0,0 @@
-ADVANTECH_DMS-BA16 BOARD
-M: Akshay Bhat 
-M: Ken Lin 
-S: Maintained
-F: board/advantech/dms-ba16/
-F: include/configs/advantech_dms-ba16.h
-F: configs/dms-ba16_defconfig
-F: configs/dms-ba16-1g_defconfig
diff --git a/board/advantech/dms-ba16/Makefile 
b/board/advantech/dms-ba16/Makefile
deleted file mode 100644
index b87fc29f065e..
--- a/board/advantech/dms-ba16/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright 2016 Timesys Corporation
-# Copyright 2016 Advantech Corporation
-
-obj-y  := dms-ba16.o
diff --git a/board/advantech/dms-ba16/clocks.cfg 
b/board/advantech/dms-ba16/clocks.cfg
deleted file mode 100644
index abc769c4e5fd..
--- a/board/advantech/dms-ba16/clocks.cfg
+++ /dev/null
@@ -1,25 +0,0 @@
-/* set the default clock gate to save power */
-DATA 4, CCM_CCGR0, 0x00C03F3F
-DATA 4, CCM_CCGR1, 0x0030FC03
-DATA 4, CCM_CCGR2, 0x0FFFC000
-DATA 4, CCM_CCGR3, 0x3FF0
-DATA 4, CCM_CCGR4, 0x00FFF300
-DATA 4, CCM_CCGR5, 0x0FC3
-DATA 4, CCM_CCGR6, 0x03FF
-
-/* enable AXI cache for VDOA/VPU/IPU */
-DATA 4, MX6_IOMUXC_GPR4, 0xF0CF
-/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-DATA 4, MX6_IOMUXC_GPR6, 0x007F007F
-DATA 4, MX6_IOMUXC_GPR7, 0x007F007F
-
-/*
- * Setup CCM_CCOSR register as follows:
- *
- * cko1_en  1--> CKO1 enabled
- * cko1_div 111  --> divide by 8
- * cko1_sel 

[PATCH 08/16] arm: Remove mx53loco board

2021-02-09 Thread Tom Rini
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Jason Liu 
Signed-off-by: Tom Rini 
---
 arch/arm/mach-imx/mx5/Kconfig |   6 -
 arch/arm/mach-imx/mx5/Makefile|   1 -
 board/freescale/mx53loco/Kconfig  |  15 -
 board/freescale/mx53loco/MAINTAINERS  |   6 -
 board/freescale/mx53loco/Makefile |   7 -
 board/freescale/mx53loco/mx53loco.c   | 367 --
 board/freescale/mx53loco/mx53loco_video.c | 114 --
 .../mx53loco => k+p/kp_imx53}/imximage.cfg|   0
 configs/kp_imx53_defconfig|   2 +-
 configs/mx53loco_defconfig|  43 --
 include/configs/mx53loco.h| 181 -
 11 files changed, 1 insertion(+), 741 deletions(-)
 delete mode 100644 board/freescale/mx53loco/Kconfig
 delete mode 100644 board/freescale/mx53loco/MAINTAINERS
 delete mode 100644 board/freescale/mx53loco/Makefile
 delete mode 100644 board/freescale/mx53loco/mx53loco.c
 delete mode 100644 board/freescale/mx53loco/mx53loco_video.c
 rename board/{freescale/mx53loco => k+p/kp_imx53}/imximage.cfg (100%)
 delete mode 100644 configs/mx53loco_defconfig
 delete mode 100644 include/configs/mx53loco.h

diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig
index bde37bb97e13..b2acf766134a 100644
--- a/arch/arm/mach-imx/mx5/Kconfig
+++ b/arch/arm/mach-imx/mx5/Kconfig
@@ -61,11 +61,6 @@ config TARGET_MX53EVK
select BOARD_LATE_INIT
select MX53
 
-config TARGET_MX53LOCO
-   bool "Support mx53loco"
-   select BOARD_LATE_INIT
-   select MX53
-
 config TARGET_MX53PPD
bool "Support mx53ppd"
select MX53
@@ -93,7 +88,6 @@ source "board/beckhoff/mx53cx9020/Kconfig"
 source "board/freescale/mx51evk/Kconfig"
 source "board/freescale/mx53ard/Kconfig"
 source "board/freescale/mx53evk/Kconfig"
-source "board/freescale/mx53loco/Kconfig"
 source "board/freescale/mx53smd/Kconfig"
 source "board/ge/mx53ppd/Kconfig"
 source "board/inversepath/usbarmory/Kconfig"
diff --git a/arch/arm/mach-imx/mx5/Makefile b/arch/arm/mach-imx/mx5/Makefile
index 40d1998637ca..9692f5568eef 100644
--- a/arch/arm/mach-imx/mx5/Makefile
+++ b/arch/arm/mach-imx/mx5/Makefile
@@ -10,4 +10,3 @@ obj-y += lowlevel_init.o
 
 # common files for mx53 dram initialization
 obj-$(CONFIG_TARGET_MX53CX9020) += mx53_dram.o
-obj-$(CONFIG_TARGET_MX53LOCO)   += mx53_dram.o
diff --git a/board/freescale/mx53loco/Kconfig b/board/freescale/mx53loco/Kconfig
deleted file mode 100644
index 5ca1672bf7a5..
--- a/board/freescale/mx53loco/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_MX53LOCO
-
-config SYS_BOARD
-   default "mx53loco"
-
-config SYS_VENDOR
-   default "freescale"
-
-config SYS_SOC
-   default "mx5"
-
-config SYS_CONFIG_NAME
-   default "mx53loco"
-
-endif
diff --git a/board/freescale/mx53loco/MAINTAINERS 
b/board/freescale/mx53loco/MAINTAINERS
deleted file mode 100644
index b4bd1a1842bd..
--- a/board/freescale/mx53loco/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-MX53LOCO BOARD
-M: Jason Liu 
-S: Maintained
-F: board/freescale/mx53loco/
-F: include/configs/mx53loco.h
-F: configs/mx53loco_defconfig
diff --git a/board/freescale/mx53loco/Makefile 
b/board/freescale/mx53loco/Makefile
deleted file mode 100644
index d2ebd94dca1d..
--- a/board/freescale/mx53loco/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2011 Freescale Semiconductor, Inc.
-# Jason Liu 
-
-obj-y  += mx53loco.o
-obj-$(CONFIG_VIDEO)+= mx53loco_video.o
diff --git a/board/freescale/mx53loco/mx53loco.c 
b/board/freescale/mx53loco/mx53loco.c
deleted file mode 100644
index 1da263bb5d5f..
--- a/board/freescale/mx53loco/mx53loco.c
+++ /dev/null
@@ -1,367 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc.
- * Jason Liu 
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24)
-
-DECLARE_GLOBAL_DATA_PTR;
-
-u32 get_board_rev(void)
-{
-   struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
-   struct fuse_bank *bank = >bank[0];
-   struct fuse_bank0_regs *fuse =
-   (struct fuse_bank0_regs *)bank->fuse_regs;
-
-   int rev = readl(>gp[6]);
-
-   if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR))
-   rev = 0;
-
-   return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
-}
-
-#define UART_PAD_CTRL  (PAD_CTL_HYS | 

[PATCH 07/16] arm: Remove ot1200 board

2021-02-09 Thread Tom Rini
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  In order to
convert to using the DWC SATA driver under DM further migrations are
required.

Cc: Christian Gmeiner 
Signed-off-by: Tom Rini 
---
 arch/arm/mach-imx/mx6/Kconfig  |   6 -
 board/bachmann/ot1200/Kconfig  |  12 -
 board/bachmann/ot1200/MAINTAINERS  |   6 -
 board/bachmann/ot1200/Makefile |  11 -
 board/bachmann/ot1200/README   |  20 --
 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg | 154 -
 board/bachmann/ot1200/ot1200.c | 359 -
 board/bachmann/ot1200/ot1200_spl.c | 152 -
 configs/ot1200_defconfig   |  59 
 configs/ot1200_spl_defconfig   |  70 
 include/configs/ot1200.h   |  95 --
 11 files changed, 944 deletions(-)
 delete mode 100644 board/bachmann/ot1200/Kconfig
 delete mode 100644 board/bachmann/ot1200/MAINTAINERS
 delete mode 100644 board/bachmann/ot1200/Makefile
 delete mode 100644 board/bachmann/ot1200/README
 delete mode 100644 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
 delete mode 100644 board/bachmann/ot1200/ot1200.c
 delete mode 100644 board/bachmann/ot1200/ot1200_spl.c
 delete mode 100644 configs/ot1200_defconfig
 delete mode 100644 configs/ot1200_spl_defconfig
 delete mode 100644 include/configs/ot1200.h

diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index ebc5e6c01d97..0660035a9fd2 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -470,11 +470,6 @@ config TARGET_OPOS6ULDEV
depends on MX6UL
select MX6UL_OPOS6UL
 
-config TARGET_OT1200
-   bool "Bachmann OT1200"
-   select SUPPORT_SPL
-   imply CMD_SATA
-
 config TARGET_PICO_IMX6
bool "PICO-IMX6"
depends on MX6QDL
@@ -696,7 +691,6 @@ source "board/ge/bx50v3/Kconfig"
 source "board/ge/b1x5v2/Kconfig"
 source "board/aristainetos/Kconfig"
 source "board/armadeus/opos6uldev/Kconfig"
-source "board/bachmann/ot1200/Kconfig"
 source "board/barco/platinum/Kconfig"
 source "board/barco/titanium/Kconfig"
 source "board/boundary/nitrogen6x/Kconfig"
diff --git a/board/bachmann/ot1200/Kconfig b/board/bachmann/ot1200/Kconfig
deleted file mode 100644
index 4ccb60a97fed..
--- a/board/bachmann/ot1200/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_OT1200
-
-config SYS_BOARD
-   default "ot1200"
-
-config SYS_VENDOR
-   default "bachmann"
-
-config SYS_CONFIG_NAME
-   default "ot1200"
-
-endif
diff --git a/board/bachmann/ot1200/MAINTAINERS 
b/board/bachmann/ot1200/MAINTAINERS
deleted file mode 100644
index ad75c24ee469..
--- a/board/bachmann/ot1200/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-BACHMANN ELECTRONIC OT1200 BOARD
-M: Christian Gmeiner 
-S: Maintained
-F: board/bachmann/ot1200
-F: include/configs/ot1200.h
-F: configs/ot1200*_defconfig
diff --git a/board/bachmann/ot1200/Makefile b/board/bachmann/ot1200/Makefile
deleted file mode 100644
index 73000e3d3ce6..
--- a/board/bachmann/ot1200/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2012-2013, Guennadi Liakhovetski 
-# (C) Copyright 2012-2013 Freescale Semiconductor, Inc.
-# Copyright (C) 2013, Boundary Devices 
-
-ifdef CONFIG_SPL_BUILD
-obj-y  := ot1200.o ot1200_spl.o
-else
-obj-y  := ot1200.o
-endif
diff --git a/board/bachmann/ot1200/README b/board/bachmann/ot1200/README
deleted file mode 100644
index c03d44e458a4..
--- a/board/bachmann/ot1200/README
+++ /dev/null
@@ -1,20 +0,0 @@
-U-Boot for the Bachmann electronic GmbH OT1200 devices
-
-There are two different versions of the base board, which differ
-in the way ethernet is done. The variant detection is done during
-runtime based on the address of the found phy.
-
-- "mr" variant
-FEC is connected directly to an ethernet switch (KSZ8895). The ethernet
-port is always up and auto-negotiation is not possible.
-
-- normal variant
-FEC is connected to a normal phy and auto-negotiation is possible.
-
-
-The variant name is part of the dtb file name loaded by u-boot. This
-make is possible to boot the linux kernel and make use variant specific
-devicetree (fixed-phy link).
-
-In order to support different display resoltuions/sizes the OT1200 devices
-are making use of EDID data stored in an i2c EEPROM.
diff --git a/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg 
b/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
deleted file mode 100644
index f4f605fc8d0f..
--- a/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
+++ /dev/null
@@ -1,154 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc.
- * Jason Liu 
- *
- * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with 

[PATCH 05/16] arm: Remove highbank board

2021-02-09 Thread Tom Rini
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Rob Herring 
Signed-off-by: Tom Rini 
---
 arch/arm/Kconfig|   7 --
 arch/arm/Makefile   |   1 -
 arch/arm/mach-highbank/Kconfig  |  12 --
 arch/arm/mach-highbank/Makefile |   6 -
 arch/arm/mach-highbank/timer.c  |  34 --
 board/highbank/MAINTAINERS  |   6 -
 board/highbank/Makefile |   6 -
 board/highbank/ahci.c   | 207 
 board/highbank/highbank.c   | 148 ---
 configs/highbank_defconfig  |  28 -
 include/configs/highbank.h  |  60 -
 11 files changed, 515 deletions(-)
 delete mode 100644 arch/arm/mach-highbank/Kconfig
 delete mode 100644 arch/arm/mach-highbank/Makefile
 delete mode 100644 arch/arm/mach-highbank/timer.c
 delete mode 100644 board/highbank/MAINTAINERS
 delete mode 100644 board/highbank/Makefile
 delete mode 100644 board/highbank/ahci.c
 delete mode 100644 board/highbank/highbank.c
 delete mode 100644 configs/highbank_defconfig
 delete mode 100644 include/configs/highbank.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 95557d6ed6bd..6fa69d39be5b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -750,11 +750,6 @@ config ARCH_S5PC1XX
select DM_SERIAL
imply CMD_DM
 
-config ARCH_HIGHBANK
-   bool "Calxeda Highbank"
-   select CPU_V7A
-   select PL011_SERIAL
-
 config ARCH_INTEGRATOR
bool "ARM Ltd. Integrator family"
select DM
@@ -1873,8 +1868,6 @@ source "arch/arm/mach-davinci/Kconfig"
 
 source "arch/arm/mach-exynos/Kconfig"
 
-source "arch/arm/mach-highbank/Kconfig"
-
 source "arch/arm/mach-integrator/Kconfig"
 
 source "arch/arm/mach-ipq40xx/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 28b523b37c70..e1d266c3a4d8 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -57,7 +57,6 @@ machine-$(CONFIG_ARCH_BCM283X)+= bcm283x
 machine-$(CONFIG_ARCH_BCMSTB)  += bcmstb
 machine-$(CONFIG_ARCH_DAVINCI) += davinci
 machine-$(CONFIG_ARCH_EXYNOS)  += exynos
-machine-$(CONFIG_ARCH_HIGHBANK)+= highbank
 machine-$(CONFIG_ARCH_IPQ40XX) += ipq40xx
 machine-$(CONFIG_ARCH_K3)  += k3
 machine-$(CONFIG_ARCH_KEYSTONE)+= keystone
diff --git a/arch/arm/mach-highbank/Kconfig b/arch/arm/mach-highbank/Kconfig
deleted file mode 100644
index 0e73c0414293..
--- a/arch/arm/mach-highbank/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if ARCH_HIGHBANK
-
-config SYS_BOARD
-   default "highbank"
-
-config SYS_SOC
-   default "highbank"
-
-config SYS_CONFIG_NAME
-   default "highbank"
-
-endif
diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile
deleted file mode 100644
index 029e266bedce..
--- a/arch/arm/mach-highbank/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-
-obj-y  := timer.o
diff --git a/arch/arm/mach-highbank/timer.c b/arch/arm/mach-highbank/timer.c
deleted file mode 100644
index 2423a0e37855..
--- a/arch/arm/mach-highbank/timer.c
+++ /dev/null
@@ -1,34 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2010-2011 Calxeda, Inc.
- *
- * Based on arm926ejs/mx27/timer.c
- */
-
-#include 
-#include 
-#include 
-#include 
-
-#undef SYSTIMER_BASE
-#define SYSTIMER_BASE  0xFFF34000  /* Timer 0 and 1 base   */
-
-static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE;
-
-/*
- * Start the timer
- */
-int timer_init(void)
-{
-   /*
-* Setup timer0
-*/
-   writel(0, _base->timer0control);
-   writel(SYSTIMER_RELOAD, _base->timer0load);
-   writel(SYSTIMER_RELOAD, _base->timer0value);
-   writel(SYSTIMER_EN | SYSTIMER_32BIT | SYSTIMER_PRESC_256,
-   _base->timer0control);
-
-   return 0;
-
-}
diff --git a/board/highbank/MAINTAINERS b/board/highbank/MAINTAINERS
deleted file mode 100644
index 69ddeddd6003..
--- a/board/highbank/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-HIGHBANK BOARD
-M: Rob Herring 
-S: Maintained
-F: board/highbank/
-F: include/configs/highbank.h
-F: configs/highbank_defconfig
diff --git a/board/highbank/Makefile b/board/highbank/Makefile
deleted file mode 100644
index 57f7f2e2a658..
--- a/board/highbank/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-
-obj-y  := highbank.o ahci.o
diff --git a/board/highbank/ahci.c b/board/highbank/ahci.c
deleted file mode 100644
index 9c057278ace1..
--- a/board/highbank/ahci.c
+++ 

[PATCH 04/16] ppc: configs: Remove a few non-updated build configurations

2021-02-09 Thread Tom Rini
In the cases of T2080RDB_SECURE_BOOT, T2080RDB_SRIO_PCIE_BOOT,
P2041RDB_SECURE_BOOT, P2041RDB_SRIO_PCIE_BOOT, P3041DS_SRIO_PCIE_BOOT
and P4080DS_SRIO_PCIE_BOOT while some forms of the board have been
migrated more fully to current build standards, these have not.  Remove
them.

Cc: Priyanka Jain 
Signed-off-by: Tom Rini 
---
 configs/P2041RDB_SECURE_BOOT_defconfig| 62 -
 configs/P2041RDB_SRIO_PCIE_BOOT_defconfig | 53 --
 configs/P3041DS_SRIO_PCIE_BOOT_defconfig  | 53 --
 configs/P4080DS_SRIO_PCIE_BOOT_defconfig  | 51 --
 configs/T2080RDB_SECURE_BOOT_defconfig| 66 ---
 configs/T2080RDB_SRIO_PCIE_BOOT_defconfig | 56 ---
 6 files changed, 341 deletions(-)
 delete mode 100644 configs/P2041RDB_SECURE_BOOT_defconfig
 delete mode 100644 configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
 delete mode 100644 configs/P3041DS_SRIO_PCIE_BOOT_defconfig
 delete mode 100644 configs/P4080DS_SRIO_PCIE_BOOT_defconfig
 delete mode 100644 configs/T2080RDB_SECURE_BOOT_defconfig
 delete mode 100644 configs/T2080RDB_SRIO_PCIE_BOOT_defconfig

diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig 
b/configs/P2041RDB_SECURE_BOOT_defconfig
deleted file mode 100644
index c42e583f6cc9..
--- a/configs/P2041RDB_SECURE_BOOT_defconfig
+++ /dev/null
@@ -1,62 +0,0 @@
-CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xEFF4
-CONFIG_ENV_SIZE=0x2000
-CONFIG_NXP_ESBC=y
-CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
-CONFIG_MPC85xx=y
-CONFIG_TARGET_P2041RDB=y
-CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_BOOTDELAY=10
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_BOARD_EARLY_INIT_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_GREPENV=y
-CONFIG_CMD_DM=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_MP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_DM=y
-CONFIG_FSL_ESDHC=y
-CONFIG_MTD=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=1000
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_10G=y
-CONFIG_PHY_TERANETICS=y
-CONFIG_PHY_VITESSE=y
-CONFIG_DM_ETH=y
-CONFIG_DM_MDIO=y
-CONFIG_PHY_GIGE=y
-CONFIG_FMAN_ENET=y
-CONFIG_MII=y
-CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
-CONFIG_SYS_NS16550=y
-CONFIG_SPI=y
-CONFIG_FSL_ESPI=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_ADDR_MAP=y
-CONFIG_SYS_NUM_ADDR_MAP=64
-CONFIG_RSA=y
-CONFIG_SPL_RSA=y
-CONFIG_RSA_SOFTWARE_EXP=y
diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig 
b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
deleted file mode 100644
index 822a91be2761..
--- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
+++ /dev/null
@@ -1,53 +0,0 @@
-CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xFFF4
-CONFIG_ENV_SIZE=0x2000
-CONFIG_MPC85xx=y
-CONFIG_TARGET_P2041RDB=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE"
-CONFIG_BOOTDELAY=10
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_BOARD_EARLY_INIT_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_GREPENV=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_MP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_REMOTE=y
-CONFIG_ENV_ADDR=0xFFE2
-CONFIG_FSL_CAAM=y
-CONFIG_FSL_ESDHC=y
-CONFIG_MTD=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=1000
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_10G=y
-CONFIG_PHY_TERANETICS=y
-CONFIG_PHY_VITESSE=y
-CONFIG_PHY_GIGE=y
-CONFIG_E1000=y
-CONFIG_FMAN_ENET=y
-CONFIG_MII=y
-CONFIG_SYS_QE_FMAN_FW_IN_REMOTE=y
-CONFIG_SYS_NS16550=y
-CONFIG_SPI=y
-CONFIG_FSL_ESPI=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_ADDR_MAP=y
-CONFIG_SYS_NUM_ADDR_MAP=64
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig 
b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
deleted file mode 100644
index 76ac6abce57c..
--- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
+++ /dev/null
@@ -1,53 +0,0 @@
-CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xFFF4
-CONFIG_ENV_SIZE=0x2000
-CONFIG_MPC85xx=y
-CONFIG_TARGET_P3041DS=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE"
-CONFIG_BOOTDELAY=10
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_BOARD_EARLY_INIT_R=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_GREPENV=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_MP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_REMOTE=y

[PATCH 03/16] ata: DWC_AHSATA depends on BLK

2021-02-09 Thread Tom Rini
The dwc ahsata driver is written such that CONFIG_BLK must be enabled,
add this as a dependency in Kconfig.

Signed-off-by: Tom Rini 
---
 drivers/ata/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index f2f8275aeca8..3914f996d91c 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -62,6 +62,7 @@ config DWC_AHCI
 config DWC_AHSATA
bool "Enable DWC AHSATA driver support"
select LIBATA
+   depends on BLK
help
  Enable this driver to support the DWC AHSATA SATA controller found
  in i.MX5 and i.MX6 SoCs.
-- 
2.17.1



[PATCH 02/16] am57xx_hs_evm_usb: Enable AHCI and BLK

2021-02-09 Thread Tom Rini
Enable the AHCI and BLK features to complete migration of various
drivers.

Cc: Andrew F. Davis 
Cc: Lokesh Vutla 
Signed-off-by: Tom Rini 
---
 configs/am57xx_hs_evm_usb_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/am57xx_hs_evm_usb_defconfig 
b/configs/am57xx_hs_evm_usb_defconfig
index d020bb0e4626..35f90274a2b1 100644
--- a/configs/am57xx_hs_evm_usb_defconfig
+++ b/configs/am57xx_hs_evm_usb_defconfig
@@ -20,6 +20,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_ARMV7_LPAE=y
 CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15"
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SPL_LOAD_FIT=y
@@ -69,7 +70,6 @@ CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SCSI_AHCI=y
-# CONFIG_BLK is not set
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
-- 
2.17.1



[PATCH 01/16] ls1012aqds_tfa_SECURE_BOOT: Remove unused CONFIG_SCSI_AHCI

2021-02-09 Thread Tom Rini
Signed-off-by: Tom Rini 
---
 configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
index 8f6ca820a24b..214a2bb9e735 100644
--- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
@@ -41,7 +41,6 @@ CONFIG_ENV_OVERWRITE=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
-CONFIG_SCSI_AHCI=y
 CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
-- 
2.17.1



Re: [PATCH v4 6/9] mtd: spi-nor-core: Add overlaid sector erase feature

2021-02-09 Thread Takahiro Kuwano
Hi Pratyush,

On 2/2/2021 3:56 AM, Pratyush Yadav wrote:
> Hi Takahiro,
> 
> On 28/01/21 01:36PM, tkuw584...@gmail.com wrote:
>> From: Takahiro Kuwano 
>>
>> Some of Spansion/Cypress chips have overlaid 4KB sectors at top and/or
>> bottom, depending on the device configuration, while U-Boot supports
>> uniform sector layout only. This patch adds an erase hook that emulates
>> uniform sector layout.
>>
>> Signed-off-by: Takahiro Kuwano 
>> ---
>>  drivers/mtd/spi/spi-nor-core.c | 48 ++
>>  1 file changed, 48 insertions(+)
>>
>> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
>> index 1c0ba5abf9..70da0081b6 100644
>> --- a/drivers/mtd/spi/spi-nor-core.c
>> +++ b/drivers/mtd/spi/spi-nor-core.c
>> @@ -788,6 +788,54 @@ erase_err:
>>  return ret;
>>  }
>>  
>> +#ifdef CONFIG_SPI_FLASH_SPANSION
>> +/*
>> + * Erase for Spansion/Cypress Flash devices that has overlaid 4KB sectors at
>> + * the top and/or bottom.
>> + */
>> +static int spansion_overlaid_erase(struct mtd_info *mtd,
>> +   struct erase_info *instr)
>> +{
>> +struct spi_nor *nor = mtd_to_spi_nor(mtd);
>> +struct erase_info instr_4k;
>> +u8 opcode;
>> +u32 erasesize;
>> +int ret;
>> +
>> +/* Perform default erase operation (non-overlaid portion is erased) */
>> +ret = spi_nor_erase(mtd, instr);
>> +if (ret)
>> +return ret;
>> +
>> +/* Backup default erase opcode and size */
>> +opcode = nor->erase_opcode;
>> +erasesize = mtd->erasesize;
>> +
>> +/*
>> + * Erase 4KB sectors. Use the possible max length of 4KB sector region.
>> + * The Flash just ignores the command if the address is not configured
>> + * as 4KB sector and reports ready status immediately.
>> + */
>> +instr_4k.len = SZ_128K;
>> +nor->erase_opcode = SPINOR_OP_BE_4K_4B;
>> +mtd->erasesize = SZ_4K;
>> +if (instr->addr == 0) {
>> +instr_4k.addr = 0;
>> +ret = spi_nor_erase(mtd, _4k);
>> +}
>> +if (!ret && instr->addr + instr->len == mtd->size) {
>> +instr_4k.addr = mtd->size - instr_4k.len;
>> +ret = spi_nor_erase(mtd, _4k);
>> +}
> 
> This feels like a hack to me. Does the flash datasheet explicitly say 
> that erasing the overlaid area with the "normal" erase opcode is a 
> no-op?
> 
Sorry, I have noticed the datasheet I mentioned in the cover letter is a
summary version. Here is the link to he full version, but you need
registration to access.
https://community.cypress.com/t5/Semper-Flash-Access-Program/Datasheet-Semper-Flash-with-Quad-SPI/ta-p/260789?attachment-id=19522

So, let me quote the description about erasing overlaid area:

"If a sector erase transaction is applied to a 256 KB sector that is
overlaid by 4 KB sectors, the overlaid 4 KB sectors are not affected
by the erase. Only the visible (non-overlaid) portion of the 128 KB
or 192 KB sector is erased."


And about 4 KB sector erase:

"This transaction is ignored when the device is configured for uniform
sector only (CFR3V[3] = 1). If the Erase 4K B sector transaction is issued
to a non-4 KB sector address, the device will abort the operation and will
not set the ERSERR status fail bit."


> I don't see a big reason to run this hack. You are already in a 
> flash-specific erase hook. Why not just directly issue the correct erase 
> commands to the sectors? That is, why not issue 4k erase to overlaid 
> sectors and normal erase to the rest? Why do you need to emulate uniform 
> erase?
> 
Thanks for pointing this out. I should probably hook nor->erase() instead
of mtd->_erase(), then issue 4k or normal erase depending on the address.
I will introduce that in v5. 

>> +
>> +/* Restore erase opcode and size */
>> +nor->erase_opcode = opcode;
>> +mtd->erasesize = erasesize;
>> +
>> +return ret;
>> +}
>> +#endif
>> +
>>  #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
>>  /* Write status register and ensure bits in mask match written values */
>>  static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask)
>> -- 
>> 2.25.1
>>
> 

Best Regards,
Takahiro


Re: [PATCH 01/26] Revert "pci: pci-uclass: Dynamically allocate the PCI regions"

2021-02-09 Thread Tom Rini
On Wed, Feb 10, 2021 at 08:46:51AM +0800, Bin Meng wrote:
> Hi Simon,
> 
> On Sun, Feb 7, 2021 at 11:34 PM Simon Glass  wrote:
> >
> > Hi Bin,
> >
> > On Sun, 7 Feb 2021 at 08:11, Bin Meng  wrote:
> > >
> > > This reverts commit e002474158d1054a7a2ff9a66149384c639ff242.
> > >
> > > Commit e002474158d1 ("pci: pci-uclass: Dynamically allocate the PCI 
> > > regions")
> > > changes 'struct pci_controller'.regions from pre-allocated array of
> > > regions to dynamically allocated, which unfortunately broken lots of
> > > boards that still use the non-DM PCI driver.
> > >
> > > We may update every non-DM PCI board codes to do the dynamical
> > > allocation of PCI regions but that's a lot of work (e.g.: almost
> > > all Freescale PowerPC boards are broken now and need to be fixed).
> > > Let's do the easy way.
> >
> > No one has noticed since July, apparently. I think it would be better
> > to disable PCI on these boards, until either someone migrates them or
> > they are removed. The PCI deadline was about 18 months ago.
> >
> 
> Yep, but I'd like to keep this revert instead of just fixing the
> qemu-ppce500 here, to give people a chance to test their original
> non-DM version of PCI driver before the DM conversion.
> 
> Once all boards have converted to DM PCI, we can revert this revert patch 
> again.

I'm not quite sure as a number of PowerPC boards did convert.  I will
see what's left, on top of the series I'm currently testing that deals
with LIBATA+AHCI (and in turn kills off some PowerPC stuff).

-- 
Tom


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Description: PGP signature


Re: [PATCH u-boot] fs: btrfs: do not fail when offset of a ROOT_ITEM is not -1

2021-02-09 Thread Qu Wenruo




On 2021/2/10 上午9:05, Marek Behun wrote:

On Wed, 10 Feb 2021 08:09:14 +0800
Qu Wenruo  wrote:


On 2021/2/10 上午1:33, Marek Behún wrote:

When the btrfs_read_fs_root() function is searching a ROOT_ITEM with
location key offset other than -1, it currently fails via BUG_ON.

The offset can have other value than -1, though. This can happen for
example if a subvolume is renamed:

$ btrfs subvolume create X && sync
Create subvolume './X'
$ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: X$
  location key (270 ROOT_ITEM 18446744073709551615) type DIR
  transid 283 data_len 0 name_len 1
  name: X
$ mv X Y && sync
$ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: Y$
  location key (270 ROOT_ITEM 0) type DIR
  transid 285 data_len 0 name_len 1
  name: Y

As can be seen the offset changed from -1ULL to 0.



Offset for subvolume ROOT_ITEM can be other values, especially for
snapshot that offset is the transid when it get created.

But the problem is, if we call btrfs_read_fs_root() for subvolume tree,
the offset of the key really doesn't matter, the only important thing is
the objectid.

Thus we use that BUG_ON() to catch careless callers.

Would you please provide a case where we wrongly call
btrfs_read_fs_root() with incorrect offset inside btrfs-progs/uboot?

I believe that would be the proper way to fix.


Qu,

this can be triggered in U-Boot when listing a directory containing a
subvolume that was renamed:
   - create a subvolume && sync
   - rename subvolume && sync
   - umount, reboot, list the directory containing the subvolume in
 u-boot
It will also break when you want to read a file that has a subvolume in
it's path (e.g. `read mmc 0 0x1000 /renamed-subvol/file`).

I found out this btrfs-progs commit:
   
https://github.com/kdave/btrfs-progs/commit/10f1af0fe7de5a0310657993c7c21a1d78087e56
This commit ensures that while searching a directory recursively, when
a ROOT_ITEM is encountered, the offset of its location is changed to -1
before passing the location to btrfs_read_fs_root().


That's what I expect the code to do, but you're right, if kernel is not 
doing it anymore, I prefer the kernel behavior.




So maybe we could do this in u-boot as well, but why do this? Linux'
btrfs driver does not check whether the offset is -1. So why do it here?


You're correct, the kernel is using new schema, btrfs_get_fs_root(), 
which only requires root objectid and completely get rid of the 
offset/type, which is far less possible to call with wrong parameters.


It would be a good timing to sync the code between kernel and 
progs/u-boot now.




BTW, Qu, I think we have to change the BUG_ON code in U-Boot's btrfs
driver. BUG_ON in U-Boot calls a complete SOC reset. We can't break
whole U-Boot simply because btrfs partition contains broken data.
U-Boot commands must fail in such a case, not reset the SOC.


Well, progs (and even kernel) is a mine-field for BUG_ON()s.

But at least for kernel, it's protected by tree-checker which rejects 
invalid on-disk data before it reaches btrfs code, thus mostly kernel 
BUG_ON()s are really hard to hit (a lot of them are even impossible to 
hit after the introduction of tree-checker), and indicate real problems.


For now, the BUG_ON()s in U-boot still indicates problems that we can't 
really solve or doesn't expect at all in btrfs realm, e.g. the BUG_ON() 
you're hitting (call sites problem).


I admit it's a pain in the ass for full SoC reset, but I don't have any 
better alternatives yet.


The mid to long term solution would be introducing tree-checker to 
U-boot, so that the remaining BUG_ON()s are really code bugs.


Thanks,
Qu



Marek





Re: [PATCH u-boot] fs: btrfs: do not fail when offset of a ROOT_ITEM is not -1

2021-02-09 Thread Marek Behun
On Wed, 10 Feb 2021 08:09:14 +0800
Qu Wenruo  wrote:

> On 2021/2/10 上午1:33, Marek Behún wrote:
> > When the btrfs_read_fs_root() function is searching a ROOT_ITEM with
> > location key offset other than -1, it currently fails via BUG_ON.
> >
> > The offset can have other value than -1, though. This can happen for
> > example if a subvolume is renamed:
> >
> >$ btrfs subvolume create X && sync
> >Create subvolume './X'
> >$ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: X$
> >  location key (270 ROOT_ITEM 18446744073709551615) type DIR
> >  transid 283 data_len 0 name_len 1
> >  name: X
> >$ mv X Y && sync
> >$ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: Y$
> >  location key (270 ROOT_ITEM 0) type DIR
> >  transid 285 data_len 0 name_len 1
> >  name: Y
> >
> > As can be seen the offset changed from -1ULL to 0.  
> 
> 
> Offset for subvolume ROOT_ITEM can be other values, especially for
> snapshot that offset is the transid when it get created.
> 
> But the problem is, if we call btrfs_read_fs_root() for subvolume tree,
> the offset of the key really doesn't matter, the only important thing is
> the objectid.
> 
> Thus we use that BUG_ON() to catch careless callers.
> 
> Would you please provide a case where we wrongly call
> btrfs_read_fs_root() with incorrect offset inside btrfs-progs/uboot?
> 
> I believe that would be the proper way to fix.

Qu,

this can be triggered in U-Boot when listing a directory containing a
subvolume that was renamed:
  - create a subvolume && sync
  - rename subvolume && sync
  - umount, reboot, list the directory containing the subvolume in
u-boot
It will also break when you want to read a file that has a subvolume in
it's path (e.g. `read mmc 0 0x1000 /renamed-subvol/file`).

I found out this btrfs-progs commit:
  
https://github.com/kdave/btrfs-progs/commit/10f1af0fe7de5a0310657993c7c21a1d78087e56
This commit ensures that while searching a directory recursively, when
a ROOT_ITEM is encountered, the offset of its location is changed to -1
before passing the location to btrfs_read_fs_root().

So maybe we could do this in u-boot as well, but why do this? Linux'
btrfs driver does not check whether the offset is -1. So why do it here?

BTW, Qu, I think we have to change the BUG_ON code in U-Boot's btrfs
driver. BUG_ON in U-Boot calls a complete SOC reset. We can't break
whole U-Boot simply because btrfs partition contains broken data.
U-Boot commands must fail in such a case, not reset the SOC.

Marek


Re: [PATCH 01/26] Revert "pci: pci-uclass: Dynamically allocate the PCI regions"

2021-02-09 Thread Bin Meng
Hi Simon,

On Sun, Feb 7, 2021 at 11:34 PM Simon Glass  wrote:
>
> Hi Bin,
>
> On Sun, 7 Feb 2021 at 08:11, Bin Meng  wrote:
> >
> > This reverts commit e002474158d1054a7a2ff9a66149384c639ff242.
> >
> > Commit e002474158d1 ("pci: pci-uclass: Dynamically allocate the PCI 
> > regions")
> > changes 'struct pci_controller'.regions from pre-allocated array of
> > regions to dynamically allocated, which unfortunately broken lots of
> > boards that still use the non-DM PCI driver.
> >
> > We may update every non-DM PCI board codes to do the dynamical
> > allocation of PCI regions but that's a lot of work (e.g.: almost
> > all Freescale PowerPC boards are broken now and need to be fixed).
> > Let's do the easy way.
>
> No one has noticed since July, apparently. I think it would be better
> to disable PCI on these boards, until either someone migrates them or
> they are removed. The PCI deadline was about 18 months ago.
>

Yep, but I'd like to keep this revert instead of just fixing the
qemu-ppce500 here, to give people a chance to test their original
non-DM version of PCI driver before the DM conversion.

Once all boards have converted to DM PCI, we can revert this revert patch again.

> Tom, do you know the situation here?
>
> >
> > Signed-off-by: Bin Meng 
> > ---
> >
> >  drivers/pci/pci-uclass.c | 14 ++
> >  include/pci.h|  4 +++-
> >  2 files changed, 9 insertions(+), 9 deletions(-)

Regards,
Bin


Re: [PATCH 1/1] efi_loader: fix get_last_capsule()

2021-02-09 Thread AKASHI Takahiro
On Tue, Feb 09, 2021 at 09:37:42PM +0100, Heinrich Schuchardt wrote:
> fix get_last_capsule() leads to writes beyond the stack allocated buffer.
> This was indicated when enabling the stack protector.
> 
> utf16_utf8_strcpy() only stops copying when reaching '\0'. The current
> invocation always writes beyond the end of value[].
> 
> The output length of utf16_utf8_strcpy() may be longer than the number of
> UTF-16 tokens. E.g has "CapsuleКиев" has 11 UTF-16 tokens but 15 UTF-8

First of all, "CapsuleLast" is a read-only variable from user's viewpoint,
and is maintained solely by efi code. Then its value is expected to always
be sane.
The case you suggested above is quite unlikely.

Although I don't think we need this patch,

> tokens. Hence, using utf16_utf8_strcpy() without checking the input may
> lead to further writes beyond value[].
> 
> The current invocation of strict_strtoul() reads beyond the end of value[].
> 
> A non-hexadecimal value after "Capsule" (e.g. "Capsule") must result in
> an error. We cat catch this by checking the return value of strict_strtoul().
> 
> A value that is too short after "Capsule" (e.g. "Capsule0") must result in
> an error. We must check the string length of value[].
> 
> Signed-off-by: Heinrich Schuchardt 
> ---
>  lib/efi_loader/efi_capsule.c | 18 +-
>  1 file changed, 13 insertions(+), 5 deletions(-)
> 
> diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
> index d39d731080..0017f0c0db 100644
> --- a/lib/efi_loader/efi_capsule.c
> +++ b/lib/efi_loader/efi_capsule.c
> @@ -42,20 +42,28 @@ static struct efi_file_handle *bootdev_root;
>  static __maybe_unused unsigned int get_last_capsule(void)
>  {
>   u16 value16[11]; /* "Capsule": non-null-terminated */
> - char value[11], *p;
> + char value[5];
>   efi_uintn_t size;
>   unsigned long index = 0x;
>   efi_status_t ret;
> + int i;
> 
>   size = sizeof(value16);
>   ret = efi_get_variable_int(L"CapsuleLast", _guid_capsule_report,
>  NULL, , value16, NULL);
> - if (ret != EFI_SUCCESS || u16_strncmp(value16, L"Capsule", 7))
> + if (ret != EFI_SUCCESS || size != 22 ||
> + u16_strncmp(value16, L"Capsule", 7))
>   goto err;
> + for (i = 0; i < 4; ++i) {
> + u16 c = value16[i + 7];
> 
> - p = value;
> - utf16_utf8_strcpy(, value16);
> - strict_strtoul([7], 16, );
> + if (!c)
> + goto err;

Is this check necessary assuming size == 22?


> + value[i] = c;

You are implicitly casting the value from u16 to u8 here.
This may lead to making an illegal code legal.

-Takahiro Akashi

> + }
> + value[4] = 0;
> + if (strict_strtoul(value, 16, ))
> + index = 0x;
>  err:
>   return index;
>  }
> --
> 2.30.0
> 


Re: [PATCH 00/26] ppc: qemu: Convert qemu-ppce500 to driver model

2021-02-09 Thread Bin Meng
On Sun, Feb 7, 2021 at 11:11 PM Bin Meng  wrote:
>
> At present when building qemu-ppce500 the following warnings are seen:
>
> = WARNING ==
> This board does not use CONFIG_DM. CONFIG_DM will be
> compulsory starting with the v2020.01 release.
> Failure to update may result in board removal.
>   UPD include/generated/timestamp_autogenerated.h
> See doc/driver-model/migration.rst for more info.
> 
> = WARNING ==
> This board does not use CONFIG_DM_PCI Please update
> the board to use CONFIG_DM_PCI before the v2019.07 release.
> Failure to update by the deadline may result in board removal.
> See doc/driver-model/migration.rst for more info.
> 
> = WARNING ==
> This board does not use CONFIG_DM_ETH (Driver Model
> for Ethernet drivers). Please update the board to use
> CONFIG_DM_ETH before the v2020.07 release. Failure to
> update by the deadline may result in board removal.
> See doc/driver-model/migration.rst for more info.
> 
>
> The conversion of qemu-ppce500 board to driver model is long overdue.
>
> When testing the exisitng qemu-ppce500 support, PCI was found broken.
> This is caused by 2 separate issues:
>
> - One issue was caused by U-Boot:
>   Commit e002474158d1 ("pci: pci-uclass: Dynamically allocate the PCI 
> regions")
>   Patch #1 reverts this commit as it broken all boards that have not converted
>   to driver model PCI.
> - One issue was caused by QEMU:
>   commit e6b4e5f4795b ("PPC: e500: Move CCSR and MMIO space to upper end of 
> address space")
>   commit cb3778a0455a ("PPC: e500 pci host: Add support for ATMUs")
>   Patch #3-4 fixed this issue to keep in sync with latest QEMU upstream
>
> Patch #5-8 are minor fixes and clean-ups.
>
> Starting from patch#9, these are driver model conversion patches.
>
> Patch #11-16 are mainly related to CONFIG_ADDR_MAP, a library to support 
> targets
> that have non-identity virtual-physical address mappings. A new command 
> 'addrmap'
> is introduced to aid debugging, and a fix to arch/powerpc/asm/include/io.h is
> made to correct the usage of CONFIG_ADDR_MAP as it can only be used in the 
> post-
> relocation phase. Also the initialization of this library is moved a bit 
> earlier
> in the post-relocation phase otherwise device drivers won't work.
>
> Patch #18-20 are 85xx PCI driver fixes. It adds support to controller register
> physical address beyond 32-bit, as well as support to 64-bit bus and cpu 
> address
> as current upstream QEMU uses 64-bit cpu address.
>
> Patch #23 is minor fix to the 'virtio' command dependency.
>
> Patch #24 enables the VirtIO NET support as by default a VirtIO standard PCI
> networking device is connected as an ethernet interface at PCI address 0.1.0.
>
> Patch #25 moves the qemu-ppce500 boards codes to board/emulation as that is 
> the
> place for other QEMU targets like x86, arm, riscv.
>
> Patch #26 adds a reST document to describe how to build and run U-Boot for the
> QEMU ppce500 machine.
>
> I hope we can make this series to U-Boot v2021.04 release.
>
> This series is available at u-boot-x86/qemu-ppc for testing.
>
> This cover letter is cc'ed to QEMU mailing list for a heads-up.
> A future patch will be sent to QEMU mailing list to bring its in-tree
> U-Boot source codes up-to-date.
>
>
> Bin Meng (26):
>   Revert "pci: pci-uclass: Dynamically allocate the PCI regions"
>   ppc: qemu: Update MAINTAINERS for correct email address
>   common: fdt_support: Support special case of PCI address in
> fdt_read_prop()
>   ppc: qemu: Support non-identity PCI bus address
>   ppc: qemu: Fix CONFIG_SYS_PCI_MAP_END
>   ppc: mpc85xx: Wrap LAW related codes with CONFIG_FSL_LAW
>   ppc: qemu: Drop init_laws() and print_laws()
>   ppc: qemu: Drop board_early_init_f()
>   ppc: qemu: Enable OF_CONTROL
>   ppc: qemu: Enable driver model
>   include: Remove extern from addr_map.h
>   lib: addr_map: Move address_map[] type to the header file
>   cmd: Add a command to display the address map
>   lib: kconfig: Mention CONFIG_ADDR_MAP limitation in the help
>   ppc: io.h: Use addrmap_ translation APIs only in post-relocation phase
>   common: Move initr_addr_map() to a bit earlier
>   ppc: qemu: Switch over to use DM serial
>   pci: mpc85xx: Wrap LAW programming with CONFIG_FSL_LAW
>   pci: mpc85xx: Support controller register physical address beyond
> 32-bit
>   pci: mpc85xx: Support 64-bit bus and cpu address
>   ppc: qemu: Switch over to use DM ETH and PCI
>   ppc: qemu: Drop CONFIG_OF_BOARD_SETUP
>   cmd: Fix virtio command dependency
>   ppc: qemu: Enable VirtIO NET support
>   ppc: qemu: Move board directory from board/freescale to
> board/emulation
>   doc: Add a reST document for qemu-ppce500
>
>  arch/powerpc/cpu/mpc85xx/Kconfig 

Re: [PATCH u-boot 1/2] fs: btrfs: skip xattrs in directory listing

2021-02-09 Thread Qu Wenruo




On 2021/2/10 上午2:05, Marek Behún wrote:

Skip xattrs in directory listing. U-Boot filesystem drivers do not list
xattrs.

Signed-off-by: Marek Behún 
Cc: David Sterba 
Cc: Qu Wenruo 
Cc: Tom Rini 


Reviewed-by: Qu Wenruo 

Thanks,
Qu

---
  fs/btrfs/btrfs.c | 5 -
  1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/fs/btrfs/btrfs.c b/fs/btrfs/btrfs.c
index 346b2c4341..6b4c5feb53 100644
--- a/fs/btrfs/btrfs.c
+++ b/fs/btrfs/btrfs.c
@@ -29,7 +29,6 @@ static int show_dir(struct btrfs_root *root, struct 
extent_buffer *eb,
[BTRFS_FT_FIFO] = "FIFO",
[BTRFS_FT_SOCK] = "SOCK",
[BTRFS_FT_SYMLINK]  = "SYMLINK",
-   [BTRFS_FT_XATTR]= "XATTR"
};
u8 type = btrfs_dir_type(eb, di);
char namebuf[BTRFS_NAME_LEN];
@@ -38,6 +37,10 @@ static int show_dir(struct btrfs_root *root, struct 
extent_buffer *eb,
time_t mtime;
int ret = 0;

+   /* skip XATTRs in directory listing */
+   if (type == BTRFS_FT_XATTR)
+   return 0;
+
btrfs_dir_item_key_to_cpu(eb, di, );

if (key.type == BTRFS_ROOT_ITEM_KEY) {



Re: [PATCH u-boot 2/2] fs: btrfs: change directory list output to be aligned as before

2021-02-09 Thread Qu Wenruo




On 2021/2/10 上午2:05, Marek Behún wrote:

Since commit 325dd1f642dd ("fs: btrfs: Use btrfs_iter_dir() to ...")
when btrfs is listing a directory, the output is not aligned:

15  Wed Sep 09 13:20:03 2020  boot.scr -> @/boot/boot.scr
 0  Tue Feb 02 12:42:09 2021  @
   108  Tue Feb 02 12:54:04 2021  1.info

Return back to how it was displayed previously, i.e.:

15  Wed Sep 09 13:20:03 2020  boot.scr -> @/boot/boot.scr
 0  Tue Feb 02 12:42:09 2021  @
   <   >108  Tue Feb 02 12:54:04 2021  1.info

Instead of '', print '<   >', as ext4 driver.

If an unknown directory item type is encountered, we will print the type
number left padded with spaces, enclosed by '?', instead of '<' and '>',
i.e.:

   ? 30?.  name

Signed-off-by: Marek Behún 
Fixes: 325dd1f642dd ("fs: btrfs: Use btrfs_iter_dir() to replace ...")
Cc: David Sterba 
Cc: Qu Wenruo 
Cc: Tom Rini 


Reviewed-by: Qu Wenruo 



---
  fs/btrfs/btrfs.c | 14 +++---
  1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/fs/btrfs/btrfs.c b/fs/btrfs/btrfs.c
index 6b4c5feb53..52a243a659 100644
--- a/fs/btrfs/btrfs.c
+++ b/fs/btrfs/btrfs.c
@@ -22,13 +22,13 @@ static int show_dir(struct btrfs_root *root, struct 
extent_buffer *eb,
struct btrfs_inode_item ii;
struct btrfs_key key;
static const char* dir_item_str[] = {
-   [BTRFS_FT_REG_FILE] = "FILE",
+   [BTRFS_FT_REG_FILE] = "   ",
[BTRFS_FT_DIR]  = "DIR",
-   [BTRFS_FT_CHRDEV]   = "CHRDEV",
-   [BTRFS_FT_BLKDEV]   = "BLKDEV",
-   [BTRFS_FT_FIFO] = "FIFO",
-   [BTRFS_FT_SOCK] = "SOCK",
-   [BTRFS_FT_SYMLINK]  = "SYMLINK",
+   [BTRFS_FT_CHRDEV]   = "CHR",
+   [BTRFS_FT_BLKDEV]   = "BLK",
+   [BTRFS_FT_FIFO] = "FIF",
+   [BTRFS_FT_SOCK] = "SCK",
+   [BTRFS_FT_SYMLINK]  = "SYM",


Since btrfs-progs also use similar output for its dump-tree, I guess
it's also possible to use the similar 3 chars output, except the FILE.

Thanks,
Qu

};
u8 type = btrfs_dir_type(eb, di);
char namebuf[BTRFS_NAME_LEN];
@@ -93,7 +93,7 @@ static int show_dir(struct btrfs_root *root, struct 
extent_buffer *eb,
if (type < ARRAY_SIZE(dir_item_str) && dir_item_str[type])
printf("<%s> ", dir_item_str[type]);
else
-   printf("DIR_ITEM.%u", type);
+   printf("?%3u? ", type);
if (type == BTRFS_FT_CHRDEV || type == BTRFS_FT_BLKDEV) {
ASSERT(key.type == BTRFS_INODE_ITEM_KEY);
printf("%4llu,%5llu  ", btrfs_stack_inode_rdev() >> 20,



Re: [PATCH u-boot] fs: btrfs: do not fail when offset of a ROOT_ITEM is not -1

2021-02-09 Thread Qu Wenruo




On 2021/2/10 上午1:33, Marek Behún wrote:

When the btrfs_read_fs_root() function is searching a ROOT_ITEM with
location key offset other than -1, it currently fails via BUG_ON.

The offset can have other value than -1, though. This can happen for
example if a subvolume is renamed:

   $ btrfs subvolume create X && sync
   Create subvolume './X'
   $ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: X$
 location key (270 ROOT_ITEM 18446744073709551615) type DIR
 transid 283 data_len 0 name_len 1
 name: X
   $ mv X Y && sync
   $ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: Y$
 location key (270 ROOT_ITEM 0) type DIR
 transid 285 data_len 0 name_len 1
 name: Y

As can be seen the offset changed from -1ULL to 0.



Offset for subvolume ROOT_ITEM can be other values, especially for
snapshot that offset is the transid when it get created.

But the problem is, if we call btrfs_read_fs_root() for subvolume tree,
the offset of the key really doesn't matter, the only important thing is
the objectid.

Thus we use that BUG_ON() to catch careless callers.

Would you please provide a case where we wrongly call
btrfs_read_fs_root() with incorrect offset inside btrfs-progs/uboot?

I believe that would be the proper way to fix.

Thanks,
Qu


Do not fail in this case.

Signed-off-by: Marek Behún 
Cc: David Sterba 
Cc: Qu Wenruo 
Cc: Tom Rini 
---
  fs/btrfs/disk-io.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index b332ecb796..c6fdec95c1 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -732,8 +732,7 @@ struct btrfs_root *btrfs_read_fs_root(struct btrfs_fs_info 
*fs_info,
return fs_info->chunk_root;
if (location->objectid == BTRFS_CSUM_TREE_OBJECTID)
return fs_info->csum_root;
-   BUG_ON(location->objectid == BTRFS_TREE_RELOC_OBJECTID ||
-  location->offset != (u64)-1);
+   BUG_ON(location->objectid == BTRFS_TREE_RELOC_OBJECTID);

node = rb_search(_info->fs_root_tree, (void *),
 btrfs_fs_roots_compare_objectids, NULL);



Re: [PATCH 3/5] lib: ecdsa: Implement signature verification for crypto_algo API

2021-02-09 Thread Alex G.



On 2/9/21 9:56 AM, Patrick DELAUNAY wrote:

Hi,


[snip]


diff --git a/lib/ecdsa/ecdsa-verify.c b/lib/ecdsa/ecdsa-verify.c
index d2e6a40f4a..d84f6eb093 100644
--- a/lib/ecdsa/ecdsa-verify.c
+++ b/lib/ecdsa/ecdsa-verify.c
@@ -1,13 +1,128 @@
  // SPDX-License-Identifier: GPL-2.0+
  /*
+ * ECDSA signature verification for u-boot
+ *
+ * This implements the firmware-side wrapper for ECDSA verification. 
It bridges

+ * the struct crypto_algo API to the ECDSA uclass implementations.
+ *
   * Copyright (c) 2020, Alexandru Gagniuc
   */


http://www.denx.de/wiki/U-Boot/CodingStyle #Include files

#include 

it is normally the first in alphabetic order of directory


Thank your for catching that. I will have it fixed in the next iteration 
of this series.



+#include 
  #include 
+#include 
+
+/*
+ * Derive size of an ECDSA key from the curve name
+ *
+ * While it's possible to extract the key size by using string 
manipulation,

+ * use a list of known curves for the time being.
+ */
+static int ecdsa_key_size(const char *curve_name)
+{
+    if (!strcmp(curve_name, "prime256v1"))
+    return 256;
+    else
+    return 0;
+}
+



To prepare the future can you parse a array of supported curves with 
associated ID


used as parameter of ECDSA parameter = enum ECDSA_CURVES

for example: char * name, int size, enum ECDSA_CURVES

const [] = {
{"prime256v1", 256, ECDSA_PRIME256V1 },

}


That is possible. If I were to have a longer list of curve names, I 
change things to extract the key length from the name itself. So instead 
of running strncmp() of N keyname strings, I would extract the digits 
from 'curve_name'.


I chose not to do that here because I want this patch to be didactic. 
That is, I'm trying to achieve the goal clearly, with the lowest number 
of lines of code.


[snip]


+static int ecdsa_verify_hash(struct udevice *dev,
+ const struct image_sign_info *info,
+ const void *hash, const void *sig, uint sig_len)
+{
+    const struct ecdsa_ops *ops = device_get_ops(dev);
+    const struct checksum_algo *algo = info->checksum;
+    struct ecdsa_public_key key;
+    int sig_node, key_node, ret;
+
+    if (!ops || !ops->verify)
+    return -ENODEV;
+
+    if (info->required_keynode > 0) {
+    ret = fdt_get_key(, info->fdt_blob, info->required_keynode);
+    if (ret < 0)
+    return ret;
+
+    return ops->verify(dev, , hash, algo->checksum_len,
+   sig, sig_len);



Need to indicate the used curve here as parameter of the verify opts ?


The curve name is part of the key (struct ecdsa_public_key).


[snip]

+    ret = ops->verify(dev, , hash, algo->checksum_len,
+  sig, sig_len);
+
+    /* On success, don't worry about remaining keys */
+    if (ret == 0)



issue raised by chekpatch I think

if (!ret)


Oh! I'll get this fixed. Thanks!

Alex


[PATCH u-boot-marvell 3/4] arm: mvebu: turris_omnia: Enable CMD_WDT

2021-02-09 Thread Marek Behún
This command can be sometimes used for debugging.

Signed-off-by: Marek Behún 
Cc: Pali Rohár 
Cc: Stefan Roese 
---
 configs/turris_omnia_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 810eacefc2..295f05f3b3 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -46,6 +46,7 @@ CONFIG_CMD_SATA=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_WDT=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_AES=y
-- 
2.26.2



[PATCH u-boot-marvell 4/4] arm: mvebu: turris_omnia: Enable CMD_FS_UUID

2021-02-09 Thread Marek Behún
This command can be useful for U-Boot scripts.

Signed-off-by: Marek Behún 
Cc: Pali Rohár 
Cc: Stefan Roese 
---
 configs/turris_omnia_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 295f05f3b3..a8218da1a0 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -52,6 +52,7 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_AES=y
 CONFIG_CMD_HASH=y
 CONFIG_CMD_BTRFS=y
+CONFIG_CMD_FS_UUID=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_ENV_OVERWRITE=y
 CONFIG_USE_ENV_SPI_MAX_HZ=y
-- 
2.26.2



[PATCH u-boot-marvell 1/4] rtc: add armada38x driver

2021-02-09 Thread Marek Behún
Add RTC driver for Armada 38x, based on Linux' driver.
For now implement only `marvell,armada-380-rtc` compatible.

Signed-off-by: Marek Behún 
Cc: Pali Rohár 
Cc: Stefan Roese 
Cc: Baruch Siach 
Cc: Chris Packham 
Cc: Simon Glass 
---
 drivers/rtc/Kconfig |   7 ++
 drivers/rtc/Makefile|   1 +
 drivers/rtc/armada38x.c | 185 
 3 files changed, 193 insertions(+)
 create mode 100644 drivers/rtc/armada38x.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index aa6d90158c..dafba35279 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -38,6 +38,13 @@ config RTC_ENABLE_32KHZ_OUTPUT
   Some real-time clocks support the output of 32kHz square waves (such 
as ds3231),
   the config symbol choose Real Time Clock device 32Khz output feature.
 
+config RTC_ARMADA38X
+   bool "Enable Armada 38x Marvell SoC RTC"
+   depends on DM_RTC && ARCH_MVEBU
+   help
+ This adds support for the in-chip RTC that can be found in the
+ Armada 38x Marvell's SoC devices.
+
 config RTC_PCF2127
bool "Enable PCF2127 driver"
depends on DM_RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 6a45a9c874..15609e7b18 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_$(SPL_TPL_)DM_RTC) += rtc-uclass.o
 
 obj-$(CONFIG_RTC_AT91SAM9_RTT) += at91sam9_rtt.o
 obj-y += rtc-lib.o
+obj-$(CONFIG_RTC_ARMADA38X) += armada38x.o
 obj-$(CONFIG_RTC_DAVINCI) += davinci.o
 obj-$(CONFIG_RTC_DS1302) += ds1302.o
 obj-$(CONFIG_RTC_DS1306) += ds1306.o
diff --git a/drivers/rtc/armada38x.c b/drivers/rtc/armada38x.c
new file mode 100644
index 00..88dc9977c6
--- /dev/null
+++ b/drivers/rtc/armada38x.c
@@ -0,0 +1,185 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RTC driver for the Armada 38x Marvell SoCs
+ *
+ * Copyright (C) 2021 Marek Behun 
+ *
+ * Based on Linux' driver by Gregory Clement and Marvell
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define RTC_STATUS 0x0
+#define RTC_TIME   0xC
+#define RTC_CONF_TEST  0x1C
+
+/* Armada38x SoC registers  */
+#define RTC_38X_BRIDGE_TIMING_CTL  0x0
+#define RTC_38X_PERIOD_OFFS0
+#define RTC_38X_PERIOD_MASK(0x3FF << RTC_38X_PERIOD_OFFS)
+#define RTC_38X_READ_DELAY_OFFS26
+#define RTC_38X_READ_DELAY_MASK(0x1F << 
RTC_38X_READ_DELAY_OFFS)
+
+#define SAMPLE_NR  100
+
+struct armada38x_rtc {
+   void __iomem *regs;
+   void __iomem *regs_soc;
+};
+
+/*
+ * According to Erratum RES-3124064 we have to do some configuration in MBUS.
+ * To read an RTC register we need to read it 100 times and return the most
+ * frequent value.
+ * To write an RTC register we need to write 2x zero into STATUS register,
+ * followed by the proper write. Linux adds an 5 us delay after this, so we do
+ * it here as well.
+ */
+static void update_38x_mbus_timing_params(struct armada38x_rtc *rtc)
+{
+   u32 reg;
+
+   reg = readl(rtc->regs_soc + RTC_38X_BRIDGE_TIMING_CTL);
+   reg &= ~RTC_38X_PERIOD_MASK;
+   reg |= 0x3FF << RTC_38X_PERIOD_OFFS; /* Maximum value */
+   reg &= ~RTC_38X_READ_DELAY_MASK;
+   reg |= 0x1F << RTC_38X_READ_DELAY_OFFS; /* Maximum value */
+   writel(reg, rtc->regs_soc + RTC_38X_BRIDGE_TIMING_CTL);
+}
+
+static void armada38x_rtc_write(u32 val, struct armada38x_rtc *rtc, u8 reg)
+{
+   writel(0, rtc->regs + RTC_STATUS);
+   writel(0, rtc->regs + RTC_STATUS);
+   writel(val, rtc->regs + reg);
+   udelay(5);
+}
+
+static u32 armada38x_rtc_read(struct armada38x_rtc *rtc, u8 reg)
+{
+   u8 counts[SAMPLE_NR], max_idx;
+   u32 samples[SAMPLE_NR], max;
+   int i, j, last;
+
+   for (i = 0, last = 0; i < SAMPLE_NR; ++i) {
+   u32 sample = readl(rtc->regs + reg);
+
+   /* find if this value was already read */
+   for (j = 0; j < last; ++j) {
+   if (samples[j] == sample)
+   break;
+   }
+
+   if (j < last) {
+   /* if yes, increment count */
+   ++counts[j];
+   } else {
+   /* if not, add */
+   samples[last] = sample;
+   counts[last] = 1;
+   ++last;
+   }
+   }
+
+   /* finally find the sample that was read the most */
+   max = 0;
+   max_idx = 0;
+
+   for (i = 0; i < last; ++i) {
+   if (counts[i] > max) {
+   max = counts[i];
+   max_idx = i;
+   }
+   }
+
+   return samples[max_idx];
+}
+
+static int armada38x_rtc_get(struct udevice *dev, struct rtc_time *tm)
+{
+   struct armada38x_rtc *rtc = dev_get_priv(dev);
+   u32 time;
+
+   time = armada38x_rtc_read(rtc, 

[PATCH u-boot-marvell 2/4] arm: mvebu: turris_omnia: Enable DM_RTC and RTC_ARMADA38X

2021-02-09 Thread Marek Behún
With this the date command is available on Turris Omnia.

Signed-off-by: Marek Behún 
Cc: Pali Rohár 
Cc: Stefan Roese 
---
 configs/turris_omnia_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 4b8843d7be..810eacefc2 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -73,6 +73,8 @@ CONFIG_MII=y
 CONFIG_PCI=y
 CONFIG_PCI_MVEBU=y
 CONFIG_SCSI=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_ARMADA38X=y
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_KIRKWOOD_SPI=y
-- 
2.26.2



Re: [PATCH 2/5] lib: ecdsa: Add skeleton to implement ecdsa verification in u-boot

2021-02-09 Thread Alex G.

Hi Patrick,

On 2/9/21 9:11 AM, Patrick DELAUNAY wrote:

Hi,

On 1/11/21 4:41 PM, Alexandru Gagniuc wrote:

Prepare the source tree for accepting implementations of the ECDSA
algorithm. This patch deals with the boring aspects of Makefiles and
Kconfig files.

Signed-off-by: Alexandru Gagniuc
---
  include/image.h  | 10 +-
  include/u-boot/rsa.h |  2 +-
  lib/Kconfig  |  1 +
  lib/Makefile |  1 +
  lib/ecdsa/Kconfig    | 23 +++
  lib/ecdsa/Makefile   |  1 +
  lib/ecdsa/ecdsa-verify.c | 13 +
  7 files changed, 45 insertions(+), 6 deletions(-)
  create mode 100644 lib/ecdsa/Kconfig
  create mode 100644 lib/ecdsa/Makefile
  create mode 100644 lib/ecdsa/ecdsa-verify.c

diff --git a/include/image.h b/include/image.h
index 6628173dca..1d70ba0ece 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1198,20 +1198,20 @@ int calculate_hash(const void *data, int 
data_len, const char *algo,

  #if defined(USE_HOSTCC)
  # if defined(CONFIG_FIT_SIGNATURE)
  #  define IMAGE_ENABLE_SIGN    1
-#  define IMAGE_ENABLE_VERIFY    1
+#  define IMAGE_ENABLE_VERIFY_RSA    1
  #  define IMAGE_ENABLE_VERIFY_ECDSA    1
  #  define FIT_IMAGE_ENABLE_VERIFY    1
  #  include 
  # else
  #  define IMAGE_ENABLE_SIGN    0
-#  define IMAGE_ENABLE_VERIFY    0
+#  define IMAGE_ENABLE_VERIFY_RSA    0
  # define IMAGE_ENABLE_VERIFY_ECDSA    0
  #  define FIT_IMAGE_ENABLE_VERIFY    0
  # endif
  #else
  # define IMAGE_ENABLE_SIGN    0
-# define IMAGE_ENABLE_VERIFY    CONFIG_IS_ENABLED(RSA_VERIFY)
-# define IMAGE_ENABLE_VERIFY_ECDSA    0
+# define IMAGE_ENABLE_VERIFY_RSA    CONFIG_IS_ENABLED(RSA_VERIFY)
+# define IMAGE_ENABLE_VERIFY_ECDSA    CONFIG_IS_ENABLED(ECDSA_VERIFY)


here you are using CONFIG_IS_ENABLED.

This macro imply to test CONFIG_ECDSA_VERIFY or CONFIG_SPL_ECDSA_VERIFY 
(for SPL build)


=> but CONFIG_SPL_ECDSA_VERIFY is missing, I think you need to add it, 
as RSA


This patch adds both "config ECDSA_VERIFY" and "config SPL_ECDSA_VERIFY"
see @lib/ecdsa/Kconfig. I believe this achieves what you need.

[snip]

diff --git a/lib/Makefile b/lib/Makefile
index cf64188ba5..ab86be2678 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -59,6 +59,7 @@ endif
  obj-$(CONFIG_$(SPL_)ACPIGEN) += acpi/
  obj-$(CONFIG_$(SPL_)MD5) += md5.o
+obj-$(CONFIG_ECDSA) += ecdsa/


obj-$(CONFIG_$(SPL_)ECDSA) += ecdsa/


The intent here is to use CONFIG_ECDSA to denote ECDSA support. 
CONFIG_ECDSA_VERIFY and CONFIG_SPL_ECDSA_VERIFY are used to enable the 
code in u-boot and SPL respectively. Only verification is supported on 
the target, so these are the only switches that enable or disable code.





  obj-$(CONFIG_$(SPL_)RSA) += rsa/
  obj-$(CONFIG_FIT_SIGNATURE) += hash-checksum.o
  obj-$(CONFIG_SHA1) += sha1.o
diff --git a/lib/ecdsa/Kconfig b/lib/ecdsa/Kconfig
new file mode 100644
index 00..1244d6b6ea
--- /dev/null
+++ b/lib/ecdsa/Kconfig
@@ -0,0 +1,23 @@
+config ECDSA
+    bool "Enable ECDSA support"
+    depends on DM
+    help
+  This enables the ECDSA algorithm for FIT image verification in 
U-Boot.

+  See doc/uImage.FIT/signature.txt for more details.
+  The ECDSA algorithm is implemented using the driver model. So
+  CONFIG_DM is required by this library.
+  ECDSA is enabled for mkimage regardless of this  option.
+
+if ECDSA
+


Add CONFIG_SPL_ECDSA to select independently support in SPL et/or in U-Boot
as it is done for RSA

+ config SPL_ECDSA
+    bool "Use ECDSA library within in SPL"

I though about an SPL_ECDSA kconfig. As mentioned above, we have 
independent switches to enable the code for u-boot/SPL. We can enable 
ECDSA support in u-boot, SPL, neither or both. What would this switch add?





+config ECDSA_VERIFY
+    bool "Enable ECDSA verification support in U-Boot."



+ select SPL_ECDSA



+    help
+  Allow ECDSA signatures to be recognized and verified in U-Boot.
+
+config SPL_ECDSA_VERIFY
+    bool "Enable ECDSA verification support in SPL"
+    help
+  Allow ECDSA signatures to be recognized and verified in SPL.


This is the switch for SPL (@mentioned earlier).


Alex


Re: [PATCH] timer: imx-gpt: Add timer support for i.MX SoCs family

2021-02-09 Thread Giulio Benetti

Hi Jesse,

On 2/9/21 9:42 PM, Jesse Taube wrote:

From: Mr-Bossman 

This timer driver is using GPT Timer (General Purpose Timer) available
on almost all i.MX SoCs family.


Please provide more explanation about costraints it has. It works only
with a source clock at 24Mhz. So something like:
'''
This timer driver is using GPT Timer (General Purpose Timer) available
on almost all i.MX SoCs family. Since this driver is only meant to
provide u-boot timer counter and most of i.MX* SoCs use 24Mhz crystal
source so let's deal only that specific source.
'''



Signed-off-by: Giulio Benetti 
Signed-off-by: Jesse Taube 
---
  drivers/timer/Kconfig |   7 ++
  drivers/timer/Makefile|   1 +
  drivers/timer/imx-gpt-timer.c | 134 ++
  3 files changed, 142 insertions(+)
  create mode 100644 drivers/timer/imx-gpt-timer.c

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 80743a2551..ee81dfa776 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -227,4 +227,11 @@ config MCHP_PIT64B_TIMER
  Select this to enable support for Microchip 64-bit periodic
  interval timer.
  
+config IMX_GPT_TIMER

+   bool "NXP i.MX GPT timer support"
+   depends on TIMER
+   help
+ Select this to enable support for the timer found on
+ NXP i.MX devices.
+
  endmenu
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index eb5c48cc6c..e214ba7268 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -25,3 +25,4 @@ obj-$(CONFIG_STM32_TIMER) += stm32_timer.o
  obj-$(CONFIG_X86_TSC_TIMER)   += tsc_timer.o
  obj-$(CONFIG_MTK_TIMER)   += mtk_timer.o
  obj-$(CONFIG_MCHP_PIT64B_TIMER)   += mchp-pit64b-timer.o
+obj-$(CONFIG_IMX_GPT_TIMER)+= imx-gpt-timer.o
diff --git a/drivers/timer/imx-gpt-timer.c b/drivers/timer/imx-gpt-timer.c
new file mode 100644
index 00..8b6a6200c5
--- /dev/null
+++ b/drivers/timer/imx-gpt-timer.c
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020
+ * Author(s): Giulio Benetti 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+


Please remove newline ^^^


+#include 
+
+#define GPT_CR_SWR 0x8000
+#define GPT_CR_CLKSRC  0x01C0
+#define GPT_CR_EN_24M  0x4000
+#define GPT_CR_EN  0x0001


Please keep the same tabs above as below


+#define GPT_PR_PRESCALER   0x0FFF
+#define GPT_PR_PRESCALER24M0xF000
+
+#define NO_CLOCK   (0)
+#define IPG_CLK(1 << 6)


ditto


+#define IPG_CLK_HF (2 << 6)
+#define IPG_EXT(3 << 6)


ditto


+#define IPG_CLK_32K(4 << 6)
+#define IPG_CLK_24M(5 << 6)
+
+struct imx_gpt_timer_regs {
+   u32 cr;
+   u32 pr;
+   u32 sr;
+   u32 ir;
+   u32 ocr1;
+   u32 ocr2;
+   u32 ocr3;
+   u32 icr1;
+   u32 icr2;
+   u32 cnt;
+};
+
+struct imx_gpt_timer_priv {
+   struct imx_gpt_timer_regs *base;
+};
+
+static u64 imx_gpt_timer_get_count(struct udevice *dev)
+{
+   struct imx_gpt_timer_priv *priv = dev_get_priv(dev);
+   struct imx_gpt_timer_regs *regs = priv->base;
+
+   return readl(>cnt);
+}
+
+static int imx_gpt_timer_probe(struct udevice *dev)
+{
+   struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+   struct imx_gpt_timer_priv *priv = dev_get_priv(dev);
+   struct imx_gpt_timer_regs *regs;
+   struct clk clk;
+   fdt_addr_t addr;
+   u32 prescaler;
+   u32 rate;
+   int ret;
+
+   addr = dev_read_addr(dev);
+   if (addr == FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   priv->base = (struct imx_gpt_timer_regs *)addr;
+
+   ret = clk_get_by_index(dev, 0, );
+   if (ret < 0)
+   return ret;
+
+   ret = clk_enable();
+   if (ret) {
+   dev_err(dev, "Failed to enable clock\n");
+   return ret;
+   }
+
+   regs = priv->base;
+
+   /* Reset the timer */
+   setbits_le32(>cr, GPT_CR_SWR);
+
+   /* Wait for timer to finish reset */
+   while (readl(>cr) & GPT_CR_SWR)
+   ;
+
+   /* Get timer clock rate */


This is a useless comment, don't describe talking functions


+   rate = clk_get_rate();
+
+   /* Is  timer clock rate valid, If not go to 24MHz clock*/


ditto and 24Mhz is dealt after

--
Giulio Benetti
Benetti Engineering sas


+   if ((int)rate <= 0) {
+   dev_err(dev, "Could not get clock rate...\n");
+   return -EINVAL;
+   }
+   /* Only support 24MHz clock */
+   if (rate != 2400UL) {
+   dev_err(dev, "Clock rate other than 24MHz not supported...\n");
+   return -EINVAL;
+   }
+   /* we set timer prescaler to obtain a 1MHz timer counter frequency */


Capital /* We ... 

Re: [PATCH u-boot-marvell 00/18] Upgrade A38x DDR3 training to version 14.0.0

2021-02-09 Thread Chris Packham
On 9/02/21 7:34 am, Marek Behún wrote:
> This syncs drivers/ddr/marvell/a38x/ with the mv-ddr-devel branch
> of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
>
> There are some commits regarding DDR3 on top of version 14.0.0 in the
> mv-ddr-marvell repository (from Chris Packham), but these changes
> already are in U-Boot.

For this series, on the db-88f6820-amc and x530

Tested-by: Chris Packham 

(I normally post to the mailing list from judge.pack...@gmail.com so I'm 
not sure if you want to use that in the Tested-by instead. I try to do 
work stuff under alliedtelesis and free-time stuff under gmail but this 
in particular blurs the line).

> Marek
>
> Marek Behún (18):
>ddr: marvell: a38x: fix write leveling suplementary algo
>ddr: marvell: a38x: import header change from upstream
>ddr: marvell: a38x: add ddr32 support
>ddr: marvell: a38x: add ddr 32bit ECC support
>ddr: marvell: a38x: import header change from upstream
>ddr: marvell: a38x: fix 32bit
>ddr: marvell: a38x: fix memory size calculation using 32bit bus width
>ddr: marvell: a38x: import header change from upstream
>ddr: marvell: a38x: allow board specific ODT configuration
>ddr: marvell: a38x: add 16Gbit memory devices support
>ddr: marvell: a38x: add support for twin-die combined memory device
>ddr: marvell: a38x: disable WL phase correction stage in case of
>  bus_width=16bit
>ddr: marvell: a38x: import header change from upstream
>ddr: marvell: a38x: fix memory cs size function
>ddr: marvell: a38x: import code change from upstream
>ddr: marvell: a38x: enum mv_ddr_twin_die: change order
>ddr: marvell: a38x: bump version to 14.0.0
>ddr: marvell: a38x: fix comment in conditional macro
>
>   board/CZ.NIC/turris_omnia/turris_omnia.c  |  2 ++
>   board/Marvell/db-88f6820-amc/db-88f6820-amc.c |  1 +
>   board/Marvell/db-88f6820-gp/db-88f6820-gp.c   |  1 +
>   board/alliedtelesis/x530/x530.c   |  1 +
>   board/gdsys/a38x/controlcenterdc.c|  1 +
>   board/kobol/helios4/helios4.c |  1 +
>   board/solidrun/clearfog/clearfog.c|  1 +
>   drivers/ddr/marvell/a38x/ddr3_init.c  |  5 
>   drivers/ddr/marvell/a38x/ddr3_training.c  |  5 +++-
>   drivers/ddr/marvell/a38x/ddr3_training_db.c   |  3 +++
>   .../ddr/marvell/a38x/ddr3_training_ip_def.h   |  2 ++
>   .../marvell/a38x/ddr3_training_ip_engine.c|  5 +++-
>   drivers/ddr/marvell/a38x/ddr_topology_def.h   | 23 ++-
>   .../ddr/marvell/a38x/mv_ddr_build_message.c   |  2 +-
>   drivers/ddr/marvell/a38x/mv_ddr_plat.c|  9 ++--
>   drivers/ddr/marvell/a38x/mv_ddr_topology.c| 14 ---
>   drivers/ddr/marvell/a38x/mv_ddr_topology.h|  2 ++
>   drivers/ddr/marvell/a38x/xor.c|  6 ++---
>   18 files changed, 72 insertions(+), 12 deletions(-)
>

Re: [PATCH u-boot-marvell 00/18] Upgrade A38x DDR3 training to version 14.0.0

2021-02-09 Thread Chris Packham

On 10/02/21 2:15 am, Marek Behun wrote:
> On Tue, 9 Feb 2021 06:50:35 +
> Chris Packham  wrote:
>
>> On 9/02/21 3:07 pm, Marek Behun wrote:
>>> On Tue, 9 Feb 2021 01:08:54 +
>>> Chris Packham  wrote:
>>>   
 On 9/02/21 1:16 pm, Chris Packham wrote:
> On 9/02/21 9:18 am, Marek Behun wrote:
>> On Mon, 8 Feb 2021 20:11:06 +
>> Chris Packham  wrote:
>>  
>>> Hi Marek,
>>>
>>> Do you have this in a repo I can pull from? I've got a couple of boards
>>> I can give this a spin on.
>> https://gitlab.nic.cz/turris/turris-omnia-uboot/
>> branch v2021.04-rc-mv-ddr-14.0.0
>>
>> also please test branch v2021.04-rc-mv-ddr-14.0.0-samsung-ddr-fix, that
>> one contains one more commit that is needed for Omnia with Samsung DDR
>> chips.
> I've tested the dm-88f6820-amc board. Training completed without
> issue, as does memtester running from Linux.
>
> Hit a bit of a snag on the x530 because the changes pushed it over the
> SPL size (it was already pretty close). I'll look to see if there's
> anything I can drop out or maybe bump the SPL size (I never did get a
> clear answer from Marvell as to what the size limit actually is).
 I can temporarily work around the size issue by disabling watchdog
 support in SPL (I really don't want that to be the long term solution).

 But then I encounter an odd problem. When I "reset" the board gets
 through the DDR training but never makes it to u-boot proper, but if I
 power cycle it boots through to the u-boot prompt. This doesn't happen
 on the db-88f6820-amc board. One difference between the x530 and the amc
 board is that the x530 has ECC so maybe something is going into the
 weeds if ECC has already been enabled by a previous boot.
   
>>> Could you bisect which commit causes this?
>> Seems to be the last one (ddr: marvell: a38x: fix SPLIT_OUT_MIX state
>> decision) not entirely sure what the problem is. So I guess you can
>> consider the upstream update good, the fix SPLIT_OUT_MIX not so much it
>> happens to be the thing that causes the issue and the straw that tips
>> the build size over the limit.
> That's bad, because that is the one commit that is needed for Omnias
> with Samsung chips. Could you try to apply this last commit without the
> previous 18 ones? It should apply.
>
> If it does not work, could you please send me your board ddr topology
> definition? I will try to update the patch.

With just the one patch I see the hang (and the size blow out). The 
board topology is all upstream (board/alliedtelesis/x530/x530.c).


[PATCH] timer: imx-gpt: Add timer support for i.MX SoCs family

2021-02-09 Thread Jesse Taube
From: Mr-Bossman 

This timer driver is using GPT Timer (General Purpose Timer) available
on almost all i.MX SoCs family.

Signed-off-by: Giulio Benetti 
Signed-off-by: Jesse Taube 
---
 drivers/timer/Kconfig |   7 ++
 drivers/timer/Makefile|   1 +
 drivers/timer/imx-gpt-timer.c | 134 ++
 3 files changed, 142 insertions(+)
 create mode 100644 drivers/timer/imx-gpt-timer.c

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 80743a2551..ee81dfa776 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -227,4 +227,11 @@ config MCHP_PIT64B_TIMER
  Select this to enable support for Microchip 64-bit periodic
  interval timer.
 
+config IMX_GPT_TIMER
+   bool "NXP i.MX GPT timer support"
+   depends on TIMER
+   help
+ Select this to enable support for the timer found on
+ NXP i.MX devices.
+
 endmenu
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index eb5c48cc6c..e214ba7268 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -25,3 +25,4 @@ obj-$(CONFIG_STM32_TIMER) += stm32_timer.o
 obj-$(CONFIG_X86_TSC_TIMER)+= tsc_timer.o
 obj-$(CONFIG_MTK_TIMER)+= mtk_timer.o
 obj-$(CONFIG_MCHP_PIT64B_TIMER)+= mchp-pit64b-timer.o
+obj-$(CONFIG_IMX_GPT_TIMER)+= imx-gpt-timer.o
diff --git a/drivers/timer/imx-gpt-timer.c b/drivers/timer/imx-gpt-timer.c
new file mode 100644
index 00..8b6a6200c5
--- /dev/null
+++ b/drivers/timer/imx-gpt-timer.c
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020
+ * Author(s): Giulio Benetti 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#define GPT_CR_SWR 0x8000
+#define GPT_CR_CLKSRC  0x01C0
+#define GPT_CR_EN_24M  0x4000
+#define GPT_CR_EN  0x0001
+#define GPT_PR_PRESCALER   0x0FFF
+#define GPT_PR_PRESCALER24M0xF000
+
+#define NO_CLOCK   (0)
+#define IPG_CLK(1 << 6)
+#define IPG_CLK_HF (2 << 6)
+#define IPG_EXT(3 << 6)
+#define IPG_CLK_32K(4 << 6)
+#define IPG_CLK_24M(5 << 6)
+
+struct imx_gpt_timer_regs {
+   u32 cr;
+   u32 pr;
+   u32 sr;
+   u32 ir;
+   u32 ocr1;
+   u32 ocr2;
+   u32 ocr3;
+   u32 icr1;
+   u32 icr2;
+   u32 cnt;
+};
+
+struct imx_gpt_timer_priv {
+   struct imx_gpt_timer_regs *base;
+};
+
+static u64 imx_gpt_timer_get_count(struct udevice *dev)
+{
+   struct imx_gpt_timer_priv *priv = dev_get_priv(dev);
+   struct imx_gpt_timer_regs *regs = priv->base;
+
+   return readl(>cnt);
+}
+
+static int imx_gpt_timer_probe(struct udevice *dev)
+{
+   struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+   struct imx_gpt_timer_priv *priv = dev_get_priv(dev);
+   struct imx_gpt_timer_regs *regs;
+   struct clk clk;
+   fdt_addr_t addr;
+   u32 prescaler;
+   u32 rate;
+   int ret;
+
+   addr = dev_read_addr(dev);
+   if (addr == FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   priv->base = (struct imx_gpt_timer_regs *)addr;
+
+   ret = clk_get_by_index(dev, 0, );
+   if (ret < 0)
+   return ret;
+
+   ret = clk_enable();
+   if (ret) {
+   dev_err(dev, "Failed to enable clock\n");
+   return ret;
+   }
+
+   regs = priv->base;
+
+   /* Reset the timer */
+   setbits_le32(>cr, GPT_CR_SWR);
+
+   /* Wait for timer to finish reset */
+   while (readl(>cr) & GPT_CR_SWR)
+   ;
+
+   /* Get timer clock rate */
+   rate = clk_get_rate();
+
+   /* Is  timer clock rate valid, If not go to 24MHz clock*/
+   if ((int)rate <= 0) {
+   dev_err(dev, "Could not get clock rate...\n");
+   return -EINVAL;
+   }
+   /* Only support 24MHz clock */
+   if (rate != 2400UL) {
+   dev_err(dev, "Clock rate other than 24MHz not supported...\n");
+   return -EINVAL;
+   }
+   /* we set timer prescaler to obtain a 1MHz timer counter frequency */
+   prescaler = (rate / CONFIG_SYS_HZ_CLOCK) - 1;
+   writel(GPT_PR_PRESCALER & prescaler, >pr);
+   /* Set timer frequency to 1MHz */
+   uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK;
+
+   clrbits_le32(>cr, GPT_CR_CLKSRC);
+   setbits_le32(>cr, IPG_CLK);
+   /* start timer */
+   setbits_le32(>cr, GPT_CR_EN);
+
+   return 0;
+}
+
+static const struct timer_ops imx_gpt_timer_ops = {
+   .get_count = imx_gpt_timer_get_count,
+};
+
+static const struct udevice_id imx_gpt_timer_ids[] = {
+   { .compatible = "fsl,imxrt-gpt" },
+   {}
+};
+
+U_BOOT_DRIVER(imx_gpt_timer) = {
+   .name = "imx_gpt_timer",
+   .id = UCLASS_TIMER,
+   .of_match = 

Re: [PATCH v1 1/1] drivers: mmc: iproc_sdhci: enable HS200 mode

2021-02-09 Thread Jaehoon Chung
Hi Rayagonda,

On 2/9/21 1:34 PM, Rayagonda Kokatanur wrote:
> From: Bharat Gooty 
> 
> Add tuning functionality which is needed for HS200 mode.
> For HS200, program the correct needed 1.8 voltage

I didn't test with this on target. But how did you use HS200 mode?
In this patch, there is no set to HS200 mode. Is there any other patch.

> 
> Signed-off-by: Bharat Gooty 
> Signed-off-by: Rayagonda Kokatanur 
> ---
>  drivers/mmc/iproc_sdhci.c | 88 +++
>  1 file changed, 79 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/mmc/iproc_sdhci.c b/drivers/mmc/iproc_sdhci.c
> index f931e4b3c1..360ea01e21 100644
> --- a/drivers/mmc/iproc_sdhci.c
> +++ b/drivers/mmc/iproc_sdhci.c
> @@ -9,6 +9,7 @@
>  #include 
>  #include 
>  #include 
> +#include "mmc_private.h"
>  #include 
>  
>  DECLARE_GLOBAL_DATA_PTR;
> @@ -139,17 +140,87 @@ static void sdhci_iproc_writeb(struct sdhci_host *host, 
> u8 val, int reg)
>  
>  static int sdhci_iproc_set_ios_post(struct sdhci_host *host)
>  {
> - u32 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
> + struct mmc *mmc = (struct mmc *)host->mmc;
> + u32 ctrl;
>  
> - /* Reset UHS mode bits */
> - ctrl &= ~SDHCI_CTRL_UHS_MASK;
> + if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
> + ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
> + ctrl |= SDHCI_CTRL_VDD_180;
> + sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
> + }
>  
> - if (host->mmc->ddr_mode)
> - ctrl |= UHS_DDR50_BUS_SPEED;

Doesn't need to remove this? If someone want to use DDR mode, doesn't need to 
set this bit?

> + sdhci_set_uhs_timing(host);
> + return 0;
> +}
>  
> +static void sdhci_start_tuning(struct sdhci_host *host)
> +{
> + u32 ctrl;
> +
> + ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
> + ctrl |= SDHCI_CTRL_EXEC_TUNING;
>   sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
>  
> - return 0;
> + sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_INT_ENABLE);
> + sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_SIGNAL_ENABLE);
> +}
> +
> +static void sdhci_end_tuning(struct sdhci_host *host)
> +{
> + /* Enable only interrupts served by the SD controller */
> + sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK,
> +  SDHCI_INT_ENABLE);
> + /* Mask all sdhci interrupt sources */
> + sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE);
> +}
> +
> +static int sdhci_iproc_execute_tuning(struct mmc *mmc, u8 opcode)
> +{
> +#define MAX_TUNING_LOOP  40

Move to top. 

> + struct mmc_cmd cmd;
> + u32 ctrl;
> + u32 blocksize = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 64);
> + struct sdhci_host *host = dev_get_priv(mmc->dev);
> + char tuning_loop_counter = MAX_TUNING_LOOP;
> + int ret = 0;
> +
> + sdhci_start_tuning(host);
> +
> + cmd.cmdidx = opcode;
> + cmd.resp_type = MMC_RSP_R1;
> + cmd.cmdarg = 0;
> +
> + if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200 && mmc->bus_width == 8)

According to spec, HS200 can be used with 4/8 bit buswidth. 


> + blocksize = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 128);
> +
> + sdhci_writew(host, blocksize, SDHCI_BLOCK_SIZE);
> + sdhci_writew(host, 1, SDHCI_BLOCK_COUNT);
> + sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE);
> +
> + do {
> + mmc_send_cmd(mmc, , NULL);
> + if (opcode == MMC_CMD_SEND_TUNING_BLOCK)
> + udelay(1);

Add the comment to add udelay(1).

> +
> + ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
> +
> + if (tuning_loop_counter-- == 0)
> + break;
> +
> + } while (ctrl & SDHCI_CTRL_EXEC_TUNING);
> +
> + if (tuning_loop_counter < 0 || (!(ctrl & SDHCI_CTRL_TUNED_CLK))) {
> + ctrl &= ~(SDHCI_CTRL_TUNED_CLK | SDHCI_CTRL_EXEC_TUNING);
> + sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL2);
> + printf("%s:Tuning failed, opcode = 0x%02x\n", __func__, opcode);
> + ret = -EIO;
> + }
> +
> + udelay(1);

Doesn't need to add udelay(1) at here?

Best Regards,
Jaehoon Chung

> +
> + sdhci_end_tuning(host);
> +
> + return ret;
>  }
>  
>  static struct sdhci_ops sdhci_platform_ops = {
> @@ -162,6 +233,7 @@ static struct sdhci_ops sdhci_platform_ops = {
>   .write_b = sdhci_iproc_writeb,
>  #endif
>   .set_ios_post = sdhci_iproc_set_ios_post,
> + .platform_execute_tuning = sdhci_iproc_execute_tuning,
>  };
>  
>  struct iproc_sdhci_plat {
> @@ -189,9 +261,7 @@ static int iproc_sdhci_probe(struct udevice *dev)
>  
>   host->name = dev->name;
>   host->ioaddr = dev_read_addr_ptr(dev);
> - host->voltages = MMC_VDD_165_195 |
> -  MMC_VDD_32_33 | MMC_VDD_33_34;
> - host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B;
> + host->quirks = SDHCI_QUIRK_BROKEN_R1B;
>   host->host_caps = 

Re: [PATCH 0/5] Enable ECDSA FIT verification for stm32mp

2021-02-09 Thread Alex G.

Hi Patrick,

On 2/9/21 9:08 AM, Patrick DELAUNAY wrote:
[snip]
For information, today the STMicroelectronics expected that the boot 
sequence for secure boot


(with closed STM32MP1 devices) is the trusted boot chain.



TF-A (BL2) => OP-TEE or  => U-Boot =>  OS

     TF-A (BL32)


BL2 is authenticated by ROM code, with EDCSA support.


I next OpenSTLinux release (and soon after in upstream) 
STMicroelectronics will add FIP support


for STM32MP15x; TF-A FIP allows to boot Kernel after TF-A BL2 if you 
want to skip U-Boot


TF-A (BL2) => FIP (OP-TEE + Kernel)


And the FIP allow authentication with certificate for 'secured boot' 
with a complete chain of trust.


https://trustedfirmware-a.readthedocs.io/en/latest/index.html


So the ECDSA support in SPL for STM32MP15x will be not actively 
supported by STMicroelectronics for product design.



The boot flow I'm working on will use an authenticated BL2 as well:

  ROM -> SPL(BL2) -> FIT(OP-TEE -> Linux)

I'm using this to boot to a 3D application very fast (a couple of 
seconds max). It's really cool. I even wrote a utility for signing SPL 
images for the ROM code to check [1].


I had looked at FIP images briefly a few months back. I didn't see any 
advantage over the FIT format. I also wanted to have as little code as 
possible, so avoiding TF-A made sense. There were also some major issues 
with syncing the clock tree between linux and TF-A. TF-A was a beautiful 
disaster. Maybe that changed, but given I have a working proof of 
concept, I doubt I'll be re-engineering the boot flow.


I realize there won't be any STM support for SPL. openstlinux seems to 
have moved away from SPL. I've gotten a lot of enthusiastic support from 
u-boot members, as a number of people seem to really like this chip 
(meself included).


Alex


[1] https://github.com/mrnuke/stm32mp-keygen


Re: [PATCH v9] Add support for stack-protector

2021-02-09 Thread Heinrich Schuchardt
On 09.02.21 13:49, Heinrich Schuchardt wrote:
> On 09.02.21 04:36, Joel Peshkin wrote:
>> Add support for stack protector for UBOOT, SPL, and TPL
>> as well as new pytest for stackprotector
>>
>> Signed-off-by: Joel Peshkin 
>
> Before merging the patch the stack smash in
>
> test/py/tests/test_efi_capsule/test_capsule_firmware.py
> function efi_launch_capsules()
>
> must be fixed.

This patch fixes the problem with
test/py/tests/test_efi_capsule/test_capsule_firmware.py:

https://lists.denx.de/pipermail/u-boot/2021-February/440872.html
[PATCH 1/1] efi_loader: fix get_last_capsule()

Best regards

Heinrich


[PATCH 1/1] efi_loader: fix get_last_capsule()

2021-02-09 Thread Heinrich Schuchardt
fix get_last_capsule() leads to writes beyond the stack allocated buffer.
This was indicated when enabling the stack protector.

utf16_utf8_strcpy() only stops copying when reaching '\0'. The current
invocation always writes beyond the end of value[].

The output length of utf16_utf8_strcpy() may be longer than the number of
UTF-16 tokens. E.g has "CapsuleКиев" has 11 UTF-16 tokens but 15 UTF-8
tokens. Hence, using utf16_utf8_strcpy() without checking the input may
lead to further writes beyond value[].

The current invocation of strict_strtoul() reads beyond the end of value[].

A non-hexadecimal value after "Capsule" (e.g. "Capsule") must result in
an error. We cat catch this by checking the return value of strict_strtoul().

A value that is too short after "Capsule" (e.g. "Capsule0") must result in
an error. We must check the string length of value[].

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/efi_capsule.c | 18 +-
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
index d39d731080..0017f0c0db 100644
--- a/lib/efi_loader/efi_capsule.c
+++ b/lib/efi_loader/efi_capsule.c
@@ -42,20 +42,28 @@ static struct efi_file_handle *bootdev_root;
 static __maybe_unused unsigned int get_last_capsule(void)
 {
u16 value16[11]; /* "Capsule": non-null-terminated */
-   char value[11], *p;
+   char value[5];
efi_uintn_t size;
unsigned long index = 0x;
efi_status_t ret;
+   int i;

size = sizeof(value16);
ret = efi_get_variable_int(L"CapsuleLast", _guid_capsule_report,
   NULL, , value16, NULL);
-   if (ret != EFI_SUCCESS || u16_strncmp(value16, L"Capsule", 7))
+   if (ret != EFI_SUCCESS || size != 22 ||
+   u16_strncmp(value16, L"Capsule", 7))
goto err;
+   for (i = 0; i < 4; ++i) {
+   u16 c = value16[i + 7];

-   p = value;
-   utf16_utf8_strcpy(, value16);
-   strict_strtoul([7], 16, );
+   if (!c)
+   goto err;
+   value[i] = c;
+   }
+   value[4] = 0;
+   if (strict_strtoul(value, 16, ))
+   index = 0x;
 err:
return index;
 }
--
2.30.0



[PATCH 1/1] efi_loader: '.' and '..' are directories

2021-02-09 Thread Heinrich Schuchardt
'.' and '..' are directories. So when looking for capsule files it is
sufficient to check that the attribute EFI_FILE_DIRECTORY is not set. We
don't have to check for these special names.

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/efi_capsule.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
index 0d5a7b63ec..d39d731080 100644
--- a/lib/efi_loader/efi_capsule.c
+++ b/lib/efi_loader/efi_capsule.c
@@ -753,9 +753,7 @@ static efi_status_t efi_capsule_scan_dir(u16 ***files, 
unsigned int *num)
if (!tmp_size)
break;

-   if (!(dirent->attribute & EFI_FILE_DIRECTORY) &&
-   u16_strcmp(dirent->file_name, L".") &&
-   u16_strcmp(dirent->file_name, L".."))
+   if (!(dirent->attribute & EFI_FILE_DIRECTORY))
count++;
}

--
2.30.0



Re: [PATCH u-boot-marvell 00/18] Upgrade A38x DDR3 training to version 14.0.0

2021-02-09 Thread Chris Packham

On 9/02/21 10:15 pm, Pali Rohár wrote:
> On Tuesday 09 February 2021 01:08:54 Chris Packham wrote:
>> On 9/02/21 1:16 pm, Chris Packham wrote:
>>> On 9/02/21 9:18 am, Marek Behun wrote:
 On Mon, 8 Feb 2021 20:11:06 +
 Chris Packham  wrote:

> Hi Marek,
>
> Do you have this in a repo I can pull from? I've got a couple of boards
> I can give this a spin on.
 https://gitlab.nic.cz/turris/turris-omnia-uboot/
 branch v2021.04-rc-mv-ddr-14.0.0

 also please test branch v2021.04-rc-mv-ddr-14.0.0-samsung-ddr-fix, that
 one contains one more commit that is needed for Omnia with Samsung DDR
 chips.
>>> I've tested the dm-88f6820-amc board. Training completed without
>>> issue, as does memtester running from Linux.
>>>
>>> Hit a bit of a snag on the x530 because the changes pushed it over the
>>> SPL size (it was already pretty close). I'll look to see if there's
>>> anything I can drop out or maybe bump the SPL size (I never did get a
>>> clear answer from Marvell as to what the size limit actually is).
>> I can temporarily work around the size issue by disabling watchdog
>> support in SPL (I really don't want that to be the long term solution).
> If you need to decrease size of U-Boot binary, can you try enabling
> following two options?
Technically it's the size of the spl not u-boot proper.
> CONFIG_CC_OPTIMIZE_FOR_SIZE=y
This is already set it's default y.
> CONFIG_OPTIMIZE_INLINING=y
Setting both CONFIG_OPTIMIZE_INLINING=y and 
CONFIG_SPL_OPTIMIZE_INLINING=y don't help (they actually make the SPL a 
tiny bit bigger).

[PATCH u-boot] cmd: pinmux: depend on PINCTRL

2021-02-09 Thread Marek Behún
The pinmux command uses functions pinctrl_get_pin_*(), which are missing
if PINCTRL config option is disabled.

Signed-off-by: Marek Behún 
Cc: Simon Glass 
Cc: Tom Rini 
---
 cmd/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 928a2a0a2d..4defbd9cf9 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1188,6 +1188,7 @@ config CMD_PCI
 
 config CMD_PINMUX
bool "pinmux - show pins muxing"
+   depends on PINCTRL
default y if PINCTRL
help
  Parse all available pin-controllers and show pins muxing. This
-- 
2.26.2



[PATCH 1/1] Allow last block to be read

2021-02-09 Thread Jesper Schmitz Mouridsen
The last block is of size media->block_size
---
 lib/efi_loader/efi_disk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 1f6b817dea..f77f465d20 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -148,7 +148,7 @@ static efi_status_t EFIAPI efi_disk_read_blocks(struct 
efi_block_io *this,
(uintptr_t)buffer & (this->media->io_align - 1))
return EFI_INVALID_PARAMETER;
if (lba * this->media->block_size + buffer_size >
-   this->media->last_block * this->media->block_size)
+   this->media->last_block * this->media->block_size + 
this->media->block_size)
return EFI_INVALID_PARAMETER;
 
 #ifdef CONFIG_EFI_LOADER_BOUNCE_BUFFER
-- 
2.30.0



[PATCH 0/1] Allow last block to be read

2021-02-09 Thread Jesper Schmitz Mouridsen
The last block could not be read by FreeBSD
loader.efi (the gpt backup block)

Jesper Schmitz Mouridsen (1):
  Allow last block to be read

 lib/efi_loader/efi_disk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.30.0



[PATCHv5 5/6] sandbox: imply SCP03 and CMD_SCP03

2021-02-09 Thread Jorge Ramirez-Ortiz
From: Igor Opaniuk 

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk 
---
 arch/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/Kconfig b/arch/Kconfig
index 27843cd79c..7023223927 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -142,6 +142,8 @@ config SANDBOX
imply AVB_VERIFY
imply LIBAVB
imply CMD_AVB
+   imply SCP03
+   imply CMD_SCP03
imply UDP_FUNCTION_FASTBOOT
imply VIRTIO_MMIO
imply VIRTIO_PCI
-- 
2.30.0



[PATCHv5 6/6] test: py: add initial coverage for scp03 cmd

2021-02-09 Thread Jorge Ramirez-Ortiz
From: Igor Opaniuk 

Add initial test coverage for SCP03 command.

Signed-off-by: Igor Opaniuk 
---
 test/py/tests/test_scp03.py | 27 +++
 1 file changed, 27 insertions(+)
 create mode 100644 test/py/tests/test_scp03.py

diff --git a/test/py/tests/test_scp03.py b/test/py/tests/test_scp03.py
new file mode 100644
index 00..1f689252dd
--- /dev/null
+++ b/test/py/tests/test_scp03.py
@@ -0,0 +1,27 @@
+# Copyright (c) 2021 Foundries.io Ltd
+#
+# SPDX-License-Identifier:  GPL-2.0+
+#
+# SCP03 command test
+
+"""
+This tests SCP03 command in U-boot.
+
+For additional details check doc/usage/scp03.rst
+"""
+
+import pytest
+import u_boot_utils as util
+
+@pytest.mark.buildconfigspec('cmd_scp03')
+def test_scp03(u_boot_console):
+"""Enable and provision keys with SCP03
+"""
+
+success_str1 = "SCP03 is enabled"
+success_str2 = "SCP03 is provisioned"
+
+response = u_boot_console.run_command('scp03 enable')
+assert success_str1 in response
+response = u_boot_console.run_command('scp03 provision')
+assert success_str2 in response
-- 
2.30.0



[PATCHv5 4/6] doc: describe the scp03 command

2021-02-09 Thread Jorge Ramirez-Ortiz
The Secure Channel Protocol 03 command sends control requests
(enable/provision) to the TEE implementing the protocol between the
processor and the secure element.

Signed-off-by: Jorge Ramirez-Ortiz 
---
 doc/usage/index.rst |  1 +
 doc/usage/scp03.rst | 33 +
 2 files changed, 34 insertions(+)
 create mode 100644 doc/usage/scp03.rst

diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index 5754958d7e..fa1c4160b9 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -29,3 +29,4 @@ Shell commands
pstore
sbi
true
+   scp03
diff --git a/doc/usage/scp03.rst b/doc/usage/scp03.rst
new file mode 100644
index 00..7ff87ed85a
--- /dev/null
+++ b/doc/usage/scp03.rst
@@ -0,0 +1,33 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+scp03 command
+=
+
+Synopsis
+
+
+::
+
+scp03 enable
+scp03 provision
+
+Description
+---
+
+The *scp03* command calls into a Trusted Application executing in a
+Trusted Execution Environment to enable (if present) the Secure
+Channel Protocol 03 stablished between the processor and the secure
+element.
+
+This protocol encrypts all the communication between the processor and
+the secure element using a set of pre-defined keys. These keys can be
+rotated (provisioned) using the *provision* request.
+
+See also
+
+
+For some information on the internals implemented in the TEE, please
+check the GlobalPlatform documentation on `Secure Channel Protocol '03'`_
+
+.. _Secure Channel Protocol '03':
+   
https://globalplatform.org/wp-content/uploads/2014/07/GPC_2.3_D_SCP03_v1.1.2_PublicRelease.pdf
-- 
2.30.0



[PATCHv5 3/6] drivers: tee: sandbox: SCP03 control emulator

2021-02-09 Thread Jorge Ramirez-Ortiz
Adds support for a working SCP03 emulation. Input parameters are
validated however the commands (enable, provision) executed by the TEE
are assumed to always succeed.

Signed-off-by: Jorge Ramirez-Ortiz 
Reviewed-by: Simon Glass 
---
 drivers/tee/optee/Kconfig |  6 +
 drivers/tee/sandbox.c | 57 +--
 2 files changed, 61 insertions(+), 2 deletions(-)

diff --git a/drivers/tee/optee/Kconfig b/drivers/tee/optee/Kconfig
index d489834df9..98988c38f0 100644
--- a/drivers/tee/optee/Kconfig
+++ b/drivers/tee/optee/Kconfig
@@ -22,6 +22,12 @@ config OPTEE_TA_AVB
  The TA can support the "avb" subcommands "read_rb", "write"rb"
  and "is_unlocked".
 
+config OPTEE_TA_SCP03
+   bool "Support SCP03 TA"
+   default y
+   help
+ Enables support for controlling (enabling, provisioning) the
+ Secure Channel Protocol 03 operation in the OP-TEE SCP03 TA.
 endmenu
 
 endif
diff --git a/drivers/tee/sandbox.c b/drivers/tee/sandbox.c
index e1ba027fd6..f25cdd47e4 100644
--- a/drivers/tee/sandbox.c
+++ b/drivers/tee/sandbox.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /*
  * The sandbox tee driver tries to emulate a generic Trusted Exectution
@@ -32,7 +33,7 @@ struct ta_entry {
   struct tee_param *params);
 };
 
-#ifdef CONFIG_OPTEE_TA_AVB
+#if defined(CONFIG_OPTEE_TA_SCP03) || defined(CONFIG_OPTEE_TA_AVB)
 static u32 get_attr(uint n, uint num_params, struct tee_param *params)
 {
if (n >= num_params)
@@ -44,7 +45,7 @@ static u32 get_attr(uint n, uint num_params, struct tee_param 
*params)
 static u32 check_params(u8 p0, u8 p1, u8 p2, u8 p3, uint num_params,
struct tee_param *params)
 {
-   u8 p[] = { p0, p1, p2, p3};
+   u8 p[] = { p0, p1, p2, p3 };
uint n;
 
for (n = 0; n < ARRAY_SIZE(p); n++)
@@ -62,6 +63,52 @@ bad_params:
 
return TEE_ERROR_BAD_PARAMETERS;
 }
+#endif
+
+#ifdef CONFIG_OPTEE_TA_SCP03
+static u32 pta_scp03_open_session(struct udevice *dev, uint num_params,
+ struct tee_param *params)
+{
+   /*
+* We don't expect additional parameters when opening a session to
+* this TA.
+*/
+   return check_params(TEE_PARAM_ATTR_TYPE_NONE, TEE_PARAM_ATTR_TYPE_NONE,
+   TEE_PARAM_ATTR_TYPE_NONE, TEE_PARAM_ATTR_TYPE_NONE,
+   num_params, params);
+}
+
+static u32 pta_scp03_invoke_func(struct udevice *dev, u32 func, uint 
num_params,
+struct tee_param *params)
+{
+   u32 res;
+   static bool enabled;
+
+   switch (func) {
+   case PTA_CMD_ENABLE_SCP03:
+   res = check_params(TEE_PARAM_ATTR_TYPE_VALUE_INPUT,
+  TEE_PARAM_ATTR_TYPE_NONE,
+  TEE_PARAM_ATTR_TYPE_NONE,
+  TEE_PARAM_ATTR_TYPE_NONE,
+  num_params, params);
+   if (res)
+   return res;
+
+   if (!enabled) {
+   enabled = true;
+   } else {
+   }
+
+   if (params[0].u.value.a)
+
+   return TEE_SUCCESS;
+   default:
+   return TEE_ERROR_NOT_SUPPORTED;
+   }
+}
+#endif
+
+#ifdef CONFIG_OPTEE_TA_AVB
 
 static u32 ta_avb_open_session(struct udevice *dev, uint num_params,
   struct tee_param *params)
@@ -223,6 +270,12 @@ static const struct ta_entry ta_entries[] = {
  .invoke_func = ta_avb_invoke_func,
},
 #endif
+#ifdef CONFIG_OPTEE_TA_SCP03
+   { .uuid = PTA_SCP03_UUID,
+ .open_session = pta_scp03_open_session,
+ .invoke_func = pta_scp03_invoke_func,
+   },
+#endif
 };
 
 static void sandbox_tee_get_version(struct udevice *dev,
-- 
2.30.0



[PATCHv5 2/6] cmd: SCP03: enable and provision command

2021-02-09 Thread Jorge Ramirez-Ortiz
Enable and provision the SCP03 keys on a TEE controlled secured elemt
from the U-Boot shell.

Executing this command will generate and program new SCP03 encryption
keys on the secure element NVM.

Depending on the TEE implementation, the keys would then be stored in
some persistent storage or better derived from some platform secret
(so they can't be lost).

Signed-off-by: Jorge Ramirez-Ortiz 
Reviewed-by: Simon Glass 
---
 cmd/Kconfig  |  8 
 cmd/Makefile |  3 +++
 cmd/scp03.c  | 52 
 3 files changed, 63 insertions(+)
 create mode 100644 cmd/scp03.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 928a2a0a2d..6327374f2c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -2021,6 +2021,14 @@ config HASH_VERIFY
help
  Add -v option to verify data against a hash.
 
+config CMD_SCP03
+   bool "scp03 - SCP03 enable and rotate/provision operations"
+   depends on SCP03
+   help
+ This command provides access to a Trusted Application
+ running in a TEE to request Secure Channel Protocol 03
+ (SCP03) enablement and/or rotation of its SCP03 keys.
+
 config CMD_TPM_V1
bool
 
diff --git a/cmd/Makefile b/cmd/Makefile
index 176bf925fd..a7017e8452 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -193,6 +193,9 @@ obj-$(CONFIG_CMD_BLOB) += blob.o
 # Android Verified Boot 2.0
 obj-$(CONFIG_CMD_AVB) += avb.o
 
+# Foundries.IO SCP03
+obj-$(CONFIG_CMD_SCP03) += scp03.o
+
 obj-$(CONFIG_ARM) += arm/
 obj-$(CONFIG_RISCV) += riscv/
 obj-$(CONFIG_SANDBOX) += sandbox/
diff --git a/cmd/scp03.c b/cmd/scp03.c
new file mode 100644
index 00..655e0bba08
--- /dev/null
+++ b/cmd/scp03.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021, Foundries.IO
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+int do_scp03_enable(struct cmd_tbl *cmdtp, int flag, int argc,
+   char *const argv[])
+{
+   if (argc != 1)
+   return CMD_RET_USAGE;
+
+   if (tee_enable_scp03()) {
+   printf("TEE failed to enable SCP03\n");
+   return CMD_RET_FAILURE;
+   }
+
+   printf("SCP03 is enabled\n");
+
+   return CMD_RET_SUCCESS;
+}
+
+int do_scp03_provision(struct cmd_tbl *cmdtp, int flag, int argc,
+  char *const argv[])
+{
+   if (argc != 1)
+   return CMD_RET_USAGE;
+
+   if (tee_provision_scp03()) {
+   printf("TEE failed to provision SCP03 keys\n");
+   return CMD_RET_FAILURE;
+   }
+
+   printf("SCP03 is provisioned\n");
+
+   return CMD_RET_SUCCESS;
+}
+
+static char text[] =
+   "provides a command to enable SCP03 and provision the SCP03 keys\n"
+   " enable- enable SCP03 on the TEE\n"
+   " provision - provision SCP03 on the TEE\n";
+
+U_BOOT_CMD_WITH_SUBCMDS(scp03, "Secure Channel Protocol 03 control", text,
+   U_BOOT_SUBCMD_MKENT(enable, 1, 1, do_scp03_enable),
+   U_BOOT_SUBCMD_MKENT(provision, 1, 1, do_scp03_provision));
+
-- 
2.30.0



[PATCHv5 1/6] common: SCP03 control (enable and provision of keys)

2021-02-09 Thread Jorge Ramirez-Ortiz
This Trusted Application allows enabling SCP03 as well as provisioning
the keys on TEE controlled secure element (ie, NXP SE050).

All the information flowing on buses (ie I2C) between the processor
and the secure element must be encrypted. Secure elements are
pre-provisioned with a set of keys known to the user so that the
secure channel protocol (encryption) can be enforced on the first
boot. This situation is however unsafe since the keys are publically
available.

For example, in the case of the NXP SE050, these keys would be
available in the OP-TEE source tree [2] and of course in the
documentation corresponding to the part.

To address that, users are required to rotate/provision those keys
(ie, generate new keys and write them in the secure element's
persistent memory).

For information on SCP03, check the Global Platform HomePage and
google for that term [1]
[1] globalplatform.org
[2] https://github.com/OP-TEE/optee_os/
check:
core/drivers/crypto/se050/adaptors/utils/scp_config.c

Signed-off-by: Jorge Ramirez-Ortiz 
Reviewed-by: Simon Glass 
---
 common/Kconfig   |  8 ++
 common/Makefile  |  1 +
 common/scp03.c   | 53 
 include/scp03.h  | 21 ++
 include/tee/optee_ta_scp03.h | 21 ++
 5 files changed, 104 insertions(+)
 create mode 100644 common/scp03.c
 create mode 100644 include/scp03.h
 create mode 100644 include/tee/optee_ta_scp03.h

diff --git a/common/Kconfig b/common/Kconfig
index 2bb3798f80..482f123534 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -588,6 +588,14 @@ config AVB_BUF_SIZE
 
 endif # AVB_VERIFY
 
+config SCP03
+   bool "Build SCP03 - Secure Channel Protocol O3 - controls"
+   depends on OPTEE || SANDBOX
+   depends on TEE
+   help
+ This option allows U-Boot to enable and or provision SCP03 on an OPTEE
+ controlled Secured Element.
+
 config SPL_HASH
bool # "Support hashing API (SHA1, SHA256, etc.)"
help
diff --git a/common/Makefile b/common/Makefile
index daeea67cf2..215b8b26fd 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -137,3 +137,4 @@ obj-$(CONFIG_CMD_LOADB) += xyzModem.o
 obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += xyzModem.o
 
 obj-$(CONFIG_AVB_VERIFY) += avb_verify.o
+obj-$(CONFIG_SCP03) += scp03.o
diff --git a/common/scp03.c b/common/scp03.c
new file mode 100644
index 00..09ef7b5ba3
--- /dev/null
+++ b/common/scp03.c
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021, Foundries.IO
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static int scp03_enable(bool provision)
+{
+   const struct tee_optee_ta_uuid uuid = PTA_SCP03_UUID;
+   struct tee_open_session_arg session;
+   struct tee_invoke_arg invoke;
+   struct tee_param param;
+   struct udevice *tee = NULL;
+
+   tee = tee_find_device(tee, NULL, NULL, NULL);
+   if (!tee)
+   return -ENODEV;
+
+   memset(, 0, sizeof(session));
+   tee_optee_ta_uuid_to_octets(session.uuid, );
+   if (tee_open_session(tee, , 0, NULL))
+   return -ENXIO;
+
+   memset(, 0, sizeof(param));
+   param.attr = TEE_PARAM_ATTR_TYPE_VALUE_INPUT;
+   param.u.value.a = provision;
+
+   memset(, 0, sizeof(invoke));
+   invoke.func = PTA_CMD_ENABLE_SCP03;
+   invoke.session = session.session;
+
+   if (tee_invoke_func(tee, , 1, ))
+   return -EIO;
+
+   tee_close_session(tee, session.session);
+
+   return 0;
+}
+
+int tee_enable_scp03(void)
+{
+   return scp03_enable(false);
+}
+
+int tee_provision_scp03(void)
+{
+   return scp03_enable(true);
+}
diff --git a/include/scp03.h b/include/scp03.h
new file mode 100644
index 00..729667ccd1
--- /dev/null
+++ b/include/scp03.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2021, Foundries.IO
+ *
+ */
+
+#ifndef _SCP03_H
+#define _SCP03_H
+
+/*
+ * Requests to OPTEE to enable or provision the Secure Channel Protocol on its
+ * Secure Element
+ *
+ *  If key provisioning is requested, OPTEE shall generate new SCP03 keys and
+ *  write them to the Secure Element.
+ *
+ *  Both functions return < 0 on error else 0.
+ */
+int tee_enable_scp03(void);
+int tee_provision_scp03(void);
+#endif /* _SCP03_H */
diff --git a/include/tee/optee_ta_scp03.h b/include/tee/optee_ta_scp03.h
new file mode 100644
index 00..13f9956d98
--- /dev/null
+++ b/include/tee/optee_ta_scp03.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * (C) Copyright 2021, Foundries.IO
+ *
+ */
+#ifndef __TA_SCP03_H
+#define __TA_SCP03_H
+
+#define PTA_SCP03_UUID { 0xbe0e5821, 0xe718, 0x4f77, \
+   { 0xab, 0x3e, 0x8e, 0x6c, 0x73, 0xa9, 0xc7, 0x35 } }
+
+/*
+ * Enable Secure Channel Protocol functionality (SCP03) on the Secure Element.
+ *   Setting the operation value to something different than NULL will trigger
+ *   

Re: [PATCH] usb: dwc2: change compatible st,stm32mp1-hsotg to st,stm32mp15-hsotg

2021-02-09 Thread Patrick DELAUNAY



On 2/9/21 11:39 AM, Marek Vasut wrote:

On 2/9/21 11:14 AM, Patrick Delaunay wrote:
Hi,

[...]

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c 
b/drivers/usb/gadget/dwc2_udc_otg.c

index e3871e381e..ecac80fc11 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -1176,7 +1176,7 @@ static int dwc2_udc_otg_remove(struct udevice 
*dev)

  static const struct udevice_id dwc2_udc_otg_ids[] = {
  { .compatible = "snps,dwc2" },
  { .compatible = "brcm,bcm2835-usb" },
-    { .compatible = "st,stm32mp1-hsotg",
+    { .compatible = "st,stm32mp15-hsotg",
    .data = (ulong)dwc2_set_stm32mp1_hsotg_params },


I have to point out the obvious, DT is ABI, this breaks ABI. However, 
do we care about out-of-tree DTs here ?



I know that the binding backward compatibility and "binary compatible" 
the is a key element of DT


for the Linux kernel (for example the latest kernel image should work 
with a old device tree).



I don't see the same requirement for U-Boot as external DT (with EXT_DTB 
option) is not common .



So today I assume that U-Boot use only in-tree DT for stm32mp15 
platforms until we have a


100% upstream level of the stm32mp1 platform with binding aligned with 
Linux kernel bindings


(for example we have some other pending issue for USBPHYC binding).


But if backward compatibility is really blocking for U-Boot user, I can 
change my mind.



PS: I correct a issue here, because I upstream the stm32mp downstream 
binding for dwc2,


but this compatible had be modified before accepted by Linux kernel DT 
maintaineers


=> today USB in Linux kernel can't work with the DT used by U-Boot


Regards


Patrick




[PATCHv4 3/6] drivers: tee: sandbox: SCP03 control emulator

2021-02-09 Thread Jorge Ramirez-Ortiz
Adds support for a working SCP03 emulation. Input parameters are
validated however the commands (enable, provision) executed by the TEE
are assumed to always succeed.

Signed-off-by: Jorge Ramirez-Ortiz 
Reviewed-by: Simon Glass 
---
 drivers/tee/optee/Kconfig |  6 +
 drivers/tee/sandbox.c | 57 +--
 2 files changed, 61 insertions(+), 2 deletions(-)

diff --git a/drivers/tee/optee/Kconfig b/drivers/tee/optee/Kconfig
index d489834df9..98988c38f0 100644
--- a/drivers/tee/optee/Kconfig
+++ b/drivers/tee/optee/Kconfig
@@ -22,6 +22,12 @@ config OPTEE_TA_AVB
  The TA can support the "avb" subcommands "read_rb", "write"rb"
  and "is_unlocked".
 
+config OPTEE_TA_SCP03
+   bool "Support SCP03 TA"
+   default y
+   help
+ Enables support for controlling (enabling, provisioning) the
+ Secure Channel Protocol 03 operation in the OP-TEE SCP03 TA.
 endmenu
 
 endif
diff --git a/drivers/tee/sandbox.c b/drivers/tee/sandbox.c
index e1ba027fd6..f25cdd47e4 100644
--- a/drivers/tee/sandbox.c
+++ b/drivers/tee/sandbox.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /*
  * The sandbox tee driver tries to emulate a generic Trusted Exectution
@@ -32,7 +33,7 @@ struct ta_entry {
   struct tee_param *params);
 };
 
-#ifdef CONFIG_OPTEE_TA_AVB
+#if defined(CONFIG_OPTEE_TA_SCP03) || defined(CONFIG_OPTEE_TA_AVB)
 static u32 get_attr(uint n, uint num_params, struct tee_param *params)
 {
if (n >= num_params)
@@ -44,7 +45,7 @@ static u32 get_attr(uint n, uint num_params, struct tee_param 
*params)
 static u32 check_params(u8 p0, u8 p1, u8 p2, u8 p3, uint num_params,
struct tee_param *params)
 {
-   u8 p[] = { p0, p1, p2, p3};
+   u8 p[] = { p0, p1, p2, p3 };
uint n;
 
for (n = 0; n < ARRAY_SIZE(p); n++)
@@ -62,6 +63,52 @@ bad_params:
 
return TEE_ERROR_BAD_PARAMETERS;
 }
+#endif
+
+#ifdef CONFIG_OPTEE_TA_SCP03
+static u32 pta_scp03_open_session(struct udevice *dev, uint num_params,
+ struct tee_param *params)
+{
+   /*
+* We don't expect additional parameters when opening a session to
+* this TA.
+*/
+   return check_params(TEE_PARAM_ATTR_TYPE_NONE, TEE_PARAM_ATTR_TYPE_NONE,
+   TEE_PARAM_ATTR_TYPE_NONE, TEE_PARAM_ATTR_TYPE_NONE,
+   num_params, params);
+}
+
+static u32 pta_scp03_invoke_func(struct udevice *dev, u32 func, uint 
num_params,
+struct tee_param *params)
+{
+   u32 res;
+   static bool enabled;
+
+   switch (func) {
+   case PTA_CMD_ENABLE_SCP03:
+   res = check_params(TEE_PARAM_ATTR_TYPE_VALUE_INPUT,
+  TEE_PARAM_ATTR_TYPE_NONE,
+  TEE_PARAM_ATTR_TYPE_NONE,
+  TEE_PARAM_ATTR_TYPE_NONE,
+  num_params, params);
+   if (res)
+   return res;
+
+   if (!enabled) {
+   enabled = true;
+   } else {
+   }
+
+   if (params[0].u.value.a)
+
+   return TEE_SUCCESS;
+   default:
+   return TEE_ERROR_NOT_SUPPORTED;
+   }
+}
+#endif
+
+#ifdef CONFIG_OPTEE_TA_AVB
 
 static u32 ta_avb_open_session(struct udevice *dev, uint num_params,
   struct tee_param *params)
@@ -223,6 +270,12 @@ static const struct ta_entry ta_entries[] = {
  .invoke_func = ta_avb_invoke_func,
},
 #endif
+#ifdef CONFIG_OPTEE_TA_SCP03
+   { .uuid = PTA_SCP03_UUID,
+ .open_session = pta_scp03_open_session,
+ .invoke_func = pta_scp03_invoke_func,
+   },
+#endif
 };
 
 static void sandbox_tee_get_version(struct udevice *dev,
-- 
2.30.0



[PATCHv4 4/6] doc: describe the scp03 command

2021-02-09 Thread Jorge Ramirez-Ortiz
The Secure Channel Protocol 03 command sends control requests
(enable/provision) to the TEE implementing the protocol between the
processor and the secure element.

Signed-off-by: Jorge Ramirez-Ortiz 
---
 doc/usage/index.rst |  1 +
 doc/usage/scp03.rst | 33 +
 2 files changed, 34 insertions(+)
 create mode 100644 doc/usage/scp03.rst

diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index 5754958d7e..fa1c4160b9 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -29,3 +29,4 @@ Shell commands
pstore
sbi
true
+   scp03
diff --git a/doc/usage/scp03.rst b/doc/usage/scp03.rst
new file mode 100644
index 00..7ff87ed85a
--- /dev/null
+++ b/doc/usage/scp03.rst
@@ -0,0 +1,33 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+scp03 command
+=
+
+Synopsis
+
+
+::
+
+scp03 enable
+scp03 provision
+
+Description
+---
+
+The *scp03* command calls into a Trusted Application executing in a
+Trusted Execution Environment to enable (if present) the Secure
+Channel Protocol 03 stablished between the processor and the secure
+element.
+
+This protocol encrypts all the communication between the processor and
+the secure element using a set of pre-defined keys. These keys can be
+rotated (provisioned) using the *provision* request.
+
+See also
+
+
+For some information on the internals implemented in the TEE, please
+check the GlobalPlatform documentation on `Secure Channel Protocol '03'`_
+
+.. _Secure Channel Protocol '03':
+   
https://globalplatform.org/wp-content/uploads/2014/07/GPC_2.3_D_SCP03_v1.1.2_PublicRelease.pdf
-- 
2.30.0



[PATCHv4 6/6] test: py: add initial coverage for scp03 cmd

2021-02-09 Thread Jorge Ramirez-Ortiz
From: Igor Opaniuk 

Add initial test coverage for SCP03 command.

Signed-off-by: Igor Opaniuk 
---
 test/py/tests/test_scp03.py | 27 +++
 1 file changed, 27 insertions(+)
 create mode 100644 test/py/tests/test_scp03.py

diff --git a/test/py/tests/test_scp03.py b/test/py/tests/test_scp03.py
new file mode 100644
index 00..2b584db24d
--- /dev/null
+++ b/test/py/tests/test_scp03.py
@@ -0,0 +1,27 @@
+# Copyright (c) 2021, Foun
+#
+# SPDX-License-Identifier:  GPL-2.0+
+#
+# SCP03 command test
+
+"""
+This tests SCP03 command in U-boot.
+
+For additional details check doc/usage/scp03.rst
+"""
+
+import pytest
+import u_boot_utils as util
+
+@pytest.mark.buildconfigspec('cmd_scp03')
+def test_scp03(u_boot_console):
+"""Enable and provision keys with SCP03
+"""
+
+success_str1 = "SCP03 is enabled"
+success_str2 = "SCP03 is provisioned"
+
+response = u_boot_console.run_command('scp03 enable')
+assert success_str1 in response
+response = u_boot_console.run_command('scp03 provision')
+assert success_str2 in response
-- 
2.30.0



[PATCHv4 5/6] sandbox: imply SCP03 and CMD_SCP03

2021-02-09 Thread Jorge Ramirez-Ortiz
From: Igor Opaniuk 

Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk 
---
 arch/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/Kconfig b/arch/Kconfig
index 27843cd79c..7023223927 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -142,6 +142,8 @@ config SANDBOX
imply AVB_VERIFY
imply LIBAVB
imply CMD_AVB
+   imply SCP03
+   imply CMD_SCP03
imply UDP_FUNCTION_FASTBOOT
imply VIRTIO_MMIO
imply VIRTIO_PCI
-- 
2.30.0



[PATCHv4 1/6] common: SCP03 control (enable and provision of keys)

2021-02-09 Thread Jorge Ramirez-Ortiz
This Trusted Application allows enabling SCP03 as well as provisioning
the keys on TEE controlled secure element (ie, NXP SE050).

All the information flowing on buses (ie I2C) between the processor
and the secure element must be encrypted. Secure elements are
pre-provisioned with a set of keys known to the user so that the
secure channel protocol (encryption) can be enforced on the first
boot. This situation is however unsafe since the keys are publically
available.

For example, in the case of the NXP SE050, these keys would be
available in the OP-TEE source tree [2] and of course in the
documentation corresponding to the part.

To address that, users are required to rotate/provision those keys
(ie, generate new keys and write them in the secure element's
persistent memory).

For information on SCP03, check the Global Platform HomePage and
google for that term [1]
[1] globalplatform.org
[2] https://github.com/OP-TEE/optee_os/
check:
core/drivers/crypto/se050/adaptors/utils/scp_config.c

Signed-off-by: Jorge Ramirez-Ortiz 
Reviewed-by: Simon Glass 
---
 common/Kconfig   |  8 ++
 common/Makefile  |  1 +
 common/scp03.c   | 53 
 include/scp03.h  | 21 ++
 include/tee/optee_ta_scp03.h | 21 ++
 5 files changed, 104 insertions(+)
 create mode 100644 common/scp03.c
 create mode 100644 include/scp03.h
 create mode 100644 include/tee/optee_ta_scp03.h

diff --git a/common/Kconfig b/common/Kconfig
index 2bb3798f80..482f123534 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -588,6 +588,14 @@ config AVB_BUF_SIZE
 
 endif # AVB_VERIFY
 
+config SCP03
+   bool "Build SCP03 - Secure Channel Protocol O3 - controls"
+   depends on OPTEE || SANDBOX
+   depends on TEE
+   help
+ This option allows U-Boot to enable and or provision SCP03 on an OPTEE
+ controlled Secured Element.
+
 config SPL_HASH
bool # "Support hashing API (SHA1, SHA256, etc.)"
help
diff --git a/common/Makefile b/common/Makefile
index daeea67cf2..215b8b26fd 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -137,3 +137,4 @@ obj-$(CONFIG_CMD_LOADB) += xyzModem.o
 obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += xyzModem.o
 
 obj-$(CONFIG_AVB_VERIFY) += avb_verify.o
+obj-$(CONFIG_SCP03) += scp03.o
diff --git a/common/scp03.c b/common/scp03.c
new file mode 100644
index 00..09ef7b5ba3
--- /dev/null
+++ b/common/scp03.c
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021, Foundries.IO
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static int scp03_enable(bool provision)
+{
+   const struct tee_optee_ta_uuid uuid = PTA_SCP03_UUID;
+   struct tee_open_session_arg session;
+   struct tee_invoke_arg invoke;
+   struct tee_param param;
+   struct udevice *tee = NULL;
+
+   tee = tee_find_device(tee, NULL, NULL, NULL);
+   if (!tee)
+   return -ENODEV;
+
+   memset(, 0, sizeof(session));
+   tee_optee_ta_uuid_to_octets(session.uuid, );
+   if (tee_open_session(tee, , 0, NULL))
+   return -ENXIO;
+
+   memset(, 0, sizeof(param));
+   param.attr = TEE_PARAM_ATTR_TYPE_VALUE_INPUT;
+   param.u.value.a = provision;
+
+   memset(, 0, sizeof(invoke));
+   invoke.func = PTA_CMD_ENABLE_SCP03;
+   invoke.session = session.session;
+
+   if (tee_invoke_func(tee, , 1, ))
+   return -EIO;
+
+   tee_close_session(tee, session.session);
+
+   return 0;
+}
+
+int tee_enable_scp03(void)
+{
+   return scp03_enable(false);
+}
+
+int tee_provision_scp03(void)
+{
+   return scp03_enable(true);
+}
diff --git a/include/scp03.h b/include/scp03.h
new file mode 100644
index 00..729667ccd1
--- /dev/null
+++ b/include/scp03.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2021, Foundries.IO
+ *
+ */
+
+#ifndef _SCP03_H
+#define _SCP03_H
+
+/*
+ * Requests to OPTEE to enable or provision the Secure Channel Protocol on its
+ * Secure Element
+ *
+ *  If key provisioning is requested, OPTEE shall generate new SCP03 keys and
+ *  write them to the Secure Element.
+ *
+ *  Both functions return < 0 on error else 0.
+ */
+int tee_enable_scp03(void);
+int tee_provision_scp03(void);
+#endif /* _SCP03_H */
diff --git a/include/tee/optee_ta_scp03.h b/include/tee/optee_ta_scp03.h
new file mode 100644
index 00..13f9956d98
--- /dev/null
+++ b/include/tee/optee_ta_scp03.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * (C) Copyright 2021, Foundries.IO
+ *
+ */
+#ifndef __TA_SCP03_H
+#define __TA_SCP03_H
+
+#define PTA_SCP03_UUID { 0xbe0e5821, 0xe718, 0x4f77, \
+   { 0xab, 0x3e, 0x8e, 0x6c, 0x73, 0xa9, 0xc7, 0x35 } }
+
+/*
+ * Enable Secure Channel Protocol functionality (SCP03) on the Secure Element.
+ *   Setting the operation value to something different than NULL will trigger
+ *   

[PATCHv4 2/6] cmd: SCP03: enable and provision command

2021-02-09 Thread Jorge Ramirez-Ortiz
Enable and provision the SCP03 keys on a TEE controlled secured elemt
from the U-Boot shell.

Executing this command will generate and program new SCP03 encryption
keys on the secure element NVM.

Depending on the TEE implementation, the keys would then be stored in
some persistent storage or better derived from some platform secret
(so they can't be lost).

Signed-off-by: Jorge Ramirez-Ortiz 
Reviewed-by: Simon Glass 
---
 cmd/Kconfig  |  8 
 cmd/Makefile |  3 +++
 cmd/scp03.c  | 52 
 3 files changed, 63 insertions(+)
 create mode 100644 cmd/scp03.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 928a2a0a2d..6327374f2c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -2021,6 +2021,14 @@ config HASH_VERIFY
help
  Add -v option to verify data against a hash.
 
+config CMD_SCP03
+   bool "scp03 - SCP03 enable and rotate/provision operations"
+   depends on SCP03
+   help
+ This command provides access to a Trusted Application
+ running in a TEE to request Secure Channel Protocol 03
+ (SCP03) enablement and/or rotation of its SCP03 keys.
+
 config CMD_TPM_V1
bool
 
diff --git a/cmd/Makefile b/cmd/Makefile
index 176bf925fd..a7017e8452 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -193,6 +193,9 @@ obj-$(CONFIG_CMD_BLOB) += blob.o
 # Android Verified Boot 2.0
 obj-$(CONFIG_CMD_AVB) += avb.o
 
+# Foundries.IO SCP03
+obj-$(CONFIG_CMD_SCP03) += scp03.o
+
 obj-$(CONFIG_ARM) += arm/
 obj-$(CONFIG_RISCV) += riscv/
 obj-$(CONFIG_SANDBOX) += sandbox/
diff --git a/cmd/scp03.c b/cmd/scp03.c
new file mode 100644
index 00..655e0bba08
--- /dev/null
+++ b/cmd/scp03.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021, Foundries.IO
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+int do_scp03_enable(struct cmd_tbl *cmdtp, int flag, int argc,
+   char *const argv[])
+{
+   if (argc != 1)
+   return CMD_RET_USAGE;
+
+   if (tee_enable_scp03()) {
+   printf("TEE failed to enable SCP03\n");
+   return CMD_RET_FAILURE;
+   }
+
+   printf("SCP03 is enabled\n");
+
+   return CMD_RET_SUCCESS;
+}
+
+int do_scp03_provision(struct cmd_tbl *cmdtp, int flag, int argc,
+  char *const argv[])
+{
+   if (argc != 1)
+   return CMD_RET_USAGE;
+
+   if (tee_provision_scp03()) {
+   printf("TEE failed to provision SCP03 keys\n");
+   return CMD_RET_FAILURE;
+   }
+
+   printf("SCP03 is provisioned\n");
+
+   return CMD_RET_SUCCESS;
+}
+
+static char text[] =
+   "provides a command to enable SCP03 and provision the SCP03 keys\n"
+   " enable- enable SCP03 on the TEE\n"
+   " provision - provision SCP03 on the TEE\n";
+
+U_BOOT_CMD_WITH_SUBCMDS(scp03, "Secure Channel Protocol 03 control", text,
+   U_BOOT_SUBCMD_MKENT(enable, 1, 1, do_scp03_enable),
+   U_BOOT_SUBCMD_MKENT(provision, 1, 1, do_scp03_provision));
+
-- 
2.30.0



[PATCH 3/3] Makefile: Add (default) DEVICE_TREE to SPL FIT

2021-02-09 Thread Klaus Heinrich Kiwi
U-boot allows the default device tree to be overridden from
the build environment using the DEVICE_TREE variable.

Make sure that we include it in the SPL FIT mkimage build step.

This also fixes a broken image in case CONFIG_OF_LIST and
CONFIG_OF_OVERLAY_LIST are unset (i.e., expected to be supplied
by the DEVICE_TREE env var).

Signed-off-by: Klaus Heinrich Kiwi 
---

 Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Makefile b/Makefile
index ebbedb1fb1..116d03947a 100644
--- a/Makefile
+++ b/Makefile
@@ -1386,6 +1386,7 @@ MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware 
-C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-p $(CONFIG_FIT_EXTERNAL_OFFSET) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
+   $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(DEVICE_TREE))) \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtbo,$(subst 
",,$(CONFIG_OF_OVERLAY_LIST)))
 else
-- 
2.25.1



[PATCH 2/3] Kconfig: SPL_FIT_SIGNATURE requires SPL_LOAD_FIT

2021-02-09 Thread Klaus Heinrich Kiwi
Having the ability to support firmware FIT signatures on the SPL sounds
not so useful if the SPL is not supporting to load a (U-boot) firmware
as a FIT image.

Signed-off-by: Klaus Heinrich Kiwi 
---

 common/Kconfig.boot | 1 +
 1 file changed, 1 insertion(+)

diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index 7a0f7d9501..d323ad5d0b 100644
--- a/common/Kconfig.boot
+++ b/common/Kconfig.boot
@@ -162,6 +162,7 @@ config SPL_FIT_PRINT
 config SPL_FIT_SIGNATURE
bool "Enable signature verification of FIT firmware within SPL"
depends on SPL_DM
+   depends on SPL_LOAD_FIT || SPL_LOAD_FIT_FULL
select FIT_SIGNATURE
select SPL_FIT
select SPL_CRYPTO_SUPPORT
-- 
2.25.1



[PATCH 1/3] Kconfig: SPL_FIT_SIGNATURE selects FIT_SIGNATURE

2021-02-09 Thread Klaus Heinrich Kiwi
Selecting SPL_FIT_SIGNATURE (without selecting U-boot proper
verified boot first) breaks the build due to
CONFIG_FIT_SIGNATURE_MAX_SIZE being undefined, in addition to Kconfig
warnings on RSA and IMAGE_SIGN_INFO unmet dependencies.

Signed-off-by: Klaus Heinrich Kiwi 

---

 common/Kconfig.boot | 1 +
 1 file changed, 1 insertion(+)

diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index 5eaabdfc27..7a0f7d9501 100644
--- a/common/Kconfig.boot
+++ b/common/Kconfig.boot
@@ -162,6 +162,7 @@ config SPL_FIT_PRINT
 config SPL_FIT_SIGNATURE
bool "Enable signature verification of FIT firmware within SPL"
depends on SPL_DM
+   select FIT_SIGNATURE
select SPL_FIT
select SPL_CRYPTO_SUPPORT
select SPL_HASH_SUPPORT
-- 
2.25.1



[PATCH 0/3] Misc fixes for SPL_FIT_SIGNATURE builds

2021-02-09 Thread Klaus Heinrich Kiwi


This patch series contains a few fixes for issues found when
experimenting with the SPL_FIT_SIGNATURE builds. Some of them
are apparently necessary to properly integrate this U-boot
feature with build systems such as Yocto, and by extension
OpenBMC.

 -Klaus


Klaus Heinrich Kiwi (3):
  Kconfig: SPL_FIT_SIGNATURE selects FIT_SIGNATURE
  Kconfig: SPL_FIT_SIGNATURE requires SPL_LOAD_FIT
  Makefile: Add (default) DEVICE_TREE to SPL FIT

 Makefile| 1 +
 common/Kconfig.boot | 2 ++
 2 files changed, 3 insertions(+)

-- 
2.25.1



[PATCH u-boot 2/2] fs: btrfs: change directory list output to be aligned as before

2021-02-09 Thread Marek Behún
Since commit 325dd1f642dd ("fs: btrfs: Use btrfs_iter_dir() to ...")
when btrfs is listing a directory, the output is not aligned:

   15  Wed Sep 09 13:20:03 2020  boot.scr -> @/boot/boot.scr
0  Tue Feb 02 12:42:09 2021  @
  108  Tue Feb 02 12:54:04 2021  1.info

Return back to how it was displayed previously, i.e.:

   15  Wed Sep 09 13:20:03 2020  boot.scr -> @/boot/boot.scr
0  Tue Feb 02 12:42:09 2021  @
  <   >108  Tue Feb 02 12:54:04 2021  1.info

Instead of '', print '<   >', as ext4 driver.

If an unknown directory item type is encountered, we will print the type
number left padded with spaces, enclosed by '?', instead of '<' and '>',
i.e.:

  ? 30?.  name

Signed-off-by: Marek Behún 
Fixes: 325dd1f642dd ("fs: btrfs: Use btrfs_iter_dir() to replace ...")
Cc: David Sterba 
Cc: Qu Wenruo 
Cc: Tom Rini 
---
 fs/btrfs/btrfs.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/fs/btrfs/btrfs.c b/fs/btrfs/btrfs.c
index 6b4c5feb53..52a243a659 100644
--- a/fs/btrfs/btrfs.c
+++ b/fs/btrfs/btrfs.c
@@ -22,13 +22,13 @@ static int show_dir(struct btrfs_root *root, struct 
extent_buffer *eb,
struct btrfs_inode_item ii;
struct btrfs_key key;
static const char* dir_item_str[] = {
-   [BTRFS_FT_REG_FILE] = "FILE",
+   [BTRFS_FT_REG_FILE] = "   ",
[BTRFS_FT_DIR]  = "DIR",
-   [BTRFS_FT_CHRDEV]   = "CHRDEV",
-   [BTRFS_FT_BLKDEV]   = "BLKDEV",
-   [BTRFS_FT_FIFO] = "FIFO",
-   [BTRFS_FT_SOCK] = "SOCK",
-   [BTRFS_FT_SYMLINK]  = "SYMLINK",
+   [BTRFS_FT_CHRDEV]   = "CHR",
+   [BTRFS_FT_BLKDEV]   = "BLK",
+   [BTRFS_FT_FIFO] = "FIF",
+   [BTRFS_FT_SOCK] = "SCK",
+   [BTRFS_FT_SYMLINK]  = "SYM",
};
u8 type = btrfs_dir_type(eb, di);
char namebuf[BTRFS_NAME_LEN];
@@ -93,7 +93,7 @@ static int show_dir(struct btrfs_root *root, struct 
extent_buffer *eb,
if (type < ARRAY_SIZE(dir_item_str) && dir_item_str[type])
printf("<%s> ", dir_item_str[type]);
else
-   printf("DIR_ITEM.%u", type);
+   printf("?%3u? ", type);
if (type == BTRFS_FT_CHRDEV || type == BTRFS_FT_BLKDEV) {
ASSERT(key.type == BTRFS_INODE_ITEM_KEY);
printf("%4llu,%5llu  ", btrfs_stack_inode_rdev() >> 20,
-- 
2.26.2



[PATCH u-boot 1/2] fs: btrfs: skip xattrs in directory listing

2021-02-09 Thread Marek Behún
Skip xattrs in directory listing. U-Boot filesystem drivers do not list
xattrs.

Signed-off-by: Marek Behún 
Cc: David Sterba 
Cc: Qu Wenruo 
Cc: Tom Rini 
---
 fs/btrfs/btrfs.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/fs/btrfs/btrfs.c b/fs/btrfs/btrfs.c
index 346b2c4341..6b4c5feb53 100644
--- a/fs/btrfs/btrfs.c
+++ b/fs/btrfs/btrfs.c
@@ -29,7 +29,6 @@ static int show_dir(struct btrfs_root *root, struct 
extent_buffer *eb,
[BTRFS_FT_FIFO] = "FIFO",
[BTRFS_FT_SOCK] = "SOCK",
[BTRFS_FT_SYMLINK]  = "SYMLINK",
-   [BTRFS_FT_XATTR]= "XATTR"
};
u8 type = btrfs_dir_type(eb, di);
char namebuf[BTRFS_NAME_LEN];
@@ -38,6 +37,10 @@ static int show_dir(struct btrfs_root *root, struct 
extent_buffer *eb,
time_t mtime;
int ret = 0;
 
+   /* skip XATTRs in directory listing */
+   if (type == BTRFS_FT_XATTR)
+   return 0;
+
btrfs_dir_item_key_to_cpu(eb, di, );
 
if (key.type == BTRFS_ROOT_ITEM_KEY) {
-- 
2.26.2



Re: [PATCH 1/1] sandbox: allow cross-compiling sandbox

2021-02-09 Thread Heinrich Schuchardt
On 09.02.21 16:25, Simon Glass wrote:
> Hi Heinrich,
>
> On Mon, 8 Feb 2021 at 23:26, Heinrich Schuchardt  wrote:
>>
>> Am 9. Februar 2021 05:29:43 MEZ schrieb Simon Glass :
>>> Hi Heinrich,
>>>
>>> On Mon, 8 Feb 2021 at 15:06, Heinrich Schuchardt 
>>> wrote:

 UEFI test files like helloworld.efi require an architecture specific
 PE-COFF header.
>>>
>>> architecture-specific
>>>

 For non-sandbox the PE-COFF header is chosen by the target
>>> architecture.
 For the sandbox we use the host architecture. This is not helpful for
>>> cross
 compiling. Allow specifying the target architecture of the sandbox
>>> via
 environment variable MK_ARCH, e.g.
>>>
>>> What exactly is the target arch? Is the the one that sandbox is
>>> running on, or something else?
>>
>> It is the architecture that the binary can be run on
>
> You mean the sandbox binary. So it means that the sandbox binary runs
> natively on the machine it is being built on?

The target architecture in cross-compiling is the machine where the
binary is run. E.g. I build an ARM binary on a an RISC-V machine. Then
ARM is the target architecture and RISC-V is the host architecture.

I can only run that binary on an ARM machine or using QEMU.

> Or are you saying you
> want to support building a 32-bit x86 sandbox binary on a 64-bit ARM
> machine, for example?

That would be a use case for this patch.

>
> Absent any cross-compiling,I think we should auto-detect it if
> possible, like other programs do.

I will give it a try. Takahiro already made a suggestion.

Best regards

Heinrich

>
>>
>>
>>
>>>

 make sandbox_defconfig NO_SDL=1
 CROSS_COMPILE=aarch64-linux-gnu- NO_SDL=1 MK_ARCH=aarch64 make

 Signed-off-by: Heinrich Schuchardt 
 ---
  Makefile |  2 +-
  doc/arch/sandbox.rst | 14 ++
  2 files changed, 15 insertions(+), 1 deletion(-)

 diff --git a/Makefile b/Makefile
 index 23dd11f723..286e5148ae 100644
 --- a/Makefile
 +++ b/Makefile
 @@ -19,7 +19,7 @@ MAKEFLAGS += -rR --include-dir=$(CURDIR)

  # Determine host architecture
  include include/host_arch.h
 -MK_ARCH="${shell uname -m}"
 +MK_ARCH?="${shell uname -m}"
  unexport HOST_ARCH
  ifeq ("x86_64", $(MK_ARCH))
export HOST_ARCH=$(HOST_ARCH_X86_64)
 diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst
 index 60ee1e0741..0dd9edc8cb 100644
 --- a/doc/arch/sandbox.rst
 +++ b/doc/arch/sandbox.rst
 @@ -33,6 +33,20 @@ integers can only be built on 64-bit hosts.

  Note that standalone/API support is not available at present.

 +Cross compiling
 +---
 +
 +When cross compiling the U-Boot sandbox with CONFIG_EFI_LOADER=y the
>>> target
 +architecture must be specified using the MK_ARCH environment
>>> variable using one
 +of the values aarch64, armv7l, i386, riscv32, riscv64, x86_64, e.g.
>>>
>>> OK, but what is the target architecture? I'm just not sure from your
>>> comments what this actually means.
>>
>> See above.
>>
>>>
>>> Does MK mean make?
>>
>> What name do you suggest?
>
> That name is fine, I was just asking. I think using TARGET_ARCH would
> get very confusing.
>
> Regards,
> Simon
>



[PATCH btrfs-progs] btrfs-progs: do not fail when offset of a ROOT_ITEM is not -1

2021-02-09 Thread Marek Behún
When the btrfs_read_fs_root() function is searching a ROOT_ITEM with
location key offset other than -1, it currently fails via BUG_ON.

The offset can have other value than -1, though. This can happen for
example if a subvolume is renamed:

  $ btrfs subvolume create X && sync
  Create subvolume './X'
  $ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: X$
location key (270 ROOT_ITEM 18446744073709551615) type DIR
transid 283 data_len 0 name_len 1
name: X
  $ mv X Y && sync
  $ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: Y$
location key (270 ROOT_ITEM 0) type DIR
transid 285 data_len 0 name_len 1
name: Y

As can be seen the offset changed from -1ULL to 0.

Do not fail in this case.

Signed-off-by: Marek Behún 
Cc: David Sterba 
Cc: Qu Wenruo 
Cc: Tom Rini 
---
 kernel-shared/disk-io.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/kernel-shared/disk-io.c b/kernel-shared/disk-io.c
index 6f584986..ba8ffd8b 100644
--- a/kernel-shared/disk-io.c
+++ b/kernel-shared/disk-io.c
@@ -752,8 +752,7 @@ struct btrfs_root *btrfs_read_fs_root(struct btrfs_fs_info 
*fs_info,
return fs_info->free_space_root ? fs_info->free_space_root :
ERR_PTR(-ENOENT);
 
-   BUG_ON(location->objectid == BTRFS_TREE_RELOC_OBJECTID ||
-  location->offset != (u64)-1);
+   BUG_ON(location->objectid == BTRFS_TREE_RELOC_OBJECTID);
 
node = rb_search(_info->fs_root_tree, (void *),
 btrfs_fs_roots_compare_objectids, NULL);
-- 
2.26.2



[PATCH u-boot] fs: btrfs: do not fail when offset of a ROOT_ITEM is not -1

2021-02-09 Thread Marek Behún
When the btrfs_read_fs_root() function is searching a ROOT_ITEM with
location key offset other than -1, it currently fails via BUG_ON.

The offset can have other value than -1, though. This can happen for
example if a subvolume is renamed:

  $ btrfs subvolume create X && sync
  Create subvolume './X'
  $ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: X$
location key (270 ROOT_ITEM 18446744073709551615) type DIR
transid 283 data_len 0 name_len 1
name: X
  $ mv X Y && sync
  $ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: Y$
location key (270 ROOT_ITEM 0) type DIR
transid 285 data_len 0 name_len 1
name: Y

As can be seen the offset changed from -1ULL to 0.

Do not fail in this case.

Signed-off-by: Marek Behún 
Cc: David Sterba 
Cc: Qu Wenruo 
Cc: Tom Rini 
---
 fs/btrfs/disk-io.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index b332ecb796..c6fdec95c1 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -732,8 +732,7 @@ struct btrfs_root *btrfs_read_fs_root(struct btrfs_fs_info 
*fs_info,
return fs_info->chunk_root;
if (location->objectid == BTRFS_CSUM_TREE_OBJECTID)
return fs_info->csum_root;
-   BUG_ON(location->objectid == BTRFS_TREE_RELOC_OBJECTID ||
-  location->offset != (u64)-1);
+   BUG_ON(location->objectid == BTRFS_TREE_RELOC_OBJECTID);
 
node = rb_search(_info->fs_root_tree, (void *),
 btrfs_fs_roots_compare_objectids, NULL);
-- 
2.26.2



Re: [PATCH 05/25] arm: imx: Remove MX23 support

2021-02-09 Thread Stefano Babic
On 09.02.21 14:02, Tom Rini wrote:
> As there are now no boards for the MX23 family, remove the general
> support.
> 

I am fine to drop it.

Acked-by: Stefano Babic 

Best regards,
Stefano


> Cc: Stefano Babic 
> Cc: Fabio Estevam 
> Cc: NXP i.MX U-Boot Team 
> Signed-off-by: Tom Rini 
> ---
>  arch/arm/Kconfig  |   8 +-
>  arch/arm/Makefile |   2 +-
>  arch/arm/cpu/arm926ejs/mxs/Makefile   |   1 -
>  arch/arm/cpu/arm926ejs/mxs/clock.c|  31 +-
>  arch/arm/cpu/arm926ejs/mxs/iomux.c|   7 +-
>  .../cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg   |   5 -
>  arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg  |   7 -
>  arch/arm/cpu/arm926ejs/mxs/spl_boot.c |  31 +-
>  arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |  85 +
>  arch/arm/cpu/arm926ejs/mxs/spl_power_init.c   |  50 +--
>  arch/arm/cpu/arm926ejs/mxs/timer.c|  12 +-
>  arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd|  18 -
>  arch/arm/include/asm/arch-mxs/imx-regs.h  |   5 -
>  arch/arm/include/asm/arch-mxs/iomux-mx23.h| 349 --
>  arch/arm/include/asm/arch-mxs/regs-base.h |  46 +--
>  .../include/asm/arch-mxs/regs-clkctrl-mx23.h  | 209 ---
>  .../include/asm/arch-mxs/regs-power-mx23.h| 344 -
>  arch/arm/include/asm/arch-mxs/regs-ssp.h  |  42 +--
>  arch/arm/include/asm/arch-mxs/regs-timrot.h   |  97 +
>  arch/arm/include/asm/arch-mxs/sys_proto.h |  17 +-
>  arch/arm/include/asm/mach-imx/dma.h   |  14 +-
>  arch/arm/include/asm/mach-imx/regs-apbh.h | 115 +-
>  arch/arm/include/asm/mach-imx/regs-lcdif.h|  12 -
>  arch/arm/mach-imx/mxs/Kconfig |  21 --
>  drivers/dma/apbh_dma.c|   5 +-
>  drivers/gpio/mxs_gpio.c   |  12 +-
>  drivers/mmc/mxsmmc.c  |  12 +-
>  drivers/spi/mxs_spi.c |   9 +-
>  include/configs/mxs.h |  14 +-
>  tools/Makefile|   5 +-
>  30 files changed, 44 insertions(+), 1541 deletions(-)
>  delete mode 100644 arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx23.cfg
>  delete mode 100644 arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
>  delete mode 100644 arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd
>  delete mode 100644 arch/arm/include/asm/arch-mxs/iomux-mx23.h
>  delete mode 100644 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
>  delete mode 100644 arch/arm/include/asm/arch-mxs/regs-power-mx23.h
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 95557d6ed6bd..f2a87c3caed8 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -856,12 +856,6 @@ config ARCH_IMXRT
>   select SUPPORT_SPL
>   imply CMD_DM
>  
> -config ARCH_MX23
> - bool "NXP i.MX23 family"
> - select CPU_ARM926EJS
> - select PL011_SERIAL
> - select SUPPORT_SPL
> -
>  config ARCH_MX25
>   bool "NXP MX25"
>   select CPU_ARM926EJS
> @@ -2042,6 +2036,6 @@ source "arch/arm/Kconfig.debug"
>  endmenu
>  
>  config SPL_LDSCRIPT
> - default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || 
> ARCH_MX28) && !SPL_FRAMEWORK
> + default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if ARCH_MX28 && 
> !SPL_FRAMEWORK
>   default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
>   default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 28b523b37c70..7c1bca7f9269 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -107,7 +107,7 @@ libs-y += arch/arm/cpu/
>  libs-y += arch/arm/lib/
>  
>  ifeq ($(CONFIG_SPL_BUILD),y)
> -ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 
> mx6 mx7 mx35 imx8m imx8 imxrt))
> +ifneq (,$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 mx6 mx7 mx35 
> imx8m imx8 imxrt))
>  libs-y += arch/arm/mach-imx/
>  endif
>  else
> diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile 
> b/arch/arm/cpu/arm926ejs/mxs/Makefile
> index f60e61e4343f..f846a5400a3d 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/Makefile
> +++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
> @@ -12,7 +12,6 @@ obj-y   += spl_boot.o spl_lradc_init.o spl_mem_init.o 
> spl_power_init.o
>  endif
>  
>  # Specify the target for use in elftosb call
> -MKIMAGE_TARGET-$(CONFIG_MX23) = 
> mxsimage$(CONFIG_SPL_FRAMEWORK:%=-spl).mx23.cfg
>  MKIMAGE_TARGET-$(CONFIG_MX28) = 
> mxsimage$(CONFIG_SPL_FRAMEWORK:%=-spl).mx28.cfg
>  
>  # Generate HAB-capable IVT
> diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c 
> b/arch/arm/cpu/arm926ejs/mxs/clock.c
> index 4e1cf3a1e32b..9aa6f83bb395 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/clock.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
> @@ -28,9 +28,7 @@
>  #define  PLL_FREQ_MHZ(PLL_FREQ_KHZ / 1000)
>  #define  XTAL_FREQ_MHZ   (XTAL_FREQ_KHZ / 1000)
>  
> -#if defined(CONFIG_MX23)
> -#define MXC_SSPCLK_MAX MXC_SSPCLK0
> -#elif defined(CONFIG_MX28)
> +#if 

Re: [PATCH 10/25] arm: Remove mx35pdk board

2021-02-09 Thread Stefano Babic
On 09.02.21 14:03, Tom Rini wrote:
> This board has not been converted to CONFIG_DM_MMC by the deadline of
> v2019.04, which is almost two years ago.  In addition there are other DM
> migrations it is also missing.  Remove it.

This is a very old board, I am fine to remove it.

Acked-by: Stefano Babic 

Best regards,
Stefano

> 
> Cc: Stefano Babic 
> Signed-off-by: Tom Rini 
> ---
>  arch/arm/Kconfig|   6 -
>  board/freescale/mx35pdk/Kconfig |  15 --
>  board/freescale/mx35pdk/MAINTAINERS |   6 -
>  board/freescale/mx35pdk/Makefile|   8 -
>  board/freescale/mx35pdk/README  | 114 -
>  board/freescale/mx35pdk/lowlevel_init.S | 239 ---
>  board/freescale/mx35pdk/mx35pdk.c   | 293 
>  board/freescale/mx35pdk/mx35pdk.h   |  41 
>  configs/mx35pdk_defconfig   |  54 -
>  drivers/serial/Kconfig  |   2 +-
>  include/configs/mx35pdk.h   | 206 -
>  11 files changed, 1 insertion(+), 983 deletions(-)
>  delete mode 100644 board/freescale/mx35pdk/Kconfig
>  delete mode 100644 board/freescale/mx35pdk/MAINTAINERS
>  delete mode 100644 board/freescale/mx35pdk/Makefile
>  delete mode 100644 board/freescale/mx35pdk/README
>  delete mode 100644 board/freescale/mx35pdk/lowlevel_init.S
>  delete mode 100644 board/freescale/mx35pdk/mx35pdk.c
>  delete mode 100644 board/freescale/mx35pdk/mx35pdk.h
>  delete mode 100644 configs/mx35pdk_defconfig
>  delete mode 100644 include/configs/mx35pdk.h
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index f2a87c3caed8..9969da161e9c 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -621,11 +621,6 @@ config TARGET_FLEA3
>   bool "Support flea3"
>   select CPU_ARM1136
>  
> -config TARGET_MX35PDK
> - bool "Support mx35pdk"
> - select BOARD_LATE_INIT
> - select CPU_ARM1136
> -
>  config ARCH_BCM283X
>   bool "Broadcom BCM283X family"
>   select DM
> @@ -2009,7 +2004,6 @@ source "board/freescale/ls1012aqds/Kconfig"
>  source "board/freescale/ls1012ardb/Kconfig"
>  source "board/freescale/ls1012afrdm/Kconfig"
>  source "board/freescale/lx2160a/Kconfig"
> -source "board/freescale/mx35pdk/Kconfig"
>  source "board/freescale/s32v234evb/Kconfig"
>  source "board/grinn/chiliboard/Kconfig"
>  source "board/hisilicon/hikey/Kconfig"
> diff --git a/board/freescale/mx35pdk/Kconfig b/board/freescale/mx35pdk/Kconfig
> deleted file mode 100644
> index 021d19e5511c..
> --- a/board/freescale/mx35pdk/Kconfig
> +++ /dev/null
> @@ -1,15 +0,0 @@
> -if TARGET_MX35PDK
> -
> -config SYS_BOARD
> - default "mx35pdk"
> -
> -config SYS_VENDOR
> - default "freescale"
> -
> -config SYS_SOC
> - default "mx35"
> -
> -config SYS_CONFIG_NAME
> - default "mx35pdk"
> -
> -endif
> diff --git a/board/freescale/mx35pdk/MAINTAINERS 
> b/board/freescale/mx35pdk/MAINTAINERS
> deleted file mode 100644
> index 540e9436912b..
> --- a/board/freescale/mx35pdk/MAINTAINERS
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -MX35PDK BOARD
> -M:   Stefano Babic 
> -S:   Maintained
> -F:   board/freescale/mx35pdk/
> -F:   include/configs/mx35pdk.h
> -F:   configs/mx35pdk_defconfig
> diff --git a/board/freescale/mx35pdk/Makefile 
> b/board/freescale/mx35pdk/Makefile
> deleted file mode 100644
> index 6a60fad0cc8d..
> --- a/board/freescale/mx35pdk/Makefile
> +++ /dev/null
> @@ -1,8 +0,0 @@
> -# SPDX-License-Identifier: GPL-2.0+
> -#
> -# Copyright (C) 2007, Guennadi Liakhovetski 
> -#
> -# (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
> -
> -obj-y:= mx35pdk.o
> -obj-y+= lowlevel_init.o
> diff --git a/board/freescale/mx35pdk/README b/board/freescale/mx35pdk/README
> deleted file mode 100644
> index 6f6841f0993b..
> --- a/board/freescale/mx35pdk/README
> +++ /dev/null
> @@ -1,114 +0,0 @@
> -Overview
> ---
> -
> -mx35pdk (known als as mx35_3stack) is a development board by Freescale.
> -It consists of three pluggable board:
> - - CPU module, with CPU, RAM, flash
> - - Personality board, with most interfaces (USB, Network,..)
> - - Debug board with JTAG header.
> -
> -The board is usually delivered with redboot. This howto explains how to boot
> -a linux kernel and how to replace the original bootloader with U-Boot.
> -
> -The board is delivered with Redboot on the NAND flash. It is possible to
> -switch the boot device with the switches SW1-SW2 on the Personality board,
> -and with SW5-SW10 on the Debug board.
> -
> -Delivered Redboot script to start the kernel
> 
> -
> -In redboot the following script is stored:
> -
> -fis load kernel
> -exec -c "noinitrd console=ttymxc0,115200 root=/dev/mtdblock8 rw 
> rootfstype=jffs2 ip=dhcp fec_mac=00:04:9F:00:E7:76"
> -
> -Kernel is taken from flash. The image is in zImage format.
> -
> -Booting from NET, rootfs on NFS:
> 

Re: [PATCH 3/5] lib: ecdsa: Implement signature verification for crypto_algo API

2021-02-09 Thread Patrick DELAUNAY

Hi,

On 1/11/21 4:41 PM, Alexandru Gagniuc wrote:

Implement the crypto_algo .verify() function for ecdsa256. Because
it backends on UCLASS_ECDSA, this change is focused on parsing the
keys from devicetree and passing this information to the specific
UCLASS driver.

Signed-off-by: Alexandru Gagniuc
---
  lib/ecdsa/ecdsa-verify.c | 117 ++-
  1 file changed, 116 insertions(+), 1 deletion(-)

diff --git a/lib/ecdsa/ecdsa-verify.c b/lib/ecdsa/ecdsa-verify.c
index d2e6a40f4a..d84f6eb093 100644
--- a/lib/ecdsa/ecdsa-verify.c
+++ b/lib/ecdsa/ecdsa-verify.c
@@ -1,13 +1,128 @@
  // SPDX-License-Identifier: GPL-2.0+
  /*
+ * ECDSA signature verification for u-boot
+ *
+ * This implements the firmware-side wrapper for ECDSA verification. It bridges
+ * the struct crypto_algo API to the ECDSA uclass implementations.
+ *
   * Copyright (c) 2020, Alexandru Gagniuc
   */
  


http://www.denx.de/wiki/U-Boot/CodingStyle #Include files

#include 

it is normally the first in alphabetic order of directory


+#include 
  #include 
+#include 
+
+/*
+ * Derive size of an ECDSA key from the curve name
+ *
+ * While it's possible to extract the key size by using string manipulation,
+ * use a list of known curves for the time being.
+ */
+static int ecdsa_key_size(const char *curve_name)
+{
+   if (!strcmp(curve_name, "prime256v1"))
+   return 256;
+   else
+   return 0;
+}
+



To prepare the future can you parse a array of supported curves with 
associated ID


used as parameter of ECDSA parameter = enum ECDSA_CURVES

for example: char * name, int size, enum ECDSA_CURVES

const [] = {
{"prime256v1", 256, ECDSA_PRIME256V1 },

}



+static int fdt_get_key(struct ecdsa_public_key *key, const void *fdt, int node)
+{
+   int x_len, y_len;
+
+   key->curve_name = fdt_getprop(fdt, node, "ecdsa,curve", NULL);
+   key->size_bits = ecdsa_key_size(key->curve_name);
+   if (key->size_bits == 0) {
+   debug("Unknown ECDSA curve '%s'", key->curve_name);
+   return -EINVAL;
+   }
+
+   key->x = fdt_getprop(fdt, node, "ecdsa,x-point", _len);
+   key->y = fdt_getprop(fdt, node, "ecdsa,y-point", _len);
+
+   if (!key->x || !key->y)
+   return -EINVAL;
+
+   if (x_len != (key->size_bits / 8) || y_len != (key->size_bits / 8)) {
+   printf("%s: node=%d, curve@%p x@%p+%i y@%p+%i\n", __func__,
+  node, key->curve_name, key->x, x_len, key->y, y_len);
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
+static int ecdsa_verify_hash(struct udevice *dev,
+const struct image_sign_info *info,
+const void *hash, const void *sig, uint sig_len)
+{
+   const struct ecdsa_ops *ops = device_get_ops(dev);
+   const struct checksum_algo *algo = info->checksum;
+   struct ecdsa_public_key key;
+   int sig_node, key_node, ret;
+
+   if (!ops || !ops->verify)
+   return -ENODEV;
+
+   if (info->required_keynode > 0) {
+   ret = fdt_get_key(, info->fdt_blob, info->required_keynode);
+   if (ret < 0)
+   return ret;
+
+   return ops->verify(dev, , hash, algo->checksum_len,
+  sig, sig_len);



Need to indicate the used curve here as parameter of the verify opts ?



+   }
+
+   sig_node = fdt_subnode_offset(info->fdt_blob, 0, FIT_SIG_NODENAME);
+   if (sig_node < 0)
+   return -ENOENT;
+
+   /* Try all possible keys under the "/signature" node */
+   fdt_for_each_subnode(key_node, info->fdt_blob, sig_node) {
+   ret = fdt_get_key(, info->fdt_blob, key_node);
+   if (ret < 0)
+   continue;
+
+   ret = ops->verify(dev, , hash, algo->checksum_len,
+ sig, sig_len);
+
+   /* On success, don't worry about remaining keys */
+   if (ret == 0)



issue raised by chekpatch I think

if (!ret)



+   return 0;
+   }
+
+   return -EPERM;
+}
  
  int ecdsa_verify(struct image_sign_info *info,

 const struct image_region region[], int region_count,
 uint8_t *sig, uint sig_len)
  {
-   return -EOPNOTSUPP;
+   const struct checksum_algo *algo = info->checksum;
+   uint8_t hash[algo->checksum_len];
+   struct udevice *dev;
+   int ret;
+
+   ret = uclass_first_device(UCLASS_ECDSA, );
+   if (ret) {
+   debug("ECDSA: Could not find ECDSA implementation: %d\n", ret);
+   return ret;
+   }
+
+   ret = algo->calculate(algo->name, region, region_count, hash);
+   if (ret < 0)
+   return -EINVAL;
+
+   return ecdsa_verify_hash(dev, info, hash, sig, sig_len);
  }
+
+/*
+ * uclass definition for ECDSA API
+ *
+ * We don't implement any wrappers around 

Re: [PATCH 1/1] sandbox: allow cross-compiling sandbox

2021-02-09 Thread Simon Glass
Hi Heinrich,

On Mon, 8 Feb 2021 at 23:26, Heinrich Schuchardt  wrote:
>
> Am 9. Februar 2021 05:29:43 MEZ schrieb Simon Glass :
> >Hi Heinrich,
> >
> >On Mon, 8 Feb 2021 at 15:06, Heinrich Schuchardt 
> >wrote:
> >>
> >> UEFI test files like helloworld.efi require an architecture specific
> >> PE-COFF header.
> >
> >architecture-specific
> >
> >>
> >> For non-sandbox the PE-COFF header is chosen by the target
> >architecture.
> >> For the sandbox we use the host architecture. This is not helpful for
> >cross
> >> compiling. Allow specifying the target architecture of the sandbox
> >via
> >> environment variable MK_ARCH, e.g.
> >
> >What exactly is the target arch? Is the the one that sandbox is
> >running on, or something else?
>
> It is the architecture that the binary can be run on

You mean the sandbox binary. So it means that the sandbox binary runs
natively on the machine it is being built on? Or are you saying you
want to support building a 32-bit x86 sandbox binary on a 64-bit ARM
machine, for example?

Absent any cross-compiling,I think we should auto-detect it if
possible, like other programs do.

>
>
>
> >
> >>
> >> make sandbox_defconfig NO_SDL=1
> >> CROSS_COMPILE=aarch64-linux-gnu- NO_SDL=1 MK_ARCH=aarch64 make
> >>
> >> Signed-off-by: Heinrich Schuchardt 
> >> ---
> >>  Makefile |  2 +-
> >>  doc/arch/sandbox.rst | 14 ++
> >>  2 files changed, 15 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/Makefile b/Makefile
> >> index 23dd11f723..286e5148ae 100644
> >> --- a/Makefile
> >> +++ b/Makefile
> >> @@ -19,7 +19,7 @@ MAKEFLAGS += -rR --include-dir=$(CURDIR)
> >>
> >>  # Determine host architecture
> >>  include include/host_arch.h
> >> -MK_ARCH="${shell uname -m}"
> >> +MK_ARCH?="${shell uname -m}"
> >>  unexport HOST_ARCH
> >>  ifeq ("x86_64", $(MK_ARCH))
> >>export HOST_ARCH=$(HOST_ARCH_X86_64)
> >> diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst
> >> index 60ee1e0741..0dd9edc8cb 100644
> >> --- a/doc/arch/sandbox.rst
> >> +++ b/doc/arch/sandbox.rst
> >> @@ -33,6 +33,20 @@ integers can only be built on 64-bit hosts.
> >>
> >>  Note that standalone/API support is not available at present.
> >>
> >> +Cross compiling
> >> +---
> >> +
> >> +When cross compiling the U-Boot sandbox with CONFIG_EFI_LOADER=y the
> >target
> >> +architecture must be specified using the MK_ARCH environment
> >variable using one
> >> +of the values aarch64, armv7l, i386, riscv32, riscv64, x86_64, e.g.
> >
> >OK, but what is the target architecture? I'm just not sure from your
> >comments what this actually means.
>
> See above.
>
> >
> >Does MK mean make?
>
> What name do you suggest?

That name is fine, I was just asking. I think using TARGET_ARCH would
get very confusing.

Regards,
Simon


Re: [PATCH 2/5] lib: ecdsa: Add skeleton to implement ecdsa verification in u-boot

2021-02-09 Thread Patrick DELAUNAY

Hi,

On 1/11/21 4:41 PM, Alexandru Gagniuc wrote:

Prepare the source tree for accepting implementations of the ECDSA
algorithm. This patch deals with the boring aspects of Makefiles and
Kconfig files.

Signed-off-by: Alexandru Gagniuc
---
  include/image.h  | 10 +-
  include/u-boot/rsa.h |  2 +-
  lib/Kconfig  |  1 +
  lib/Makefile |  1 +
  lib/ecdsa/Kconfig| 23 +++
  lib/ecdsa/Makefile   |  1 +
  lib/ecdsa/ecdsa-verify.c | 13 +
  7 files changed, 45 insertions(+), 6 deletions(-)
  create mode 100644 lib/ecdsa/Kconfig
  create mode 100644 lib/ecdsa/Makefile
  create mode 100644 lib/ecdsa/ecdsa-verify.c

diff --git a/include/image.h b/include/image.h
index 6628173dca..1d70ba0ece 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1198,20 +1198,20 @@ int calculate_hash(const void *data, int data_len, 
const char *algo,
  #if defined(USE_HOSTCC)
  # if defined(CONFIG_FIT_SIGNATURE)
  #  define IMAGE_ENABLE_SIGN   1
-#  define IMAGE_ENABLE_VERIFY  1
+#  define IMAGE_ENABLE_VERIFY_RSA  1
  #  define IMAGE_ENABLE_VERIFY_ECDSA   1
  #  define FIT_IMAGE_ENABLE_VERIFY 1
  #  include 
  # else
  #  define IMAGE_ENABLE_SIGN   0
-#  define IMAGE_ENABLE_VERIFY  0
+#  define IMAGE_ENABLE_VERIFY_RSA  0
  # define IMAGE_ENABLE_VERIFY_ECDSA0
  #  define FIT_IMAGE_ENABLE_VERIFY 0
  # endif
  #else
  # define IMAGE_ENABLE_SIGN0
-# define IMAGE_ENABLE_VERIFY   CONFIG_IS_ENABLED(RSA_VERIFY)
-# define IMAGE_ENABLE_VERIFY_ECDSA 0
+# define IMAGE_ENABLE_VERIFY_RSA   CONFIG_IS_ENABLED(RSA_VERIFY)
+# define IMAGE_ENABLE_VERIFY_ECDSA CONFIG_IS_ENABLED(ECDSA_VERIFY)


here you are using CONFIG_IS_ENABLED.

This macro imply to test CONFIG_ECDSA_VERIFY or CONFIG_SPL_ECDSA_VERIFY (for 
SPL build)

=> but CONFIG_SPL_ECDSA_VERIFY is missing, I think you need to add it, as RSA
 


  # define FIT_IMAGE_ENABLE_VERIFY  CONFIG_IS_ENABLED(FIT_SIGNATURE)
  #endif
  
@@ -1260,7 +1260,7 @@ struct image_region {

int size;
  };
  
-#if IMAGE_ENABLE_VERIFY

+#if FIT_IMAGE_ENABLE_VERIFY
  # include 
  #endif
  struct checksum_algo {
diff --git a/include/u-boot/rsa.h b/include/u-boot/rsa.h
index bed1c097c2..eb258fca4c 100644
--- a/include/u-boot/rsa.h
+++ b/include/u-boot/rsa.h
@@ -81,7 +81,7 @@ static inline int rsa_add_verify_data(struct image_sign_info 
*info,
  }
  #endif
  
-#if IMAGE_ENABLE_VERIFY

+#if IMAGE_ENABLE_VERIFY_RSA
  /**
   * rsa_verify_hash() - Verify a signature against a hash
   *
diff --git a/lib/Kconfig b/lib/Kconfig
index 7673d2e4e0..e2cb846fc0 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -292,6 +292,7 @@ config AES
  supported by the algorithm but only a 128-bit key is supported at
  present.
  
+source lib/ecdsa/Kconfig

  source lib/rsa/Kconfig
  source lib/crypto/Kconfig
  
diff --git a/lib/Makefile b/lib/Makefile

index cf64188ba5..ab86be2678 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -59,6 +59,7 @@ endif
  
  obj-$(CONFIG_$(SPL_)ACPIGEN) += acpi/

  obj-$(CONFIG_$(SPL_)MD5) += md5.o
+obj-$(CONFIG_ECDSA) += ecdsa/


obj-$(CONFIG_$(SPL_)ECDSA) += ecdsa/



  obj-$(CONFIG_$(SPL_)RSA) += rsa/
  obj-$(CONFIG_FIT_SIGNATURE) += hash-checksum.o
  obj-$(CONFIG_SHA1) += sha1.o
diff --git a/lib/ecdsa/Kconfig b/lib/ecdsa/Kconfig
new file mode 100644
index 00..1244d6b6ea
--- /dev/null
+++ b/lib/ecdsa/Kconfig
@@ -0,0 +1,23 @@
+config ECDSA
+   bool "Enable ECDSA support"
+   depends on DM
+   help
+ This enables the ECDSA algorithm for FIT image verification in U-Boot.
+ See doc/uImage.FIT/signature.txt for more details.
+ The ECDSA algorithm is implemented using the driver model. So
+ CONFIG_DM is required by this library.
+ ECDSA is enabled for mkimage regardless of this  option.
+
+if ECDSA
+


Add CONFIG_SPL_ECDSA to select independently support in SPL et/or in U-Boot

as it is done for RSA

+ config SPL_ECDSA
+   bool "Use ECDSA library within in SPL"

 


+config ECDSA_VERIFY
+   bool "Enable ECDSA verification support in U-Boot."



+ select SPL_ECDSA



+   help
+ Allow ECDSA signatures to be recognized and verified in U-Boot.
+
+config SPL_ECDSA_VERIFY
+   bool "Enable ECDSA verification support in SPL"
+   help
+ Allow ECDSA signatures to be recognized and verified in SPL.
+
+endif
diff --git a/lib/ecdsa/Makefile b/lib/ecdsa/Makefile
new file mode 100644
index 00..771d6d3135
--- /dev/null
+++ b/lib/ecdsa/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_$(SPL_)ECDSA_VERIFY) += ecdsa-verify.o
diff --git a/lib/ecdsa/ecdsa-verify.c b/lib/ecdsa/ecdsa-verify.c
new file mode 100644
index 00..d2e6a40f4a
--- /dev/null
+++ b/lib/ecdsa/ecdsa-verify.c
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020, Alexandru Gagniuc
+ */
+
+#include 
+
+int ecdsa_verify(struct image_sign_info *info,
+const struct image_region region[], 

Re: [PATCH 0/5] Enable ECDSA FIT verification for stm32mp

2021-02-09 Thread Patrick DELAUNAY

Hi Alexandru,

On 1/11/21 4:41 PM, Alexandru Gagniuc wrote:
This series is Part II of the ECDSA saga. It applies on top of [1]: *  > [PATCH v4 0/6] Add support for ECDSA image signing (with test) > > 
I've designed the UCLASS_ECDSA such that it aligns with the ROM API > of 
the stm32mp. Instead of splitting the verification into (1) curve > 
operations and (2) modular exponentiation, I've concatenated > 
everything in a 'verify' step. It would be impossible to split the > 
steps and use the stm32mp ROM for verification. > > Should more granular 
control be required, this API could be extended > at a later time. Until 
we have more hardware supporting ECDSA, this > is purely speculative. > 
> The ROM API of the stm32mp is passed in 'r0' when the FSBL is > 
called. While we can save 'r0' in SPL, this series does not implement > 
a mechanism to pass this to u-boot. Thus the ROM API, and ECDSA > 
verification are only available for SPL. Although extending this to > 
u-boot by adding the ROM address to the FDT blob, implementing and > 
verifying this is beyond the scope of this series.


For information, today the STMicroelectronics expected that the boot 
sequence for secure boot


(with closed STM32MP1 devices) is the trusted boot chain.



TF-A (BL2) => OP-TEE or  => U-Boot =>  OS

    TF-A (BL32)


BL2 is authenticated by ROM code, with EDCSA support.


I next OpenSTLinux release (and soon after in upstream) 
STMicroelectronics will add FIP support


for STM32MP15x; TF-A FIP allows to boot Kernel after TF-A BL2 if you 
want to skip U-Boot


TF-A (BL2) => FIP (OP-TEE + Kernel)


And the FIP allow authentication with certificate for 'secured boot' 
with a complete chain of trust.


https://trustedfirmware-a.readthedocs.io/en/latest/index.html


So the ECDSA support in SPL for STM32MP15x will be not actively 
supported by STMicroelectronics for product design.







 > [1] https://lists.denx.de/pipermail/u-boot/2021-January/436935.html > 
> Alexandru Gagniuc (5): dm: crypto: Define UCLASS API for ECDSA > 
signature verification lib: ecdsa: Add skeleton to implement ecdsa > 
verification in u-boot lib: ecdsa: Implement signature verification > 
for crypto_algo API arm: stm32mp1: Implement ECDSA signature > 
verification Kconfig: FIT_SIGNATURE should not select RSA_VERIFY > > 
arch/arm/mach-stm32mp/Kconfig | 9 ++ > arch/arm/mach-stm32mp/Makefile | 
1 + > arch/arm/mach-stm32mp/ecdsa_romapi.c | 106 ++ 
> common/Kconfig.boot | 8 +- > include/crypto/ecdsa-uclass.h | 39 
 > include/dm/uclass-id.h | 1 + include/image.h > | 10 +-- 
include/u-boot/rsa.h | 2 +- lib/Kconfig > | 1 + lib/Makefile | 1 + > 
lib/ecdsa/Kconfig | 23 + lib/ecdsa/Makefile > | 1 + 
lib/ecdsa/ecdsa-verify.c | 128 > +++ 13 files 
changed, 320 insertions(+), 10 > deletions(-) create mode 100644 
arch/arm/mach-stm32mp/ecdsa_romapi.c > create mode 100644 
include/crypto/ecdsa-uclass.h create mode 100644 > lib/ecdsa/Kconfig 
create mode 100644 lib/ecdsa/Makefile create mode > 100644 
lib/ecdsa/ecdsa-verify.c >



Regards

Patrick




[PULL] Pull request for u-boot master / v2021.04 = u-boot-stm32-20210209

2021-02-09 Thread Patrick DELAUNAY



Hi Tom,

Please pull the STM32 related patches for u-boot/master, v2021.04: 
u-boot-stm32-20210209


- Enable the fastboot oem commands in stm32mp15 defconfig
- Fixes pinctrol for stmfx and stm32
- Add support of I2C6_K in stm32mp15 clock driver
- Alignment with Linux kernel device tree v5.11-rc2 for ST boards

CI status: 
https://gitlab.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/6326


Thanks,
Patric

git request-pull origin/master 
https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git 
u-boot-stm32-20210209


The following changes since commit e14d5762de1db84cae6d84d59c1e40f3eb26c4c3:

  Merge git://git.denx.de/u-boot-marvell (2021-02-08 10:55:51 -0500)

are available in the Git repository at:

  https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git 
tags/u-boot-stm32-20210209


for you to fetch changes up to f050e3fe4552dc8e24b1f01d26b835eeb762c467:

  arm: dts: stm32mp15: alignment with v5.11-rc2 (2021-02-09 10:56:06 +0100)


- Enable the fastboot oem commands in stm32mp15 defconfig
- Fixes pinctrol for stmfx and stm32
- Add support of I2C6_K in stm32mp15 clock driver
- Alignment with Linux kernel device tree v5.11-rc2 for ST boards


Fabrice GIRARDOT (1):
  ARM: dts: stm32: Fix cosmetic typo: use 'kHz' as kilohertz 
abbreviation


Jean-Philippe ROMAIN (2):
  configs: stm32mp1: enable fastboot support of eMMC boot partition
  configs: stm32mp1: enable the fastboot oem command format

Patrice Chotard (2):
  pinctrl: stmfx: Fix pin configuration issue
  pinctrl: stmfx: Use PINNAME_SIZE for pin's name size

Patrick Delaunay (6):
  configs: stm32mp1: enable the fastboot oem command partconf
  configs: stm32mp1: enable the fastboot oem command bootbus
  pinctrl: stm32: correct management pin display of OTYPE
  pinctrl: stm32: bind only the enabled GPIO subnode
  clk: stm32mp1: add support of I2C6_K
  arm: dts: stm32mp15: alignment with v5.11-rc2

 arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi |  2 +-
 arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi |  2 +-
 arch/arm/dts/stm32mp15-pinctrl.dtsi  | 87 
+++--
 arch/arm/dts/stm32mp151.dtsi | 48 
+

 arch/arm/dts/stm32mp153.dtsi |  6 
 arch/arm/dts/stm32mp157c-dk2.dts |  4 +++
 arch/arm/dts/stm32mp157c-ed1.dts | 27 +
 arch/arm/dts/stm32mp157c-ev1.dts |  1 +
 arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi   | 55 
-
 arch/arm/dts/stm32mp15xx-dkx.dtsi    | 47 
++---

 configs/stm32mp15_basic_defconfig    |  8 +
 configs/stm32mp15_trusted_defconfig  |  8 +
 drivers/clk/clk_stm32mp1.c   |  1 +
 drivers/pinctrl/pinctrl-stmfx.c  | 11 +++
 drivers/pinctrl/pinctrl_stm32.c  | 21 +++--
 include/configs/stm32mp1.h   | 14 +
 16 files changed, 249 insertions(+), 93 deletions(-)



Re: [PATCH] arm: dts: stm32mp15: alignment with v5.11-rc2

2021-02-09 Thread Patrick DELAUNAY

Hi,

On 1/11/21 12:33 PM, Patrick Delaunay wrote:

Device tree alignment with Linux kernel v5.11-rc2
- fix DCMI DMA features on stm32mp15 family
- Add alternate pinmux for FMC EBI bus
- Harmonize EHCI/OHCI DT nodes name on stm32mp15
- update sdmmc IP version for STM32MP15
- Add LP timer irqs on stm32mp151
- Add LP timer wakeup-source on stm32mp151
- enable HASH by default on stm32mp15
- enable CRC1 by default on stm32mp15
- enable CRYP by default on stm32mp15
- set bus-type in DCMI endpoint for stm32mp157c-ev1 board
- reorder spi4 within stm32mp15-pinctrl
- add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
- fix mdma1 clients channel priority level on stm32mp151
- fix dmamux reg property on stm32mp151
- adjust USB OTG gadget fifo sizes in stm32mp151
- update stm32mp151 for remote proc synchronization support
- support child mfd cells for the stm32mp1 TAMP syscon

Signed-off-by: Patrick Delaunay 
Signed-off-by: Patrick Delaunay 
---

  arch/arm/dts/stm32mp15-pinctrl.dtsi| 87 +-
  arch/arm/dts/stm32mp151.dtsi   | 48 +---
  arch/arm/dts/stm32mp153.dtsi   |  6 ++
  arch/arm/dts/stm32mp157c-dk2.dts   |  4 +
  arch/arm/dts/stm32mp157c-ed1.dts   | 27 +++
  arch/arm/dts/stm32mp157c-ev1.dts   |  1 +
  arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 55 --
  arch/arm/dts/stm32mp15xx-dkx.dtsi  | 47 ++--
  8 files changed, 200 insertions(+), 75 deletions(-)



Applied to u-boot-stm/master, thanks!

Regards

Patrick



Re: [PATCH u-boot-marvell 00/18] Upgrade A38x DDR3 training to version 14.0.0

2021-02-09 Thread Marek Behun
On Tue, 9 Feb 2021 06:50:35 +
Chris Packham  wrote:

> On 9/02/21 3:07 pm, Marek Behun wrote:
> > On Tue, 9 Feb 2021 01:08:54 +
> > Chris Packham  wrote:
> >  
> >> On 9/02/21 1:16 pm, Chris Packham wrote:  
> >>> On 9/02/21 9:18 am, Marek Behun wrote:  
>  On Mon, 8 Feb 2021 20:11:06 +
>  Chris Packham  wrote:
>  
> > Hi Marek,
> >
> > Do you have this in a repo I can pull from? I've got a couple of boards
> > I can give this a spin on.  
>  https://gitlab.nic.cz/turris/turris-omnia-uboot/
>  branch v2021.04-rc-mv-ddr-14.0.0
> 
>  also please test branch v2021.04-rc-mv-ddr-14.0.0-samsung-ddr-fix, that
>  one contains one more commit that is needed for Omnia with Samsung DDR
>  chips.  
> >>> I've tested the dm-88f6820-amc board. Training completed without
> >>> issue, as does memtester running from Linux.
> >>>
> >>> Hit a bit of a snag on the x530 because the changes pushed it over the
> >>> SPL size (it was already pretty close). I'll look to see if there's
> >>> anything I can drop out or maybe bump the SPL size (I never did get a
> >>> clear answer from Marvell as to what the size limit actually is).  
> >> I can temporarily work around the size issue by disabling watchdog
> >> support in SPL (I really don't want that to be the long term solution).
> >>
> >> But then I encounter an odd problem. When I "reset" the board gets
> >> through the DDR training but never makes it to u-boot proper, but if I
> >> power cycle it boots through to the u-boot prompt. This doesn't happen
> >> on the db-88f6820-amc board. One difference between the x530 and the amc
> >> board is that the x530 has ECC so maybe something is going into the
> >> weeds if ECC has already been enabled by a previous boot.
> >>  
> > Could you bisect which commit causes this?  
> Seems to be the last one (ddr: marvell: a38x: fix SPLIT_OUT_MIX state 
> decision) not entirely sure what the problem is. So I guess you can 
> consider the upstream update good, the fix SPLIT_OUT_MIX not so much it 
> happens to be the thing that causes the issue and the straw that tips 
> the build size over the limit.

BTW Chris if the first 18 patches are working for your devices, could
you please give Tested-by? Thanks.

Marek


[PATCH u-boot-dm + u-boot-spi v2 7/7] mtd: probe SPI NOR devices in mtd_probe_devices()

2021-02-09 Thread Marek Behún
In order for `mtd list` U-Boot command to list SPI NOR devices without
the need to run `sf probe` before, we have to probe SPI NOR devices in
mtd_probe_devices().

Signed-off-by: Marek Behún 
Cc: Jagan Teki 
Cc: Priyanka Jain 
Cc: Simon Glass 
Cc: Heiko Schocher 
Cc: Jagan Teki 
---
 drivers/mtd/mtd_uboot.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index 865e9ae4cb..4f5b2fd91d 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -114,6 +114,18 @@ static void mtd_probe_uclass_mtd_devs(void)
 static void mtd_probe_uclass_mtd_devs(void) { }
 #endif
 
+#if IS_ENABLED(CONFIG_DM_SPI_FLASH) && IS_ENABLED(CONFIG_SPI_FLASH_MTD)
+static void mtd_probe_uclass_spi_nor_devs(void)
+{
+   struct udevice *dev;
+
+   uclass_foreach_dev_probe(UCLASS_SPI_FLASH, dev)
+   ;
+}
+#else
+static void mtd_probe_uclass_spi_nor_devs(void) { }
+#endif
+
 #if defined(CONFIG_MTD_PARTITIONS)
 
 #define MTDPARTS_MAXLEN 512
@@ -309,6 +321,7 @@ int mtd_probe_devices(void)
struct mtd_info *mtd;
 
mtd_probe_uclass_mtd_devs();
+   mtd_probe_uclass_spi_nor_devs();
 
/*
 * Check if mtdparts/mtdids changed, if the MTD dev list was updated
@@ -369,6 +382,7 @@ int mtd_probe_devices(void)
 int mtd_probe_devices(void)
 {
mtd_probe_uclass_mtd_devs();
+   mtd_probe_uclass_spi_nor_devs();
 
return 0;
 }
-- 
2.26.2



[PATCH u-boot-dm + u-boot-spi v2 4/7] mtd: spi-nor: allow registering multiple MTDs when DM is enabled

2021-02-09 Thread Marek Behún
Currently when the SPI_FLASH_MTD config option is enabled, only one SPI
can be registered as MTD at any time - it is the last one probed (since
with old non-DM model only one SPI NOR could be probed at any time).

When DM is enabled, allow for registering multiple SPI NORs as MTDs by
utilizing the nor->mtd structure, which is filled in by spi_nor_scan
anyway, instead of filling a separate struct mtd_info.

Signed-off-by: Marek Behún 
Cc: Jagan Teki 
Cc: Priyanka Jain 
Cc: Simon Glass 
Cc: Heiko Schocher 
Cc: Jagan Teki 
---
 drivers/mtd/spi/sf_internal.h |  4 ++--
 drivers/mtd/spi/sf_mtd.c  | 18 +-
 drivers/mtd/spi/sf_probe.c|  6 --
 3 files changed, 23 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 9ceff0e7c1..865955124c 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -77,14 +77,14 @@ extern const struct flash_info spi_nor_ids[];
 
 #if CONFIG_IS_ENABLED(SPI_FLASH_MTD)
 int spi_flash_mtd_register(struct spi_flash *flash);
-void spi_flash_mtd_unregister(void);
+void spi_flash_mtd_unregister(struct spi_flash *flash);
 #else
 static inline int spi_flash_mtd_register(struct spi_flash *flash)
 {
return 0;
 }
 
-static inline void spi_flash_mtd_unregister(void)
+static inline void spi_flash_mtd_unregister(struct spi_flash *flash)
 {
 }
 #endif
diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c
index 987fac2501..94854fbfc4 100644
--- a/drivers/mtd/spi/sf_mtd.c
+++ b/drivers/mtd/spi/sf_mtd.c
@@ -10,6 +10,20 @@
 #include 
 #include 
 
+#if CONFIG_IS_ENABLED(DM_SPI_FLASH)
+
+int spi_flash_mtd_register(struct spi_flash *flash)
+{
+   return add_mtd_device(>mtd);
+}
+
+void spi_flash_mtd_unregister(struct spi_flash *flash)
+{
+   del_mtd_device(>mtd);
+}
+
+#else /* !CONFIG_IS_ENABLED(DM_SPI_FLASH) */
+
 static struct mtd_info sf_mtd_info;
 static bool sf_mtd_registered;
 static char sf_mtd_name[8];
@@ -123,7 +137,7 @@ int spi_flash_mtd_register(struct spi_flash *flash)
return ret;
 }
 
-void spi_flash_mtd_unregister(void)
+void spi_flash_mtd_unregister(struct spi_flash *flash)
 {
int ret;
 
@@ -146,3 +160,5 @@ void spi_flash_mtd_unregister(void)
printf("Failed to unregister MTD %s and the spi_flash object is going 
away: you're in deep trouble!",
   sf_mtd_info.name);
 }
+
+#endif /* !CONFIG_IS_ENABLED(DM_SPI_FLASH) */
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 6c87434867..3bf2ecd51a 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -84,7 +84,7 @@ struct spi_flash *spi_flash_probe(unsigned int busnum, 
unsigned int cs,
 void spi_flash_free(struct spi_flash *flash)
 {
if (CONFIG_IS_ENABLED(SPI_FLASH_MTD))
-   spi_flash_mtd_unregister();
+   spi_flash_mtd_unregister(flash);
 
spi_free_slave(flash->spi);
free(flash);
@@ -143,8 +143,10 @@ int spi_flash_std_probe(struct udevice *dev)
 
 static int spi_flash_std_remove(struct udevice *dev)
 {
+   struct spi_flash *flash = dev_get_uclass_priv(dev);
+
if (CONFIG_IS_ENABLED(SPI_FLASH_MTD))
-   spi_flash_mtd_unregister();
+   spi_flash_mtd_unregister(flash);
 
return 0;
 }
-- 
2.26.2



[PATCH u-boot-dm + u-boot-spi v2 3/7] mtd: add support for parsing partitions defined in OF

2021-02-09 Thread Marek Behún
Add support for parsing partitions defined in device-trees via the
`partitions` node with `fixed-partitions` compatible.

The `mtdparts`/`mtdids` mechanism takes precedence. If some partitions
are defined for a MTD device via this mechanism, the code won't register
partitions for that MTD device from OF, even if they are defined.

Signed-off-by: Marek Behún 
Cc: Simon Glass 
Cc: Heiko Schocher 
Cc: Jagan Teki 
---
 drivers/mtd/mtd_uboot.c | 106 +++-
 drivers/mtd/mtdpart.c   |  60 +++
 include/linux/mtd/mtd.h |   9 
 3 files changed, 131 insertions(+), 44 deletions(-)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index 9360d4ed17..7fb72eb1f4 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -197,53 +197,11 @@ static void mtd_del_all_parts(void)
} while (ret > 0);
 }
 
-int mtd_probe_devices(void)
+static int parse_mtdparts(const char *mtdparts, const char *mtdids)
 {
-   static char *old_mtdparts;
-   static char *old_mtdids;
-   const char *mtdparts = get_mtdparts();
-   const char *mtdids = get_mtdids();
-   const char *mtdparts_next = mtdparts;
+   const char *mtdparts_next;
struct mtd_info *mtd;
 
-   mtd_probe_uclass_mtd_devs();
-
-   /*
-* Check if mtdparts/mtdids changed, if the MTD dev list was updated
-* or if our previous attempt to delete existing partititions failed.
-* In any of these cases we want to update the partitions, otherwise,
-* everything is up-to-date and we can return 0 directly.
-*/
-   if ((!mtdparts && !old_mtdparts && !mtdids && !old_mtdids) ||
-   (mtdparts && old_mtdparts && mtdids && old_mtdids &&
-!mtd_dev_list_updated() && !mtd_del_all_parts_failed &&
-!strcmp(mtdparts, old_mtdparts) &&
-!strcmp(mtdids, old_mtdids)))
-   return 0;
-
-   /* Update the local copy of mtdparts */
-   free(old_mtdparts);
-   free(old_mtdids);
-   old_mtdparts = strdup(mtdparts);
-   old_mtdids = strdup(mtdids);
-
-   /*
-* Remove all old parts. Note that partition removal can fail in case
-* one of the partition is still being used by an MTD user, so this
-* does not guarantee that all old partitions are gone.
-*/
-   mtd_del_all_parts();
-
-   /*
-* Call mtd_dev_list_updated() to clear updates generated by our own
-* parts removal loop.
-*/
-   mtd_dev_list_updated();
-
-   /* If either mtdparts or mtdids is empty, then exit */
-   if (!mtdparts || !mtdids)
-   return 0;
-
/* Start the parsing by ignoring the extra 'mtdparts=' prefix, if any */
if (!strncmp(mtdparts, "mtdparts=", sizeof("mtdparts=") - 1))
mtdparts += 9;
@@ -342,6 +300,66 @@ int mtd_probe_devices(void)
put_mtd_device(mtd);
}
 
+   return 0;
+}
+
+int mtd_probe_devices(void)
+{
+   static char *old_mtdparts;
+   static char *old_mtdids;
+   const char *mtdparts = get_mtdparts();
+   const char *mtdids = get_mtdids();
+   struct mtd_info *mtd;
+
+   mtd_probe_uclass_mtd_devs();
+
+   /*
+* Check if mtdparts/mtdids changed, if the MTD dev list was updated
+* or if our previous attempt to delete existing partititions failed.
+* In any of these cases we want to update the partitions, otherwise,
+* everything is up-to-date and we can return 0 directly.
+*/
+   if ((!mtdparts && !old_mtdparts && !mtdids && !old_mtdids) ||
+   (mtdparts && old_mtdparts && mtdids && old_mtdids &&
+!mtd_dev_list_updated() && !mtd_del_all_parts_failed &&
+!strcmp(mtdparts, old_mtdparts) &&
+!strcmp(mtdids, old_mtdids)))
+   return 0;
+
+   /* Update the local copy of mtdparts */
+   free(old_mtdparts);
+   free(old_mtdids);
+   old_mtdparts = strdup(mtdparts);
+   old_mtdids = strdup(mtdids);
+
+   /*
+* Remove all old parts. Note that partition removal can fail in case
+* one of the partition is still being used by an MTD user, so this
+* does not guarantee that all old partitions are gone.
+*/
+   mtd_del_all_parts();
+
+   /*
+* Call mtd_dev_list_updated() to clear updates generated by our own
+* parts removal loop.
+*/
+   mtd_dev_list_updated();
+
+   /* If both mtdparts and mtdids are non-empty, parse */
+   if (mtdparts && mtdids) {
+   if (parse_mtdparts(mtdparts, mtdids) < 0)
+   printf("Failed parsing MTD partitions from 
mtdparts!\n");
+   }
+
+   /* Fallback to OF partitions */
+   mtd_for_each_device(mtd) {
+   if (list_empty(>partitions)) {
+   if (add_mtd_partitions_of(mtd) < 0)
+   printf("Failed parsing 

[PATCH u-boot-dm + u-boot-spi v2 6/7] mtd: remove mtd_probe function

2021-02-09 Thread Marek Behún
The device_probe() function does the same thing as mtd_probe() and
mtd_probe() is only used in mtd_probe_uclass_mtd_devs(), where the
probing can be made simpler by using uclass_foreach_dev_probe macro.

Signed-off-by: Marek Behún 
Cc: Jagan Teki 
Cc: Priyanka Jain 
Cc: Simon Glass 
Cc: Heiko Schocher 
Cc: Jagan Teki 
---
 drivers/mtd/mtd-uclass.c | 15 ---
 drivers/mtd/mtd_uboot.c  |  9 +++--
 include/mtd.h|  1 -
 3 files changed, 3 insertions(+), 22 deletions(-)

diff --git a/drivers/mtd/mtd-uclass.c b/drivers/mtd/mtd-uclass.c
index 9f5f672ba3..4ab84de553 100644
--- a/drivers/mtd/mtd-uclass.c
+++ b/drivers/mtd/mtd-uclass.c
@@ -9,21 +9,6 @@
 #include 
 #include 
 
-/**
- * mtd_probe - Probe the device @dev if not already done
- *
- * @dev: U-Boot device to probe
- *
- * @return 0 on success, an error otherwise.
- */
-int mtd_probe(struct udevice *dev)
-{
-   if (device_active(dev))
-   return 0;
-
-   return device_probe(dev);
-}
-
 /*
  * Implement a MTD uclass which should include most flash drivers.
  * The uclass private is pointed to mtd_info.
diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index 7fb72eb1f4..865e9ae4cb 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -105,13 +106,9 @@ int mtd_search_alternate_name(const char *mtdname, char 
*altname,
 static void mtd_probe_uclass_mtd_devs(void)
 {
struct udevice *dev;
-   int idx = 0;
 
-   /* Probe devices with DM compliant drivers */
-   while (!uclass_find_device(UCLASS_MTD, idx, ) && dev) {
-   mtd_probe(dev);
-   idx++;
-   }
+   uclass_foreach_dev_probe(UCLASS_MTD, dev)
+   ;
 }
 #else
 static void mtd_probe_uclass_mtd_devs(void) { }
diff --git a/include/mtd.h b/include/mtd.h
index b0f8693386..b569331edb 100644
--- a/include/mtd.h
+++ b/include/mtd.h
@@ -8,7 +8,6 @@
 
 #include 
 
-int mtd_probe(struct udevice *dev);
 int mtd_probe_devices(void);
 
 void board_mtdparts_default(const char **mtdids, const char **mtdparts);
-- 
2.26.2



[PATCH u-boot-dm + u-boot-spi v2 2/7] dm: core: add non-translating version of ofnode_get_addr_size_index()

2021-02-09 Thread Marek Behún
Add functions ofnode_get_addr_size_index_notrans(), which is a
non-translating version of ofnode_get_addr_size_index().

Some addresses are not meant to be translated, for example those of MTD
fixed-partitions.

Signed-off-by: Marek Behún 
Cc: Dario Binacchi 
Cc: Simon Glass 
---
 drivers/core/ofnode.c | 19 ---
 include/dm/ofnode.h   | 17 +
 test/dm/ofnode.c  |  6 ++
 3 files changed, 39 insertions(+), 3 deletions(-)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 7a5f4c0a73..88266e2641 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -298,7 +298,8 @@ ofnode ofnode_get_by_phandle(uint phandle)
return node;
 }
 
-fdt_addr_t ofnode_get_addr_size_index(ofnode node, int index, fdt_size_t *size)
+static fdt_addr_t __ofnode_get_addr_size_index(ofnode node, int index,
+  fdt_size_t *size, bool translate)
 {
int na, ns;
 
@@ -316,7 +317,7 @@ fdt_addr_t ofnode_get_addr_size_index(ofnode node, int 
index, fdt_size_t *size)
 
ns = of_n_size_cells(ofnode_to_np(node));
 
-   if (IS_ENABLED(CONFIG_OF_TRANSLATE) &&
+   if (translate && IS_ENABLED(CONFIG_OF_TRANSLATE) &&
(ns > 0 || gd_size_cells_0())) {
return of_translate_address(ofnode_to_np(node), 
prop_val);
} else {
@@ -328,12 +329,24 @@ fdt_addr_t ofnode_get_addr_size_index(ofnode node, int 
index, fdt_size_t *size)
ns = ofnode_read_simple_size_cells(ofnode_get_parent(node));
return fdtdec_get_addr_size_fixed(gd->fdt_blob,
  ofnode_to_offset(node), "reg",
- index, na, ns, size, true);
+ index, na, ns, size,
+ translate);
}
 
return FDT_ADDR_T_NONE;
 }
 
+fdt_addr_t ofnode_get_addr_size_index(ofnode node, int index, fdt_size_t *size)
+{
+   return __ofnode_get_addr_size_index(node, index, size, true);
+}
+
+fdt_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,
+ fdt_size_t *size)
+{
+   return __ofnode_get_addr_size_index(node, index, size, false);
+}
+
 fdt_addr_t ofnode_get_addr_index(ofnode node, int index)
 {
fdt_size_t size;
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 5b088650d3..6ab6fc5586 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -487,6 +487,23 @@ int ofnode_read_size(ofnode node, const char *propname);
 phys_addr_t ofnode_get_addr_size_index(ofnode node, int index,
   fdt_size_t *size);
 
+/**
+ * ofnode_get_addr_size_index_notrans() - get an address/size from a node
+ *   based on index, without address
+ *   translation
+ *
+ * This reads the register address/size from a node based on index.
+ * The resulting address is not translated. Useful for example for on-disk
+ * addresses.
+ *
+ * @node: node to read from
+ * @index: Index of address to read (0 for first)
+ * @size: Pointer to size of the address
+ * @return address, or FDT_ADDR_T_NONE if not present or invalid
+ */
+phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,
+  fdt_size_t *size);
+
 /**
  * ofnode_get_addr_index() - get an address from a node
  *
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 0e1eb0d7ea..48c121df25 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -281,6 +281,12 @@ static int dm_test_ofnode_get_addr_size(struct 
unit_test_state *uts)
ut_asserteq_64(0x9000, addr);
ut_asserteq_64(0x1000, size);
 
+   node = ofnode_path("/translation-test@8000/noxlatebus@3,300/dev@42");
+   ut_assert(ofnode_valid(node));
+
+   addr = ofnode_get_addr_size_index_notrans(node, 0, );
+   ut_asserteq_64(0x42, addr);
+
return 0;
 }
 DM_TEST(dm_test_ofnode_get_addr_size, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
-- 
2.26.2



[PATCH u-boot-dm + u-boot-spi v2 5/7] mtd: spi-nor: fill-in mtd->dev member

2021-02-09 Thread Marek Behún
Fill in mtd->dev member with nor->dev.

This can be used by MTD OF partition parser.

Signed-off-by: Marek Behún 
Cc: Jagan Teki 
Cc: Priyanka Jain 
Cc: Simon Glass 
Cc: Heiko Schocher 
Cc: Jagan Teki 
---
 drivers/mtd/spi/sf_mtd.c   | 1 +
 drivers/mtd/spi/spi-nor-core.c | 1 +
 drivers/mtd/spi/spi-nor-tiny.c | 1 +
 3 files changed, 3 insertions(+)

diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c
index 94854fbfc4..04de868080 100644
--- a/drivers/mtd/spi/sf_mtd.c
+++ b/drivers/mtd/spi/sf_mtd.c
@@ -125,6 +125,7 @@ int spi_flash_mtd_register(struct spi_flash *flash)
 
sf_mtd_info.size = flash->size;
sf_mtd_info.priv = flash;
+   sf_mtd_info.dev = flash->dev;
 
/* Only uniform flash devices for now */
sf_mtd_info.numeraseregions = 0;
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index ef426dac02..57b7fa3b37 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -2532,6 +2532,7 @@ int spi_nor_scan(struct spi_nor *nor)
 
if (!mtd->name)
mtd->name = info->name;
+   mtd->dev = nor->dev;
mtd->priv = nor;
mtd->type = MTD_NORFLASH;
mtd->writesize = 1;
diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c
index 07c8c7b82b..80cc091469 100644
--- a/drivers/mtd/spi/spi-nor-tiny.c
+++ b/drivers/mtd/spi/spi-nor-tiny.c
@@ -751,6 +751,7 @@ int spi_nor_scan(struct spi_nor *nor)
return ret;
 
mtd->name = "spi-flash";
+   mtd->dev = nor->dev;
mtd->priv = nor;
mtd->type = MTD_NORFLASH;
mtd->writesize = 1;
-- 
2.26.2



[PATCH u-boot-dm + u-boot-spi v2 0/7] Support SPI NORs and OF partitions in `mtd list`

2021-02-09 Thread Marek Behún
Hello,

this is v2 of patchset that adds support for U-Boot to parse MTD
partitions from device-tree, and also improves support for SPI NOR
access via the `mtd` command.

Since mtd subsystem is unmaintained, who shall apply the mtd patches?
I put an u-boot-spi tag into the subject prefix, but am not sure if
this is correct.

Changes since v1:
- added tests of ofnode_get_addr_size_index() and
  ofnode_get_addr_size_index_notrans() as requested by Simon
- the last patch now probes SPI NORs in both versions of
  mtd_probe_devices(), that is when MTDPARTS is enabled or disabled

Marek

Marek Behún (7):
  dm: core: add test for ofnode_get_addr_size_index()
  dm: core: add non-translating version of ofnode_get_addr_size_index()
  mtd: add support for parsing partitions defined in OF
  mtd: spi-nor: allow registering multiple MTDs when DM is enabled
  mtd: spi-nor: fill-in mtd->dev member
  mtd: remove mtd_probe function
  mtd: probe SPI NOR devices in mtd_probe_devices()

 drivers/core/ofnode.c  |  19 -
 drivers/mtd/mtd-uclass.c   |  15 
 drivers/mtd/mtd_uboot.c| 129 -
 drivers/mtd/mtdpart.c  |  60 +++
 drivers/mtd/spi/sf_internal.h  |   4 +-
 drivers/mtd/spi/sf_mtd.c   |  19 -
 drivers/mtd/spi/sf_probe.c |   6 +-
 drivers/mtd/spi/spi-nor-core.c |   1 +
 drivers/mtd/spi/spi-nor-tiny.c |   1 +
 include/dm/ofnode.h|  17 +
 include/linux/mtd/mtd.h|   9 +++
 include/mtd.h  |   1 -
 test/dm/ofnode.c   |  29 
 13 files changed, 236 insertions(+), 74 deletions(-)

-- 
2.26.2



[PATCH u-boot-dm + u-boot-spi v2 1/7] dm: core: add test for ofnode_get_addr_size_index()

2021-02-09 Thread Marek Behún
Add test for ofnode_get_addr_size_index(), which will test OF address
translation.

Signed-off-by: Marek Behún 
Cc: Simon Glass 
---
 test/dm/ofnode.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index c539134296..0e1eb0d7ea 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -261,3 +261,26 @@ static int dm_test_ofnode_is_enabled(struct 
unit_test_state *uts)
return 0;
 }
 DM_TEST(dm_test_ofnode_is_enabled, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
+static int dm_test_ofnode_get_addr_size(struct unit_test_state *uts)
+{
+   fdt_addr_t addr, size;
+   ofnode node;
+
+   node = ofnode_path("/translation-test@8000/dev@0,0");
+   ut_assert(ofnode_valid(node));
+
+   addr = ofnode_get_addr_size_index(node, 0, );
+   ut_asserteq_64(0x8000, addr);
+   ut_asserteq_64(0x1000, size);
+
+   node = ofnode_path("/translation-test@8000/dev@1,100");
+   ut_assert(ofnode_valid(node));
+
+   addr = ofnode_get_addr_size_index(node, 0, );
+   ut_asserteq_64(0x9000, addr);
+   ut_asserteq_64(0x1000, size);
+
+   return 0;
+}
+DM_TEST(dm_test_ofnode_get_addr_size, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
-- 
2.26.2



Re: [RFC PATCH] efi_loader: disable GRUB workaround by default

2021-02-09 Thread Matthias Brugger



On 09/02/2021 13:22, Heinrich Schuchardt wrote:
> On 09.02.21 12:38, matthias@kernel.org wrote:
>> From: Matthias Brugger 
>>
>> GRUB version 2.04 was published over a year ago. We should expect that
>> distros use this version now. So disable the workaround by default.
>> As we know that i.MX6 CPUs lack proper handling of caches, enable the
>> workaround on these only.
> 
> Hello Matthias,
> 
> Where did the current setting hurt?
> 

I hit this on BananaPi R2 where the time from exiting the boot services until
the kernel gets loaded was three times bigger with the workaround. Similar
numbers, ~40 down to 12 seconds.

> Did you really check all 32bit ARM defconfig?

No I didn't, that's why I send it as RFC. If you think this is a can of worms we
would open, then I just disable the workaround for these two defconfigs.

Regards,
Matthias

> Which other devices have caches that are not controlled by CP15?
> How about all non-i.mx6 devices using CONFIG_SYS_L2_PL310?
> 
> Best regards
> 
> Heinrich
> 
>>
>> Signed-off-by: Matthias Brugger 
>>
>> ---
>>
>>  configs/imx6dl_icore_nand_defconfig  | 1 +
>>  configs/imx6dl_mamoj_defconfig   | 1 +
>>  configs/imx6q_icore_nand_defconfig   | 1 +
>>  configs/imx6q_logic_defconfig| 1 +
>>  configs/imx6qdl_icore_mipi_defconfig | 1 +
>>  configs/imx6qdl_icore_mmc_defconfig  | 1 +
>>  configs/imx6qdl_icore_nand_defconfig | 1 +
>>  configs/imx6qdl_icore_rqs_defconfig  | 1 +
>>  configs/imx6ul_geam_mmc_defconfig| 1 +
>>  configs/imx6ul_geam_nand_defconfig   | 1 +
>>  configs/imx6ul_isiot_emmc_defconfig  | 1 +
>>  configs/imx6ul_isiot_nand_defconfig  | 1 +
>>  lib/efi_loader/Kconfig   | 2 +-
>>  13 files changed, 13 insertions(+), 1 deletion(-)
>>
>> diff --git a/configs/imx6dl_icore_nand_defconfig 
>> b/configs/imx6dl_icore_nand_defconfig
>> index 06005c4288..44fbbe6bd1 100644
>> --- a/configs/imx6dl_icore_nand_defconfig
>> +++ b/configs/imx6dl_icore_nand_defconfig
>> @@ -68,3 +68,4 @@ CONFIG_SPLASH_SCREEN=y
>>  CONFIG_SPLASH_SCREEN_ALIGN=y
>>  CONFIG_VIDEO_BMP_RLE8=y
>>  CONFIG_BMP_16BPP=y
>> +CONFIG_EFI_GRUB_ARM32_WORKAROUND=y
>> diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig
>> index fa2adaf47d..7ebbb5830b 100644
>> --- a/configs/imx6dl_mamoj_defconfig
>> +++ b/configs/imx6dl_mamoj_defconfig
>> @@ -57,3 +57,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL"
>>  CONFIG_USB_GADGET_VENDOR_NUM=0x0525
>>  CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
>>  CONFIG_CI_UDC=y
>> +CONFIG_EFI_GRUB_ARM32_WORKAROUND=y
>> diff --git a/configs/imx6q_icore_nand_defconfig 
>> b/configs/imx6q_icore_nand_defconfig
>> index f38b06dab9..cef5f3448d 100644
>> --- a/configs/imx6q_icore_nand_defconfig
>> +++ b/configs/imx6q_icore_nand_defconfig
>> @@ -69,3 +69,4 @@ CONFIG_SPLASH_SCREEN=y
>>  CONFIG_SPLASH_SCREEN_ALIGN=y
>>  CONFIG_VIDEO_BMP_RLE8=y
>>  CONFIG_BMP_16BPP=y
>> +CONFIG_EFI_GRUB_ARM32_WORKAROUND=y
>> diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
>> index 36dc24d080..b5a4d3d24d 100644
>> --- a/configs/imx6q_logic_defconfig
>> +++ b/configs/imx6q_logic_defconfig
>> @@ -103,3 +103,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
>>  CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
>>  CONFIG_CI_UDC=y
>>  CONFIG_USB_GADGET_DOWNLOAD=y
>> +CONFIG_EFI_GRUB_ARM32_WORKAROUND=y
>> diff --git a/configs/imx6qdl_icore_mipi_defconfig 
>> b/configs/imx6qdl_icore_mipi_defconfig
>> index f1b5389470..1d9e021844 100644
>> --- a/configs/imx6qdl_icore_mipi_defconfig
>> +++ b/configs/imx6qdl_icore_mipi_defconfig
>> @@ -63,3 +63,4 @@ CONFIG_PINCTRL=y
>>  CONFIG_PINCTRL_IMX6=y
>>  CONFIG_MXC_UART=y
>>  CONFIG_IMX_THERMAL=y
>> +CONFIG_EFI_GRUB_ARM32_WORKAROUND=y
>> diff --git a/configs/imx6qdl_icore_mmc_defconfig 
>> b/configs/imx6qdl_icore_mmc_defconfig
>> index a32ae6a75d..b46d19ad88 100644
>> --- a/configs/imx6qdl_icore_mmc_defconfig
>> +++ b/configs/imx6qdl_icore_mmc_defconfig
>> @@ -86,3 +86,4 @@ CONFIG_SPLASH_SCREEN_ALIGN=y
>>  CONFIG_VIDEO_BMP_RLE8=y
>>  CONFIG_BMP_16BPP=y
>>  CONFIG_IMX_WATCHDOG=y
>> +CONFIG_EFI_GRUB_ARM32_WORKAROUND=y
>> diff --git a/configs/imx6qdl_icore_nand_defconfig 
>> b/configs/imx6qdl_icore_nand_defconfig
>> index f38b06dab9..cef5f3448d 100644
>> --- a/configs/imx6qdl_icore_nand_defconfig
>> +++ b/configs/imx6qdl_icore_nand_defconfig
>> @@ -69,3 +69,4 @@ CONFIG_SPLASH_SCREEN=y
>>  CONFIG_SPLASH_SCREEN_ALIGN=y
>>  CONFIG_VIDEO_BMP_RLE8=y
>>  CONFIG_BMP_16BPP=y
>> +CONFIG_EFI_GRUB_ARM32_WORKAROUND=y
>> diff --git a/configs/imx6qdl_icore_rqs_defconfig 
>> b/configs/imx6qdl_icore_rqs_defconfig
>> index 34e3250f95..db439255a5 100644
>> --- a/configs/imx6qdl_icore_rqs_defconfig
>> +++ b/configs/imx6qdl_icore_rqs_defconfig
>> @@ -60,3 +60,4 @@ CONFIG_MII=y
>>  CONFIG_PINCTRL=y
>>  CONFIG_PINCTRL_IMX6=y
>>  CONFIG_MXC_UART=y
>> +CONFIG_EFI_GRUB_ARM32_WORKAROUND=y
>> diff --git a/configs/imx6ul_geam_mmc_defconfig 
>> b/configs/imx6ul_geam_mmc_defconfig
>> index 4b47e196f3..ae83d35a53 100644
>> --- a/configs/imx6ul_geam_mmc_defconfig

[PATCH 6/8] rockchip: rk3368: sync main rk3368 dtsi from Linux

2021-02-09 Thread Heiko Stuebner
From: Heiko Stuebner 

This is the state as of v5.10 + the recently added timer0 phandle
targetted at the 5.12 merge window.

With this the non-mainline nodes like the dmc move to a separate
rk3368-u-boot.dtsi that is included from the board-specific
-u-boot.dtsi files, similar to how rk3399 does this.

Signed-off-by: Heiko Stuebner 
---
 arch/arm/dts/rk3368-geekbox-u-boot.dtsi |   2 +
 arch/arm/dts/rk3368-lion-u-boot.dtsi|   2 +
 arch/arm/dts/rk3368-px5-evb-u-boot.dtsi |   3 +
 arch/arm/dts/rk3368-sheep-u-boot.dtsi   |   2 +
 arch/arm/dts/rk3368-u-boot.dtsi |  27 ++
 arch/arm/dts/rk3368.dtsi| 578 ++--
 6 files changed, 383 insertions(+), 231 deletions(-)
 create mode 100644 arch/arm/dts/rk3368-u-boot.dtsi

diff --git a/arch/arm/dts/rk3368-geekbox-u-boot.dtsi 
b/arch/arm/dts/rk3368-geekbox-u-boot.dtsi
index 30ea9e433a..0b724fa45f 100644
--- a/arch/arm/dts/rk3368-geekbox-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-geekbox-u-boot.dtsi
@@ -3,6 +3,8 @@
  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  */
 
+#include "rk3368-u-boot.dtsi"
+
  {
u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi 
b/arch/arm/dts/rk3368-lion-u-boot.dtsi
index 6d54214de9..9bd6352755 100644
--- a/arch/arm/dts/rk3368-lion-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-lion-u-boot.dtsi
@@ -3,6 +3,8 @@
  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  */
 
+#include "rk3368-u-boot.dtsi"
+
 / {
config {
u-boot,spl-payload-offset = <0x4>; /* @ 256KB */
diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi 
b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
index 936ce55727..264fb7adf0 100644
--- a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
@@ -2,6 +2,9 @@
 /*
  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  */
+
+#include "rk3368-u-boot.dtsi"
+
 / {
chosen {
u-boot,spl-boot-order = 
diff --git a/arch/arm/dts/rk3368-sheep-u-boot.dtsi 
b/arch/arm/dts/rk3368-sheep-u-boot.dtsi
index 30ea9e433a..0b724fa45f 100644
--- a/arch/arm/dts/rk3368-sheep-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-sheep-u-boot.dtsi
@@ -3,6 +3,8 @@
  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  */
 
+#include "rk3368-u-boot.dtsi"
+
  {
u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
new file mode 100644
index 00..2767c2678d
--- /dev/null
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ */
+
+#include 
+
+/ {
+   dmc: dmc@ff61 {
+   compatible = "rockchip,rk3368-dmc", "syscon";
+   rockchip,cru = <>;
+   rockchip,grf = <>;
+   rockchip,msch = <_msch>;
+   reg = <0 0xff61 0 0x400
+  0 0xff62 0 0x400>;
+   };
+
+   service_msch: syscon@ffac {
+   compatible = "rockchip,rk3368-msch", "syscon";
+   reg = <0x0 0xffac 0x0 0x2000>;
+   };
+
+   sgrf: syscon@ff74 {
+   compatible = "rockchip,rk3368-sgrf", "syscon";
+   reg = <0x0 0xff74 0x0 0x1000>;
+   };
+};
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index b4f4f6139d..cd2c322071 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -1,43 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Copyright (c) 2015 Heiko Stuebner 
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * 

[PATCH 8/8] rockchip: lion: update board defconfig

2021-02-09 Thread Heiko Stuebner
From: Heiko Stuebner 

Adds the needed target option and drivers needed for correct
bringup.

Signed-off-by: Heiko Stuebner 
---
 configs/lion-rk3368_defconfig | 16 ++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index f547875dee..6d6b73d977 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -9,6 +9,7 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_LION_RK3368=y
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xFF18
 CONFIG_DEBUG_UART_CLOCK=2400
@@ -39,6 +40,8 @@ CONFIG_TPL=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
 CONFIG_CMD_BOOTSTAGE=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_MTDPARTS=y
@@ -62,14 +65,15 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_PHY_MSCC=y
 CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_GMAC_ROCKCHIP=y
@@ -78,6 +82,7 @@ CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
@@ -88,6 +93,13 @@ CONFIG_ROCKCHIP_SPI=y
 CONFIG_SYSINFO=y
 CONFIG_SYSINFO_SMBIOS=y
 CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
-- 
2.29.2



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