Re: [PATCH v3 01/10] common: spl: spl: Init DRAM size in R5/A53 SPL
On Jul 05, 2024 at 10:20:21 +0530, Chintan Vankar wrote:
> Initialize DRAM size in SPL stage since networking requires DDR
> to be initialized.
>
> Signed-off-by: Kishon Vijay Abraham I
> Signed-off-by: Chintan Vankar
> ---
>
Reviewed-by: Dhruva Gole
Best regards,
Dhruva
> Link to v2:
> https://lore.kernel.org/r/20240425120822.2048012-2-c-van...@ti.com/
>
> Changes from v2 to v3:
> - No changes.
>
> common/spl/spl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/common/spl/spl.c b/common/spl/spl.c
> index 7794ddccad..5914eb8205 100644
> --- a/common/spl/spl.c
> +++ b/common/spl/spl.c
> @@ -720,7 +720,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
> initr_watchdog();
>
> if (IS_ENABLED(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF) ||
> - IS_ENABLED(CONFIG_SPL_ATF))
> + IS_ENABLED(CONFIG_SPL_ATF) || IS_ENABLED(CONFIG_SPL_NET))
> dram_init_banksize();
>
> if (CONFIG_IS_ENABLED(PCI) && !(gd->flags & GD_FLG_DM_DEAD)) {
> --
> 2.34.1
>
Re: [PATCH 8/9] board: phytec: phycore_am62x: Use k3_mmc.env logic
On Jul 02, 2024 at 22:42:01 -0700, Daniel Schultz wrote: > Use our common environment file to implement MMC boot. > > Signed-off-by: Daniel Schultz > --- Reviewed-by: Dhruva Gole > board/phytec/phycore_am62x/phycore_am62x.env | 11 +-- > 1 file changed, 1 insertion(+), 10 deletions(-) [...] -- Best regards, Dhruva
回复: [PATCH v2 0/7] Add Starfive JH7110 Cadence USB driver
>
> On Thu, Jul 4, 2024 at 6:25 AM Heinrich Schuchardt
> wrote:
> >
> > On 7/4/24 07:50, Minda Chen wrote:
> > > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > > So the codes can be used in visionfive2 and star64 7110 board.
> > >
> > > The driver is almost the same with kernel driver.
> > >
> > > Test with Star64 JH7110 board USB 3.0 + USB 2.0 host.
> > > The code can work.
> > >
> > > - Star64 using USB 3.0 and USB 2.0 host must add below board dts setting.
> >
> > Does this mean a future patch for spl_fdt_fixup_star64() is needed?
>
> As said by Hal they will be introducing a patchset to OF_UPSTREAM the
> JH7110 board support so we should pursue that first to get dts upstream
> (Linux?)
> aligned with U-Boot.
>
> >
> > Did you also have a look at the USB on the Milk V Mars CM?
>
> With Minda's advice for Star64 applied to jh7110-starfive-visionfive-2.dtsi
> directly as a test on Milk-V Mars CM
> Lite:
>
> StarFive # usb info
> 1: Hub, USB Revision 3.0
> - U-Boot XHCI Host Controller
> - Class: Hub
> - PacketSize: 512 Configurations: 1
> - Vendor: 0x Product 0x Version 1.0
>Configuration: 1
>- Interfaces: 1 Self Powered 0mA
> Interface: 0
> - Alternate Setting 0, Endpoints: 1
> - Class Hub
> - Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms
>
> >
> > Best regards
> >
> > Heinrich
> >
> > >
> > > 1. usb pin setting
> > > usb_pins: usb0-0 {
> > > driver-vbus-pin {
> > > pinmux = GPOUT_SYS_USB_DRIVE_VBUS,
> > > GPOEN_ENABLE,
> > > GPI_NONE)>;
> > > bias-disable;
> > > input-disable;
> > > input-schmitt-disable;
> > > slew-rate = <0>;
> > > };
> > > };
> > >
> > > 2. related dts node setting.
> > > {
> > > status = "disabled";
> > > };
> > >
> > > {
> > > starfive,sys-syscon = <_syscon 0x18>;
> > > starfive,stg-syscon = <_syscon 0x148 0x1f4>;
> > > status = "okay";
> > > };
>
> Question I have is: Where is the documentation for these "magical"
> numbers 0x18 00x148 0x1f4 ? Is this a defined constant, or else where is
> this in
> the Technical Reference Manual?
>
This is USB 3.0 configuration. 0x18 0x148 and 0x1f4 is register offset.
MilkV CM is USB 2.0 host. It is not needed.
And I don't know whether Vbus pin is GPIO25 in CM board. If not, I think
Just set dr mode to host is OK in Milk-V CM board.
> > >
> > > {
> > > pinctrl-names = "default";
> > > pinctrl-0 = <_pins>;
> > > status = "okay";
> > > };
> > >
> > > _cdns3 {
> > > phys = <>, <>;
> > > phy-names = "cdns3,usb2-phy", "cdns3,usb3-phy";
> > > dr_mode = "host";
> > > status = "okay";
> > > };
> > >
> > > - previous version
> > >v1:
> > > https://patchwork.ozlabs.org/project/uboot/cover/20240504150358.1960
> > > 0-1-minda.c...@starfivetech.com/
> > >
> > > - patch description.
> > >
> > > patch1: Add set phy mode function in cdns3 core driver
> > > which is used by Starfive JH7110.
> > > patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
> > > patch4: Cadence USB wrapper driver.
> > > patch5: Add JH7110 USB default overcurrent pin.
> > > patch6-8 dts, config and maintainers update.
> > >
> > > - change:
> > > v2:
> > > - patch 1 Move the added code to cdns3_core_init_role(). Must
> > > set PHY mode before calling cdns3 role start function.
> > > - patch 1-4 correct the code format.(follow Marek's comments.)
> > > - patch 2 Add set 125M clock in PHY init function.
> > > - Add new patch5.
> > >
> > > Minda Chen (8):
> > >usb: cdns3: Set USB PHY mode in cdns3_core_init_role()
> > >phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
> > >phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
> > >usb: cdns: starfive: Add cdns USB driver
> > >pinctrl: starfive: Setup USB default disable overcurrent pin
> > >configs: starfive: Add visionfive2 cadence USB configuration
> > >dts: starfive: Add JH7110 Cadence USB dts node
> > >MAINTAINERS: Update Starfive visionfive2 maintain files.
> > >
> > > .../dts/jh7110-starfive-visionfive-2.dtsi | 5 +
> > > arch/riscv/dts/jh7110.dtsi| 52 +
> > > board/starfive/visionfive2/MAINTAINERS| 2 +
> > > configs/starfive_visionfive2_defconfig| 9 +
> > > drivers/phy/Kconfig | 1 +
> > > drivers/phy/Makefile | 1 +
> > > drivers/phy/starfive/Kconfig | 21 ++
> > > drivers/phy/starfive/Makefile | 7 +
> > > drivers/phy/starfive/phy-jh7110-pcie.c| 202
> ++
> > > drivers/phy/starfive/phy-jh7110-usb2.c| 135
> > > drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 11 +-
> > >
Re: [PATCH 0/3] rockchip: enable PCIe/NVMe support for Theobroma RK3588 devices
Hi Quentin, On Thu, 4 Jul 2024 at 18:23, Quentin Schulz wrote: > > Jaguar has an M.2 M-KEY slot for NVMes and Tiger exposes the signals to > the Q7 connector which is then routed on the Haikou devkit's `PCI > Express` connector. With the help of a PCIe to NVMe adapter, NVMes can > be used on Tiger Haikou as well. > > Signed-off-by: Quentin Schulz > --- > Heiko Stuebner (1): > arm64: dts: rockchip: add PCIe3 support on rk3588-jaguar > Feels really nice to see subtree cherry picking in action here. > Quentin Schulz (2): > rockchip: jaguar-rk3588: add PCIe M.2 M-KEY NVMe support > rockchip: tiger-rk3588: add PCIe support > > configs/jaguar-rk3588_defconfig | 5 ++ > configs/tiger-rk3588_defconfig| 4 ++ > dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts | 59 > +++ > 3 files changed, 68 insertions(+) FWIW, for the series: Acked-by: Sumit Garg -Sumit > --- > base-commit: 0f073e022ddc5070e5df1d053e4bdc1874fbcc0f > change-id: 20240704-tsd-rk3588-nvme-aa133c24cb9e > > Best regards, > -- > Quentin Schulz >
[PATCH v3 09/10] arm: dts: k3-am625-r5-sk: Enable DM services for main_pktdma
From: Siddharth Vadapalli
Enable DM services for main_pktdma during R5 SPL stage.
Signed-off-by: Siddharth Vadapalli
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-10-c-van...@ti.com/
Changes from v2 to v3:
- No changes.
arch/arm/dts/k3-am625-r5-sk.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
index 6b9f40e555..0912b953db 100644
--- a/arch/arm/dts/k3-am625-r5-sk.dts
+++ b/arch/arm/dts/k3-am625-r5-sk.dts
@@ -83,3 +83,8 @@
reg = <0x00 0x0fc4 0x00 0x100>,
<0x00 0x6000 0x00 0x0800>;
};
+
+_pktdma {
+ ti,sci = <_tifs>;
+ bootph-all;
+};
--
2.34.1
[PATCH v3 10/10] arch: arm: dts: k3-am62-sk-u-boot: Add missing "bootph-all" property to phy_gmii_sel node
Add "bootph-all" property to CPSW MAC's PHY node phy_gmii_sel.
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-11-c-van...@ti.com/
Changes from v2 to v3:
- Since "phy_gmii_sel" with "bootph-all" property is merged at upstream
Linux for am62x-sk-common with commit "ba50141137fa", this patch can be
drop with next DT-Sync.
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 1fc0d407cb..18412688bb 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -12,6 +12,10 @@
};
};
+_gmii_sel {
+ bootph-all;
+};
+
_timer0 {
clock-frequency = <2500>;
};
--
2.34.1
[PATCH v3 08/10] configs: am62: Enable configs required for Ethboot
From: Kishon Vijay Abraham I Enable config options needed to support Ethernet boot on AM62x SK. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar --- Link to v2: https://lore.kernel.org/r/20240425120822.2048012-9-c-van...@ti.com/ Changes from v2 to v3: - No changes. configs/am62x_evm_a53_ethboot_defconfig | 12 1 file changed, 12 insertions(+) create mode 100644 configs/am62x_evm_a53_ethboot_defconfig diff --git a/configs/am62x_evm_a53_ethboot_defconfig b/configs/am62x_evm_a53_ethboot_defconfig new file mode 100644 index 00..1f9ad63571 --- /dev/null +++ b/configs/am62x_evm_a53_ethboot_defconfig @@ -0,0 +1,12 @@ +#include + +CONFIG_SPL_STACK_R_ADDR=0x8300 +CONFIG_SPL_SIZE_LIMIT=0x8 +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_ETH=y +CONFIG_SPL_NET=y +CONFIG_SPL_NET_VCI_STRING="AM62X U-Boot A53 SPL" +CONFIG_SPL_SYSCON=y -- 2.34.1
[PATCH v3 06/10] arm: mach-k3: am62x: am625_init: Probe AM65 CPSW NUSS
From: Kishon Vijay Abraham I
In order to support Ethernet boot on AM62x, probe AM65 CPSW NUSS
driver in board_init_f().
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Siddharth Vadapalli
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-7-c-van...@ti.com/
Changes from v2 to v3:
- No changes.
arch/arm/mach-k3/am62x/am625_init.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/mach-k3/am62x/am625_init.c
b/arch/arm/mach-k3/am62x/am625_init.c
index 72a752d38e..0182c153a6 100644
--- a/arch/arm/mach-k3/am62x/am625_init.c
+++ b/arch/arm/mach-k3/am62x/am625_init.c
@@ -280,6 +280,16 @@ void board_init_f(ulong dummy)
if (ret)
panic("DRAM init failed: %d\n", ret);
}
+
+ if (IS_ENABLED(CONFIG_SPL_ETH) && IS_ENABLED(CONFIG_TI_AM65_CPSW_NUSS)
&&
+ spl_boot_device() == BOOT_DEVICE_ETHERNET) {
+ struct udevice *cpswdev;
+
+ if (uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(am65_cpsw_nuss),
+ ))
+ printf("Failed to probe am65_cpsw_nuss driver\n");
+ }
+
spl_enable_cache();
fixup_a53_cpu_freq_by_speed_grade();
--
2.34.1
[PATCH v3 05/10] dma: ti: k3-udma: Add support for native configuration of chan/flow
From: Kishon Vijay Abraham I In absence of Device Manager (DM) services such as at R5 SPL stage, driver will have to natively setup TCHAN/RCHAN/RFLOW cfg registers. Existing UDMA driver performed the above mentioned configuration for UDMA. Add similar configuration for PKTDMA here. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar --- Link to v2: https://lore.kernel.org/r/20240425120822.2048012-6-c-van...@ti.com/ Changes from v2 to v3: - No changes. drivers/dma/ti/k3-udma.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index da341a2477..14c3999035 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -2119,6 +2119,9 @@ static int bcdma_tisci_tx_channel_config(struct udma_chan *uc) if (ret) dev_err(ud->dev, "tchan%d cfg failed %d\n", tchan->id, ret); + if (IS_ENABLED(CONFIG_K3_DM_FW)) + udma_alloc_tchan_raw(uc); + return ret; } @@ -2167,6 +2170,9 @@ static int pktdma_tisci_rx_channel_config(struct udma_chan *uc) dev_err(ud->dev, "flow%d config failed: %d\n", uc->rflow->id, ret); + if (IS_ENABLED(CONFIG_K3_DM_FW)) + udma_alloc_rchan_raw(uc); + return ret; } -- 2.34.1
[PATCH v3 03/10] soc: ti: k3-navss-ringacc: Initialize base address of ring cfg registers
From: Kishon Vijay Abraham I
Initialize base address of ring config registers required to natively
setup ring cfg registers in the absence of Device Manager (DM) services
at R5 SPL stage. Since register property is defined as "ring" for PKTDMA
and "cfg" for UDMA, configure base address of ring configuration register
accordingly.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Siddharth Vadapalli
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-4-c-van...@ti.com/
Changes from v2 to v3:
- Since register property is defined as "ring" for PKTDMA and "cfg"
for UDMA, change conditon to configure the base address of ring
configuration register accordingly.
drivers/soc/ti/k3-navss-ringacc.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/ti/k3-navss-ringacc.c
b/drivers/soc/ti/k3-navss-ringacc.c
index d3f3d4761c..8ffb6137df 100644
--- a/drivers/soc/ti/k3-navss-ringacc.c
+++ b/drivers/soc/ti/k3-navss-ringacc.c
@@ -1029,8 +1029,8 @@ static int k3_nav_ringacc_init(struct udevice *dev,
struct k3_nav_ringacc *ringa
struct k3_nav_ringacc *k3_ringacc_dmarings_init(struct udevice *dev,
struct k3_ringacc_init_data
*data)
{
+ void __iomem *base_rt, *base_cfg;
struct k3_nav_ringacc *ringacc;
- void __iomem *base_rt;
int i;
ringacc = devm_kzalloc(dev, sizeof(*ringacc), GFP_KERNEL);
@@ -1048,6 +1048,20 @@ struct k3_nav_ringacc *k3_ringacc_dmarings_init(struct
udevice *dev,
if (!base_rt)
return ERR_PTR(-EINVAL);
+ /*
+* Since register property is defined as "ring" for PKTDMA and
+* "cfg" for UDMA, configure base address of ring configuration
+* register accordingly.
+*/
+ base_cfg = dev_remap_addr_name(dev, "ring");
+ pr_debug("ring %p\n", base_cfg);
+ if (!base_cfg) {
+ base_cfg = dev_remap_addr_name(dev, "cfg");
+ pr_debug("cfg %p\n", base_cfg);
+ if (!base_cfg)
+ return ERR_PTR(-EINVAL);
+ }
+
ringacc->rings = devm_kzalloc(dev,
sizeof(*ringacc->rings) *
ringacc->num_rings * 2,
@@ -1062,6 +1076,7 @@ struct k3_nav_ringacc *k3_ringacc_dmarings_init(struct
udevice *dev,
for (i = 0; i < ringacc->num_rings; i++) {
struct k3_nav_ring *ring = >rings[i];
+ ring->cfg = base_cfg + KNAV_RINGACC_CFG_REGS_STEP * i;
ring->rt = base_rt + K3_DMARING_RING_RT_REGS_STEP * i;
ring->parent = ringacc;
ring->ring_id = i;
--
2.34.1
[PATCH v3 00/10] Add support for Ethernet Boot on SK-AM62
This series enables Ethernet Boot on SK-AM62 device. This series is based on commit "b4cbd1a257d4" of origin/next branch of u-boot. Link to v2: https://lore.kernel.org/r/20240425120822.2048012-1-c-van...@ti.com/ TestLogs: https://gist.github.com/chintanv133/76de0a51fd532b34fea686f4c7bd75c6 Changes frpom v2 to v3: - Since register property is defined as "ring" for PKTDMA and "cfg" for UDMA, change the condition to configure the base address of ring configuration register accordingly. - Since "phy_gmii_sel" with "bootph-all" property is merged at upstream Linux for am62x-sk-common with commit "ba50141137fa", [PATCH 10/10] can be drop with next DT-Sync. Chintan Vankar (2): common: spl: spl: Init DRAM size in R5/A53 SPL arch: arm: dts: k3-am62-sk-u-boot: Add missing "bootph-all" property to phy_gmii_sel node Kishon Vijay Abraham I (6): firmware: ti_sci: Add No-OP for "RX_FL_CFG" soc: ti: k3-navss-ringacc: Initialize base address of ring cfg registers dma: ti: k3-udma: Add support for native configuration of chan/flow arm: mach-k3: am625_init: Probe AM65 CPSW NUSS configs: am62: Add configs for enabling ETHBOOT in R5SPL configs: am62: Enable configs required for Ethboot Siddharth Vadapalli (1): arm: dts: k3-am625-r5-sk: Enable DM services for main_pktdma Vignesh Raghavendra (1): soc: ti: k3-navss-ringacc: Fix reset ring API arch/arm/dts/k3-am625-r5-sk.dts | 5 + arch/arm/dts/k3-am625-sk-u-boot.dtsi | 4 arch/arm/mach-k3/am62x/am625_init.c | 10 ++ common/spl/spl.c | 2 +- configs/am62x_evm_a53_ethboot_defconfig | 12 configs/am62x_evm_r5_ethboot_defconfig | 20 drivers/dma/ti/k3-udma.c | 6 ++ drivers/firmware/ti_sci.c| 8 +++- drivers/soc/ti/k3-navss-ringacc-u-boot.c | 9 - drivers/soc/ti/k3-navss-ringacc.c| 17 - 10 files changed, 89 insertions(+), 4 deletions(-) create mode 100644 configs/am62x_evm_a53_ethboot_defconfig create mode 100644 configs/am62x_evm_r5_ethboot_defconfig -- 2.34.1
[PATCH v3 01/10] common: spl: spl: Init DRAM size in R5/A53 SPL
Initialize DRAM size in SPL stage since networking requires DDR
to be initialized.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-2-c-van...@ti.com/
Changes from v2 to v3:
- No changes.
common/spl/spl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 7794ddccad..5914eb8205 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -720,7 +720,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
initr_watchdog();
if (IS_ENABLED(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF) ||
- IS_ENABLED(CONFIG_SPL_ATF))
+ IS_ENABLED(CONFIG_SPL_ATF) || IS_ENABLED(CONFIG_SPL_NET))
dram_init_banksize();
if (CONFIG_IS_ENABLED(PCI) && !(gd->flags & GD_FLG_DM_DEAD)) {
--
2.34.1
[PATCH v3 07/10] configs: am62: Add configs for enabling ETHBOOT in R5SPL
From: Kishon Vijay Abraham I Add configs for enabling ETHBOOT in R5SPL. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Andreas Dannenberg Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar --- Link to v2: https://lore.kernel.org/r/20240425120822.2048012-8-c-van...@ti.com/ Changes from v2 to v3: - No changes. configs/am62x_evm_r5_ethboot_defconfig | 20 1 file changed, 20 insertions(+) create mode 100644 configs/am62x_evm_r5_ethboot_defconfig diff --git a/configs/am62x_evm_r5_ethboot_defconfig b/configs/am62x_evm_r5_ethboot_defconfig new file mode 100644 index 00..7b1932b215 --- /dev/null +++ b/configs/am62x_evm_r5_ethboot_defconfig @@ -0,0 +1,20 @@ +#include + +CONFIG_SPL_GPIO=y +CONFIG_SPL_MMC=n +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20 +CONFIG_SPL_BSS_MAX_SIZE=0X3100 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_ETH=y +CONFIG_SPL_I2C=y +CONFIG_SPL_NET=y +CONFIG_SPL_NET_VCI_STRING="AM62X U-Boot R5 SPL" +CONFIG_CMD_DHCP=y +CONFIG_SPL_SYSCON=y +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_DM_I2C=y +CONFIG_PHY_TI_DP83867=y +CONFIG_TI_AM65_CPSW_NUSS=y -- 2.34.1
[PATCH v3 04/10] soc: ti: k3-navss-ringacc: Fix reset ring API
From: Vignesh Raghavendra
Expectation of k3_ringacc_ring_reset_raw() is to reset the ring to
requested size and not to 0. Fix this.
Signed-off-by: Vignesh Raghavendra
Signed-off-by: Siddharth Vadapalli
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-5-c-van...@ti.com/
Changes from v2 to v3:
- No changes.
drivers/soc/ti/k3-navss-ringacc-u-boot.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/ti/k3-navss-ringacc-u-boot.c
b/drivers/soc/ti/k3-navss-ringacc-u-boot.c
index f958239c2a..5d650b9de7 100644
--- a/drivers/soc/ti/k3-navss-ringacc-u-boot.c
+++ b/drivers/soc/ti/k3-navss-ringacc-u-boot.c
@@ -25,9 +25,16 @@ struct k3_nav_ring_cfg_regs {
#define KNAV_RINGACC_CFG_RING_SIZE_ELSIZE_MASK GENMASK(26, 24)
#define KNAV_RINGACC_CFG_RING_SIZE_ELSIZE_SHIFT(24)
+#define KNAV_RINGACC_CFG_RING_SIZE_MASKGENMASK(15, 0)
+
static void k3_ringacc_ring_reset_raw(struct k3_nav_ring *ring)
{
- writel(0, >cfg->size);
+ u32 reg;
+
+ reg = readl(>cfg->size);
+ reg &= KNAV_RINGACC_CFG_RING_SIZE_MASK;
+ reg |= ring->size;
+ writel(reg, >cfg->size);
}
static void k3_ringacc_ring_reconfig_qmode_raw(struct k3_nav_ring *ring, enum
k3_nav_ring_mode mode)
--
2.34.1
[PATCH v3 02/10] firmware: ti_sci: Add No-OP for "RX_FL_CFG"
From: Kishon Vijay Abraham I
RX_FL_CFG message should not be forwarded to TIFS and should be
handled within R5 SPL (when DM services are not available). Add
a no-op function to not handle RX_FL_CFG messages.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Siddharth Vadapalli
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-3-c-van...@ti.com/
Changes from v2 to v3:
- No changes.
drivers/firmware/ti_sci.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
index 8ce0f46e70..346656c028 100644
--- a/drivers/firmware/ti_sci.c
+++ b/drivers/firmware/ti_sci.c
@@ -2451,6 +2451,12 @@ fail:
return ret;
}
+static int ti_sci_cmd_rm_udmap_rx_flow_cfg_noop(const struct ti_sci_handle
*handle,
+ const struct
ti_sci_msg_rm_udmap_flow_cfg *params)
+{
+ return 0;
+}
+
/**
* ti_sci_cmd_set_fwl_region() - Request for configuring a firewall region
* @handle:pointer to TI SCI handle
@@ -2896,7 +2902,7 @@ static __maybe_unused int ti_sci_dm_probe(struct udevice
*dev)
udmap_ops = >rm_udmap_ops;
udmap_ops->tx_ch_cfg = ti_sci_cmd_rm_udmap_tx_ch_cfg;
udmap_ops->rx_ch_cfg = ti_sci_cmd_rm_udmap_rx_ch_cfg;
- udmap_ops->rx_flow_cfg = ti_sci_cmd_rm_udmap_rx_flow_cfg;
+ udmap_ops->rx_flow_cfg = ti_sci_cmd_rm_udmap_rx_flow_cfg_noop;
return ret;
}
--
2.34.1
Re: [PATCH 2/2] led: Add dts property to specify blinking of the led
On 7/3/24 12:08, Simon Glass wrote:
> Hi Mikhail,
>
> On Wed, 3 Jul 2024 at 02:02, Mikhail Kshevetskiy
> wrote:
>> From: Michael Polyntsov
>>
>> The standard property
>>
>> linux,default-trigger = "pattern";
>>
>> used to get an effect. No blinking parameters can be set yet.
>>
>> Signed-off-by: Michael Polyntsov
>> Signed-off-by: Mikhail Kshevetskiy
>> ---
>> drivers/led/led-uclass.c | 34 ++
>> 1 file changed, 30 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
>> index d021c3bbf20..78d1a3d152b 100644
>> --- a/drivers/led/led-uclass.c
>> +++ b/drivers/led/led-uclass.c
>> @@ -190,6 +190,9 @@ static int led_post_bind(struct udevice *dev)
>> {
>> struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
>> const char *default_state;
>> +#ifdef CONFIG_LED_BLINK
>> + const char *trigger;
> It looks like this is not used, so you can drop it and use a local
> variable here?
Unfortunately no, see below.
>
>> +#endif
>>
>> if (!uc_plat->label)
>> uc_plat->label = dev_read_string(dev, "label");
>> @@ -210,6 +213,13 @@ static int led_post_bind(struct udevice *dev)
>> else
>> return 0;
>>
>> +#ifdef CONFIG_LED_BLINK
> if (IS_ENABLED(CONFIG_LED_BLINK)
This is not so easy. The definition of LEDST_BLINK depends on
CONFIG_LED_BLINK, thus this code will not compile if CONFIG_LED_BLINK
is not defined. We can define LEDST_BLINK unconditionally, but it will
cause an issue in the cmd/led.c.
>> + trigger = dev_read_string(dev, "linux,default-trigger");
>> + if (trigger && !strncmp(trigger, "pattern", 7)) {
>> + uc_plat->default_state = LEDST_BLINK;
>> + }
> No {} around single lines. You can use patman to send patches and it
> will check this for you (I hope!).
>
>> +#endif
>> +
>> /*
>> * In case the LED has default-state DT property, trigger
>> * probe() to configure its default state during startup.
>> @@ -222,12 +232,28 @@ static int led_post_bind(struct udevice *dev)
>> static int led_post_probe(struct udevice *dev)
>> {
>> struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
>> + int rc = 0;
>>
>> - if (uc_plat->default_state == LEDST_ON ||
>> - uc_plat->default_state == LEDST_OFF)
>> - led_set_state(dev, uc_plat->default_state);
>> + switch (uc_plat->default_state) {
>> + case LEDST_ON:
>> + case LEDST_OFF:
>> + rc = led_set_state(dev, uc_plat->default_state);
>> + break;
>> +#ifdef CONFIG_LED_BLINK
>> + case LEDST_BLINK: {
> Here again you can use if IS_ENABLED(CONFIG_LED_BLINK) inside the case
> which should produce very similar code size, hopefully the same.
Do you suggest an if inside the handling of "default:" case?
Also see above notes about dependency of LEDST_BLINK on CONFIG_LED_BLINK.
>> + const int default_period_ms = 1000;
>>
>> - return 0;
>> + rc = led_set_period(dev, default_period_ms);
>> + if (rc == 0)
>> + rc = led_set_state(dev, uc_plat->default_state);
>> + break;
>> + }
>> +#endif
>> + default:
>> + break;
>> + }
>> +
>> + return rc;
>> }
>>
>> UCLASS_DRIVER(led) = {
>> --
>> 2.39.2
>>
> Regards,
> Simon
Re: Missing eth1addr for Banana Pi BPI-R3
On Fri, Jul 05, 2024 at 11:05:31AM +1000, Leith Bade wrote: > Hi, > > I have been investigating how to stop the MAC addresses on my Banana > Pi BPI-R3 from changing on every boot. > > It appears the ethaddr and eth1addr environment variables are used for > this purpose as they are randomly generated on first boot, then become > fixed after being saved to the environment storage. > > However on my BPI-R3 I only see ethaddr which corresponds to the > MT7530 switch device. There is no eth1addr for the other Ethernet > device which is the SFP port. Thus Linux keeps generating a new MAC > address for the SFP port. > > How do I get U-boot to generate eth1addr and assign a permanent MAC > address to the SFP port? Sadly U-Boot as of today only supports only a single Ethernet MAC with the MediaTek driver, with no actual DSA switch driver: https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/dts/mt7986a-bpi-r3-sd.dts?ref_type=heads#L78 So from U-Boot's perspective there is currently only a single Ethernet device, and hence also CONFIG_NET_RANDOM_ETHADDR will only set 'ethaddr', and only the MAC address of Ethernet MAC pointed to by the 'ethernet0' alias in the device tree will be assigned. When using OpenWrt, we are dealing with this differently: The random address generated by Linux is made persistent on first boot for both ethernet devices: https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/mediatek/base-files/etc/uci-defaults/99_fwenv-store-ethaddr.sh;h=e9cb4f921d9aedd82550d0cc8935687135ec83a3;hb=HEAD And eventhough U-Boot at this point knows nothing about there being more than one Ethernet MAC it still sets the address stored in eth1addr for the Ethernet MAC pointed to by the 'ethernet1' alias. However, to let U-Boot do that for you, we would need to change the Ethernet driver in U-Boot to expose all MACs rather than just one of them. Christian Marangi (Ansuel) has been working on decreasing the gap between U-Boot and Linux, however, when it comes to the Ethernet driver this means quite a bit of work...
[PATCH 1/2] led: Implement software led blinking
From: Michael Polyntsov
If hardware (or driver) doesn't support leds blinking, it's
now possible to use software implementation of blinking instead.
This relies on cyclic functions.
v2 changes:
* Drop sw_blink_state structure, move its necessary fields to
led_uc_plat structure.
* Add cyclic_info pointer to led_uc_plat structure. This
simplify code a lot.
* Remove cyclic function search logic. Not needed anymore.
* Fix blinking period. It was twice large.
* Other cleanups.
v3 changes:
* Adapt code to recent cyclic function changes
* Move software blinking functions to separate file
* Other small changes
Signed-off-by: Michael Polyntsov
Signed-off-by: Mikhail Kshevetskiy
---
drivers/led/Kconfig| 14 +
drivers/led/Makefile | 1 +
drivers/led/led-uclass.c | 16 +-
drivers/led/led_sw_blink.c | 106 +
include/led.h | 17 ++
5 files changed, 152 insertions(+), 2 deletions(-)
create mode 100644 drivers/led/led_sw_blink.c
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index 9837960198d..dc9d4c8a757 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -73,6 +73,20 @@ config LED_BLINK
This option enables support for this which adds slightly to the
code size.
+config LED_SW_BLINK
+ bool "Support software LED blinking"
+ depends on LED_BLINK
+ select CYCLIC
+ help
+ Turns on led blinking implemented in the software, useful when
+ the hardware doesn't support led blinking. Half of the period
+ led will be ON and the rest time it will be OFF. Standard
+ led commands can be used to configure blinking. Does nothing
+ if driver supports blinking.
+ WARNING: Blinking may be inaccurate during execution of time
+ consuming commands (ex. flash reading). Also it completely
+ stops during OS booting.
+
config SPL_LED
bool "Enable LED support in SPL"
depends on SPL_DM
diff --git a/drivers/led/Makefile b/drivers/led/Makefile
index 2bcb8589087..e27aa488482 100644
--- a/drivers/led/Makefile
+++ b/drivers/led/Makefile
@@ -4,6 +4,7 @@
# Written by Simon Glass
obj-y += led-uclass.o
+obj-$(CONFIG_LED_SW_BLINK) += led_sw_blink.o
obj-$(CONFIG_LED_BCM6328) += led_bcm6328.o
obj-$(CONFIG_LED_BCM6358) += led_bcm6358.o
obj-$(CONFIG_LED_BCM6753) += led_bcm6753.o
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index f37bf6a1550..37dc99cecdc 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -58,6 +58,10 @@ int led_set_state(struct udevice *dev, enum led_state_t
state)
if (!ops->set_state)
return -ENOSYS;
+ if (IS_ENABLED(CONFIG_LED_SW_BLINK) &&
+ led_sw_on_state_change(dev, state))
+ return 0;
+
return ops->set_state(dev, state);
}
@@ -68,6 +72,10 @@ enum led_state_t led_get_state(struct udevice *dev)
if (!ops->get_state)
return -ENOSYS;
+ if (IS_ENABLED(CONFIG_LED_SW_BLINK) &&
+ led_sw_is_blinking(dev))
+ return LEDST_BLINK;
+
return ops->get_state(dev);
}
@@ -76,8 +84,12 @@ int led_set_period(struct udevice *dev, int period_ms)
{
struct led_ops *ops = led_get_ops(dev);
- if (!ops->set_period)
- return -ENOSYS;
+ if (!ops->set_period) {
+ if (IS_ENABLED(CONFIG_LED_SW_BLINK))
+ return led_sw_set_period(dev, period_ms);
+ else
+ return -ENOSYS;
+ }
return ops->set_period(dev, period_ms);
}
diff --git a/drivers/led/led_sw_blink.c b/drivers/led/led_sw_blink.c
new file mode 100644
index 000..ab56111a60b
--- /dev/null
+++ b/drivers/led/led_sw_blink.c
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Software blinking helpers
+ * Copyright (C) 2024 IOPSYS Software Solutions AB
+ * Author: Mikhail Kshevetskiy
+ */
+
+#include
+#include
+#include
+#include
+
+static void led_sw_blink(struct cyclic_info *c)
+{
+ struct led_uc_plat *uc_plat;
+ struct udevice *dev;
+ struct led_ops *ops;
+
+ uc_plat = container_of(c, struct led_uc_plat, cyclic);
+ dev = uc_plat->dev;
+ ops = led_get_ops(dev);
+
+ switch (uc_plat->sw_blink_state) {
+ case LED_SW_BLINK_ST_OFF:
+ uc_plat->sw_blink_state = LED_SW_BLINK_ST_ON;
+ ops->set_state(dev, LEDST_ON);
+ break;
+ case LED_SW_BLINK_ST_ON:
+ uc_plat->sw_blink_state = LED_SW_BLINK_ST_OFF;
+ ops->set_state(dev, LEDST_OFF);
+ break;
+ case LED_SW_BLINK_ST_NOT_READY:
+ /*
+* led_set_period has been called, but
+* led_set_state(LDST_BLINK) has not yet,
+* so doing nothing
+*/
+ break;
+ default:
+ break;
[PATCH 2/2] led: Add dts property to specify blinking of the led
From: Michael Polyntsov
The standard property
linux,default-trigger = "pattern";
used to get an effect. No blinking parameters can be set yet.
Signed-off-by: Michael Polyntsov
Signed-off-by: Mikhail Kshevetskiy
---
drivers/led/led-uclass.c | 34 ++
1 file changed, 30 insertions(+), 4 deletions(-)
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index 37dc99cecdc..7d4db9f9c32 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -99,6 +99,9 @@ static int led_post_bind(struct udevice *dev)
{
struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
const char *default_state;
+#ifdef CONFIG_LED_BLINK
+ const char *trigger;
+#endif
if (!uc_plat->label)
uc_plat->label = dev_read_string(dev, "label");
@@ -119,6 +122,13 @@ static int led_post_bind(struct udevice *dev)
else
return 0;
+#ifdef CONFIG_LED_BLINK
+ trigger = dev_read_string(dev, "linux,default-trigger");
+ if (trigger && !strncmp(trigger, "pattern", 7)) {
+ uc_plat->default_state = LEDST_BLINK;
+ }
+#endif
+
/*
* In case the LED has default-state DT property, trigger
* probe() to configure its default state during startup.
@@ -131,12 +141,28 @@ static int led_post_bind(struct udevice *dev)
static int led_post_probe(struct udevice *dev)
{
struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
+ int rc = 0;
- if (uc_plat->default_state == LEDST_ON ||
- uc_plat->default_state == LEDST_OFF)
- led_set_state(dev, uc_plat->default_state);
+ switch (uc_plat->default_state) {
+ case LEDST_ON:
+ case LEDST_OFF:
+ rc = led_set_state(dev, uc_plat->default_state);
+ break;
+#ifdef CONFIG_LED_BLINK
+ case LEDST_BLINK: {
+ const int default_period_ms = 1000;
- return 0;
+ rc = led_set_period(dev, default_period_ms);
+ if (rc == 0)
+ rc = led_set_state(dev, uc_plat->default_state);
+ break;
+ }
+#endif
+ default:
+ break;
+ }
+
+ return rc;
}
UCLASS_DRIVER(led) = {
--
2.39.2
Re: [PATCH v2 0/7] Add Starfive JH7110 Cadence USB driver
On Thu, Jul 4, 2024 at 6:25 AM Heinrich Schuchardt wrote:
>
> On 7/4/24 07:50, Minda Chen wrote:
> > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > So the codes can be used in visionfive2 and star64 7110 board.
> >
> > The driver is almost the same with kernel driver.
> >
> > Test with Star64 JH7110 board USB 3.0 + USB 2.0 host.
> > The code can work.
> >
> > - Star64 using USB 3.0 and USB 2.0 host must add below board dts setting.
>
> Does this mean a future patch for spl_fdt_fixup_star64() is needed?
As said by Hal they will be introducing a patchset to OF_UPSTREAM the
JH7110 board support so we should pursue that first to get dts
upstream (Linux?) aligned with U-Boot.
>
> Did you also have a look at the USB on the Milk V Mars CM?
With Minda's advice for Star64 applied to
jh7110-starfive-visionfive-2.dtsi directly as a test on Milk-V Mars CM
Lite:
StarFive # usb info
1: Hub, USB Revision 3.0
- U-Boot XHCI Host Controller
- Class: Hub
- PacketSize: 512 Configurations: 1
- Vendor: 0x Product 0x Version 1.0
Configuration: 1
- Interfaces: 1 Self Powered 0mA
Interface: 0
- Alternate Setting 0, Endpoints: 1
- Class Hub
- Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms
>
> Best regards
>
> Heinrich
>
> >
> > 1. usb pin setting
> > usb_pins: usb0-0 {
> > driver-vbus-pin {
> > pinmux = > GPOEN_ENABLE,
> > GPI_NONE)>;
> > bias-disable;
> > input-disable;
> > input-schmitt-disable;
> > slew-rate = <0>;
> > };
> > };
> >
> > 2. related dts node setting.
> > {
> > status = "disabled";
> > };
> >
> > {
> > starfive,sys-syscon = <_syscon 0x18>;
> > starfive,stg-syscon = <_syscon 0x148 0x1f4>;
> > status = "okay";
> > };
Question I have is: Where is the documentation for these "magical"
numbers 0x18 00x148 0x1f4 ? Is this a defined constant, or else where
is this in the Technical Reference Manual?
> >
> > {
> > pinctrl-names = "default";
> > pinctrl-0 = <_pins>;
> > status = "okay";
> > };
> >
> > _cdns3 {
> > phys = <>, <>;
> > phy-names = "cdns3,usb2-phy", "cdns3,usb3-phy";
> > dr_mode = "host";
> > status = "okay";
> > };
> >
> > - previous version
> >v1:
> > https://patchwork.ozlabs.org/project/uboot/cover/20240504150358.19600-1-minda.c...@starfivetech.com/
> >
> > - patch description.
> >
> > patch1: Add set phy mode function in cdns3 core driver
> > which is used by Starfive JH7110.
> > patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
> > patch4: Cadence USB wrapper driver.
> > patch5: Add JH7110 USB default overcurrent pin.
> > patch6-8 dts, config and maintainers update.
> >
> > - change:
> > v2:
> > - patch 1 Move the added code to cdns3_core_init_role(). Must
> > set PHY mode before calling cdns3 role start function.
> > - patch 1-4 correct the code format.(follow Marek's comments.)
> > - patch 2 Add set 125M clock in PHY init function.
> > - Add new patch5.
> >
> > Minda Chen (8):
> >usb: cdns3: Set USB PHY mode in cdns3_core_init_role()
> >phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
> >phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
> >usb: cdns: starfive: Add cdns USB driver
> >pinctrl: starfive: Setup USB default disable overcurrent pin
> >configs: starfive: Add visionfive2 cadence USB configuration
> >dts: starfive: Add JH7110 Cadence USB dts node
> >MAINTAINERS: Update Starfive visionfive2 maintain files.
> >
> > .../dts/jh7110-starfive-visionfive-2.dtsi | 5 +
> > arch/riscv/dts/jh7110.dtsi| 52 +
> > board/starfive/visionfive2/MAINTAINERS| 2 +
> > configs/starfive_visionfive2_defconfig| 9 +
> > drivers/phy/Kconfig | 1 +
> > drivers/phy/Makefile | 1 +
> > drivers/phy/starfive/Kconfig | 21 ++
> > drivers/phy/starfive/Makefile | 7 +
> > drivers/phy/starfive/phy-jh7110-pcie.c| 202 ++
> > drivers/phy/starfive/phy-jh7110-usb2.c| 135
> > drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 11 +-
> > drivers/usb/cdns3/Kconfig | 7 +
> > drivers/usb/cdns3/Makefile| 2 +
> > drivers/usb/cdns3/cdns3-starfive.c| 183
> > drivers/usb/cdns3/core.c | 25 +++
> > 15 files changed, 661 insertions(+), 2 deletions(-)
> > create mode 100644 drivers/phy/starfive/Kconfig
> > create mode 100644 drivers/phy/starfive/Makefile
> > create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c
> > create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
> >
Re: [PATCH v2] arm: mvebu: Enable bootstd and other modernization for Synology DS414 (Armada XP) board
Hi Phil,
On Thu, Jul 4, 2024 at 4:27 AM Phil Sutter wrote:
>
> Hi Tony,
>
> On Fri, Jun 28, 2024 at 03:44:01PM -0700, Tony Dinh wrote:
> > On Fri, Jun 28, 2024 at 3:04 PM Tony Dinh wrote:
> > > On Wed, Jun 26, 2024 at 3:31 AM Phil Sutter wrote:
> > > > On Sat, Jun 15, 2024 at 03:06:54PM -0700, Tony Dinh wrote:
> > > > [...]
> > > > > diff --git a/board/Synology/ds414/ds414.c
> > > > > b/board/Synology/ds414/ds414.c
> > > > > index abe6f9eb5e..f0b55fa095 100644
> > > > > --- a/board/Synology/ds414/ds414.c
> > > > > +++ b/board/Synology/ds414/ds414.c
> > > > > @@ -181,18 +181,9 @@ int board_init(void)
> > > > > return 0;
> > > > > }
> > > > >
> > > > > -int misc_init_r(void)
> > > > > +int board_late_init(void)
> > > > > {
> > > > > - if (!env_get("ethaddr")) {
> > > > > - puts("Incomplete environment, populating from SPI
> > > > > flash\n");
> > > > > - do_syno_populate(0, NULL);
> > > > > - }
> > > > > - return 0;
> > > > > -}
> > > >
> > > > Could you please leave misc_init_r() in place (along with MISC_INIT_R in
> > > > defconfig)? A closer look at doc/README.enetaddr suggests that
> > > > implementing this board-specific function which acts if the environment
> > > > does not have ethaddr defined already is exactly the right thing to do.
> > > > Also, it doesn't conflict with NET_RANDOM_ETHADDR: If do_syno_populate()
> > > > succeeds, no random MAC addresses are generated. If I manually remove
> > > > the call, random MACs come into play. So having this option enabled
> > > > serves as a fallback for boxes which lack the data in flash.
> > >
> > > Sure I will do that. I was mistaken in assuming that network random
> > > addresses were already generated before misc_init_r(). Thanks!
>
> It's nice that we may keep both so there's a fallback if data extraction
> from flash fails.
>
> > > > > -int checkboard(void)
> > > > > -{
> > > > > - puts("Board: DS414\n");
> > > > > -
> > > > > + /* Do late init to ensure successful enumeration of XHCI
> > > > > devices */
> > > > > + pci_init();
> > > > > return 0;
> > > > > }
> > > >
> > > > FWIW, booting from rear USB port worked fine for me!
> > >
> > > Cool! That was the main thing I was interested in for sending in this
> > > patch. One thing led to another... :)
>
> Which is a bit odd TBH: Scrolling through git history, I found commit
> c57f920504297 ("arm: mvebu: configs: ds414: Enable XHCI_PCI by default")
> in which I claimed the rear USB ports to be functional after enabling
> XHCI_PCI. Took me only three years to forget all the details. :(
>
Happens to me quite often, our old memories need to be filed away in
some brain cabinet :)
... Perhaps the switch to Driver Model was when it started behaving
like it's not working, but actually not broken. The "pci init" is
needed to enumerate the XHCI controller first, before "usb start" can
work normally as before.
> > > > > diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
> > > > > index ecf9501ba5..501ed51129 100644
> > > > > --- a/configs/ds414_defconfig
> > > > > +++ b/configs/ds414_defconfig
> > > > [...]
> > > > > @@ -25,44 +26,40 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000
> > > > > CONFIG_SPL=y
> > > > > CONFIG_DEBUG_UART_BASE=0xf1012000
> > > > > CONFIG_DEBUG_UART_CLOCK=25000
> > > > > +CONFIG_IDENT_STRING="\nSynology DS214+/DS414 2/4-Bay Diskstation"
> > > > > CONFIG_SYS_LOAD_ADDR=0x80
> > > > > CONFIG_PCI=y
> > > > > CONFIG_DEBUG_UART=y
> > > > > +CONFIG_BOOTSTD_FULL=y
> > > > > CONFIG_BOOTDELAY=3
> > > > > CONFIG_USE_BOOTARGS=y
> > > > > -CONFIG_BOOTARGS="console=ttyS0,115200 ip=off initrd=0x840,8M
> > > > > root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2
> > > > > flash_size=8 SataLedSpecial=1 HddHotplug=1"
> > > > > -CONFIG_USE_BOOTCOMMAND=y
> > > > > -CONFIG_BOOTCOMMAND="sf probe; sf read ${loadaddr} 0xd 0x2d;
> > > > > sf read ${ramdisk_addr_r} 0x3a 0x43; bootm ${loadaddr}
> > > > > ${ramdisk_addr_r}"
> > > >
> > > > So these should not be necessary anymore with BOOTSTD. I wonder if it is
> > > > possible to provide a static bootmeth (or bootflow?) with low priority
> > > > which boots the legacy OS from flash. It could hold all the details
> > > > instead of the *_legacy env vars introduced below.
> > >
> > > I recall from bootstd documentation that it is possible to have a
> > > bootflow on flash. But it seems a bit too much for this patch. I think
> > > we'll have to repartition or find some space on the flash to store
> > > that bootflow script.
> > >
> >
> > Sorry I've misread your comment "it is possible to provide a static
> > bootmeth (or bootflow?) ". I think by "static bootflow" you must have
> > meant we would define it in the board code, and convince bootstd to
> > use it as the last boot method (without hunting for it on flash). I'm
> > not sure. Perhaps "global bootflow" is something that can be defined
> > and used here. I'll have to dig into bootstd
Missing eth1addr for Banana Pi BPI-R3
Hi, I have been investigating how to stop the MAC addresses on my Banana Pi BPI-R3 from changing on every boot. It appears the ethaddr and eth1addr environment variables are used for this purpose as they are randomly generated on first boot, then become fixed after being saved to the environment storage. However on my BPI-R3 I only see ethaddr which corresponds to the MT7530 switch device. There is no eth1addr for the other Ethernet device which is the SFP port. Thus Linux keeps generating a new MAC address for the SFP port. How do I get U-boot to generate eth1addr and assign a permanent MAC address to the SFP port? Thanks, Leith Bade le...@bade.nz
Re: [PATCH v3 00/12] xtensa: Enable qemu-xtensa board
On Tue, 18 Jun 2024 14:56:00 +0100, Jiaxun Yang wrote: > This series enabled qemu-xtensa board. > > For dc232b CPU it needs to be built with toolchain[1]. > > This is a side product of me investigating architectures > physical address != virtual address in U-Boot. Now we can > get it covered under CI and regular tests. > > [...] Applied to u-boot/master, thanks! -- Tom
RE: [PATCH] ARM: dts: imx8mp-beacon-kit-u-boot: Drop EQoS clock work-around
> Subject: [PATCH] ARM: dts: imx8mp-beacon-kit-u-boot: Drop EQoS
> clock work-around
>
> Since commit ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC clock"),
> the clocks for the DWMAC driver can be configured, and removing
> them breaks operation.
>
> Fixes: ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC clock")
> Suggested-by: Tim Harvey
> Signed-off-by: Adam Ford
Reviewed-by: Peng Fan
[PATCH] ARM: dts: imx8mp-beacon-kit-u-boot: Drop EQoS clock work-around
Since commit ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC clock"),
the clocks for the DWMAC driver can be configured, and removing
them breaks operation.
Fixes: ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC clock")
Suggested-by: Tim Harvey
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
index ed183f83a7..380146596c 100644
--- a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -32,12 +32,6 @@
bootph-pre-ram;
};
- {
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
{
reset-gpios = < 22 GPIO_ACTIVE_LOW>;
reset-assert-us = <15000>;
--
2.43.0
Re: [PATCH] CI: Make pytest export JUnitXML
On Thu, 27 Jun 2024 07:43:20 -0600, Tom Rini wrote: > Both GitLab and Azure (and other CI systems) have native support for > displaying JUnitXML test report results. The pytest framework that we > use can generate these reports. Change our CI tests so that they will > generate these reports and then have the respective CI platform pick > them up. We write to different locations because of where each CI is > (and isn't) able to easily pass things along. > > [...] Applied to u-boot/master, thanks! -- Tom
Re: [PATCH] test/py/tests: Update some network dependencies
On Tue, 18 Jun 2024 14:23:43 -0600, Tom Rini wrote: > On tests which require "tftpboot" we need to depend not on cmd_net but > rather cmd_tftpboot. And on tests which require cmd_pxe we do not need > to also depend on cmd_net as this should be handled already via Kconfig > logic. > > Applied to u-boot/master, thanks! -- Tom
Re: (subset) [PATCH 00/14] testb: Various tweaks and fixes for Labgrid
On Sun, 23 Jun 2024 14:30:19 -0600, Simon Glass wrote: > This series includes a number of mostly unrelated changes which are in > service of running U-Boot on a lab using Labgrid. > > Changes in v2: > - Add new patch to update u-boot.cfg with CFG_... options > > Simon Glass (14): > trace: Update test to tolerate different trace-cmd version > dm: core: Enhance comments on bind_drivers_pass() > initcall: Correct use of relocation offset > am33xx: Provide a function to set up the debug UART > sunxi: Mark scp as optional > google: Disable TPMv2 on most Chromebooks > meson: Correct driver declaration for meson_axg_gpio > test: Make bootstd init run only on sandbox > log: Allow tests to pass with CONFIG_LOGF_FUNC_PAD set > test: dm: Show failing driver name > test: Decode exceptions only with sandbox > test: Check help output > Update u-boot.cfg to include CFG also > smbios: Correct error handling when writing tables > > [...] Applied to u-boot/master, thanks! -- Tom
[PATCH v1] verdin-am62: add DFU, USB and UUU fastboot support
From: Vitor Soares
Enable USB host as well as USB gadget and DFU support for a53 and r5
configs. Also, enable UUU fastboot support to download files with
the UUU tool from a53.
Additionally, configure usb0 to peripheral mode and add extra
environment for DFU use.
Signed-off-by: Vitor Soares
---
.../dts/k3-am625-verdin-wifi-dev-u-boot.dtsi | 11
configs/verdin-am62_a53_defconfig | 27 +++
configs/verdin-am62_r5_defconfig | 20 +-
include/configs/verdin-am62.h | 9 +++
4 files changed, 66 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
index 9ecb30527404..b3d237c86979 100644
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
@@ -173,6 +173,17 @@
status = "disabled";
};
+ {
+ dr_mode = "peripheral";
+ /* Since role switching is not supported in U-Boot */
+ /delete-property/ extcon;
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
/* Verdin UART_2 */
_uart0 {
bootph-all;
diff --git a/configs/verdin-am62_a53_defconfig
b/configs/verdin-am62_a53_defconfig
index 03730b498fd0..464d0bbb159d 100644
--- a/configs/verdin-am62_a53_defconfig
+++ b/configs/verdin-am62_a53_defconfig
@@ -73,12 +73,15 @@ CONFIG_MD5SUM_VERIFY=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_BCB=y
CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_READ=y
CONFIG_CMD_REMOTEPROC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
@@ -115,8 +118,15 @@ CONFIG_BOOTCOUNT_ENV=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_TI_SCI=y
+CONFIG_DFU_RAM=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000
+CONFIG_SYS_DFU_MAX_FILE_SIZE=0x80
CONFIG_DMA_CHANNELS=y
CONFIG_TI_K3_NAVSS_UDMA=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0xC000
+CONFIG_FASTBOOT_BUF_SIZE=0x2F00
+CONFIG_FASTBOOT_UUU_SUPPORT=y
CONFIG_TI_SCI_PROTOCOL=y
CONFIG_GPIO_HOG=y
CONFIG_SPL_GPIO_HOG=y
@@ -178,5 +188,22 @@ CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_TI_SCI=y
CONFIG_DM_THERMAL=y
+CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_SPL_DM_USB_GADGET=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_SPL_USB_DWC3_GENERIC=y
+CONFIG_SPL_USB_DWC3_AM62=y
+CONFIG_USB_DWC3_AM62=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_GADGET=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
+CONFIG_SPL_DFU=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
CONFIG_HEXDUMP=y
diff --git a/configs/verdin-am62_r5_defconfig b/configs/verdin-am62_r5_defconfig
index 8266a7f6e8f1..e39ee2ac6fea 100644
--- a/configs/verdin-am62_r5_defconfig
+++ b/configs/verdin-am62_r5_defconfig
@@ -43,6 +43,7 @@ CONFIG_SPL_SYS_MALLOC_SIZE=0x100
CONFIG_SPL_EARLY_BSS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_RESET=y
@@ -68,19 +69,22 @@ CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_SPL_CLK_CCF=y
CONFIG_SPL_CLK_K3_PLL=y
CONFIG_SPL_CLK_K3=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000
CONFIG_TI_SCI_PROTOCOL=y
CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_DM_MAILBOX=y
CONFIG_K3_SEC_PROXY=y
-CONFIG_SPL_MISC=y
+CONFIG_MISC=y
CONFIG_ESM_K3=y
CONFIG_SPL_MMC_HS200_SUPPORT=y
CONFIG_MMC_SDHCI=y
@@ -105,5 +109,19 @@ CONFIG_SOC_TI=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_OMAP_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_SPL_DM_USB_GADGET=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_SPL_USB_DWC3_GENERIC=y
+CONFIG_SPL_USB_DWC3_AM62=y
+CONFIG_USB_GADGET=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_SPL_DFU=y
CONFIG_LIB_RATIONAL=y
CONFIG_SPL_LIB_RATIONAL=y
diff --git a/include/configs/verdin-am62.h b/include/configs/verdin-am62.h
index ac44809fdfa5..e8bc22d4c352 100644
--- a/include/configs/verdin-am62.h
+++ b/include/configs/verdin-am62.h
@@ -35,9 +35,18 @@
""
#endif /* CONFIG_TARGET_VERDIN_AM62_A53 */
+#define EXTRA_ENV_DFUARGS \
+ "dfu_alt_info_ram=" \
+ "tispl.bin ram 0x8008 0x20;" \
+ "u-boot.img ram 0x8100 0x40;" \
+ "loadaddr ram " __stringify(CONFIG_SYS_LOAD_ADDR) " 0x8;" \
+ "scriptaddr ram " __stringify(SCRIPTADDR) " 0x8;" \
+ "ramdisk_addr_r ram " __stringify(RAMDISK_ADDR_R) " 0x800\0"
+
/* Incorporate settings into the U-Boot
Re: [PATCH] efi_loader: adjust config options for capsule updates
Hi Heinrich On Sun, 30 Jun 2024 at 15:47, Ilias Apalodimas wrote: > > Hi Heinrich, > > On Sun, 30 Jun 2024 at 15:23, Heinrich Schuchardt wrote: > > > > On 6/22/24 18:38, Ilias Apalodimas wrote: > > > On Sat, 22 Jun 2024 at 19:36, Heinrich Schuchardt > > > wrote: > > >> > > >> On 20.06.24 22:15, Ilias Apalodimas wrote: > > >>> EFI_IGNORE_OSINDICATIONS is used to ignore OsIndications if setvariable > > >>> at runtime is not supported and allow the platform to perform capsule > > >>> updates on disk. With the recent changes boards can conditionally enable > > >>> setvariable at runtime using EFI_RT_VOLATILE_STORE. > > >>> > > >>> Let's make that visible in our Kconfigs and enable > > >>> EFI_IGNORE_OSINDICATIONS > > >>> when set variable at runtime is disabled. > > >>> > > >>> Since EFI_RT_VOLATILE_STORE needs help from the OS to persist the > > >>> variables, allow users to ignore OsIndications even if setvariable at > > >>> runtime is enabled. > > >>> > > >>> Signed-off-by: Ilias Apalodimas > > >> > > >> So this v2: > > > > > > Yes sorry, forgot to add the tile and log... > > > > With this patch I get a failure on the sandbox in the CI: > > > > https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/21382 > > Yes, this test is trying to test updates with OsIndications not set > and it obviously fails, because it expects the update to stop. > > I'll send a v3 and adjust the tests. I don't have to send a v3 eventually. The CI failure is a pre-existing problem and the solution is posted here [0]. This can be merged as-is after we merge the CI fixes [0] https://lore.kernel.org/u-boot/20240704144316.251029-1-ilias.apalodi...@linaro.org/T/#u Regards /Ilias > > Cheers > /Ilias > > > > Without the patch the sandbox runs fine: > > > > https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/21383 > > > > Best regards > > > > Heinrich > > > > > > > >> > > >> v2: > > >> allow EFI_IGNORE_OSINDICATIONS if EFI_RT_VOLATILE_STORE=y > > >> > > >> Reviewed-by: Heinrich Schuchardt > > > > > > Thanks Heinrich > > > > > >> > > >>> --- > > >>>lib/efi_loader/Kconfig | 1 + > > >>>1 file changed, 1 insertion(+) > > >>> > > >>> diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig > > >>> index ee71f417147a..6006e845cb1f 100644 > > >>> --- a/lib/efi_loader/Kconfig > > >>> +++ b/lib/efi_loader/Kconfig > > >>> @@ -220,6 +220,7 @@ config EFI_CAPSULE_ON_DISK > > >>>config EFI_IGNORE_OSINDICATIONS > > >>>bool "Ignore OsIndications for CapsuleUpdate on-disk" > > >>>depends on EFI_CAPSULE_ON_DISK > > >>> + default y if !EFI_RT_VOLATILE_STORE > > >>>help > > >>> There are boards where U-Boot does not support SetVariable at > > >>> runtime. > > >>> Select this option if you want to use the capsule-on-disk > > >>> feature > > >>> -- > > >>> 2.43.0 > > >>> > > >> > >
Re: [PATCH v3 0/5] video: Improve syncing performance with cyclic
Hi Simon, On 04/07/2024 09:48, Simon Glass wrote: Now that U-Boot has a background-processing feature, it is possible to reduce the amount of 'foreground' syncing of the display. At present this happens quite often. Foreground syncing blocks all other processing, sometimes for 10ms or more. When pasting commands into U-Boot over the UART, this typically result in characters being dropped. For example, on rpi_4 it isn't possible to paste in more than 35 characters before things fail. This makes updating the environment or entering long commands very painful over the console, since text must be pasted in chunks, or the vidconsole device must be dropped from stdout. I'm not intimately familiar with U-Boots event loop, but to me this sounds more like a bug in the console code. I can confirm this issue appears on Qualcomm platforms with the GENI serial driver, I tried enabling CONFIG_SERIAL_RX_BUFFER and it seemed to help significantly (though there were still a few dropped characters when pasting). Of note, the USB ACM serial driver doesn't seem to have any issues here, presumably since it isn't restricted by the baud rate. If there is an abort, does this approach still ensure that it gets printed properly on the video console? Kind regards, This series introduces background syncing, enabled by default for boards which use video. The sync rates for foreground and background are configurable. With this series it is possible to paste in any amount of text to the command line. Some sandbox-specific workarounds can now be removed and sandbox video (./u-boot -Dl) is significantly more responsive. This obviously increases code size, since it enables a subsystem not normally used by default. However it only applies to boards which have VIDEO enabled, which are presumably less worried about memory space since the video code is fairly large. Also it is possible to disable CMD_CYCLIC and reduce the growth to: aarch64: (for 1/1 boards) all +1081.0 rodata +65.0 text +1016.0 arm: (for 1/1 boards) all +945.0 rodata +65.0 text +880.0 Without that, the increase doubles. It is of course possible to disable CYCLIC and still use VIDEO but this reverts to the current behaviour Changes in v3: - Drop inclusion of kconfig.h in cyclic.h - Adapt to new cyclic API Changes in v2: - Add an SPL_CYCLIC symbol - Add a lot more explanation about the header files - Expand help for CONFIG_VIDEO - Fix 'groth' and 'work-around' typos in cover letter Simon Glass (5): cyclic: Add a symbol for SPL video: Move last_sync to private data video: Use cyclic to handle video sync sandbox: Increase cyclic CPU-time limit sandbox: Drop video-sync in serial driver common/Kconfig| 9 ++ common/Makefile | 2 +- drivers/serial/sandbox.c | 2 -- drivers/video/Kconfig | 35 + drivers/video/video-uclass.c | 52 +-- drivers/watchdog/Kconfig | 1 + include/asm-generic/global_data.h | 2 +- include/cyclic.h | 5 +-- include/video.h | 2 ++ 9 files changed, 95 insertions(+), 15 deletions(-) -- // Caleb (they/them)
Re: [PATCH v3 4/5] sandbox: Increase cyclic CPU-time limit
Hi Simon, On 04/07/2024 09:48, Simon Glass wrote: Now that sandbox is using cyclic for video, it trips the 1us time limit. Updating the sandbox display often takes 20ms or more. Increase the limit to 100ms to avoid a warning. Signed-off-by: Simon Glass --- (no changes since v1) common/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/common/Kconfig b/common/Kconfig index 87b0ec3ea8f..83c81edac20 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -636,6 +636,7 @@ config SPL_CYCLIC config CYCLIC_MAX_CPU_TIME_US int "Sets the max allowed time for a cyclic function in us" + default 10 if SANDBOX # sandbox video is quite slow Won't this be the case for other boards as well? Maybe it would make sense to bump this unconditionally or adjust the cyclic API so users could provide a hint about how long they'll take to run. Isn't 100ms a bit excessive just to flush a buffer? default 5000 help The max allowed time for a cyclic function in us. If a functions -- // Caleb (they/them)
[PATCH] clk: Propagate clk_set_rate() if CLK_SET_PARENT_RATE present for gate and mux
Gate and mux does not have .set_rate operation, but they could have
CLK_SET_PARENT_RATE flag set. In that case it's usually possible to find a
parent up the tree which is capable of setting the rate (div, pll, etc).
Add clk_generic_set_rate to allow them to trasverse the clock tree.
Cc: Sam Protsenko
Signed-off-by: Michael Trimarchi
---
drivers/clk/clk-gate.c | 1 +
drivers/clk/clk-mux.c| 2 +-
drivers/clk/clk-uclass.c | 20
drivers/clk/clk.c| 9 +
4 files changed, 31 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index cfd90b717e7..c86083ac5a3 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -116,6 +116,7 @@ const struct clk_ops clk_gate_ops = {
.enable = clk_gate_enable,
.disable = clk_gate_disable,
.get_rate = clk_generic_get_rate,
+ .set_rate = clk_generic_set_rate,
};
struct clk *clk_register_gate(struct device *dev, const char *name,
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index e3481be95fa..f99a67ebd35 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -151,13 +151,13 @@ static int clk_mux_set_parent(struct clk *clk, struct clk
*parent)
#else
writel(reg, mux->reg);
#endif
-
return 0;
}
const struct clk_ops clk_mux_ops = {
.get_rate = clk_generic_get_rate,
.set_parent = clk_mux_set_parent,
+ .set_rate = clk_generic_set_rate,
};
struct clk *clk_hw_register_mux_table(struct device *dev, const char *name,
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index ed6e60bc484..638864e6774 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -517,6 +517,26 @@ ulong clk_get_parent_rate(struct clk *clk)
return pclk->rate;
}
+ulong clk_set_parent_rate(struct clk *clk, ulong rate)
+{
+ const struct clk_ops *ops;
+ struct clk *pclk;
+
+ debug("%s(clk=%p)\n", __func__, clk);
+ if (!clk_valid(clk))
+ return 0;
+
+ pclk = clk_get_parent(clk);
+ if (IS_ERR(pclk))
+ return -ENODEV;
+
+ ops = clk_dev_ops(pclk->dev);
+ if (!ops->set_rate)
+ return -ENOSYS;
+
+ return clk_set_rate(pclk, rate);
+}
+
ulong clk_round_rate(struct clk *clk, ulong rate)
{
const struct clk_ops *ops;
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 6ede1b4d4dc..febd5314df2 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
int clk_register(struct clk *clk, const char *drv_name,
const char *name, const char *parent_name)
@@ -61,6 +62,14 @@ ulong clk_generic_get_rate(struct clk *clk)
return clk_get_parent_rate(clk);
}
+ulong clk_generic_set_rate(struct clk *clk, ulong rate)
+{
+ if (clk->flags & CLK_SET_RATE_PARENT)
+ return clk_set_parent_rate(clk, rate);
+
+ return clk_get_parent_rate(clk);
+}
+
const char *clk_hw_get_name(const struct clk *hw)
{
assert(hw);
--
2.43.0
[PATCH v2] test: test for ignore OsIndications
The tests we currently have expect the firmware update to fail
when OsIndications is not set properly. However, we have a Kconfig flag
that explicitly ignores that variable. Adjust the tests accordingly
Signed-off-by: Ilias Apalodimas
---
Changes since v1:
- v1 was rebased incorrectly and only sent half of the patch
.../test_capsule_firmware_raw.py | 21 ++-
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
index a5b5c8a3853a..f3a2dff5c2c8 100644
--- a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
+++ b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
@@ -76,7 +76,7 @@ class TestEfiCapsuleFirmwareRaw:
self, u_boot_config, u_boot_console, efi_capsule_data):
""" Test Case 2
Update U-Boot and U-Boot environment on SPI Flash but with
OsIndications unset
-No update should happen
+No update should happen unless CONFIG_EFI_IGNORE_OSINDICATIONS is set
0x10-0x15: U-Boot binary (but dummy)
0x15-0x20: U-Boot environment (but dummy)
"""
@@ -91,16 +91,27 @@ class TestEfiCapsuleFirmwareRaw:
# reboot
u_boot_console.restart_uboot()
+ignore_os_indications = u_boot_config.buildconfig.get(
+'config_efi_ignore_osindications')
+need_reboot = True if ignore_os_indications else False
+
+capsule_auth = u_boot_config.buildconfig.get(
+'config_efi_capsule_authenticate')
+
capsule_early = u_boot_config.buildconfig.get(
'config_efi_capsule_on_disk_early')
with u_boot_console.log.section('Test Case 2-b, after reboot'):
if not capsule_early:
-exec_manual_update(u_boot_console, disk_img, capsule_files,
False)
+exec_manual_update(u_boot_console, disk_img, capsule_files,
need_reboot)
-check_file_exist(u_boot_console, disk_img, capsule_files)
+if not ignore_os_indications:
+check_file_exist(u_boot_console, disk_img, capsule_files)
-verify_content(u_boot_console, '10', 'u-boot:Old')
-verify_content(u_boot_console, '15', 'u-boot-env:Old')
+expected = 'u-boot:New' if (ignore_os_indications and not
capsule_auth) else 'u-boot:Old'
+verify_content(u_boot_console, '10', expected)
+
+expected = 'u-boot-env:New' if (ignore_os_indications and not
capsule_auth) else 'u-boot-env:Old'
+verify_content(u_boot_console, '15', expected)
def test_efi_capsule_fw3(
self, u_boot_config, u_boot_console, efi_capsule_data):
--
2.43.0
Re: [PATCH] test: test for ignore OsIndications
Hi Heinrich
Please ignore this patch I messed up my rebasing.
I'll send the proper one shortly
On Thu, 4 Jul 2024 at 17:37, Ilias Apalodimas
wrote:
>
> The tests we currently have expect the firmware update to fail
> when OsIndications is not set properly. However, we have a Kconfig flag
> that explicitly ignores that variable and trigers the capsule update
> regardless. Adjust the tests accordingly
>
> Signed-off-by: Ilias Apalodimas
> ---
> .../py/tests/test_efi_capsule/test_capsule_firmware_raw.py | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
> b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
> index 05853578c293..f3a2dff5c2c8 100644
> --- a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
> +++ b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
> @@ -95,6 +95,9 @@ class TestEfiCapsuleFirmwareRaw:
> 'config_efi_ignore_osindications')
> need_reboot = True if ignore_os_indications else False
>
> +capsule_auth = u_boot_config.buildconfig.get(
> +'config_efi_capsule_authenticate')
> +
> capsule_early = u_boot_config.buildconfig.get(
> 'config_efi_capsule_on_disk_early')
> with u_boot_console.log.section('Test Case 2-b, after reboot'):
> @@ -104,10 +107,10 @@ class TestEfiCapsuleFirmwareRaw:
> if not ignore_os_indications:
> check_file_exist(u_boot_console, disk_img, capsule_files)
>
> -expected = 'u-boot:New' if ignore_os_indications else
> 'u-boot:Old'
> +expected = 'u-boot:New' if (ignore_os_indications and not
> capsule_auth) else 'u-boot:Old'
> verify_content(u_boot_console, '10', expected)
>
> -expected = 'u-boot-env:New' if ignore_os_indications else
> 'u-boot-env:Old'
> +expected = 'u-boot-env:New' if (ignore_os_indications and not
> capsule_auth) else 'u-boot-env:Old'
> verify_content(u_boot_console, '15', expected)
>
> def test_efi_capsule_fw3(
> --
> 2.43.0
>
[PATCH] test: test for ignore OsIndications
The tests we currently have expect the firmware update to fail
when OsIndications is not set properly. However, we have a Kconfig flag
that explicitly ignores that variable and trigers the capsule update
regardless. Adjust the tests accordingly
Signed-off-by: Ilias Apalodimas
---
.../py/tests/test_efi_capsule/test_capsule_firmware_raw.py | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
index 05853578c293..f3a2dff5c2c8 100644
--- a/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
+++ b/test/py/tests/test_efi_capsule/test_capsule_firmware_raw.py
@@ -95,6 +95,9 @@ class TestEfiCapsuleFirmwareRaw:
'config_efi_ignore_osindications')
need_reboot = True if ignore_os_indications else False
+capsule_auth = u_boot_config.buildconfig.get(
+'config_efi_capsule_authenticate')
+
capsule_early = u_boot_config.buildconfig.get(
'config_efi_capsule_on_disk_early')
with u_boot_console.log.section('Test Case 2-b, after reboot'):
@@ -104,10 +107,10 @@ class TestEfiCapsuleFirmwareRaw:
if not ignore_os_indications:
check_file_exist(u_boot_console, disk_img, capsule_files)
-expected = 'u-boot:New' if ignore_os_indications else 'u-boot:Old'
+expected = 'u-boot:New' if (ignore_os_indications and not
capsule_auth) else 'u-boot:Old'
verify_content(u_boot_console, '10', expected)
-expected = 'u-boot-env:New' if ignore_os_indications else
'u-boot-env:Old'
+expected = 'u-boot-env:New' if (ignore_os_indications and not
capsule_auth) else 'u-boot-env:Old'
verify_content(u_boot_console, '15', expected)
def test_efi_capsule_fw3(
--
2.43.0
Re: [PATCH 3/3] rockchip: tiger-rk3588: add PCIe support
Am Donnerstag, 4. Juli 2024, 14:53:33 CEST schrieb Quentin Schulz: > From: Quentin Schulz > > This enables PCIe support on Tiger as exposed on > Q7_PCIE[0123]_[RT]X_[PN] signals and more specifically on the `PCI > Express` connector on the Haikou devkit. > > This was tested with a PCIe to NVMe adapter (e.g. > https://www.amazon.de/dp/B07RZZ3TJG). > > Signed-off-by: Quentin Schulz Reviewed-by: Heiko Stuebner pcie enum showed the pci-usb-controller card I plugged in so on a rk3588-tiger Tested-by: Heiko Stuebner > --- > configs/tiger-rk3588_defconfig | 4 > 1 file changed, 4 insertions(+) > > diff --git a/configs/tiger-rk3588_defconfig b/configs/tiger-rk3588_defconfig > index 8fcdd063a3d..8eb1027e449 100644 > --- a/configs/tiger-rk3588_defconfig > +++ b/configs/tiger-rk3588_defconfig > @@ -14,6 +14,7 @@ CONFIG_DEBUG_UART_BASE=0xfeb5 > CONFIG_DEBUG_UART_CLOCK=2400 > # CONFIG_DEBUG_UART_BOARD_INIT is not set > CONFIG_SYS_LOAD_ADDR=0xc00800 > +CONFIG_PCI=y > CONFIG_DEBUG_UART=y > CONFIG_FIT=y > CONFIG_FIT_VERBOSE=y > @@ -41,6 +42,7 @@ CONFIG_CMD_I2C=y > # CONFIG_CMD_LOADB is not set > # CONFIG_CMD_LOADS is not set > CONFIG_CMD_MMC=y > +CONFIG_CMD_PCI=y > # CONFIG_CMD_SF is not set > CONFIG_CMD_USB=y > # CONFIG_CMD_SETEXPR is not set > @@ -89,6 +91,8 @@ CONFIG_PHY_MICREL=y > CONFIG_PHY_MICREL_KSZ90X1=y > CONFIG_DWC_ETH_QOS=y > CONFIG_DWC_ETH_QOS_ROCKCHIP=y > +CONFIG_NVME_PCI=y > +CONFIG_PCIE_DW_ROCKCHIP=y > CONFIG_PHY_ROCKCHIP_INNO_USB2=y > CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y > CONFIG_PHY_ROCKCHIP_USBDP=y > >
Re: [PATCH v2 4/8] usb: cdns: starfive: Add cdns USB driver
On 04/07/2024 08:50, Minda Chen wrote:
> Add cdns USB3 wrapper driver.
>
> Signed-off-by: Minda Chen
> ---
> drivers/usb/cdns3/Kconfig | 7 ++
> drivers/usb/cdns3/Makefile | 2 +
> drivers/usb/cdns3/cdns3-starfive.c | 183 +
> 3 files changed, 192 insertions(+)
> create mode 100644 drivers/usb/cdns3/cdns3-starfive.c
>
> diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig
> index 35b61497d9..f8f363982b 100644
> --- a/drivers/usb/cdns3/Kconfig
> +++ b/drivers/usb/cdns3/Kconfig
> @@ -55,4 +55,11 @@ config USB_CDNS3_TI
> help
> Say 'Y' here if you are building for Texas Instruments
> platforms that contain Cadence USB3 controller core. E.g.: J721e.
> +
> +config USB_CDNS3_STARFIVE
> + tristate "Cadence USB3 support on Starfive platforms"
> + default USB_CDNS3
> + help
> + Say 'Y' here if you are building for Starfive platforms
> + that contain Cadence USB3 controller core. E.g.: JH7110.
> endif
> diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile
> index 18d7190755..03d1eadb2f 100644
> --- a/drivers/usb/cdns3/Makefile
> +++ b/drivers/usb/cdns3/Makefile
> @@ -9,3 +9,5 @@ cdns3-$(CONFIG_$(SPL_)USB_CDNS3_GADGET) += gadget.o
> ep0.o
> cdns3-$(CONFIG_$(SPL_)USB_CDNS3_HOST)+= host.o
>
> obj-$(CONFIG_USB_CDNS3_TI) += cdns3-ti.o
> +
> +obj-$(CONFIG_USB_CDNS3_STARFIVE) += cdns3-starfive.o
> diff --git a/drivers/usb/cdns3/cdns3-starfive.c
> b/drivers/usb/cdns3/cdns3-starfive.c
> new file mode 100644
> index 00..660833fb5b
> --- /dev/null
> +++ b/drivers/usb/cdns3/cdns3-starfive.c
> @@ -0,0 +1,183 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * cdns3-starfive.c - StarFive specific Glue layer for Cadence USB Controller
> + *
> + * Copyright (C) 2024 StarFive Technology Co., Ltd.
> + *
> + * Author: Minda Chen
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "core.h"
> +
> +#define USB_STRAP_HOST BIT(17)
> +#define USB_STRAP_DEVICE BIT(18)
> +#define USB_STRAP_MASK GENMASK(18, 16)
> +
> +#define USB_SUSPENDM_HOSTBIT(19)
> +#define USB_SUSPENDM_MASKBIT(19)
> +
> +#define USB_MISC_CFG_MASKGENMASK(23, 20)
> +#define USB_SUSPENDM_BYPSBIT(20)
> +#define USB_PLL_EN BIT(22)
> +#define USB_REFCLK_MODE BIT(23)
> +
> +struct cdns_starfive {
> + struct udevice *dev;
> + struct regmap *stg_syscon;
> + struct reset_ctl_bulk resets;
> + struct clk_bulk clks;
> + u32 stg_usb_mode;
> + enum usb_dr_mode mode;
> +};
> +
> +static void cdns_mode_init(struct cdns_starfive *data, enum usb_dr_mode mode)
> +{
> + unsigned int strap, suspendm;
> +
> + regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
> +USB_MISC_CFG_MASK,
> +USB_SUSPENDM_BYPS | USB_PLL_EN | USB_REFCLK_MODE);
> +
> + switch (mode) {
> + case USB_DR_MODE_HOST:
> + strap = USB_STRAP_HOST;
> + suspendm = USB_SUSPENDM_HOST;
> + break;
> +
> + case USB_DR_MODE_PERIPHERAL:
> + strap = USB_STRAP_DEVICE;
> + suspendm = 0;
> + break;
> + default:
> + return;
> + }
> +
> + regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
> +USB_STRAP_MASK, strap);
> + regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
> +USB_SUSPENDM_MASK, suspendm);
> +}
> +
> +static void cdns_clk_rst_deinit(struct cdns_starfive *data)
> +{
> + reset_assert_bulk(>resets);
> + clk_disable_bulk(>clks);
> +}
> +
> +static int cdns_clk_rst_init(struct cdns_starfive *data)
> +{
> + int ret;
> +
> + ret = clk_get_bulk(data->dev, >clks);
> + if (ret)
> + return ret;
> +
> + ret = reset_get_bulk(data->dev, >resets);
> + if (ret)
> + goto err_clk;
> +
> + ret = clk_enable_bulk(>clks);
> + if (ret)
> + goto err_en_clk;
> +
> + ret = reset_deassert_bulk(>resets);
> + if (ret)
> + goto err_reset;
> +
> + return 0;
> +
> +err_reset:
> + clk_disable_bulk(>clks);
> +err_en_clk:
> + reset_release_bulk(>resets);
> +err_clk:
> + clk_release_bulk(>clks);
> +
> + return ret;
> +}
> +
> +static int cdns_starfive_get_syscon(struct cdns_starfive *data)
> +{
> + struct ofnode_phandle_args phandle;
> + int ret;
> +
> + ret = dev_read_phandle_with_args(data->dev, "starfive,stg-syscon",
> NULL, 1, 0,
> + );
> +
unnecessary blank line
> + if (ret < 0) {
> + dev_err(data->dev, "Can't get stg cfg phandle: %d\n", ret);
> + return ret;
> + }
> +
> + data->stg_syscon =
Re: [PATCH v2 3/8] phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
On 04/07/2024 08:50, Minda Chen wrote:
> Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
> PHY driver and can be used as USB 3.0 driver.
>
> Signed-off-by: Minda Chen
> ---
> drivers/phy/starfive/Kconfig | 7 +
> drivers/phy/starfive/Makefile | 1 +
> drivers/phy/starfive/phy-jh7110-pcie.c | 202 +
> 3 files changed, 210 insertions(+)
> create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c
>
> diff --git a/drivers/phy/starfive/Kconfig b/drivers/phy/starfive/Kconfig
> index 11a819f8b2..5d49684bc7 100644
> --- a/drivers/phy/starfive/Kconfig
> +++ b/drivers/phy/starfive/Kconfig
> @@ -4,6 +4,13 @@
>
> menu "Starfive PHY driver"
>
> +config PHY_STARFIVE_JH7110_PCIE
> +bool "Starfive JH7110 PCIe 2.0 PHY driver"
> +select PHY
> +help
> + Enable this to support the Starfive JH7110 PCIE 2.0/USB 3.0 PHY.
> + Generic PHY driver JH7110 USB 3.0/ PCIe 2.0.
> +
> config PHY_STARFIVE_JH7110_USB2
> bool "Starfive JH7110 USB 2.0 PHY driver"
> select PHY
> diff --git a/drivers/phy/starfive/Makefile b/drivers/phy/starfive/Makefile
> index a405a75e34..82f25aa21b 100644
> --- a/drivers/phy/starfive/Makefile
> +++ b/drivers/phy/starfive/Makefile
> @@ -3,4 +3,5 @@
> # Copyright (C) 2023 Starfive
> #
>
> +obj-$(CONFIG_PHY_STARFIVE_JH7110_PCIE) += phy-jh7110-pcie.o
> obj-$(CONFIG_PHY_STARFIVE_JH7110_USB2) += phy-jh7110-usb2.o
> diff --git a/drivers/phy/starfive/phy-jh7110-pcie.c
> b/drivers/phy/starfive/phy-jh7110-pcie.c
> new file mode 100644
> index 00..57d5d8bf53
> --- /dev/null
> +++ b/drivers/phy/starfive/phy-jh7110-pcie.c
> @@ -0,0 +1,202 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * StarFive JH7110 PCIe 2.0 PHY driver
> + *
> + * Copyright (C) 2024 StarFive Technology Co., Ltd.
> + * Author: Minda Chen
> + */
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define PCIE_KVCO_LEVEL_OFF 0x28
> +#define PCIE_USB3_PHY_PLL_CTL_OFF0x7c
> +#define PCIE_USB3_PHY_SS_MODEBIT(4)
> +#define PCIE_KVCO_TUNE_SIGNAL_OFF0x80
> +#define PHY_KVCO_FINE_TUNE_LEVEL 0x91
> +#define PHY_KVCO_FINE_TUNE_SIGNALS 0xc
> +
> +#define USB_PDRSTN_SPLIT BIT(17)
> +
> +#define PCIE_USB3_PHY_MODE BIT(20)
> +#define PCIE_PHY_MODE_MASK GENMASK(21, 20)
> +#define PCIE_USB3_BUS_WIDTH_MASK GENMASK(3, 2)
> +#define PCIE_BUS_WIDTH BIT(3)
> +#define PCIE_USB3_RATE_MASK GENMASK(6, 5)
> +#define PCIE_USB3_RX_STANDBY_MASKBIT(7)
> +#define PCIE_USB3_PHY_ENABLE BIT(4)
> +
> +struct jh7110_pcie_phy {
> + struct phy *phy;
> + struct regmap *stg_syscon;
> + struct regmap *sys_syscon;
> + void __iomem *regs;
> + u32 sys_phy_connect;
> + u32 stg_pcie_mode;
> + u32 stg_pcie_usb;
> + enum phy_mode mode;
> +};
> +
> +static int phy_pcie_mode_set(struct jh7110_pcie_phy *data, bool usb_mode)
> +{
> + unsigned int phy_mode, width, usb3_phy, ss_mode;
> +
> + /* default is PCIe mode */
> + if (!data->stg_syscon || !data->sys_syscon) {
> + if (usb_mode) {
> + dev_err(data->phy->dev, "doesn't support usb3 mode\n");
> + return -EINVAL;
> + }
> + return 0;
> + }
> +
> + if (usb_mode) {
> + phy_mode = PCIE_USB3_PHY_MODE;
> + width = 0;
> + usb3_phy = PCIE_USB3_PHY_ENABLE;
> + ss_mode = PCIE_USB3_PHY_SS_MODE;
> + } else {
> + phy_mode = 0;
> + width = PCIE_BUS_WIDTH;
> + usb3_phy = 0;
> + ss_mode = 0;
> + }
> +
> + regmap_update_bits(data->stg_syscon, data->stg_pcie_mode,
> +PCIE_PHY_MODE_MASK, phy_mode);
> + regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
> +PCIE_USB3_BUS_WIDTH_MASK, width);
> + regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
> +PCIE_USB3_PHY_ENABLE, usb3_phy);
> + clrsetbits_le32(data->regs + PCIE_USB3_PHY_PLL_CTL_OFF,
> + PCIE_USB3_PHY_SS_MODE, ss_mode);
> +
> + regmap_update_bits(data->sys_syscon, data->sys_phy_connect,
> +USB_PDRSTN_SPLIT, 0);
> +
> + return 0;
> +}
> +
> +static void phy_kvco_gain_set(struct jh7110_pcie_phy *phy)
> +{
> + /* PCIe Multi-PHY PLL KVCO Gain fine tune settings: */
> + writel(PHY_KVCO_FINE_TUNE_LEVEL, phy->regs + PCIE_KVCO_LEVEL_OFF);
> + writel(PHY_KVCO_FINE_TUNE_SIGNALS, phy->regs +
> PCIE_KVCO_TUNE_SIGNAL_OFF);
> +}
> +
> +static int jh7110_pcie_phy_set_mode(struct phy *_phy,
> + enum phy_mode mode, int submode)
> +{
> + struct udevice *dev = _phy->dev;
> + struct jh7110_pcie_phy *phy = dev_get_priv(dev);
> + int ret;
> +
> + if
Re: [PATCH 2/3] rockchip: jaguar-rk3588: add PCIe M.2 M-KEY NVMe support
Am Donnerstag, 4. Juli 2024, 14:53:32 CEST schrieb Quentin Schulz: > From: Quentin Schulz > > Jaguar has an M.2 M-KEY slot for NVMes, connected to the PCIe3 4-lane > PHY on RK3588. > > CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y is technically not necessary since > it's required only for the M.2 E-KEY slot on the main PCB, but that is > used typically for WiFi+BT modules, or on the mezzanine connector but > the features exposed behind that connector aren't supported in U-Boot > (no DT for it right now). However, if the PHY driver is missing, we get > the following error message: > pcie_dw_rockchip pcie@fe17: failed to get pcie phy (ret=-19) > > and you would need to know which PCIe controller that is before deciding > to ignore it. While after enabling the PHY driver, we are greeted with: > pcie_dw_rockchip pcie@fe17: PCIe-2 Link Fail > which is a bit more acceptable (to me). > > The other option would be to disable the PCIe2 PHYs/controllers in the > DT, which I'm not too fond of. > > Signed-off-by: Quentin Schulz Reviewed-by: Heiko Stuebner pcie enum + nvme scan has shown the nvme installed on the board so on a rk3588-jaguar Tested-by: Heiko Stuebner > configs/jaguar-rk3588_defconfig | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig > index 36bf34d97c8..18006467dde 100644 > --- a/configs/jaguar-rk3588_defconfig > +++ b/configs/jaguar-rk3588_defconfig > @@ -13,6 +13,7 @@ CONFIG_TARGET_JAGUAR_RK3588=y > CONFIG_DEBUG_UART_BASE=0xfeb5 > CONFIG_DEBUG_UART_CLOCK=2400 > CONFIG_SYS_LOAD_ADDR=0xc00800 > +CONFIG_PCI=y > CONFIG_DEBUG_UART=y > CONFIG_FIT=y > CONFIG_FIT_VERBOSE=y > @@ -40,6 +41,7 @@ CONFIG_CMD_I2C=y > # CONFIG_CMD_LOADB is not set > # CONFIG_CMD_LOADS is not set > CONFIG_CMD_MMC=y > +CONFIG_CMD_PCI=y > # CONFIG_CMD_SF is not set > CONFIG_CMD_USB=y > # CONFIG_CMD_SETEXPR is not set > @@ -88,7 +90,10 @@ CONFIG_PHY_MICREL=y > CONFIG_PHY_MICREL_KSZ90X1=y > CONFIG_DWC_ETH_QOS=y > CONFIG_DWC_ETH_QOS_ROCKCHIP=y > +CONFIG_NVME_PCI=y > +CONFIG_PCIE_DW_ROCKCHIP=y > CONFIG_PHY_ROCKCHIP_INNO_USB2=y > +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y > CONFIG_SPL_PINCTRL=y > CONFIG_DM_PMIC=y > CONFIG_PMIC_RK8XX=y > >
Re: [PATCH 1/3] arm64: dts: rockchip: add PCIe3 support on rk3588-jaguar
Am Donnerstag, 4. Juli 2024, 14:53:31 CEST schrieb Quentin Schulz:
> From: Heiko Stuebner
>
> The Jaguar SBC provides an M.2 slot connected to the pcie3 controller.
> In contrast to a number of other boards the pcie-refclk is gpio-controlled,
> so the necessary clock and is added to the list of pcie3 clocks.
>
> Signed-off-by: Heiko Stuebner
> Reviewed-by: Quentin Schulz
> Link: https://lore.kernel.org/r/20240423074956.2622318-1-he...@sntech.de
> Signed-off-by: Heiko Stuebner
>
> [ upstream commit: 0ec7e1096332bc2b9bc881c21cfd234058f747b3 ]
>
> (cherry picked from commit 76a89655ae740dddb57187b5b52071ed99187452)
on a rk3588-jaguar
Tested-by: Heiko Stuebner
> ---
> dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts | 59
> +++
> 1 file changed, 59 insertions(+)
>
> diff --git a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts
> b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts
> index 7d7303f8ecb..678ed8b4dcc 100644
> --- a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts
> +++ b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts
> @@ -72,6 +72,27 @@
> };
> };
>
> + /*
> + * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE
> + * clock generator.
> + * The clock output is gated via the OE pin on the clock generator.
> + * This is modeled as a fixed-clock plus a gpio-gate-clock.
> + */
> + pcie_refclk_gen: pcie-refclk-gen-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <1>;
> + };
> +
> + pcie_refclk: pcie-refclk-clock {
> + compatible = "gpio-gate-clock";
> + clocks = <_refclk_gen>;
> + #clock-cells = <0>;
> + enable-gpios = < RK_PC6 GPIO_ACTIVE_LOW>; /*
> PCIE30X4_CLKREQN_M0 */
> + pinctrl-names = "default";
> + pinctrl-0 = <_clkreqn_m0>;
> + };
> +
> pps {
> compatible = "pps-gpio";
> gpios = < RK_PD5 GPIO_ACTIVE_HIGH>;
> @@ -353,6 +374,30 @@
> status = "okay";
> };
>
> + {
> + status = "okay";
> +};
> +
> + {
> + /*
> + * The board has a gpio-controlled "pcie_refclk" generator,
> + * so add it to the list of clocks.
> + */
> + clocks = < ACLK_PCIE_4L_MSTR>, < ACLK_PCIE_4L_SLV>,
> + < ACLK_PCIE_4L_DBI>, < PCLK_PCIE_4L>,
> + < CLK_PCIE_AUX0>, < CLK_PCIE4L_PIPE>,
> + <_refclk>;
> + clock-names = "aclk_mst", "aclk_slv",
> + "aclk_dbi", "pclk",
> + "aux", "pipe",
> + "ref";
> + pinctrl-names = "default";
> + pinctrl-0 = <_waken_m0 _perstn_m0>;
> + reset-gpios = < RK_PD0 GPIO_ACTIVE_HIGH>; /* PCIE30X4_PERSTN_M0 */
> + vpcie3v3-supply = <_mdot2>;
> + status = "okay";
> +};
> +
> {
> emmc {
> emmc_reset: emmc-reset {
> @@ -371,6 +416,20 @@
> rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO _pull_none>;
> };
> };
> +
> + pcie30x4 {
> + pcie30x4_clkreqn_m0: pcie30x4-clkreqn-m0 {
> + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO _pull_none>;
> + };
> +
> + pcie30x4_perstn_m0: pcie30x4-perstn-m0 {
> + rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO _pull_none>;
> + };
> +
> + pcie30x4_waken_m0: pcie30x4-waken-m0 {
> + rockchip,pins = <0 RK_PC7 12 _pull_none>;
> + };
> + };
> };
>
> {
>
>
Re: [PATCH v2 3/8] phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
On 04/07/2024 08:50, Minda Chen wrote:
> Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
> PHY driver and can be used as USB 3.0 driver.
>
> Signed-off-by: Minda Chen
> ---
> drivers/phy/starfive/Kconfig | 7 +
> drivers/phy/starfive/Makefile | 1 +
> drivers/phy/starfive/phy-jh7110-pcie.c | 202 +
> 3 files changed, 210 insertions(+)
> create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c
>
> diff --git a/drivers/phy/starfive/Kconfig b/drivers/phy/starfive/Kconfig
> index 11a819f8b2..5d49684bc7 100644
> --- a/drivers/phy/starfive/Kconfig
> +++ b/drivers/phy/starfive/Kconfig
> @@ -4,6 +4,13 @@
>
> menu "Starfive PHY driver"
>
> +config PHY_STARFIVE_JH7110_PCIE
> +bool "Starfive JH7110 PCIe 2.0 PHY driver"
> +select PHY
> +help
> + Enable this to support the Starfive JH7110 PCIE 2.0/USB 3.0 PHY.
> + Generic PHY driver JH7110 USB 3.0/ PCIe 2.0.
Should be aligned to previous line.
> +
> config PHY_STARFIVE_JH7110_USB2
> bool "Starfive JH7110 USB 2.0 PHY driver"
> select PHY
> diff --git a/drivers/phy/starfive/Makefile b/drivers/phy/starfive/Makefile
> index a405a75e34..82f25aa21b 100644
> --- a/drivers/phy/starfive/Makefile
> +++ b/drivers/phy/starfive/Makefile
> @@ -3,4 +3,5 @@
> # Copyright (C) 2023 Starfive
> #
>
> +obj-$(CONFIG_PHY_STARFIVE_JH7110_PCIE) += phy-jh7110-pcie.o
> obj-$(CONFIG_PHY_STARFIVE_JH7110_USB2) += phy-jh7110-usb2.o
> diff --git a/drivers/phy/starfive/phy-jh7110-pcie.c
> b/drivers/phy/starfive/phy-jh7110-pcie.c
> new file mode 100644
> index 00..57d5d8bf53
> --- /dev/null
> +++ b/drivers/phy/starfive/phy-jh7110-pcie.c
> @@ -0,0 +1,202 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * StarFive JH7110 PCIe 2.0 PHY driver
> + *
> + * Copyright (C) 2024 StarFive Technology Co., Ltd.
> + * Author: Minda Chen
> + */
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define PCIE_KVCO_LEVEL_OFF 0x28
> +#define PCIE_USB3_PHY_PLL_CTL_OFF0x7c
> +#define PCIE_USB3_PHY_SS_MODEBIT(4)
extra tab?
> +#define PCIE_KVCO_TUNE_SIGNAL_OFF0x80
> +#define PHY_KVCO_FINE_TUNE_LEVEL 0x91
> +#define PHY_KVCO_FINE_TUNE_SIGNALS 0xc
> +
> +#define USB_PDRSTN_SPLIT BIT(17)
> +
> +#define PCIE_USB3_PHY_MODE BIT(20)
> +#define PCIE_PHY_MODE_MASK GENMASK(21, 20)
> +#define PCIE_USB3_BUS_WIDTH_MASK GENMASK(3, 2)
> +#define PCIE_BUS_WIDTH BIT(3)
> +#define PCIE_USB3_RATE_MASK GENMASK(6, 5)
> +#define PCIE_USB3_RX_STANDBY_MASKBIT(7)
> +#define PCIE_USB3_PHY_ENABLE BIT(4)
Why not use define and use regmap_fields? You are already using regmap.
> +
> +struct jh7110_pcie_phy {
> + struct phy *phy;
> + struct regmap *stg_syscon;
> + struct regmap *sys_syscon;
> + void __iomem *regs;
> + u32 sys_phy_connect;
> + u32 stg_pcie_mode;
> + u32 stg_pcie_usb;
> + enum phy_mode mode;
> +};
> +
> +static int phy_pcie_mode_set(struct jh7110_pcie_phy *data, bool usb_mode)
> +{
> + unsigned int phy_mode, width, usb3_phy, ss_mode;
> +
> + /* default is PCIe mode */
> + if (!data->stg_syscon || !data->sys_syscon) {
> + if (usb_mode) {
> + dev_err(data->phy->dev, "doesn't support usb3 mode\n");
> + return -EINVAL;
> + }
> + return 0;
> + }
> +
> + if (usb_mode) {
> + phy_mode = PCIE_USB3_PHY_MODE;
> + width = 0;
> + usb3_phy = PCIE_USB3_PHY_ENABLE;
> + ss_mode = PCIE_USB3_PHY_SS_MODE;
> + } else {
> + phy_mode = 0;
> + width = PCIE_BUS_WIDTH;
> + usb3_phy = 0;
> + ss_mode = 0;
> + }
> +
> + regmap_update_bits(data->stg_syscon, data->stg_pcie_mode,
> +PCIE_PHY_MODE_MASK, phy_mode);
> + regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
> +PCIE_USB3_BUS_WIDTH_MASK, width);
> + regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
> +PCIE_USB3_PHY_ENABLE, usb3_phy);
> + clrsetbits_le32(data->regs + PCIE_USB3_PHY_PLL_CTL_OFF,
> + PCIE_USB3_PHY_SS_MODE, ss_mode);
> +
> + regmap_update_bits(data->sys_syscon, data->sys_phy_connect,
> +USB_PDRSTN_SPLIT, 0);
> +
> + return 0;
> +}
> +
> +static void phy_kvco_gain_set(struct jh7110_pcie_phy *phy)
> +{
> + /* PCIe Multi-PHY PLL KVCO Gain fine tune settings: */
> + writel(PHY_KVCO_FINE_TUNE_LEVEL, phy->regs + PCIE_KVCO_LEVEL_OFF);
> + writel(PHY_KVCO_FINE_TUNE_SIGNALS, phy->regs +
> PCIE_KVCO_TUNE_SIGNAL_OFF);
> +}
> +
> +static int jh7110_pcie_phy_set_mode(struct phy *_phy,
> + enum phy_mode mode, int submode)
> +{
> +
Re: [PATCH v2 2/8] phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
On 04/07/2024 08:50, Minda Chen wrote:
> Add Starfive JH7110 USB 2.0 PHY driver, which is generic
> PHY driver.
>
> Signed-off-by: Minda Chen
> ---
> drivers/phy/Kconfig| 1 +
> drivers/phy/Makefile | 1 +
> drivers/phy/starfive/Kconfig | 14 +++
> drivers/phy/starfive/Makefile | 6 ++
> drivers/phy/starfive/phy-jh7110-usb2.c | 135 +
> 5 files changed, 157 insertions(+)
> create mode 100644 drivers/phy/starfive/Kconfig
> create mode 100644 drivers/phy/starfive/Makefile
> create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
>
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 8f767877e7..0c4d63a01f 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -307,5 +307,6 @@ source "drivers/phy/cadence/Kconfig"
> source "drivers/phy/ti/Kconfig"
> source "drivers/phy/qcom/Kconfig"
> source "drivers/phy/renesas/Kconfig"
> +source "drivers/phy/starfive/Kconfig"
>
> endmenu
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index 7a2b764492..6ac867350c 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -44,3 +44,4 @@ obj-y += cadence/
> obj-y += ti/
> obj-y += qcom/
> obj-y += renesas/
> +obj-y += starfive/
> diff --git a/drivers/phy/starfive/Kconfig b/drivers/phy/starfive/Kconfig
> new file mode 100644
> index 00..11a819f8b2
> --- /dev/null
> +++ b/drivers/phy/starfive/Kconfig
> @@ -0,0 +1,14 @@
> +#
> +# Phy drivers for Starfive platforms
PHY?
> +#
> +
> +menu "Starfive PHY driver"
> +
> +config PHY_STARFIVE_JH7110_USB2
> + bool "Starfive JH7110 USB 2.0 PHY driver"
> + select PHY
> + help
> + Enable this to support the Starfive JH7110 USB 2.0 PHY.
> + Generic PHY driver JH7110 USB 2.0.
> +
> +endmenu
> diff --git a/drivers/phy/starfive/Makefile b/drivers/phy/starfive/Makefile
> new file mode 100644
> index 00..a405a75e34
> --- /dev/null
> +++ b/drivers/phy/starfive/Makefile
> @@ -0,0 +1,6 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2023 Starfive
> +#
> +
> +obj-$(CONFIG_PHY_STARFIVE_JH7110_USB2) += phy-jh7110-usb2.o
> diff --git a/drivers/phy/starfive/phy-jh7110-usb2.c
> b/drivers/phy/starfive/phy-jh7110-usb2.c
> new file mode 100644
> index 00..d48c9f8a74
> --- /dev/null
> +++ b/drivers/phy/starfive/phy-jh7110-usb2.c
> @@ -0,0 +1,135 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * StarFive JH7110 USB 2.0 PHY driver
> + *
> + * Copyright (C) 2024 StarFive Technology Co., Ltd.
> + * Author: Minda Chen
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define USB_LS_KEEPALIVE_OFF 0x4
> +#define USB_LS_KEEPALIVE_ENABLE BIT(4)
> +#define USB_PHY_CLK_RATE 12500
> +
> +struct jh7110_usb2_phy {
> + struct phy *phy;
> + void __iomem *regs;
> + struct clk *usb_125m_clk;
> + struct clk *app_125m;
> + enum phy_mode mode;
> +};
> +
> +static void usb2_set_ls_keepalive(struct jh7110_usb2_phy *phy, bool set)
> +{
> + /* Host mode enable the LS speed keep-alive signal */
> + if (set)
> + clrsetbits_le32(phy->regs + USB_LS_KEEPALIVE_OFF,
> + USB_LS_KEEPALIVE_ENABLE,
> + USB_LS_KEEPALIVE_ENABLE);
> + else
> + clrsetbits_le32(phy->regs + USB_LS_KEEPALIVE_OFF,
> + USB_LS_KEEPALIVE_ENABLE, 0);
> +}
> +
> +static int usb2_phy_set_mode(struct phy *_phy,
> + enum phy_mode mode, int submode)
> +{
> + struct udevice *dev = _phy->dev;
> + struct jh7110_usb2_phy *phy = dev_get_priv(dev);
> +
> + if (mode == phy->mode)
> + return 0;
> +
> + switch (mode) {
> + case PHY_MODE_USB_HOST:
> + case PHY_MODE_USB_DEVICE:
> + case PHY_MODE_USB_OTG:
> + dev_dbg(dev, "Changing phy to %d\n", mode);
> + phy->mode = mode;
> + usb2_set_ls_keepalive(phy, (mode != PHY_MODE_USB_DEVICE));
> + break;
> + default:
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static int jh7110_usb2_phy_init(struct phy *_phy)
> +{
> + struct udevice *dev = _phy->dev;
> + struct jh7110_usb2_phy *phy = dev_get_priv(dev);
> + int ret;
> +
> + ret = clk_set_rate(phy->usb_125m_clk, USB_PHY_CLK_RATE);
> + if (ret < 0) {
> + dev_err(dev, "Failed to set 125m clock\n");
> + return ret;
> + }
> +
> + return clk_prepare_enable(phy->app_125m);
> +}
> +
> +static int jh7110_usb2_phy_exit(struct phy *_phy)
> +{
> + struct udevice *dev = _phy->dev;
> + struct jh7110_usb2_phy *phy = dev_get_priv(dev);
> +
> + clk_disable_unprepare(phy->app_125m);
> +
> + return 0;
> +}
> +
> +struct phy_ops jh7110_usb2_phy_ops = {
> + .init =
Re: [PATCH v2 1/8] usb: cdns3: Set USB PHY mode in cdns3_core_init_role()
Hi,
On 04/07/2024 08:50, Minda Chen wrote:
> USB PHY maybe need to set PHY mode in different USB
> dr mode. So translate to generic PHY mode and call
> generic_phy_set_mode().
>
> Signed-off-by: Minda Chen
> ---
> drivers/usb/cdns3/core.c | 25 +
> 1 file changed, 25 insertions(+)
>
> diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
> index 12a741c6ea..1e863bed89 100644
> --- a/drivers/usb/cdns3/core.c
> +++ b/drivers/usb/cdns3/core.c
> @@ -107,6 +107,7 @@ static int cdns3_core_init_role(struct cdns3 *cdns)
> {
> struct udevice *dev = cdns->dev;
> enum usb_dr_mode best_dr_mode;
> + int mode = PHY_MODE_INVALID;
> enum usb_dr_mode dr_mode;
> int ret = 0;
>
> @@ -173,6 +174,30 @@ static int cdns3_core_init_role(struct cdns3 *cdns)
>
> cdns->dr_mode = dr_mode;
>
> + if (cdns->dr_mode == USB_DR_MODE_HOST) {
> + mode = PHY_MODE_USB_HOST;
> + } else if (cdns->dr_mode == USB_DR_MODE_PERIPHERAL) {
> + mode = PHY_MODE_USB_DEVICE;
> + } else if (cdns->dr_mode == USB_DR_MODE_OTG) {
> + mode = PHY_MODE_USB_OTG;
> + } else {
> + dev_err(dev, "Unknown dr mode %d\n", cdns->dr_mode);
> + ret = -EINVAL;
> + goto err;
> + }
> +
> + ret = generic_phy_set_mode(>usb2_phy, mode, 0);
> + if (ret) {
> + dev_err(dev, "Set usb 2.0 PHY mode failed %d\n", ret);
> + goto err;
> + }
> +
> + ret = generic_phy_set_mode(>usb3_phy, mode, 0);
> + if (ret) {
> + dev_err(dev, "Set usb 3.0 PHY mode failed %d\n", ret);
> + goto err;
> + }
> +
Should we be doing the above inside cdns3_drd_update_mode() so that the
PHY can be put in the correct state even during role switches?
> ret = cdns3_drd_update_mode(cdns);
> if (ret)
> goto err;
--
cheers,
-roger
Re: [PATCH v2 0/7] Add Starfive JH7110 Cadence USB driver
On 7/4/24 07:50, Minda Chen wrote:
Add Starfive JH7110 Cadence USB driver and related PHY driver.
So the codes can be used in visionfive2 and star64 7110 board.
The driver is almost the same with kernel driver.
Test with Star64 JH7110 board USB 3.0 + USB 2.0 host.
The code can work.
- Star64 using USB 3.0 and USB 2.0 host must add below board dts setting.
Does this mean a future patch for spl_fdt_fixup_star64() is needed?
Did you also have a look at the USB on the Milk V Mars CM?
Best regards
Heinrich
1. usb pin setting
usb_pins: usb0-0 {
driver-vbus-pin {
pinmux = ;
bias-disable;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
};
2. related dts node setting.
{
status = "disabled";
};
{
starfive,sys-syscon = <_syscon 0x18>;
starfive,stg-syscon = <_syscon 0x148 0x1f4>;
status = "okay";
};
{
pinctrl-names = "default";
pinctrl-0 = <_pins>;
status = "okay";
};
_cdns3 {
phys = <>, <>;
phy-names = "cdns3,usb2-phy", "cdns3,usb3-phy";
dr_mode = "host";
status = "okay";
};
- previous version
v1:
https://patchwork.ozlabs.org/project/uboot/cover/20240504150358.19600-1-minda.c...@starfivetech.com/
- patch description.
patch1: Add set phy mode function in cdns3 core driver
which is used by Starfive JH7110.
patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
patch4: Cadence USB wrapper driver.
patch5: Add JH7110 USB default overcurrent pin.
patch6-8 dts, config and maintainers update.
- change:
v2:
- patch 1 Move the added code to cdns3_core_init_role(). Must
set PHY mode before calling cdns3 role start function.
- patch 1-4 correct the code format.(follow Marek's comments.)
- patch 2 Add set 125M clock in PHY init function.
- Add new patch5.
Minda Chen (8):
usb: cdns3: Set USB PHY mode in cdns3_core_init_role()
phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
usb: cdns: starfive: Add cdns USB driver
pinctrl: starfive: Setup USB default disable overcurrent pin
configs: starfive: Add visionfive2 cadence USB configuration
dts: starfive: Add JH7110 Cadence USB dts node
MAINTAINERS: Update Starfive visionfive2 maintain files.
.../dts/jh7110-starfive-visionfive-2.dtsi | 5 +
arch/riscv/dts/jh7110.dtsi| 52 +
board/starfive/visionfive2/MAINTAINERS| 2 +
configs/starfive_visionfive2_defconfig| 9 +
drivers/phy/Kconfig | 1 +
drivers/phy/Makefile | 1 +
drivers/phy/starfive/Kconfig | 21 ++
drivers/phy/starfive/Makefile | 7 +
drivers/phy/starfive/phy-jh7110-pcie.c| 202 ++
drivers/phy/starfive/phy-jh7110-usb2.c| 135
drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 11 +-
drivers/usb/cdns3/Kconfig | 7 +
drivers/usb/cdns3/Makefile| 2 +
drivers/usb/cdns3/cdns3-starfive.c| 183
drivers/usb/cdns3/core.c | 25 +++
15 files changed, 661 insertions(+), 2 deletions(-)
create mode 100644 drivers/phy/starfive/Kconfig
create mode 100644 drivers/phy/starfive/Makefile
create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c
create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
create mode 100644 drivers/usb/cdns3/cdns3-starfive.c
base-commit: 8937bb265a7f2251c1bd999784a4ef10e9c6080d
zynq_gem without PHY
Dear U-Boot devs/maintainers, We are running Xilinx MPSoC based MicroTCA mezzanine boards that, according to the MicroTCA standard, connect to the crate's Ethernet switch via a 1000BASE-BX interface at the backplane (the interface is basically equivalent to a SFP module; we actually have a bring-up adapter that uses a SFP module to replicate the Ethernet functionality outside a MicroTCA crate). Most of our boards use a PHY in RGMII -> 1000BASE-X mode, but on some other boards a MPSoC MGT is wired directly to the backplane without a PHY in between (and the GEM set to 1000BASE-X mode accordingly). Now the Xilinx GEM driver (drivers/net/zynq_gem.c) assumes there is always a PHY connected to the Ethernet interface, and aborts the GEM initialization if there is no PHY found. In a previous U-Boot version, I have patched zynq_gem.c to just ignore absence of a PHY, but the recent version of the driver accesses priv->phydev quite a lot - so it required a bit of effort to port the patch. Now I'm wondering if I should clean it up and try to upstream it. (Basically, if priv->phydev is null, don't touch it, disable autonegotiation and use speed setting from devicetree). Would a patch like this have any chance of getting upstreamed? Thanks and best regards, Patrick — Deutsches Elektronen-Synchrotron DESY A Research Centre of the Helmholtz Association Notkestraße 85, D-22607 Hamburg E-Mail: patrick.huesm...@desy.de Web: https://msk.desy.de/
RE: [PATCH v1 0/4] Sync StarFive JH7110 clock and reset dt-bindings with Linux
> On 05.06.24 23:38, Conor Dooley wrote:
> On Wed, Jun 05, 2024 at 08:35:15AM -0600, Tom Rini wrote:
> > On Wed, Jun 05, 2024 at 01:56:13AM +, Hal Feng wrote:
> > > > On 04.06.24 04:32, E Shattow wrote:
> > > > Hi Hal,
> > > >
> > > > Instead of manual dt-bindings sync can we please adopt OF_UPSTREAM
> > > > for
> > > > JH7110 ?
> > >
> > > Yeah, I will try to do it recently, although I am not sure whether
> > > the U-Boot drivers and Linux drivers are compatible so that they can use
> > > the
> same DT.
> >
> > They must be compatible so that they can use the same DT, U-Boot needs
> > updating if it doesn't match.
>
> Other than the naming, I think they are compatible. IIRC there were some
> issues
> where U-Boot originally used different numbers to linux, but this was fixed in
> commit 9a12e304dd ("dt-bindings: clock: jh7110: Modify clock id to be same
> with Linux").
I found the Linux DT of VisionFive 2 can not be applied to U-Boot directly.
Some issues
need to be fixed such as making drivers compatible with Linux DT, unifying DT
names.
I am preparing a new patchset. When I finish coding and testing, I will send it
out.
Best regards,
Hal
[PATCH 3/3] rockchip: tiger-rk3588: add PCIe support
From: Quentin Schulz This enables PCIe support on Tiger as exposed on Q7_PCIE[0123]_[RT]X_[PN] signals and more specifically on the `PCI Express` connector on the Haikou devkit. This was tested with a PCIe to NVMe adapter (e.g. https://www.amazon.de/dp/B07RZZ3TJG). Signed-off-by: Quentin Schulz --- configs/tiger-rk3588_defconfig | 4 1 file changed, 4 insertions(+) diff --git a/configs/tiger-rk3588_defconfig b/configs/tiger-rk3588_defconfig index 8fcdd063a3d..8eb1027e449 100644 --- a/configs/tiger-rk3588_defconfig +++ b/configs/tiger-rk3588_defconfig @@ -14,6 +14,7 @@ CONFIG_DEBUG_UART_BASE=0xfeb5 CONFIG_DEBUG_UART_CLOCK=2400 # CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -41,6 +42,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SF is not set CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -89,6 +91,8 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y -- 2.45.2
[PATCH 2/3] rockchip: jaguar-rk3588: add PCIe M.2 M-KEY NVMe support
From: Quentin Schulz Jaguar has an M.2 M-KEY slot for NVMes, connected to the PCIe3 4-lane PHY on RK3588. CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y is technically not necessary since it's required only for the M.2 E-KEY slot on the main PCB, but that is used typically for WiFi+BT modules, or on the mezzanine connector but the features exposed behind that connector aren't supported in U-Boot (no DT for it right now). However, if the PHY driver is missing, we get the following error message: pcie_dw_rockchip pcie@fe17: failed to get pcie phy (ret=-19) and you would need to know which PCIe controller that is before deciding to ignore it. While after enabling the PHY driver, we are greeted with: pcie_dw_rockchip pcie@fe17: PCIe-2 Link Fail which is a bit more acceptable (to me). The other option would be to disable the PCIe2 PHYs/controllers in the DT, which I'm not too fond of. Signed-off-by: Quentin Schulz --- configs/jaguar-rk3588_defconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig index 36bf34d97c8..18006467dde 100644 --- a/configs/jaguar-rk3588_defconfig +++ b/configs/jaguar-rk3588_defconfig @@ -13,6 +13,7 @@ CONFIG_TARGET_JAGUAR_RK3588=y CONFIG_DEBUG_UART_BASE=0xfeb5 CONFIG_DEBUG_UART_CLOCK=2400 CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -40,6 +41,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SF is not set CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -88,7 +90,10 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -- 2.45.2
[PATCH 1/3] arm64: dts: rockchip: add PCIe3 support on rk3588-jaguar
From: Heiko Stuebner
The Jaguar SBC provides an M.2 slot connected to the pcie3 controller.
In contrast to a number of other boards the pcie-refclk is gpio-controlled,
so the necessary clock and is added to the list of pcie3 clocks.
Signed-off-by: Heiko Stuebner
Reviewed-by: Quentin Schulz
Link: https://lore.kernel.org/r/20240423074956.2622318-1-he...@sntech.de
Signed-off-by: Heiko Stuebner
[ upstream commit: 0ec7e1096332bc2b9bc881c21cfd234058f747b3 ]
(cherry picked from commit 76a89655ae740dddb57187b5b52071ed99187452)
---
dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts | 59 +++
1 file changed, 59 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts
b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts
index 7d7303f8ecb..678ed8b4dcc 100644
--- a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts
+++ b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts
@@ -72,6 +72,27 @@
};
};
+ /*
+* 100MHz reference clock for PCIe peripherals from PI6C557-05BLE
+* clock generator.
+* The clock output is gated via the OE pin on the clock generator.
+* This is modeled as a fixed-clock plus a gpio-gate-clock.
+*/
+ pcie_refclk_gen: pcie-refclk-gen-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1>;
+ };
+
+ pcie_refclk: pcie-refclk-clock {
+ compatible = "gpio-gate-clock";
+ clocks = <_refclk_gen>;
+ #clock-cells = <0>;
+ enable-gpios = < RK_PC6 GPIO_ACTIVE_LOW>; /*
PCIE30X4_CLKREQN_M0 */
+ pinctrl-names = "default";
+ pinctrl-0 = <_clkreqn_m0>;
+ };
+
pps {
compatible = "pps-gpio";
gpios = < RK_PD5 GPIO_ACTIVE_HIGH>;
@@ -353,6 +374,30 @@
status = "okay";
};
+ {
+ status = "okay";
+};
+
+ {
+ /*
+* The board has a gpio-controlled "pcie_refclk" generator,
+* so add it to the list of clocks.
+*/
+ clocks = < ACLK_PCIE_4L_MSTR>, < ACLK_PCIE_4L_SLV>,
+< ACLK_PCIE_4L_DBI>, < PCLK_PCIE_4L>,
+< CLK_PCIE_AUX0>, < CLK_PCIE4L_PIPE>,
+<_refclk>;
+ clock-names = "aclk_mst", "aclk_slv",
+ "aclk_dbi", "pclk",
+ "aux", "pipe",
+ "ref";
+ pinctrl-names = "default";
+ pinctrl-0 = <_waken_m0 _perstn_m0>;
+ reset-gpios = < RK_PD0 GPIO_ACTIVE_HIGH>; /* PCIE30X4_PERSTN_M0 */
+ vpcie3v3-supply = <_mdot2>;
+ status = "okay";
+};
+
{
emmc {
emmc_reset: emmc-reset {
@@ -371,6 +416,20 @@
rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO _pull_none>;
};
};
+
+ pcie30x4 {
+ pcie30x4_clkreqn_m0: pcie30x4-clkreqn-m0 {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO _pull_none>;
+ };
+
+ pcie30x4_perstn_m0: pcie30x4-perstn-m0 {
+ rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO _pull_none>;
+ };
+
+ pcie30x4_waken_m0: pcie30x4-waken-m0 {
+ rockchip,pins = <0 RK_PC7 12 _pull_none>;
+ };
+ };
};
{
--
2.45.2
[PATCH 0/3] rockchip: enable PCIe/NVMe support for Theobroma RK3588 devices
Jaguar has an M.2 M-KEY slot for NVMes and Tiger exposes the signals to the Q7 connector which is then routed on the Haikou devkit's `PCI Express` connector. With the help of a PCIe to NVMe adapter, NVMes can be used on Tiger Haikou as well. Signed-off-by: Quentin Schulz --- Heiko Stuebner (1): arm64: dts: rockchip: add PCIe3 support on rk3588-jaguar Quentin Schulz (2): rockchip: jaguar-rk3588: add PCIe M.2 M-KEY NVMe support rockchip: tiger-rk3588: add PCIe support configs/jaguar-rk3588_defconfig | 5 ++ configs/tiger-rk3588_defconfig| 4 ++ dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts | 59 +++ 3 files changed, 68 insertions(+) --- base-commit: 0f073e022ddc5070e5df1d053e4bdc1874fbcc0f change-id: 20240704-tsd-rk3588-nvme-aa133c24cb9e Best regards, -- Quentin Schulz
Re: [PATCH] msc_sm2s_imx8mp: Adjust the initrd_addr location
Hi Tom, On Wed, Jul 3, 2024 at 3:22 PM Tom Rini wrote: > How is the fdt at 0x4300 not being clobbered if the initramfs at > 0x4380 is? Is it because it's just enough of a bad spot that we > relocate the fdt out of the way? With the kernel at 0x4048 > everything else is too low. kernel address + 128MiB for fdt address, then > +512KiB (or a bit more, for nicer numbers) for initrd. Thanks for the suggestion, it works. I sent a v2 with that proposal. Thanks
[PATCH v2] msc_sm2s_imx8mp: Adjust the initrd_addr location
From: Fabio Estevam Booting an initramfs with the current initrd_addr address may lead to initramfs corruption and boot failure. Fix the initramfs problem by applying the following layout suggested by Tom Rini: loadaddr=0x4048 --> Gets moved to 0x4060 in run-time: Uncompressing Kernel Image Moving Image from 0x4048 to 0x4060, end=41e8 fdt_addr_r= moved loadaddr + 128 MiB = 0x4860 initrd_addr=fdt_addr_r + 512 KiB = 0x4868 Signed-off-by: Fabio Estevam Tested-by: Stefano Babic --- Changes since v2: - Apply Tom's suggested layout. - Added Stefano's Tested-by. include/configs/msc_sm2s_imx8mp.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/msc_sm2s_imx8mp.h b/include/configs/msc_sm2s_imx8mp.h index 3c7d96cb3c0..d0c5da7b98d 100644 --- a/include/configs/msc_sm2s_imx8mp.h +++ b/include/configs/msc_sm2s_imx8mp.h @@ -36,10 +36,10 @@ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "image=Image\0" \ "console=ttymxc1,115200\0" \ - "fdt_addr_r=0x4300\0" \ + "fdt_addr_r=0x4860\0" \ "boot_fdt=try\0" \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "initrd_addr=0x4380\0" \ + "initrd_addr=0x4868\0" \ "bootm_size=0x1000\0" \ "mmcpart=1\0" \ "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ -- 2.34.1
Re: [PATCH v2] arm: mvebu: Enable bootstd and other modernization for Synology DS414 (Armada XP) board
Hi Tony,
On Fri, Jun 28, 2024 at 03:44:01PM -0700, Tony Dinh wrote:
> On Fri, Jun 28, 2024 at 3:04 PM Tony Dinh wrote:
> > On Wed, Jun 26, 2024 at 3:31 AM Phil Sutter wrote:
> > > On Sat, Jun 15, 2024 at 03:06:54PM -0700, Tony Dinh wrote:
> > > [...]
> > > > diff --git a/board/Synology/ds414/ds414.c b/board/Synology/ds414/ds414.c
> > > > index abe6f9eb5e..f0b55fa095 100644
> > > > --- a/board/Synology/ds414/ds414.c
> > > > +++ b/board/Synology/ds414/ds414.c
> > > > @@ -181,18 +181,9 @@ int board_init(void)
> > > > return 0;
> > > > }
> > > >
> > > > -int misc_init_r(void)
> > > > +int board_late_init(void)
> > > > {
> > > > - if (!env_get("ethaddr")) {
> > > > - puts("Incomplete environment, populating from SPI
> > > > flash\n");
> > > > - do_syno_populate(0, NULL);
> > > > - }
> > > > - return 0;
> > > > -}
> > >
> > > Could you please leave misc_init_r() in place (along with MISC_INIT_R in
> > > defconfig)? A closer look at doc/README.enetaddr suggests that
> > > implementing this board-specific function which acts if the environment
> > > does not have ethaddr defined already is exactly the right thing to do.
> > > Also, it doesn't conflict with NET_RANDOM_ETHADDR: If do_syno_populate()
> > > succeeds, no random MAC addresses are generated. If I manually remove
> > > the call, random MACs come into play. So having this option enabled
> > > serves as a fallback for boxes which lack the data in flash.
> >
> > Sure I will do that. I was mistaken in assuming that network random
> > addresses were already generated before misc_init_r(). Thanks!
It's nice that we may keep both so there's a fallback if data extraction
from flash fails.
> > > > -int checkboard(void)
> > > > -{
> > > > - puts("Board: DS414\n");
> > > > -
> > > > + /* Do late init to ensure successful enumeration of XHCI devices
> > > > */
> > > > + pci_init();
> > > > return 0;
> > > > }
> > >
> > > FWIW, booting from rear USB port worked fine for me!
> >
> > Cool! That was the main thing I was interested in for sending in this
> > patch. One thing led to another... :)
Which is a bit odd TBH: Scrolling through git history, I found commit
c57f920504297 ("arm: mvebu: configs: ds414: Enable XHCI_PCI by default")
in which I claimed the rear USB ports to be functional after enabling
XHCI_PCI. Took me only three years to forget all the details. :(
> > > > diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
> > > > index ecf9501ba5..501ed51129 100644
> > > > --- a/configs/ds414_defconfig
> > > > +++ b/configs/ds414_defconfig
> > > [...]
> > > > @@ -25,44 +26,40 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000
> > > > CONFIG_SPL=y
> > > > CONFIG_DEBUG_UART_BASE=0xf1012000
> > > > CONFIG_DEBUG_UART_CLOCK=25000
> > > > +CONFIG_IDENT_STRING="\nSynology DS214+/DS414 2/4-Bay Diskstation"
> > > > CONFIG_SYS_LOAD_ADDR=0x80
> > > > CONFIG_PCI=y
> > > > CONFIG_DEBUG_UART=y
> > > > +CONFIG_BOOTSTD_FULL=y
> > > > CONFIG_BOOTDELAY=3
> > > > CONFIG_USE_BOOTARGS=y
> > > > -CONFIG_BOOTARGS="console=ttyS0,115200 ip=off initrd=0x840,8M
> > > > root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2
> > > > flash_size=8 SataLedSpecial=1 HddHotplug=1"
> > > > -CONFIG_USE_BOOTCOMMAND=y
> > > > -CONFIG_BOOTCOMMAND="sf probe; sf read ${loadaddr} 0xd 0x2d; sf
> > > > read ${ramdisk_addr_r} 0x3a 0x43; bootm ${loadaddr}
> > > > ${ramdisk_addr_r}"
> > >
> > > So these should not be necessary anymore with BOOTSTD. I wonder if it is
> > > possible to provide a static bootmeth (or bootflow?) with low priority
> > > which boots the legacy OS from flash. It could hold all the details
> > > instead of the *_legacy env vars introduced below.
> >
> > I recall from bootstd documentation that it is possible to have a
> > bootflow on flash. But it seems a bit too much for this patch. I think
> > we'll have to repartition or find some space on the flash to store
> > that bootflow script.
> >
>
> Sorry I've misread your comment "it is possible to provide a static
> bootmeth (or bootflow?) ". I think by "static bootflow" you must have
> meant we would define it in the board code, and convince bootstd to
> use it as the last boot method (without hunting for it on flash). I'm
> not sure. Perhaps "global bootflow" is something that can be defined
> and used here. I'll have to dig into bootstd documentation a bit more.
Yes, that would be great. Booting legacy should be fairly simple by
calling 'run bootcmd_legacy', though automatically falling back to it is
even better.
BTW: $bootcmd_legacy contains 'run bootargs_legacy' instruction. Are you
sure this is going to work? Shouldn't this be 'setenv bootargs
$bootargs_legacy' instead?
> > > A pending issue for me is inability to 'saveenv' - the flash seems
> > > read-only in that spot. Does it work for you?
> >
> > Yes it does work for me. With the latest u-boot SPI flash driver, as I
> > recall, the entire flash is automatically
Re: [PATCH] arm: mediatek: split config into separate options for the board and SoC
Hi Weijie, > I have a better example for reference: > arch/mips/mach-mtmips > > ARCH_MTMIPS is defined for the entire MediaTek MIPS platform, same as > ARCH_MEDIATEK. > > The mtmips then defined its SoC families: > SOC_MT7620, SOC_MT7621 and SOC_MT7628 > > Each SoC has its own folder and Kconfig, e.g.: > arch/mips/mach-mtmips/mt7620/Kconfig > > Every SoC then defined its own boards, e.g.: > BOARD_MT7620_RFB and BOARD_MT7620_MT7530_RFB > > So you can define configs like SOC_MT7622 (not just MT7622), and treat > TARGET_MT7622 as a board, selecting SOC_MT7622. This will make sure > all mediatek chips have unified SOC_MT > > Other device driver can then be changed to depend on SOC_MT Thank you for the quick response! I will go study that folder and update my patch to be similar so there is consistency with the other MediaTek SoCs. Thanks, Leith
Re: [PATCH v2 0/5] bootstd: Add Android support
Hi Tom, On jeu., juin 20, 2024 at 08:23, Tom Rini wrote: > On Thu, Jun 13, 2024 at 12:13:07PM +0200, Mattijs Korpershoek wrote: > >> Android boot flow is a bit different than a regular Linux distro. >> Android relies on multiple partitions in order to boot. >> >> A typical boot flow would be: >> 1. Parse the Bootloader Control Block (BCB, misc partition) >> 2. If BCB requested bootonce-bootloader, start fastboot and wait. >> 3. If BCB requested recovery or normal android, run the following: >>a. Get slot (A/B) from BCB >>b. Run AVB (Android Verified Boot) on boot partitions >>c. Load boot and vendor_boot partitions >>d. Load device-tree, ramdisk and boot >> >> The AOSP documentation has more details at [1], [2], [3] >> >> This has been implemented via complex boot scripts such as [4]. >> However, these boot script are neither very maintainable nor generic. >> Moreover, DISTRO_DEFAULTS is being deprecated [5]. >> >> Add a generic Android bootflow implementation for bootstd. >> >> For this initial version, only boot image v4 is supported. >> >> This has been tested on sandbox using: >> $ ./test/py/test.py --bd sandbox --build -k test_ut >> >> This has also been tested on the AM62X SK EVM using TI's Android SDK[6] >> To test on TI board, the following (WIP) patch is needed as well: >> https://gitlab.baylibre.com/baylibre/ti/ti-u-boot/-/commit/84cceb912bccd7cdd7f9dd69bca0e5d987a1fd04 >> >> [1] https://source.android.com/docs/core/architecture/bootloader >> [2] https://source.android.com/docs/core/architecture/partitions >> [3] https://source.android.com/docs/core/architecture/partitions/generic-boot >> [4] >> https://source.denx.de/u-boot/u-boot/-/blob/master/include/configs/meson64_android.h >> [5] https://lore.kernel.org/r/all/20230914165615.1058529-17-...@chromium.org/ >> [6] >> https://software-dl.ti.com/processor-sdk-android/esd/AM62X/09_02_00/docs/android/Overview.html > > This leads to failures in CI such as: > === FAILURES > === > ___ test_ut_dm_init_bootstd > > test/py/tests/test_ut.py:555: in test_ut_dm_init_bootstd > setup_android_image(u_boot_console) > test/py/tests/test_ut.py:488: in setup_android_image > with open(boot_img, 'rb') as inf: > E FileNotFoundError: [Errno 2] No such file or directory: > '/tmp/malta64el/bootv4.img' > - Captured stdout call > - Thank you for reporting, and sorry about the CI failure. I think I need to somehow declare a dependency on the bootv4.img file. I will send a v3 to fix this. > > -- > Tom
[PATCH V4 6/6] MAINTAINERS: Include the TI docs under ARM TI
Add entry for the TI boards documentation under ARM TI Signed-off-by: Dhruva Gole --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 6b32a6d94644..da730c6e4840 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -733,6 +733,7 @@ F: arch/arm/mach-omap2/ F: arch/arm/include/asm/arch-omap*/ F: arch/arm/include/asm/ti-common/ F: board/ti/ +F: doc/board/ti/ F: drivers/dma/ti* F: drivers/dma/ti*/ F: drivers/firmware/ti_sci.* -- 2.34.1
[PATCH V4 4/6] doc: ti: k3: Add TIFS Stub documentation
Add documentation to briefly explain the role of TIFS Stub in relevant K3 SoC's. Signed-off-by: Dhruva Gole --- doc/board/ti/k3.rst | 5 + 1 file changed, 5 insertions(+) diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst index 67b066a07d3a..2f63852b3801 100644 --- a/doc/board/ti/k3.rst +++ b/doc/board/ti/k3.rst @@ -193,6 +193,11 @@ online device resources such as power, clock, interrupts, dma etc. This firmware runs on a dedicated or multi-use microcontroller outside the security enclave. + * **TIFS Stub** - A small piece of code that helps restore the remaining +context and resume the TIFS firmware when resuming from Low Power Modes +like Suspend-to-RAM/ Deep Sleep. It is loaded into the ATCM (Tightly +Coupled Memory 'A' of the DM R5) during DM startup. This applies only +to AM62x, AM62A and AM62P based devices. OR -- 2.34.1
[PATCH V4 5/6] doc: ti: am62*: Mention TIFS Stub in img fmts and boot flow
Since AM62x, AM62P and AM62A all use similar boot flows and their low power mode s/w ARCH is also similar in the way that they make use of the TIFS Stub, update their documentation to show where TIFS Stub is. Signed-off-by: Dhruva Gole --- doc/board/ti/am62ax_sk.rst | 4 ++-- doc/board/ti/am62px_sk.rst | 4 ++-- doc/board/ti/am62x_sk.rst | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/doc/board/ti/am62ax_sk.rst b/doc/board/ti/am62ax_sk.rst index 60726b6652ce..92da6f65f9d5 100644 --- a/doc/board/ti/am62ax_sk.rst +++ b/doc/board/ti/am62ax_sk.rst @@ -47,7 +47,7 @@ Boot Flow: -- Below is the pictorial representation of boot flow: -.. image:: img/boot_diagram_k3_current.svg +.. image:: img/boot_diagram_am62.svg :alt: Boot flow diagram - Here TIFS acts as master and provides all the critical services. R5/A53 @@ -144,7 +144,7 @@ Image formats: - tispl.bin -.. image:: img/dm_tispl.bin.svg +.. image:: img/tifsstub_dm_tispl.bin.svg :alt: tispl.bin image format Switch Setting for Boot Mode diff --git a/doc/board/ti/am62px_sk.rst b/doc/board/ti/am62px_sk.rst index c80b50681176..3396aae471c6 100644 --- a/doc/board/ti/am62px_sk.rst +++ b/doc/board/ti/am62px_sk.rst @@ -55,7 +55,7 @@ Boot Flow: The bootflow is exactly the same as all SoCs in the am62xxx extended SoC family. Below is the pictorial representation: -.. image:: img/boot_diagram_k3_current.svg +.. image:: img/boot_diagram_am62.svg :alt: Boot flow diagram - Here TIFS acts as master and provides all the critical services. R5/A53 @@ -153,7 +153,7 @@ Image formats: - tispl.bin -.. image:: img/dm_tispl.bin.svg +.. image:: img/tifsstub_dm_tispl.bin.svg :alt: tispl.bin image format OSPI: diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst index 2a25e84f6c97..68ddd2ac94ff 100644 --- a/doc/board/ti/am62x_sk.rst +++ b/doc/board/ti/am62x_sk.rst @@ -46,7 +46,7 @@ Boot Flow: -- Below is the pictorial representation of boot flow: -.. image:: img/boot_diagram_k3_current.svg +.. image:: img/boot_diagram_am62.svg :alt: Boot flow diagram - Here TIFS acts as master and provides all the critical services. R5/A53 @@ -161,7 +161,7 @@ Image formats: - tispl.bin -.. image:: img/dm_tispl.bin.svg +.. image:: img/tifsstub_dm_tispl.bin.svg :alt: tispl.bin image format OSPI: -- 2.34.1
[PATCH V4 3/6] doc: beagle: am62x_beagleplay: Add TIFS Stub in image format
Mention the TIFS Stub in the TISP image format Signed-off-by: Dhruva Gole --- doc/board/beagle/am62x_beagleplay.rst | 2 +- doc/board/ti/img/tifsstub_dm_tispl.bin.svg | 353 + 2 files changed, 354 insertions(+), 1 deletion(-) create mode 100644 doc/board/ti/img/tifsstub_dm_tispl.bin.svg diff --git a/doc/board/beagle/am62x_beagleplay.rst b/doc/board/beagle/am62x_beagleplay.rst index 375f26fc5f3e..e7347610173e 100644 --- a/doc/board/beagle/am62x_beagleplay.rst +++ b/doc/board/beagle/am62x_beagleplay.rst @@ -86,7 +86,7 @@ Image formats - tispl.bin -.. image:: ../ti/img/dm_tispl.bin.svg +.. image:: ../ti/img/tifsstub_dm_tispl.bin.svg :alt: tispl.bin image format Additional hardware for U-Boot development diff --git a/doc/board/ti/img/tifsstub_dm_tispl.bin.svg b/doc/board/ti/img/tifsstub_dm_tispl.bin.svg new file mode 100644 index ..5d56d81f6674 --- /dev/null +++ b/doc/board/ti/img/tifsstub_dm_tispl.bin.svg @@ -0,0 +1,353 @@ + + + + + +http://www.inkscape.org/namespaces/inkscape; + xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd; + xmlns:xlink="http://www.w3.org/1999/xlink; + xmlns="http://www.w3.org/2000/svg; + xmlns:svg="http://www.w3.org/2000/svg; + xmlns:xhtml="http://www.w3.org/1999/xhtml;> + + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + FIT Header + + + +FIT Header + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + TIFS Stub +(GP, HS-FS, HS-SE) + + + +TIFS Stub... + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + TF-A + + + +TF-A + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + OP-TEE + + + +OP-TEE + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + R5 DM FW + + + +R5 DM FW + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Cortex-A SPL + + + +Cortex-A SPL + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + SPL DTB 1..N + + + +SPL DTB 1..N + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility; + id="g64" /> +https://www.drawio.com/doc/faq/svg-export-text-problems; + target="_blank" + id="a68"> + Text is not SVG - cannot display + + + -- 2.34.1
[PATCH V4 2/6] doc: beagle: am62x_beagleplay: Update the boot flow to show TIFS Stub
Add the AM62x boot flow to show at which point the TIFS Stub actually gets loaded. Signed-off-by: Dhruva Gole --- doc/board/beagle/am62x_beagleplay.rst |2 +- doc/board/ti/img/boot_diagram_am62.svg | 1983 2 files changed, 1984 insertions(+), 1 deletion(-) create mode 100644 doc/board/ti/img/boot_diagram_am62.svg diff --git a/doc/board/beagle/am62x_beagleplay.rst b/doc/board/beagle/am62x_beagleplay.rst index 01f04beb55aa..375f26fc5f3e 100644 --- a/doc/board/beagle/am62x_beagleplay.rst +++ b/doc/board/beagle/am62x_beagleplay.rst @@ -23,7 +23,7 @@ Boot Flow: -- Below is the pictorial representation of boot flow: -.. image:: ../ti/img/boot_diagram_k3_current.svg +.. image:: ../ti/img/boot_diagram_am62.svg :alt: Boot flow diagram - On this platform, 'TI Foundational Security' (TIFS) functions as the diff --git a/doc/board/ti/img/boot_diagram_am62.svg b/doc/board/ti/img/boot_diagram_am62.svg new file mode 100644 index ..44c54dbd2c1e --- /dev/null +++ b/doc/board/ti/img/boot_diagram_am62.svg @@ -0,0 +1,1983 @@ + + + + + +http://www.inkscape.org/namespaces/inkscape; + xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd; + xmlns:xlink="http://www.w3.org/1999/xlink; + xmlns="http://www.w3.org/2000/svg; + xmlns:svg="http://www.w3.org/2000/svg; + xmlns:xhtml="http://www.w3.org/1999/xhtml;> + + + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Cortex-R + + + +Cortex-R + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + ROM + + + +ROM + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Cortex-R SPL + + + +Cortex-R SPL + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Load and auth tiboot3.bin + + + +Load and auth t... + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Load system +config data + + + +Load system... + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + DDR Config + + + +DDR Config + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Load tispl.bin + + + +Load tispl.bin + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Start Cortex-A + + + +Start Cortex-A + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Start DM + + + +Start DM + + + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Device Mgr + + + +Device Mgr + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Start Cortex-A + + + +Start Cort... + + + + + + + + + + + + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Load TIFS Stub in TCM + + + +Load TIFS St... + + + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Cortex-A + + + +Cortex-A + + + + + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + OP-TEE + + + +OP-TEE + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Cortex-R/M +C6x/C7x + + + +Cortex-R/M... + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + + Aux f/w + + + +Aux f/w + + + + + + +http://www.w3.org/TR/SVG11/feature#Extensibility;> + + +
[PATCH V4 1/6] arm: dts: k3-am625-beagleplay: Package TIFS Stub
Add support for packaging the TIFS Stub as it's required for basic Low
Power Modes like Deep Sleep.
Acked-by: Neha Malcom Francis
Signed-off-by: Dhruva Gole
---
arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 33 +++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
index 467cac68d0f6..a067b0ba3543 100644
--- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
@@ -78,6 +78,23 @@
};
};
+ tifsstub-gp {
+ filename = "tifsstub.bin_gp";
+ ti-secure-rom {
+ content = <_gp>;
+ core = "secure";
+ load = <0x6>;
+ sw-rev = ;
+ keyfile = "ti-degenerate-key.pem";
+ tifsstub;
+ };
+ tifsstub_gp: tifsstub-gp.bin {
+ filename = "ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+
ti-spl_unsigned {
filename = "tispl.bin_unsigned";
symlink = "tispl.bin";
@@ -115,6 +132,19 @@
};
};
+ tifsstub-gp {
+ description = "tifsstub";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-gp";
+ load = <0x9dc0>;
+ entry = <0x9dc0>;
+ blob-ext {
+ filename = "tifsstub.bin_gp";
+ };
+ };
+
dm {
description = "DM binary";
type = "firmware";
@@ -158,7 +188,8 @@
conf-0 {
description = "k3-am625-beagleplay";
firmware = "atf";
- loadables = "tee", "dm", "spl";
+ loadables = "tee", "dm", "spl",
+ "tifsstub-gp";
fdt = "fdt-0";
};
};
--
2.34.1
[PATCH V4 0/6] Low Power Mode: Package TIFS Stub in BeaglePlay
This series includes the binman related changes required to package TIFS Stub to support Low Power Modes on BeaglePlay. It also documents the boot flow and tispl packaging details regarding the same. Changelog: * Add more documentation around TIFS Stub for AM62, 62A and 62P * Fix documentation formatting errors. * Add entry to MAINTAINERS for doc/board/ti Link to previous series: https://lore.kernel.org/u-boot/20240628093252.1864609-1-d-g...@ti.com/ Dhruva Gole (6): arm: dts: k3-am625-beagleplay: Package TIFS Stub doc: beagle: am62x_beagleplay: Update the boot flow to show TIFS Stub doc: beagle: am62x_beagleplay: Add TIFS Stub in image format doc: ti: k3: Add TIFS Stub documentation doc: ti: am62*: Mention TIFS Stub in img fmts and boot flow MAINTAINERS: Include the TI docs under ARM TI MAINTAINERS |1 + arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 33 +- doc/board/beagle/am62x_beagleplay.rst|4 +- doc/board/ti/am62ax_sk.rst |4 +- doc/board/ti/am62px_sk.rst |4 +- doc/board/ti/am62x_sk.rst|4 +- doc/board/ti/img/boot_diagram_am62.svg | 1983 ++ doc/board/ti/img/tifsstub_dm_tispl.bin.svg | 353 doc/board/ti/k3.rst |5 + 9 files changed, 2382 insertions(+), 9 deletions(-) create mode 100644 doc/board/ti/img/boot_diagram_am62.svg create mode 100644 doc/board/ti/img/tifsstub_dm_tispl.bin.svg base-commit: 0f073e022ddc5070e5df1d053e4bdc1874fbcc0f -- 2.34.1
Re: [PATCH 0/4] fs: ubifs: Fix crash and add safeguards
Hello Heiko, Am Thu, Jul 04, 2024 at 06:28:31AM +0200 schrieb Heiko Schocher: > Hello Alexander, > > On 03.07.24 12:12, Alexander Dahl wrote: > > Hei hei, > > > > filesystem handling is different in U-Boot and beyond that UBI/UBIFS is > > different from other filesystems in U-Boot. There's UBI and UBIFS code > > ported from Linux (quite old already now, maybe someone wants to update > > that?), and there's "glue code" or "wrapper code" to interface with > > U-Boot scripts, commands, and filesystem handling. The fixes and > > improvements in this patch series are for this U-Boot specific glue > > code. > > Yes, the linux base is very old ... patches are welcome! The last sync was back in 2015 from linux v4.2, there were 800+ changes to ubi/ubifs in Linux since then. :-/ > And for me it is not that easy, as I do not have a hardware with > current mainline U-Boot running on it... I want to update a hardware > I have to current mainline, but I had no time yet for it... Besides the custom hardware here, I used Microchip SAM9X60-Curiosity lately, which is coming with a raw NAND flash and can boot from it. > > > I'm no filesystem expert, but after days of debugging I'm quite sure the > > bug is in U-Boot since UBIFS support was added in 2009, and it was > > repeated in 2015 when generic filesystem support for UBIFS was added. > > So please review carefully! > > Which bug? The memory leak and double free fixed with patch 1 of the series. > > > The crashes were not easily reproducible, only with boards using the old > > distroboot _and_ a boot script inspired by (but not equal to) the one > > proposed by RAUC [1], which basically boils down to: > > > >ubifsmount ubi0:boot (from distroboot) > >test -e (from distroboot) > >ubifsmount ubi0:rootfs1 (this time from the boot script, > > triggering a ubifs_umount) > > So, you have a special sequence you execute to trigger the bug, good! > > In special 2 ubifsmount in a row... may not often needed for booting! > (I ask me, why that is needed? Boottime is not good than...) Using distroboot with a script here. The script is in a separate UBI volume ubi0:boot, kernel is loaded from ubi0:rootfs1 or ubi0:rootfs2 however. So there is 'ubifsmount ubi0:boot' from distroboot and in the script found, loaded, and run there is 'ubifsmount ubi0:rootfs1' (or rootfs2) later. ubifsmount calls ubifsumount internally if some volume is mounted already. > > BTW: Is this really a good bootcmd in [1] as on *every* boot your > Environment is saved? This is not good for lifetime of your > storage device ... why not using bootcounter? Well, I was not aware of bootcounter, but I had a look and the actual counter must be stored somewhere. Possible are: - pmic → has no storage possibility on my board - rtc → soc internal only, volatile in the end (if battery is empty) - i2c eeprom → missing - spi flash → missing - filesystem → ends up on the flash - nvmem → no other nvmems present - syscon or some cpu register or sram → volatile So none of these are possible in my case, I only have a raw NAND as storage and thus I have to use U-Boot env, which is stored in UBI here btw to not stress the flash too much. I could investigate if it would be possible to let RAUC use the U-Boot bootcounter infrastructure, but currently RAUC depends on U-Boot environment variables for tracking boot attempts. btw: documentation of bootcount is sparse, I only found the very short 'doc/README.bootcount' and it's not even migrated to recent U-Boot sphinx based docs. ;-) But from what I understood the concept is the same, U-Boot counts something and Linux userspace has to reset it. The counter must be stored somewhere, for example in U-Boot env if no other storage is possible. > > > Crashes can be triggered more easily, if patch order is changed and > > patch 2 (resetting pointers to NULL after free) comes first, or if patch > > 2 is applied on its own only. > > Hmm... > > > The fix is in the first patch, and on my boards I see no crashes > > anymore. I also tested all kinds of combinations of calling `ubi part`, > > `ubi detach`, `ubifsmount`, `ubifsumount`, `ubifsls`, `ubifsload`, `ls`, > > `load`, `size`, and `test -e` and got no crashes anymore after the fix. > > That sounds good! Hmm.. test -e has nothing to do with ubi/ubifs I think. Oh it has, 'test -e' calls file_exists() which calls fs_exists() which ends up calling ubifs_exists() which is one of the functions causing an immediate memory leak, see patch 1. > On what hardware do you test? Is it in mainline? Tested on custom hardware, but I'm confident it should be reproducible on any board using ubifs, especially after applying patch 2 resetting pointers of freed memory to NULL. This should trigger the bug with the simple sequence already described: > ubifsmount ubi0:anyvolume > ls ubi ubi0:anyvolume / # (or load, or test -e, or size) > ubifsumount ubifsumount will call
[PATCH v3 5/5] sandbox: Drop video-sync in serial driver
With sandbox, when U-Boot is waiting for input it syncs the video display, since presumably the user has finished typing. Now that cyclic is used for video syncing, we can drop this. Cyclic will automatically call the video_idle() function when idle. Signed-off-by: Simon Glass --- (no changes since v2) Changes in v2: - Fix 'groth' and 'work-around' typos in cover letter drivers/serial/sandbox.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c index ec0068e33d3..77a1558db68 100644 --- a/drivers/serial/sandbox.c +++ b/drivers/serial/sandbox.c @@ -138,8 +138,6 @@ static int sandbox_serial_pending(struct udevice *dev, bool input) return 0; os_usleep(100); - if (IS_ENABLED(CONFIG_VIDEO) && !IS_ENABLED(CONFIG_SPL_BUILD)) - video_sync_all(); avail = membuff_putraw(>buf, 100, false, ); if (!avail) return 1; /* buffer full */ -- 2.34.1
[PATCH v3 4/5] sandbox: Increase cyclic CPU-time limit
Now that sandbox is using cyclic for video, it trips the 1us time limit. Updating the sandbox display often takes 20ms or more. Increase the limit to 100ms to avoid a warning. Signed-off-by: Simon Glass --- (no changes since v1) common/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/common/Kconfig b/common/Kconfig index 87b0ec3ea8f..83c81edac20 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -636,6 +636,7 @@ config SPL_CYCLIC config CYCLIC_MAX_CPU_TIME_US int "Sets the max allowed time for a cyclic function in us" + default 10 if SANDBOX # sandbox video is quite slow default 5000 help The max allowed time for a cyclic function in us. If a functions -- 2.34.1
[PATCH v3 3/5] video: Use cyclic to handle video sync
At present U-Boot flushes the cache after every character written to
ths display. This makes the command-line slower, to the point that
pasting in long strings can fail.
Add a cyclic function to sync the display every 10ms. Enable this by
default.
Allow much longer times for sandbox, since the SDL display is quite
slow.
Avoid size growth if the feature is disabled by making the new init and
destroy functions dependent on CYCLIC being enabled.
Signed-off-by: Simon Glass
---
Changes in v3:
- Adapt to new cyclic API
Changes in v2:
- Expand help for CONFIG_VIDEO
drivers/video/Kconfig| 35 +++
drivers/video/video-uclass.c | 46
2 files changed, 77 insertions(+), 4 deletions(-)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 7808ae7919e..6e79694fd19 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -7,6 +7,7 @@ menu "Graphics support"
config VIDEO
bool "Enable driver model support for LCD/video"
depends on DM
+ imply CYCLIC
help
This enables driver model for LCD and video devices. These support
a bitmap display of various sizes and depths which can be drawn on
@@ -14,6 +15,11 @@ config VIDEO
option compiles in the video uclass and routes all LCD/video access
through this.
+ If CYCLIC is enabled (which it is by default), the cyclic subsystem
+ is used to flush pending output to the display periodically, rather
+ than this happening with every chunk of output. This allows for more
+ efficient operation and faster display output.
+
if VIDEO
config VIDEO_FONT_4X6
@@ -232,6 +238,35 @@ config NO_FB_CLEAR
loads takes over the screen. This, for example, can be used to
keep splash image on screen until grub graphical boot menu starts.
+config VIDEO_SYNC_MS
+ int "Video-sync period in milliseconds for foreground processing"
+ default 300 if SANDBOX
+ default 100
+ help
+ This sets the requested, maximum time before a video sync will take
+ place, in milliseconds. Note that the time between video syncs
+ may be longer than this, since syncs only happen when the video system
+ is used, e.g. by outputting a character to the console.
+
+ It may also be shorter, since the video uclass will automatically
+ force a sync in certain situations.
+
+ Many video-output systems require a sync operation before any output
+ is visible. This may flush the CPU cache or perhaps copy the
+ display contents to a hardware framebuffer. Without this, change to
+ the video may never be displayed.
+
+config VIDEO_SYNC_CYCLIC_MS
+ int "Video-sync period in milliseconds for cyclic processing"
+ depends on CYCLIC
+ default 100 if SANDBOX
+ default 10
+ help
+ This sets the frequency of cyclic video syncs. The cyclic system is
+ used to ensure that when U-Boot is idle, it syncs the video. This
+ improves the responsiveness of the command line to new characters
+ being entered.
+
config PANEL
bool "Enable panel uclass support"
default y
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index a95b5f199dc..a5aa8dd5295 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -52,6 +53,8 @@
*/
DECLARE_GLOBAL_DATA_PTR;
+struct cyclic_info;
+
/**
* struct video_uc_priv - Information for the video uclass
*
@@ -60,9 +63,12 @@ DECLARE_GLOBAL_DATA_PTR;
* available address to use for a device's framebuffer. It starts at
* gd->video_top and works downwards, running out of space when it hits
* gd->video_bottom.
+ * @cyc: handle for cyclic-execution function, or NULL if none
*/
struct video_uc_priv {
ulong video_ptr;
+ bool cyc_active;
+ struct cyclic_info cyc;
};
/** struct vid_rgb - Describes a video colour */
@@ -359,6 +365,10 @@ int video_sync(struct udevice *vid, bool force)
return ret;
}
+ if (CONFIG_IS_ENABLED(CYCLIC) && !force &&
+ get_timer(priv->last_sync) < CONFIG_VIDEO_SYNC_MS)
+ return 0;
+
/*
* flush_dcache_range() is declared in common.h but it seems that some
* architectures do not actually implement it. Is there a way to find
@@ -371,11 +381,10 @@ int video_sync(struct udevice *vid, bool force)
CONFIG_SYS_CACHELINE_SIZE));
}
#elif defined(CONFIG_VIDEO_SANDBOX_SDL)
- if (force || get_timer(priv->last_sync) > 100) {
- sandbox_sdl_sync(priv->fb);
- priv->last_sync = get_timer(0);
- }
+ sandbox_sdl_sync(priv->fb);
#endif
+ priv->last_sync =
[PATCH v3 2/5] video: Move last_sync to private data
Rather than using a static variable, use the video device's private
data to remember when the last video sync was completed. This allows
each display to have its own sync and avoids using static data in SPL.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/video/video-uclass.c | 10 +++---
include/video.h | 2 ++
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index ff1382f4a43..a95b5f199dc 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -349,6 +349,7 @@ void video_set_default_colors(struct udevice *dev, bool
invert)
/* Flush video activity to the caches */
int video_sync(struct udevice *vid, bool force)
{
+ struct video_priv *priv = dev_get_uclass_priv(vid);
struct video_ops *ops = video_get_ops(vid);
int ret;
@@ -364,20 +365,15 @@ int video_sync(struct udevice *vid, bool force)
* out whether it exists? For now, ARM is safe.
*/
#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
- struct video_priv *priv = dev_get_uclass_priv(vid);
-
if (priv->flush_dcache) {
flush_dcache_range((ulong)priv->fb,
ALIGN((ulong)priv->fb + priv->fb_size,
CONFIG_SYS_CACHELINE_SIZE));
}
#elif defined(CONFIG_VIDEO_SANDBOX_SDL)
- struct video_priv *priv = dev_get_uclass_priv(vid);
- static ulong last_sync;
-
- if (force || get_timer(last_sync) > 100) {
+ if (force || get_timer(priv->last_sync) > 100) {
sandbox_sdl_sync(priv->fb);
- last_sync = get_timer(0);
+ priv->last_sync = get_timer(0);
}
#endif
return 0;
diff --git a/include/video.h b/include/video.h
index 4d8df9baaad..4013a949983 100644
--- a/include/video.h
+++ b/include/video.h
@@ -97,6 +97,7 @@ enum video_format {
* the LCD is updated
* @fg_col_idx:Foreground color code (bit 3 = bold, bit 0-2 = color)
* @bg_col_idx:Background color code (bit 3 = bold, bit 0-2 = color)
+ * @last_sync: Monotonic time of last video sync
*/
struct video_priv {
/* Things set up by the driver: */
@@ -121,6 +122,7 @@ struct video_priv {
bool flush_dcache;
u8 fg_col_idx;
u8 bg_col_idx;
+ ulong last_sync;
};
/**
--
2.34.1
[PATCH v3 1/5] cyclic: Add a symbol for SPL
The cyclic subsystem is currently enabled either in all build phases
or none. For tools this should not be enabled, but since lib/shc256.c
and other files include watchdog.h in the host build, we must make
sure that it is not enabled there.
Add an SPL symbol so that there is more control of this.
Add an include into cyclic.h so that tools can include this file.
Also add the kconfig.h header so that CONFIG_IS_ENABLED() works. We
could avoid this for now by moving the location of the watchdog.h
inclusion to outside the USE_HOSTCC area. But at some point the #ifdefs
from these files will likely be removed, so there is no benefit in
going that way.
Signed-off-by: Simon Glass
Reviewed-by: Devarsh Thakkar
Reviewed-by: Stefan Roese
---
Changes in v3:
- Drop inclusion of kconfig.h in cyclic.h
Changes in v2:
- Add an SPL_CYCLIC symbol
- Add a lot more explanation about the header files
common/Kconfig| 8
common/Makefile | 2 +-
drivers/watchdog/Kconfig | 1 +
include/asm-generic/global_data.h | 2 +-
include/cyclic.h | 5 +++--
5 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/common/Kconfig b/common/Kconfig
index 4bb9f08977a..87b0ec3ea8f 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -626,6 +626,14 @@ config CYCLIC
if CYCLIC
+config SPL_CYCLIC
+ bool "General-purpose cyclic execution mechanism (SPL)"
+ help
+ This enables a general-purpose cyclic execution infrastructure in SPL,
+ to allow "small" (run-time wise) functions to be executed at
+ a specified frequency. Things like LED blinking or watchdog
+ triggering are examples for such tasks.
+
config CYCLIC_MAX_CPU_TIME_US
int "Sets the max allowed time for a cyclic function in us"
default 5000
diff --git a/common/Makefile b/common/Makefile
index e9835473420..d871113cbb9 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -79,7 +79,7 @@ obj-$(CONFIG_CROS_EC) += cros_ec.o
obj-y += dlmalloc.o
obj-$(CONFIG_$(SPL_TPL_)SYS_MALLOC_F) += malloc_simple.o
-obj-$(CONFIG_CYCLIC) += cyclic.o
+obj-$(CONFIG_$(SPL_TPL_)CYCLIC) += cyclic.o
obj-$(CONFIG_$(SPL_TPL_)EVENT) += event.o
obj-$(CONFIG_$(SPL_TPL_)HASH) += hash.o
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 8318fd77a32..05de46db024 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -408,6 +408,7 @@ config WDT_ARM_SMC
config SPL_WDT
bool "Enable driver model for watchdog timer drivers in SPL"
depends on SPL_DM
+ select SPL_CYCLIC if CYCLIC
help
Enable driver model for watchdog timer in SPL.
This is similar to CONFIG_WDT in U-Boot.
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index fcc3c6e14ca..21fb94f95f8 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -485,7 +485,7 @@ struct global_data {
*/
struct event_state event_state;
#endif
-#ifdef CONFIG_CYCLIC
+#if CONFIG_IS_ENABLED(CYCLIC)
/**
* @cyclic_list: list of registered cyclic functions
*/
diff --git a/include/cyclic.h b/include/cyclic.h
index 2c3d383c5ef..cd95b691d48 100644
--- a/include/cyclic.h
+++ b/include/cyclic.h
@@ -46,7 +46,8 @@ struct cyclic_info {
/** Function type for cyclic functions */
typedef void (*cyclic_func_t)(struct cyclic_info *c);
-#if defined(CONFIG_CYCLIC)
+#if CONFIG_IS_ENABLED(CYCLIC)
+
/**
* cyclic_register - Register a new cyclic function
*
@@ -123,6 +124,6 @@ static inline int cyclic_unregister_all(void)
{
return 0;
}
-#endif
+#endif /* CYCLIC */
#endif
--
2.34.1
[PATCH v3 0/5] video: Improve syncing performance with cyclic
Now that U-Boot has a background-processing feature, it is possible to reduce the amount of 'foreground' syncing of the display. At present this happens quite often. Foreground syncing blocks all other processing, sometimes for 10ms or more. When pasting commands into U-Boot over the UART, this typically result in characters being dropped. For example, on rpi_4 it isn't possible to paste in more than 35 characters before things fail. This makes updating the environment or entering long commands very painful over the console, since text must be pasted in chunks, or the vidconsole device must be dropped from stdout. This series introduces background syncing, enabled by default for boards which use video. The sync rates for foreground and background are configurable. With this series it is possible to paste in any amount of text to the command line. Some sandbox-specific workarounds can now be removed and sandbox video (./u-boot -Dl) is significantly more responsive. This obviously increases code size, since it enables a subsystem not normally used by default. However it only applies to boards which have VIDEO enabled, which are presumably less worried about memory space since the video code is fairly large. Also it is possible to disable CMD_CYCLIC and reduce the growth to: aarch64: (for 1/1 boards) all +1081.0 rodata +65.0 text +1016.0 arm: (for 1/1 boards) all +945.0 rodata +65.0 text +880.0 Without that, the increase doubles. It is of course possible to disable CYCLIC and still use VIDEO but this reverts to the current behaviour Changes in v3: - Drop inclusion of kconfig.h in cyclic.h - Adapt to new cyclic API Changes in v2: - Add an SPL_CYCLIC symbol - Add a lot more explanation about the header files - Expand help for CONFIG_VIDEO - Fix 'groth' and 'work-around' typos in cover letter Simon Glass (5): cyclic: Add a symbol for SPL video: Move last_sync to private data video: Use cyclic to handle video sync sandbox: Increase cyclic CPU-time limit sandbox: Drop video-sync in serial driver common/Kconfig| 9 ++ common/Makefile | 2 +- drivers/serial/sandbox.c | 2 -- drivers/video/Kconfig | 35 + drivers/video/video-uclass.c | 52 +-- drivers/watchdog/Kconfig | 1 + include/asm-generic/global_data.h | 2 +- include/cyclic.h | 5 +-- include/video.h | 2 ++ 9 files changed, 95 insertions(+), 15 deletions(-) -- 2.34.1
[RFC PATCH v2 48/48] temp: mx6sabresd: bump up the size limit of the board
With the changes to add notifications for any changes to the LMB map, the size of the image exceeds the limit set. Bump up the image size limit for now to get the platform to build. This is not for committing. Signed-off-by: Sughosh Ganu --- Changes since V1: None configs/mx6sabresd_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 868f6b1551..7308ae2ec6 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -23,7 +23,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_PCI=y CONFIG_LTO=y CONFIG_HAS_BOARD_SIZE_LIMIT=y -CONFIG_BOARD_SIZE_LIMIT=715766 +CONFIG_BOARD_SIZE_LIMIT=718108 CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y -- 2.34.1
[RFC PATCH v2 47/48] test: event: update the expected event dump output
With the addition of two events for notification of any changes to memory that is occupied and is free, the output of the event_dump.py script has changed. Update the expected event log to incorporate this change. Signed-off-by: Sughosh Ganu --- Changes since V1: * Remove the line for EFI mem map update. test/py/tests/test_event_dump.py | 1 + 1 file changed, 1 insertion(+) diff --git a/test/py/tests/test_event_dump.py b/test/py/tests/test_event_dump.py index e282c67335..3537f0383c 100644 --- a/test/py/tests/test_event_dump.py +++ b/test/py/tests/test_event_dump.py @@ -19,6 +19,7 @@ def test_event_dump(u_boot_console): EVT_FT_FIXUP bootmeth_vbe_ft_fixup .*boot/vbe_request.c:.* EVT_FT_FIXUP bootmeth_vbe_simple_ft_fixup.*boot/vbe_simple_os.c:.* EVT_LAST_STAGE_INIT install_smbios_table .*lib/efi_loader/efi_smbios.c:.* +EVT_LMB_MAP_UPDATElmb_mem_map_update_sync .*lib/efi_loader/efi_memory.c:.* EVT_MISC_INIT_F sandbox_early_getopt_check .*arch/sandbox/cpu/start.c:.* EVT_TEST h_adder_simple .*test/common/event.c:''' assert re.match(expect, out, re.MULTILINE) is not None -- 2.34.1
[RFC PATCH v2 46/48] lmb: mark the EFI runtime memory regions as reserved
Mark the EFI runtime memory region as reserved memory during board
init so that it does not get allocated by the LMB module on subsequent
memory requests.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
lib/lmb.c | 41 -
1 file changed, 20 insertions(+), 21 deletions(-)
diff --git a/lib/lmb.c b/lib/lmb.c
index 387ec2ac65..6018f1de31 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -19,6 +19,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -212,33 +213,31 @@ void arch_lmb_reserve_generic(ulong sp, ulong end, ulong
align)
/**
* efi_lmb_reserve() - add reservations for EFI memory
*
- * Add reservations for all EFI memory areas that are not
- * EFI_CONVENTIONAL_MEMORY.
+ * Add reservations for EFI runtime services memory
*
- * Return: 0 on success, 1 on failure
+ * Return: None
*/
-static __maybe_unused int efi_lmb_reserve(void)
+static __maybe_unused void efi_lmb_reserve(void)
{
- struct efi_mem_desc *memmap = NULL, *map;
- efi_uintn_t i, map_size = 0;
- efi_status_t ret;
+ phys_addr_t runtime_start, runtime_end;
+ unsigned long runtime_mask = EFI_PAGE_MASK;
- ret = efi_get_memory_map_alloc(_size, );
- if (ret != EFI_SUCCESS)
- return 1;
+#if defined(__aarch64__)
+ /*
+* Runtime Services must be 64KiB aligned according to the
+* "AArch64 Platforms" section in the UEFI spec (2.7+).
+*/
- for (i = 0, map = memmap; i < map_size / sizeof(*map); ++map, ++i) {
- if (map->type != EFI_CONVENTIONAL_MEMORY) {
- lmb_reserve_flags(map_to_sysmem((void *)(uintptr_t)
- map->physical_start),
- map->num_pages * EFI_PAGE_SIZE,
- map->type == EFI_RESERVED_MEMORY_TYPE
- ? LMB_NOMAP : LMB_NONE);
- }
- }
- efi_free_pool(memmap);
+ runtime_mask = SZ_64K - 1;
+#endif
- return 0;
+ /* Reserve the EFI runtime services memory */
+ runtime_start = (uintptr_t)__efi_runtime_start & ~runtime_mask;
+ runtime_end = (uintptr_t)__efi_runtime_stop;
+ runtime_end = (runtime_end + runtime_mask) & ~runtime_mask;
+
+ lmb_reserve_flags(runtime_start, runtime_end - runtime_start,
+ LMB_NOOVERWRITE | LMB_NONOTIFY);
}
static void lmb_reserve_common(void *fdt_blob)
--
2.34.1
[RFC PATCH v2 45/48] efi_memory: do not add RAM memory to the memory map
The EFI_CONVENTIONAL_MEMORY type, which is the usable RAM memory is
now being managed by the LMB module. Remove the addition of this
memory type to the EFI memory map. This memory now gets added to the
EFI memory map as part of the LMB memory map update event handler.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
include/efi_loader.h| 12 +++---
lib/efi_loader/efi_memory.c | 75 +++--
2 files changed, 12 insertions(+), 75 deletions(-)
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 6c993e1a69..e5090afe2a 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -795,9 +795,6 @@ efi_status_t efi_get_memory_map(efi_uintn_t
*memory_map_size,
uint32_t *descriptor_version);
/* Adds a range into the EFI memory map */
efi_status_t efi_add_memory_map(u64 start, u64 size, int memory_type);
-/* Adds a conventional range into the EFI memory map */
-efi_status_t efi_add_conventional_memory_map(u64 ram_start, u64 ram_end,
-u64 ram_top);
/* Called by board init to initialize the EFI drivers */
efi_status_t efi_driver_init(void);
@@ -1183,9 +1180,14 @@ efi_status_t efi_console_get_u16_string
efi_status_t efi_disk_get_device_name(const efi_handle_t handle, char *buf,
int size);
/**
- * efi_add_known_memory() - add memory banks to EFI memory map
+ * efi_add_known_memory() - add memory types to the EFI memory map
*
- * This weak function may be overridden for specific architectures.
+ * This function is to be used to adding different memory types other
+ * than EFI_CONVENTIONAL_MEMORY to the EFI memory map. The conventional
+ * memory is handled by the LMB module, and gets added to the memory
+ * map through the LMB module.
+ *
+ * This function may be overridden for specific architectures.
*/
void efi_add_known_memory(void);
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index bd12504f72..3ceb670e79 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -793,82 +793,17 @@ efi_status_t efi_get_memory_map_alloc(efi_uintn_t
*map_size,
}
/**
- * efi_add_conventional_memory_map() - add a RAM memory area to the map
+ * efi_add_known_memory() - add memory types to the EFI memory map
*
- * @ram_start: start address of a RAM memory area
- * @ram_end: end address of a RAM memory area
- * @ram_top: max address to be used as conventional memory
- * Return: status code
- */
-efi_status_t efi_add_conventional_memory_map(u64 ram_start, u64 ram_end,
-u64 ram_top)
-{
- u64 pages;
-
- /* Remove partial pages */
- ram_end &= ~EFI_PAGE_MASK;
- ram_start = (ram_start + EFI_PAGE_MASK) & ~EFI_PAGE_MASK;
-
- if (ram_end <= ram_start) {
- /* Invalid mapping */
- return EFI_INVALID_PARAMETER;
- }
-
- pages = (ram_end - ram_start) >> EFI_PAGE_SHIFT;
-
- efi_add_memory_map_pg(ram_start, pages,
- EFI_CONVENTIONAL_MEMORY, false);
-
- /*
-* Boards may indicate to the U-Boot memory core that they
-* can not support memory above ram_top. Let's honor this
-* in the efi_loader subsystem too by declaring any memory
-* above ram_top as "already occupied by firmware".
-*/
- if (ram_top < ram_start) {
- /* ram_top is before this region, reserve all */
- efi_add_memory_map_pg(ram_start, pages,
- EFI_BOOT_SERVICES_DATA, true);
- } else if (ram_top < ram_end) {
- /* ram_top is inside this region, reserve parts */
- pages = (ram_end - ram_top) >> EFI_PAGE_SHIFT;
-
- efi_add_memory_map_pg(ram_top, pages,
- EFI_BOOT_SERVICES_DATA, true);
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- * efi_add_known_memory() - add memory banks to map
+ * This function is to be used to adding different memory types other
+ * than EFI_CONVENTIONAL_MEMORY to the EFI memory map. The conventional
+ * memory is handled by the LMB module, and gets added to the memory
+ * map through the LMB module.
*
* This function may be overridden for specific architectures.
*/
__weak void efi_add_known_memory(void)
{
- u64 ram_top = gd->ram_top & ~EFI_PAGE_MASK;
- int i;
-
- /*
-* ram_top is just outside mapped memory. So use an offset of one for
-* mapping the sandbox address.
-*/
- ram_top = (uintptr_t)map_sysmem(ram_top - 1, 0) + 1;
-
- /* Fix for 32bit targets with ram_top at 4G */
- if (!ram_top)
- ram_top = 0x1ULL;
-
- /* Add RAM */
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
- u64 ram_end, ram_start;
-
- ram_start =
[RFC PATCH v2 44/48] x86: e820: use the lmb API for adding RAM memory
The EFI_CONVENTIONAL_MEMORY type is now being managed through the LMB
module. Add a separate function, lmb_add_memory() to add the RAM
memory to the LMB memory map. The efi_add_known_memory() function is
now used for adding any other memory type to the EFI memory map.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
arch/x86/lib/e820.c | 47 ++---
1 file changed, 36 insertions(+), 11 deletions(-)
diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c
index 122b4f7ca0..8b3ce8c6ec 100644
--- a/arch/x86/lib/e820.c
+++ b/arch/x86/lib/e820.c
@@ -4,6 +4,7 @@
*/
#include
+#include
#include
#include
@@ -41,15 +42,11 @@ void efi_add_known_memory(void)
{
struct e820_entry e820[E820MAX];
unsigned int i, num;
- u64 start, ram_top;
+ u64 start;
int type;
num = install_e820_map(ARRAY_SIZE(e820), e820);
- ram_top = (u64)gd->ram_top & ~EFI_PAGE_MASK;
- if (!ram_top)
- ram_top = 0x1ULL;
-
for (i = 0; i < num; ++i) {
start = e820[i].addr;
@@ -72,13 +69,41 @@ void efi_add_known_memory(void)
break;
}
- if (type == EFI_CONVENTIONAL_MEMORY) {
- efi_add_conventional_memory_map(start,
- start + e820[i].size,
- ram_top);
- } else {
+ if (type != EFI_CONVENTIONAL_MEMORY)
efi_add_memory_map(start, e820[i].size, type);
- }
}
}
#endif /* CONFIG_IS_ENABLED(EFI_LOADER) */
+
+#if CONFIG_IS_ENABLED(LMB)
+void lmb_add_memory(void)
+{
+ struct e820_entry e820[E820MAX];
+ unsigned int i, num;
+ u64 ram_top;
+
+ num = install_e820_map(ARRAY_SIZE(e820), e820);
+
+ ram_top = (u64)gd->ram_top & ~EFI_PAGE_MASK;
+ if (!ram_top)
+ ram_top = 0x1ULL;
+
+ for (i = 0; i < num; ++i) {
+ if (e820[i].type == E820_RAM) {
+ u64 start, size, rgn_top;
+
+ start = e820[i].addr;
+ size = e820[i].size;
+ rgn_top = start + size;
+
+ if (start > ram_top)
+ continue;
+
+ if (rgn_top > ram_top)
+ size -= rgn_top - ram_top;
+
+ lmb_add(start, size);
+ }
+ }
+}
+#endif /* CONFIG_IS_ENABLED(LMB) */
--
2.34.1
[RFC PATCH v2 43/48] layerscape: use the lmb API's to add RAM memory
The EFI memory allocations are now being done through the LMB module,
and hence the memory map is maintained by the LMB module. Use the
lmb_add_memory() API function to add the usable RAM memory to the
LMB's memory map.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index d2dbfdd08a..dacb95f1a8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -1525,8 +1526,8 @@ int dram_init_banksize(void)
return 0;
}
-#if CONFIG_IS_ENABLED(EFI_LOADER)
-void efi_add_known_memory(void)
+#if CONFIG_IS_ENABLED(LMB)
+void lmb_add_memory(void)
{
int i;
phys_addr_t ram_start;
@@ -1548,8 +1549,7 @@ void efi_add_known_memory(void)
gd->arch.resv_ram < ram_start + ram_size)
ram_size = gd->arch.resv_ram - ram_start;
#endif
- efi_add_memory_map(ram_start, ram_size,
- EFI_CONVENTIONAL_MEMORY);
+ lmb_add(ram_start, ram_size);
}
}
#endif
--
2.34.1
[RFC PATCH v2 42/48] ti: k3: remove efi_add_known_memory() function definition
The efi_add_known_memory() function for the TI K3 platforms is adding
the EFI_CONVENTIONAL_MEMORY type. This memory is now being handled
through the LMB module -- the lmb_add_memory() adds this memory to the
memory map. Remove the definition of the now superfluous
efi_add_known_memory() function.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
arch/arm/mach-k3/common.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index eaa7d36176..a5c0170cd2 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -310,14 +310,3 @@ void setup_qos(void)
writel(qos_data[i].val, (uintptr_t)qos_data[i].reg);
}
#endif
-
-void efi_add_known_memory(void)
-{
- if (IS_ENABLED(CONFIG_EFI_LOADER))
- /*
-* Memory over ram_top can be used by various firmware
-* Declare to EFI only memory area below ram_top
-*/
- efi_add_memory_map(gd->ram_base, gd->ram_top - gd->ram_base,
- EFI_CONVENTIONAL_MEMORY);
-}
--
2.34.1
[RFC PATCH v2 41/48] efi_memory: add an event handler to update memory map
There are events that would be used to notify other interested modules
of any changes in available and occupied memory. This would happen
when a module allocates or reserves memory, or frees up memory. These
changes in memory map should be notified to other interested modules
so that the allocated memory does not get overwritten. Add an event
handler in the EFI memory module to update the EFI memory map
accordingly when such changes happen. As a consequence, any subsequent
memory request would honour the updated memory map and only available
memory would be allocated from.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Handle the addition of memory to the LMB memory map.
* Pass the overlap_only_ram parameter to the efi_add_memory_map_pg()
based on the type of operation.
lib/efi_loader/Kconfig | 1 +
lib/efi_loader/efi_memory.c | 34 ++
2 files changed, 35 insertions(+)
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index bdf5732974..2d90bcef2f 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -16,6 +16,7 @@ config EFI_LOADER
select CHARSET
# We need to send DM events, dynamically, in the EFI block driver
select DM_EVENT
+ select EVENT
select EVENT_DYNAMIC
select LIB_UUID
select LMB
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index 5691b5da03..bd12504f72 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -45,6 +45,10 @@ static LIST_HEAD(efi_mem);
void *efi_bounce_buffer;
#endif
+#define MAP_OP_RESERVE (u8)0x1
+#define MAP_OP_FREE(u8)0x2
+#define MAP_OP_ADD (u8)0x3
+
/**
* struct efi_pool_allocation - memory block allocated from pool
*
@@ -928,3 +932,33 @@ int efi_memory_init(void)
return 0;
}
+
+#if CONFIG_IS_ENABLED(MEM_MAP_UPDATE_NOTIFY)
+static int lmb_mem_map_update_sync(void *ctx, struct event *event)
+{
+ u8 op;
+ u64 addr;
+ u64 pages;
+ efi_status_t status;
+ struct event_lmb_map_update *lmb_map = >data.lmb_map;
+
+ addr = (uintptr_t)map_sysmem(lmb_map->base, 0);
+ pages = efi_size_in_pages(lmb_map->size + (addr & EFI_PAGE_MASK));
+ op = lmb_map->op;
+ addr &= ~EFI_PAGE_MASK;
+
+ if (op != MAP_OP_RESERVE && op != MAP_OP_FREE && op != MAP_OP_ADD) {
+ log_debug("Invalid map update op received (%d)\n", op);
+ return -1;
+ }
+
+ status = efi_add_memory_map_pg(addr, pages,
+ op == MAP_OP_RESERVE ?
+ EFI_BOOT_SERVICES_DATA :
+ EFI_CONVENTIONAL_MEMORY,
+ op == MAP_OP_RESERVE ? true : false);
+
+ return status == EFI_SUCCESS ? 0 : -1;
+}
+EVENT_SPY_FULL(EVT_LMB_MAP_UPDATE, lmb_mem_map_update_sync);
+#endif /* MEM_MAP_UPDATE_NOTIFY */
--
2.34.1
[RFC PATCH v2 40/48] lmb: notify of any changes to the LMB memory map
In U-Boot, LMB and EFI are two primary modules who provide memory
allocation and reservation API's. Both these modules operate with the
same regions of memory for allocations. Use the LMB memory map update
event to notify other interested listeners about a change in it's
memory map. This can then be used by the other module to keep track of
available and used memory.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Notify addition of memory to the LMB memory map.
* Add a function lmb_notify() to check if notification has to be sent.
lib/lmb.c | 61 ---
1 file changed, 58 insertions(+), 3 deletions(-)
diff --git a/lib/lmb.c b/lib/lmb.c
index d2edb3525a..387ec2ac65 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -8,6 +8,7 @@
#include
#include
+#include
#include
#include
#include
@@ -21,12 +22,36 @@
DECLARE_GLOBAL_DATA_PTR;
+#define MAP_OP_RESERVE (u8)0x1
+#define MAP_OP_FREE(u8)0x2
+#define MAP_OP_ADD (u8)0x3
+
#define LMB_ALLOC_ANYWHERE 0
#define LMB_ALIST_INITIAL_SIZE 4
struct alist lmb_free_mem;
struct alist lmb_used_mem;
+extern bool is_addr_in_ram(uintptr_t addr);
+
+static bool lmb_notify(enum lmb_flags flags)
+{
+ return !(flags & LMB_NONOTIFY);
+}
+
+static void lmb_map_update_notify(phys_addr_t addr, phys_size_t size,
+ u8 op)
+{
+ struct event_lmb_map_update lmb_map = {0};
+
+ lmb_map.base = addr;
+ lmb_map.size = size;
+ lmb_map.op = op;
+
+ if (is_addr_in_ram((uintptr_t)addr))
+ event_notify(EVT_LMB_MAP_UPDATE, _map, sizeof(lmb_map));
+}
+
static void lmb_dump_region(struct alist *lmb_rgn_lst, char *name)
{
struct lmb_region *rgn = lmb_rgn_lst->data;
@@ -463,9 +488,17 @@ static long lmb_add_region(struct alist *lmb_rgn_lst,
phys_addr_t base,
/* This routine may be called with relocation disabled. */
long lmb_add(phys_addr_t base, phys_size_t size)
{
+ long ret;
struct alist *lmb_rgn_lst = _free_mem;
- return lmb_add_region(lmb_rgn_lst, base, size);
+ ret = lmb_add_region(lmb_rgn_lst, base, size);
+ if (ret)
+ return ret;
+
+ if (CONFIG_IS_ENABLED(MEM_MAP_UPDATE_NOTIFY))
+ lmb_map_update_notify(base, size, MAP_OP_ADD);
+
+ return 0;
}
static long __lmb_free(phys_addr_t base, phys_size_t size)
@@ -521,7 +554,16 @@ static long __lmb_free(phys_addr_t base, phys_size_t size)
long lmb_free(phys_addr_t base, phys_size_t size)
{
- return __lmb_free(base, size);
+ long ret;
+
+ ret = __lmb_free(base, size);
+ if (ret < 0)
+ return ret;
+
+ if (CONFIG_IS_ENABLED(MEM_MAP_UPDATE_NOTIFY))
+ lmb_map_update_notify(base, size, MAP_OP_FREE);
+
+ return 0;
}
long lmb_free_flags(phys_addr_t base, phys_size_t size,
@@ -532,9 +574,17 @@ long lmb_free_flags(phys_addr_t base, phys_size_t size,
long lmb_reserve_flags(phys_addr_t base, phys_size_t size, enum lmb_flags
flags)
{
+ long ret = 0;
struct alist *lmb_rgn_lst = _used_mem;
- return lmb_add_region_flags(lmb_rgn_lst, base, size, flags);
+ ret = lmb_add_region_flags(lmb_rgn_lst, base, size, flags);
+ if (ret < 0)
+ return -1;
+
+ if (CONFIG_IS_ENABLED(MEM_MAP_UPDATE_NOTIFY) && lmb_notify(flags))
+ lmb_map_update_notify(base, size, MAP_OP_RESERVE);
+
+ return ret;
}
long lmb_reserve(phys_addr_t base, phys_size_t size)
@@ -596,6 +646,11 @@ static phys_addr_t __lmb_alloc_base(phys_size_t size,
ulong align,
if (lmb_add_region_flags(_used_mem, base,
size, flags) < 0)
return 0;
+
+ if (CONFIG_IS_ENABLED(MEM_MAP_UPDATE_NOTIFY) &&
+ lmb_notify(flags))
+ lmb_map_update_notify(base, size,
+ MAP_OP_RESERVE);
return base;
}
--
2.34.1
[RFC PATCH v2 39/48] add a function to check if an address is in RAM memory
Add a function to check if a given address falls within the RAM
address used by U-Boot. This will be used to notify other modules if
the address gets allocated, so as to not get re-allocated by some
other module.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Have a common weak function for all platforms, sandbox included.
common/board_r.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/common/board_r.c b/common/board_r.c
index 1a5bb98218..427688168c 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -72,6 +72,11 @@ DECLARE_GLOBAL_DATA_PTR;
ulong monitor_flash_len;
+__weak bool __maybe_unused is_addr_in_ram(uintptr_t addr)
+{
+ return addr >= gd->ram_base && addr <= gd->ram_top;
+}
+
__weak int board_flash_wp_on(void)
{
/*
--
2.34.1
[RFC PATCH v2 38/48] lib: Kconfig: add a config symbol for getting lmb memory map updates
Add a Kconfig symbol to enable getting updates on any memory map changes that might be done by the LMB module. This notification mechanism can then be used to have a synchronous view of allocated and free memory. Signed-off-by: Sughosh Ganu --- Changes since V1: * Change the description to highlight only LMB notifications. * Add a separate line for dependencies. lib/Kconfig | 10 ++ 1 file changed, 10 insertions(+) diff --git a/lib/Kconfig b/lib/Kconfig index 7eea517b3b..b422183a0f 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -74,6 +74,16 @@ config HAVE_PRIVATE_LIBGCC config LIB_UUID bool +config MEM_MAP_UPDATE_NOTIFY + bool "Get notified of any changes to the LMB memory map" + depends on EVENT && LMB && EFI_LOADER + default y + help + Enable this option to get notification on any changes to the + memory that is allocated or freed by the LMB module. This will + allow different modules that allocate memory or maintain a memory + map to have a synchronous view of available and allocated memory. + config RANDOM_UUID bool "GPT Random UUID generation" select LIB_UUID -- 2.34.1
[RFC PATCH v2 37/48] event: add event to notify lmb memory map changes
Add an event which would be used for notifying changes in the
LMB modules' memory map. This is to be used for having a
synchronous view of the memory that is currently in use, and that is
available for allocations.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Remove the event for EFI notifications.
common/event.c | 2 ++
include/event.h | 14 ++
2 files changed, 16 insertions(+)
diff --git a/common/event.c b/common/event.c
index dda569d447..fc8002603c 100644
--- a/common/event.c
+++ b/common/event.c
@@ -48,6 +48,8 @@ const char *const type_name[] = {
/* main loop events */
"main_loop",
+
+ "lmb_map_update",
};
_Static_assert(ARRAY_SIZE(type_name) == EVT_COUNT, "event type_name size");
diff --git a/include/event.h b/include/event.h
index fb353ad623..fce7e96170 100644
--- a/include/event.h
+++ b/include/event.h
@@ -153,6 +153,14 @@ enum event_t {
*/
EVT_MAIN_LOOP,
+ /**
+* @EVT_LMB_MAP_UPDATE:
+* This event is triggered on an update to the LMB reserved memory
+* region. This can be used to notify about any LMB memory allocation
+* or freeing of memory having occurred.
+*/
+ EVT_LMB_MAP_UPDATE,
+
/**
* @EVT_COUNT:
* This constants holds the maximum event number + 1 and is used when
@@ -203,6 +211,12 @@ union event_data {
oftree tree;
struct bootm_headers *images;
} ft_fixup;
+
+ struct event_lmb_map_update {
+ u64 base;
+ u64 size;
+ u8 op;
+ } lmb_map;
};
/**
--
2.34.1
[RFC PATCH v2 36/48] efi: memory: use the lmb API's for allocating and freeing memory
Use the LMB API's for allocating and freeing up memory. With this, the
LMB module becomes the common backend for managing non U-Boot image
memory that might be requested by other modules.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
lib/efi_loader/Kconfig | 1 +
lib/efi_loader/efi_memory.c | 78 +++--
2 files changed, 23 insertions(+), 56 deletions(-)
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index ee71f41714..bdf5732974 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -18,6 +18,7 @@ config EFI_LOADER
select DM_EVENT
select EVENT_DYNAMIC
select LIB_UUID
+ select LMB
imply PARTITION_UUIDS
select REGEX
imply FAT
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index 12cf23fa3f..5691b5da03 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -9,12 +9,14 @@
#include
#include
+#include
#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -435,55 +437,6 @@ static efi_status_t efi_check_allocated(u64 addr, bool
must_be_allocated)
return EFI_NOT_FOUND;
}
-/**
- * efi_find_free_memory() - find free memory pages
- *
- * @len: size of memory area needed
- * @max_addr: highest address to allocate
- * Return: pointer to free memory area or 0
- */
-static uint64_t efi_find_free_memory(uint64_t len, uint64_t max_addr)
-{
- struct list_head *lhandle;
-
- /*
-* Prealign input max address, so we simplify our matching
-* logic below and can just reuse it as return pointer.
-*/
- max_addr &= ~EFI_PAGE_MASK;
-
- list_for_each(lhandle, _mem) {
- struct efi_mem_list *lmem = list_entry(lhandle,
- struct efi_mem_list, link);
- struct efi_mem_desc *desc = >desc;
- uint64_t desc_len = desc->num_pages << EFI_PAGE_SHIFT;
- uint64_t desc_end = desc->physical_start + desc_len;
- uint64_t curmax = min(max_addr, desc_end);
- uint64_t ret = curmax - len;
-
- /* We only take memory from free RAM */
- if (desc->type != EFI_CONVENTIONAL_MEMORY)
- continue;
-
- /* Out of bounds for max_addr */
- if ((ret + len) > max_addr)
- continue;
-
- /* Out of bounds for upper map limit */
- if ((ret + len) > desc_end)
- continue;
-
- /* Out of bounds for lower map limit */
- if (ret < desc->physical_start)
- continue;
-
- /* Return the highest address in this map within bounds */
- return ret;
- }
-
- return 0;
-}
-
/**
* efi_allocate_pages - allocate memory pages
*
@@ -498,6 +451,7 @@ efi_status_t efi_allocate_pages(enum efi_allocate_type type,
efi_uintn_t pages, uint64_t *memory)
{
u64 len;
+ uint flags;
efi_status_t ret;
uint64_t addr;
@@ -513,33 +467,35 @@ efi_status_t efi_allocate_pages(enum efi_allocate_type
type,
(len >> EFI_PAGE_SHIFT) != (u64)pages)
return EFI_OUT_OF_RESOURCES;
+ flags = LMB_NOOVERWRITE | LMB_NONOTIFY;
switch (type) {
case EFI_ALLOCATE_ANY_PAGES:
/* Any page */
- addr = efi_find_free_memory(len, -1ULL);
+ addr = (u64)lmb_alloc_flags(len, EFI_PAGE_SIZE, flags);
if (!addr)
return EFI_OUT_OF_RESOURCES;
break;
case EFI_ALLOCATE_MAX_ADDRESS:
/* Max address */
- addr = efi_find_free_memory(len, *memory);
+ addr = (u64)lmb_alloc_base_flags(len, EFI_PAGE_SIZE, *memory,
+flags);
if (!addr)
return EFI_OUT_OF_RESOURCES;
break;
case EFI_ALLOCATE_ADDRESS:
if (*memory & EFI_PAGE_MASK)
return EFI_NOT_FOUND;
- /* Exact address, reserve it. The addr is already in *memory. */
- ret = efi_check_allocated(*memory, false);
- if (ret != EFI_SUCCESS)
- return EFI_NOT_FOUND;
- addr = *memory;
+
+ addr = (u64)lmb_alloc_addr_flags(*memory, len, flags);
+ if (!addr)
+ return EFI_OUT_OF_RESOURCES;
break;
default:
/* UEFI doesn't specify other allocation types */
return EFI_INVALID_PARAMETER;
}
+ addr = (u64)(uintptr_t)map_sysmem(addr, 0);
/* Reserve that map in our memory maps */
ret = efi_add_memory_map_pg(addr, pages, memory_type, true);
if (ret
[RFC PATCH v2 35/48] lmb: add a flag to allow suppressing memory map change notification
Add a flag LMB_NONOTIFY that can be passed to the LMB API's for
reserving memory. This will then result in no notification being sent
from the LMB module for the changes to the LMB's memory map.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
include/lmb.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/lmb.h b/include/lmb.h
index afab04426d..dbf3e9e30f 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -24,6 +24,7 @@ enum lmb_flags {
LMB_NONE= BIT(0),
LMB_NOMAP = BIT(1),
LMB_NOOVERWRITE = BIT(2),
+ LMB_NONOTIFY= BIT(3),
};
/**
--
2.34.1
[RFC PATCH v2 34/48] lmb: add versions of the lmb API with flags
The LMB module is to be used as a backend for allocating and freeing
up memory requested from other modules like EFI. These memory requests
are different from the typical LMB reservations in that memory
required by the EFI module cannot be overwritten, or re-requested. Add
versions of the LMB API functions with flags for allocating and
freeing up memory. The caller can then use these API's for specifying
the type of memory that is required. For now, these functions will be
used by the EFI memory module.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
include/lmb.h | 6 ++
lib/lmb.c | 39 ++-
2 files changed, 44 insertions(+), 1 deletion(-)
diff --git a/include/lmb.h b/include/lmb.h
index d9d5e3f3cb..afab04426d 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -74,8 +74,13 @@ long lmb_reserve(phys_addr_t base, phys_size_t size);
long lmb_reserve_flags(phys_addr_t base, phys_size_t size,
enum lmb_flags flags);
phys_addr_t lmb_alloc(phys_size_t size, ulong align);
+phys_addr_t lmb_alloc_flags(phys_size_t size, ulong align, uint flags);
phys_addr_t lmb_alloc_base(phys_size_t size, ulong align, phys_addr_t
max_addr);
+phys_addr_t lmb_alloc_base_flags(phys_size_t size, ulong align,
+phys_addr_t max_addr, uint flags);
phys_addr_t lmb_alloc_addr(phys_addr_t base, phys_size_t size);
+phys_addr_t lmb_alloc_addr_flags(phys_addr_t base, phys_size_t size,
+uint flags);
phys_size_t lmb_get_free_size(phys_addr_t addr);
/**
@@ -91,6 +96,7 @@ phys_size_t lmb_get_free_size(phys_addr_t addr);
int lmb_is_reserved_flags(phys_addr_t addr, int flags);
long lmb_free(phys_addr_t base, phys_size_t size);
+long lmb_free_flags(phys_addr_t base, phys_size_t size, uint flags);
void lmb_dump_all(void);
void lmb_dump_all_force(void);
diff --git a/lib/lmb.c b/lib/lmb.c
index 4480710d73..d2edb3525a 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -468,7 +468,7 @@ long lmb_add(phys_addr_t base, phys_size_t size)
return lmb_add_region(lmb_rgn_lst, base, size);
}
-long lmb_free(phys_addr_t base, phys_size_t size)
+static long __lmb_free(phys_addr_t base, phys_size_t size)
{
struct lmb_region *rgn;
struct alist *lmb_rgn_lst = _used_mem;
@@ -519,6 +519,17 @@ long lmb_free(phys_addr_t base, phys_size_t size)
rgn[i].flags);
}
+long lmb_free(phys_addr_t base, phys_size_t size)
+{
+ return __lmb_free(base, size);
+}
+
+long lmb_free_flags(phys_addr_t base, phys_size_t size,
+ __always_unused uint flags)
+{
+ return __lmb_free(base, size);
+}
+
long lmb_reserve_flags(phys_addr_t base, phys_size_t size, enum lmb_flags
flags)
{
struct alist *lmb_rgn_lst = _used_mem;
@@ -602,6 +613,12 @@ phys_addr_t lmb_alloc(phys_size_t size, ulong align)
return lmb_alloc_base(size, align, LMB_ALLOC_ANYWHERE);
}
+phys_addr_t lmb_alloc_flags(phys_size_t size, ulong align, uint flags)
+{
+ return __lmb_alloc_base(size, align, LMB_ALLOC_ANYWHERE,
+ flags);
+}
+
phys_addr_t lmb_alloc_base(phys_size_t size, ulong align, phys_addr_t max_addr)
{
phys_addr_t alloc;
@@ -615,6 +632,20 @@ phys_addr_t lmb_alloc_base(phys_size_t size, ulong align,
phys_addr_t max_addr)
return alloc;
}
+phys_addr_t lmb_alloc_base_flags(phys_size_t size, ulong align,
+phys_addr_t max_addr, uint flags)
+{
+ phys_addr_t alloc;
+
+ alloc = __lmb_alloc_base(size, align, max_addr, flags);
+
+ if (alloc == 0)
+ printf("ERROR: Failed to allocate 0x%lx bytes below 0x%lx.\n",
+ (ulong)size, (ulong)max_addr);
+
+ return alloc;
+}
+
static phys_addr_t __lmb_alloc_addr(phys_addr_t base, phys_size_t size,
enum lmb_flags flags)
{
@@ -649,6 +680,12 @@ phys_addr_t lmb_alloc_addr(phys_addr_t base, phys_size_t
size)
return __lmb_alloc_addr(base, size, LMB_NONE);
}
+phys_addr_t lmb_alloc_addr_flags(phys_addr_t base, phys_size_t size,
+uint flags)
+{
+ return __lmb_alloc_addr(base, size, flags);
+}
+
/* Return number of bytes from a given address that are free */
phys_size_t lmb_get_free_size(phys_addr_t addr)
{
--
2.34.1
[RFC PATCH v2 33/48] test: bdinfo: dump the global LMB memory map
The LMB code has been changed to make the memory reservations
persistent and global. Make corresponding change the the
lmb_test_dump_all() function to print the global LMB available and
used memory.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Corresponding changes needed to work with alist based lmb lists.
test/cmd/bdinfo.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/test/cmd/bdinfo.c b/test/cmd/bdinfo.c
index 1cd81a195b..3184aaf629 100644
--- a/test/cmd/bdinfo.c
+++ b/test/cmd/bdinfo.c
@@ -5,6 +5,7 @@
* Copyright 2023 Marek Vasut
*/
+#include
#include
#include
#include
@@ -21,6 +22,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -99,19 +101,20 @@ static int test_video_info(struct unit_test_state *uts)
}
static int lmb_test_dump_region(struct unit_test_state *uts,
- struct lmb_region *rgn, char *name)
+ struct alist *lmb_rgn_lst, char *name)
{
+ struct lmb_region *rgn = lmb_rgn_lst->data;
unsigned long long base, size, end;
enum lmb_flags flags;
int i;
- ut_assert_nextline(" %s.cnt = 0x%lx / max = 0x%lx", name, rgn->cnt,
rgn->max);
+ ut_assert_nextline(" %s.count = 0x%hx", name, lmb_rgn_lst->count);
- for (i = 0; i < rgn->cnt; i++) {
- base = rgn->region[i].base;
- size = rgn->region[i].size;
+ for (i = 0; i < lmb_rgn_lst->count; i++) {
+ base = rgn[i].base;
+ size = rgn[i].size;
end = base + size - 1;
- flags = rgn->region[i].flags;
+ flags = rgn[i].flags;
if (!IS_ENABLED(CONFIG_SANDBOX) && i == 3) {
ut_assert_nextlinen(" %s[%d]\t[", name, i);
@@ -124,11 +127,14 @@ static int lmb_test_dump_region(struct unit_test_state
*uts,
return 0;
}
-static int lmb_test_dump_all(struct unit_test_state *uts, struct lmb *lmb)
+static int lmb_test_dump_all(struct unit_test_state *uts)
{
+ extern struct alist lmb_free_mem;
+ extern struct alist lmb_used_mem;
+
ut_assert_nextline("lmb_dump_all:");
- ut_assertok(lmb_test_dump_region(uts, >memory, "memory"));
- ut_assertok(lmb_test_dump_region(uts, >reserved, "reserved"));
+ ut_assertok(lmb_test_dump_region(uts, _free_mem, "memory"));
+ ut_assertok(lmb_test_dump_region(uts, _used_mem, "reserved"));
return 0;
}
@@ -190,9 +196,7 @@ static int bdinfo_test_all(struct unit_test_state *uts)
#endif
if (IS_ENABLED(CONFIG_LMB) && gd->fdt_blob) {
- struct lmb lmb;
-
- ut_assertok(lmb_test_dump_all(uts, ));
+ ut_assertok(lmb_test_dump_all(uts));
if (IS_ENABLED(CONFIG_OF_REAL))
ut_assert_nextline("devicetree = %s",
fdtdec_get_srcname());
}
--
2.34.1
[RFC PATCH v2 32/48] test: lmb: invoke the LMB unit tests from a separate script
With the LMB tests moved under a separate class of unit tests, invoke
these from a separate script which would allow for a system reset once
the tests have been run. This enables clearing up the LMB memory map
after having run the tests.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
test/py/tests/test_lmb.py | 24
1 file changed, 24 insertions(+)
create mode 100644 test/py/tests/test_lmb.py
diff --git a/test/py/tests/test_lmb.py b/test/py/tests/test_lmb.py
new file mode 100644
index 00..b6f9ff9c6a
--- /dev/null
+++ b/test/py/tests/test_lmb.py
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2024 Linaro Ltd
+#
+# Run the LMB tests
+
+import pytest
+
+base_script = '''
+ut lmb -f
+'''
+
+@pytest.mark.boardspec('sandbox')
+def test_lmb(u_boot_console):
+cons = u_boot_console
+cmd = base_script
+
+with cons.log.section('LMB Unit Test'):
+output = cons.run_command_list(cmd.splitlines())
+
+assert 'Failures: 0' in output[-1]
+
+# Restart so that the LMB memory map starts with
+# a clean slate for the next set of tests.
+u_boot_console.restart_uboot()
--
2.34.1
[RFC PATCH v2 31/48] test: lmb: add a separate class of unit tests for lmb
Add the LMB unit tests under a separate class of tests. The LMB tests
involve changing the LMB's memory map. With the memory map now
persistent and global, running these tests has a side effect and
impact any subsequent tests. Run these tests separately so that the
system can be reset on completion of these tests.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
include/test/suites.h| 1 +
test/Kconfig | 9 ++
test/Makefile| 1 +
test/cmd_ut.c| 7 +
test/lib/Makefile| 1 -
test/{lib/lmb.c => lmb_ut.c} | 53 ++--
6 files changed, 50 insertions(+), 22 deletions(-)
rename test/{lib/lmb.c => lmb_ut.c} (93%)
diff --git a/include/test/suites.h b/include/test/suites.h
index 365d5f20df..5ef164a956 100644
--- a/include/test/suites.h
+++ b/include/test/suites.h
@@ -45,6 +45,7 @@ int do_ut_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char
*const argv[]);
int do_ut_font(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_hush(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_lmb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_log(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]);
int do_ut_mbr(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
diff --git a/test/Kconfig b/test/Kconfig
index e2ec0994a2..49c24722dc 100644
--- a/test/Kconfig
+++ b/test/Kconfig
@@ -79,6 +79,15 @@ config UT_COMPRESSION
Enables tests for compression and decompression routines for simple
sanity and for buffer overflow conditions.
+config UT_LMB
+ bool "Unit tests for LMB functions"
+ depends on !SPL && UNIT_TEST
+ default y
+ help
+ Enables the 'ut lmb' commands which tests the lmb functions
+ responsible for reserving memory for loading images into
+ memory.
+
config UT_LOG
bool "Unit tests for logging functions"
depends on UNIT_TEST
diff --git a/test/Makefile b/test/Makefile
index ed312cd0a4..e9bdd14eba 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_$(SPL_)CMDLINE) += command_ut.o
obj-$(CONFIG_$(SPL_)UT_COMPRESSION) += compression.o
obj-y += dm/
obj-$(CONFIG_FUZZ) += fuzz/
+obj-$(CONFIG_UT_LMB) += lmb_ut.o
ifndef CONFIG_SANDBOX_VPL
obj-$(CONFIG_UNIT_TEST) += lib/
endif
diff --git a/test/cmd_ut.c b/test/cmd_ut.c
index 4e4aa8f1cb..60ff872723 100644
--- a/test/cmd_ut.c
+++ b/test/cmd_ut.c
@@ -78,6 +78,7 @@ static struct cmd_tbl cmd_ut_sub[] = {
#ifdef CONFIG_CONSOLE_TRUETYPE
U_BOOT_CMD_MKENT(font, CONFIG_SYS_MAXARGS, 1, do_ut_font, "", ""),
#endif
+
#ifdef CONFIG_UT_OPTEE
U_BOOT_CMD_MKENT(optee, CONFIG_SYS_MAXARGS, 1, do_ut_optee, "", ""),
#endif
@@ -87,6 +88,9 @@ static struct cmd_tbl cmd_ut_sub[] = {
#ifdef CONFIG_UT_LIB
U_BOOT_CMD_MKENT(lib, CONFIG_SYS_MAXARGS, 1, do_ut_lib, "", ""),
#endif
+#ifdef CONFIG_UT_LMB
+ U_BOOT_CMD_MKENT(lmb, CONFIG_SYS_MAXARGS, 1, do_ut_lmb, "", ""),
+#endif
#ifdef CONFIG_UT_LOG
U_BOOT_CMD_MKENT(log, CONFIG_SYS_MAXARGS, 1, do_ut_log, "", ""),
#endif
@@ -228,6 +232,9 @@ U_BOOT_LONGHELP(ut,
#ifdef CONFIG_UT_LIB
"\nlib - library functions"
#endif
+#ifdef CONFIG_UT_LMB
+ "\nlmb - lmb functions"
+#endif
#ifdef CONFIG_UT_LOG
"\nlog - logging functions"
#endif
diff --git a/test/lib/Makefile b/test/lib/Makefile
index 70f14c46b1..ecb96dc1d7 100644
--- a/test/lib/Makefile
+++ b/test/lib/Makefile
@@ -10,7 +10,6 @@ obj-$(CONFIG_EFI_LOADER) += efi_device_path.o
obj-$(CONFIG_EFI_SECURE_BOOT) += efi_image_region.o
obj-y += hexdump.o
obj-$(CONFIG_SANDBOX) += kconfig.o
-obj-y += lmb.o
obj-y += longjmp.o
obj-$(CONFIG_CONSOLE_RECORD) += test_print.o
obj-$(CONFIG_SSCANF) += sscanf.o
diff --git a/test/lib/lmb.c b/test/lmb_ut.c
similarity index 93%
rename from test/lib/lmb.c
rename to test/lmb_ut.c
index 878aacee8d..a304e9317e 100644
--- a/test/lib/lmb.c
+++ b/test/lmb_ut.c
@@ -9,10 +9,13 @@
#include
#include
#include
-#include
+#include
#include
#include
+
+#define LMB_TEST(_name, _flags)UNIT_TEST(_name, _flags, lmb_test)
+
static inline bool lmb_is_nomap(struct lmb_region *m)
{
return m->flags & LMB_NOMAP;
@@ -200,7 +203,7 @@ static int test_multi_alloc_512mb_x2(struct unit_test_state
*uts,
}
/* Create a memory region with one reserved region and allocate */
-static int lib_test_lmb_simple_norun(struct unit_test_state *uts)
+static int lmb_test_lmb_simple_norun(struct unit_test_state *uts)
{
int ret;
@@ -212,10 +215,10 @@ static int lib_test_lmb_simple_norun(struct
unit_test_state *uts)
/* simulate 512 MiB RAM beginning at 1.5GiB */
return test_multi_alloc_512mb(uts, 0xE000);
[RFC PATCH v2 30/48] test: lmb: run lmb tests only manually
The LMB code has been changed so that the memory reservations and
allocations are now persistent and global. With this change, the
design of the LMB tests needs to be changed accordingly. Mark the LMB
tests to be run only manually. The tests won't be run as part of the
unit test suite, but would be invoked through a separate test, and
thus would not interfere with the running of the rest of the tests.
Signed-off-by: Sughosh Ganu
---
Changes since V1: None
test/lib/lmb.c | 41 -
1 file changed, 20 insertions(+), 21 deletions(-)
diff --git a/test/lib/lmb.c b/test/lib/lmb.c
index 50f32793bc..878aacee8d 100644
--- a/test/lib/lmb.c
+++ b/test/lib/lmb.c
@@ -200,7 +200,7 @@ static int test_multi_alloc_512mb_x2(struct unit_test_state
*uts,
}
/* Create a memory region with one reserved region and allocate */
-static int lib_test_lmb_simple(struct unit_test_state *uts)
+static int lib_test_lmb_simple_norun(struct unit_test_state *uts)
{
int ret;
@@ -212,10 +212,10 @@ static int lib_test_lmb_simple(struct unit_test_state
*uts)
/* simulate 512 MiB RAM beginning at 1.5GiB */
return test_multi_alloc_512mb(uts, 0xE000);
}
-LIB_TEST(lib_test_lmb_simple, 0);
+LIB_TEST(lib_test_lmb_simple_norun, UT_TESTF_MANUAL);
/* Create two memory regions with one reserved region and allocate */
-static int lib_test_lmb_simple_x2(struct unit_test_state *uts)
+static int lib_test_lmb_simple_x2_norun(struct unit_test_state *uts)
{
int ret;
@@ -227,7 +227,7 @@ static int lib_test_lmb_simple_x2(struct unit_test_state
*uts)
/* simulate 512 MiB RAM beginning at 3.5GiB and 1 GiB */
return test_multi_alloc_512mb_x2(uts, 0xE000, 0x4000);
}
-LIB_TEST(lib_test_lmb_simple_x2, 0);
+LIB_TEST(lib_test_lmb_simple_x2_norun, UT_TESTF_MANUAL);
/* Simulate 512 MiB RAM, allocate some blocks that fit/don't fit */
static int test_bigblock(struct unit_test_state *uts, const phys_addr_t ram)
@@ -286,7 +286,7 @@ static int test_bigblock(struct unit_test_state *uts, const
phys_addr_t ram)
return 0;
}
-static int lib_test_lmb_big(struct unit_test_state *uts)
+static int lib_test_lmb_big_norun(struct unit_test_state *uts)
{
int ret;
@@ -298,7 +298,7 @@ static int lib_test_lmb_big(struct unit_test_state *uts)
/* simulate 512 MiB RAM beginning at 1.5GiB */
return test_bigblock(uts, 0xE000);
}
-LIB_TEST(lib_test_lmb_big, 0);
+LIB_TEST(lib_test_lmb_big_norun, UT_TESTF_MANUAL);
/* Simulate 512 MiB RAM, allocate a block without previous reservation */
static int test_noreserved(struct unit_test_state *uts, const phys_addr_t ram,
@@ -368,7 +368,7 @@ static int test_noreserved(struct unit_test_state *uts,
const phys_addr_t ram,
return 0;
}
-static int lib_test_lmb_noreserved(struct unit_test_state *uts)
+static int lib_test_lmb_noreserved_norun(struct unit_test_state *uts)
{
int ret;
@@ -380,10 +380,9 @@ static int lib_test_lmb_noreserved(struct unit_test_state
*uts)
/* simulate 512 MiB RAM beginning at 1.5GiB */
return test_noreserved(uts, 0xE000, 4, 1);
}
+LIB_TEST(lib_test_lmb_noreserved_norun, UT_TESTF_MANUAL);
-LIB_TEST(lib_test_lmb_noreserved, 0);
-
-static int lib_test_lmb_unaligned_size(struct unit_test_state *uts)
+static int lib_test_lmb_unaligned_size_norun(struct unit_test_state *uts)
{
int ret;
@@ -395,13 +394,13 @@ static int lib_test_lmb_unaligned_size(struct
unit_test_state *uts)
/* simulate 512 MiB RAM beginning at 1.5GiB */
return test_noreserved(uts, 0xE000, 5, 8);
}
-LIB_TEST(lib_test_lmb_unaligned_size, 0);
+LIB_TEST(lib_test_lmb_unaligned_size_norun, UT_TESTF_MANUAL);
/*
* Simulate a RAM that starts at 0 and allocate down to address 0, which must
* fail as '0' means failure for the lmb_alloc functions.
*/
-static int lib_test_lmb_at_0(struct unit_test_state *uts)
+static int lib_test_lmb_at_0_norun(struct unit_test_state *uts)
{
const phys_addr_t ram = 0;
const phys_size_t ram_size = 0x2000;
@@ -443,10 +442,10 @@ static int lib_test_lmb_at_0(struct unit_test_state *uts)
return 0;
}
-LIB_TEST(lib_test_lmb_at_0, 0);
+LIB_TEST(lib_test_lmb_at_0_norun, UT_TESTF_MANUAL);
/* Check that calling lmb_reserve with overlapping regions fails. */
-static int lib_test_lmb_overlapping_reserve(struct unit_test_state *uts)
+static int lib_test_lmb_overlapping_reserve_norun(struct unit_test_state *uts)
{
const phys_addr_t ram = 0x4000;
const phys_size_t ram_size = 0x2000;
@@ -497,7 +496,7 @@ static int lib_test_lmb_overlapping_reserve(struct
unit_test_state *uts)
return 0;
}
-LIB_TEST(lib_test_lmb_overlapping_reserve, 0);
+LIB_TEST(lib_test_lmb_overlapping_reserve_norun, UT_TESTF_MANUAL);
/*
* Simulate 512 MiB RAM, reserve 3 blocks, allocate addresses in between.
@@ -619,7 +618,7 @@ static int test_alloc_addr(struct unit_test_state
[RFC PATCH v2 29/48] test: lmb: tweak the tests for the persistent lmb memory map
The LMB memory maps are now persistent, with alloced lists being used
to keep track of the available and free memory. Make corresponding
changes in the test functions so that the list information can be
accessed by the tests for checking against expected values. Also
introduce functions to initialise and cleanup the lists. These
functions will be invoked from every test to start the memory map from
a clean slate.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Make changes to the lmb_init() function for working with alist based
lmb lists.
* Add a lmb_uninit() function to clear out the lists.
include/lmb.h | 7 ++
lib/lmb.c | 32 ++
test/lib/lmb.c | 292 ++---
3 files changed, 219 insertions(+), 112 deletions(-)
diff --git a/include/lmb.h b/include/lmb.h
index cc4cf9f3c8..d9d5e3f3cb 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -13,6 +13,8 @@
* Copyright (C) 2001 Peter Bergner, IBM Corp.
*/
+struct alist;
+
/**
* enum lmb_flags - definition of memory region attributes
* @LMB_NONE: no special request
@@ -110,6 +112,11 @@ void arch_lmb_reserve_generic(ulong sp, ulong end, ulong
align);
*/
int lmb_mem_regions_init(void);
+#if CONFIG_IS_ENABLED(UT_LMB)
+int lmb_init(struct alist **mem_lst, struct alist **used_lst);
+void lmb_uninit(struct alist *mem_lst, struct alist *used_lst);
+#endif /* UT_LMB */
+
#endif /* __KERNEL__ */
#endif /* _LINUX_LMB_H */
diff --git a/lib/lmb.c b/lib/lmb.c
index 7cb97e2d42..4480710d73 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -763,3 +763,35 @@ int initr_lmb(void)
return ret;
}
+
+#if CONFIG_IS_ENABLED(UT_LMB)
+int lmb_init(struct alist **mem_lst, struct alist **used_lst)
+{
+ bool ret;
+
+ ret = alist_init(_free_mem, sizeof(struct lmb_region),
+(uint)LMB_ALIST_INITIAL_SIZE);
+ if (!ret) {
+ log_debug("Unable to initialise the list for LMB free
memory\n");
+ return -1;
+ }
+
+ ret = alist_init(_used_mem, sizeof(struct lmb_region),
+(uint)LMB_ALIST_INITIAL_SIZE);
+ if (!ret) {
+ log_debug("Unable to initialise the list for LMB used
memory\n");
+ return -1;
+ }
+
+ *mem_lst = _free_mem;
+ *used_lst = _used_mem;
+
+ return 0;
+}
+
+void lmb_uninit(struct alist *mem_lst, struct alist *used_lst)
+{
+ alist_uninit(mem_lst);
+ alist_uninit(used_lst);
+}
+#endif /* UT_LMB */
diff --git a/test/lib/lmb.c b/test/lib/lmb.c
index a3a7ad904c..50f32793bc 100644
--- a/test/lib/lmb.c
+++ b/test/lib/lmb.c
@@ -3,6 +3,7 @@
* (C) Copyright 2018 Simon Goldschmidt
*/
+#include
#include
#include
#include
@@ -12,52 +13,51 @@
#include
#include
-extern struct lmb lmb;
-
-static inline bool lmb_is_nomap(struct lmb_property *m)
+static inline bool lmb_is_nomap(struct lmb_region *m)
{
return m->flags & LMB_NOMAP;
}
-static int check_lmb(struct unit_test_state *uts, struct lmb *lmb,
-phys_addr_t ram_base, phys_size_t ram_size,
-unsigned long num_reserved,
+static int check_lmb(struct unit_test_state *uts, struct alist *mem_lst,
+struct alist *used_lst, phys_addr_t ram_base,
+phys_size_t ram_size, unsigned long num_reserved,
phys_addr_t base1, phys_size_t size1,
phys_addr_t base2, phys_size_t size2,
phys_addr_t base3, phys_size_t size3)
{
+ struct lmb_region *mem, *used;
+
+ mem = mem_lst->data;
+ used = used_lst->data;
+
if (ram_size) {
- ut_asserteq(lmb->memory.cnt, 1);
- ut_asserteq(lmb->memory.region[0].base, ram_base);
- ut_asserteq(lmb->memory.region[0].size, ram_size);
+ ut_asserteq(mem_lst->count, 1);
+ ut_asserteq(mem[0].base, ram_base);
+ ut_asserteq(mem[0].size, ram_size);
}
- ut_asserteq(lmb->reserved.cnt, num_reserved);
+ ut_asserteq(used_lst->count, num_reserved);
if (num_reserved > 0) {
- ut_asserteq(lmb->reserved.region[0].base, base1);
- ut_asserteq(lmb->reserved.region[0].size, size1);
+ ut_asserteq(used[0].base, base1);
+ ut_asserteq(used[0].size, size1);
}
if (num_reserved > 1) {
- ut_asserteq(lmb->reserved.region[1].base, base2);
- ut_asserteq(lmb->reserved.region[1].size, size2);
+ ut_asserteq(used[1].base, base2);
+ ut_asserteq(used[1].size, size2);
}
if (num_reserved > 2) {
- ut_asserteq(lmb->reserved.region[2].base, base3);
- ut_asserteq(lmb->reserved.region[2].size, size3);
+ ut_asserteq(used[2].base, base3);
+ ut_asserteq(used[2].size, size3);
}
return 0;
}
-#define ASSERT_LMB(lmb,
[RFC PATCH v2 28/48] test: cedit: use allocated address for reading file
Instead of a randomly selected address, use an LMB allocated one for
reading the file into memory. With the LMB map now being persistent
and global, the address used for reading the file might be already
allocated as non-overwritable, resulting in a failure. Get a valid
address from LMB and then read the file to that address.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Free up the memory allocated once done with it.
test/boot/cedit.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/test/boot/cedit.c b/test/boot/cedit.c
index fd19da0a0c..923ddd1481 100644
--- a/test/boot/cedit.c
+++ b/test/boot/cedit.c
@@ -7,6 +7,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -61,7 +62,7 @@ static int cedit_fdt(struct unit_test_state *uts)
struct video_priv *vid_priv;
extern struct expo *cur_exp;
struct scene_obj_menu *menu;
- ulong addr = 0x1000;
+ ulong addr;
struct ofprop prop;
struct scene *scn;
oftree tree;
@@ -86,6 +87,8 @@ static int cedit_fdt(struct unit_test_state *uts)
str = abuf_data(>buf);
strcpy(str, "my-machine");
+ addr = lmb_alloc(1024, 1024);
+ ut_asserteq(!!addr, !0);
ut_assertok(run_command("cedit write_fdt hostfs - settings.dtb", 0));
ut_assertok(run_commandf("load hostfs - %lx settings.dtb", addr));
ut_assert_nextlinen("1024 bytes read");
@@ -94,6 +97,7 @@ static int cedit_fdt(struct unit_test_state *uts)
tree = oftree_from_fdt(fdt);
node = ofnode_find_subnode(oftree_root(tree), CEDIT_NODE_NAME);
ut_assert(ofnode_valid(node));
+ lmb_free(addr, 1024);
ut_asserteq(ID_CPU_SPEED_2,
ofnode_read_u32_default(node, "cpu-speed", 0));
--
2.34.1
[RFC PATCH v2 27/48] zynq: lmb: do not add to lmb map before relocation
The LMB memory is typically not needed very early in the platform's
boot. Do not add memory to the LMB map before relocation. Reservation
of common areas and adding of memory is done after relocation.
Signed-off-by: Sughosh Ganu
---
Changes since V1: None
board/xilinx/common/board.c | 31 ---
1 file changed, 31 deletions(-)
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index f04c92a70f..3440402ab4 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -12,7 +12,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -665,36 +664,6 @@ int embedded_dtb_select(void)
}
#endif
-#if IS_ENABLED(CONFIG_LMB)
-
-#ifndef MMU_SECTION_SIZE
-#define MMU_SECTION_SIZE(1 * 1024 * 1024)
-#endif
-
-phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
-{
- phys_size_t size;
- phys_addr_t reg;
-
- if (!total_size)
- return gd->ram_top;
-
- if (!IS_ALIGNED((ulong)gd->fdt_blob, 0x8))
- panic("Not 64bit aligned DT location: %p\n", gd->fdt_blob);
-
- /* found enough not-reserved memory to relocated U-Boot */
- lmb_add(gd->ram_base, gd->ram_size);
- boot_fdt_add_mem_rsv_regions((void *)gd->fdt_blob);
- size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE);
- reg = lmb_alloc(size, MMU_SECTION_SIZE);
-
- if (!reg)
- reg = gd->ram_top - size;
-
- return reg + size;
-}
-#endif
-
#ifdef CONFIG_OF_BOARD_SETUP
#define MAX_RAND_SIZE 8
int ft_board_setup(void *blob, struct bd_info *bd)
--
2.34.1
[RFC PATCH v2 26/48] sandbox: iommu: remove lmb allocation in the driver
The sandbox iommu driver uses the LMB module to allocate a particular
range of memory for the device virtual address(DVA). This used to work
earlier since the LMB memory map was caller specific and not
global. But with the change to make the LMB allocations global and
persistent, adding this memory range has other side effects. On the
other hand, the sandbox iommu test expects to see this particular
value of the DVA. Use the DVA address directly, instead of mapping it
in the LMB memory map, and then have it allocated.
Signed-off-by: Sughosh Ganu
---
Changes since V1: None
drivers/iommu/sandbox_iommu.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/sandbox_iommu.c b/drivers/iommu/sandbox_iommu.c
index 5b4a6a8982..81f10e8433 100644
--- a/drivers/iommu/sandbox_iommu.c
+++ b/drivers/iommu/sandbox_iommu.c
@@ -9,6 +9,7 @@
#include
#include
+#define DVA_ADDR 0x89abc000
#define IOMMU_PAGE_SIZESZ_4K
static dma_addr_t sandbox_iommu_map(struct udevice *dev, void *addr,
@@ -21,7 +22,7 @@ static dma_addr_t sandbox_iommu_map(struct udevice *dev, void
*addr,
off = virt_to_phys(addr) - paddr;
psize = ALIGN(size + off, IOMMU_PAGE_SIZE);
- dva = lmb_alloc(psize, IOMMU_PAGE_SIZE);
+ dva = (phys_addr_t)DVA_ADDR;
return dva + off;
}
@@ -35,8 +36,6 @@ static void sandbox_iommu_unmap(struct udevice *dev,
dma_addr_t addr,
dva = ALIGN_DOWN(addr, IOMMU_PAGE_SIZE);
psize = size + (addr - dva);
psize = ALIGN(psize, IOMMU_PAGE_SIZE);
-
- lmb_free(dva, psize);
}
static struct iommu_ops sandbox_iommu_ops = {
@@ -46,8 +45,6 @@ static struct iommu_ops sandbox_iommu_ops = {
static int sandbox_iommu_probe(struct udevice *dev)
{
- lmb_add(0x89abc000, SZ_16K);
-
return 0;
}
--
2.34.1
[RFC PATCH v2 25/48] sandbox: spl: enable lmb in SPL
Enable the LMB module in the SPL stage. This will allow the LMB code to be exercised and tested in the SPL stage. Signed-off-by: Sughosh Ganu --- Changes since V1: New patch configs/sandbox_spl_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index f7b92dc844..31ccdbd502 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -249,6 +249,7 @@ CONFIG_ZSTD=y CONFIG_SPL_LZMA=y CONFIG_ERRNO_STR=y CONFIG_SPL_HEXDUMP=y +CONFIG_SPL_LMB=y CONFIG_UNIT_TEST=y CONFIG_SPL_UNIT_TEST=y CONFIG_UT_TIME=y -- 2.34.1
[RFC PATCH v2 24/48] lmb: add a common implementation of arch_lmb_reserve()
Almost all of the current definitions of arch_lmb_reserve() are doing
the same thing. The only exception in a couple of cases is the
alignment parameter requirement. Have a generic weak implementation of
this function, keeping the highest value of alignment that is being
used(16K).
Also, instead of using the current value of stack pointer for starting
the reserved region, have a fixed value, considering the stack size
config value.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
arch/arc/lib/cache.c| 14 --
arch/arm/lib/stack.c| 14 --
arch/m68k/lib/bootm.c | 17 -
arch/microblaze/lib/bootm.c | 14 --
arch/mips/lib/bootm.c | 15 ---
arch/nios2/lib/bootm.c | 13 -
arch/powerpc/lib/bootm.c| 13 +++--
arch/riscv/lib/bootm.c | 13 -
arch/sh/lib/bootm.c | 13 -
arch/x86/lib/bootm.c| 18 --
arch/xtensa/lib/bootm.c | 13 -
lib/lmb.c | 6 +-
12 files changed, 8 insertions(+), 155 deletions(-)
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index 5151af917a..5169fc627f 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -10,7 +10,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -820,16 +819,3 @@ void sync_n_cleanup_cache_all(void)
__ic_entire_invalidate();
}
-
-static ulong get_sp(void)
-{
- ulong ret;
-
- asm("mov %0, sp" : "=r"(ret) : );
- return ret;
-}
-
-void arch_lmb_reserve(void)
-{
- arch_lmb_reserve_generic(get_sp(), gd->ram_top, 4096);
-}
diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c
index 87d5c962d7..2b21ec0734 100644
--- a/arch/arm/lib/stack.c
+++ b/arch/arm/lib/stack.c
@@ -11,7 +11,6 @@
* Marius Groeger
*/
#include
-#include
#include
DECLARE_GLOBAL_DATA_PTR;
@@ -33,16 +32,3 @@ int arch_reserve_stacks(void)
return 0;
}
-
-static ulong get_sp(void)
-{
- ulong ret;
-
- asm("mov %0, sp" : "=r"(ret) : );
- return ret;
-}
-
-void arch_lmb_reserve(void)
-{
- arch_lmb_reserve_generic(get_sp(), gd->ram_top, 16384);
-}
diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c
index eb220d178d..06854e1442 100644
--- a/arch/m68k/lib/bootm.c
+++ b/arch/m68k/lib/bootm.c
@@ -9,7 +9,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -27,14 +26,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define LINUX_MAX_ENVS 256
#define LINUX_MAX_ARGS 256
-static ulong get_sp (void);
static void set_clocks_in_mhz (struct bd_info *kbd);
-void arch_lmb_reserve(void)
-{
- arch_lmb_reserve_generic(get_sp(), gd->ram_top, 1024);
-}
-
int do_bootm_linux(int flag, struct bootm_info *bmi)
{
struct bootm_headers *images = bmi->images;
@@ -88,16 +81,6 @@ error:
return 1;
}
-static ulong get_sp (void)
-{
- ulong sp;
-
- asm("movel %%a7, %%d0\n"
- "movel %%d0, %0\n": "=d"(sp): :"%d0");
-
- return sp;
-}
-
static void set_clocks_in_mhz (struct bd_info *kbd)
{
char *s;
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index ce96bca28f..4879a41aab 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -15,7 +15,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -24,19 +23,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static ulong get_sp(void)
-{
- ulong ret;
-
- asm("addik %0, r1, 0" : "=r"(ret) : );
- return ret;
-}
-
-void arch_lmb_reserve(void)
-{
- arch_lmb_reserve_generic(get_sp(), gd->ram_top, 4096);
-}
-
static void boot_jump_linux(struct bootm_headers *images, int flag)
{
void (*thekernel)(char *cmdline, ulong rd, ulong dt);
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index 8fb3a3923f..8719510002 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -9,7 +9,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -28,20 +27,6 @@ static char **linux_env;
static char *linux_env_p;
static int linux_env_idx;
-static ulong arch_get_sp(void)
-{
- ulong ret;
-
- __asm__ __volatile__("move %0, $sp" : "=r"(ret) : );
-
- return ret;
-}
-
-void arch_lmb_reserve(void)
-{
- arch_lmb_reserve_generic(arch_get_sp(), gd->ram_top, 4096);
-}
-
static void linux_cmdline_init(void)
{
linux_argc = 1;
diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c
index d33d45d28f..71319839ba 100644
--- a/arch/nios2/lib/bootm.c
+++ b/arch/nios2/lib/bootm.c
@@ -64,16 +64,3 @@ int do_bootm_linux(int flag, struct bootm_info *bmi)
return 1;
}
-
-static ulong get_sp(void)
-{
- ulong ret;
-
- asm("mov %0, sp" : "=r"(ret) : );
- return ret;
-}
-
-void arch_lmb_reserve(void)
-{
- arch_lmb_reserve_generic(get_sp(), gd->ram_top, 4096);
-}
diff --git
[RFC PATCH v2 23/48] lmb: use the BIT macro for lmb flags
Use the BIT macro for assigning values to the LMB flags instead of
assigning random values to them.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch based on review comment from Heinrich
include/lmb.h | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/include/lmb.h b/include/lmb.h
index 02891a14be..cc4cf9f3c8 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -5,6 +5,7 @@
#include
#include
+#include
/*
* Logical memory blocks.
@@ -18,9 +19,9 @@
* @LMB_NOMAP: don't add to mmu configuration
*/
enum lmb_flags {
- LMB_NONE= 0x0,
- LMB_NOMAP = 0x4,
- LMB_NOOVERWRITE = 0x8,
+ LMB_NONE= BIT(0),
+ LMB_NOMAP = BIT(1),
+ LMB_NOOVERWRITE = BIT(2),
};
/**
--
2.34.1
[RFC PATCH v2 22/48] lmb: init: initialise the lmb data structures during board init
The memory map maintained by the LMB module is now persistent and
global. This memory map is being maintained through the alloced list
structure which can be extended at runtime -- there is one list for
the available memory, and one for the used memory. Allocate and
initialise these lists during the board init.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Initialise the lmb structures as part of board init.
* Initialise the lmb structure durint SPL init when enabled.
common/board_r.c | 4
common/spl/spl.c | 4
include/lmb.h| 11 +++
lib/lmb.c| 20
4 files changed, 39 insertions(+)
diff --git a/common/board_r.c b/common/board_r.c
index c823cd262f..1a5bb98218 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -611,6 +612,9 @@ static init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_CLOCKS
set_cpu_clk_info, /* Setup clock information */
#endif
+#if CONFIG_IS_ENABLED(LMB)
+ initr_lmb,
+#endif
#ifdef CONFIG_EFI_LOADER
efi_memory_init,
#endif
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 7794ddccad..633dbd1234 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -686,6 +686,10 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
SPL_SYS_MALLOC_SIZE);
gd->flags |= GD_FLG_FULL_MALLOC_INIT;
}
+
+ if (IS_ENABLED(CONFIG_SPL_LMB))
+ initr_lmb();
+
if (!(gd->flags & GD_FLG_SPL_INIT)) {
if (spl_init())
hang();
diff --git a/include/lmb.h b/include/lmb.h
index d0c094107c..02891a14be 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -36,6 +36,17 @@ struct lmb_region {
enum lmb_flags flags;
};
+/**
+ * initr_lmb() - Initialise the LMB lists
+ *
+ * Initialise the LMB lists needed for keeping the memory map. There
+ * are two lists, in form of alloced list data structure. One for the
+ * available memory, and one for the used memory.
+ *
+ * Return: 0 on success, -ve on error
+ */
+int initr_lmb(void);
+
/**
* lmb_add_memory() - Add memory range for LMB allocations
*
diff --git a/lib/lmb.c b/lib/lmb.c
index bf6254f4fc..1534380969 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -739,3 +739,23 @@ int lmb_mem_regions_init(void)
return 0;
}
+
+/**
+ * initr_lmb() - Initialise the LMB lists
+ *
+ * Initialise the LMB lists needed for keeping the memory map. There
+ * are two lists, in form of alloced list data structure. One for the
+ * available memory, and one for the used memory.
+ *
+ * Return: 0 on success, -ve on error
+ */
+int initr_lmb(void)
+{
+ int ret;
+
+ ret = lmb_mem_regions_init();
+ if (ret)
+ printf("Unable to initialise the LMB data structures\n");
+
+ return ret;
+}
--
2.34.1
[RFC PATCH v2 21/48] lmb: remove lmb_init_and_reserve_range() function
With the move to make the LMB allocations persistent and the common
memory regions being reserved during board init, there is no need for
an explicit reservation of a memory range. Remove the
lmb_init_and_reserve_range() function.
Signed-off-by: Sughosh Ganu
Reviewed-by: Ilias Apalodimas
Reviewed-by: Tom Rini
---
Changes since V1: None
boot/bootm.c | 15 +--
lib/lmb.c| 8
2 files changed, 1 insertion(+), 22 deletions(-)
diff --git a/boot/bootm.c b/boot/bootm.c
index 5ce84b73b5..d44fd2ed87 100644
--- a/boot/bootm.c
+++ b/boot/bootm.c
@@ -239,18 +239,7 @@ static int boot_get_kernel(const char *addr_fit, struct
bootm_headers *images,
return 0;
}
-#if CONFIG_IS_ENABLED(LMB)
-static void boot_start_lmb(void)
-{
- phys_addr_t mem_start;
- phys_size_t mem_size;
-
- mem_start = env_get_bootm_low();
- mem_size = env_get_bootm_size();
-
- lmb_init_and_reserve_range(mem_start, mem_size, NULL);
-}
-#else
+#if !CONFIG_IS_ENABLED(LMB)
#define lmb_reserve(base, size)
static inline void boot_start_lmb(void) { }
#endif
@@ -260,8 +249,6 @@ static int bootm_start(void)
memset((void *), 0, sizeof(images));
images.verify = env_get_yesno("verify");
- boot_start_lmb();
-
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_START, "bootm_start");
images.state = BOOTM_STATE_START;
diff --git a/lib/lmb.c b/lib/lmb.c
index 456b64c00a..bf6254f4fc 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -268,14 +268,6 @@ __weak void lmb_add_memory(void)
}
}
-/* Initialize the struct, add memory and call arch/board reserve functions */
-void lmb_init_and_reserve_range(phys_addr_t base, phys_size_t size,
- void *fdt_blob)
-{
- lmb_add(base, size);
- lmb_reserve_common(fdt_blob);
-}
-
static bool lmb_region_flags_match(struct lmb_region *rgn, unsigned long r1,
enum lmb_flags flags)
{
--
2.34.1
[RFC PATCH v2 20/48] lmb: reserve common areas during board init
The LMB module provides API's for allocating and reserving chunks of memory which is then typically used for things like loading images for booting. Reserve the portion of memory that is occupied by the U-Boot image itself, and other parts of memory that might have been marked as reserved in the board's DTB. Mark these regions of memory with the LMB_NOOVERWRITE flag to indicate that these regions cannot be re-requested or overwritten. Signed-off-by: Sughosh Ganu --- Changes since V1: * Mark the reserved regions as LMB_NOOVERWRITE. * Call the lmb_reserve_common() function in U-Boot proper after relocation. lib/lmb.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/lib/lmb.c b/lib/lmb.c index e1dde14a3c..456b64c00a 100644 --- a/lib/lmb.c +++ b/lib/lmb.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -173,10 +174,11 @@ void arch_lmb_reserve_generic(ulong sp, ulong end, ulong align) if (bank_end > end) bank_end = end - 1; - lmb_reserve(sp, bank_end - sp + 1); + lmb_reserve_flags(sp, bank_end - sp + 1, LMB_NOOVERWRITE); if (gd->flags & GD_FLG_SKIP_RELOC) - lmb_reserve((phys_addr_t)(uintptr_t)_start, gd->mon_len); + lmb_reserve_flags((phys_addr_t)(uintptr_t)_start, + gd->mon_len, LMB_NOOVERWRITE); break; } @@ -739,5 +741,9 @@ int lmb_mem_regions_init(void) lmb_add_memory(); + /* Reserve the U-Boot image region once U-Boot has relocated */ + if (spl_phase() == PHASE_BOARD_R) + lmb_reserve_common((void *)gd->fdt_blob); + return 0; } -- 2.34.1
[RFC PATCH v2 19/48] lmb: remove the lmb_init_and_reserve() function
With the changes to make the LMB reservations persistent, the common
memory regions are being added during board init. Remove the
now superfluous lmb_init_and_reserve() function.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Removed the replacement of lmb_init_and_reserve() with
lmb_add_memory(), as memory gets added during board init.
arch/arm/mach-apple/board.c | 2 --
arch/arm/mach-snapdragon/board.c | 2 --
arch/arm/mach-stm32mp/stm32mp1/cpu.c | 3 ---
cmd/bdinfo.c | 1 -
cmd/load.c | 2 --
fs/fs.c | 1 -
lib/lmb.c| 13 -
net/tftp.c | 2 --
net/wget.c | 2 --
test/cmd/bdinfo.c| 9 -
10 files changed, 37 deletions(-)
diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c
index 213390d6e8..0b6d290b8a 100644
--- a/arch/arm/mach-apple/board.c
+++ b/arch/arm/mach-apple/board.c
@@ -775,8 +775,6 @@ int board_late_init(void)
{
u32 status = 0;
- lmb_init_and_reserve(gd->bd, (void *)gd->fdt_blob);
-
/* somewhat based on the Linux Kernel boot requirements:
* align by 2M and maximal FDT size 2M
*/
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index a63c8bec45..22a7d2a637 100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach-snapdragon/board.c
@@ -282,8 +282,6 @@ int board_late_init(void)
{
u32 status = 0;
- lmb_init_and_reserve(gd->bd, (void *)gd->fdt_blob);
-
/* We need to be fairly conservative here as we support boards with
just 1G of TOTAL RAM */
status |= env_set_hex("kernel_addr_r", addr_alloc(SZ_128M));
status |= env_set_hex("ramdisk_addr_r", addr_alloc(SZ_128M));
diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c
b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
index a913737342..64480da9f8 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
@@ -141,9 +141,6 @@ int mach_cpu_init(void)
void enable_caches(void)
{
- /* parse device tree when data cache is still activated */
- lmb_init_and_reserve(gd->bd, (void *)gd->fdt_blob);
-
/* I-cache is already enabled in start.S: icache_enable() not needed */
/* deactivate the data cache, early enabled in arch_cpu_init() */
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index b31e0208df..3c40dee143 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -162,7 +162,6 @@ static int bdinfo_print_all(struct bd_info *bd)
bdinfo_print_num_l("multi_dtb_fit", (ulong)gd->multi_dtb_fit);
#endif
if (IS_ENABLED(CONFIG_LMB) && gd->fdt_blob) {
- lmb_init_and_reserve(gd->bd, (void *)gd->fdt_blob);
lmb_dump_all_force();
if (IS_ENABLED(CONFIG_OF_REAL))
printf("devicetree = %s\n", fdtdec_get_srcname());
diff --git a/cmd/load.c b/cmd/load.c
index b4e747f966..29cc98ff37 100644
--- a/cmd/load.c
+++ b/cmd/load.c
@@ -153,8 +153,6 @@ static ulong load_serial(long offset)
int line_count = 0;
long ret;
- lmb_init_and_reserve(gd->bd, (void *)gd->fdt_blob);
-
while (read_record(record, SREC_MAXRECLEN + 1) >= 0) {
type = srec_decode(record, , , binbuf);
diff --git a/fs/fs.c b/fs/fs.c
index 3fb00590be..4bc28d1dff 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -549,7 +549,6 @@ static int fs_read_lmb_check(const char *filename, ulong
addr, loff_t offset,
if (len && len < read_len)
read_len = len;
- lmb_init_and_reserve(gd->bd, (void *)gd->fdt_blob);
lmb_dump_all();
if (lmb_alloc_addr(addr, read_len) == addr)
diff --git a/lib/lmb.c b/lib/lmb.c
index e4733b82ac..e1dde14a3c 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -226,19 +226,6 @@ static void lmb_reserve_common(void *fdt_blob)
efi_lmb_reserve();
}
-/* Initialize the struct, add memory and call arch/board reserve functions */
-void lmb_init_and_reserve(struct bd_info *bd, void *fdt_blob)
-{
- int i;
-
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
- if (bd->bi_dram[i].size)
- lmb_add(bd->bi_dram[i].start, bd->bi_dram[i].size);
- }
-
- lmb_reserve_common(fdt_blob);
-}
-
/**
* lmb_add_memory() - Add memory range for LMB allocations
*
diff --git a/net/tftp.c b/net/tftp.c
index 5c75d9d04f..dfbc620c73 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -713,8 +713,6 @@ static int tftp_init_load_addr(void)
#if CONFIG_IS_ENABLED(LMB)
phys_size_t max_size;
- lmb_init_and_reserve(gd->bd, (void *)gd->fdt_blob);
-
max_size = lmb_get_free_size(image_load_addr);
if (!max_size)
return -1;
diff --git a/net/wget.c b/net/wget.c
index b8ea43e7f0..82a7e30ea7 100644
--- a/net/wget.c
+++ b/net/wget.c
@@ -75,8 +75,6 @@ static int
