Re: [PATCH] net: ethernet: ti: am65-cpsw-nuss: enable 10Mbps link speed in rgmii mode
+ Lokesh
On 04/17/2020 11:12 AM, Murali Karicheri wrote:
In RGMII mode the 10Mbps link speed is supported only when CPSW2G MAC SL is
configured for External Control ("in band") mode
CPSW_PN_MAC_CONTROL_REG.CTL_EN(18) = 1
Hence update am65_cpsw_update_link() to follow documentation.
Signed-off-by: Murali Karicheri
---
drivers/net/ti/am65-cpsw-nuss.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 2b77213001..7531a07203 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -61,6 +61,7 @@
#define AM65_CPSW_MACSL_CTL_REG 0x0
#define AM65_CPSW_MACSL_CTL_REG_IFCTL_A BIT(15)
+#define AM65_CPSW_MACSL_CTL_EXT_EN BIT(18)
#define AM65_CPSW_MACSL_CTL_REG_GIG BIT(7)
#define AM65_CPSW_MACSL_CTL_REG_GMII_EN BIT(5)
#define AM65_CPSW_MACSL_CTL_REG_LOOPBACK BIT(1)
@@ -187,6 +188,9 @@ static int am65_cpsw_update_link(struct am65_cpsw_priv
*priv)
AM65_CPSW_MACSL_CTL_REG_GMII_EN;
if (phy->speed == 1000)
mac_control |= AM65_CPSW_MACSL_CTL_REG_GIG;
+ if (phy->speed == 10 && phy_interface_is_rgmii(phy))
+ /* Can be used with in band mode only */
+ mac_control |= AM65_CPSW_MACSL_CTL_EXT_EN;
if (phy->duplex == DUPLEX_FULL)
mac_control |= AM65_CPSW_MACSL_CTL_REG_FULL_DUPLEX;
if (phy->speed == 100)
--
Murali Karicheri
Texas Instruments
[PATCH] net: ethernet: ti: am65-cpsw-nuss: enable 10Mbps link speed in rgmii mode
In RGMII mode the 10Mbps link speed is supported only when CPSW2G MAC SL is
configured for External Control ("in band") mode
CPSW_PN_MAC_CONTROL_REG.CTL_EN(18) = 1
Hence update am65_cpsw_update_link() to follow documentation.
Signed-off-by: Murali Karicheri
---
drivers/net/ti/am65-cpsw-nuss.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 2b77213001..7531a07203 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -61,6 +61,7 @@
#define AM65_CPSW_MACSL_CTL_REG0x0
#define AM65_CPSW_MACSL_CTL_REG_IFCTL_ABIT(15)
+#define AM65_CPSW_MACSL_CTL_EXT_EN BIT(18)
#define AM65_CPSW_MACSL_CTL_REG_GIGBIT(7)
#define AM65_CPSW_MACSL_CTL_REG_GMII_ENBIT(5)
#define AM65_CPSW_MACSL_CTL_REG_LOOPBACK BIT(1)
@@ -187,6 +188,9 @@ static int am65_cpsw_update_link(struct am65_cpsw_priv
*priv)
AM65_CPSW_MACSL_CTL_REG_GMII_EN;
if (phy->speed == 1000)
mac_control |= AM65_CPSW_MACSL_CTL_REG_GIG;
+ if (phy->speed == 10 && phy_interface_is_rgmii(phy))
+ /* Can be used with in band mode only */
+ mac_control |= AM65_CPSW_MACSL_CTL_EXT_EN;
if (phy->duplex == DUPLEX_FULL)
mac_control |= AM65_CPSW_MACSL_CTL_REG_FULL_DUPLEX;
if (phy->speed == 100)
--
2.17.0
Re: [U-Boot] [PATCH v4 0/7] Add netcp networking support on K2G ICE EVM
Hello Maintainer, On 02/25/2019 03:27 PM, Murali Karicheri wrote: This patch series add networking capability to K2G ICE EVM based on netcp driver. Networking function has been tested using the latest master branch from u-boot repo. Following boot mode has been tested for networking. Net boot (tftp images over ethernet interface and boot kernel) log at https://pastebin.ubuntu.com/p/b3nyCXPhWc/ MMC boot: (load images from boot folder of rootfs and boot kernel) log at https://pastebin.ubuntu.com/p/FWycmKd9KB/ Used Linux upstream linux kernel version 4.19.9 for the tests. Please review and apply if this looks good. Thanks Revision history: v4: Sorted pins by pin number in patch 1 and 2 as per comment. Collected Acked-by and included in patch v3: Addressed comment to use KConfig for enable TI PHY driver and also netcp driver comment to use proper function as in cpsw driver. Rebased to latest on master branch. v2: Collected Reviewed-by for patch 1 and 2. Rebased to latest on master Murali Karicheri (7): ARM: k2g-gp-evm: update to rgmii pinmux configuration ARM: k2g-ice: Add pinmux support for rgmii interface net: netcp: add support for phy with rgmii ids ARM: k2g: add a workaround to reset the phy ARM: dts: k2g-evm: remove unused phy-mode property from phy node k2g: config enable ti phy dp83867 for k2g ARM: dts: k2g-ice: add dt node for netcp arch/arm/dts/keystone-k2g-evm.dts | 1 - arch/arm/dts/keystone-k2g-ice.dts | 35 + .../mach-keystone/include/mach/hardware-k2g.h | 3 ++ arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 ++ board/ti/ks2_evm/board_k2g.c | 15 ++ board/ti/ks2_evm/mux-k2g.h| 51 +-- configs/k2g_evm_defconfig | 1 + drivers/net/ti/keystone_net.c | 22 +++- 8 files changed, 116 insertions(+), 17 deletions(-) Please merge this version if looks good. Have addressed all comments received so far. Murali ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 6/7] k2g: config enable ti phy dp83867 for k2g
Enable ti phy dp83867 for k2g Signed-off-by: Murali Karicheri Acked-by: Joe Hershberger --- configs/k2g_evm_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 838b6f14b6..4c5e344d3a 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -70,3 +70,4 @@ CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_SDP=y +CONFIG_PHY_TI=y -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 1/7] ARM: k2g-gp-evm: update to rgmii pinmux configuration
This patch updates pinmux configuration for K2G GP EVM based on
data generated by the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
Signed-off-by: Murali Karicheri
Reviewed-by: Lokesh Vutla
---
board/ti/ks2_evm/mux-k2g.h | 32 +---
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index 706fb7e838..ea23b886f9 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -125,21 +125,23 @@ struct pin_cfg k2g_evm_pin_cfg[] = {
{ 70, MODE(0) }, /* SOC_MMC1_SDWP */
{ 71, MODE(0) }, /* MMC1POW TP124 */
- /* RGMII */
- { 72, MODE(1) | PIN_IEN },/* SOC_RGMII_RXCLK */
- { 77, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD3 */
- { 78, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD2 */
- { 79, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD1 */
- { 80, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD0 */
- { 81, MODE(1) | PIN_IEN },/* SOC_RGMII_RXCTL */
- { 85, MODE(1) }, /* SOC_RGMII_TXCLK */
- { 91, MODE(1) }, /* SOC_RGMII_TXD3 */
- { 92, MODE(1) }, /* SOC_RGMII_TXD2 */
- { 93, MODE(1) }, /* SOC_RGMII_TXD1 */
- { 94, MODE(1) }, /* SOC_RGMII_TXD0 */
- { 95, MODE(1) }, /* SOC_RGMII_TXCTL */
- { 98, MODE(0) }, /* SOC_MDIO_DATA */
- { 99, MODE(0) }, /* SOC_MDIO_CLK */
+ /* EMAC */
+ { 72, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXC */
+ { 77, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD3 */
+ { 78, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD2 */
+ { 79, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD1 */
+ { 80, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD0 */
+ { 81, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXCTL */
+ { 85, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXC */
+ { 91, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD3 */
+ { 92, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD2 */
+ { 93, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD1 */
+ { 94, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD0 */
+ { 95, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXCTL */
+
+ /* MDIO */
+ { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */
+ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */
/* PWM */
{ 73, MODE(4) }, /* SOC_EHRPWM3A */
--
2.17.0
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[U-Boot] [PATCH v4 3/7] net: netcp: add support for phy with rgmii ids
Enhance the netcp driver to support phys that can be configured
for internal delay (rgmii-id, rgmii-rxid, rgmii-txid)
Signed-off-by: Murali Karicheri
Acked-by: Joe Hershberger
---
drivers/net/ti/keystone_net.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ti/keystone_net.c b/drivers/net/ti/keystone_net.c
index a3ba91cc3f..4baeeb83f1 100644
--- a/drivers/net/ti/keystone_net.c
+++ b/drivers/net/ti/keystone_net.c
@@ -88,6 +88,7 @@ struct ks2_eth_priv {
struct mii_dev *mdio_bus;
int phy_addr;
phy_interface_t phy_if;
+ int phy_of_handle;
int sgmii_link_type;
void*mdio_base;
struct rx_buff_desc net_rx_buffs;
@@ -588,6 +589,10 @@ static int ks2_eth_probe(struct udevice *dev)
if (priv->has_mdio) {
priv->phydev = phy_connect(priv->mdio_bus, priv->phy_addr,
dev, priv->phy_if);
+#ifdef CONFIG_DM_ETH
+ if (priv->phy_of_handle)
+ priv->phydev->node = offset_to_ofnode(priv->phy_of_handle);
+#endif
phy_config(priv->phydev);
}
@@ -679,6 +684,7 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
int phy;
int dma_count;
u32 dma_channel[8];
+ const char *phy_mode;
priv->slave_port = fdtdec_get_int(fdt, slave, "slave-port", -1);
priv->net_rx_buffs.rx_flow = priv->slave_port * 8;
@@ -700,7 +706,9 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
priv->link_type = fdtdec_get_int(fdt, slave, "link-interface", -1);
phy = fdtdec_lookup_phandle(fdt, slave, "phy-handle");
+
if (phy >= 0) {
+ priv->phy_of_handle = phy;
priv->phy_addr = fdtdec_get_int(fdt, phy, "reg", -1);
mdio = fdt_parent_offset(fdt, phy);
@@ -717,7 +725,19 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
priv->sgmii_link_type = SGMII_LINK_MAC_PHY;
priv->has_mdio = true;
} else if (priv->link_type == LINK_TYPE_RGMII_LINK_MAC_PHY) {
- priv->phy_if = PHY_INTERFACE_MODE_RGMII;
+ phy_mode = fdt_getprop(fdt, slave, "phy-mode", NULL);
+ if (phy_mode) {
+ priv->phy_if = phy_get_interface_by_name(phy_mode);
+ if (priv->phy_if != PHY_INTERFACE_MODE_RGMII &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_ID &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_RXID &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_TXID) {
+ pr_err("invalid phy-mode\n");
+ return -EINVAL;
+ }
+ } else {
+ priv->phy_if = PHY_INTERFACE_MODE_RGMII;
+ }
pdata->phy_interface = priv->phy_if;
priv->has_mdio = true;
}
--
2.17.0
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[U-Boot] [PATCH v4 7/7] ARM: dts: k2g-ice: add dt node for netcp
This patch adds dt node for DP83867 phy used on K2G ICE board and
also enable netcp device nodes for the board.
EVM hardware spec recommends to add 0.25 nsec delay in the tx
direction and 2.25 nsec delay in the rx direction for internal
delay in the clock path to be on the safer side.
The board straps RX_DV/RX_CTRL pin of on board DP83867 phy in mode
1. Unfortunately, the phy data manual disallows this. Add
ti,dp83867-rxctrl-strap-quirk in the phy node to allow software to
enable workaround suggested for this incorrect strap setting. This
ensures proper operation of this PHY.
The dts bindings are kept in sync with that from 4.14.y linux
kernel. This required the pinmux device related bindings to be
commented out to allow for compilation.
Signed-off-by: Murali Karicheri
Acked-by: Joe Hershberger
---
arch/arm/dts/keystone-k2g-ice.dts | 35 +++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/dts/keystone-k2g-ice.dts
b/arch/arm/dts/keystone-k2g-ice.dts
index 698338b93d..b67332fed5 100644
--- a/arch/arm/dts/keystone-k2g-ice.dts
+++ b/arch/arm/dts/keystone-k2g-ice.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include "keystone-k2g.dtsi"
+#include
/ {
compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone";
@@ -81,3 +82,37 @@
};
};
};
+
+&qmss {
+ status = "okay";
+};
+
+&knav_dmas {
+ status = "okay";
+};
+
+&netcp {
+ pinctrl-names = "default";
+ //pinctrl-0 = <&emac_pins>;
+ status = "okay";
+};
+
+&mdio {
+ pinctrl-names = "default";
+ //pinctrl-0 = <&mdio_pins>;
+ status = "okay";
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
+ ti,fifo-depth = ;
+ ti,min-output-impedance;
+ ti,dp83867-rxctrl-strap-quirk;
+ };
+};
+
+&gbe0 {
+ phy-handle = <ðphy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
--
2.17.0
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[U-Boot] [PATCH v4 4/7] ARM: k2g: add a workaround to reset the phy
This patch adds a workaround to reset the phy one time during boot
using GPIO0 pin 10 to make sure, the Phy latches the configuration
from the input pins correctly.
Signed-off-by: Murali Karicheri
Acked-by: Joe Hershberger
---
.../arm/mach-keystone/include/mach/hardware-k2g.h | 3 +++
board/ti/ks2_evm/board_k2g.c | 15 +++
2 files changed, 18 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
index 8b902641ec..971c081bb3 100644
--- a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
@@ -69,9 +69,12 @@
#define K2G_GPIO0_BASE 0X02603000
#define K2G_GPIO1_BASE 0X0260a000
+#define K2G_GPIO0_BANK0_BASE K2G_GPIO0_BASE + 0x10
#define K2G_GPIO1_BANK2_BASE K2G_GPIO1_BASE + 0x38
#define K2G_GPIO_DIR_OFFSET0x0
+#define K2G_GPIO_OUTDATA_OFFSET0x4
#define K2G_GPIO_SETDATA_OFFSET0x8
+#define K2G_GPIO_CLRDATA_OFFSET0xC
/* BOOTCFG RESETMUX8 */
#define KS2_RSTMUX8(KS2_DEVICE_STATE_CTRL_BASE + 0x328)
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 39a782e479..6d0fc21c67 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -315,6 +315,21 @@ int embedded_dtb_select(void)
BIT(9));
setbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_SETDATA_OFFSET,
BIT(9));
+ } else if (board_is_k2g_ice()) {
+ /* GBE Phy workaround. For Phy to latch the input
+* configuration, a GPIO reset is asserted at the
+* Phy reset pin to latch configuration correctly after SoC
+* reset. GPIO0 Pin 10 (Ball AA20) is used for this on ICE
+* board. Just do a low to high transition.
+*/
+ clrbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_DIR_OFFSET,
+BIT(10));
+ setbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_CLRDATA_OFFSET,
+BIT(10));
+ /* Delay just to get a transition to high */
+ udelay(100);
+ setbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_SETDATA_OFFSET,
+BIT(10));
}
return 0;
--
2.17.0
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[U-Boot] [PATCH v4 2/7] ARM: k2g-ice: Add pinmux support for rgmii interface
This add pinmux configuration for rgmii interface so that network
driver can be supported on K2G ICE boards. The pinmux configurations
for this are generated using the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
As this required some BUFFER_CLASS definitions, same is re-used
from the linux defnitions in include/dt-bindings/pinctrl/keystone.h
Signed-off-by: Murali Karicheri
Reviewed-by: Lokesh Vutla
Acked-by: Joe Hershberger
---
arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 +
board/ti/ks2_evm/mux-k2g.h| 19 +++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/mux-k2g.h
b/arch/arm/mach-keystone/include/mach/mux-k2g.h
index 809b72d5bf..67d47f8172 100644
--- a/arch/arm/mach-keystone/include/mach/mux-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/mux-k2g.h
@@ -27,6 +27,11 @@
#define PIN_PTU(1 << 17) /* pull up */
#define PIN_PTD(0 << 17) /* pull down */
+#define BUFFER_CLASS_B (0 << 19)
+#define BUFFER_CLASS_C (1 << 19)
+#define BUFFER_CLASS_D (2 << 19)
+#define BUFFER_CLASS_E (3 << 19)
+
#define MODE(m)((m) & 0x7)
#define MAX_PIN_N 260
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index ea23b886f9..6aa785ea42 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -348,6 +348,25 @@ struct pin_cfg k2g_ice_evm_pin_cfg[] = {
{ 133, MODE(0) }, /* SOC_QSPI_D2 */
{ 134, MODE(0) }, /* SOC_QSPI_D3 */
{ 135, MODE(0) }, /* SOC_QSPI_CSN0 */
+
+ /* EMAC */
+ { 72, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXC */
+ { 77, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD3 */
+ { 78, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD2 */
+ { 79, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD1 */
+ { 80, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD0 */
+ { 81, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXCTL */
+ { 85, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXC */
+ { 91, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD3 */
+ { 92, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD2 */
+ { 93, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD1 */
+ { 94, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD0 */
+ { 95, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXCTL */
+
+ /* MDIO */
+ { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */
+ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */
+
{ MAX_PIN_N, }
};
--
2.17.0
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[U-Boot] [PATCH v4 0/7] Add netcp networking support on K2G ICE EVM
This patch series add networking capability to K2G ICE EVM based on netcp driver. Networking function has been tested using the latest master branch from u-boot repo. Following boot mode has been tested for networking. Net boot (tftp images over ethernet interface and boot kernel) log at https://pastebin.ubuntu.com/p/b3nyCXPhWc/ MMC boot: (load images from boot folder of rootfs and boot kernel) log at https://pastebin.ubuntu.com/p/FWycmKd9KB/ Used Linux upstream linux kernel version 4.19.9 for the tests. Please review and apply if this looks good. Thanks Revision history: v4: Sorted pins by pin number in patch 1 and 2 as per comment. Collected Acked-by and included in patch v3: Addressed comment to use KConfig for enable TI PHY driver and also netcp driver comment to use proper function as in cpsw driver. Rebased to latest on master branch. v2: Collected Reviewed-by for patch 1 and 2. Rebased to latest on master Murali Karicheri (7): ARM: k2g-gp-evm: update to rgmii pinmux configuration ARM: k2g-ice: Add pinmux support for rgmii interface net: netcp: add support for phy with rgmii ids ARM: k2g: add a workaround to reset the phy ARM: dts: k2g-evm: remove unused phy-mode property from phy node k2g: config enable ti phy dp83867 for k2g ARM: dts: k2g-ice: add dt node for netcp arch/arm/dts/keystone-k2g-evm.dts | 1 - arch/arm/dts/keystone-k2g-ice.dts | 35 + .../mach-keystone/include/mach/hardware-k2g.h | 3 ++ arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 ++ board/ti/ks2_evm/board_k2g.c | 15 ++ board/ti/ks2_evm/mux-k2g.h| 51 +-- configs/k2g_evm_defconfig | 1 + drivers/net/ti/keystone_net.c | 22 +++- 8 files changed, 116 insertions(+), 17 deletions(-) -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 5/7] ARM: dts: k2g-evm: remove unused phy-mode property from phy node
This patch removes the unused phy-mode property from the phy dt node. On
K2G, currently link-interface determines if phy is used or not and is
already set to use rgmii. So this is not needed. Besides phy-mode should
be added to slave interface configuration of the cpsw driver, not in the
phy node.
Signed-off-by: Murali Karicheri
Acked-by: Joe Hershberger
---
arch/arm/dts/keystone-k2g-evm.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/keystone-k2g-evm.dts
b/arch/arm/dts/keystone-k2g-evm.dts
index 6c9de25b94..4820c7e50d 100644
--- a/arch/arm/dts/keystone-k2g-evm.dts
+++ b/arch/arm/dts/keystone-k2g-evm.dts
@@ -29,7 +29,6 @@
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
- phy-mode = "rgmii-id";
};
};
--
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Re: [U-Boot] [PATCH v3 0/7] Add netcp networking support on K2G ICE EVM
Hello Maintainer, On 02/21/2019 12:02 PM, Murali Karicheri wrote: This patch series add networking capability to K2G ICE EVM based on netcp driver. Networking function has been tested using the latest master branch from u-boot repo. Following boot mode has been tested for networking. Net boot (tftp images over ethernet interface and boot kernel) log at https://pastebin.ubuntu.com/p/b3nyCXPhWc/ MMC boot: (load images from boot folder of rootfs and boot kernel) log at https://pastebin.ubuntu.com/p/FWycmKd9KB/ Used Linux upstream linux kernel version 4.19.9 for the tests. Please review and apply if this looks good. Thanks Revision history: v3: Addressed comment to use KConfig for enable TI PHY driver and also netcp driver comment to use proper function as in cpsw driver. Rebased to latest on master branch. v2: Collected Reviewed-by for patch 1 and 2. Rebased to latest on master Murali Karicheri (7): ARM: k2g-ice: Add pinmux support for rgmii interface ARM: k2g-gp-evm: update to rgmii pinmux configuration net: netcp: add support for phy with rgmii ids ARM: k2g: add a workaround to reset the phy ARM: dts: k2g-evm: remove unused phy-mode property from phy node k2g: config enable ti phy dp83867 for k2g ARM: dts: k2g-ice: add dt node for netcp arch/arm/dts/keystone-k2g-evm.dts | 1 - arch/arm/dts/keystone-k2g-ice.dts | 35 + .../mach-keystone/include/mach/hardware-k2g.h | 3 ++ arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 ++ board/ti/ks2_evm/board_k2g.c | 15 ++ board/ti/ks2_evm/mux-k2g.h| 51 +-- configs/k2g_evm_defconfig | 1 + drivers/net/ti/keystone_net.c | 22 +++- 8 files changed, 116 insertions(+), 17 deletions(-) Could you please merge this to master at the earliest if there are no more comments? Thanks Murali ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 7/7] ARM: dts: k2g-ice: add dt node for netcp
This patch adds dt node for DP83867 phy used on K2G ICE board and
also enable netcp device nodes for the board.
EVM hardware spec recommends to add 0.25 nsec delay in the tx
direction and 2.25 nsec delay in the rx direction for internal
delay in the clock path to be on the safer side.
The board straps RX_DV/RX_CTRL pin of on board DP83867 phy in mode
1. Unfortunately, the phy data manual disallows this. Add
ti,dp83867-rxctrl-strap-quirk in the phy node to allow software to
enable workaround suggested for this incorrect strap setting. This
ensures proper operation of this PHY.
The dts bindings are kept in sync with that from 4.14.y linux
kernel. This required the pinmux device related bindings to be
commented out to allow for compilation.
Signed-off-by: Murali Karicheri
---
arch/arm/dts/keystone-k2g-ice.dts | 35 +++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/dts/keystone-k2g-ice.dts
b/arch/arm/dts/keystone-k2g-ice.dts
index 698338b93d..b67332fed5 100644
--- a/arch/arm/dts/keystone-k2g-ice.dts
+++ b/arch/arm/dts/keystone-k2g-ice.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include "keystone-k2g.dtsi"
+#include
/ {
compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone";
@@ -81,3 +82,37 @@
};
};
};
+
+&qmss {
+ status = "okay";
+};
+
+&knav_dmas {
+ status = "okay";
+};
+
+&netcp {
+ pinctrl-names = "default";
+ //pinctrl-0 = <&emac_pins>;
+ status = "okay";
+};
+
+&mdio {
+ pinctrl-names = "default";
+ //pinctrl-0 = <&mdio_pins>;
+ status = "okay";
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
+ ti,fifo-depth = ;
+ ti,min-output-impedance;
+ ti,dp83867-rxctrl-strap-quirk;
+ };
+};
+
+&gbe0 {
+ phy-handle = <ðphy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
--
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[U-Boot] [PATCH v3 3/7] net: netcp: add support for phy with rgmii ids
Enhance the netcp driver to support phys that can be configured
for internal delay (rgmii-id, rgmii-rxid, rgmii-txid)
Signed-off-by: Murali Karicheri
---
drivers/net/ti/keystone_net.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ti/keystone_net.c b/drivers/net/ti/keystone_net.c
index a3ba91cc3f..4baeeb83f1 100644
--- a/drivers/net/ti/keystone_net.c
+++ b/drivers/net/ti/keystone_net.c
@@ -88,6 +88,7 @@ struct ks2_eth_priv {
struct mii_dev *mdio_bus;
int phy_addr;
phy_interface_t phy_if;
+ int phy_of_handle;
int sgmii_link_type;
void*mdio_base;
struct rx_buff_desc net_rx_buffs;
@@ -588,6 +589,10 @@ static int ks2_eth_probe(struct udevice *dev)
if (priv->has_mdio) {
priv->phydev = phy_connect(priv->mdio_bus, priv->phy_addr,
dev, priv->phy_if);
+#ifdef CONFIG_DM_ETH
+ if (priv->phy_of_handle)
+ priv->phydev->node = offset_to_ofnode(priv->phy_of_handle);
+#endif
phy_config(priv->phydev);
}
@@ -679,6 +684,7 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
int phy;
int dma_count;
u32 dma_channel[8];
+ const char *phy_mode;
priv->slave_port = fdtdec_get_int(fdt, slave, "slave-port", -1);
priv->net_rx_buffs.rx_flow = priv->slave_port * 8;
@@ -700,7 +706,9 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
priv->link_type = fdtdec_get_int(fdt, slave, "link-interface", -1);
phy = fdtdec_lookup_phandle(fdt, slave, "phy-handle");
+
if (phy >= 0) {
+ priv->phy_of_handle = phy;
priv->phy_addr = fdtdec_get_int(fdt, phy, "reg", -1);
mdio = fdt_parent_offset(fdt, phy);
@@ -717,7 +725,19 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
priv->sgmii_link_type = SGMII_LINK_MAC_PHY;
priv->has_mdio = true;
} else if (priv->link_type == LINK_TYPE_RGMII_LINK_MAC_PHY) {
- priv->phy_if = PHY_INTERFACE_MODE_RGMII;
+ phy_mode = fdt_getprop(fdt, slave, "phy-mode", NULL);
+ if (phy_mode) {
+ priv->phy_if = phy_get_interface_by_name(phy_mode);
+ if (priv->phy_if != PHY_INTERFACE_MODE_RGMII &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_ID &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_RXID &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_TXID) {
+ pr_err("invalid phy-mode\n");
+ return -EINVAL;
+ }
+ } else {
+ priv->phy_if = PHY_INTERFACE_MODE_RGMII;
+ }
pdata->phy_interface = priv->phy_if;
priv->has_mdio = true;
}
--
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[U-Boot] [PATCH v3 0/7] Add netcp networking support on K2G ICE EVM
This patch series add networking capability to K2G ICE EVM based on netcp driver. Networking function has been tested using the latest master branch from u-boot repo. Following boot mode has been tested for networking. Net boot (tftp images over ethernet interface and boot kernel) log at https://pastebin.ubuntu.com/p/b3nyCXPhWc/ MMC boot: (load images from boot folder of rootfs and boot kernel) log at https://pastebin.ubuntu.com/p/FWycmKd9KB/ Used Linux upstream linux kernel version 4.19.9 for the tests. Please review and apply if this looks good. Thanks Revision history: v3: Addressed comment to use KConfig for enable TI PHY driver and also netcp driver comment to use proper function as in cpsw driver. Rebased to latest on master branch. v2: Collected Reviewed-by for patch 1 and 2. Rebased to latest on master Murali Karicheri (7): ARM: k2g-ice: Add pinmux support for rgmii interface ARM: k2g-gp-evm: update to rgmii pinmux configuration net: netcp: add support for phy with rgmii ids ARM: k2g: add a workaround to reset the phy ARM: dts: k2g-evm: remove unused phy-mode property from phy node k2g: config enable ti phy dp83867 for k2g ARM: dts: k2g-ice: add dt node for netcp arch/arm/dts/keystone-k2g-evm.dts | 1 - arch/arm/dts/keystone-k2g-ice.dts | 35 + .../mach-keystone/include/mach/hardware-k2g.h | 3 ++ arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 ++ board/ti/ks2_evm/board_k2g.c | 15 ++ board/ti/ks2_evm/mux-k2g.h| 51 +-- configs/k2g_evm_defconfig | 1 + drivers/net/ti/keystone_net.c | 22 +++- 8 files changed, 116 insertions(+), 17 deletions(-) -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 5/7] ARM: dts: k2g-evm: remove unused phy-mode property from phy node
This patch removes the unused phy-mode property from the phy dt node. On
K2G, currently link-interface determines if phy is used or not and is
already set to use rgmii. So this is not needed. Besides phy-mode should
be added to slave interface configuration of the cpsw driver, not in the
phy node.
Signed-off-by: Murali Karicheri
---
arch/arm/dts/keystone-k2g-evm.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/keystone-k2g-evm.dts
b/arch/arm/dts/keystone-k2g-evm.dts
index 6c9de25b94..4820c7e50d 100644
--- a/arch/arm/dts/keystone-k2g-evm.dts
+++ b/arch/arm/dts/keystone-k2g-evm.dts
@@ -29,7 +29,6 @@
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
- phy-mode = "rgmii-id";
};
};
--
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[U-Boot] [PATCH v3 6/7] k2g: config enable ti phy dp83867 for k2g
Enable ti phy dp83867 for k2g Signed-off-by: Murali Karicheri --- configs/k2g_evm_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 838b6f14b6..4c5e344d3a 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -70,3 +70,4 @@ CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_SDP=y +CONFIG_PHY_TI=y -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 4/7] ARM: k2g: add a workaround to reset the phy
This patch adds a workaround to reset the phy one time during boot
using GPIO0 pin 10 to make sure, the Phy latches the configuration
from the input pins correctly.
Signed-off-by: Murali Karicheri
---
.../arm/mach-keystone/include/mach/hardware-k2g.h | 3 +++
board/ti/ks2_evm/board_k2g.c | 15 +++
2 files changed, 18 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
index 8b902641ec..971c081bb3 100644
--- a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
@@ -69,9 +69,12 @@
#define K2G_GPIO0_BASE 0X02603000
#define K2G_GPIO1_BASE 0X0260a000
+#define K2G_GPIO0_BANK0_BASE K2G_GPIO0_BASE + 0x10
#define K2G_GPIO1_BANK2_BASE K2G_GPIO1_BASE + 0x38
#define K2G_GPIO_DIR_OFFSET0x0
+#define K2G_GPIO_OUTDATA_OFFSET0x4
#define K2G_GPIO_SETDATA_OFFSET0x8
+#define K2G_GPIO_CLRDATA_OFFSET0xC
/* BOOTCFG RESETMUX8 */
#define KS2_RSTMUX8(KS2_DEVICE_STATE_CTRL_BASE + 0x328)
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 39a782e479..6d0fc21c67 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -315,6 +315,21 @@ int embedded_dtb_select(void)
BIT(9));
setbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_SETDATA_OFFSET,
BIT(9));
+ } else if (board_is_k2g_ice()) {
+ /* GBE Phy workaround. For Phy to latch the input
+* configuration, a GPIO reset is asserted at the
+* Phy reset pin to latch configuration correctly after SoC
+* reset. GPIO0 Pin 10 (Ball AA20) is used for this on ICE
+* board. Just do a low to high transition.
+*/
+ clrbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_DIR_OFFSET,
+BIT(10));
+ setbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_CLRDATA_OFFSET,
+BIT(10));
+ /* Delay just to get a transition to high */
+ udelay(100);
+ setbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_SETDATA_OFFSET,
+BIT(10));
}
return 0;
--
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[U-Boot] [PATCH v3 1/7] ARM: k2g-ice: Add pinmux support for rgmii interface
This add pinmux configuration for rgmii interface so that network
driver can be supported on K2G ICE boards. The pinmux configurations
for this are generated using the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
As this required some BUFFER_CLASS definitions, same is re-used
from the linux defnitions in include/dt-bindings/pinctrl/keystone.h
Signed-off-by: Murali Karicheri
Reviewed-by: Lokesh Vutla
---
arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 +
board/ti/ks2_evm/mux-k2g.h| 19 +++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/mux-k2g.h
b/arch/arm/mach-keystone/include/mach/mux-k2g.h
index 809b72d5bf..67d47f8172 100644
--- a/arch/arm/mach-keystone/include/mach/mux-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/mux-k2g.h
@@ -27,6 +27,11 @@
#define PIN_PTU(1 << 17) /* pull up */
#define PIN_PTD(0 << 17) /* pull down */
+#define BUFFER_CLASS_B (0 << 19)
+#define BUFFER_CLASS_C (1 << 19)
+#define BUFFER_CLASS_D (2 << 19)
+#define BUFFER_CLASS_E (3 << 19)
+
#define MODE(m)((m) & 0x7)
#define MAX_PIN_N 260
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index 706fb7e838..8c184a85ae 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -346,6 +346,25 @@ struct pin_cfg k2g_ice_evm_pin_cfg[] = {
{ 133, MODE(0) }, /* SOC_QSPI_D2 */
{ 134, MODE(0) }, /* SOC_QSPI_D3 */
{ 135, MODE(0) }, /* SOC_QSPI_CSN0 */
+
+ /* EMAC */
+ { 79, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD1 */
+ { 78, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD2 */
+ { 77, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD3 */
+ { 80, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD0 */
+ { 94, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD0 */
+ { 93, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD1 */
+ { 92, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD2 */
+ { 91, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD3 */
+ { 85, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXC */
+ { 95, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXCTL */
+ { 72, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXC */
+ { 81, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXCTL */
+
+ /* MDIO */
+ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */
+ { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */
+
{ MAX_PIN_N, }
};
--
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[U-Boot] [PATCH v3 2/7] ARM: k2g-gp-evm: update to rgmii pinmux configuration
This patch updates pinmux configuration for K2G GP EVM based on
data generated by the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
Signed-off-by: Murali Karicheri
Reviewed-by: Lokesh Vutla
---
board/ti/ks2_evm/mux-k2g.h | 32 +---
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index 8c184a85ae..89c49f9e4f 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -125,21 +125,23 @@ struct pin_cfg k2g_evm_pin_cfg[] = {
{ 70, MODE(0) }, /* SOC_MMC1_SDWP */
{ 71, MODE(0) }, /* MMC1POW TP124 */
- /* RGMII */
- { 72, MODE(1) | PIN_IEN },/* SOC_RGMII_RXCLK */
- { 77, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD3 */
- { 78, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD2 */
- { 79, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD1 */
- { 80, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD0 */
- { 81, MODE(1) | PIN_IEN },/* SOC_RGMII_RXCTL */
- { 85, MODE(1) }, /* SOC_RGMII_TXCLK */
- { 91, MODE(1) }, /* SOC_RGMII_TXD3 */
- { 92, MODE(1) }, /* SOC_RGMII_TXD2 */
- { 93, MODE(1) }, /* SOC_RGMII_TXD1 */
- { 94, MODE(1) }, /* SOC_RGMII_TXD0 */
- { 95, MODE(1) }, /* SOC_RGMII_TXCTL */
- { 98, MODE(0) }, /* SOC_MDIO_DATA */
- { 99, MODE(0) }, /* SOC_MDIO_CLK */
+ /* EMAC */
+ { 79, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD1 */
+ { 78, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD2 */
+ { 77, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD3 */
+ { 80, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD0 */
+ { 94, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD0 */
+ { 93, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD1 */
+ { 92, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD2 */
+ { 91, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD3 */
+ { 85, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXC */
+ { 95, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXCTL */
+ { 72, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXC */
+ { 81, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXCTL */
+
+ /* MDIO */
+ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */
+ { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */
/* PWM */
{ 73, MODE(4) }, /* SOC_EHRPWM3A */
--
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[U-Boot] [PATCH v2 3/7] net: netcp: add support for phy with rgmii ids
Enhance the netcp driver to support phys that can be configured
for internal delay (rgmii-id, rgmii-rxid, rgmii-txid)
Signed-off-by: Murali Karicheri
---
drivers/net/ti/keystone_net.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ti/keystone_net.c b/drivers/net/ti/keystone_net.c
index a3ba91cc3f..defc57b29f 100644
--- a/drivers/net/ti/keystone_net.c
+++ b/drivers/net/ti/keystone_net.c
@@ -88,6 +88,7 @@ struct ks2_eth_priv {
struct mii_dev *mdio_bus;
int phy_addr;
phy_interface_t phy_if;
+ int phy_of_handle;
int sgmii_link_type;
void*mdio_base;
struct rx_buff_desc net_rx_buffs;
@@ -588,6 +589,10 @@ static int ks2_eth_probe(struct udevice *dev)
if (priv->has_mdio) {
priv->phydev = phy_connect(priv->mdio_bus, priv->phy_addr,
dev, priv->phy_if);
+#ifdef CONFIG_DM_ETH
+ if (priv->phy_of_handle)
+ dev_set_of_offset(priv->phydev->dev, priv->phy_of_handle);
+#endif
phy_config(priv->phydev);
}
@@ -679,6 +684,7 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
int phy;
int dma_count;
u32 dma_channel[8];
+ const char *phy_mode;
priv->slave_port = fdtdec_get_int(fdt, slave, "slave-port", -1);
priv->net_rx_buffs.rx_flow = priv->slave_port * 8;
@@ -700,7 +706,9 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
priv->link_type = fdtdec_get_int(fdt, slave, "link-interface", -1);
phy = fdtdec_lookup_phandle(fdt, slave, "phy-handle");
+
if (phy >= 0) {
+ priv->phy_of_handle = phy;
priv->phy_addr = fdtdec_get_int(fdt, phy, "reg", -1);
mdio = fdt_parent_offset(fdt, phy);
@@ -717,7 +725,19 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
priv->sgmii_link_type = SGMII_LINK_MAC_PHY;
priv->has_mdio = true;
} else if (priv->link_type == LINK_TYPE_RGMII_LINK_MAC_PHY) {
- priv->phy_if = PHY_INTERFACE_MODE_RGMII;
+ phy_mode = fdt_getprop(fdt, slave, "phy-mode", NULL);
+ if (phy_mode) {
+ priv->phy_if = phy_get_interface_by_name(phy_mode);
+ if (priv->phy_if != PHY_INTERFACE_MODE_RGMII &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_ID &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_RXID &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_TXID) {
+ pr_err("invalid phy-mode\n");
+ return -EINVAL;
+ }
+ } else {
+ priv->phy_if = PHY_INTERFACE_MODE_RGMII;
+ }
pdata->phy_interface = priv->phy_if;
priv->has_mdio = true;
}
--
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[U-Boot] [PATCH v2 0/7] Add netcp networking support on K2G ICE EVM
This patch series add networking capability to K2G ICE EVM based on netcp driver. Networking function has been tested using the latest master branch from u-boot repo. Following boot mode has been tested for networking. Net boot (tftp images over ethernet interface and boot kernel) log at https://pastebin.ubuntu.com/p/b3nyCXPhWc/ MMC boot: (load images from boot folder of rootfs and boot kernel) log at https://pastebin.ubuntu.com/p/FWycmKd9KB/ Used Linux upstream linux kernel version 4.19.9 for the tests. Please review and apply if this looks good. Thanks Revision history: v2: Collected Reviewed-by for patch 1 and 2. Rebased to latest on master Murali Karicheri (7): ARM: k2g-ice: Add pinmux support for rgmii interface ARM: k2g-gp-evm: update to rgmii pinmux configuration net: netcp: add support for phy with rgmii ids ARM: k2g: add a workaround to reset the phy k2g: config enable ti phy dp83867 for k2g ARM: dts: k2g-evm: remove unused phy-mode property from phy node ARM: dts: k2g-ice: add dt node for netcp arch/arm/dts/keystone-k2g-evm.dts | 1 - arch/arm/dts/keystone-k2g-ice.dts | 35 + .../mach-keystone/include/mach/hardware-k2g.h | 3 ++ arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 ++ board/ti/ks2_evm/board_k2g.c | 15 ++ board/ti/ks2_evm/mux-k2g.h| 51 +-- drivers/net/ti/keystone_net.c | 22 +++- include/configs/k2g_evm.h | 1 + 8 files changed, 116 insertions(+), 17 deletions(-) -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 4/7] ARM: k2g: add a workaround to reset the phy
This patch adds a workaround to reset the phy one time during boot
using GPIO0 pin 10 to make sure, the Phy latches the configuration
from the input pins correctly.
Signed-off-by: Murali Karicheri
---
.../arm/mach-keystone/include/mach/hardware-k2g.h | 3 +++
board/ti/ks2_evm/board_k2g.c | 15 +++
2 files changed, 18 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
index 8b902641ec..971c081bb3 100644
--- a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
@@ -69,9 +69,12 @@
#define K2G_GPIO0_BASE 0X02603000
#define K2G_GPIO1_BASE 0X0260a000
+#define K2G_GPIO0_BANK0_BASE K2G_GPIO0_BASE + 0x10
#define K2G_GPIO1_BANK2_BASE K2G_GPIO1_BASE + 0x38
#define K2G_GPIO_DIR_OFFSET0x0
+#define K2G_GPIO_OUTDATA_OFFSET0x4
#define K2G_GPIO_SETDATA_OFFSET0x8
+#define K2G_GPIO_CLRDATA_OFFSET0xC
/* BOOTCFG RESETMUX8 */
#define KS2_RSTMUX8(KS2_DEVICE_STATE_CTRL_BASE + 0x328)
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 39a782e479..6d0fc21c67 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -315,6 +315,21 @@ int embedded_dtb_select(void)
BIT(9));
setbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_SETDATA_OFFSET,
BIT(9));
+ } else if (board_is_k2g_ice()) {
+ /* GBE Phy workaround. For Phy to latch the input
+* configuration, a GPIO reset is asserted at the
+* Phy reset pin to latch configuration correctly after SoC
+* reset. GPIO0 Pin 10 (Ball AA20) is used for this on ICE
+* board. Just do a low to high transition.
+*/
+ clrbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_DIR_OFFSET,
+BIT(10));
+ setbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_CLRDATA_OFFSET,
+BIT(10));
+ /* Delay just to get a transition to high */
+ udelay(100);
+ setbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_SETDATA_OFFSET,
+BIT(10));
}
return 0;
--
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[U-Boot] [PATCH v2 7/7] ARM: dts: k2g-ice: add dt node for netcp
This patch adds dt node for DP83867 phy used on K2G ICE board and
also enable netcp device nodes for the board.
EVM hardware spec recommends to add 0.25 nsec delay in the tx
direction and 2.25 nsec delay in the rx direction for internal
delay in the clock path to be on the safer side.
The board straps RX_DV/RX_CTRL pin of on board DP83867 phy in mode
1. Unfortunately, the phy data manual disallows this. Add
ti,dp83867-rxctrl-strap-quirk in the phy node to allow software to
enable workaround suggested for this incorrect strap setting. This
ensures proper operation of this PHY.
The dts bindings are kept in sync with that from 4.14.y linux
kernel. This required the pinmux device related bindings to be
commented out to allow for compilation.
Signed-off-by: Murali Karicheri
---
arch/arm/dts/keystone-k2g-ice.dts | 35 +++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/dts/keystone-k2g-ice.dts
b/arch/arm/dts/keystone-k2g-ice.dts
index 698338b93d..b67332fed5 100644
--- a/arch/arm/dts/keystone-k2g-ice.dts
+++ b/arch/arm/dts/keystone-k2g-ice.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include "keystone-k2g.dtsi"
+#include
/ {
compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone";
@@ -81,3 +82,37 @@
};
};
};
+
+&qmss {
+ status = "okay";
+};
+
+&knav_dmas {
+ status = "okay";
+};
+
+&netcp {
+ pinctrl-names = "default";
+ //pinctrl-0 = <&emac_pins>;
+ status = "okay";
+};
+
+&mdio {
+ pinctrl-names = "default";
+ //pinctrl-0 = <&mdio_pins>;
+ status = "okay";
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
+ ti,fifo-depth = ;
+ ti,min-output-impedance;
+ ti,dp83867-rxctrl-strap-quirk;
+ };
+};
+
+&gbe0 {
+ phy-handle = <ðphy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
--
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[U-Boot] [PATCH v2 1/7] ARM: k2g-ice: Add pinmux support for rgmii interface
This add pinmux configuration for rgmii interface so that network
driver can be supported on K2G ICE boards. The pinmux configurations
for this are generated using the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
As this required some BUFFER_CLASS definitions, same is re-used
from the linux defnitions in include/dt-bindings/pinctrl/keystone.h
Signed-off-by: Murali Karicheri
Reviewed-by: Lokesh Vutla
---
arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 +
board/ti/ks2_evm/mux-k2g.h| 19 +++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/mux-k2g.h
b/arch/arm/mach-keystone/include/mach/mux-k2g.h
index 809b72d5bf..67d47f8172 100644
--- a/arch/arm/mach-keystone/include/mach/mux-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/mux-k2g.h
@@ -27,6 +27,11 @@
#define PIN_PTU(1 << 17) /* pull up */
#define PIN_PTD(0 << 17) /* pull down */
+#define BUFFER_CLASS_B (0 << 19)
+#define BUFFER_CLASS_C (1 << 19)
+#define BUFFER_CLASS_D (2 << 19)
+#define BUFFER_CLASS_E (3 << 19)
+
#define MODE(m)((m) & 0x7)
#define MAX_PIN_N 260
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index 706fb7e838..8c184a85ae 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -346,6 +346,25 @@ struct pin_cfg k2g_ice_evm_pin_cfg[] = {
{ 133, MODE(0) }, /* SOC_QSPI_D2 */
{ 134, MODE(0) }, /* SOC_QSPI_D3 */
{ 135, MODE(0) }, /* SOC_QSPI_CSN0 */
+
+ /* EMAC */
+ { 79, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD1 */
+ { 78, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD2 */
+ { 77, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD3 */
+ { 80, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD0 */
+ { 94, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD0 */
+ { 93, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD1 */
+ { 92, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD2 */
+ { 91, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD3 */
+ { 85, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXC */
+ { 95, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXCTL */
+ { 72, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXC */
+ { 81, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXCTL */
+
+ /* MDIO */
+ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */
+ { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */
+
{ MAX_PIN_N, }
};
--
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[U-Boot] [PATCH v2 5/7] k2g: config enable ti phy dp83867 for k2g
Enable ti phy driver dp83867 for k2g based boards. Signed-off-by: Murali Karicheri --- include/configs/k2g_evm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 90f9a9922c..9fe5411619 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -98,4 +98,5 @@ #include +#define CONFIG_PHY_TI #endif /* __CONFIG_K2G_EVM_H */ -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 6/7] ARM: dts: k2g-evm: remove unused phy-mode property from phy node
This patch removes the unused phy-mode property from the phy dt node. On
K2G, currently link-interface determines if phy is used or not and is
already set to use rgmii. So this is not needed. Besides phy-mode should
be added to slave interface configuration of the cpsw driver, not in the
phy node.
Signed-off-by: Murali Karicheri
---
arch/arm/dts/keystone-k2g-evm.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/keystone-k2g-evm.dts
b/arch/arm/dts/keystone-k2g-evm.dts
index 6c9de25b94..4820c7e50d 100644
--- a/arch/arm/dts/keystone-k2g-evm.dts
+++ b/arch/arm/dts/keystone-k2g-evm.dts
@@ -29,7 +29,6 @@
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
- phy-mode = "rgmii-id";
};
};
--
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[U-Boot] [PATCH v2 2/7] ARM: k2g-gp-evm: update to rgmii pinmux configuration
This patch updates pinmux configuration for K2G GP EVM based on
data generated by the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
Signed-off-by: Murali Karicheri
Reviewed-by: Lokesh Vutla
---
board/ti/ks2_evm/mux-k2g.h | 32 +---
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index 8c184a85ae..89c49f9e4f 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -125,21 +125,23 @@ struct pin_cfg k2g_evm_pin_cfg[] = {
{ 70, MODE(0) }, /* SOC_MMC1_SDWP */
{ 71, MODE(0) }, /* MMC1POW TP124 */
- /* RGMII */
- { 72, MODE(1) | PIN_IEN },/* SOC_RGMII_RXCLK */
- { 77, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD3 */
- { 78, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD2 */
- { 79, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD1 */
- { 80, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD0 */
- { 81, MODE(1) | PIN_IEN },/* SOC_RGMII_RXCTL */
- { 85, MODE(1) }, /* SOC_RGMII_TXCLK */
- { 91, MODE(1) }, /* SOC_RGMII_TXD3 */
- { 92, MODE(1) }, /* SOC_RGMII_TXD2 */
- { 93, MODE(1) }, /* SOC_RGMII_TXD1 */
- { 94, MODE(1) }, /* SOC_RGMII_TXD0 */
- { 95, MODE(1) }, /* SOC_RGMII_TXCTL */
- { 98, MODE(0) }, /* SOC_MDIO_DATA */
- { 99, MODE(0) }, /* SOC_MDIO_CLK */
+ /* EMAC */
+ { 79, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD1 */
+ { 78, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD2 */
+ { 77, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD3 */
+ { 80, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD0 */
+ { 94, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD0 */
+ { 93, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD1 */
+ { 92, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD2 */
+ { 91, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD3 */
+ { 85, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXC */
+ { 95, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXCTL */
+ { 72, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXC */
+ { 81, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXCTL */
+
+ /* MDIO */
+ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */
+ { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */
/* PWM */
{ 73, MODE(4) }, /* SOC_EHRPWM3A */
--
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Re: [U-Boot] [PATCH 0/7] Add netcp networking support on K2G ICE EVM
Hi, On 02/11/2019 12:20 PM, Murali Karicheri wrote: - Resending this as I was not subscribed to u-boot mailing list when the initial patch series was sent. Sorry for the trouble. This patch series add networking capability to K2G ICE EVM based on netcp driver. Networking function has been tested using the latest master branch from u-boot repo. Following boot mode has been tested for networking. Net boot (tftp images over ethernet interface and boot kernel) log at https://pastebin.ubuntu.com/p/b3nyCXPhWc/ MMC boot: (load images from boot folder of rootfs and boot kernel) log at https://pastebin.ubuntu.com/p/FWycmKd9KB/ Used Linux upstream linux kernel version 4.19.9 for the tests. Please review and apply if this looks good. A gentle reminder to review and apply. Thanks and regards, Murali Thanks Murali Karicheri (7): ARM: k2g-ice: Add pinmux support for rgmii interface ARM: k2g-gp-evm: update to rgmii pinmux configuration net: netcp: add support for phy with rgmii ids ARM: k2g: add a workaround to reset the phy k2g: config enable ti phy dp83867 for k2g ARM: dts: k2g-evm: remove unused phy-mode property from phy node ARM: dts: k2g-ice: add dt node for netcp arch/arm/dts/keystone-k2g-evm.dts | 1 - arch/arm/dts/keystone-k2g-ice.dts | 35 + .../mach-keystone/include/mach/hardware-k2g.h | 3 ++ arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 ++ board/ti/ks2_evm/board_k2g.c | 15 ++ board/ti/ks2_evm/mux-k2g.h| 51 +-- drivers/net/ti/keystone_net.c | 22 +++- include/configs/k2g_evm.h | 1 + 8 files changed, 116 insertions(+), 17 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 5/7] k2g: config enable ti phy dp83867 for k2g
Enable ti phy driver dp83867 for k2g based boards. Signed-off-by: Murali Karicheri --- include/configs/k2g_evm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 90f9a9922c..9fe5411619 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -98,4 +98,5 @@ #include +#define CONFIG_PHY_TI #endif /* __CONFIG_K2G_EVM_H */ -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 7/7] ARM: dts: k2g-ice: add dt node for netcp
This patch adds dt node for DP83867 phy used on K2G ICE board and
also enable netcp device nodes for the board.
EVM hardware spec recommends to add 0.25 nsec delay in the tx
direction and 2.25 nsec delay in the rx direction for internal
delay in the clock path to be on the safer side.
The board straps RX_DV/RX_CTRL pin of on board DP83867 phy in mode
1. Unfortunately, the phy data manual disallows this. Add
ti,dp83867-rxctrl-strap-quirk in the phy node to allow software to
enable workaround suggested for this incorrect strap setting. This
ensures proper operation of this PHY.
The dts bindings are kept in sync with that from 4.14.y linux
kernel. This required the pinmux device related bindings to be
commented out to allow for compilation.
Signed-off-by: Murali Karicheri
---
arch/arm/dts/keystone-k2g-ice.dts | 35 +++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/dts/keystone-k2g-ice.dts
b/arch/arm/dts/keystone-k2g-ice.dts
index 698338b93d..b67332fed5 100644
--- a/arch/arm/dts/keystone-k2g-ice.dts
+++ b/arch/arm/dts/keystone-k2g-ice.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include "keystone-k2g.dtsi"
+#include
/ {
compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone";
@@ -81,3 +82,37 @@
};
};
};
+
+&qmss {
+ status = "okay";
+};
+
+&knav_dmas {
+ status = "okay";
+};
+
+&netcp {
+ pinctrl-names = "default";
+ //pinctrl-0 = <&emac_pins>;
+ status = "okay";
+};
+
+&mdio {
+ pinctrl-names = "default";
+ //pinctrl-0 = <&mdio_pins>;
+ status = "okay";
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
+ ti,fifo-depth = ;
+ ti,min-output-impedance;
+ ti,dp83867-rxctrl-strap-quirk;
+ };
+};
+
+&gbe0 {
+ phy-handle = <ðphy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
--
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[U-Boot] [PATCH 3/7] net: netcp: add support for phy with rgmii ids
Enhance the netcp driver to support phys that can be configured
for internal delay (rgmii-id, rgmii-rxid, rgmii-txid)
Signed-off-by: Murali Karicheri
---
drivers/net/ti/keystone_net.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ti/keystone_net.c b/drivers/net/ti/keystone_net.c
index a3ba91cc3f..defc57b29f 100644
--- a/drivers/net/ti/keystone_net.c
+++ b/drivers/net/ti/keystone_net.c
@@ -88,6 +88,7 @@ struct ks2_eth_priv {
struct mii_dev *mdio_bus;
int phy_addr;
phy_interface_t phy_if;
+ int phy_of_handle;
int sgmii_link_type;
void*mdio_base;
struct rx_buff_desc net_rx_buffs;
@@ -588,6 +589,10 @@ static int ks2_eth_probe(struct udevice *dev)
if (priv->has_mdio) {
priv->phydev = phy_connect(priv->mdio_bus, priv->phy_addr,
dev, priv->phy_if);
+#ifdef CONFIG_DM_ETH
+ if (priv->phy_of_handle)
+ dev_set_of_offset(priv->phydev->dev, priv->phy_of_handle);
+#endif
phy_config(priv->phydev);
}
@@ -679,6 +684,7 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
int phy;
int dma_count;
u32 dma_channel[8];
+ const char *phy_mode;
priv->slave_port = fdtdec_get_int(fdt, slave, "slave-port", -1);
priv->net_rx_buffs.rx_flow = priv->slave_port * 8;
@@ -700,7 +706,9 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
priv->link_type = fdtdec_get_int(fdt, slave, "link-interface", -1);
phy = fdtdec_lookup_phandle(fdt, slave, "phy-handle");
+
if (phy >= 0) {
+ priv->phy_of_handle = phy;
priv->phy_addr = fdtdec_get_int(fdt, phy, "reg", -1);
mdio = fdt_parent_offset(fdt, phy);
@@ -717,7 +725,19 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
priv->sgmii_link_type = SGMII_LINK_MAC_PHY;
priv->has_mdio = true;
} else if (priv->link_type == LINK_TYPE_RGMII_LINK_MAC_PHY) {
- priv->phy_if = PHY_INTERFACE_MODE_RGMII;
+ phy_mode = fdt_getprop(fdt, slave, "phy-mode", NULL);
+ if (phy_mode) {
+ priv->phy_if = phy_get_interface_by_name(phy_mode);
+ if (priv->phy_if != PHY_INTERFACE_MODE_RGMII &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_ID &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_RXID &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_TXID) {
+ pr_err("invalid phy-mode\n");
+ return -EINVAL;
+ }
+ } else {
+ priv->phy_if = PHY_INTERFACE_MODE_RGMII;
+ }
pdata->phy_interface = priv->phy_if;
priv->has_mdio = true;
}
--
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[U-Boot] [PATCH 7/7] ARM: dts: k2g-ice: add dt node for netcp
This patch adds dt node for DP83867 phy used on K2G ICE board and
also enable netcp device nodes for the board.
EVM hardware spec recommends to add 0.25 nsec delay in the tx
direction and 2.25 nsec delay in the rx direction for internal
delay in the clock path to be on the safer side.
The board straps RX_DV/RX_CTRL pin of on board DP83867 phy in mode
1. Unfortunately, the phy data manual disallows this. Add
ti,dp83867-rxctrl-strap-quirk in the phy node to allow software to
enable workaround suggested for this incorrect strap setting. This
ensures proper operation of this PHY.
The dts bindings are kept in sync with that from 4.14.y linux
kernel. This required the pinmux device related bindings to be
commented out to allow for compilation.
Signed-off-by: Murali Karicheri
---
arch/arm/dts/keystone-k2g-ice.dts | 35 +++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/dts/keystone-k2g-ice.dts
b/arch/arm/dts/keystone-k2g-ice.dts
index 698338b93d..b67332fed5 100644
--- a/arch/arm/dts/keystone-k2g-ice.dts
+++ b/arch/arm/dts/keystone-k2g-ice.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include "keystone-k2g.dtsi"
+#include
/ {
compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone";
@@ -81,3 +82,37 @@
};
};
};
+
+&qmss {
+ status = "okay";
+};
+
+&knav_dmas {
+ status = "okay";
+};
+
+&netcp {
+ pinctrl-names = "default";
+ //pinctrl-0 = <&emac_pins>;
+ status = "okay";
+};
+
+&mdio {
+ pinctrl-names = "default";
+ //pinctrl-0 = <&mdio_pins>;
+ status = "okay";
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
+ ti,fifo-depth = ;
+ ti,min-output-impedance;
+ ti,dp83867-rxctrl-strap-quirk;
+ };
+};
+
+&gbe0 {
+ phy-handle = <ðphy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
--
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[U-Boot] [PATCH 0/7] Add netcp networking support on K2G ICE EVM
- Resending this as I was not subscribed to u-boot mailing list when the initial patch series was sent. Sorry for the trouble. This patch series add networking capability to K2G ICE EVM based on netcp driver. Networking function has been tested using the latest master branch from u-boot repo. Following boot mode has been tested for networking. Net boot (tftp images over ethernet interface and boot kernel) log at https://pastebin.ubuntu.com/p/b3nyCXPhWc/ MMC boot: (load images from boot folder of rootfs and boot kernel) log at https://pastebin.ubuntu.com/p/FWycmKd9KB/ Used Linux upstream linux kernel version 4.19.9 for the tests. Please review and apply if this looks good. Thanks Murali Karicheri (7): ARM: k2g-ice: Add pinmux support for rgmii interface ARM: k2g-gp-evm: update to rgmii pinmux configuration net: netcp: add support for phy with rgmii ids ARM: k2g: add a workaround to reset the phy k2g: config enable ti phy dp83867 for k2g ARM: dts: k2g-evm: remove unused phy-mode property from phy node ARM: dts: k2g-ice: add dt node for netcp arch/arm/dts/keystone-k2g-evm.dts | 1 - arch/arm/dts/keystone-k2g-ice.dts | 35 + .../mach-keystone/include/mach/hardware-k2g.h | 3 ++ arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 ++ board/ti/ks2_evm/board_k2g.c | 15 ++ board/ti/ks2_evm/mux-k2g.h| 51 +-- drivers/net/ti/keystone_net.c | 22 +++- include/configs/k2g_evm.h | 1 + 8 files changed, 116 insertions(+), 17 deletions(-) -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 4/7] ARM: k2g: add a workaround to reset the phy
This patch adds a workaround to reset the phy one time during boot
using GPIO0 pin 10 to make sure, the Phy latches the configuration
from the input pins correctly.
Signed-off-by: Murali Karicheri
---
.../arm/mach-keystone/include/mach/hardware-k2g.h | 3 +++
board/ti/ks2_evm/board_k2g.c | 15 +++
2 files changed, 18 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
index 8b902641ec..971c081bb3 100644
--- a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
@@ -69,9 +69,12 @@
#define K2G_GPIO0_BASE 0X02603000
#define K2G_GPIO1_BASE 0X0260a000
+#define K2G_GPIO0_BANK0_BASE K2G_GPIO0_BASE + 0x10
#define K2G_GPIO1_BANK2_BASE K2G_GPIO1_BASE + 0x38
#define K2G_GPIO_DIR_OFFSET0x0
+#define K2G_GPIO_OUTDATA_OFFSET0x4
#define K2G_GPIO_SETDATA_OFFSET0x8
+#define K2G_GPIO_CLRDATA_OFFSET0xC
/* BOOTCFG RESETMUX8 */
#define KS2_RSTMUX8(KS2_DEVICE_STATE_CTRL_BASE + 0x328)
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 39a782e479..6d0fc21c67 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -315,6 +315,21 @@ int embedded_dtb_select(void)
BIT(9));
setbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_SETDATA_OFFSET,
BIT(9));
+ } else if (board_is_k2g_ice()) {
+ /* GBE Phy workaround. For Phy to latch the input
+* configuration, a GPIO reset is asserted at the
+* Phy reset pin to latch configuration correctly after SoC
+* reset. GPIO0 Pin 10 (Ball AA20) is used for this on ICE
+* board. Just do a low to high transition.
+*/
+ clrbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_DIR_OFFSET,
+BIT(10));
+ setbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_CLRDATA_OFFSET,
+BIT(10));
+ /* Delay just to get a transition to high */
+ udelay(100);
+ setbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_SETDATA_OFFSET,
+BIT(10));
}
return 0;
--
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[U-Boot] [PATCH 6/7] ARM: dts: k2g-evm: remove unused phy-mode property from phy node
This patch removes the unused phy-mode property from the phy dt node. On
K2G, currently link-interface determines if phy is used or not and is
already set to use rgmii. So this is not needed. Besides phy-mode should
be added to slave interface configuration of the cpsw driver, not in the
phy node.
Signed-off-by: Murali Karicheri
---
arch/arm/dts/keystone-k2g-evm.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/keystone-k2g-evm.dts
b/arch/arm/dts/keystone-k2g-evm.dts
index 6c9de25b94..4820c7e50d 100644
--- a/arch/arm/dts/keystone-k2g-evm.dts
+++ b/arch/arm/dts/keystone-k2g-evm.dts
@@ -29,7 +29,6 @@
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
- phy-mode = "rgmii-id";
};
};
--
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[U-Boot] [PATCH 5/7] k2g: config enable ti phy dp83867 for k2g
Enable ti phy driver dp83867 for k2g based boards. Signed-off-by: Murali Karicheri --- include/configs/k2g_evm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 90f9a9922c..9fe5411619 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -98,4 +98,5 @@ #include +#define CONFIG_PHY_TI #endif /* __CONFIG_K2G_EVM_H */ -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/7] ARM: k2g-ice: Add pinmux support for rgmii interface
This add pinmux configuration for rgmii interface so that network
driver can be supported on K2G ICE boards. The pinmux configurations
for this are generated using the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
As this required some BUFFER_CLASS definitions, same is re-used
from the linux defnitions in include/dt-bindings/pinctrl/keystone.h
Signed-off-by: Murali Karicheri
---
arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 +
board/ti/ks2_evm/mux-k2g.h| 19 +++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/mux-k2g.h
b/arch/arm/mach-keystone/include/mach/mux-k2g.h
index 809b72d5bf..67d47f8172 100644
--- a/arch/arm/mach-keystone/include/mach/mux-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/mux-k2g.h
@@ -27,6 +27,11 @@
#define PIN_PTU(1 << 17) /* pull up */
#define PIN_PTD(0 << 17) /* pull down */
+#define BUFFER_CLASS_B (0 << 19)
+#define BUFFER_CLASS_C (1 << 19)
+#define BUFFER_CLASS_D (2 << 19)
+#define BUFFER_CLASS_E (3 << 19)
+
#define MODE(m)((m) & 0x7)
#define MAX_PIN_N 260
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index 706fb7e838..8c184a85ae 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -346,6 +346,25 @@ struct pin_cfg k2g_ice_evm_pin_cfg[] = {
{ 133, MODE(0) }, /* SOC_QSPI_D2 */
{ 134, MODE(0) }, /* SOC_QSPI_D3 */
{ 135, MODE(0) }, /* SOC_QSPI_CSN0 */
+
+ /* EMAC */
+ { 79, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD1 */
+ { 78, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD2 */
+ { 77, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD3 */
+ { 80, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD0 */
+ { 94, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD0 */
+ { 93, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD1 */
+ { 92, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD2 */
+ { 91, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD3 */
+ { 85, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXC */
+ { 95, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXCTL */
+ { 72, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXC */
+ { 81, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXCTL */
+
+ /* MDIO */
+ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */
+ { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */
+
{ MAX_PIN_N, }
};
--
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[U-Boot] [PATCH 2/7] ARM: k2g-gp-evm: update to rgmii pinmux configuration
This patch updates pinmux configuration for K2G GP EVM based on
data generated by the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
Signed-off-by: Murali Karicheri
---
board/ti/ks2_evm/mux-k2g.h | 32 +---
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index 8c184a85ae..89c49f9e4f 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -125,21 +125,23 @@ struct pin_cfg k2g_evm_pin_cfg[] = {
{ 70, MODE(0) }, /* SOC_MMC1_SDWP */
{ 71, MODE(0) }, /* MMC1POW TP124 */
- /* RGMII */
- { 72, MODE(1) | PIN_IEN },/* SOC_RGMII_RXCLK */
- { 77, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD3 */
- { 78, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD2 */
- { 79, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD1 */
- { 80, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD0 */
- { 81, MODE(1) | PIN_IEN },/* SOC_RGMII_RXCTL */
- { 85, MODE(1) }, /* SOC_RGMII_TXCLK */
- { 91, MODE(1) }, /* SOC_RGMII_TXD3 */
- { 92, MODE(1) }, /* SOC_RGMII_TXD2 */
- { 93, MODE(1) }, /* SOC_RGMII_TXD1 */
- { 94, MODE(1) }, /* SOC_RGMII_TXD0 */
- { 95, MODE(1) }, /* SOC_RGMII_TXCTL */
- { 98, MODE(0) }, /* SOC_MDIO_DATA */
- { 99, MODE(0) }, /* SOC_MDIO_CLK */
+ /* EMAC */
+ { 79, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD1 */
+ { 78, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD2 */
+ { 77, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD3 */
+ { 80, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD0 */
+ { 94, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD0 */
+ { 93, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD1 */
+ { 92, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD2 */
+ { 91, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD3 */
+ { 85, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXC */
+ { 95, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXCTL */
+ { 72, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXC */
+ { 81, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXCTL */
+
+ /* MDIO */
+ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */
+ { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */
/* PWM */
{ 73, MODE(4) }, /* SOC_EHRPWM3A */
--
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[U-Boot] [PATCH 2/7] ARM: k2g-gp-evm: update to rgmii pinmux configuration
This patch updates pinmux configuration for K2G GP EVM based on
data generated by the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
Signed-off-by: Murali Karicheri
---
board/ti/ks2_evm/mux-k2g.h | 32 +---
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index 8c184a85ae..89c49f9e4f 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -125,21 +125,23 @@ struct pin_cfg k2g_evm_pin_cfg[] = {
{ 70, MODE(0) }, /* SOC_MMC1_SDWP */
{ 71, MODE(0) }, /* MMC1POW TP124 */
- /* RGMII */
- { 72, MODE(1) | PIN_IEN },/* SOC_RGMII_RXCLK */
- { 77, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD3 */
- { 78, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD2 */
- { 79, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD1 */
- { 80, MODE(1) | PIN_IEN },/* SOC_RGMII_RXD0 */
- { 81, MODE(1) | PIN_IEN },/* SOC_RGMII_RXCTL */
- { 85, MODE(1) }, /* SOC_RGMII_TXCLK */
- { 91, MODE(1) }, /* SOC_RGMII_TXD3 */
- { 92, MODE(1) }, /* SOC_RGMII_TXD2 */
- { 93, MODE(1) }, /* SOC_RGMII_TXD1 */
- { 94, MODE(1) }, /* SOC_RGMII_TXD0 */
- { 95, MODE(1) }, /* SOC_RGMII_TXCTL */
- { 98, MODE(0) }, /* SOC_MDIO_DATA */
- { 99, MODE(0) }, /* SOC_MDIO_CLK */
+ /* EMAC */
+ { 79, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD1 */
+ { 78, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD2 */
+ { 77, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD3 */
+ { 80, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD0 */
+ { 94, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD0 */
+ { 93, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD1 */
+ { 92, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD2 */
+ { 91, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD3 */
+ { 85, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXC */
+ { 95, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXCTL */
+ { 72, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXC */
+ { 81, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXCTL */
+
+ /* MDIO */
+ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */
+ { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */
/* PWM */
{ 73, MODE(4) }, /* SOC_EHRPWM3A */
--
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[U-Boot] [PATCH 4/7] ARM: k2g: add a workaround to reset the phy
This patch adds a workaround to reset the phy one time during boot
using GPIO0 pin 10 to make sure, the Phy latches the configuration
from the input pins correctly.
Signed-off-by: Murali Karicheri
---
.../arm/mach-keystone/include/mach/hardware-k2g.h | 3 +++
board/ti/ks2_evm/board_k2g.c | 15 +++
2 files changed, 18 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
index 8b902641ec..971c081bb3 100644
--- a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
@@ -69,9 +69,12 @@
#define K2G_GPIO0_BASE 0X02603000
#define K2G_GPIO1_BASE 0X0260a000
+#define K2G_GPIO0_BANK0_BASE K2G_GPIO0_BASE + 0x10
#define K2G_GPIO1_BANK2_BASE K2G_GPIO1_BASE + 0x38
#define K2G_GPIO_DIR_OFFSET0x0
+#define K2G_GPIO_OUTDATA_OFFSET0x4
#define K2G_GPIO_SETDATA_OFFSET0x8
+#define K2G_GPIO_CLRDATA_OFFSET0xC
/* BOOTCFG RESETMUX8 */
#define KS2_RSTMUX8(KS2_DEVICE_STATE_CTRL_BASE + 0x328)
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 39a782e479..6d0fc21c67 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -315,6 +315,21 @@ int embedded_dtb_select(void)
BIT(9));
setbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_SETDATA_OFFSET,
BIT(9));
+ } else if (board_is_k2g_ice()) {
+ /* GBE Phy workaround. For Phy to latch the input
+* configuration, a GPIO reset is asserted at the
+* Phy reset pin to latch configuration correctly after SoC
+* reset. GPIO0 Pin 10 (Ball AA20) is used for this on ICE
+* board. Just do a low to high transition.
+*/
+ clrbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_DIR_OFFSET,
+BIT(10));
+ setbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_CLRDATA_OFFSET,
+BIT(10));
+ /* Delay just to get a transition to high */
+ udelay(100);
+ setbits_le32(K2G_GPIO0_BANK0_BASE + K2G_GPIO_SETDATA_OFFSET,
+BIT(10));
}
return 0;
--
2.17.0
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[U-Boot] [PATCH 6/7] ARM: dts: k2g-evm: remove unused phy-mode property from phy node
This patch removes the unused phy-mode property from the phy dt node. On
K2G, currently link-interface determines if phy is used or not and is
already set to use rgmii. So this is not needed. Besides phy-mode should
be added to slave interface configuration of the cpsw driver, not in the
phy node.
Signed-off-by: Murali Karicheri
---
arch/arm/dts/keystone-k2g-evm.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/keystone-k2g-evm.dts
b/arch/arm/dts/keystone-k2g-evm.dts
index 6c9de25b94..4820c7e50d 100644
--- a/arch/arm/dts/keystone-k2g-evm.dts
+++ b/arch/arm/dts/keystone-k2g-evm.dts
@@ -29,7 +29,6 @@
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
- phy-mode = "rgmii-id";
};
};
--
2.17.0
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[U-Boot] [PATCH 1/7] ARM: k2g-ice: Add pinmux support for rgmii interface
This add pinmux configuration for rgmii interface so that network
driver can be supported on K2G ICE boards. The pinmux configurations
for this are generated using the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
As this required some BUFFER_CLASS definitions, same is re-used
from the linux defnitions in include/dt-bindings/pinctrl/keystone.h
Signed-off-by: Murali Karicheri
---
arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 +
board/ti/ks2_evm/mux-k2g.h| 19 +++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/mux-k2g.h
b/arch/arm/mach-keystone/include/mach/mux-k2g.h
index 809b72d5bf..67d47f8172 100644
--- a/arch/arm/mach-keystone/include/mach/mux-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/mux-k2g.h
@@ -27,6 +27,11 @@
#define PIN_PTU(1 << 17) /* pull up */
#define PIN_PTD(0 << 17) /* pull down */
+#define BUFFER_CLASS_B (0 << 19)
+#define BUFFER_CLASS_C (1 << 19)
+#define BUFFER_CLASS_D (2 << 19)
+#define BUFFER_CLASS_E (3 << 19)
+
#define MODE(m)((m) & 0x7)
#define MAX_PIN_N 260
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index 706fb7e838..8c184a85ae 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -346,6 +346,25 @@ struct pin_cfg k2g_ice_evm_pin_cfg[] = {
{ 133, MODE(0) }, /* SOC_QSPI_D2 */
{ 134, MODE(0) }, /* SOC_QSPI_D3 */
{ 135, MODE(0) }, /* SOC_QSPI_CSN0 */
+
+ /* EMAC */
+ { 79, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD1 */
+ { 78, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD2 */
+ { 77, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD3 */
+ { 80, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXD0 */
+ { 94, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD0 */
+ { 93, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD1 */
+ { 92, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD2 */
+ { 91, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXD3 */
+ { 85, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXC */
+ { 95, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_TXCTL */
+ { 72, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXC */
+ { 81, BUFFER_CLASS_D | PIN_PDIS | MODE(1) }, /* RGMII_RXCTL */
+
+ /* MDIO */
+ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */
+ { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */
+
{ MAX_PIN_N, }
};
--
2.17.0
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[U-Boot] [PATCH 0/7] Add netcp networking support on K2G ICE EVM
This patch series add networking capability to K2G ICE EVM based on netcp driver. Networking function has been tested using the latest master branch from u-boot repo. Following boot mode has been tested for networking. Net boot (tftp images over ethernet interface and boot kernel) log at https://pastebin.ubuntu.com/p/b3nyCXPhWc/ MMC boot: (load images from boot folder of rootfs and boot kernel) log at https://pastebin.ubuntu.com/p/FWycmKd9KB/ Used Linux upstream linux kernel version 4.19.9 for the tests. Please review and apply if this looks good. Thanks Murali Karicheri (7): ARM: k2g-ice: Add pinmux support for rgmii interface ARM: k2g-gp-evm: update to rgmii pinmux configuration net: netcp: add support for phy with rgmii ids ARM: k2g: add a workaround to reset the phy k2g: config enable ti phy dp83867 for k2g ARM: dts: k2g-evm: remove unused phy-mode property from phy node ARM: dts: k2g-ice: add dt node for netcp arch/arm/dts/keystone-k2g-evm.dts | 1 - arch/arm/dts/keystone-k2g-ice.dts | 35 + .../mach-keystone/include/mach/hardware-k2g.h | 3 ++ arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 ++ board/ti/ks2_evm/board_k2g.c | 15 ++ board/ti/ks2_evm/mux-k2g.h| 51 +-- drivers/net/ti/keystone_net.c | 22 +++- include/configs/k2g_evm.h | 1 + 8 files changed, 116 insertions(+), 17 deletions(-) -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 3/7] net: netcp: add support for phy with rgmii ids
Enhance the netcp driver to support phys that can be configured
for internal delay (rgmii-id, rgmii-rxid, rgmii-txid)
Signed-off-by: Murali Karicheri
---
drivers/net/ti/keystone_net.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ti/keystone_net.c b/drivers/net/ti/keystone_net.c
index a3ba91cc3f..defc57b29f 100644
--- a/drivers/net/ti/keystone_net.c
+++ b/drivers/net/ti/keystone_net.c
@@ -88,6 +88,7 @@ struct ks2_eth_priv {
struct mii_dev *mdio_bus;
int phy_addr;
phy_interface_t phy_if;
+ int phy_of_handle;
int sgmii_link_type;
void*mdio_base;
struct rx_buff_desc net_rx_buffs;
@@ -588,6 +589,10 @@ static int ks2_eth_probe(struct udevice *dev)
if (priv->has_mdio) {
priv->phydev = phy_connect(priv->mdio_bus, priv->phy_addr,
dev, priv->phy_if);
+#ifdef CONFIG_DM_ETH
+ if (priv->phy_of_handle)
+ dev_set_of_offset(priv->phydev->dev, priv->phy_of_handle);
+#endif
phy_config(priv->phydev);
}
@@ -679,6 +684,7 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
int phy;
int dma_count;
u32 dma_channel[8];
+ const char *phy_mode;
priv->slave_port = fdtdec_get_int(fdt, slave, "slave-port", -1);
priv->net_rx_buffs.rx_flow = priv->slave_port * 8;
@@ -700,7 +706,9 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
priv->link_type = fdtdec_get_int(fdt, slave, "link-interface", -1);
phy = fdtdec_lookup_phandle(fdt, slave, "phy-handle");
+
if (phy >= 0) {
+ priv->phy_of_handle = phy;
priv->phy_addr = fdtdec_get_int(fdt, phy, "reg", -1);
mdio = fdt_parent_offset(fdt, phy);
@@ -717,7 +725,19 @@ static int ks2_eth_parse_slave_interface(int netcp, int
slave,
priv->sgmii_link_type = SGMII_LINK_MAC_PHY;
priv->has_mdio = true;
} else if (priv->link_type == LINK_TYPE_RGMII_LINK_MAC_PHY) {
- priv->phy_if = PHY_INTERFACE_MODE_RGMII;
+ phy_mode = fdt_getprop(fdt, slave, "phy-mode", NULL);
+ if (phy_mode) {
+ priv->phy_if = phy_get_interface_by_name(phy_mode);
+ if (priv->phy_if != PHY_INTERFACE_MODE_RGMII &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_ID &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_RXID &&
+ priv->phy_if != PHY_INTERFACE_MODE_RGMII_TXID) {
+ pr_err("invalid phy-mode\n");
+ return -EINVAL;
+ }
+ } else {
+ priv->phy_if = PHY_INTERFACE_MODE_RGMII;
+ }
pdata->phy_interface = priv->phy_if;
priv->has_mdio = true;
}
--
2.17.0
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[U-Boot] [PATCH v3] keystone: k2h/e/l: Fix DMA coherency for QM PDSP
commit 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid
left under a macro KS2_MSMC_SEGMENT_QM_PDSP which is no longer valid.
This, in effect disabled DMA coherency for QM PDSP.
Given that msmc_k2hkle_common_setup is valid for all K2H/K/L/E SoCs,
the #ifdef should been removed in the first place. Do the same.
Fixes: 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid #ifdeffery")
Signed-off-by: Murali Karicheri
Acked-by: Nishanth Menon
Reviewed-by: Tom Rini
---
- v3 - fixed the prefix
- v2 - fixed the prefix
- v1 - adding Fixes per comments and added Reviewed-by from Tom Rini
arch/arm/mach-keystone/init.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 3b6d5ef..6e5a1e1 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -101,9 +101,7 @@ static void msmc_k2hkle_common_setup(void)
msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_0);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_ARM);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_NETCP);
-#ifdef KS2_MSMC_SEGMENT_QM_PDSP
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_QM_PDSP);
-#endif
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_PCIE0);
msmc_share_all_segments(KS2_MSMC_SEGMENT_DEBUG);
}
--
1.9.1
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Re: [U-Boot] [Resend: U-Boot PATCH v2] keystone: k2h/e/l: Fix DMA coherency for QM PDSP
On 07/19/2016 02:35 PM, Murali Karicheri wrote:
> commit 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid
> left under a macro KS2_MSMC_SEGMENT_QM_PDSP which is no longer valid.
> This, in effect disabled DMA coherency for QM PDSP.
>
> Given that msmc_k2hkle_common_setup is valid for all K2H/K/L/E SoCs,
> the #ifdef should been removed in the first place. Do the same.
>
> Fixes: 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid
> #ifdeffery")
> Signed-off-by: Murali Karicheri
> Acked-by: Nishanth Menon
> Reviewed-by: Tom Rini
> ---
> - v2 - fixed the prefix
> - v1 - adding Fixes per comments and added Reviewed-by from Tom Rini
> arch/arm/mach-keystone/init.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
> index 3b6d5ef..6e5a1e1 100644
> --- a/arch/arm/mach-keystone/init.c
> +++ b/arch/arm/mach-keystone/init.c
> @@ -101,9 +101,7 @@ static void msmc_k2hkle_common_setup(void)
> msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_0);
> msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_ARM);
> msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_NETCP);
> -#ifdef KS2_MSMC_SEGMENT_QM_PDSP
> msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_QM_PDSP);
> -#endif
> msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_PCIE0);
> msmc_share_all_segments(KS2_MSMC_SEGMENT_DEBUG);
> }
>
Please ignore. Will send v3 for merge. Sorry for flooding the list.
--
Murali Karicheri
Linux Kernel, Keystone
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[U-Boot] [Resend: U-Boot PATCH v2] keystone: k2h/e/l: Fix DMA coherency for QM PDSP
commit 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid
left under a macro KS2_MSMC_SEGMENT_QM_PDSP which is no longer valid.
This, in effect disabled DMA coherency for QM PDSP.
Given that msmc_k2hkle_common_setup is valid for all K2H/K/L/E SoCs,
the #ifdef should been removed in the first place. Do the same.
Fixes: 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid #ifdeffery")
Signed-off-by: Murali Karicheri
Acked-by: Nishanth Menon
Reviewed-by: Tom Rini
---
- v2 - fixed the prefix
- v1 - adding Fixes per comments and added Reviewed-by from Tom Rini
arch/arm/mach-keystone/init.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 3b6d5ef..6e5a1e1 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -101,9 +101,7 @@ static void msmc_k2hkle_common_setup(void)
msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_0);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_ARM);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_NETCP);
-#ifdef KS2_MSMC_SEGMENT_QM_PDSP
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_QM_PDSP);
-#endif
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_PCIE0);
msmc_share_all_segments(KS2_MSMC_SEGMENT_DEBUG);
}
--
1.9.1
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[U-Boot] [U-Boot PATCH v1] keystone: k2h/e/l: Fix DMA coherency for QM PDSP
commit 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid
left under a macro KS2_MSMC_SEGMENT_QM_PDSP which is no longer valid.
This, in effect disabled DMA coherency for QM PDSP.
Given that msmc_k2hkle_common_setup is valid for all K2H/K/L/E SoCs,
the #ifdef should been removed in the first place. Do the same.
Fixes: 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid #ifdeffery")
Signed-off-by: Murali Karicheri
Acked-by: Nishanth Menon
Reviewed-by: Tom Rini
---
- v2 - fixed the prefix
- v1 - adding Fixes per comments and added Reviewed-by from Tom Rini
arch/arm/mach-keystone/init.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 3b6d5ef..6e5a1e1 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -101,9 +101,7 @@ static void msmc_k2hkle_common_setup(void)
msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_0);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_ARM);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_NETCP);
-#ifdef KS2_MSMC_SEGMENT_QM_PDSP
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_QM_PDSP);
-#endif
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_PCIE0);
msmc_share_all_segments(KS2_MSMC_SEGMENT_DEBUG);
}
--
1.9.1
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[U-Boot] [tiU16.05 PATCH v1] keystone: k2h/e/l: Fix DMA coherency for QM PDSP
commit 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid
left under a macro KS2_MSMC_SEGMENT_QM_PDSP which is no longer valid.
This, in effect disabled DMA coherency for QM PDSP.
Given that msmc_k2hkle_common_setup is valid for all K2H/K/L/E SoCs,
the #ifdef should been removed in the first place. Do the same.
Fixes: 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid #ifdeffery")
Signed-off-by: Murali Karicheri
Acked-by: Nishanth Menon
Reviewed-by: Tom Rini
---
- v2 - adding Fixes per comments
arch/arm/mach-keystone/init.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 3b6d5ef..6e5a1e1 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -101,9 +101,7 @@ static void msmc_k2hkle_common_setup(void)
msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_0);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_ARM);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_NETCP);
-#ifdef KS2_MSMC_SEGMENT_QM_PDSP
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_QM_PDSP);
-#endif
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_PCIE0);
msmc_share_all_segments(KS2_MSMC_SEGMENT_DEBUG);
}
--
1.9.1
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[U-Boot] keystone: k2h/e/l: Fix DMA coherency for QM PDSP
commit 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid
#ifdeffery") refactored code, however K2HKLE_MSMC_SEGMENT_QM_PDSP is
left under a macro KS2_MSMC_SEGMENT_QM_PDSP which is no longer valid.
This, in effect disabled DMA coherency for QM PDSP.
Given that msmc_k2hkle_common_setup is valid for all K2H/K/L/E SoCs,
the #ifdef should been removed in the first place. Do the same.
Signed-off-by: Murali Karicheri
Acked-by: Nishanth Menon
---
arch/arm/mach-keystone/init.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 3b6d5ef..6e5a1e1 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -101,9 +101,7 @@ static void msmc_k2hkle_common_setup(void)
msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_0);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_ARM);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_NETCP);
-#ifdef KS2_MSMC_SEGMENT_QM_PDSP
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_QM_PDSP);
-#endif
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_PCIE0);
msmc_share_all_segments(KS2_MSMC_SEGMENT_DEBUG);
}
--
1.9.1
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Re: [U-Boot] [PATCH V4 0/8] configs: make keystone2 configs start using armv7 common header
all -128 bss -88 rodata -40
09: configs: k2*_evm: rename skernel binary names to generated file names
arm: (for 74/74 boards) bss +0.2 rodata -0.2
k2hk_evm : bss +4 rodata -4
k2l_evm: bss +4 rodata -4
k2e_evm: bss +4 rodata -4
Nishanth Menon (8):
configs: split ti_armv7_common into a omap generic header
configs: ti: armv7_common: enable Thumb mode for all
board: ks2_evm: get rid of bogus CONFIG_LINUX_BOOT_PARAM_ADDR
configs: rename ks2_evm into ti_armv7_keystone2
configs: ti_armv7_keystone2: start using armv7_common
configs: ti_armv7_keystone2: switch addresses to generic addresses
configs: ti_armv7_keystone2: switch to using kernel zImage
configs: k2*_evm: rename skernel binary names to generated file names
board/ti/ks2_evm/board.c | 2 +-
include/configs/am43xx_evm.h | 2 +-
include/configs/k2e_evm.h | 8 +--
include/configs/k2hk_evm.h | 8 +--
include/configs/k2l_evm.h | 8 +--
include/configs/ti_am335x_common.h | 2 +-
include/configs/ti_armv7_common.h | 30 ++--
.../configs/{ks2_evm.h => ti_armv7_keystone2.h}| 81 --
include/configs/ti_armv7_omap.h| 49 +
include/configs/ti_omap3_common.h | 2 +-
include/configs/ti_omap4_common.h | 2 +-
include/configs/ti_omap5_common.h | 2 +-
12 files changed, 97 insertions(+), 99 deletions(-)
rename include/configs/{ks2_evm.h => ti_armv7_keystone2.h} (82%)
create mode 100644 include/configs/ti_armv7_omap.h
Looks good to me. Thanks for working on this.
Reviewed-by: Murali Karicheri
--
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Re: [U-Boot] [PATCH V3 3/8] configs: rename ks2_evm into ti_armv7_keystone2
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
rename the keystone2 common header into an keystone2 architecture
specific header which can then reuse the common ti_armv7 config headers.
Acked-by: Vitaly Andrianov
Acked-By: Murali Karicheri
Signed-off-by: Nishanth Menon
---
V3: picked up acks, no change.
V2: https://patchwork.ozlabs.org/patch/496822/ (no change)
V1: https://patchwork.ozlabs.org/patch/496728/
include/configs/k2e_evm.h | 2 +-
include/configs/k2hk_evm.h | 2 +-
include/configs/k2l_evm.h | 2 +-
include/configs/{ks2_evm.h => ti_armv7_keystone2.h} | 0
4 files changed, 3 insertions(+), 3 deletions(-)
rename include/configs/{ks2_evm.h => ti_armv7_keystone2.h} (100%)
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index a28ceb7064a7..ac50a01b2980 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -27,7 +27,7 @@
"name_uboot=u-boot-spi-k2e-evm.gph\0" \
"name_fs=arago-console-image-k2e-evm.cpio.gz\0"
-#include
+#include
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c10
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index eae772178338..29e3403aa082 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -27,7 +27,7 @@
"name_uboot=u-boot-spi-k2hk-evm.gph\0"\
"name_fs=arago-console-image-k2hk-evm.cpio.gz\0"
-#include
+#include
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c20
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 57da0579255a..50d5c991a0bb 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -27,7 +27,7 @@
"name_uboot=u-boot-spi-k2l-evm.gph\0" \
"name_fs=arago-console-image-k2l-evm.cpio.gz\0"
-#include
+#include
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c10
diff --git a/include/configs/ks2_evm.h b/include/configs/ti_armv7_keystone2.h
similarity index 100%
rename from include/configs/ks2_evm.h
rename to include/configs/ti_armv7_keystone2.h
Reviewed-by: Murali Karicheri
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Re: [U-Boot] [PATCH V3 3/8] configs: rename ks2_evm into ti_armv7_keystone2
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
rename the keystone2 common header into an keystone2 architecture
specific header which can then reuse the common ti_armv7 config headers.
Acked-by: Vitaly Andrianov
Acked-By: Murali Karicheri
Signed-off-by: Nishanth Menon
---
V3: picked up acks, no change.
V2: https://patchwork.ozlabs.org/patch/496822/ (no change)
V1: https://patchwork.ozlabs.org/patch/496728/
include/configs/k2e_evm.h | 2 +-
include/configs/k2hk_evm.h | 2 +-
include/configs/k2l_evm.h | 2 +-
include/configs/{ks2_evm.h => ti_armv7_keystone2.h} | 0
4 files changed, 3 insertions(+), 3 deletions(-)
rename include/configs/{ks2_evm.h => ti_armv7_keystone2.h} (100%)
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index a28ceb7064a7..ac50a01b2980 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -27,7 +27,7 @@
"name_uboot=u-boot-spi-k2e-evm.gph\0" \
"name_fs=arago-console-image-k2e-evm.cpio.gz\0"
-#include
+#include
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c10
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index eae772178338..29e3403aa082 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -27,7 +27,7 @@
"name_uboot=u-boot-spi-k2hk-evm.gph\0"\
"name_fs=arago-console-image-k2hk-evm.cpio.gz\0"
-#include
+#include
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c20
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 57da0579255a..50d5c991a0bb 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -27,7 +27,7 @@
"name_uboot=u-boot-spi-k2l-evm.gph\0" \
"name_fs=arago-console-image-k2l-evm.cpio.gz\0"
-#include
+#include
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c10
diff --git a/include/configs/ks2_evm.h b/include/configs/ti_armv7_keystone2.h
similarity index 100%
rename from include/configs/ks2_evm.h
rename to include/configs/ti_armv7_keystone2.h
Reviewed-by: Murali Karicheri
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Re: [U-Boot] [PATCH V3 5/8] configs: ti_armv7_keystone2: switch addresses to generic addresses
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
Use the defaults defined in DEFAULT_LINUX_BOOT_ENV
Signed-off-by: Nishanth Menon
---
new patch based on review comments on https://patchwork.ozlabs.org/patch/496823/
include/configs/ti_armv7_keystone2.h | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/include/configs/ti_armv7_keystone2.h
b/include/configs/ti_armv7_keystone2.h
index 0e67cf0ebd75..ddc2e23f1370 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -212,30 +212,26 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_EXTRA_ENV_SETTINGS \
+ DEFAULT_LINUX_BOOT_ENV \
CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
"boot=ubi\0" \
"tftp_root=/\0" \
"nfs_root=/export\0" \
"mem_lpae=1\0"\
"mem_reserve=512M\0" \
- "addr_fdt=0x8700\0" \
- "addr_kern=0x8800\0" \
- "addr_uboot=0x8700\0" \
- "addr_fs=0x8200\0"\
"addr_ubi=0x8200\0" \
"addr_secdb_key=0xc00\0" \
- "fdt_high=0x\0" \
"name_kern=uImage-keystone-evm.bin\0" \
"run_mon=mon_install ${addr_mon}\0" \
- "run_kern=bootm ${addr_kern} - ${addr_fdt}\0" \
+ "run_kern=bootm ${loadaddr} - ${fdtaddr}\0" \
"init_net=run args_all args_net\0"\
"init_ubi=run args_all args_ubi; "\
"ubi part ubifs; ubifsmount ubi:boot;"\
"ubifsload ${addr_secdb_key} securedb.key.bin;\0" \
- "get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \
- "get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0" \
- "get_kern_net=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \
- "get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0" \
+ "get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \
+ "get_fdt_ubi=ubifsload ${fdtaddr} ${name_fdt}\0" \
+ "get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
+ "get_kern_ubi=ubifsload ${loadaddr} ${name_kern}\0" \
"get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
"get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0" \
"get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0" \
@@ -248,10 +244,10 @@
"root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \
"${nfs_options} ip=dhcp\0"\
"nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \
- "get_fdt_ramfs=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \
- "get_kern_ramfs=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0"\
+ "get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0"\
+ "get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
"get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
- "get_fs_ramfs=dhcp ${addr_fs} ${tftp_root}/${name_fs}\0" \
+ "get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0" \
"get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \
"burn_ubi=nand erase.part ubifs; "\
"nand write ${addr_ubi} ubifs ${filesize}\0" \
Reviewed-by: Murali Karicheri
--
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Re: [U-Boot] [PATCH V3 7/8] configs: k2*_evm: rename skernel binary names to generated file names
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
using http://git.ti.com/keystone-linux/boot-monitor/trees/master as
reference (tag K2_BM_15.07) the generated files do not have evm
extensions by default. So dont use -evm extension.
Signed-off-by: Nishanth Menon
---
New patch
include/configs/k2e_evm.h | 2 +-
include/configs/k2hk_evm.h | 2 +-
include/configs/k2l_evm.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index afb289ca4bad..4f4ebf53ec59 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -20,7 +20,7 @@
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \
"name_fdt=k2e-evm.dtb\0" \
- "name_mon=skern-k2e-evm.bin\0"\
+ "name_mon=skern-k2e.bin\0"\
"name_ubi=k2e-evm-ubifs.ubi\0"\
"name_uboot=u-boot-spi-k2e-evm.gph\0" \
"name_fs=arago-console-image-k2e-evm.cpio.gz\0"
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index c2d3ec7c70cb..6c6dcb1e5ed3 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -20,7 +20,7 @@
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \
"name_fdt=k2hk-evm.dtb\0" \
- "name_mon=skern-k2hk-evm.bin\0" \
+ "name_mon=skern-k2hk.bin\0" \
"name_ubi=k2hk-evm-ubifs.ubi\0" \
"name_uboot=u-boot-spi-k2hk-evm.gph\0"\
"name_fs=arago-console-image-k2hk-evm.cpio.gz\0"
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 1957287a57c7..9bacfa49c430 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -20,7 +20,7 @@
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,4096\0" \
"name_fdt=k2l-evm.dtb\0" \
- "name_mon=skern-k2l-evm.bin\0"\
+ "name_mon=skern-k2l.bin\0"\
"name_ubi=k2l-evm-ubifs.ubi\0" \
"name_uboot=u-boot-spi-k2l-evm.gph\0" \
"name_fs=arago-console-image-k2l-evm.cpio.gz\0"
Reviewed-by: Murali Karicheri
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Re: [U-Boot] [PATCH V3 6/8] ti_armv7_keystone2: switch to using kernel zImage
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
Switch to using zImage instead of uImage. and while at it, start using
bootz as default. While at it, get rid of BOOTIMAGE define and start
using Linux upstream dtb file names.
Signed-off-by: Nishanth Menon
---
New patch.
include/configs/k2e_evm.h| 2 +-
include/configs/k2hk_evm.h | 2 +-
include/configs/k2l_evm.h| 2 +-
include/configs/ti_armv7_keystone2.h | 5 ++---
4 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index f1e650141ae1..afb289ca4bad 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -19,7 +19,7 @@
"addr_mon=0x0c14\0" \
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \
- "name_fdt=uImage-k2e-evm.dtb\0" \
+ "name_fdt=k2e-evm.dtb\0" \
"name_mon=skern-k2e-evm.bin\0"\
"name_ubi=k2e-evm-ubifs.ubi\0"\
"name_uboot=u-boot-spi-k2e-evm.gph\0" \
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index f8e83de64b63..c2d3ec7c70cb 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -19,7 +19,7 @@
"addr_mon=0x0c5f\0" \
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \
- "name_fdt=uImage-k2hk-evm.dtb\0" \
+ "name_fdt=k2hk-evm.dtb\0" \
"name_mon=skern-k2hk-evm.bin\0" \
"name_ubi=k2hk-evm-ubifs.ubi\0" \
"name_uboot=u-boot-spi-k2hk-evm.gph\0"\
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 395608a5f6db..1957287a57c7 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -19,7 +19,7 @@
"addr_mon=0x0c14\0" \
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,4096\0" \
- "name_fdt=uImage-k2l-evm.dtb\0" \
+ "name_fdt=k2l-evm.dtb\0" \
"name_mon=skern-k2l-evm.bin\0"\
"name_ubi=k2l-evm-ubifs.ubi\0"\
"name_uboot=u-boot-spi-k2l-evm.gph\0" \
diff --git a/include/configs/ti_armv7_keystone2.h
b/include/configs/ti_armv7_keystone2.h
index ddc2e23f1370..e327f3e03073 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -210,7 +210,6 @@
/* EDMA3 */
#define CONFIG_TI_EDMA3
-#define CONFIG_BOOTFILE"uImage"
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
@@ -221,9 +220,9 @@
"mem_reserve=512M\0" \
"addr_ubi=0x8200\0" \
"addr_secdb_key=0xc00\0" \
- "name_kern=uImage-keystone-evm.bin\0" \
+ "name_kern=zImage\0" \
"run_mon=mon_install ${addr_mon}\0" \
- "run_kern=bootm ${loadaddr} - ${fdtaddr}\0" \
+ "run_kern=bootz ${loadaddr} - ${fdtaddr}\0" \
"init_net=run args_all args_net\0"\
"init_ubi=run args_all args_ubi; "\
"ubi part ubifs; ubifsmount ubi:boot;"\
Reviewed-by: Murali Karicheri
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Re: [U-Boot] [PATCH V3 8/8] configs: keystone2: remove distro specific ramdisk name
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
u-boot should support multiple distros as necessary. So, DONOT hardcode
distro specific image name in package. Instead we use a generic
ramdisk.gz as image name which can be modified by distro specific logic.
Signed-off-by: Nishanth Menon
---
New patch
include/configs/k2e_evm.h| 1 -
include/configs/k2hk_evm.h | 1 -
include/configs/k2l_evm.h| 1 -
include/configs/ti_armv7_keystone2.h | 1 +
4 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index 4f4ebf53ec59..59ce6fa0bdb3 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -23,7 +23,6 @@
"name_mon=skern-k2e.bin\0"\
"name_ubi=k2e-evm-ubifs.ubi\0"\
"name_uboot=u-boot-spi-k2e-evm.gph\0" \
- "name_fs=arago-console-image-k2e-evm.cpio.gz\0"
#include
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index 6c6dcb1e5ed3..835dd0e13b4b 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -23,7 +23,6 @@
"name_mon=skern-k2hk.bin\0" \
"name_ubi=k2hk-evm-ubifs.ubi\0" \
"name_uboot=u-boot-spi-k2hk-evm.gph\0"\
- "name_fs=arago-console-image-k2hk-evm.cpio.gz\0"
#include
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 9bacfa49c430..a7c835953b73 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -23,7 +23,6 @@
"name_mon=skern-k2l.bin\0"\
"name_ubi=k2l-evm-ubifs.ubi\0"\
"name_uboot=u-boot-spi-k2l-evm.gph\0" \
- "name_fs=arago-console-image-k2l-evm.cpio.gz\0"
#include
diff --git a/include/configs/ti_armv7_keystone2.h
b/include/configs/ti_armv7_keystone2.h
index e327f3e03073..198e3650fd55 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -221,6 +221,7 @@
"addr_ubi=0x8200\0" \
"addr_secdb_key=0xc00\0" \
"name_kern=zImage\0" \
+ "name_fs=ramdisk.gz\0"\
"run_mon=mon_install ${addr_mon}\0" \
"run_kern=bootz ${loadaddr} - ${fdtaddr}\0" \
"init_net=run args_all args_net\0"\
Reviewed-by: Murali Karicheri
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Re: [U-Boot] [PATCH V3 4/8] configs: ti_armv7_keystone2: start using armv7_common
On 07/18/2015 12:40 PM, Nishanth Menon wrote: Try to maintain as much commonality by conditionally including stuff in armv7_common as necessary and removing the common defines from keystone2 header. /* U-Boot Build Configuration */ #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */ -#define CONFIG_SYS_NO_FLASH/* that is, no *NOR* flash */ -#define CONFIG_SYS_CONSOLE_INFO_QUIET #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_SYS_THUMB_BUILD One thing I see is THUMB build is only enabled for SPL build in ti_armv7_common.h. With this transition, regular build will not be using THUMB build anymore. This is not right. Please fix it. Many platforms configs such as tbs2910.h, colibri_vf.h, highbank.h etc has this enabled for both builds as this will reduce the image size. /* SoC Configuration */ -- Murali Karicheri Linux Kernel, Keystone ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] board: ks2: README: fix typos
On 07/16/2015 11:14 AM, Nishanth Menon wrote: Fix up a few typos in documentation. Signed-off-by: Nishanth Menon --- board/ti/ks2_evm/README | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/board/ti/ks2_evm/README b/board/ti/ks2_evm/README index 9ee90a4f9d03..6586faba32eb 100644 --- a/board/ti/ks2_evm/README +++ b/board/ti/ks2_evm/README @@ -47,7 +47,6 @@ Board configuration files: include/configs/k2hk_evm.h include/configs/k2e_evm.h include/configs/k2l_evm.h -include/configs/k2l_evm.h As u-boot is migrating to Kconfig there is also board defconfig files configs/k2e_evm_defconfig @@ -71,7 +70,7 @@ Don't forget to add ARCH=arm and CROSS_COMPILE. To build u-boot.bin >make k2hk_evm_defconfig - >make u-boot-spi.gph + >make u-boot.bin To build u-boot-spi.gph >make k2hk_evm_defconfig Reviewed-by: Murali Karicheri -- Murali Karicheri Linux Kernel, Keystone ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 4/4] configs: ti_armv7_keystone2: start using armv7_common
On 07/17/2015 01:25 PM, Nishanth Menon wrote: On 07/17/2015 12:11 PM, Murali Karicheri wrote: On 07/17/2015 12:52 PM, Nishanth Menon wrote: On 07/17/2015 11:04 AM, Murali Karicheri wrote: On 07/16/2015 03:08 PM, Nishanth Menon wrote: Try to maintain as much commonality by conditionally including stuff in armv7_common as necessary and removing the common defines from keystone2 header. Including the common ti_armv7_common.h for keystone also add duplication of the various addresses #define DEFAULT_LINUX_BOOT_ENV \ "loadaddr=0x8200\0" \ "kernel_addr_r=0x8200\0" \ "fdtaddr=0x8800\0" \ "fdt_addr_r=0x8800\0" \ "rdaddr=0x8808\0" \ "ramdisk_addr_r=0x8808\0" \ "bootm_size=0x1000\0" Some of these are also defined in keystone common file. The env scripts for keystone to be reworked to use the common variable above. Rework the CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS to include common as well. we need to cleanup all the variables once we get the distro config What do you mean by distro config? Could you explain? include/config_distro* - both will eventually get integrated into armv7_common.h to benefit all TI SoC platforms. Ok I see. But that doesn't mean we can accept duplicate env variables. Do you see my point? included in anyways... I had decided not to rock the apple cart too much with this patch -> just the basic consolidation with as minimal changes as necessary. inclusion of DEFAULT_LINUX_BOOT_ENV into keystone2.h can be done as a follow on patch. Probably not this one. User would see both these variables and will cause confusion and should be fixed. they are no variables, they are defines. they will eventually be fixed. The defines finally create env variables on NAND or any other medium :) So my comment stays. I am leery to make a huge jump on a single series. lets do consolidation in small baby steps please. as I have already shown in my reply - the status quo is being maintained and we are one step closer to an common framework. Ok. If this happens soon (within a month) I am fine with this. Otherwise, this could go under the radar and cause maintenance issue. diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index ac50a01b2980..f1e650141ae1 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -15,8 +15,6 @@ #define CONFIG_K2E_EVM /* U-Boot general configuration */ -#define CONFIG_SYS_PROMPT "K2E EVM # " Why remove this? arm_v7_common defines just "u-boot#" for all SoC and boards. So, we dont need this. Sorry, this may be needed from the automation perspective. Also for backward compatibility for users. Would like to keep for K2. This has been beaten to death in the past as well (I think some 3/4 years ago.. i think it should be in the archives, just too lazy to dig through multi-year old discussions).. I will let Tom comment more here. My understanding is that the convention followed by all other TI SoCs will imply not having custom sys_prompt.. That said, custom sys_prompt is NOT a need from automation perspective - we have all our boards in automation farm for years now with and without custom boot prompt. board identification can be done in other ways. From a users perspective as well, it is good to know which board I am working with when I work with multiple boards. Not sure what is the argument not to have a board specific prompt at u-boot level. Definitely like to hear from Tom. Murali -- Murali Karicheri Linux Kernel, Keystone ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 1/4] configs: split ti_armv7_common into a omap generic header
On 07/17/2015 12:27 PM, Nishanth Menon wrote: On 07/17/2015 10:38 AM, Murali Karicheri wrote: On 07/16/2015 03:08 PM, Nishanth Menon wrote: [...] /* MMC/SD IP block */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC Why do we need MMC options in common? Only keystone device that uses MMC is Galileo. This should stay in individual device specific or board specific config file. precisely why MMC is present in generic - lack of mmc is not consistent in all ks2 devices as well - we can #undef if as necessary. I did miss undefing it in patch #4 - I just did #undef CONFIG_SPL_MMC_SUPPORT That will be fine. Thanks. I can respin patch #4. with these added in. -#define CONFIG_OMAP_HSMMC #define CONFIG_CMD_MMC Same here.. ditto. /* GPIO block */ -#define CONFIG_OMAP_GPIO #define CONFIG_CMD_GPIO I believe currently keystone doesn't use GPIO, but this may change. Probably remove this as well for now and add it when GPIO is supported on K2. patch #4: +/* And no support for GPIO, yet.. */ +#undef CONFIG_SPL_GPIO_SUPPORT +#undef CONFIG_CMD_GPIO idea being to have as many common definitions as possible and undef the ones we dont need as necessary. only thing i was careful here about was to try and remove all OMAP specific defines out. -- Murali Karicheri Linux Kernel, Keystone ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 4/4] configs: ti_armv7_keystone2: start using armv7_common
On 07/17/2015 12:52 PM, Nishanth Menon wrote:
On 07/17/2015 11:04 AM, Murali Karicheri wrote:
On 07/16/2015 03:08 PM, Nishanth Menon wrote:
Try to maintain as much commonality by conditionally including stuff
in armv7_common as necessary and removing the common defines from
keystone2 header.
Including the common ti_armv7_common.h for keystone also add duplication
of the various addresses
#define DEFAULT_LINUX_BOOT_ENV \
"loadaddr=0x8200\0" \
"kernel_addr_r=0x8200\0" \
"fdtaddr=0x8800\0" \
"fdt_addr_r=0x8800\0" \
"rdaddr=0x8808\0" \
"ramdisk_addr_r=0x8808\0" \
"bootm_size=0x1000\0"
Some of these are also defined in keystone common file. The env scripts
for keystone to be reworked to use the common variable above.
Rework the CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS to include common as well.
we need to cleanup all the variables once we get the distro config
What do you mean by distro config? Could you explain?
included in anyways... I had decided not to rock the apple cart too much
with this patch -> just the basic consolidation with as minimal changes
as necessary. inclusion of DEFAULT_LINUX_BOOT_ENV into keystone2.h can
be done as a follow on patch.
Probably not this one. User would see both these variables and will
cause confusion and should be fixed.
Did you do a test with env default -f -a with this to check if it
continues to work for Keystone Linux boot.
after the series: http://pastebin.ubuntu.com/11893531/
before the series: http://pastebin.ubuntu.com/11893576/
deltas:
bootdelay is 1 now
additional definitions:
arch=arm
soc=keystone
vendor=ti
cpu=armv7
board=ks2_evm
board_name=ks2_evm
will be great to get a tested by on that. Nothing else seems to have
changed.
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index ac50a01b2980..f1e650141ae1 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -15,8 +15,6 @@
#define CONFIG_K2E_EVM
/* U-Boot general configuration */
-#define CONFIG_SYS_PROMPT "K2E EVM # "
Why remove this?
arm_v7_common defines just "u-boot#" for all SoC and boards. So, we dont
need this.
Sorry, this may be needed from the automation perspective. Also for
backward compatibility for users. Would like to keep for K2.
#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS\
"addr_mon=0x0c14\0"\
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs "\
diff --git a/include/configs/ti_armv7_common.h
b/include/configs/ti_armv7_common.h
index 63244dbc83ff..814da3409c46 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -73,9 +73,13 @@
#ifndef CONFIG_NR_DRAM_BANKS
#define CONFIG_NR_DRAM_BANKS1
#endif
+
Why these extra spaces?
Thanks.. will drop.
I assume the one you have removed is already part of
include/configs/ti_armv7_keystone2.h.
for i in `git grep "^#define" include/configs/ti_armv7_keystone2.h|sed
-e "s/\s\s*/ /g"|cut -d ' ' -f2|sort|uniq`; do k=`git grep $i
include/configs/ti_armv7_common.h`; if [ -n "$k" ]; then echo $i; fi; done
Then started cleaning them up.
--
Murali Karicheri
Linux Kernel, Keystone
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Re: [U-Boot] [PATCH V2 4/4] configs: ti_armv7_keystone2: start using armv7_common
ation */ #define CONFIG_NR_DRAM_BANKS 2 -#define CONFIG_SYS_SDRAM_BASE 0x8000 #define CONFIG_SYS_LPAE_SDRAM_BASE0x8 #define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */ #define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */ -#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4 MiB */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \ GENERATED_GBL_DATA_SIZE) @@ -49,15 +44,10 @@ #define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \ CONFIG_SYS_SPL_MALLOC_SIZE + \ CONFIG_SPL_STACK_SIZE - 4) -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFSCONFIG_SPL_PAD_TO -#define CONFIG_SPL_FRAMEWORK /* UART Configuration */ #define CONFIG_SYS_NS16550 @@ -68,13 +58,10 @@ #define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE #define CONFIG_SYS_NS16550_CLKclk_get_rate(KS2_CLK1_6) #define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE115200 /* SPI Configuration */ -#define CONFIG_SPI #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_DAVINCI_SPI -#define CONFIG_CMD_SPI #define CONFIG_SYS_SPI_CLKclk_get_rate(KS2_CLK1_6) #define CONFIG_SF_DEFAULT_SPEED 3000 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED @@ -148,7 +135,6 @@ #define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE /* I2C Configuration */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_DAVINCI #define CONFIG_SYS_DAVINCI_I2C_SPEED 10 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */ @@ -185,7 +171,6 @@ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x10 #define CONFIG_MTD_PARTITIONS -#define CONFIG_MTD_DEVICE #define CONFIG_RBTREE #define CONFIG_LZO #define MTDIDS_DEFAULT"nand0=davinci_nand.0" @@ -197,8 +182,6 @@ #define CONFIG_USB_XHCI #define CONFIG_USB_XHCI_KEYSTONE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS2 -#define CONFIG_USB_STORAGE -#define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION #define CONFIG_FS_FAT #define CONFIG_SYS_CACHELINE_SIZE 64 @@ -208,39 +191,25 @@ #define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE /* U-Boot command configuration */ -#define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP -#define CONFIG_CMD_I2C #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#define CONFIG_CMD_MTDPARTS #define CONFIG_CMD_NAND #define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS #define CONFIG_CMD_SF #define CONFIG_CMD_EEPROM #define CONFIG_CMD_USB -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FS_GENERIC /* U-Boot general configuration */ -#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_MISC_INIT_R -#define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_PBSIZE 2048 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_LONGHELP #define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC -#define CONFIG_CMDLINE_EDITING -#define CONFIG_VERSION_VARIABLE #define CONFIG_TIMESTAMP /* EDMA3 */ #define CONFIG_TI_EDMA3 -#define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTFILE "uImage" #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ @@ -301,14 +270,23 @@ #define CONFIG_BOOTARGS \ /* Linux interfacing */ -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP -#define CONFIG_SYS_BARGSIZE1024 -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x0800) -#define CONFIG_SUPPORT_RAW_INITRD + +/* Now for the remaining common defines */ +#include + +/* We wont be loading up OS from SPL for now.. */ +#undef CONFIG_SPL_OS_BOOT +/* We do not have MMC SPL support.. yet.. */ +#undef CONFIG_SPL_LIBDISK_SUPPORT +#undef CONFIG_SPL_MMC_SUPPORT +#undef CONFIG_SPL_FAT_SUPPORT +#undef CONFIG_SPL_EXT_SUPPORT + +/* And no support for GPIO, yet.. */ +#undef CONFIG_SPL_GPIO_SUPPORT +#undef CONFIG_CMD_GPIO /* we may include files below only after all above definitions */ #include I assume the one you have removed is already part of include/configs/ti_armv7_keystone2.h. -- Murali Karicheri Linux Kernel, Keystone ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 1/4] configs: split ti_armv7_common into a omap generic header
iff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 429b109afa23..be231a551361 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -84,6 +84,6 @@ #endif /* Now bring in the rest of the common code. */ -#include +#include #endif/* __CONFIG_TI_OMAP3_COMMON_H__ */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index e96613406b3b..959f312edb5b 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -52,7 +52,7 @@ #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS #endif -#include +#include /* * Hardware drivers diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index f3e5a7587de9..789542be6710 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -47,7 +47,7 @@ #include #include -#include +#include /* * Hardware drivers -- Murali Karicheri Linux Kernel, Keystone ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 2/4] board: ks2_evm: get rid of bogus CONFIG_LINUX_BOOT_PARAM_ADDR
On 07/16/2015 03:08 PM, Nishanth Menon wrote:
CONFIG_LINUX_BOOT_PARAM_ADDR is not a valid configuration option. Do
just like what the rest of the world does.
Suggested-by: Tom Rini
Signed-off-by: Nishanth Menon
---
New patch.
board/ti/ks2_evm/board.c | 2 +-
include/configs/ks2_evm.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 8892a2843df4..0cefb3404403 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -48,7 +48,7 @@ int dram_init(void)
int board_init(void)
{
- gd->bd->bi_boot_params = CONFIG_LINUX_BOOT_PARAM_ADDR;
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
return 0;
}
diff --git a/include/configs/ks2_evm.h b/include/configs/ks2_evm.h
index e05d56cd8262..d838f270018b 100644
--- a/include/configs/ks2_evm.h
+++ b/include/configs/ks2_evm.h
@@ -307,7 +307,6 @@
#define CONFIG_OF_BOARD_SETUP
#define CONFIG_SYS_BARGSIZE 1024
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x0800)
-#define CONFIG_LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100)
#define CONFIG_SUPPORT_RAW_INITRD
Acked-By: Murali Karicheri
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Re: [U-Boot] [PATCH V2 3/4] configs: rename ks2_evm into ti_armv7_keystone2
On 07/16/2015 03:08 PM, Nishanth Menon wrote:
rename the keystone2 common header into an keystone2 architecture
specific header which can then reuse the common ti_armv7 config headers.
Signed-off-by: Nishanth Menon
---
no change
V1: https://patchwork.ozlabs.org/patch/496728/
include/configs/k2e_evm.h | 2 +-
include/configs/k2hk_evm.h | 2 +-
include/configs/k2l_evm.h | 2 +-
include/configs/{ks2_evm.h => ti_armv7_keystone2.h} | 0
4 files changed, 3 insertions(+), 3 deletions(-)
rename include/configs/{ks2_evm.h => ti_armv7_keystone2.h} (100%)
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index a28ceb7064a7..ac50a01b2980 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -27,7 +27,7 @@
"name_uboot=u-boot-spi-k2e-evm.gph\0" \
"name_fs=arago-console-image-k2e-evm.cpio.gz\0"
-#include
+#include
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c10
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index eae772178338..29e3403aa082 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -27,7 +27,7 @@
"name_uboot=u-boot-spi-k2hk-evm.gph\0"\
"name_fs=arago-console-image-k2hk-evm.cpio.gz\0"
-#include
+#include
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c20
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 57da0579255a..50d5c991a0bb 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -27,7 +27,7 @@
"name_uboot=u-boot-spi-k2l-evm.gph\0" \
"name_fs=arago-console-image-k2l-evm.cpio.gz\0"
-#include
+#include
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c10
diff --git a/include/configs/ks2_evm.h b/include/configs/ti_armv7_keystone2.h
similarity index 100%
rename from include/configs/ks2_evm.h
rename to include/configs/ti_armv7_keystone2.h
Acked-By: Murali Karicheri
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Re: [U-Boot] [U-boot][PATCH] keystone2: add support for UART download
Nishanth, On 02/16/2015 03:15 PM, Nishanth Menon wrote: On 02/16/2015 12:22 PM, Vitaly Andrianov wrote: Currently to flash u-boot image onto NAND or SPI NOR flash, very first time user need to use Code Composer Studio (CCS). This is cumbersome for an user not familiar with CCS. This patch add simpler procedure using uart boot mode for K2 EVMs. When UART bootmode is set and board is rebooted, the ROM boot loader transfers the image at the beginning of the MSMC. After the transfer please explain MSMC. Sorry for late in the discussion. Change MSMC to MSMC SRAM. README under board/ti/ks2_evm that has links to the device spec which explains what MSMC is is complete the boot-loader sets the PC to the first MSMC address 0x0c00. The u-boot.bin is linked to the address 0x0c001000. why not just shift u-boot.bin to start of MSMC address? What is wrong with the current implementation? NAND and SPI NOR boot modes use the GPH headers that has the load address defined. But in the case of UART, RBL loads it to start of MSMC and adding 1K of NOP just avoid a jump instruction at the start of the memory to jump to 0xc001000. This way we can keep the same start address across all boot modes. In order to use the u-boot.bin as an image for UART download, we need to add 4K zeros prefix that act as 1K NOP instructions before reaching 0xc001000. OR, add a relocation logic which saves the 1k NOP and resultant load time? What saving are you talking about? Miliseconds? seconds? Signed-off-by: Vitaly Andrianov Acked-by: Murali Karicheri Tested-by: Murali Karicheri --- Makefile| 6 ++ board/ti/ks2_evm/README | 17 + 2 files changed, 23 insertions(+) diff --git a/Makefile b/Makefile index 36a9a28..7a86cac 100644 --- a/Makefile +++ b/Makefile @@ -940,6 +940,12 @@ u-boot-nand.gph: u-boot.bin FORCE $(call if_changed,mkimage) @dd if=/dev/zero bs=8 count=1 2>/dev/null>> $@ +u-boot.uart.pad: + @dd if=/dev/zero bs=4 count=1024 2>/dev/null> $@ How about the cleaning up? is it not better to do this algorithmically? + +u-boot.uart: u-boot.uart.pad u-boot.bin FORCE + $(call if_changed,cat) + # x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including # reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in # the middle. diff --git a/board/ti/ks2_evm/README b/board/ti/ks2_evm/README index 9ee90a4..a1fc943 100644 --- a/board/ti/ks2_evm/README +++ b/board/ti/ks2_evm/README @@ -81,6 +81,23 @@ To build u-boot-nand.gph >make k2hk_evm_defconfig >make u-boot-nand.gph +To build u-boot.uart +>make k2hk_evm_defconfig +>make u-boot.uart + + extra EOL? +Load and Run U-Boot on keystone EVMs using UART download + + +Open BMC and regular UART terminals. + +1. On the regular UART port start xmodem transfer of the u-boot.uart +2. Using BMC terminal set the ARM-UART bootmode and reboot the EVM + BMC> bootmode #4 + MBC> reboot +3. When xmodem is complete you should see the u-boot starts on the UART port This is hard to do in practice. At times when one has regular OS running already in uart port, it tends to mess up xmodem before we switch terminal and issue bootmode #4 and reboot to BMC. instead, the only failsafe sequence I could come up with is as follows: In this method, we use xmodem to download and start the modified version of uart binary to the target over serial port. Open the BCM and regular UART port at 115200n8 configuration. Steps are rather trivial: 1. At the BCM terminal, select the following to configure DSP noboot: bootmode #15 reboot This should prevent any existing bootloader OR OS from starting up on UART 2. Start Xmodem transfer of the file u-boot-uart.gph on the regular UART port using minicom OR appropriate terminal emulator. 3. At the BCM terminal, Switch over to UART mode and restart. bootmode #4 reboot 4. At the UART terminal, the transfer completes and u-boot startsup. This may be used to download and flash u-boot to nand/spi etc. + + extra EOL? Load and Run U-Boot on keystone EVMs using CCS ========= -- Murali Karicheri Linux Kernel, Texas Instruments ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-boot PATCH] keystone: set default pci mode to root complex
On 12/09/2014 02:32 PM, Murali Karicheri wrote:
pci ports are used as root complex in Linux. So set this as default
in u-boot for keystone devices
Signed-off-by: Murali Karicheri
---
arch/arm/cpu/armv7/keystone/init.c| 33 +
arch/arm/include/asm/arch-keystone/hardware.h |1 +
2 files changed, 34 insertions(+)
diff --git a/arch/arm/cpu/armv7/keystone/init.c
b/arch/arm/cpu/armv7/keystone/init.c
index c2b9478..c96845c 100644
--- a/arch/arm/cpu/armv7/keystone/init.c
+++ b/arch/arm/cpu/armv7/keystone/init.c
@@ -15,6 +15,16 @@
#include
#include
+#define MAX_PCI_PORTS 2
+enum pci_mode {
+ ENDPOINT,
+ LEGACY_ENDPOINT,
+ ROOTCOMPLEX,
+};
+
+#define DEVCFG_MODE_MASK (BIT(2) | BIT(1))
+#define DEVCFG_MODE_SHIFT 1
+
void chip_configuration_unlock(void)
{
__raw_writel(KS2_KICK0_MAGIC, KS2_KICK0);
@@ -68,6 +78,24 @@ void osr_init(void)
}
#endif
+/* Function to set up PCIe mode */
+static void config_pcie_mode(int pcie_port, enum pci_mode mode)
+{
+ u32 val = __raw_readl(KS2_DEVCFG);
+
+ if (pcie_port>= MAX_PCI_PORTS)
+ return;
+
+ /**
+* each pci port has two bits for mode and it starts at
+* bit 1. So use port number to get the right bit position.
+*/
+ pcie_port<<= 1;
+ val&= ~(DEVCFG_MODE_MASK<< pcie_port);
+ val |= ((mode<< DEVCFG_MODE_SHIFT)<< pcie_port);
+ __raw_writel(val, KS2_DEVCFG);
+}
+
int arch_cpu_init(void)
{
chip_configuration_unlock();
@@ -77,8 +105,13 @@ int arch_cpu_init(void)
msmc_share_all_segments(KS2_MSMC_SEGMENT_NETCP);
msmc_share_all_segments(KS2_MSMC_SEGMENT_QM_PDSP);
msmc_share_all_segments(KS2_MSMC_SEGMENT_PCIE0);
+
+ /* Initialize the PCIe-0 to work as Root Complex */
+ config_pcie_mode(0, ROOTCOMPLEX);
#if defined(CONFIG_SOC_K2E) || defined(CONFIG_SOC_K2L)
msmc_share_all_segments(KS2_MSMC_SEGMENT_PCIE1);
+ /* Initialize the PCIe-1 to work as Root Complex */
+ config_pcie_mode(1, ROOTCOMPLEX);
#endif
#ifdef CONFIG_SOC_K2L
osr_init();
diff --git a/arch/arm/include/asm/arch-keystone/hardware.h
b/arch/arm/include/asm/arch-keystone/hardware.h
index be22bdb..16cbcee 100644
--- a/arch/arm/include/asm/arch-keystone/hardware.h
+++ b/arch/arm/include/asm/arch-keystone/hardware.h
@@ -144,6 +144,7 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_DEVICE_STATE_CTRL_BASE0x0262
#define KS2_JTAG_ID_REG (KS2_DEVICE_STATE_CTRL_BASE +
0x18)
#define KS2_DEVSTAT (KS2_DEVICE_STATE_CTRL_BASE + 0x20)
+#define KS2_DEVCFG (KS2_DEVICE_STATE_CTRL_BASE + 0x14c)
/* PSC */
#define KS2_PSC_BASE 0x0235
Tom,
Please apply this when you get a chance if there are no comments.
--
Murali Karicheri
Linux Kernel, Texas Instruments
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[U-Boot] [U-boot PATCH] keystone: set default pci mode to root complex
pci ports are used as root complex in Linux. So set this as default
in u-boot for keystone devices
Signed-off-by: Murali Karicheri
---
arch/arm/cpu/armv7/keystone/init.c| 33 +
arch/arm/include/asm/arch-keystone/hardware.h |1 +
2 files changed, 34 insertions(+)
diff --git a/arch/arm/cpu/armv7/keystone/init.c
b/arch/arm/cpu/armv7/keystone/init.c
index c2b9478..c96845c 100644
--- a/arch/arm/cpu/armv7/keystone/init.c
+++ b/arch/arm/cpu/armv7/keystone/init.c
@@ -15,6 +15,16 @@
#include
#include
+#define MAX_PCI_PORTS 2
+enum pci_mode {
+ ENDPOINT,
+ LEGACY_ENDPOINT,
+ ROOTCOMPLEX,
+};
+
+#define DEVCFG_MODE_MASK (BIT(2) | BIT(1))
+#define DEVCFG_MODE_SHIFT 1
+
void chip_configuration_unlock(void)
{
__raw_writel(KS2_KICK0_MAGIC, KS2_KICK0);
@@ -68,6 +78,24 @@ void osr_init(void)
}
#endif
+/* Function to set up PCIe mode */
+static void config_pcie_mode(int pcie_port, enum pci_mode mode)
+{
+ u32 val = __raw_readl(KS2_DEVCFG);
+
+ if (pcie_port >= MAX_PCI_PORTS)
+ return;
+
+ /**
+* each pci port has two bits for mode and it starts at
+* bit 1. So use port number to get the right bit position.
+*/
+ pcie_port <<= 1;
+ val &= ~(DEVCFG_MODE_MASK << pcie_port);
+ val |= ((mode << DEVCFG_MODE_SHIFT) << pcie_port);
+ __raw_writel(val, KS2_DEVCFG);
+}
+
int arch_cpu_init(void)
{
chip_configuration_unlock();
@@ -77,8 +105,13 @@ int arch_cpu_init(void)
msmc_share_all_segments(KS2_MSMC_SEGMENT_NETCP);
msmc_share_all_segments(KS2_MSMC_SEGMENT_QM_PDSP);
msmc_share_all_segments(KS2_MSMC_SEGMENT_PCIE0);
+
+ /* Initialize the PCIe-0 to work as Root Complex */
+ config_pcie_mode(0, ROOTCOMPLEX);
#if defined(CONFIG_SOC_K2E) || defined(CONFIG_SOC_K2L)
msmc_share_all_segments(KS2_MSMC_SEGMENT_PCIE1);
+ /* Initialize the PCIe-1 to work as Root Complex */
+ config_pcie_mode(1, ROOTCOMPLEX);
#endif
#ifdef CONFIG_SOC_K2L
osr_init();
diff --git a/arch/arm/include/asm/arch-keystone/hardware.h
b/arch/arm/include/asm/arch-keystone/hardware.h
index be22bdb..16cbcee 100644
--- a/arch/arm/include/asm/arch-keystone/hardware.h
+++ b/arch/arm/include/asm/arch-keystone/hardware.h
@@ -144,6 +144,7 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_DEVICE_STATE_CTRL_BASE 0x0262
#define KS2_JTAG_ID_REG(KS2_DEVICE_STATE_CTRL_BASE +
0x18)
#define KS2_DEVSTAT(KS2_DEVICE_STATE_CTRL_BASE + 0x20)
+#define KS2_DEVCFG (KS2_DEVICE_STATE_CTRL_BASE + 0x14c)
/* PSC */
#define KS2_PSC_BASE 0x0235
--
1.7.9.5
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Re: [U-Boot] [U-boot] [Patch 2/6] ARM: keystone2: clock: add K2E clock support
On 07/15/2014 05:59 PM, Ivan Khoronzhuk wrote:
From: Hao Zhang
This patch adds clock definitions and commands to support Keystone2
K2E SOC.
Signed-off-by: Hao Zhang
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/cpu/armv7/keystone/Makefile | 1 +
arch/arm/cpu/armv7/keystone/clock-k2e.c| 101 +
arch/arm/cpu/armv7/keystone/clock.c| 2 +
arch/arm/cpu/armv7/keystone/cmd_clock.c| 31 ++--
arch/arm/include/asm/arch-keystone/clock-k2e.h | 68 +
arch/arm/include/asm/arch-keystone/clock.h | 4 +
include/configs/ks2_evm.h | 2 +-
7 files changed, 203 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/cpu/armv7/keystone/clock-k2e.c
create mode 100644 arch/arm/include/asm/arch-keystone/clock-k2e.h
diff --git a/arch/arm/cpu/armv7/keystone/Makefile
b/arch/arm/cpu/armv7/keystone/Makefile
index 74c5160..f8519c0 100644
--- a/arch/arm/cpu/armv7/keystone/Makefile
+++ b/arch/arm/cpu/armv7/keystone/Makefile
@@ -9,6 +9,7 @@ obj-y += init.o
obj-y += psc.o
obj-y += clock.o
obj-$(CONFIG_SOC_K2HK) += clock-k2hk.o
+obj-$(CONFIG_SOC_K2E) += clock-k2e.o
obj-y += cmd_clock.o
obj-y += cmd_mon.o
obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_nav.o
diff --git a/arch/arm/cpu/armv7/keystone/clock-k2e.c
b/arch/arm/cpu/armv7/keystone/clock-k2e.c
new file mode 100644
index 000..42092e1
--- /dev/null
+++ b/arch/arm/cpu/armv7/keystone/clock-k2e.c
@@ -0,0 +1,101 @@
+/*
+ * Keystone2: get clk rate for K2E
+ *
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated,
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+const struct keystone_pll_regs keystone_pll_regs[] = {
+ [CORE_PLL] = {KS2_MAINPLLCTL0, KS2_MAINPLLCTL1},
+ [PASS_PLL] = {KS2_PASSPLLCTL0, KS2_PASSPLLCTL1},
+ [DDR3_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
+};
+
+/**
+ * pll_freq_get - get pll frequency
+ * Fout = Fref * NF(mult) / NR(prediv) / OD
+ * @pll: pll identifier
+ */
+static unsigned long pll_freq_get(int pll)
+{
+ unsigned long mult = 1, prediv = 1, output_div = 2;
+ unsigned long ret;
+ u32 tmp, reg;
+
+ if (pll == CORE_PLL) {
+ ret = external_clk[sys_clk];
+ if (pllctl_reg_read(pll, ctl)& PLLCTL_PLLEN) {
+ /* PLL mode */
+ tmp = __raw_readl(KS2_MAINPLLCTL0);
+ prediv = (tmp& PLL_DIV_MASK) + 1;
+ mult = (((tmp& PLLM_MULT_HI_SMASK)>> 6) |
+ (pllctl_reg_read(pll, mult)&
+ PLLM_MULT_LO_MASK)) + 1;
+ output_div = ((pllctl_reg_read(pll, secctl)>>
+ PLL_CLKOD_SHIFT)& PLL_CLKOD_MASK) + 1;
+
+ ret = ret / prediv / output_div * mult;
+ }
+ } else {
+ switch (pll) {
+ case PASS_PLL:
+ ret = external_clk[pa_clk];
+ reg = KS2_PASSPLLCTL0;
+ break;
+ case DDR3_PLL:
+ ret = external_clk[ddr3_clk];
+ reg = KS2_DDR3APLLCTL0;
+ break;
+ default:
+ return 0;
+ }
+
+ tmp = __raw_readl(reg);
+
Please remove this line as below is part of this and should be in a
block IMO. With this change,
Acked-by: Murali Karicheri
+ if (!(tmp& PLLCTL_BYPASS)) {
+ /* Bypass disabled */
+ prediv = (tmp& PLL_DIV_MASK) + 1;
+ mult = ((tmp>> PLL_MULT_SHIFT)& PLL_MULT_MASK) + 1;
+ output_div = ((tmp>> PLL_CLKOD_SHIFT)&
+ PLL_CLKOD_MASK) + 1;
+ ret = ((ret / prediv) * mult) / output_div;
+ }
+ }
+
+ return ret;
+}
+
+unsigned long clk_get_rate(unsigned int clk)
+{
+ switch (clk) {
+ case core_pll_clk: return pll_freq_get(CORE_PLL);
+ case pass_pll_clk: return pll_freq_get(PASS_PLL);
+ case ddr3_pll_clk: return pll_freq_get(DDR3_PLL);
+ case sys_clk0_1_clk:
+ case sys_clk0_clk: return pll_freq_get(CORE_PLL) / pll0div_read(1);
+ case sys_clk1_clk: return pll_freq_get(CORE_PLL) / pll0div_read(2);
+ case sys_clk2_clk: return pll_freq_get(CORE_PLL) / pll0div_read(3);
+ case sys_clk3_clk: return pll_freq_get(CORE_PLL) / pll0div_read(4);
+ case sys_clk0_2_clk:return clk_get_rate(sys_clk0_clk) / 2;
+ case sys_clk0_3_clk:return clk_get_rate(sys_clk0_clk) / 3;
+ case sys_clk0_4_clk:return clk_get_rate(sys_clk0_clk) / 4;
+ case sys_clk0_6_clk:return clk_get_rate(sys_clk0_c
Re: [U-Boot] [U-boot] [Patch v2 3/3] k2hk_evm: add script to automate NAND flash process
On 07/04/2014 08:03 AM, Ivan Khoronzhuk wrote:
Add script to automate NAND flash process. As for now the board has
two burn scripts - burn to boot from SPI NOR flash and burn to boot
from AEMIF NAND flash, rename burn_uboot script to burn_uboot_spi.
Also update README to contain NAND burn U-boot process description.
Signed-off-by: Ivan Khoronzhuk
---
board/ti/k2hk_evm/README | 28 +++-
include/configs/k2hk_evm.h | 4 +++-
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/board/ti/k2hk_evm/README b/board/ti/k2hk_evm/README
index bfeb05b..7426b8d 100644
--- a/board/ti/k2hk_evm/README
+++ b/board/ti/k2hk_evm/README
@@ -38,11 +38,13 @@ board configuration file: include/configs/k2hk_evm.h
Supported boot modes:
- SPI NOR boot
+ - AEMIF NAND boot
Supported image formats:-
- u-boot.bin: for loading and running u-boot.bin through Texas instruments
code composure studio (CCS)
- u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot
+ - u-boot-nand.gph: gpimage for programming AEMIF NAND flash for NAND boot
Build instructions:
===
@@ -55,6 +57,10 @@ To build u-boot-spi.gph
>make k2hk_evm_config
>make u-boot-spi.gph
+To build u-boot-nand.gph
+>make k2hk_evm_config
+>make u-boot-nand.gph
+
Load and Run U-Boot on K2HK EVM using CCS
=
@@ -115,8 +121,28 @@ instructions:-
5. At the U-Boot console type following to setup u-boot environment variables.
setenv addr_uboot 0x8700
setenv filesize
- run burn_uboot
+ run burn_uboot_spi
Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
to "SPI Little Endian Boot mode" as per instruction at
http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup.
6. Power ON the EVM. The EVM now boots with u-boot image on the NOR flash.
+
+AEMIF NAND Flash programming instructions
+==
+U-Boot image can be flashed to first 1024KB of the NAND flash using following
+instructions:-
+
+1. Start CCS and run U-boot as described above.
+2. Suspend Target. Select Run -> Suspend from top level menu
+ CortexA15_1 (Free Running)"
+3. Load u-boot-nand.gph binary from build folder on to DDR address 0x8700
+ through CCS as described in step 2 of "Load and Run U-Boot on K2HK EVM
+ using CCS", but using address 0x8700.
+4. Free Run the target as desribed earlier (step 4) to get u-boot prompt
+5. At the U-Boot console type following to setup u-boot environment variables.
+ setenv filesize
+ run burn_uboot_nand
+ Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
+ to "ARM NAND Boot mode" as per instruction at
+ http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup.
+6. Power ON the EVM. The EVM now boots with u-boot image on the NAND flash.
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index 3f87741..63e0249 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -221,8 +221,10 @@
"get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
"get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0" \
"get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0" \
- "burn_uboot=sf probe; sf erase 0 0x10; " \
+ "burn_uboot_spi=sf probe; sf erase 0 0x10; " \
"sf write ${addr_uboot} 0 ${filesize}\0" \
+ "burn_uboot_nand=nand erase 0 0x10; " \
+ "nand write ${addr_uboot} 0 ${filesize}\0"\
"args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0"\
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=2,2048\0" \
Acked-by: Murali Karicheri
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Re: [U-Boot] [U-boot] [Patch 3/3] k2hk_evm: add script to automate NAND flash process
On 07/02/2014 04:36 PM, Ivan Khoronzhuk wrote: Add script to automate NAND flash process. As for now the board has two burn scripts - burn to boot from SPI NOR flash and burn to boot from AEMIF NAND flash, rename burn_uboot script to burn_uboot_spi. Also update README to contain NAND burn U-boot process description. Signed-off-by: Ivan Khoronzhuk --- board/ti/k2hk_evm/README | 27 ++- include/configs/k2hk_evm.h | 4 +++- 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/board/ti/k2hk_evm/README b/board/ti/k2hk_evm/README index bfeb05b..1da721c 100644 --- a/board/ti/k2hk_evm/README +++ b/board/ti/k2hk_evm/README @@ -43,6 +43,7 @@ Supported image formats:- - u-boot.bin: for loading and running u-boot.bin through Texas instruments code composure studio (CCS) - u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot + - u-boot-nand.gph: gpimage for programming AEMIF NAND flash for NAND boot Please also update the supported boot modes to include NAND boot under the section "Supported boot modes:" Build instructions: === @@ -55,6 +56,10 @@ To build u-boot-spi.gph >make k2hk_evm_config >make u-boot-spi.gph +To build u-boot-nand.gph +>make k2hk_evm_config +>make u-boot-nand.gph + Murali ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-boot] [PATCH] mtd: nand: davinci: add header file for driver definitions
On 5/29/2014 11:58 AM, Ivan Khoronzhuk wrote:
The definitions inside emif_defs.h concern davinci nand driver and
should be in it's header. So create header file for davinci nand
driver and move definitions from emif_defs.h to it.
Ivan,
It is difficult to see what is done here. Can you rename the file in a
separate patch?
Do it similar to what is done in kernel where aemif driver concerns with
bus configuration
and nand drivers concerns with NAND part of the EMIF driver.
Acked-by: Vitaly Andrianov
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/cpu/armv7/keystone/aemif.c| 2 +-
arch/arm/include/asm/arch-keystone/aemif.h | 16 ++
arch/arm/include/asm/arch-keystone/nand_defs.h | 23 --
drivers/mtd/nand/davinci_nand.c| 3 +-
.../emif_defs.h => drivers/mtd/nand/davinci_nand.h | 35 +-
5 files changed, 32 insertions(+), 47 deletions(-)
create mode 100644 arch/arm/include/asm/arch-keystone/aemif.h
delete mode 100644 arch/arm/include/asm/arch-keystone/nand_defs.h
rename arch/arm/include/asm/arch-keystone/emif_defs.h =>
drivers/mtd/nand/davinci_nand.h (57%)
diff --git a/arch/arm/cpu/armv7/keystone/aemif.c
b/arch/arm/cpu/armv7/keystone/aemif.c
index 9b26886..9ba1549 100644
--- a/arch/arm/cpu/armv7/keystone/aemif.c
+++ b/arch/arm/cpu/armv7/keystone/aemif.c
@@ -10,7 +10,7 @@
#include
#include
#include
-#include
+#include <../drivers/mtd/nand/davinci_nand.h>
#define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
#define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
diff --git a/arch/arm/include/asm/arch-keystone/aemif.h
b/arch/arm/include/asm/arch-keystone/aemif.h
new file mode 100644
index 000..2dac747
--- /dev/null
+++ b/arch/arm/include/asm/arch-keystone/aemif.h
@@ -0,0 +1,16 @@
+/*
+ * emif definitions to re-use davinci emif driver on Keystone2
+ *
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated,
+ * (C) Copyright 2007 Sergey Kubushyn
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef _AEMIF_H_
+#define _AEMIF_H_
+
+#include
+
+
+#endif
diff --git a/arch/arm/include/asm/arch-keystone/nand_defs.h
b/arch/arm/include/asm/arch-keystone/nand_defs.h
deleted file mode 100644
index 58417db..000
--- a/arch/arm/include/asm/arch-keystone/nand_defs.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * nand driver definitions to re-use davinci nand driver on Keystone2
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated,
- * (C) Copyright 2007 Sergey Kubushyn
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef _NAND_DEFS_H_
-#define _NAND_DEFS_H_
-
-#include
-#include
-
-#define MASK_CLE 0x4000
-#defineMASK_ALE 0x2000
-
-#define NAND_READ_START 0x00
-#define NAND_READ_END0x30
-#define NAND_STATUS 0x70
-
-#endif
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 75b03a7..bacf1f1 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -32,8 +32,7 @@
#include
#include
#include
-#include
-#include
+#include "davinci_nand.h"
/* Definitions for 4-bit hardware ECC */
#define NAND_TIMEOUT 10240
diff --git a/arch/arm/include/asm/arch-keystone/emif_defs.h
b/drivers/mtd/nand/davinci_nand.h
similarity index 57%
rename from arch/arm/include/asm/arch-keystone/emif_defs.h
rename to drivers/mtd/nand/davinci_nand.h
index a3378aa..db8d896 100644
--- a/arch/arm/include/asm/arch-keystone/emif_defs.h
+++ b/drivers/mtd/nand/davinci_nand.h
@@ -1,16 +1,22 @@
/*
- * emif definitions to re-use davinci emif driver on Keystone2
+ * NAND Flash Driver
*
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated,
- * (C) Copyright 2007 Sergey Kubushyn
+ * Copyright (C) 2006-2014 Texas Instruments.
*
- * SPDX-License-Identifier: GPL-2.0+
+ * Based on Linux DaVinci NAND driver by TI.
*/
-#ifndef _EMIF_DEFS_H_
-#define _EMIF_DEFS_H_
-#include
+#ifndef _DAVINCI_NAND_H_
+#define _DAVINCI_NAND_H_
+
+#include
+
+#define MASK_CLE 0x4000
+#defineMASK_ALE0x2000
+
+#define NAND_READ_START0x00
+#define NAND_READ_END 0x30
+#define NAND_STATUS0x70
struct davinci_emif_regs {
uint32_tercsr;
@@ -57,17 +63,4 @@ struct davinci_emif_regs {
#define DAVINCI_NANDFCR_4BIT_ECC_START(1 << 12)
#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
-/* Chip Select setup */
-#define DAVINCI_ABCR_STROBE_SELECT (1 << 31)
-#define DAVINCI_ABCR_EXT_WAIT (1 << 30)
-#define DAVINCI_ABCR_WSETUP(n) ((n) << 26)
-#define DAVINCI_ABCR_WSTROBE(n)((n) << 20)
-#define DAVINCI_ABCR_WHOLD(n) ((n) << 17)
-#define DAVINCI_ABCR_RSETUP(n) ((n) << 13)
-#define DAVINCI_ABCR_
Re: [U-Boot] [U-boot] [PATCH] ARM: keystone: aemif: move aemif driver to drivers/memory/ti-aemif.c
On 5/29/2014 11:59 AM, Ivan Khoronzhuk wrote:
Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF
definitions collected in drivers/memory/ti-aemif.h
Acked-by: Vitaly Andrianov
Signed-off-by: Ivan Khoronzhuk
---
Based on [U-boot] [PATCH] mtd: nand: davinci: add header file for driver
definitions
arch/arm/cpu/armv7/keystone/Makefile | 1 -
arch/arm/include/asm/arch-keystone/aemif.h | 16 -
arch/arm/include/asm/arch-keystone/hardware-k2hk.h | 7
arch/arm/include/asm/arch-keystone/hardware.h | 30 +++--
board/ti/k2hk_evm/board.c | 10 +++---
drivers/Makefile | 1 +
drivers/memory/Makefile| 1 +
.../keystone/aemif.c => drivers/memory/ti-aemif.c | 37
drivers/memory/ti-aemif.h | 39 ++
include/configs/k2hk_evm.h | 4 +++
10 files changed, 77 insertions(+), 69 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-keystone/aemif.h
create mode 100644 drivers/memory/Makefile
rename arch/arm/cpu/armv7/keystone/aemif.c => drivers/memory/ti-aemif.c (63%)
create mode 100644 drivers/memory/ti-aemif.h
diff --git a/arch/arm/cpu/armv7/keystone/Makefile
b/arch/arm/cpu/armv7/keystone/Makefile
index b1bd022..c4af252 100644
--- a/arch/arm/cpu/armv7/keystone/Makefile
+++ b/arch/arm/cpu/armv7/keystone/Makefile
@@ -5,7 +5,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += aemif.o
obj-y += init.o
obj-y += psc.o
obj-y += clock.o
diff --git a/arch/arm/include/asm/arch-keystone/aemif.h
b/arch/arm/include/asm/arch-keystone/aemif.h
deleted file mode 100644
index 2dac747..000
--- a/arch/arm/include/asm/arch-keystone/aemif.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * emif definitions to re-use davinci emif driver on Keystone2
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated,
- * (C) Copyright 2007 Sergey Kubushyn
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef _AEMIF_H_
-#define _AEMIF_H_
-
-#include
-
-
-#endif
diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
b/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
index 7ac2662..50ce649 100644
--- a/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
+++ b/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
@@ -9,13 +9,6 @@
#ifndef __ASM_ARCH_HARDWARE_K2HK_H
#define __ASM_ARCH_HARDWARE_K2HK_H
-#define K2HK_ASYNC_EMIF_CNTRL_BASE 0x21000a00
-#define DAVINCI_ASYNC_EMIF_CNTRL_BASE K2HK_ASYNC_EMIF_CNTRL_BASE
-#define K2HK_ASYNC_EMIF_DATA_CE0_BASE 0x3000
-#define K2HK_ASYNC_EMIF_DATA_CE1_BASE 0x3400
-#define K2HK_ASYNC_EMIF_DATA_CE2_BASE 0x3800
-#define K2HK_ASYNC_EMIF_DATA_CE3_BASE 0x3c00
-
#define K2HK_PLL_CNTRL_BASE 0x0231
#define CLOCK_BASE K2HK_PLL_CNTRL_BASE
#define KS2_RSTCTRL (K2HK_PLL_CNTRL_BASE + 0xe8)
diff --git a/arch/arm/include/asm/arch-keystone/hardware.h
b/arch/arm/include/asm/arch-keystone/hardware.h
index 6c532ca..ffdecbf 100644
--- a/arch/arm/include/asm/arch-keystone/hardware.h
+++ b/arch/arm/include/asm/arch-keystone/hardware.h
@@ -22,32 +22,6 @@
typedef volatile unsigned int dv_reg;
typedef volatile unsigned int *dv_reg_p;
-#define ASYNC_EMIF_NUM_CS 4
-#define ASYNC_EMIF_MODE_NOR 0
-#define ASYNC_EMIF_MODE_NAND1
-#define ASYNC_EMIF_MODE_ONENAND 2
-#define ASYNC_EMIF_PRESERVE -1
-
-struct async_emif_config {
- unsigned mode;
- unsigned select_strobe;
- unsigned extend_wait;
- unsigned wr_setup;
- unsigned wr_strobe;
- unsigned wr_hold;
- unsigned rd_setup;
- unsigned rd_strobe;
- unsigned rd_hold;
- unsigned turn_around;
- enum {
- ASYNC_EMIF_8= 0,
- ASYNC_EMIF_16 = 1,
- ASYNC_EMIF_32 = 2,
- } width;
-};
-
-void init_async_emif(int num_cs, struct async_emif_config *config);
-
struct ddr3_phy_config {
unsigned int pllcr;
unsigned int pgcr1_mask;
@@ -145,6 +119,10 @@ struct ddr3_emif_config {
#define KS2_UART0_BASE0x02530c00
#define KS2_UART1_BASE0x02531000
+/* AEMIF */
+#define KS2_AEMIF_CNTRL_BASE 0x21000a00
+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
+
#ifdef CONFIG_SOC_K2HK
#include
#endif
diff --git a/board/ti/k2hk_evm/board.c b/board/ti/k2hk_evm/board.c
index dc39139..30a2cbb 100644
--- a/board/ti/k2hk_evm/board.c
+++ b/board/ti/k2hk_evm/board.c
@@ -16,9 +16,9 @@
#include
#include
#include
-#include
#include
#include
+#include <../drivers/memory/ti-aemif.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -40,9 +40,9 @@ unsigned int external_clk[ext_clk_count] = {
what is that *
[U-Boot] [RESEND: PATCH] serial: nsl16550: add hw flow control support
keystone serial hw support hw flow control. This patch enables hw flow control for keystone EVMs as an optional feature based on CONFIG_HWFLOW Signed-off-by: Murali Karicheri --- Depends on keystone patch series on the u-boot mailing list drivers/serial/ns16550.c |6 ++ include/ns16550.h|1 + 2 files changed, 7 insertions(+) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 8a13454..e49a053 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -33,6 +33,12 @@ #if defined(CONFIG_K2HK_EVM) #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) +#undef UART_MCRVAL +#ifdef CONFIG_HWFLOW +#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) +#else +#define UART_MCRVAL (UART_MCR_RTS) +#endif #endif #ifndef CONFIG_SYS_NS16550_IER diff --git a/include/ns16550.h b/include/ns16550.h index 51cb5b4..17f829f 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -100,6 +100,7 @@ typedef struct NS16550 *NS16550_t; #define UART_MCR_OUT1 0x04/* Out 1 */ #define UART_MCR_OUT2 0x08/* Out 2 */ #define UART_MCR_LOOP 0x10/* Enable loopback test mode */ +#define UART_MCR_AFE 0x20/* Enable auto-RTS/CTS */ #define UART_MCR_DMA_EN0x04 #define UART_MCR_TX_DFR0x08 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] serial: nsl16550: add hw flow control support
keystone serial hw support hw flow control. This patch enables hw flow control for keystone EVMs as an optional feature based on CONFIG_SERIAL_HW_FLOW_CONTROL. Signed-off-by: Murali Karicheri --- depends on keystone patch series which is on the list. README |4 drivers/serial/ns16550.c |6 ++ include/ns16550.h|1 + 3 files changed, 11 insertions(+) diff --git a/README b/README index 63c2dba..85c0076 100644 --- a/README +++ b/README @@ -711,6 +711,10 @@ The following options need to be configured: boot loader that has already initialized the UART. Define this variable to flush the UART at init time. + CONFIG_SERIAL_HW_FLOW_CONTROL + + Define this variable to enable hw flow control in serial driver. + Current user of this option is drivers/serial/nsl16550.c driver - Console Interface: Depending on board, define exactly one serial port diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 8a13454..f26979d 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -33,6 +33,12 @@ #if defined(CONFIG_K2HK_EVM) #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) +#undef UART_MCRVAL +#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL +#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) +#else +#define UART_MCRVAL (UART_MCR_RTS) +#endif #endif #ifndef CONFIG_SYS_NS16550_IER diff --git a/include/ns16550.h b/include/ns16550.h index 51cb5b4..17f829f 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -100,6 +100,7 @@ typedef struct NS16550 *NS16550_t; #define UART_MCR_OUT1 0x04/* Out 1 */ #define UART_MCR_OUT2 0x08/* Out 2 */ #define UART_MCR_LOOP 0x10/* Enable loopback test mode */ +#define UART_MCR_AFE 0x20/* Enable auto-RTS/CTS */ #define UART_MCR_DMA_EN0x04 #define UART_MCR_TX_DFR0x08 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 3/9] arm: add support for arch timer
On 4/4/2014 6:12 AM, FengHua wrote: -Original Messages- From: "Andrianov, Vitaly" Sent Time: 2014-04-03 19:22:34 (Thursday) To: "Masahiro Yamada" , "Karicheri, Muralidharan" Cc: "Rini, Tom" , "u-boot@lists.denx.de" Subject: Re: [U-Boot] [PATCH v5 3/9] arm: add support for arch timer Hi Masahiro, -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot- boun...@lists.denx.de] On Behalf Of Masahiro Yamada Sent: Wednesday, April 02, 2014 9:46 PM To: Karicheri, Muralidharan Cc: Rini, Tom; u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH v5 3/9] arm: add support for arch timer Hi Murali, On Tue, 1 Apr 2014 14:44:23 -0400 Murali Karicheri wrote: From: Vitaly Andrianov This patch add basic support for the architecture timer found on recent ARMv7 based SoCs. Signed-off-by: Vitaly Andrianov Signed-off-by: Murali Karicheri Acked-by: Tom Rini --- arch/arm/lib/Makefile |1 + arch/arm/lib/arch_timer.c | 58 + I am not familiar with this timer, but your commit description implies it is specific to ARMv7. If so, it looks like it should go to arch/arm/cpu/armv7/ . Is this right? This is for arch timer implemented in ARM Cortex-A15 which is ARMv7. I believe the same arch timer is in ARMv8. So, it is not specific to ARMv7 only. The commit description mentioned only ARMv7 because the driver was designed and tested on ARMv7. If we want to apply the arch_timer.c to armv8, the get_ticks() function should be modified due to mrrc instuction. Furthermore, armv8 now make use of timer infrastructure of lib/time.c. Only get_tbclk() and timer_read_counter() are architecture specific and declared in generic_timer.c. We'd better construct a common arch timer structure across arm platform. Best regards, David The v6 of the series just posted has moved the arch_timer.c to arch/arm/cpu/armv7 folder as requested by you. Regards, Murali ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 6/9] i2c, davinci: convert driver to new mutlibus/mutliadapter framework
From: Vitaly Andrianov
- add davinci driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
Acked-by: Heiko Schocher
---
arch/arm/cpu/arm926ejs/davinci/dm355.c |2 +-
arch/arm/cpu/arm926ejs/davinci/dm365.c |2 +-
arch/arm/cpu/arm926ejs/davinci/dm644x.c |2 +-
arch/arm/cpu/arm926ejs/davinci/dm646x.c |2 +-
drivers/i2c/Makefile|2 +-
drivers/i2c/davinci_i2c.c | 401 ++-
drivers/i2c/davinci_i2c.h | 27 ++-
include/configs/cam_enc_4xx.h |8 +-
include/configs/da830evm.h |8 +-
include/configs/da850evm.h |8 +-
include/configs/davinci_dm355evm.h |8 +-
include/configs/davinci_dm355leopard.h |8 +-
include/configs/davinci_dm365evm.h |8 +-
include/configs/davinci_dm6467evm.h |8 +-
include/configs/davinci_dvevm.h |8 +-
include/configs/davinci_schmoogie.h |8 +-
include/configs/davinci_sffsdr.h|8 +-
include/configs/davinci_sonata.h|8 +-
include/configs/ea20.h |7 +-
include/configs/enbw_cmc.h |8 +-
20 files changed, 306 insertions(+), 235 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/dm355.c
b/arch/arm/cpu/arm926ejs/davinci/dm355.c
index 5f85162..f9550a1 100644
--- a/arch/arm/cpu/arm926ejs/davinci/dm355.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm355.c
@@ -19,7 +19,7 @@ void davinci_enable_uart0(void)
}
-#ifdef CONFIG_DRIVER_DAVINCI_I2C
+#ifdef CONFIG_SYS_I2C_DAVINCI
void davinci_enable_i2c(void)
{
lpsc_on(DAVINCI_LPSC_I2C);
diff --git a/arch/arm/cpu/arm926ejs/davinci/dm365.c
b/arch/arm/cpu/arm926ejs/davinci/dm365.c
index 0af2d02..f6ca527 100644
--- a/arch/arm/cpu/arm926ejs/davinci/dm365.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm365.c
@@ -12,7 +12,7 @@ void davinci_enable_uart0(void)
lpsc_on(DAVINCI_LPSC_UART0);
}
-#ifdef CONFIG_DRIVER_DAVINCI_I2C
+#ifdef CONFIG_SYS_I2C_DAVINCI
void davinci_enable_i2c(void)
{
lpsc_on(DAVINCI_LPSC_I2C);
diff --git a/arch/arm/cpu/arm926ejs/davinci/dm644x.c
b/arch/arm/cpu/arm926ejs/davinci/dm644x.c
index 788e578..c58e271 100644
--- a/arch/arm/cpu/arm926ejs/davinci/dm644x.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm644x.c
@@ -47,7 +47,7 @@ void davinci_enable_emac(void)
}
#endif
-#ifdef CONFIG_DRIVER_DAVINCI_I2C
+#ifdef CONFIG_SYS_I2C_DAVINCI
void davinci_enable_i2c(void)
{
lpsc_on(DAVINCI_LPSC_I2C);
diff --git a/arch/arm/cpu/arm926ejs/davinci/dm646x.c
b/arch/arm/cpu/arm926ejs/davinci/dm646x.c
index 86a508f..cfea830 100644
--- a/arch/arm/cpu/arm926ejs/davinci/dm646x.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm646x.c
@@ -18,7 +18,7 @@ void davinci_enable_emac(void)
}
#endif
-#ifdef CONFIG_DRIVER_DAVINCI_I2C
+#ifdef CONFIG_SYS_I2C_DAVINCI
void davinci_enable_i2c(void)
{
lpsc_on(DAVINCI_DM646X_LPSC_I2C);
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 36d5e5f..e33586d 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -6,7 +6,6 @@
#
obj-$(CONFIG_BFIN_TWI_I2C) += bfin-twi_i2c.o
-obj-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
obj-$(CONFIG_DW_I2C) += designware_i2c.o
obj-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
obj-$(CONFIG_I2C_MV) += mv_i2c.o
@@ -16,6 +15,7 @@ obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
obj-$(CONFIG_U8500_I2C) += u8500_i2c.o
obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o
+obj-$(CONFIG_SYS_I2C_DAVINCI) += davinci_i2c.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
diff --git a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c
index 6e5260c..9ca99c4 100644
--- a/drivers/i2c/davinci_i2c.c
+++ b/drivers/i2c/davinci_i2c.c
@@ -1,8 +1,9 @@
/*
* TI DaVinci (TMS320DM644x) I2C driver.
*
- * Copyright (C) 2007 Sergey Kubushyn
- *
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated,
+ * (C) Copyright 2007 Sergey Kubushyn
*
*
* SPDX-License-Identifier:GPL-2.0+
@@ -12,306 +13,372 @@
#include
#include
#include
+#include
#include "davinci_i2c.h"
#define CHECK_NACK() \
do {\
if (tmp & (I2C_TIMEOUT | I2C_STAT_NACK)) {\
- REG(I2C_CON) = 0;\
- return(1);\
- }\
+ REG(&(i2c_base->i2c_con)) = 0;\
+ return 1;\
+ } \
} while (0)
+static struct i2c_regs *davinci_get_base(struct i2c_adapter *adap);
-static int wait_for_bus(void)
+static int wait_for_bus(struct i2c_adapter *adap)
{
+ struct i2c_regs *i2c_base = davinci_get_base(adap);
int stat, timeout;
- REG(I2C_STAT) = 0x;
+ REG(&(i2c_
[U-Boot] [PATCH v6 0/9] Add support for keystone2 SoC and K2HK EVM
This patch set add support for Keystone2 SoC and K2HK EVM. Change history: v6 - Moved arch_timer.c to arch/arm/cpu/armv7 as per comments - Added Acked-By Heiko to patch #6 - Fixed some minor white space issues. v5 - Rebased to v2014.04-rc3 - Replaced reg_rmw() with clrsetbits_le32() - i2c Makefile update to add davinci_i2c sorted - simplified spi_cs_is_valid() in davinci_spi driver v4 - Added multibus support in i2c driver. Tested only on Keystone - Added comments to fdt patch v3 - Seperated network driver patches from the original series and and is now a different set as there are outstanding issues to be discussed and sorted out. Also the original series is ready for merge to upstream IMO. - Review comments incorporated. Following are the major comments addressed - Added KBUILD target for u-boot-spi.gph - Added bootup and flashing instructions in README - Cleaned up manually replacing #define with #define - Cleaned up k2hk_evm.h include file to remove unnecessary options v2 - Review comments incorporated. Following are major comments addressed - split network driver to navigator driver + ethernet driver - replaced register base + offset implemenation with struct based register access implementation - Added Readme for NAND no subpage write option - re-use code for davinci i2c driver on keystone2 with updates - clock-k2hk.c merged to clock.c - currently keeping board specific getclk() command. See the thread for the rational. - Added update to davinci spi driver to re-use on keystone v1 - added separate patch for sorting tools/Makefile entries - reworked gpimage patch to allow more re-use across omapimage/gpimage - dropped patch related to ubifs file size - added keystone SoC and K2HK EVM support v0 - preparatory patch for keystone Murali Karicheri (5): tools: mkimage: add support for gpimage format NAND: DaVinci: allow forced disable of subpage writes i2c, davinci: move i2c_defs.h to the drivers/i2c directory spi: davinci: add support for multiple bus and chip select k2hk-evm: add configuration for spi1 and spi2 support Vitaly Andrianov (4): fdt: call ft_board_setup_ex() at the end of image_setup_libfdt() arm: add support for arch timer i2c, davinci: convert driver to new mutlibus/mutliadapter framework k2hk: add support for k2hk SOC and EVM Makefile | 10 + README |5 + arch/arm/cpu/arm926ejs/davinci/dm355.c |2 +- arch/arm/cpu/arm926ejs/davinci/dm365.c |2 +- arch/arm/cpu/arm926ejs/davinci/dm644x.c|2 +- arch/arm/cpu/arm926ejs/davinci/dm646x.c|2 +- arch/arm/cpu/armv7/Makefile|1 + arch/arm/cpu/armv7/arch_timer.c| 58 +++ arch/arm/cpu/armv7/keystone/Makefile | 16 + arch/arm/cpu/armv7/keystone/aemif.c| 71 arch/arm/cpu/armv7/keystone/clock.c| 318 arch/arm/cpu/armv7/keystone/cmd_clock.c| 124 ++ arch/arm/cpu/armv7/keystone/cmd_mon.c | 131 +++ arch/arm/cpu/armv7/keystone/ddr3.c | 69 arch/arm/cpu/armv7/keystone/init.c | 56 +++ arch/arm/cpu/armv7/keystone/msmc.c | 68 arch/arm/cpu/armv7/keystone/psc.c | 237 arch/arm/cpu/armv7/keystone/spl.c | 45 +++ arch/arm/include/asm/arch-davinci/i2c_defs.h | 71 +--- arch/arm/include/asm/arch-keystone/clock-k2hk.h| 109 ++ arch/arm/include/asm/arch-keystone/clock.h | 17 + arch/arm/include/asm/arch-keystone/clock_defs.h| 111 ++ arch/arm/include/asm/arch-keystone/emif_defs.h | 73 arch/arm/include/asm/arch-keystone/hardware-k2hk.h | 150 arch/arm/include/asm/arch-keystone/hardware.h | 175 + arch/arm/include/asm/arch-keystone/i2c_defs.h | 17 + arch/arm/include/asm/arch-keystone/nand_defs.h | 23 ++ arch/arm/include/asm/arch-keystone/psc_defs.h | 90 + arch/arm/include/asm/arch-keystone/spl.h | 12 + board/ti/k2hk_evm/Makefile |9 + board/ti/k2hk_evm/README | 122 ++ board/ti/k2hk_evm/board.c | 236 board/ti/k2hk_evm/ddr3.c | 269 + boards.cfg
[U-Boot] [PATCH v6 2/9] tools: mkimage: add support for gpimage format
This patch add support for gpimage format as a preparatory
patch for porting u-boot for keystone2 devices and is
based on omapimage format. It re-uses gph header to store the
size and loadaddr as done in omapimage.c
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
Acked-by: Tom Rini
---
common/image.c |1 +
include/image.h|1 +
tools/Makefile |2 +
tools/gpheader.h | 40 +++
tools/gpimage-common.c | 80 +
tools/gpimage.c| 77 +++
tools/imagetool.c |2 +
tools/imagetool.h |1 +
tools/omapimage.c | 104
tools/omapimage.h |5 ---
10 files changed, 220 insertions(+), 93 deletions(-)
create mode 100644 tools/gpheader.h
create mode 100644 tools/gpimage-common.c
create mode 100644 tools/gpimage.c
diff --git a/common/image.c b/common/image.c
index 9c6bec5..fcc5a9c 100644
--- a/common/image.c
+++ b/common/image.c
@@ -125,6 +125,7 @@ static const table_entry_t uimage_type[] = {
{ IH_TYPE_FILESYSTEM, "filesystem", "Filesystem Image", },
{ IH_TYPE_FIRMWARE, "firmware", "Firmware", },
{ IH_TYPE_FLATDT, "flat_dt","Flat Device Tree", },
+ { IH_TYPE_GPIMAGE,"gpimage","TI Keystone SPL Image",},
{ IH_TYPE_KERNEL, "kernel", "Kernel Image", },
{ IH_TYPE_KERNEL_NOLOAD, "kernel_noload", "Kernel Image (no
loading done)", },
{ IH_TYPE_KWBIMAGE, "kwbimage", "Kirkwood Boot Image",},
diff --git a/include/image.h b/include/image.h
index 6afd57b..8095bc8 100644
--- a/include/image.h
+++ b/include/image.h
@@ -215,6 +215,7 @@ struct lmb;
#define IH_TYPE_KERNEL_NOLOAD 14 /* OS Kernel Image, can run from any
load address */
#define IH_TYPE_PBLIMAGE 15 /* Freescale PBL Boot Image */
#define IH_TYPE_MXSIMAGE 16 /* Freescale MXSBoot Image */
+#define IH_TYPE_GPIMAGE17 /* TI Keystone GPHeader Image
*/
/*
* Compression Types
diff --git a/tools/Makefile b/tools/Makefile
index 097cc1d..911ad43 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -73,6 +73,8 @@ dumpimage-mkimage-objs := aisimage.o \
crc32.o \
default_image.o \
fit_image.o \
+ gpimage.o \
+ gpimage-common.o \
image-fit.o \
image-host.o \
image.o \
diff --git a/tools/gpheader.h b/tools/gpheader.h
new file mode 100644
index 000..63a28a2
--- /dev/null
+++ b/tools/gpheader.h
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2014
+ * Texas Instruments Incorporated
+ * Refactored common functions in to gpimage-common.c. Include this common
+ * header file
+ *
+ * (C) Copyright 2010
+ * Linaro LTD, www.linaro.org
+ * Author: John Rigby
+ * Based on TI's signGP.c
+ *
+ * (C) Copyright 2009
+ * Stefano Babic, DENX Software Engineering, sba...@denx.de.
+ *
+ * (C) Copyright 2008
+ * Marvell Semiconductor
+ * Written-by: Prafulla Wadaskar
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _GPIMAGE_H_
+#define _GPIMAGE_H_
+
+/* common headers for gpimage and omapimage formats */
+struct gp_header {
+ uint32_t size;
+ uint32_t load_addr;
+};
+#define GPIMAGE_HDR_SIZE (sizeof(struct gp_header))
+
+/* common functions across gpimage and omapimage handlers */
+int valid_gph_size(uint32_t size);
+int valid_gph_load_addr(uint32_t load_addr);
+int gph_verify_header(struct gp_header *gph, int be);
+void gph_print_header(const struct gp_header *gph, int be);
+void gph_set_header(struct gp_header *gph, uint32_t size, uint32_t load_addr,
+ int be);
+int gpimage_check_params(struct image_tool_params *params);
+#endif
diff --git a/tools/gpimage-common.c b/tools/gpimage-common.c
new file mode 100644
index 000..b343a3a
--- /dev/null
+++ b/tools/gpimage-common.c
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2014
+ * Texas Instruments Incorporated
+ * Refactored common functions in to gpimage-common.c.
+ *
+ * (C) Copyright 2010
+ * Linaro LTD, www.linaro.org
+ * Author: John Rigby
+ * Based on TI's signGP.c
+ *
+ * (C) Copyright 2009
+ * Stefano Babic, DENX Software Engineering, sba...@denx.de.
+ *
+ * (C) Copyright 2008
+ * Marvell Semiconductor
+ * Written-by: Prafulla Wadaskar
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include "imagetool.h"
+#include
+#include
+#include "gpheader.h"
+
+/* Helper to convert size and load_addr to big endian */
+void to_be32(uint32_t *gph_size, uint32_t *gph_load_addr)
+{
+ *gph_size = cpu_to_be32(*gph_size)
[U-Boot] [PATCH v6 1/9] fdt: call ft_board_setup_ex() at the end of image_setup_libfdt()
From: Vitaly Andrianov The keystone2 SOC requires to fix all 32 bit aliased addresses to their 36 physical format. This has to happen after all fdt nodes are added or modified. Signed-off-by: Vitaly Andrianov Signed-off-by: Murali Karicheri Acked-by: Tom Rini --- common/image-fdt.c|5 + include/fdt_support.h |7 +++ 2 files changed, 12 insertions(+) diff --git a/common/image-fdt.c b/common/image-fdt.c index a54a919..5d64009 100644 --- a/common/image-fdt.c +++ b/common/image-fdt.c @@ -487,5 +487,10 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob, if (!ft_verify_fdt(blob)) return -1; +#ifdef CONFIG_SOC_K2HK + if (IMAGE_OF_BOARD_SETUP) + ft_board_setup_ex(blob, gd->bd); +#endif + return 0; } diff --git a/include/fdt_support.h b/include/fdt_support.h index 9871e2f..15eba01 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -63,6 +63,13 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose); #endif void ft_board_setup(void *blob, bd_t *bd); +/* + * The keystone2 SOC requires all 32 bit aliased addresses to be converted + * to their 36 physical format. This has to happen after all fdt nodes + * are added or modified by the image_setup_libfdt(). The ft_board_setup_ex() + * called at the end of the image_setup_libfdt() is to do that convertion. + */ +void ft_board_setup_ex(void *blob, bd_t *bd); void ft_cpu_setup(void *blob, bd_t *bd); void ft_pci_setup(void *blob, bd_t *bd); -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 4/9] NAND: DaVinci: allow forced disable of subpage writes
This patch introduces a configurable mechanism to disable subpage writes in the DaVinci NAND driver. Signed-off-by: Vitaly Andrianov Signed-off-by: Murali Karicheri Acked-by: Tom Rini --- README |5 + drivers/mtd/nand/davinci_nand.c |3 +++ 2 files changed, 8 insertions(+) diff --git a/README b/README index 7cb7c4f..63c2dba 100644 --- a/README +++ b/README @@ -4486,6 +4486,11 @@ Low Level (hardware related) configuration options: - CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC: Enables the RTC32K OSC on AM33xx based plattforms +- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE + Option to disable subpage write in NAND driver + driver that uses this: + drivers/mtd/nand/davinci_nand.c + Freescale QE/FMAN Firmware Support: --- diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index 5b17d7b..75b03a7 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -609,6 +609,9 @@ void davinci_nand_init(struct nand_chip *nand) #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT nand->bbt_options |= NAND_BBT_USE_FLASH; #endif +#ifdef CONFIG_SYS_NAND_NO_SUBPAGE_WRITE + nand->options |= NAND_NO_SUBPAGE_WRITE; +#endif #ifdef CONFIG_SYS_NAND_HW_ECC nand->ecc.mode = NAND_ECC_HW; nand->ecc.size = 512; -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 5/9] i2c, davinci: move i2c_defs.h to the drivers/i2c directory
This patch moves the davinci i2c_defs.h file to drivers.i2c directory. It will allow to reuse the davinci_i2c driver for TI Keystone2 SOCs. Not used "git mv" command to move the file because small part of it with definitions specific for Davinci SOCs has to remain in the arch/arm/include/asm/arch-davinci. Signed-off-by: Vitaly Andrianov Signed-off-by: Murali Karicheri Acked-by: Tom Rini --- arch/arm/include/asm/arch-davinci/i2c_defs.h | 71 ++-- drivers/i2c/davinci_i2c.c|1 + drivers/i2c/davinci_i2c.h| 75 ++ 3 files changed, 79 insertions(+), 68 deletions(-) create mode 100644 drivers/i2c/davinci_i2c.h diff --git a/arch/arm/include/asm/arch-davinci/i2c_defs.h b/arch/arm/include/asm/arch-davinci/i2c_defs.h index c388dc0..06da894 100644 --- a/arch/arm/include/asm/arch-davinci/i2c_defs.h +++ b/arch/arm/include/asm/arch-davinci/i2c_defs.h @@ -1,16 +1,13 @@ /* - * (C) Copyright 2004 + * (C) Copyright 2004-2014 * Texas Instruments, * * Some changes copyright (C) 2007 Sergey Kubushyn * * SPDX-License-Identifier:GPL-2.0+ */ -#ifndef _DAVINCI_I2C_H_ -#define _DAVINCI_I2C_H_ - -#define I2C_WRITE 0 -#define I2C_READ 1 +#ifndef _I2C_DEFS_H_ +#define _I2C_DEFS_H_ #ifndef CONFIG_SOC_DA8XX #define I2C_BASE 0x01c21000 @@ -18,66 +15,4 @@ #define I2C_BASE 0x01c22000 #endif -#defineI2C_OA (I2C_BASE + 0x00) -#define I2C_IE (I2C_BASE + 0x04) -#define I2C_STAT (I2C_BASE + 0x08) -#define I2C_SCLL (I2C_BASE + 0x0c) -#define I2C_SCLH (I2C_BASE + 0x10) -#define I2C_CNT(I2C_BASE + 0x14) -#define I2C_DRR(I2C_BASE + 0x18) -#define I2C_SA (I2C_BASE + 0x1c) -#define I2C_DXR(I2C_BASE + 0x20) -#define I2C_CON(I2C_BASE + 0x24) -#define I2C_IV (I2C_BASE + 0x28) -#define I2C_PSC(I2C_BASE + 0x30) - -/* I2C masks */ - -/* I2C Interrupt Enable Register (I2C_IE): */ -#define I2C_IE_SCD_IE (1 << 5)/* Stop condition detect interrupt enable */ -#define I2C_IE_XRDY_IE (1 << 4)/* Transmit data ready interrupt enable */ -#define I2C_IE_RRDY_IE (1 << 3)/* Receive data ready interrupt enable */ -#define I2C_IE_ARDY_IE (1 << 2)/* Register access ready interrupt enable */ -#define I2C_IE_NACK_IE (1 << 1)/* No acknowledgment interrupt enable */ -#define I2C_IE_AL_IE (1 << 0)/* Arbitration lost interrupt enable */ - -/* I2C Status Register (I2C_STAT): */ - -#define I2C_STAT_BB(1 << 12) /* Bus busy */ -#define I2C_STAT_ROVR (1 << 11) /* Receive overrun */ -#define I2C_STAT_XUDF (1 << 10) /* Transmit underflow */ -#define I2C_STAT_AAS (1 << 9)/* Address as slave */ -#define I2C_STAT_SCD (1 << 5)/* Stop condition detect */ -#define I2C_STAT_XRDY (1 << 4)/* Transmit data ready */ -#define I2C_STAT_RRDY (1 << 3)/* Receive data ready */ -#define I2C_STAT_ARDY (1 << 2)/* Register access ready */ -#define I2C_STAT_NACK (1 << 1)/* No acknowledgment interrupt enable */ -#define I2C_STAT_AL(1 << 0)/* Arbitration lost interrupt enable */ - - -/* I2C Interrupt Code Register (I2C_INTCODE): */ - -#define I2C_INTCODE_MASK 7 -#define I2C_INTCODE_NONE 0 -#define I2C_INTCODE_AL 1 /* Arbitration lost */ -#define I2C_INTCODE_NAK2 /* No acknowledgement/general call */ -#define I2C_INTCODE_ARDY 3 /* Register access ready */ -#define I2C_INTCODE_RRDY 4 /* Rcv data ready */ -#define I2C_INTCODE_XRDY 5 /* Xmit data ready */ -#define I2C_INTCODE_SCD6 /* Stop condition detect */ - - -/* I2C Configuration Register (I2C_CON): */ - -#define I2C_CON_EN (1 << 5)/* I2C module enable */ -#define I2C_CON_STB(1 << 4)/* Start byte mode (master mode only) */ -#define I2C_CON_MST(1 << 10) /* Master/slave mode */ -#define I2C_CON_TRX(1 << 9)/* Transmitter/receiver mode (master mode only) */ -#define I2C_CON_XA (1 << 8)/* Expand address */ -#define I2C_CON_STP(1 << 11) /* Stop condition (master mode only) */ -#define I2C_CON_STT(1 << 13) /* Start condition (master mode only) */ -#define I2C_CON_FREE (1 << 14) /* Free run on emulation */ - -#define I2C_TIMEOUT0x /* Timeout mask for poll_i2c_irq() */ - #endif diff --git a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c index e56fe75..6e5260c 100644 --- a/drivers/i2c/davinci_i2c.c +++ b/drivers/i2c/davinci_i2c.c @@ -12,6 +12,7
[U-Boot] [PATCH v6 3/9] arm: add support for arch timer
From: Vitaly Andrianov
This patch add basic support for the architecture timer found on recent
ARMv7 based SoCs.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
---
arch/arm/cpu/armv7/Makefile |1 +
arch/arm/cpu/armv7/arch_timer.c | 58 +++
2 files changed, 59 insertions(+)
create mode 100644 arch/arm/cpu/armv7/arch_timer.c
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 119ebb3..ab869b1 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -25,6 +25,7 @@ endif
obj-$(CONFIG_KONA) += kona-common/
obj-$(CONFIG_OMAP_COMMON) += omap-common/
+obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
obj-$(CONFIG_TEGRA) += tegra-common/
ifneq (,$(filter s5pc1xx exynos,$(SOC)))
diff --git a/arch/arm/cpu/armv7/arch_timer.c b/arch/arm/cpu/armv7/arch_timer.c
new file mode 100644
index 000..0588e2b
--- /dev/null
+++ b/arch/arm/cpu/armv7/arch_timer.c
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated,
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int timer_init(void)
+{
+ gd->arch.tbl = 0;
+ gd->arch.tbu = 0;
+
+ gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ;
+
+ return 0;
+}
+
+unsigned long long get_ticks(void)
+{
+ ulong nowl, nowu;
+
+ asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (nowl), "=r" (nowu));
+
+ gd->arch.tbl = nowl;
+ gd->arch.tbu = nowu;
+
+ return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
+}
+
+
+ulong get_timer(ulong base)
+{
+ return lldiv(get_ticks(), gd->arch.timer_rate_hz) - base;
+}
+
+void __udelay(unsigned long usec)
+{
+ unsigned long long endtime;
+
+ endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz,
+ 1000UL);
+
+ endtime += get_ticks();
+
+ while (get_ticks() < endtime)
+ ;
+}
+
+ulong get_tbclk(void)
+{
+ return gd->arch.timer_rate_hz;
+}
--
1.7.9.5
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[U-Boot] [PATCH v6 9/9] k2hk-evm: add configuration for spi1 and spi2 support
currently only spi0 is enabled on k2hk evm. This configuration update is needed to enable spi1 and spi2. Signed-off-by: Murali Karicheri Acked-by: Tom Rini --- include/configs/k2hk_evm.h |9 + 1 file changed, 9 insertions(+) diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h index 9d0ba24..28a6d72 100644 --- a/include/configs/k2hk_evm.h +++ b/include/configs/k2hk_evm.h @@ -81,7 +81,16 @@ #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_DAVINCI_SPI +#define CONFIG_SYS_SPI0 #define CONFIG_SYS_SPI_BASE K2HK_SPI_BASE +#define CONFIG_SYS_SPI0_NUM_CS 4 +#define CONFIG_SYS_SPI1 +#define CONFIG_SYS_SPI1_BASEK2HK_SPI1_BASE +#define CONFIG_SYS_SPI1_NUM_CS 4 +#define CONFIG_SYS_SPI2 +#define CONFIG_SYS_SPI2_NUM_CS 4 +#define CONFIG_SYS_SPI2_BASEK2HK_SPI2_BASE +#define CONFIG_CMD_SPI #define CONFIG_SYS_SPI_CLK clk_get_rate(K2HK_LPSC_EMIF25_SPI) #define CONFIG_SF_DEFAULT_SPEED 3000 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 8/9] spi: davinci: add support for multiple bus and chip select
Currently davinci spi driver supports only bus 0 cs 0.
This patch allows driver to support bus 1 and bus 2 with
configurable number of chip selects. Also defaults are
selected in a way to avoid regression on other platforms
that uses davinci spi driver and has only one spi bus.
Signed-off-by: Rex Chang
Signed-off-by: Murali Karicheri
---
drivers/spi/davinci_spi.c | 49 ++---
drivers/spi/davinci_spi.h | 33 ++
2 files changed, 79 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index e3fb321..28fb3a2 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -32,7 +32,27 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned
int cs,
if (!ds)
return NULL;
- ds->regs = (struct davinci_spi_regs *)CONFIG_SYS_SPI_BASE;
+ ds->slave.bus = bus;
+ ds->slave.cs = cs;
+
+ switch (bus) {
+ case SPI0_BUS:
+ ds->regs = (struct davinci_spi_regs *)SPI0_BASE;
+ break;
+#ifdef CONFIG_SYS_SPI1
+ case SPI1_BUS:
+ ds->regs = (struct davinci_spi_regs *)SPI0_BASE;
+ break;
+#endif
+#ifdef CONFIG_SYS_SPI2
+ case SPI2_BUS:
+ ds->regs = (struct davinci_spi_regs *)SPI2_BASE;
+ break;
+#endif
+ default: /* Invalid bus number */
+ return NULL;
+ }
+
ds->freq = max_hz;
return &ds->slave;
@@ -59,7 +79,7 @@ int spi_claim_bus(struct spi_slave *slave)
writel(SPIGCR1_MASTER_MASK | SPIGCR1_CLKMOD_MASK, &ds->regs->gcr1);
/* CS, CLK, SIMO and SOMI are functional pins */
- writel((SPIPC0_EN0FUN_MASK | SPIPC0_CLKFUN_MASK |
+ writel(((1 << slave->cs) | SPIPC0_CLKFUN_MASK |
SPIPC0_DOFUN_MASK | SPIPC0_DIFUN_MASK), &ds->regs->pc0);
/* setup format */
@@ -264,7 +284,30 @@ out:
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
- return bus == 0 && cs == 0;
+ int ret = 0;
+
+ switch (bus) {
+ case SPI0_BUS:
+ if (cs < SPI0_NUM_CS)
+ ret = 1;
+ break;
+#ifdef CONFIG_SYS_SPI1
+ case SPI1_BUS:
+ if (cs < SPI1_NUM_CS)
+ ret = 1;
+ break;
+#endif
+#ifdef CONFIG_SYS_SPI2
+ case SPI2_BUS:
+ if (cs < SPI2_NUM_CS)
+ ret = 1;
+ break;
+#endif
+ default:
+ /* Invalid bus number. Do nothing */
+ break;
+ }
+ return ret;
}
void spi_cs_activate(struct spi_slave *slave)
diff --git a/drivers/spi/davinci_spi.h b/drivers/spi/davinci_spi.h
index 33f69b5..d4612d3 100644
--- a/drivers/spi/davinci_spi.h
+++ b/drivers/spi/davinci_spi.h
@@ -74,6 +74,39 @@ struct davinci_spi_regs {
/* SPIDEF */
#define SPIDEF_CSDEF0_MASK BIT(0)
+#define SPI0_BUS 0
+#define SPI0_BASE CONFIG_SYS_SPI_BASE
+/*
+ * Define default SPI0_NUM_CS as 1 for existing platforms that uses this
+ * driver. Platform can configure number of CS using CONFIG_SYS_SPI0_NUM_CS
+ * if more than one CS is supported and by defining CONFIG_SYS_SPI0.
+ */
+#ifndef CONFIG_SYS_SPI0
+#define SPI0_NUM_CS1
+#else
+#define SPI0_NUM_CSCONFIG_SYS_SPI0_NUM_CS
+#endif
+
+/*
+ * define CONFIG_SYS_SPI1 when platform has spi-1 device (bus #1) and
+ * CONFIG_SYS_SPI1_NUM_CS defines number of CS on this bus
+ */
+#ifdef CONFIG_SYS_SPI1
+#define SPI1_BUS 1
+#define SPI1_NUM_CSCONFIG_SYS_SPI1_NUM_CS
+#define SPI1_BASE CONFIG_SYS_SPI1_BASE
+#endif
+
+/*
+ * define CONFIG_SYS_SPI2 when platform has spi-2 device (bus #2) and
+ * CONFIG_SYS_SPI2_NUM_CS defines number of CS on this bus
+ */
+#ifdef CONFIG_SYS_SPI2
+#define SPI2_BUS 2
+#define SPI2_NUM_CSCONFIG_SYS_SPI2_NUM_CS
+#define SPI2_BASE CONFIG_SYS_SPI2_BASE
+#endif
+
struct davinci_spi_slave {
struct spi_slave slave;
struct davinci_spi_regs *regs;
--
1.7.9.5
___
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[U-Boot] [PATCH v4 0/2] Add keystone network driver
This patch set add support for keystone network driver.
Change history:
v4
- replaced reg_rmw() with clrsetbits_le32() and similar for clr/set
functions
v3
- Review comments against the previous version except phylib support.
I have responded to the original comment with issues that we see
when we added support for phylib. If this initial version can go
ASIS, please review and merge. We can address phylib support once
the issues are discussed and a proper resolution is agreed on.
v2/older (were part of "Add support for keystone2 SoC and K2HK EVM"
series)
- split network driver to navigator driver + ethernet
driver
Murali Karicheri (1):
keystone2: net: add keystone ethernet driver
Vitaly Andrianov (1):
keystone2: add keystone multicore navigator driver
arch/arm/cpu/armv7/keystone/Makefile |1 +
arch/arm/cpu/armv7/keystone/keystone_nav.c| 376 +++
arch/arm/include/asm/arch-keystone/emac_defs.h| 240 +++
arch/arm/include/asm/arch-keystone/keystone_nav.h | 193 ++
board/ti/k2hk_evm/board.c | 65 ++
drivers/net/Makefile |1 +
drivers/net/keystone_net.c| 717 +
include/configs/k2hk_evm.h| 35 +
8 files changed, 1628 insertions(+)
create mode 100644 arch/arm/cpu/armv7/keystone/keystone_nav.c
create mode 100644 arch/arm/include/asm/arch-keystone/emac_defs.h
create mode 100644 arch/arm/include/asm/arch-keystone/keystone_nav.h
create mode 100644 drivers/net/keystone_net.c
--
1.7.9.5
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[U-Boot] [PATCH v4 2/2] keystone2: net: add keystone ethernet driver
Ethernet driver configures the CPSW, SGMI and Phy and uses
the the Navigator APIs. The driver supports 4 Ethernet ports and
can work with only one port at a time.
Port configurations are defined in board.c.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
Signed-off-by: WingMan Kwok
---
arch/arm/include/asm/arch-keystone/emac_defs.h | 240
board/ti/k2hk_evm/board.c | 65 +++
drivers/net/Makefile |1 +
drivers/net/keystone_net.c | 717
include/configs/k2hk_evm.h | 35 ++
5 files changed, 1058 insertions(+)
create mode 100644 arch/arm/include/asm/arch-keystone/emac_defs.h
create mode 100644 drivers/net/keystone_net.c
diff --git a/arch/arm/include/asm/arch-keystone/emac_defs.h
b/arch/arm/include/asm/arch-keystone/emac_defs.h
new file mode 100644
index 000..0aa2f89
--- /dev/null
+++ b/arch/arm/include/asm/arch-keystone/emac_defs.h
@@ -0,0 +1,240 @@
+/*
+ * emac definitions for keystone2 devices
+ *
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated,
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _EMAC_DEFS_H_
+#define _EMAC_DEFS_H_
+
+#include
+#include
+
+#define DEVICE_REG32_R(a) readl(a)
+#define DEVICE_REG32_W(a, v)writel(v, a)
+
+#define EMAC_EMACSL_BASE_ADDR (KS2_PASS_BASE + 0x00090900)
+#define EMAC_MDIO_BASE_ADDR (KS2_PASS_BASE + 0x00090300)
+#define EMAC_SGMII_BASE_ADDR(KS2_PASS_BASE + 0x00090100)
+
+#define KEYSTONE2_EMAC_GIG_ENABLE
+
+#define MAC_ID_BASE_ADDR(KS2_DEVICE_STATE_CTRL_BASE + 0x110)
+
+#ifdef CONFIG_SOC_K2HK
+/* MDIO module input frequency */
+#define EMAC_MDIO_BUS_FREQ (clk_get_rate(pass_pll_clk))
+/* MDIO clock output frequency */
+#define EMAC_MDIO_CLOCK_FREQ100/* 1.0 MHz */
+#endif
+
+/* MII Status Register */
+#define MII_STATUS_REG 1
+#define MII_STATUS_LINK_MASK(0x4)
+
+/* Marvell 88E PHY ID */
+#define PHY_MARVELL_88E (0x01410cc0)
+
+#define MDIO_CONTROL_IDLE (0x8000)
+#define MDIO_CONTROL_ENABLE (0x4000)
+#define MDIO_CONTROL_FAULT_ENABLE (0x4)
+#define MDIO_CONTROL_FAULT (0x8)
+#define MDIO_USERACCESS0_GO (0x8000)
+#define MDIO_USERACCESS0_WRITE_READ (0x0)
+#define MDIO_USERACCESS0_WRITE_WRITE(0x4000)
+#define MDIO_USERACCESS0_ACK(0x2000)
+
+#define EMAC_MACCONTROL_MIIEN_ENABLE (0x20)
+#define EMAC_MACCONTROL_FULLDUPLEX_ENABLE (0x1)
+#define EMAC_MACCONTROL_GIGABIT_ENABLE (1 << 7)
+#define EMAC_MACCONTROL_GIGFORCE (1 << 17)
+#define EMAC_MACCONTROL_RMIISPEED_100 (1 << 15)
+
+#define EMAC_MIN_ETHERNET_PKT_SIZE 60
+
+struct mac_sl_cfg {
+ u_int32_t max_rx_len; /* Maximum receive packet length. */
+ u_int32_t ctl; /* Control bitfield */
+};
+
+/*
+ * Definition: Control bitfields used in the ctl field of hwGmacSlCfg_t
+ */
+#define GMACSL_RX_ENABLE_RCV_CONTROL_FRAMES (1 << 24)
+#define GMACSL_RX_ENABLE_RCV_SHORT_FRAMES (1 << 23)
+#define GMACSL_RX_ENABLE_RCV_ERROR_FRAMES (1 << 22)
+#define GMACSL_RX_ENABLE_EXT_CTL (1 << 18)
+#define GMACSL_RX_ENABLE_GIG_FORCE(1 << 17)
+#define GMACSL_RX_ENABLE_IFCTL_B (1 << 16)
+#define GMACSL_RX_ENABLE_IFCTL_A (1 << 15)
+#define GMACSL_RX_ENABLE_CMD_IDLE (1 << 11)
+#define GMACSL_TX_ENABLE_SHORT_GAP(1 << 10)
+#define GMACSL_ENABLE_GIG_MODE(1 << 7)
+#define GMACSL_TX_ENABLE_PACE (1 << 6)
+#define GMACSL_ENABLE (1 << 5)
+#define GMACSL_TX_ENABLE_FLOW_CTL (1 << 4)
+#define GMACSL_RX_ENABLE_FLOW_CTL (1 << 3)
+#define GMACSL_ENABLE_LOOPBACK(1 << 1)
+#define GMACSL_ENABLE_FULL_DUPLEX (1 << 0)
+
+/*
+ * DEFINTITION: function return values
+ */
+#define GMACSL_RET_OK0
+#define GMACSL_RET_INVALID_PORT -1
+#define GMACSL_RET_WARN_RESET_INCOMPLETE-2
+#define GMACSL_RET_WARN_MAXLEN_TOO_BIG -3
+#define GMACSL_RET_CONFIG_FAIL_RESET_ACTIVE -4
+
+/* Register offsets */
+#define CPGMACSL_REG_ID 0x00
+#define CPGMACSL_REG_CTL0x04
+#define CPGMACSL_REG_STATUS 0x08
+#define CPGMACSL_REG_RESET 0x0c
+#define CPGMACSL_REG_MAXLEN 0x10
+#define CPGMACSL_REG_BOFF 0x14
+#define CPGMACSL_REG_RX_PAUSE 0x18
+#define CPGMACSL_REG_TX_PAURSE 0x1c
+#define CPGMACSL_REG_EM_CTL 0x20
+#define CPGMACSL_REG_PRI0x24
+
+/* Soft reset register values */
+#define CPGMAC_REG_RESET_VAL_RESET_
[U-Boot] [PATCH v4 1/2] keystone2: add keystone multicore navigator driver
From: Vitaly Andrianov
Multicore navigator consists of Network Coprocessor (NetCP) and
Queue Manager sub system. More details on the hardware can
be obtained from the following links:-
Network Coprocessor: http://www.ti.com/lit/pdf/sprugz6
Multicore Navigator: http://www.ti.com/lit/pdf/sprugr9
Multicore navigator driver implements APIs to configure
the Queue Manager and NetCP Pkt DMA.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
Signed-off-by: WingMan Kwok
Acked-by: Tom Rini
---
arch/arm/cpu/armv7/keystone/Makefile |1 +
arch/arm/cpu/armv7/keystone/keystone_nav.c| 376 +
arch/arm/include/asm/arch-keystone/keystone_nav.h | 193 +++
3 files changed, 570 insertions(+)
create mode 100644 arch/arm/cpu/armv7/keystone/keystone_nav.c
create mode 100644 arch/arm/include/asm/arch-keystone/keystone_nav.h
diff --git a/arch/arm/cpu/armv7/keystone/Makefile
b/arch/arm/cpu/armv7/keystone/Makefile
index 7924cfa..7d0374b 100644
--- a/arch/arm/cpu/armv7/keystone/Makefile
+++ b/arch/arm/cpu/armv7/keystone/Makefile
@@ -11,6 +11,7 @@ obj-y += psc.o
obj-y += clock.o
obj-y += cmd_clock.o
obj-y += cmd_mon.o
+obj-y += keystone_nav.o
obj-y += msmc.o
obj-$(CONFIG_SPL_BUILD)+= spl.o
obj-y += ddr3.o
diff --git a/arch/arm/cpu/armv7/keystone/keystone_nav.c
b/arch/arm/cpu/armv7/keystone/keystone_nav.c
new file mode 100644
index 000..39d6f99
--- /dev/null
+++ b/arch/arm/cpu/armv7/keystone/keystone_nav.c
@@ -0,0 +1,376 @@
+/*
+ * Multicore Navigator driver for TI Keystone 2 devices.
+ *
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated,
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include
+#include
+#include
+
+static int soc_type =
+#ifdef CONFIG_SOC_K2HK
+ k2hk;
+#endif
+
+struct qm_config k2hk_qm_memmap = {
+ .stat_cfg = 0x02a4,
+ .queue = (struct qm_reg_queue *)0x02a8,
+ .mngr_vbusm = 0x23a8,
+ .i_lram = 0x0010,
+ .proxy = (struct qm_reg_queue *)0x02ac,
+ .status_ram = 0x02a06000,
+ .mngr_cfg = (struct qm_cfg_reg *)0x02a02000,
+ .intd_cfg = 0x02a0c000,
+ .desc_mem = (struct descr_mem_setup_reg *)0x02a03000,
+ .region_num = 64,
+ .pdsp_cmd = 0x02a2,
+ .pdsp_ctl = 0x02a0f000,
+ .pdsp_iram = 0x02a1,
+ .qpool_num = 4000,
+};
+
+/*
+ * We are going to use only one type of descriptors - host packet
+ * descriptors. We staticaly allocate memory for them here
+ */
+struct qm_host_desc desc_pool[HDESC_NUM] __aligned(sizeof(struct
qm_host_desc));
+
+static struct qm_config *qm_cfg;
+
+inline int num_of_desc_to_reg(int num_descr)
+{
+ int j, num;
+
+ for (j = 0, num = 32; j < 15; j++, num *= 2) {
+ if (num_descr <= num)
+ return j;
+ }
+
+ return 15;
+}
+
+static int _qm_init(struct qm_config *cfg)
+{
+ u32 j;
+
+ if (cfg == NULL)
+ return QM_ERR;
+
+ qm_cfg = cfg;
+
+ qm_cfg->mngr_cfg->link_ram_base0= qm_cfg->i_lram;
+ qm_cfg->mngr_cfg->link_ram_size0= HDESC_NUM * 8;
+ qm_cfg->mngr_cfg->link_ram_base1= 0;
+ qm_cfg->mngr_cfg->link_ram_size1= 0;
+ qm_cfg->mngr_cfg->link_ram_base2= 0;
+
+ qm_cfg->desc_mem[0].base_addr = (u32)desc_pool;
+ qm_cfg->desc_mem[0].start_idx = 0;
+ qm_cfg->desc_mem[0].desc_reg_size =
+ (((sizeof(struct qm_host_desc) >> 4) - 1) << 16) |
+ num_of_desc_to_reg(HDESC_NUM);
+
+ memset(desc_pool, 0, sizeof(desc_pool));
+ for (j = 0; j < HDESC_NUM; j++)
+ qm_push(&desc_pool[j], qm_cfg->qpool_num);
+
+ return QM_OK;
+}
+
+int qm_init(void)
+{
+ switch (soc_type) {
+ case k2hk:
+ return _qm_init(&k2hk_qm_memmap);
+ }
+
+ return QM_ERR;
+}
+
+void qm_close(void)
+{
+ u32 j;
+
+ if (qm_cfg == NULL)
+ return;
+
+ queue_close(qm_cfg->qpool_num);
+
+ qm_cfg->mngr_cfg->link_ram_base0= 0;
+ qm_cfg->mngr_cfg->link_ram_size0= 0;
+ qm_cfg->mngr_cfg->link_ram_base1= 0;
+ qm_cfg->mngr_cfg->link_ram_size1= 0;
+ qm_cfg->mngr_cfg->link_ram_base2= 0;
+
+ for (j = 0; j < qm_cfg->region_num; j++) {
+ qm_cfg->desc_mem[j].base_addr = 0;
+ qm_cfg->desc_mem[j].start_idx = 0;
+ qm_cfg->desc_mem[j].desc_reg_size = 0;
+ }
+
+ qm_cfg = NULL;
+}
+
+void qm_push(struct qm_host_desc *hd, u32 qnum)
+{
+ u32 regd;
+
+ if (!qm_cfg)
+ return;
+
+ cpu_to_bus((u32 *)hd, sizeof(struct qm_host_desc)/4);
+ regd = (u32)hd | ((sizeof(s
[U-Boot] [PATCH v5 2/9] tools: mkimage: add support for gpimage format
This patch add support for gpimage format as a preparatory
patch for porting u-boot for keystone2 devices and is
based on omapimage format. It re-uses gph header to store the
size and loadaddr as done in omapimage.c
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
Acked-by: Tom Rini
---
common/image.c |1 +
include/image.h|1 +
tools/Makefile |2 +
tools/gpheader.h | 40 +++
tools/gpimage-common.c | 80 +
tools/gpimage.c| 77 +++
tools/imagetool.c |2 +
tools/imagetool.h |1 +
tools/omapimage.c | 104
tools/omapimage.h |5 ---
10 files changed, 220 insertions(+), 93 deletions(-)
create mode 100644 tools/gpheader.h
create mode 100644 tools/gpimage-common.c
create mode 100644 tools/gpimage.c
diff --git a/common/image.c b/common/image.c
index 9c6bec5..fcc5a9c 100644
--- a/common/image.c
+++ b/common/image.c
@@ -125,6 +125,7 @@ static const table_entry_t uimage_type[] = {
{ IH_TYPE_FILESYSTEM, "filesystem", "Filesystem Image", },
{ IH_TYPE_FIRMWARE, "firmware", "Firmware", },
{ IH_TYPE_FLATDT, "flat_dt","Flat Device Tree", },
+ { IH_TYPE_GPIMAGE,"gpimage","TI Keystone SPL Image",},
{ IH_TYPE_KERNEL, "kernel", "Kernel Image", },
{ IH_TYPE_KERNEL_NOLOAD, "kernel_noload", "Kernel Image (no
loading done)", },
{ IH_TYPE_KWBIMAGE, "kwbimage", "Kirkwood Boot Image",},
diff --git a/include/image.h b/include/image.h
index 6afd57b..8095bc8 100644
--- a/include/image.h
+++ b/include/image.h
@@ -215,6 +215,7 @@ struct lmb;
#define IH_TYPE_KERNEL_NOLOAD 14 /* OS Kernel Image, can run from any
load address */
#define IH_TYPE_PBLIMAGE 15 /* Freescale PBL Boot Image */
#define IH_TYPE_MXSIMAGE 16 /* Freescale MXSBoot Image */
+#define IH_TYPE_GPIMAGE17 /* TI Keystone GPHeader Image
*/
/*
* Compression Types
diff --git a/tools/Makefile b/tools/Makefile
index 097cc1d..911ad43 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -73,6 +73,8 @@ dumpimage-mkimage-objs := aisimage.o \
crc32.o \
default_image.o \
fit_image.o \
+ gpimage.o \
+ gpimage-common.o \
image-fit.o \
image-host.o \
image.o \
diff --git a/tools/gpheader.h b/tools/gpheader.h
new file mode 100644
index 000..63a28a2
--- /dev/null
+++ b/tools/gpheader.h
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2014
+ * Texas Instruments Incorporated
+ * Refactored common functions in to gpimage-common.c. Include this common
+ * header file
+ *
+ * (C) Copyright 2010
+ * Linaro LTD, www.linaro.org
+ * Author: John Rigby
+ * Based on TI's signGP.c
+ *
+ * (C) Copyright 2009
+ * Stefano Babic, DENX Software Engineering, sba...@denx.de.
+ *
+ * (C) Copyright 2008
+ * Marvell Semiconductor
+ * Written-by: Prafulla Wadaskar
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _GPIMAGE_H_
+#define _GPIMAGE_H_
+
+/* common headers for gpimage and omapimage formats */
+struct gp_header {
+ uint32_t size;
+ uint32_t load_addr;
+};
+#define GPIMAGE_HDR_SIZE (sizeof(struct gp_header))
+
+/* common functions across gpimage and omapimage handlers */
+int valid_gph_size(uint32_t size);
+int valid_gph_load_addr(uint32_t load_addr);
+int gph_verify_header(struct gp_header *gph, int be);
+void gph_print_header(const struct gp_header *gph, int be);
+void gph_set_header(struct gp_header *gph, uint32_t size, uint32_t load_addr,
+ int be);
+int gpimage_check_params(struct image_tool_params *params);
+#endif
diff --git a/tools/gpimage-common.c b/tools/gpimage-common.c
new file mode 100644
index 000..b343a3a
--- /dev/null
+++ b/tools/gpimage-common.c
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2014
+ * Texas Instruments Incorporated
+ * Refactored common functions in to gpimage-common.c.
+ *
+ * (C) Copyright 2010
+ * Linaro LTD, www.linaro.org
+ * Author: John Rigby
+ * Based on TI's signGP.c
+ *
+ * (C) Copyright 2009
+ * Stefano Babic, DENX Software Engineering, sba...@denx.de.
+ *
+ * (C) Copyright 2008
+ * Marvell Semiconductor
+ * Written-by: Prafulla Wadaskar
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include "imagetool.h"
+#include
+#include
+#include "gpheader.h"
+
+/* Helper to convert size and load_addr to big endian */
+void to_be32(uint32_t *gph_size, uint32_t *gph_load_addr)
+{
+ *gph_size = cpu_to_be32(*gph_size)
[U-Boot] [PATCH v5 6/9] i2c, davinci: convert driver to new mutlibus/mutliadapter framework
From: Vitaly Andrianov
- add davinci driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
---
arch/arm/cpu/arm926ejs/davinci/dm355.c |2 +-
arch/arm/cpu/arm926ejs/davinci/dm365.c |2 +-
arch/arm/cpu/arm926ejs/davinci/dm644x.c |2 +-
arch/arm/cpu/arm926ejs/davinci/dm646x.c |2 +-
drivers/i2c/Makefile|2 +-
drivers/i2c/davinci_i2c.c | 401 ++-
drivers/i2c/davinci_i2c.h | 27 ++-
include/configs/cam_enc_4xx.h |8 +-
include/configs/da830evm.h |8 +-
include/configs/da850evm.h |8 +-
include/configs/davinci_dm355evm.h |8 +-
include/configs/davinci_dm355leopard.h |8 +-
include/configs/davinci_dm365evm.h |8 +-
include/configs/davinci_dm6467evm.h |8 +-
include/configs/davinci_dvevm.h |8 +-
include/configs/davinci_schmoogie.h |8 +-
include/configs/davinci_sffsdr.h|8 +-
include/configs/davinci_sonata.h|8 +-
include/configs/ea20.h |7 +-
include/configs/enbw_cmc.h |8 +-
20 files changed, 306 insertions(+), 235 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/dm355.c
b/arch/arm/cpu/arm926ejs/davinci/dm355.c
index 5f85162..f9550a1 100644
--- a/arch/arm/cpu/arm926ejs/davinci/dm355.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm355.c
@@ -19,7 +19,7 @@ void davinci_enable_uart0(void)
}
-#ifdef CONFIG_DRIVER_DAVINCI_I2C
+#ifdef CONFIG_SYS_I2C_DAVINCI
void davinci_enable_i2c(void)
{
lpsc_on(DAVINCI_LPSC_I2C);
diff --git a/arch/arm/cpu/arm926ejs/davinci/dm365.c
b/arch/arm/cpu/arm926ejs/davinci/dm365.c
index 0af2d02..f6ca527 100644
--- a/arch/arm/cpu/arm926ejs/davinci/dm365.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm365.c
@@ -12,7 +12,7 @@ void davinci_enable_uart0(void)
lpsc_on(DAVINCI_LPSC_UART0);
}
-#ifdef CONFIG_DRIVER_DAVINCI_I2C
+#ifdef CONFIG_SYS_I2C_DAVINCI
void davinci_enable_i2c(void)
{
lpsc_on(DAVINCI_LPSC_I2C);
diff --git a/arch/arm/cpu/arm926ejs/davinci/dm644x.c
b/arch/arm/cpu/arm926ejs/davinci/dm644x.c
index 788e578..c58e271 100644
--- a/arch/arm/cpu/arm926ejs/davinci/dm644x.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm644x.c
@@ -47,7 +47,7 @@ void davinci_enable_emac(void)
}
#endif
-#ifdef CONFIG_DRIVER_DAVINCI_I2C
+#ifdef CONFIG_SYS_I2C_DAVINCI
void davinci_enable_i2c(void)
{
lpsc_on(DAVINCI_LPSC_I2C);
diff --git a/arch/arm/cpu/arm926ejs/davinci/dm646x.c
b/arch/arm/cpu/arm926ejs/davinci/dm646x.c
index 86a508f..cfea830 100644
--- a/arch/arm/cpu/arm926ejs/davinci/dm646x.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm646x.c
@@ -18,7 +18,7 @@ void davinci_enable_emac(void)
}
#endif
-#ifdef CONFIG_DRIVER_DAVINCI_I2C
+#ifdef CONFIG_SYS_I2C_DAVINCI
void davinci_enable_i2c(void)
{
lpsc_on(DAVINCI_DM646X_LPSC_I2C);
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 36d5e5f..e33586d 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -6,7 +6,6 @@
#
obj-$(CONFIG_BFIN_TWI_I2C) += bfin-twi_i2c.o
-obj-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
obj-$(CONFIG_DW_I2C) += designware_i2c.o
obj-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
obj-$(CONFIG_I2C_MV) += mv_i2c.o
@@ -16,6 +15,7 @@ obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
obj-$(CONFIG_U8500_I2C) += u8500_i2c.o
obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o
+obj-$(CONFIG_SYS_I2C_DAVINCI) += davinci_i2c.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
diff --git a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c
index 6e5260c..9ca99c4 100644
--- a/drivers/i2c/davinci_i2c.c
+++ b/drivers/i2c/davinci_i2c.c
@@ -1,8 +1,9 @@
/*
* TI DaVinci (TMS320DM644x) I2C driver.
*
- * Copyright (C) 2007 Sergey Kubushyn
- *
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated,
+ * (C) Copyright 2007 Sergey Kubushyn
*
*
* SPDX-License-Identifier:GPL-2.0+
@@ -12,306 +13,372 @@
#include
#include
#include
+#include
#include "davinci_i2c.h"
#define CHECK_NACK() \
do {\
if (tmp & (I2C_TIMEOUT | I2C_STAT_NACK)) {\
- REG(I2C_CON) = 0;\
- return(1);\
- }\
+ REG(&(i2c_base->i2c_con)) = 0;\
+ return 1;\
+ } \
} while (0)
+static struct i2c_regs *davinci_get_base(struct i2c_adapter *adap);
-static int wait_for_bus(void)
+static int wait_for_bus(struct i2c_adapter *adap)
{
+ struct i2c_regs *i2c_base = davinci_get_base(adap);
int stat, timeout;
- REG(I2C_STAT) = 0x;
+ REG(&(i2c_base->i2c_stat)) = 0x
[U-Boot] [PATCH v5 0/9] Add support for keystone2 SoC and K2HK EVM
This patch set add support for Keystone2 SoC and K2HK EVM. Change history: v5 - Rebased to v2014.04-rc3 - Replaced reg_rmw() with clrsetbits_le32() - i2c Makefile update to add davinci_i2c sorted - simplified spi_cs_is_valid() in davinci_spi driver v4 - Added multibus support in i2c driver. Tested only on Keystone - Added comments to fdt patch v3 - Seperated network driver patches from the original series and and is now a different set as there are outstanding issues to be discussed and sorted out. Also the original series is ready for merge to upstream IMO. - Review comments incorporated. Following are the major comments addressed - Added KBUILD target for u-boot-spi.gph - Added bootup and flashing instructions in README - Cleaned up manually replacing #define with #define - Cleaned up k2hk_evm.h include file to remove unnecessary options v2 - Review comments incorporated. Following are major comments addressed - split network driver to navigator driver + ethernet driver - replaced register base + offset implemenation with struct based register access implementation - Added Readme for NAND no subpage write option - re-use code for davinci i2c driver on keystone2 with updates - clock-k2hk.c merged to clock.c - currently keeping board specific getclk() command. See the thread for the rational. - Added update to davinci spi driver to re-use on keystone v1 - added separate patch for sorting tools/Makefile entries - reworked gpimage patch to allow more re-use across omapimage/gpimage - dropped patch related to ubifs file size - added keystone SoC and K2HK EVM support v0 - preparatory patch for keystone Murali Karicheri (5): tools: mkimage: add support for gpimage format NAND: DaVinci: allow forced disable of subpage writes i2c, davinci: move i2c_defs.h to the drivers/i2c directory spi: davinci: add support for multiple bus and chip select k2hk-evm: add configuration for spi1 and spi2 support Vitaly Andrianov (4): fdt: call ft_board_setup_ex() at the end of image_setup_libfdt() arm: add support for arch timer i2c, davinci: convert driver to new mutlibus/mutliadapter framework k2hk: add support for k2hk SOC and EVM Makefile | 10 + README |5 + arch/arm/cpu/arm926ejs/davinci/dm355.c |2 +- arch/arm/cpu/arm926ejs/davinci/dm365.c |2 +- arch/arm/cpu/arm926ejs/davinci/dm644x.c|2 +- arch/arm/cpu/arm926ejs/davinci/dm646x.c|2 +- arch/arm/cpu/armv7/keystone/Makefile | 17 + arch/arm/cpu/armv7/keystone/aemif.c| 71 arch/arm/cpu/armv7/keystone/clock.c| 318 arch/arm/cpu/armv7/keystone/cmd_clock.c| 124 ++ arch/arm/cpu/armv7/keystone/cmd_mon.c | 131 +++ arch/arm/cpu/armv7/keystone/ddr3.c | 69 arch/arm/cpu/armv7/keystone/init.c | 56 +++ arch/arm/cpu/armv7/keystone/msmc.c | 68 arch/arm/cpu/armv7/keystone/psc.c | 238 arch/arm/cpu/armv7/keystone/spl.c | 45 +++ arch/arm/include/asm/arch-davinci/i2c_defs.h | 71 +--- arch/arm/include/asm/arch-keystone/clock-k2hk.h| 109 ++ arch/arm/include/asm/arch-keystone/clock.h | 17 + arch/arm/include/asm/arch-keystone/clock_defs.h| 111 ++ arch/arm/include/asm/arch-keystone/emif_defs.h | 73 arch/arm/include/asm/arch-keystone/hardware-k2hk.h | 150 arch/arm/include/asm/arch-keystone/hardware.h | 175 + arch/arm/include/asm/arch-keystone/i2c_defs.h | 17 + arch/arm/include/asm/arch-keystone/nand_defs.h | 23 ++ arch/arm/include/asm/arch-keystone/psc_defs.h | 90 + arch/arm/include/asm/arch-keystone/spl.h | 12 + arch/arm/lib/Makefile |1 + arch/arm/lib/arch_timer.c | 58 +++ board/ti/k2hk_evm/Makefile |9 + board/ti/k2hk_evm/README | 122 ++ board/ti/k2hk_evm/board.c | 236 board/ti/k2hk_evm/ddr3.c | 269 + boards.cfg |1 + common/image-fdt.c |5 + common/image.c |1 + drivers/i2c/Makefile
[U-Boot] [PATCH v5 8/9] spi: davinci: add support for multiple bus and chip select
Currently davinci spi driver supports only bus 0 cs 0.
This patch allows driver to support bus 1 and bus 2 with
configurable number of chip selects. Also defaults are
selected in a way to avoid regression on other platforms
that uses davinci spi driver and has only one spi bus.
Signed-off-by: Rex Chang
Signed-off-by: Murali Karicheri
Acked-by: Tom Rini
---
drivers/spi/davinci_spi.c | 49 ++---
drivers/spi/davinci_spi.h | 33 ++
2 files changed, 79 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index e3fb321..28fb3a2 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -32,7 +32,27 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned
int cs,
if (!ds)
return NULL;
- ds->regs = (struct davinci_spi_regs *)CONFIG_SYS_SPI_BASE;
+ ds->slave.bus = bus;
+ ds->slave.cs = cs;
+
+ switch (bus) {
+ case SPI0_BUS:
+ ds->regs = (struct davinci_spi_regs *)SPI0_BASE;
+ break;
+#ifdef CONFIG_SYS_SPI1
+ case SPI1_BUS:
+ ds->regs = (struct davinci_spi_regs *)SPI0_BASE;
+ break;
+#endif
+#ifdef CONFIG_SYS_SPI2
+ case SPI2_BUS:
+ ds->regs = (struct davinci_spi_regs *)SPI2_BASE;
+ break;
+#endif
+ default: /* Invalid bus number */
+ return NULL;
+ }
+
ds->freq = max_hz;
return &ds->slave;
@@ -59,7 +79,7 @@ int spi_claim_bus(struct spi_slave *slave)
writel(SPIGCR1_MASTER_MASK | SPIGCR1_CLKMOD_MASK, &ds->regs->gcr1);
/* CS, CLK, SIMO and SOMI are functional pins */
- writel((SPIPC0_EN0FUN_MASK | SPIPC0_CLKFUN_MASK |
+ writel(((1 << slave->cs) | SPIPC0_CLKFUN_MASK |
SPIPC0_DOFUN_MASK | SPIPC0_DIFUN_MASK), &ds->regs->pc0);
/* setup format */
@@ -264,7 +284,30 @@ out:
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
- return bus == 0 && cs == 0;
+ int ret = 0;
+
+ switch (bus) {
+ case SPI0_BUS:
+ if (cs < SPI0_NUM_CS)
+ ret = 1;
+ break;
+#ifdef CONFIG_SYS_SPI1
+ case SPI1_BUS:
+ if (cs < SPI1_NUM_CS)
+ ret = 1;
+ break;
+#endif
+#ifdef CONFIG_SYS_SPI2
+ case SPI2_BUS:
+ if (cs < SPI2_NUM_CS)
+ ret = 1;
+ break;
+#endif
+ default:
+ /* Invalid bus number. Do nothing */
+ break;
+ }
+ return ret;
}
void spi_cs_activate(struct spi_slave *slave)
diff --git a/drivers/spi/davinci_spi.h b/drivers/spi/davinci_spi.h
index 33f69b5..d4612d3 100644
--- a/drivers/spi/davinci_spi.h
+++ b/drivers/spi/davinci_spi.h
@@ -74,6 +74,39 @@ struct davinci_spi_regs {
/* SPIDEF */
#define SPIDEF_CSDEF0_MASK BIT(0)
+#define SPI0_BUS 0
+#define SPI0_BASE CONFIG_SYS_SPI_BASE
+/*
+ * Define default SPI0_NUM_CS as 1 for existing platforms that uses this
+ * driver. Platform can configure number of CS using CONFIG_SYS_SPI0_NUM_CS
+ * if more than one CS is supported and by defining CONFIG_SYS_SPI0.
+ */
+#ifndef CONFIG_SYS_SPI0
+#define SPI0_NUM_CS1
+#else
+#define SPI0_NUM_CSCONFIG_SYS_SPI0_NUM_CS
+#endif
+
+/*
+ * define CONFIG_SYS_SPI1 when platform has spi-1 device (bus #1) and
+ * CONFIG_SYS_SPI1_NUM_CS defines number of CS on this bus
+ */
+#ifdef CONFIG_SYS_SPI1
+#define SPI1_BUS 1
+#define SPI1_NUM_CSCONFIG_SYS_SPI1_NUM_CS
+#define SPI1_BASE CONFIG_SYS_SPI1_BASE
+#endif
+
+/*
+ * define CONFIG_SYS_SPI2 when platform has spi-2 device (bus #2) and
+ * CONFIG_SYS_SPI2_NUM_CS defines number of CS on this bus
+ */
+#ifdef CONFIG_SYS_SPI2
+#define SPI2_BUS 2
+#define SPI2_NUM_CSCONFIG_SYS_SPI2_NUM_CS
+#define SPI2_BASE CONFIG_SYS_SPI2_BASE
+#endif
+
struct davinci_spi_slave {
struct spi_slave slave;
struct davinci_spi_regs *regs;
--
1.7.9.5
___
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[U-Boot] [PATCH v5 1/9] fdt: call ft_board_setup_ex() at the end of image_setup_libfdt()
From: Vitaly Andrianov The keystone2 SOC requires to fix all 32 bit aliased addresses to their 36 physical format. This has to happen after all fdt nodes are added or modified. Signed-off-by: Vitaly Andrianov Signed-off-by: Murali Karicheri Acked-by: Tom Rini --- common/image-fdt.c|5 + include/fdt_support.h |7 +++ 2 files changed, 12 insertions(+) diff --git a/common/image-fdt.c b/common/image-fdt.c index a54a919..5d64009 100644 --- a/common/image-fdt.c +++ b/common/image-fdt.c @@ -487,5 +487,10 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob, if (!ft_verify_fdt(blob)) return -1; +#ifdef CONFIG_SOC_K2HK + if (IMAGE_OF_BOARD_SETUP) + ft_board_setup_ex(blob, gd->bd); +#endif + return 0; } diff --git a/include/fdt_support.h b/include/fdt_support.h index 9871e2f..15eba01 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -63,6 +63,13 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose); #endif void ft_board_setup(void *blob, bd_t *bd); +/* + * The keystone2 SOC requires all 32 bit aliased addresses to be converted + * to their 36 physical format. This has to happen after all fdt nodes + * are added or modified by the image_setup_libfdt(). The ft_board_setup_ex() + * called at the end of the image_setup_libfdt() is to do that convertion. + */ +void ft_board_setup_ex(void *blob, bd_t *bd); void ft_cpu_setup(void *blob, bd_t *bd); void ft_pci_setup(void *blob, bd_t *bd); -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 4/9] NAND: DaVinci: allow forced disable of subpage writes
This patch introduces a configurable mechanism to disable subpage writes in the DaVinci NAND driver. Signed-off-by: Vitaly Andrianov Signed-off-by: Murali Karicheri Acked-by: Tom Rini --- README |5 + drivers/mtd/nand/davinci_nand.c |3 +++ 2 files changed, 8 insertions(+) diff --git a/README b/README index 7cb7c4f..63c2dba 100644 --- a/README +++ b/README @@ -4486,6 +4486,11 @@ Low Level (hardware related) configuration options: - CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC: Enables the RTC32K OSC on AM33xx based plattforms +- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE + Option to disable subpage write in NAND driver + driver that uses this: + drivers/mtd/nand/davinci_nand.c + Freescale QE/FMAN Firmware Support: --- diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index 5b17d7b..75b03a7 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -609,6 +609,9 @@ void davinci_nand_init(struct nand_chip *nand) #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT nand->bbt_options |= NAND_BBT_USE_FLASH; #endif +#ifdef CONFIG_SYS_NAND_NO_SUBPAGE_WRITE + nand->options |= NAND_NO_SUBPAGE_WRITE; +#endif #ifdef CONFIG_SYS_NAND_HW_ECC nand->ecc.mode = NAND_ECC_HW; nand->ecc.size = 512; -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 5/9] i2c, davinci: move i2c_defs.h to the drivers/i2c directory
This patch moves the davinci i2c_defs.h file to drivers.i2c directory. It will allow to reuse the davinci_i2c driver for TI Keystone2 SOCs. Not used "git mv" command to move the file because small part of it with definitions specific for Davinci SOCs has to remain in the arch/arm/include/asm/arch-davinci. Signed-off-by: Vitaly Andrianov Signed-off-by: Murali Karicheri Acked-by: Tom Rini --- arch/arm/include/asm/arch-davinci/i2c_defs.h | 71 ++-- drivers/i2c/davinci_i2c.c|1 + drivers/i2c/davinci_i2c.h| 75 ++ 3 files changed, 79 insertions(+), 68 deletions(-) create mode 100644 drivers/i2c/davinci_i2c.h diff --git a/arch/arm/include/asm/arch-davinci/i2c_defs.h b/arch/arm/include/asm/arch-davinci/i2c_defs.h index c388dc0..06da894 100644 --- a/arch/arm/include/asm/arch-davinci/i2c_defs.h +++ b/arch/arm/include/asm/arch-davinci/i2c_defs.h @@ -1,16 +1,13 @@ /* - * (C) Copyright 2004 + * (C) Copyright 2004-2014 * Texas Instruments, * * Some changes copyright (C) 2007 Sergey Kubushyn * * SPDX-License-Identifier:GPL-2.0+ */ -#ifndef _DAVINCI_I2C_H_ -#define _DAVINCI_I2C_H_ - -#define I2C_WRITE 0 -#define I2C_READ 1 +#ifndef _I2C_DEFS_H_ +#define _I2C_DEFS_H_ #ifndef CONFIG_SOC_DA8XX #define I2C_BASE 0x01c21000 @@ -18,66 +15,4 @@ #define I2C_BASE 0x01c22000 #endif -#defineI2C_OA (I2C_BASE + 0x00) -#define I2C_IE (I2C_BASE + 0x04) -#define I2C_STAT (I2C_BASE + 0x08) -#define I2C_SCLL (I2C_BASE + 0x0c) -#define I2C_SCLH (I2C_BASE + 0x10) -#define I2C_CNT(I2C_BASE + 0x14) -#define I2C_DRR(I2C_BASE + 0x18) -#define I2C_SA (I2C_BASE + 0x1c) -#define I2C_DXR(I2C_BASE + 0x20) -#define I2C_CON(I2C_BASE + 0x24) -#define I2C_IV (I2C_BASE + 0x28) -#define I2C_PSC(I2C_BASE + 0x30) - -/* I2C masks */ - -/* I2C Interrupt Enable Register (I2C_IE): */ -#define I2C_IE_SCD_IE (1 << 5)/* Stop condition detect interrupt enable */ -#define I2C_IE_XRDY_IE (1 << 4)/* Transmit data ready interrupt enable */ -#define I2C_IE_RRDY_IE (1 << 3)/* Receive data ready interrupt enable */ -#define I2C_IE_ARDY_IE (1 << 2)/* Register access ready interrupt enable */ -#define I2C_IE_NACK_IE (1 << 1)/* No acknowledgment interrupt enable */ -#define I2C_IE_AL_IE (1 << 0)/* Arbitration lost interrupt enable */ - -/* I2C Status Register (I2C_STAT): */ - -#define I2C_STAT_BB(1 << 12) /* Bus busy */ -#define I2C_STAT_ROVR (1 << 11) /* Receive overrun */ -#define I2C_STAT_XUDF (1 << 10) /* Transmit underflow */ -#define I2C_STAT_AAS (1 << 9)/* Address as slave */ -#define I2C_STAT_SCD (1 << 5)/* Stop condition detect */ -#define I2C_STAT_XRDY (1 << 4)/* Transmit data ready */ -#define I2C_STAT_RRDY (1 << 3)/* Receive data ready */ -#define I2C_STAT_ARDY (1 << 2)/* Register access ready */ -#define I2C_STAT_NACK (1 << 1)/* No acknowledgment interrupt enable */ -#define I2C_STAT_AL(1 << 0)/* Arbitration lost interrupt enable */ - - -/* I2C Interrupt Code Register (I2C_INTCODE): */ - -#define I2C_INTCODE_MASK 7 -#define I2C_INTCODE_NONE 0 -#define I2C_INTCODE_AL 1 /* Arbitration lost */ -#define I2C_INTCODE_NAK2 /* No acknowledgement/general call */ -#define I2C_INTCODE_ARDY 3 /* Register access ready */ -#define I2C_INTCODE_RRDY 4 /* Rcv data ready */ -#define I2C_INTCODE_XRDY 5 /* Xmit data ready */ -#define I2C_INTCODE_SCD6 /* Stop condition detect */ - - -/* I2C Configuration Register (I2C_CON): */ - -#define I2C_CON_EN (1 << 5)/* I2C module enable */ -#define I2C_CON_STB(1 << 4)/* Start byte mode (master mode only) */ -#define I2C_CON_MST(1 << 10) /* Master/slave mode */ -#define I2C_CON_TRX(1 << 9)/* Transmitter/receiver mode (master mode only) */ -#define I2C_CON_XA (1 << 8)/* Expand address */ -#define I2C_CON_STP(1 << 11) /* Stop condition (master mode only) */ -#define I2C_CON_STT(1 << 13) /* Start condition (master mode only) */ -#define I2C_CON_FREE (1 << 14) /* Free run on emulation */ - -#define I2C_TIMEOUT0x /* Timeout mask for poll_i2c_irq() */ - #endif diff --git a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c index e56fe75..6e5260c 100644 --- a/drivers/i2c/davinci_i2c.c +++ b/drivers/i2c/davinci_i2c.c @@ -12,6 +12,7
[U-Boot] [PATCH v5 9/9] k2hk-evm: add configuration for spi1 and spi2 support
currently only spi0 is enabled on k2hk evm. This configuration update is needed to enable spi1 and spi2. Signed-off-by: Murali Karicheri Acked-by: Tom Rini --- include/configs/k2hk_evm.h |9 + 1 file changed, 9 insertions(+) diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h index 9d0ba24..28a6d72 100644 --- a/include/configs/k2hk_evm.h +++ b/include/configs/k2hk_evm.h @@ -81,7 +81,16 @@ #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_DAVINCI_SPI +#define CONFIG_SYS_SPI0 #define CONFIG_SYS_SPI_BASE K2HK_SPI_BASE +#define CONFIG_SYS_SPI0_NUM_CS 4 +#define CONFIG_SYS_SPI1 +#define CONFIG_SYS_SPI1_BASEK2HK_SPI1_BASE +#define CONFIG_SYS_SPI1_NUM_CS 4 +#define CONFIG_SYS_SPI2 +#define CONFIG_SYS_SPI2_NUM_CS 4 +#define CONFIG_SYS_SPI2_BASEK2HK_SPI2_BASE +#define CONFIG_CMD_SPI #define CONFIG_SYS_SPI_CLK clk_get_rate(K2HK_LPSC_EMIF25_SPI) #define CONFIG_SF_DEFAULT_SPEED 3000 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 3/9] arm: add support for arch timer
From: Vitaly Andrianov
This patch add basic support for the architecture timer found on recent
ARMv7 based SoCs.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
Acked-by: Tom Rini
---
arch/arm/lib/Makefile |1 +
arch/arm/lib/arch_timer.c | 58 +
2 files changed, 59 insertions(+)
create mode 100644 arch/arm/lib/arch_timer.c
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 9fc81cd..5860814 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o
else
obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
endif
+obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
obj-y += sections.o
ifdef CONFIG_ARM64
diff --git a/arch/arm/lib/arch_timer.c b/arch/arm/lib/arch_timer.c
new file mode 100644
index 000..0588e2b
--- /dev/null
+++ b/arch/arm/lib/arch_timer.c
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated,
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int timer_init(void)
+{
+ gd->arch.tbl = 0;
+ gd->arch.tbu = 0;
+
+ gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ;
+
+ return 0;
+}
+
+unsigned long long get_ticks(void)
+{
+ ulong nowl, nowu;
+
+ asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (nowl), "=r" (nowu));
+
+ gd->arch.tbl = nowl;
+ gd->arch.tbu = nowu;
+
+ return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
+}
+
+
+ulong get_timer(ulong base)
+{
+ return lldiv(get_ticks(), gd->arch.timer_rate_hz) - base;
+}
+
+void __udelay(unsigned long usec)
+{
+ unsigned long long endtime;
+
+ endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz,
+ 1000UL);
+
+ endtime += get_ticks();
+
+ while (get_ticks() < endtime)
+ ;
+}
+
+ulong get_tbclk(void)
+{
+ return gd->arch.timer_rate_hz;
+}
--
1.7.9.5
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[U-Boot] [PATCH v4 0/9] Add support for keystone2 SoC and K2HK EVM
*** BLURB HERE *** Murali Karicheri (5): tools: mkimage: add support for gpimage format NAND: DaVinci: allow forced disable of subpage writes i2c, davinci: move i2c_defs.h to the drivers/i2c directory spi: davinci: add support for multiple bus and chip select k2hk-evm: add configuration for spi1 and spi2 support Vitaly Andrianov (4): fdt: call ft_board_setup_ex() at the end of image_setup_libfdt() arm: add support for arch timer i2c, davinci: convert driver to new mutlibus/mutliadapter framework k2hk: add support for k2hk SOC and EVM Makefile | 10 + README |5 + arch/arm/cpu/arm926ejs/davinci/dm355.c |2 +- arch/arm/cpu/arm926ejs/davinci/dm365.c |2 +- arch/arm/cpu/arm926ejs/davinci/dm644x.c|2 +- arch/arm/cpu/arm926ejs/davinci/dm646x.c|2 +- arch/arm/cpu/armv7/keystone/Makefile | 17 + arch/arm/cpu/armv7/keystone/aemif.c| 71 arch/arm/cpu/armv7/keystone/clock.c| 318 arch/arm/cpu/armv7/keystone/cmd_clock.c| 124 ++ arch/arm/cpu/armv7/keystone/cmd_mon.c | 131 +++ arch/arm/cpu/armv7/keystone/ddr3.c | 69 arch/arm/cpu/armv7/keystone/init.c | 56 +++ arch/arm/cpu/armv7/keystone/msmc.c | 68 arch/arm/cpu/armv7/keystone/psc.c | 238 arch/arm/cpu/armv7/keystone/spl.c | 45 +++ arch/arm/include/asm/arch-davinci/i2c_defs.h | 71 +--- arch/arm/include/asm/arch-keystone/clock-k2hk.h| 109 ++ arch/arm/include/asm/arch-keystone/clock.h | 17 + arch/arm/include/asm/arch-keystone/clock_defs.h| 121 ++ arch/arm/include/asm/arch-keystone/emif_defs.h | 73 arch/arm/include/asm/arch-keystone/hardware-k2hk.h | 150 arch/arm/include/asm/arch-keystone/hardware.h | 175 + arch/arm/include/asm/arch-keystone/i2c_defs.h | 17 + arch/arm/include/asm/arch-keystone/nand_defs.h | 25 ++ arch/arm/include/asm/arch-keystone/psc_defs.h | 90 + arch/arm/include/asm/arch-keystone/spl.h | 12 + arch/arm/lib/Makefile |1 + arch/arm/lib/arch_timer.c | 58 +++ board/ti/k2hk_evm/Makefile |9 + board/ti/k2hk_evm/README | 122 ++ board/ti/k2hk_evm/board.c | 236 board/ti/k2hk_evm/ddr3.c | 269 + boards.cfg |1 + common/image-fdt.c |5 + common/image.c |1 + drivers/i2c/Makefile |2 +- drivers/i2c/davinci_i2c.c | 402 drivers/i2c/davinci_i2c.h | 78 drivers/mtd/nand/davinci_nand.c|3 + drivers/serial/ns16550.c |8 + drivers/spi/davinci_spi.c | 60 ++- drivers/spi/davinci_spi.h | 33 ++ include/configs/cam_enc_4xx.h |8 +- include/configs/da830evm.h |8 +- include/configs/da850evm.h |8 +- include/configs/davinci_dm355evm.h |8 +- include/configs/davinci_dm355leopard.h |8 +- include/configs/davinci_dm365evm.h |8 +- include/configs/davinci_dm6467evm.h|8 +- include/configs/davinci_dvevm.h|8 +- include/configs/davinci_schmoogie.h|8 +- include/configs/davinci_sffsdr.h |8 +- include/configs/davinci_sonata.h |8 +- include/configs/ea20.h |6 +- include/configs/enbw_cmc.h |8 +- include/configs/k2hk_evm.h | 221 +++ include/fdt_support.h |7 + include/image.h|1 + tools/Makefile |2 + tools/gpheader.h | 40 ++ tools/gpimage-common.c | 80 tools/gpimage.c| 77 tools/imagetool.c |2 + tools/imagetool.h |1 + tools/omapimage.c | 104 + tools/omapimage.h |5 - 67 files changed, 3563 insertions(+), 387 deletions(-) create mode 100644 arch/arm/cpu/armv7/keystone/Makefile create mode 100644 arch/arm/cpu/armv7/keystone/aemif.c
