Hi all,
A bit of a picky question:
The wiki mentions Ubuntu 12.04 and RHEL 6 as compatible with ISE 14. Does
anyone know of any other linuxes that have worked with ISE 14?
More specifically, has anyone tried with Ubuntu 13.04 or Fedora 18 or 19?
-Alex
Hi all,
I've noticed that some of my models experience intermittent time outs on
shared bram reads with ROACH 1. Has anyone else seen anything like this?
-Alex
Hi all,
I was designing a ROACH based data capture model and wondered if anyone
could tell me if a DRAM based snapshot block can clock in a 32 bit data
word on every clock at 200 MHz.
In the event this can't be done, are there any premade solutions in the
libraries for buffering a DRAM with a bra
Hi all,
I wrote small pure-python kactp client class. It imitates most of the
behavior of the corr.katcp_wrapper.FpgaClient class, but exists in a single
standalone file (attached) and is compatible with python 2.4 and most
operating systems. It probably isn't a true KATCP client implementation,
b
Hi all,
This has probably been asked before, but is there a bidirectional GPIO
yellow block for ROACH 1?
-Alex
Hi all,
I have a yellowblock for an ADC (made by someone else--I don't know how to
write yellowblocks) meant to clock the design off adc0clk.
Designs using this yellowblock work fine with ISE 11, but with ISE 14 they
manage to get through compilation successfully, but when running don't seem
to a
() on your design (which
> supposedly brings all the old system generator blocks up to date)?
> Which version are you going from / to -- 11.1 -> 14.7, or some other
> combination?
> Any suspicious warnings during the compile process?
>
> Cheers,
> Jack
>
> On 5 June 201
g issue around 1-2
> years ago.
>
> Maybe your yellow block makes use of this bus?
>
> Regards,
> Simon
>
>
> On 06/05/2014 03:07 PM, Alex Zahn wrote:
>
> Hi all,
>
> A progress update:
>
> I tried to compile a very simple model using the problematic ye
lem.
> In your log file there is no mention in the timing constraints for the
> adc clock. And at the beginning there is a lot of unconnected inputs and
> outputs which could optimize out the adc altogether.
> Hope this helps.
> Kim Guzzino
>
>
>
> On Thu, 2014-06-05 at 15:45 -0700
hat is not in the main casper repositories?
>
> Jack
>
> On 5 June 2014 16:38, Alex Zahn wrote:
> > Thanks for the suggestions.
> >
> > I have these exact pcores. I got them from
> >
> https://casper.berkeley.edu/wiki/MSSGE_Setup_with_Xilinx_14.x_and_Matl
but I was hoping someone could tell me whether or not
in theory such a setup should pass a clock to the FPGA.
Does anyone have a recommendation for a yellowblock to try this out with if
it ought to work?
-Alex
On Thu, Jun 5, 2014 at 5:14 PM, Alex Zahn wrote:
> Hi Jack,
>
> I don&#
Thanks!
>If you are just keen to debug something, I'd suggest using some
>socat/netcat/tcpproxy trickery to proxy port 7147 to the roach - so
>pretend that some PC is the roach, run the proxy on it where it
>forwards and logs katcp commands. The katcp commands run over a single
>TCP/IP port...
I'
I've been trying to get all the mssge toolflow stuff running on a new SL
5.8 machine. Everything works except that compilation fails at xst
synthesis for even the simplest designs with a lot of complaints from glibc.
A while back there was a thread describing some very similar issues. I
believe it
I'm not sure how to force a dynamically linked program to use compat-glibc
instead of the default glibc...maybe some convoluted chroot trickery?
In the meantime, I found an old source rpm for glibc 2.5-65. As soon as a I
finish building and installing it I'll let everyone know how it goes. If it
w
It looks like rolling back to the rebuilt glibc 2.5-65 rpms worked. It's
too early to tell if I broke anything on our system, but everything, ISE 11
included, appears to be in good working order. What system damage lurks
unseen, only time will tell...
The rpms for RHEL5 (compiled on a Scientific L
it numbers in a single
clock with a clock rate of 200 MHz? I would test this on my ROACH out to
find out, but I'm away from lab for a while, and thus rendered rather
helpless for the time being.
Unrelated, is there any online documentation on the new snapshot block?
-Alex Zahn
rements, memory controllers and the like which would all be
> needed in a practical design.
>
> Jason
>
> On 18 Sep 2012, at 05:20, Alex Zahn wrote:
>
> > I've been browsing the xilinx literature, but I just can't seem to get
> any idea how long one can usuall
Do you know what version of glibc you have? The default on RHEL 5.8 is too
new for use with ISE 11.
-Alex
On Mon, Oct 8, 2012 at 2:24 PM, Ricardo Finger wrote:
> Dear Casperites,
>
> I am trying to make a Centos 5.8 64bit / Matlab2009b / ISE 11.4 /
> glibc-2.5 to work. I followed the steps of t
and latest version
>
> so it seem i am working with 2.5, which it seems to be the latest
> version in the repository I have.
> is it too new?
>
> I tried:
> yum downgrade glibc
> but it failed with a missing dependency error.
>
> Ricardo.
>
>
> On Mon, Oct 8
t@suseradio glibc-2.5-65.el5.x86_64.tar.gz_FILES]# rpm -Uvh
> --oldpackage *.rpm
> warning: glibc-2.5-65.src.rpm: Header V3 DSA signature: NOKEY, key ID 192a7d7d
> error: Failed dependencies:
> glibc-common = 2.5-81.el5_8.7 is needed by (installed)
> glibc-2.5-81.el5_8.7.i686
&g
e from package
> glibc-headers-2.5-65.x86_64
> file /usr/include/sys/ucontext.h from install of
> glibc-headers-2.5-65.i3
>
> is it bad?
>
>
> On Wed, Oct 10, 2012 at 5:28 PM, Alex Zahn wrote:
> > It looks like you tried to install the x86_64 and src rpm&#x
Hi all,
I wanted to make a variant of an existing yellow block that we have (the
modification amounts to changing a single parameter in the verilog code).
To do this, I made copies of all the files in xps_library and xps_lib
pertaining to the yellow block and replaced every instance of the old nam
> block mask script. If you run the mask script manually on your new yellow
> block from the matlab command line, if it fails, it should at least tell
> you something useful.
>
>
> On 14 November 2012 09:59, Alex Zahn wrote:
>
>> Hi all,
>>
>> I wanted to make a v
Does anyone have any input on trying to use the GPIO A and B headers for
very simple inter-ROACH direct FPGA to FPGA communication? I'm know that
ROACH supports this sort of thing using 10 gbe, but for conveying trigger
pulses, this (to my rather casper-naive intuition) seems simpler and
cheaper, w
Thanks for the responses!
Is there a convenient way to get around the unidirectional IO restriction
on ROACH?
-Alex
On Fri, Mar 8, 2013 at 1:27 AM, Andrea Mattana wrote:
> We have used at least as output signals where we have connected
> additional LED, but never used as input trigger.
>
> And
Does anyone know where to order bare GPIO ribbons and connectors for ROACH
GPIO? This is surprisingly hard to find...
-Alex
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