From: Huisong Li
This patch supports the query of the link flow control parameter
on a port.
The command format is as follows:
show port flow_ctrl
Signed-off-by: Huisong Li
Signed-off-by: Min Hu (Connor)
---
app/test-pmd/cmdline.c | 83 +
doc
On Tue, Apr 13, 2021 at 01:52:26PM +0200, Thomas Monjalon wrote:
> 13/04/2021 22:05, Wenwu Ma:
> > Amount of allocated memory was not enough for mempool
> > which cause buffer overflow when access fields of mempool
> > private structure in the rte_pktmbuf_priv_size function.
>
> Was it causing the
From: Huisong Li
This patch adds link autoneg status display in port_infos_display().
Signed-off-by: Huisong Li
Signed-off-by: Min Hu (Connor)
---
app/test-pmd/config.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index 40b2b29..0dd6a6f 1
Kindest regards,
Raslan Darawsheh
> -Original Message-
> From: Ferruh Yigit
> Sent: Wednesday, April 14, 2021 3:17 PM
> To: Ori Kam ; Raslan Darawsheh ;
> dev@dpdk.org; andrew.rybche...@oktetlabs.ru
> Cc: ivan.ma...@oktetlabs.ru; ying.a.w...@intel.com;
> olivier.m...@6wind.com; Slava O
Hi,
> -Original Message-
> From: Michael Baum
> Sent: Monday, April 12, 2021 9:32 AM
> To: dev@dpdk.org
> Cc: Matan Azrad ; Raslan Darawsheh
> ; Slava Ovsiienko
> Subject: [PATCH v2 0/6] net/mlx5: reduce Tx datapath compile time
>
> The mlx5_rxtx.c file contains a lot of Tx burst functi
Adding support for IPv4 lookaside IPsec transport mode.
Signed-off-by: Tejasree Kondoj
Acked-by: Akhil Goyal
---
doc/guides/cryptodevs/octeontx2.rst | 1 +
doc/guides/rel_notes/release_21_05.rst| 2 +
drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 7 +-
drivers/crypto/o
Adding lookaside IPsec UDP encapsulation support
for NAT traversal.
Application has to add udp-encap option to sa config file
to enable UDP encapsulation on the SA.
Signed-off-by: Tejasree Kondoj
Acked-by: Akhil Goyal
---
doc/guides/rel_notes/release_21_05.rst | 5 +++
doc/guides/sample_app_
Adding UDP encapsulation support for IPsec in
lookaside protocol mode.
Signed-off-by: Tejasree Kondoj
Acked-by: Akhil Goyal
---
doc/guides/cryptodevs/octeontx2.rst | 1 +
doc/guides/rel_notes/release_21_05.rst| 2 +
drivers/crypto/octeontx2/otx2_cryptodev_sec.c | 59
This series adds lookaside IPsec UDP encapsulation and
transport mode support.
The functionality has been tested with ipsec-secgw application
running in lookaside protocol offload mode.
v4:
* Fixed ESP_IN_UDP macro and moved it to ipsec-secgw application
v3:
* Supported UDP encapsulation for IPv6
> -Original Message-
> From: Ferruh Yigit
> Sent: Monday, April 12, 2021 8:46 PM
> To: Li, Xiaoyun ; Yu, DapengX
> ; Zhang, Qi Z
> Cc: dev@dpdk.org; sta...@dpdk.org
> Subject: Re: [dpdk-stable] [PATCH] app/testpmd: fix queue Rx and Tx offload
> reconfig cmd
>
> On 4/12/2021 3:21 AM, Li
The value in "/sys/.../cpuinfo_cur_freq" may not be exactly the
same as what was set. For example, if "240" is written to
"/sys/.../cpufreq/scaling_setspeed" to set the frequency, then the
value in "/sys/.../cpuinfo_cur_freq" may be "2401222". So need to
round the value.
Fixes: ed7c51a6a680 ("
For some platforms the newly-set frequency may not be effective
immediately. If we didn't get the right value from cpuinfo_cur_freq
immediately, add 10ms delay each time before rechecking until
timeout.
>From our test, for some arm platforms, it requires up to 700ms when
going from a minimum to a
v5:
abort the patch about checking -ENOTSUP in turbo test.
Richael Zhuang (2):
test/power: add delay before checking cpuinfo cur freq
test/power: round cpuinfo cur freq value in cpufreq autotest
app/test/test_power_cpufreq.c | 41 ++-
1 file changed, 36 insert
Hi Jiayu,
> -Original Message-
> From: Hu, Jiayu
> Sent: Thursday, April 15, 2021 10:03 AM
> To: Jiang, Cheng1 ; maxime.coque...@redhat.com;
> Xia, Chenbo
> Cc: dev@dpdk.org; Yang, YvonneX ; Wang, Yinan
> ; Liu, Yong
> Subject: RE: [PATCH v7 2/4] vhost: add support for packed ring in as
On Thu, Apr 15, 2021 at 2:03 AM Thomas Monjalon wrote:
>
> 14/04/2021 21:44, Jerin Jacob:
> > On Wed, Apr 14, 2021 at 1:49 AM Timothy McDaniel
> > wrote:
> > >
> > > Updated eventdev device name to be dlb_event instead of
> > > dlb2_event. The new name will be used for all versions
> > > of the
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Wednesday, April 14, 2021 9:41 PM
> To: Jiang, Cheng1 ; Xia, Chenbo
>
> Cc: dev@dpdk.org; Hu, Jiayu ; Yang, YvonneX
> ; Wang, Yinan ; Liu,
> Yong
> Subject: Re: [PATCH v7 2/4] vhost: add support for packed ring in async vho
For some platforms the newly-set frequency may not be effective
immediately. If we didn't get the right value from cpuinfo_cur_freq
immediately, add 10ms delay each time before rechecking until
timeout.
>From our test, for some arm platforms, it requires up to 700ms when
going from a minimum to a
The value in "/sys/.../cpuinfo_cur_freq" may not be exactly the
same as what was set. For example, if "240" is written to
"/sys/.../cpufreq/scaling_setspeed" to set the frequency, then the
value in "/sys/.../cpuinfo_cur_freq" may be "2401222". So need to
round the value.
Fixes: ed7c51a6a680 ("
This series fixed some bugs in unit tests for power library.
v4:
abort the patch about checking -ENOTSUP in turbo test.
Richael Zhuang (2):
test/power: round cpuinfo cur freq value in cpufreq autotest
test/power: add delay before checking cpuinfo cur freq
app/test/test_power_cpufreq.c | 41
Hi David,
> > Certain structures are added with reserved fields
> > to address any future enhancements to retain ABI
> > compatibility.
> > However, ABI script will still report error as it
> > is not aware of reserved fields. Hence, adding a
> > generic exception for reserved fields.
> >
> > Signe
MLX5 PMD checks the validation of actions in policy while add
a new meter policy, if pass the validation, allocates the new
policy object from the meter policy indexed memory pool.
It is common to use the same policy for multiple meters.
MLX5 PMD supports two types of policy: termination policy an
Create a meter with the new pre-defined policy.
The following cases to be considered:
1.Add entry match with meter_id in global drop table.
2.For non-termination policy (policy id 0),
add jump rule to suffix table for green and
jump rule to drop table for red.
3.Allocate counter per meter in d
When a flow has a RSS action, the driver splits
each sub flow finally is configured with
a different HW TIR action.
Any RSS action configured in meter policy may cause
a split in the flow configuration.
To save performance, any TIR action will be configured
in different flow table, so policy can b
From: Shun Hao
Currently ASO meter must be followed by policy table, so this adds
the support that connecting meter and policy table.
There are several cases to be considered:
1. For non-termination policy, connect meter to the default policy
table.
2. For non-RSS termination policy case, simply
MLX5 PMD checks the validation of actions in policy while add
a new meter policy, if pass the validation, allocates the new
policy object from the meter policy indexed memory pool.
It is common to use the same policy for multiple meters.
MLX5 PMD supports two types of policy: termination policy an
MLX5 PMD checks the validation of actions in policy while add
a new meter policy, if pass the validation, allocates the new
policy object from the meter policy indexed memory pool.
It is common to use the same policy for multiple meters.
MLX5 PMD supports two types of policy: termination policy an
From: Shun Hao
Currently ASO meter must be followed by policy table, so this adds
the support that connecting meter and policy table.
There are several cases to be considered:
1. For non-termination policy, connect meter to the default policy
table.
2. For non-RSS termination policy case, simply
Create a meter with the new pre-defined policy.
The following cases to be considered:
1.Add entry match with meter_id in global drop table.
2.For non-termination policy (policy id 0),
add jump rule to suffix table for green and
jump rule to drop table for red.
3.Allocate counter per meter in d
When a flow has a RSS action, the driver splits
each sub flow finally is configured with
a different HW TIR action.
Any RSS action configured in meter policy may cause
a split in the flow configuration.
To save performance, any TIR action will be configured
in different flow table, so policy can b
MLX5 PMD checks the validation of actions in policy while add
a new meter policy, if pass the validation, allocates the new
policy object from the meter policy indexed memory pool.
It is common to use the same policy for multiple meters.
MLX5 PMD supports two types of policy: termination policy an
Currently, the flow meter policy does not support multiple actions
per color; also the allowed action types per color are very limited.
In addition, the policy cannot be pre-defined.
Due to the growing in flow actions offload abilities there is a potential
for the user to use variety of actions pe
From: Haifei Luo
Add the create/del policy CLIs to support actions per color.
The CLIs are:
Create: add port meter policy (port_id) (policy_id) g_actions (actions)
y_actions (actions) r_actions (actions)
Delete: del port meter policy (port_id) (policy_id)
Examples:
testpmd> add port meter poli
Currently, the flow meter policy does not support multiple actions
per color; also the allowed action types per color are very limited.
In addition, the policy cannot be pre-defined.
Due to the growing in flow actions offload abilities there is a potential
for the user to use variety of actions pe
From: Chengwen Feng
Currently, the L3L4P/L3E/L4E/OL3E/OL4E fields in Rx descriptor used to
indicate hardware checksum result:
1. L3L4P: indicates hardware has processed L3L4 checksum for this
packet, if this bit is 1 then L3E/L4E/OL3E/OL4E is trustable.
2. L3E: L3 checksum error indication, 1 mea
This patch set includes 3 features:
check max SIMD bitwidth.
support Rx checksum simple process.
support runtime config of mask device capability.
Chengwen Feng (3):
net/hns3: support runtime config of mask device capability
net/hns3: support Rx checksum simple process
net/hns3: check max SI
From: Chengwen Feng
This patch supports runtime config of mask device capability, it was
used to mask the capability which queried from firmware.
The device args key is "dev_caps_mask" which takes hexadecimal bitmask
where each bit represents whether mask corresponding capability.
Its main purp
From: Chengwen Feng
This patch supports check max SIMD bitwidth when choosing NEON and SVE
vector path.
Signed-off-by: Chengwen Feng
Signed-off-by: Min Hu (Connor)
---
drivers/net/hns3/hns3_rxtx.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/
> -Original Message-
> From: Thomas Monjalon
> Sent: Wednesday, April 14, 2021 3:33 PM
> To: McDaniel, Timothy ; Jerin Jacob
>
> Cc: Jerin Jacob ; dpdk-dev ; Carrillo,
> Erik G ; Gage Eads ; Van
> Haaren, Harry ; david.march...@redhat.com
> Subject: Re: [dpdk-dev] [PATCH v3 25/26] even
On Thu, 15 Apr 2021 02:55:17 +
Suanming Mou wrote:
> Hi,
>
> > -Original Message-
> > From: Ferruh Yigit
> > Sent: Wednesday, April 14, 2021 9:07 PM
> > To: Suanming Mou ; Ori Kam ;
> > Andrew Rybchenko ; NBU-Contact-Thomas
> > Monjalon
> > Cc: dev@dpdk.org; Stephen Hemminger
> >
Hi,
> -Original Message-
> From: Ferruh Yigit
> Sent: Wednesday, April 14, 2021 9:07 PM
> To: Suanming Mou ; Ori Kam ;
> Andrew Rybchenko ; NBU-Contact-Thomas
> Monjalon
> Cc: dev@dpdk.org; Stephen Hemminger
> Subject: Re: [dpdk-dev] [PATCH 1/2] ethdev: make flow API primary/secondary
>
Currently, upper-layer application could get queue state only
through pointers such as dev->data->tx_queue_state[queue_id],
this is not the recommended way to access it. So this patch
add get queue state when call rte_eth_rx_queue_info_get and
rte_eth_tx_queue_info_get API.
Note: After add queue_s
在 2021/4/14 16:23, Thomas Monjalon 写道:
14/04/2021 04:10, Min Hu (Connor):
According to the programming guide, the rte_eal_init should be used pairs
with rte_eal_cleanup.
This set of patches add eal clean up to the examples.
Thank you
Chengchang Tang (45):
It can be a single patch for a
From: Chengchang Tang
According to the programming guide, the rte_eal_init should be used pairs
with rte_eal_cleanup.
This patch add rte_eal_cleanup to examples to encourage new users of
DPDK to use it.
Fixes: aec9c13c5257 ("eal: add function to release internal resources")
Fixes: 3d0fad56b74a
The i40evf PMD will be deprecated, iavf will be the only VF driver for
Intel 700 serial (i40e) NIC family. To reach this, there will be 2 steps:
Step 1: iavf will be the default VF driver, while i40evf still can be
selected by devarg: "driver=i40evf".
This is covered by this patch, which include:
-Original Message-
From: dev On Behalf Of Wenwu Ma
Sent: Thursday, April 1, 2021 5:06 AM
To: olivier.m...@6wind.com; andrew.rybche...@oktetlabs.ru; dev@dpdk.org
Subject: [dpdk-dev] [PATCH] test/mempool: Fix illegal pointer access in mempool
test
The value of parameter private_data_size o
Hi Cheng,
> -Original Message-
> From: Jiang, Cheng1
> Sent: Wednesday, April 14, 2021 2:14 PM
> To: maxime.coque...@redhat.com; Xia, Chenbo
> Cc: dev@dpdk.org; Hu, Jiayu ; Yang, YvonneX
> ; Wang, Yinan ; Liu,
> Yong ; Jiang, Cheng1
> Subject: [PATCH v7 2/4] vhost: add support for packe
Thanks Jasvinder.
Will change it in V7 patch.
Regards,
Li Zhang
> -Original Message-
> From: Singh, Jasvinder
> Sent: Thursday, April 15, 2021 6:22 AM
> To: Li Zhang ; dek...@nvidia.com; Ori Kam
> ; Slava Ovsiienko ; Matan
> Azrad ; Shahaf Shuler ;
> Dumitrescu, Cristian ; lir...@marvell
Thanks Cristian.
Will change it in V7 patch.
Regards,
Li Zhang
> -Original Message-
> From: Dumitrescu, Cristian
> Sent: Thursday, April 15, 2021 12:16 AM
> To: Li Zhang ; dek...@nvidia.com; Ori Kam
> ; Slava Ovsiienko ; Matan
> Azrad ; Shahaf Shuler ;
> lir...@marvell.com; jer...@marvel
在 2021/4/15 1:41, Ferruh Yigit 写道:
On 4/13/2021 12:50 PM, Min Hu (Connor) wrote:
From: Chengwen Feng
Currently, user could use runtime config "rx_func_hint=simple" to
select the hns3_recv_pkts API, but the API's name get from
rte_eth_rx_burst_mode_get is "Scalar" which has not reflected "si
From: Chengwen Feng
Currently, user could use runtime config "rx_func_hint=simple" to
select the hns3_recv_pkts API, but the API's name get from
rte_eth_rx_burst_mode_get is "Scalar" which has not reflected "simple".
So this patch renames hns3_recv_pkts to hns3_recv_pkts_simple, and
also change
The new devarg names and their default values
are listed below. The defaults have not changed, and
none of these parameters are accessed in the fast path.
poll_interval=1000
sw_credit_quantai=32
default_depth_thresh=256
Signed-off-by: Timothy McDaniel
---
config/rte_config.h| 3 -
Updated eventdev device name to be dlb_event instead of
dlb2_event. The new name will be used for all versions
of the DLB hardware. This change required corresponding changes
to the directory name that contains the PMD, as well
as the documentation files, build infrastructure, and PMD
specific API
Update the dlb documentation for v2.5. Notable differences include
the new cobined credit scheme. Also cleaned up a couple of sections,
and removed a duplicate section.
Signed-off-by: Timothy McDaniel
---
doc/guides/eventdevs/dlb2.rst | 75 +--
1 file changed, 27
Add DLB v2.5 specific information to xstats, such as metrics for the new
credit scheme.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/dlb2_xstats.c | 41
1 file changed, 37 insertions(+), 4 deletions(-)
diff --git a/drivers/event/dlb2/dlb2_xstats.c b/dr
As support for DLB v2.5 was added, modifications were made to
dlb_hw_types_new.h, but the old file needed to be preserved during
the port in order to meet the requirement that individual patches in
a series each compile successfully. Since the DLB v2.5 support is
completely integrated, it is now sa
A temporary version of dlb_resource.h (dlb_resource_new.h) was used
by the previous commits in this patch series. Merge the two files
now that DLB v2.5 support has been fully added to dlb_resource.c.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_osdep.h | 2 -
driver
Update the low level HW functions that perform the sequence number
management functions. These include getting a groups number of
sequence numbers per queue, managing in-use slots, getting the
current occupancy, and setting sequence numbers for a group.
The logic is very similar to what was done f
Update the low level HW functions responsible for
configuring sparse CQ mode, where each cache line
contains just one QE instead of 4.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new
Update the low level HW functions responsible for
finishing the queue map/unmap operation, which is an
asynchronous operation.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register
Update the low level hardware functions responsible for
getting the queue depth. The command arguments are also
validated.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register acc
DLB v2.5 uses a different credit scheme than was used in DLB v2.0 .
Specifically, there is a single credit pool for both load balanced
and directed traffic, instead of a separate pool for each as is
found with DLB v2.0.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/dlb2.c | 311
Update the low level HW functions responsible for
removing the linkage between a queue and a load
balanced port. Runtime checks are performed on the
port and queue to make sure the state is appropriate
for the unmap operation, and the unmap arguments
are also validated.
The logic is very similar t
Update the low level HW functions responsible for
starting the scheduling domain. Once a domain is
started, its resources can no longer be configured,
except for QID remapping and port enable/disable.
The start domain arguments are validated, and an error
is returned if validation fails, or if the
Update the low level HW functions responsible for
mapping queues to ports. These functions also validate
the map arguments and verify that the maximum number
of queues linked to a load balanced port does not
exceed the capabilities of the hardware.
The logic is very similar to what was done for v2
Update the low level HW functions responsible for
creating directed queues. These functions configure
the depth threshold, configure queue depth, and
validate the queue creation arguments.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses
Update the low level HW functions responsible for
creating load balanced ports. These functions create the
producer port (PP), configure the consumer queue (CQ), and
validate the port creation arguments.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.
Update the low level HW functions responsible for
creating directed ports. These functions create the
producer port (PP), configure the consumer queue (CQ),
configure queue depth, and validate the port creation
arguments.
The logic is very similar to what was done for v2.0,
but the new combined re
Reset hardware registers, consumer queues, ports,
interrupts and software. Queues must also be drained
as part of the reset process.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new re
Updated low level hardware functions related to configuring
load balanced queues. These functions create the queues,
as well as attach related resources required by load
balanced queues, such as sequence numbers.
The logic is very similar to what was done for v2.0,
but the new combined register ma
Update domain creation logic to account for DLB v2.5
credit scheme, new register map, and new register access
macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/dlb2_user.h| 13 +-
drivers/event/dlb2/pf/base/dlb2_resource.c| 645
.../event/dlb2/p
This commit adds support for DLB v2.5 probe-time hardware init,
and sets up a framework for incorporating the remaining
changes required to support DLB v2.5.
DLB v2.0 and DLB v2.5 are similar in many respects, but their
register offsets and definitions are different. As a result of these,
differen
DLB v2.5 uses a new credit scheme, where directed and load balanced
credits are unified, instead of having separate directed and load
balanced credit pools.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/dlb2.c | 20 --
drivers/event/dlb2/dlb2_user.h
This commit adds dlb v2.5 probe support, and updates
parameter parsing.
The dlb v2.5 device differs from dlb v2, in that the
number of resources (ports, queues, ...) is different,
so macros have been added to take the device version
into account.
Signed-off-by: Timothy McDaniel
---
drivers/even
1) Remove references to FPGA.
2) Do not include dlb2_mbox.h, it is not needed.
3) Remove duplicate macros/defines that were
present in both dlb2_priv.h and dlb2_hw_types.h.
Update dlb2_resource.c to include dlb2_priv.h
so that it picks up the macros/defines that
have now been consolidat
This patch series adds support for DLB v2.5 to
the current DLB V2.0 PMD. The resulting PMD supports
both hardware versions.
The main differences between the DLB v2.5 and v2.0 hardware
are:
- Number of queues/ports
- DLB v2.5 uses a combined credit pool, whereas DLB v2.0
splits credits into 2 poo
Split AVX512 Rx data path into two, one is for basic,
the other one can support additional Rx offload features,
including Rx checksum offload, Rx vlan offload, RSS offload.
Signed-off-by: Leyi Rong
Signed-off-by: Wenzhuo Lu
---
drivers/net/ice/ice_rxtx.c| 50 +++-
drivers/net/ice/i
Add alternative Tx data path for AVX512 which can support partial
Tx offload features, including Tx checksum offload, vlan/QinQ
insertion offload.
Signed-off-by: Leyi Rong
Signed-off-by: Wenzhuo Lu
---
drivers/net/ice/ice_rxtx.c| 28 +--
drivers/net/ice/ice_rxtx.h|
Add alternative Rx/Tx offload path for AVX512, which can support Rx/Tx
offload features, like checksum/vlan/RSS/QinQ offload.
---
v4:
- code rebased.
v3:
- complete ice_dev_supported_ptypes_get() for new adding offload
functions.
- complete tx/rx burst infos for new adding offload functions.
v
在 2021/4/15 8:57, Ferruh Yigit 写道:
On 4/15/2021 1:39 AM, Ferruh Yigit wrote:
On 4/13/2021 2:47 PM, Min Hu (Connor) wrote:
From: Huisong Li
The speed capability of the device can be reported to the upper-layer
app
in rte_eth_dev_info_get API. In this API, the speed capability is
derived
> -Original Message-
> From: Maxime Coquelin
> Sent: Wednesday, April 14, 2021 6:09 PM
> To: Hu, Jiayu ; dev@dpdk.org
> Cc: Xia, Chenbo ; Wang, Yinan
> ; Pai G, Sunil ; Jiang, Cheng1
>
> Subject: Re: [PATCH v2 3/4] vhost: avoid deadlock on async register
>
>
>
> On 4/14/21 3:40 AM, H
On 4/15/2021 1:39 AM, Ferruh Yigit wrote:
On 4/13/2021 2:47 PM, Min Hu (Connor) wrote:
From: Huisong Li
The speed capability of the device can be reported to the upper-layer app
in rte_eth_dev_info_get API. In this API, the speed capability is derived
from the 'supported_speed', which is the s
On 4/13/2021 2:47 PM, Min Hu (Connor) wrote:
The patchset has the following functions:
1.report speed capability supported by the current hardware.
2.support link speed autoneg and force link speed for PF.
3.support flow control autoneg for copper port.
Huisong Li (9):
net/hns3: fix supported
Hi, Andrew,
All has been fixed in v4, check it out, thanks.
在 2021/4/14 20:00, Andrew Rybchenko 写道:
On 4/14/21 2:11 PM, Min Hu (Connor) wrote:
This patch adds more sanity checks in control path APIs.
Fixes: 214ed1acd125 ("ethdev: add iterator to match devargs input")
Fixes: 3d98f921fbe
This patch adds more sanity checks in control path APIs.
Fixes: 214ed1acd125 ("ethdev: add iterator to match devargs input")
Fixes: 3d98f921fbe9 ("ethdev: unify prefix for static functions and variables")
Fixes: 0366137722a0 ("ethdev: check for invalid device name")
Fixes: d948f596fee2 ("ethdev: f
On 4/13/2021 2:47 PM, Min Hu (Connor) wrote:
From: Huisong Li
The speed capability of the device can be reported to the upper-layer app
in rte_eth_dev_info_get API. In this API, the speed capability is derived
from the 'supported_speed', which is the speed capability actually
supported by the N
> > Dmitry Kozlyuk (4):
> >eal/windows: hide asprintf() shim
> >eal: make OS shims internal
> >net: work around s_addr macro on Windows
> >net: provide IP-related API on any OS
>
> Thanks, Dmitry.
>
> Acked-by: Ranjit Menon
Applied, thanks
15/04/2021 00:08, Dmitry Kozlyuk:
> 2021-04-14 14:47 (UTC-0700), Ranjit Menon:
> > On 4/14/2021 2:42 PM, Thomas Monjalon wrote:
> > > 14/04/2021 23:34, Ranjit Menon:
> > >> On 4/14/2021 2:12 PM, Thomas Monjalon wrote:
> > >>> 13/04/2021 09:00, Dmitry Kozlyuk:
> > Hi Ranjit,
> >
> >
On 4/14/2021 3:06 PM, Dmitry Kozlyuk wrote:
On Windows, EAL contains two sets of functions and macros for POSIX
compatibility: and a networking shim (socket headers).
The latter conflicts with system headers and should not exist.
Exposing the former from EAL can break consumer own POSIX compat
> +/* MTR meter policy add */
> +static int
> +pmd_mtr_meter_policy_add(struct rte_eth_dev *dev,
> + uint32_t meter_policy_id,
> + struct rte_mtr_meter_policy_params *policy,
> + struct rte_mtr_error *error)
> +{
> + struct pmd_internals *p = dev->data->dev_private;
> + struc
2021-04-14 14:47 (UTC-0700), Ranjit Menon:
> On 4/14/2021 2:42 PM, Thomas Monjalon wrote:
> > 14/04/2021 23:34, Ranjit Menon:
> >> On 4/14/2021 2:12 PM, Thomas Monjalon wrote:
> >>> 13/04/2021 09:00, Dmitry Kozlyuk:
> Hi Ranjit,
>
> 2021-04-12 21:46 (UTC-0700), Ranjit Menon:
>
Users of relied on it to provide IP-related defines,
like IPPROTO_* constants, but still had to include POSIX headers
for inet_pton() and other standard IP-related facilities.
Extend so that it is a single header to gain access
to IP-related facilities on any OS. Use it to replace POSIX includes
Windows Sockets headers contain `#define s_addr S_un.S_addr`, which
conflicts with definition of `s_addr` field of `struct rte_ether_hdr`.
Prieviously `s_addr` was undefined in , which had been
breaking access to `s_addr` field of `struct in_addr`, so some DPDK
and Windows headers could not be incl
DPDK code often relies on functions and macros that are not standard C,
but are found on all platforms, even if by slightly different names.
Windows provided macros or inline definitions for such symbols.
However, when placed in public header, these symbols were unnecessarily
exposed, breaking con
Make asprintf(3) implementation for Windows private to EAL, so that it's
hidden from external consumers. It is not exposed to internal consumers
either, because they don't need asprintf() and also because callers from
other modules would have no reliable way to free allocated memory.
Signed-off-by
On Windows, EAL contains two sets of functions and macros for POSIX
compatibility: and a networking shim (socket headers).
The latter conflicts with system headers and should not exist.
Exposing the former from EAL can break consumer own POSIX compatibility
layer and is against standards in genera
On 4/14/2021 2:42 PM, Thomas Monjalon wrote:
14/04/2021 23:34, Ranjit Menon:
On 4/14/2021 2:12 PM, Thomas Monjalon wrote:
13/04/2021 09:00, Dmitry Kozlyuk:
Hi Ranjit,
2021-04-12 21:46 (UTC-0700), Ranjit Menon:
[...]
The change to remove the networking shim breaks l2fwd compilation on
Windo
08/04/2021 13:45, Olivier Matz:
> I see it has already been discussed for posix functions like close() or
> strdup(), so I won't reopen the door too long ;)
>
> Since DPDK is a network-oriented project, it provides network defines or
> structure, prefixed with rte_. This API is on some aspects mor
14/04/2021 23:34, Ranjit Menon:
> On 4/14/2021 2:12 PM, Thomas Monjalon wrote:
> > 13/04/2021 09:00, Dmitry Kozlyuk:
> >> Hi Ranjit,
> >>
> >> 2021-04-12 21:46 (UTC-0700), Ranjit Menon:
> >> [...]
> >>> The change to remove the networking shim breaks l2fwd compilation on
> >>> Windows, since l2fwd/
On 4/14/2021 2:12 PM, Thomas Monjalon wrote:
13/04/2021 09:00, Dmitry Kozlyuk:
Hi Ranjit,
2021-04-12 21:46 (UTC-0700), Ranjit Menon:
[...]
The change to remove the networking shim breaks l2fwd compilation on
Windows, since l2fwd/main.c includes netinet/in.h explicitly.
How do you propose we
11/04/2021 00:47, Dmitry Kozlyuk:
> DPDK code often relies on functions and macros that are not standard C,
> but are found on all platforms, even if by slightly different names.
> Windows provided macros or inline definitions for such symbols.
> However, when placed in public header, these symbol
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