-Original Message-
From: Arnd Bergmann [mailto:a...@arndb.de]
Sent: Wednesday, November 12, 2014 7:05 PM
To: linux-arm-ker...@lists.infradead.org
Cc: Shawn Guo; mark.rutl...@arm.com; devicetree@vger.kernel.org; Lu
Jingchang-B35083
Subject: Re: [PATCH] ARM: imx: temporarily remove
, Oct 31, 2014 at 05:39:53PM +0800, Jingchang Lu wrote:
diff --git a/arch/arm/mach-imx/imx31-dt.c
b/arch/arm/mach-imx/imx31-dt.c index 418dbc8..e0a4e2f 100644
--- a/arch/arm/mach-imx/imx31-dt.c
+++ b/arch/arm/mach-imx/imx31-dt.c
@@ -15,16 +15,8 @@
#include asm/mach/arch.h
#include asm/mach
standby procedure.
add dt-bindings for LS1021A SoC and platform gerenal configuration nodes.
Jingchang Lu (6):
ARM: dts: Add SoC level device tree support for LS1021A
ARM: dts: Add initial LS1021A QDS board dts support
From: Jingchang Lu b35...@freescale.com
This add Freescale QorIQ LS1021A SoC device tree support.
The QorIQ LS1021A processor incorporates dual ARM Cortex-A7 cores,
providing virtualization support, advanced security features and the
broadest array of high-speed interconnects and optimized
From: Jingchang Lu b35...@freescale.com
The LS1021A QorIQ development system (QDS) is a high-performance
computing evaluation, development and test platform supporting
the LS1021A processor. The LS1021A QDS is optimized to support
the high-bandwidth DDR3LP/DDR4 memory and a full complement
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
Documentation/devicetree/bindings/arm/fsl.txt | 38 +++
1 file changed, 38 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt
b/Documentation/devicetree/bindings/arm/fsl.txt
index e935d7d
From: Jingchang Lu b35...@freescale.com
Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/Makefile | 2 +-
arch/arm/mach-imx/common.h | 1 +
arch/arm
refer to LS1021A QorIQ Tower System Reference Manual.
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/ls1021a-twr.dts | 127 ++
2 files changed
init with
mxc_arch_reset_init_dt and removes corresponding .restart handler,
for the .init_machine that can be handled by system default after
removing the mxc_arch_reset_init_dt, the .init_machine is also removed.
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
arch/arm/mach-imx
Freescale LS1021A SoC and board support
On Fri, Oct 24, 2014 at 06:08:41PM +0800, Jingchang Lu wrote:
This series contain the support for Freescale LS1021A CPU and LS1021A-QDS
and LS1021A-TWR board.
The LS1021A SoC combines two ARM Cortex-A7 cores that have been optimized
for high reliability and pack
.
Jingchang Lu (6):
ARM: dts: Add SoC level device tree support for LS1021A
ARM: dts: Add initial LS1021A QDS board dts support
ARM: dts: Add initial LS1021A TWR board dts support
dt-bindings: arm: add
From: Jingchang Lu b35...@freescale.com
This add Freescale QorIQ LS1021A SoC device tree support.
The QorIQ LS1021A processor incorporates dual ARM Cortex-A7 cores,
providing virtualization support, advanced security features and the
broadest array of high-speed interconnects and optimized
From: Jingchang Lu b35...@freescale.com
Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/Makefile | 2 +-
arch/arm/mach-imx/common.h | 1 +
arch/arm
From: Jingchang Lu b35...@freescale.com
The LS1021A SoC is a dual-core Cortex-A7 based processor,
this adds the initial support for it.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/Kconfig| 14 ++
arch/arm/mach-imx/Makefile | 2 ++
arch/arm
From: Jingchang Lu b35...@freescale.com
The LS1021A QorIQ development system (QDS) is a high-performance
computing evaluation, development and test platform supporting
the LS1021A processor. The LS1021A QDS is optimized to support
the high-bandwidth DDR3LP/DDR4 memory and a full complement
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
Documentation/devicetree/bindings/arm/fsl.txt | 38 +++
1 file changed, 38 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt
b/Documentation/devicetree/bindings/arm/fsl.txt
index e935d7d
refer to LS1021A QorIQ Tower System Reference Manual.
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/ls1021atwr.dts | 127 +++
2 files changed
: imx: Add Freescale LS1021A SMP support
On Oct 17, 2014, at 12:10 PM, Jingchang Lu jingchang...@freescale.com
wrote:
-Original Message-
From: Kumar Gala [mailto:ga...@codeaurora.org]
Sent: Thursday, October 16, 2014 10:31 PM
To: Lu Jingchang-B35083
Cc: shawn@linaro.org
Chenhui-B35336; Gupta Suresh-B42813;
Leekha Shaveta-B20052; Gupta Ruchika-R66431; Sharma Bhupesh-B45370; Fu
Chao-B44548; Xiubo Li-B47053
Subject: Re: [PATCHv5 1/6] ARM: dts: Add SoC level device tree support for
LS1021A
On Mon, Oct 13, 2014 at 05:35:58PM +0800, Jingchang Lu wrote:
+/ {
+compatible
: Re: [PATCHv5 6/6] ARM: imx: Add Freescale LS1021A SMP support
On Oct 13, 2014, at 11:36 AM, Jingchang Lu jingchang...@freescale.com
wrote:
From: Jingchang Lu b35...@freescale.com
Freescale LS1021A SoCs deploy two cortex-A7 processors, this adds
bring-up support for the secondary core
is an 8250 port, so the serial8250
suspend/resume functions should only be applied to a real 8250 port.
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
changes in v5:
add missing linux/console.h include.
changes in v4:
separate 8250 port suspend/resume from of_serial_suspend/resume
is an 8250 port, so the serial8250
suspend/resume functions should only be applied to a real 8250 port.
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
changes in v2:
add switch selection on uart type.
drivers/tty/serial/of_serial.c | 42 --
1 file
; a...@arndb.de;
linux-ker...@vger.kernel.org; linux-ser...@vger.kernel.org; linux-arm-
ker...@lists.infradead.org
Subject: Re: [PATCHv2] serial: of-serial: fix up PM ops on
no_console_suspend and port type
Hi,
On 10/13/2014 03:37 PM, Jingchang Lu wrote:
This patch fixes commit
.
changes in v2:
remove unused nodes.
wakeup the secondary core by IPI call to u-boot standby procedure.
add dt-bindings for LS1021A SoC and platform gerenal configuration nodes.
Jingchang Lu (6):
ARM: dts: Add SoC level
From: Jingchang Lu b35...@freescale.com
Signed-off-by: Alison Wang alison.w...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Xiubo Li li.xi...@freescale.com
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
From: Jingchang Lu b35...@freescale.com
Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/Makefile | 2 +-
arch/arm/mach-imx/common.h | 1 +
arch/arm
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
Documentation/devicetree/bindings/arm/fsl.txt | 38 +++
1 file changed, 38 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt
b/Documentation/devicetree/bindings/arm/fsl.txt
index e935d7d
From: Jingchang Lu b35...@freescale.com
The LS1021A SoC is a dual-core Cortex-A7 based processor,
this add the initial support for it.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/Kconfig| 14 ++
arch/arm/mach-imx/Makefile | 2 ++
arch/arm
From: Jingchang Lu b35...@freescale.com
Add Freescale LS1021A SoC device tree support
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
Signed-off-by: Suresh Gupta suresh.gu...@freescale.com
Signed-off-by: Shaveta Leekha shav
Signed-off-by: Chen Lu b46...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/ls1021a-twr.dts | 127 ++
2 files changed, 128
no_console_suspend=1 during suspend time.
On 09/23/2014 04:34 PM, Jingchang Lu wrote:
This adds PM suspend/resume support for the of-serial driver to
provide power management support on devices attatched to it.
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
drivers/tty/serial
-B44548; Jin Zhengxiong-R64188; Xiubo Li-
B47053; Sharma Bhupesh-B45370; Singh Jaiprakash-B44839
Subject: Re: [PATCHv4 2/6] ARM: dts: Add initial LS1021A QDS board dts
support
On Mon, Sep 22, 2014 at 03:45:48PM +0800, Jingchang Lu wrote:
From: Jingchang Lu b35...@freescale.com
Signed-off
: [PATCHv4 3/6] ARM: dts: Add initial LS1021A TWR board dts
support
On Wednesday 24 September 2014 11:00:34 Jingchang Lu wrote:
We also do the phy-handle fixup on our PowerPC platform based on the
aliases, and so I adopt the same way to make these fixup consistent
between SoCs.
And the u-boot fdt
: [PATCHv4 3/6] ARM: dts: Add initial LS1021A TWR board dts
support
On Wednesday 24 September 2014 05:47:53 Jingchang Lu wrote:
The ethernet device nodes already have the phy-handle properties to
their mdio nodes.
The alias for PHY nodes here is:
The ethernet has two kind of PHY interface, one
This adds PM suspend/resume support for the of-serial driver
to provide power management support on devices attatched to it.
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
drivers/tty/serial/of_serial.c | 27 +++
1 file changed, 27 insertions(+)
diff --git
: [PATCHv4 3/6] ARM: dts: Add initial LS1021A TWR board dts
support
On Monday 22 September 2014 15:45:49 Jingchang Lu wrote:
@@ -0,0 +1,117 @@
+/*
+ * Copyright 2013-2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+modify
+ * it under
procedure.
add dt-bindings for LS1021A SoC and platform gerenal configuration nodes.
Jingchang Lu (6):
ARM: dts: Add SoC level device tree support for LS1021A
ARM: dts: Add initial LS1021A QDS board dts support
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
Documentation/devicetree/bindings/arm/fsl.txt | 38 +++
1 file changed, 38 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt
b/Documentation/devicetree/bindings/arm/fsl.txt
index e935d7d
From: Jingchang Lu b35...@freescale.com
Signed-off-by: Alison Wang alison.w...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Xiubo Li li.xi...@freescale.com
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
:
remove unused nodes.
wakeup the secondary core by IPI call to u-boot standby procedure.
add dt-bindings for LS1021A SoC and platform gerenal configuration nodes.
Jingchang Lu (6):
ARM: dts: Add SoC level device tree support
From: Jingchang Lu b35...@freescale.com
The LS1021A SoC is a dual-core Cortex-A7 based processor,
this add the initial support for it.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/Kconfig| 14 ++
arch/arm/mach-imx/Makefile | 2 ++
arch/arm
From: Jingchang Lu b35...@freescale.com
Add Freescale LS1021A SoC device tree support
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
Signed-off-by: Suresh Gupta suresh.gu...@freescale.com
Signed-off-by: Shaveta Leekha shav
Signed-off-by: Chen Lu b46...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/ls1021a-twr.dts | 117 ++
2 files changed, 118
From: Jingchang Lu b35...@freescale.com
Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/Makefile | 2 +-
arch/arm/mach-imx/common.h | 1 +
arch/arm
-
B42813; Sharma Bhupesh-B45370; Xiubo Li-B47053; Gupta Ruchika-R66431; Lu
Jingchang-B35083; Badola Nikhil-B46172
Subject: Re: [PATCHv3 1/6] ARM: dts: Add SoC level device tree support for
LS1021A
On Tuesday 09 September 2014 17:12:27 Jingchang Lu wrote:
+dcfg: dcfg@1ee
-
B42813; Sharma Bhupesh-B45370; Xiubo Li-B47053; Gupta Ruchika-R66431; Lu
Jingchang-B35083; Badola Nikhil-B46172
Subject: Re: [PATCHv3 1/6] ARM: dts: Add SoC level device tree support for
LS1021A
On Tuesday 09 September 2014 17:12:27 Jingchang Lu wrote:
+ aliases {
+ serial0
; Gupta Ruchika-R66431; Sharma Bhupesh-B45370; Fu Chao-
B44548; Xiubo Li-B47053; Lu Jingchang-B35083
Subject: RE: [PATCHv3 1/6] ARM: dts: Add SoC level device tree support for
LS1021A
-Original Message-
From: Jingchang Lu [mailto:jingchang...@freescale.com]
Sent: Tuesday, September 09
LS1021A
On Wednesday 10 September 2014 03:31:19 Jingchang Lu wrote:
+DT_MACHINE_START(LS1021A, Freescale LS1021A) #ifdef
+CONFIG_ZONE_DMA
+ .dma_zone_size = SZ_128M,
+#endif
+ .init_machine = ls1021a_init_machine,
+ .dt_compat = ls1021a_dt_compat
LS1021A
On Wednesday 10 September 2014 03:31:19 Jingchang Lu wrote:
+DT_MACHINE_START(LS1021A, Freescale LS1021A) #ifdef
+CONFIG_ZONE_DMA
+ .dma_zone_size = SZ_128M,
+#endif
+ .init_machine = ls1021a_init_machine,
+ .dt_compat = ls1021a_dt_compat
; Gupta Ruchika-R66431; Sharma Bhupesh-B45370; Fu Chao-
B44548; Xiubo Li-B47053; Lu Jingchang-B35083
Subject: RE: [PATCHv3 1/6] ARM: dts: Add SoC level device tree support for
LS1021A
-Original Message-
From: Jingchang Lu [mailto:jingchang...@freescale.com]
Sent: Tuesday, September 09, 2014 2
LS1021A
On Thursday 11 September 2014 09:53:56 Jingchang Lu wrote:
From: Arnd Bergmann [mailto:a...@arndb.de]
Ok, I see. The actual point of dma_zone_size however is slightly
different, and I think you should not use it like this. We normally
only use ZONE_DMA if there are devices that have
description.
remove untested node.
changes in v2:
remove unused nodes.
wakeup the secondary core by IPI call to u-boot standby procedure.
add dt-bindings for LS1021A SoC and platform gerenal configuration nodes.
Jingchang Lu (6
.
Jingchang Lu (6):
ARM: dts: Add SoC level device tree support for LS1021A
ARM: dts: Add initial LS1021A QDS board dts support
ARM: dts: Add initial LS1021A TWR board dts support
dt-bindings: arm: add Freescale LS1021A SoC device tree binding
ARM: imx: Add initial
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
Documentation/devicetree/bindings/arm/fsl.txt | 38 +++
1 file changed, 38 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt
b/Documentation/devicetree/bindings/arm/fsl.txt
index e935d7d
From: Jingchang Lu b35...@freescale.com
Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/Makefile | 2 +-
arch/arm/mach-imx/common.h | 1 +
arch/arm
From: Jingchang Lu b35...@freescale.com
Add Freescale LS1021A SoC device tree support
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
Signed-off-by: Suresh Gupta suresh.gu...@freescale.com
Signed-off-by: Shaveta Leekha shav
From: Jingchang Lu b35...@freescale.com
Signed-off-by: Alison Wang alison.w...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Xiubo Li li.xi...@freescale.com
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
From: Jingchang Lu b35...@freescale.com
The LS1021A SoC is a dual-core Cortex-A7 based processor,
this add the initial support for it.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/Kconfig| 14 ++
arch/arm/mach-imx/Makefile | 2 ++
arch/arm
.
Jingchang Lu (6):
ARM: dts: Add SoC level device tree support for LS1021A
ARM: dts: Add initial LS1021A QDS board dts support
ARM: dts: Add initial LS1021A TWR board dts support
dt-bindings: arm: add Freescale LS1021A SoC device tree binding
ARM: imx
Signed-off-by: Chen Lu b46...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/ls1021a-twr.dts | 117 ++
2 files changed, 118
This add the 64-byte FIFO mode device tree binding for Freescale DUART.
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
Documentation/devicetree/bindings/serial/of-serial.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt
b
From: Jingchang Lu b35...@freescale.com
Signed-off-by: Alison Wang alison.w...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Xiubo Li li.xi...@freescale.com
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
changes in v3:
revise the SCFG and DCFG description.
Documentation/devicetree/bindings/arm/fsl.txt | 38 +++
1 file changed, 38 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt
b
Signed-off-by: Chen Lu b46...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
changes in v3:
remove IFC partition info.
arch/arm/boot/dts/Makefile| 3 +-
arch/arm/boot/dts/ls1021a-twr.dts | 155
: arm: add Freescale LS1021A SoC
device tree binding
On 08/04/2014 12:39 PM, Jingchang Lu wrote:
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
Documentation/devicetree/bindings/arm/fsl.txt | 37
+++
1 file changed, 37 insertions(+)
diff --git
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
Documentation/devicetree/bindings/arm/fsl.txt | 37 +++
1 file changed, 37 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt
b/Documentation/devicetree/bindings/arm/fsl.txt
index e935d7d
From: Jingchang Lu b35...@freescale.com
Add Freescale LS1021A SoC device tree support
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
Signed-off-by: Suresh Gupta suresh.gu...@freescale.com
Signed-off-by: Shaveta Leekha shav
From: Jingchang Lu b35...@freescale.com
Freescale LS1021A SoC deploys two cortex-A7 processors,
this adds bring-up support for the secondary core.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/common.h | 2 ++
arch/arm/mach-imx/mach-ls1021a.c | 1 +
arch/arm
From: Jingchang Lu b35...@freescale.com
The LS1021A SoC is a dual-core Cortex-A7 based processor,
this add the initial support for it.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/Kconfig| 14 ++
arch/arm/mach-imx/Makefile | 2 ++
arch/arm
From: Jingchang Lu b35...@freescale.com
Signed-off-by: Alison Wang alison.w...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Xiubo Li li.xi...@freescale.com
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
the secondary core by IPI call to u-boot standby procedure.
add dt-bindings for LS1021A SoC and platform gerenal configuration nodes.
Jingchang Lu (6):
ARM: dts: Add SoC level device tree support for LS1021A
ARM: dts: Add initial
Signed-off-by: Chen Lu b46...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
arch/arm/boot/dts/Makefile| 3 +-
arch/arm/boot/dts/ls1021a-twr.dts | 204 ++
2 files changed, 206
support for Freescale
LS1021A
On Thu, Jul 03, 2014 at 11:17:12AM +0100, Jingchang Lu wrote:
-Original Message-
From: Mark Rutland [mailto:mark.rutl...@arm.com]
Sent: Wednesday, July 02, 2014 7:21 PM
To: Lu Jingchang-B35083
Cc: shawn@linaro.org; linux-arm-ker...@lists.infradead.org
Freescale LS1021A SMP support
On Wed, Jul 02, 2014 at 10:02:52AM +0100, Jingchang Lu wrote:
From: Jingchang Lu b35...@freescale.com
Freescale LS1021A SoC deploys two cortex-A7 processors, this adds
bring-up support for the secondary core.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch
compatible include
undocumented string, could it be added along with the driver support after the
platform support is accepted? Thanks.
On Wed, Jul 02, 2014 at 10:02:48AM +0100, Jingchang Lu wrote:
From: Jingchang Lu b35...@freescale.com
Add Freescale LS1021A SoC device tree support
Signed-off
support for Freescale
LS1021A
On Wed, Jul 02, 2014 at 10:02:51AM +0100, Jingchang Lu wrote:
From: Jingchang Lu b35...@freescale.com
diff --git a/arch/arm/mach-imx/mach-ls1021a.c
b/arch/arm/mach-imx/mach-ls1021a.c
new file mode 100644
index 000..d1a9bb9
--- /dev/null
+++ b/arch/arm/mach
From: Jingchang Lu b35...@freescale.com
Add Freescale LS1021A SoC device tree support
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
Signed-off-by: Suresh Gupta suresh.gu...@freescale.com
Signed-off-by: Shaveta Leekha shav
.
Jingchang Lu (5):
ARM: dts: Add SoC level device tree support for LS1021A
ARM: dts: Add initial LS1021A QDS board dts support
ARM: dts: Add initial LS1021A TWR board dts support
ARM: imx: Add initial support for Freescale LS1021A
ARM: imx: Add Freescale
From: Jingchang Lu b35...@freescale.com
Freescale LS1021A SoC deploys two cortex-A7 processors,
this adds bring-up support for the secondary core.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/common.h | 2 ++
arch/arm/mach-imx/headsmp.S | 11
From: Jingchang Lu b35...@freescale.com
The LS1021A SoC is a dual-core Cortex-A7 based processor,
this add the initial support for it.
Signed-off-by: Jingchang Lu b35...@freescale.com
---
arch/arm/mach-imx/Kconfig| 17 ++
arch/arm/mach-imx/Makefile | 2 ++
arch/arm
From: Jingchang Lu b35...@freescale.com
Signed-off-by: Alison Wang alison.w...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: Xiubo Li li.xi...@freescale.com
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
Signed-off-by: Chen Lu b46...@freescale.com
Signed-off-by: Chao Fu b44...@freescale.com
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
arch/arm/boot/dts/Makefile| 3 +-
arch/arm/boot/dts/ls1021a-twr.dts | 236 ++
2 files changed, 238
it be merged, thanks!
Best Regards,
Jingchang
-Original Message-
From: Jingchang Lu [mailto:b35...@freescale.com]
Sent: Monday, January 20, 2014 5:24 PM
To: vinod.k...@intel.com
Cc: dan.j.willi...@intel.com; a...@arndb.de; shawn@linaro.org;
pawel.m...@arm.com; mark.rutl
This series add Freescale eDMA engine support.
Jingchang Lu (2):
ARM: dts: vf610: Add eDMA node
dma: Add Freescale eDMA engine driver support
Documentation/devicetree/bindings/dma/fsl-edma.txt | 76 ++
arch/arm/boot/dts/vf610.dtsi | 30 +
drivers/dma/Kconfig
Signed-off-by: Jingchang Lu b35...@freescale.com
Acked-by: Arnd Bergmann a...@arndb.de
---
no changes in v10 ~ v11.
changes in v9:
remove include/dt-bindings/dma/vf610-edma.h, the request source ID
is the same as SoC's reference manual.
changes in v8:
describe dmamux info in edma node
Add Freescale enhanced direct memory(eDMA) controller support.
This module can be found on Vybrid and LS-1 SoCs.
Signed-off-by: Alison Wang b18...@freescale.com
Signed-off-by: Jingchang Lu b35...@freescale.com
Acked-by: Arnd Bergmann a...@arndb.de
---
changes in v11:
Add dma device_slave_caps
...@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
devicetree@vger.kernel.org; Wang Huan-B18965
Subject: Re: [PATCHv10 2/2] dma: Add Freescale eDMA engine driver support
On Fri, Jan 17, 2014 at 02:04:44PM +0800, Jingchang Lu wrote:
Add Freescale enhanced direct memory(eDMA) controller support
Add Freescale enhanced direct memory(eDMA) controller support.
This module can be found on Vybrid and LS-1 SoCs.
Signed-off-by: Alison Wang b18...@freescale.com
Signed-off-by: Jingchang Lu b35...@freescale.com
Acked-by: Arnd Bergmann a...@arndb.de
---
changes in v11:
Add dma device_slave_caps
...@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
devicetree@vger.kernel.org; Wang Huan-B18965
Subject: Re: [PATCHv10 2/2] dma: Add Freescale eDMA engine driver support
On Mon, Jan 20, 2014 at 09:06:43AM +, Jingchang Lu wrote:
-Original Message-
From: Vinod Koul
...@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
devicetree@vger.kernel.org; Wang Huan-B18965
Subject: Re: [PATCHv10 2/2] dma: Add Freescale eDMA engine driver support
On Mon, Jan 20, 2014 at 11:05:03AM +, Jingchang Lu wrote:
+ struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan
...@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
devicetree@vger.kernel.org; Wang Huan-B18965
Subject: Re: [PATCHv9 2/2] dma: Add Freescale eDMA engine driver support
On Thursday 16 January 2014, Jingchang Lu wrote:
Add Freescale enhanced direct memory(eDMA) controller support
...@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
devicetree@vger.kernel.org; Wang Huan-B18965
Subject: Re: [PATCHv9 2/2] dma: Add Freescale eDMA engine driver support
On Thu, Jan 16, 2014 at 02:30:00AM +, Jingchang Lu wrote:
Add Freescale enhanced direct memory(eDMA) controller support
This series add Freescale eDMA engine support.
Jingchang Lu (2):
ARM: dts: vf610: Add eDMA node
dma: Add Freescale eDMA engine driver support
Documentation/devicetree/bindings/dma/fsl-edma.txt | 76
arch/arm/boot/dts/vf610.dtsi | 30 ++
drivers/dma
Add Freescale enhanced direct memory(eDMA) controller support.
This module can be found on Vybrid and LS-1 SoCs.
Signed-off-by: Alison Wang b18...@freescale.com
Signed-off-by: Jingchang Lu b35...@freescale.com
Acked-by: Arnd Bergmann a...@arndb.de
---
changes in v10:
define fsl_edma_mutex
Signed-off-by: Jingchang Lu b35...@freescale.com
Acked-by: Arnd Bergmann a...@arndb.de
---
no changes in v10.
changes in v9:
remove include/dt-bindings/dma/vf610-edma.h, the request source ID
is the same as SoC's reference manual.
changes in v8:
describe dmamux info in edma node to avoid
This series add Freescale eDMA engine support.
Jingchang Lu (2):
ARM: dts: vf610: Add eDMA node
dma: Add Freescale eDMA engine driver support
Documentation/devicetree/bindings/dma/fsl-edma.txt | 66
arch/arm/boot/dts/vf610.dtsi | 30 ++
drivers/dma
Signed-off-by: Jingchang Lu b35...@freescale.com
---
changes in v9:
remove include/dt-bindings/dma/vf610-edma.h, the request source ID
is the same as SoC's reference manual.
changes in v8:
describe dmamux info in edma node to avoid confusion.
change eDMA requst source macro definitions
Add Freescale enhanced direct memory(eDMA) controller support.
This module can be found on Vybrid and LS-1 SoCs.
Signed-off-by: Alison Wang b18...@freescale.com
Signed-off-by: Jingchang Lu b35...@freescale.com
---
changes in v9:
define endian's operating functions instead of macro definition
...@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
devicetree@vger.kernel.org
Subject: Re: [PATCHv8 2/2] dma: Add Freescale eDMA engine driver support
On Thursday 09 January 2014, Jingchang Lu wrote:
+sai2: sai@40031000 {
+ compatible = fsl,vf610-sai;
+ reg = 0x40031000
...@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
devicetree@vger.kernel.org
Subject: Re: [PATCHv8 2/2] dma: Add Freescale eDMA engine driver support
On Thursday 09 January 2014 11:44:46 Jingchang Lu wrote:
On Thursday 09 January 2014, Jingchang Lu wrote:
+sai2: sai@40031000
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