On Wed, Jun 12, 2013 at 05:38:50PM +0900, Simon Horman wrote:
On Tue, Jun 11, 2013 at 06:37:24PM +0900, Magnus Damm wrote:
On Fri, May 24, 2013 at 6:13 PM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
To disable spurious interrupts, that get triggered on certain hardware,
the
On Tue, Jun 18, 2013 at 9:33 AM, Wolfram Sang w...@the-dreams.de wrote:
On Mon, Jun 17, 2013 at 11:15:30PM +0100, Grant Likely wrote:
On Mon, Jun 17, 2013 at 5:33 PM, Linus Walleij linus.wall...@linaro.org
wrote:
OK that works for me, I'm not in any hurry.
Deferring by a merge window isn't
On Mon, Jun 17, 2013 at 8:50 PM, Laurent Pinchart
laurent.pinchart+rene...@ideasonboard.com wrote:
Hello,
Here's the seventh (and hopefully final) version of the SuperH and SH Mobile
pin controllers (PFC) DT support patch set.
The patches have been rebased on the for-next branch of the
Hi Arnd
On Mon, 17 Jun 2013, Arnd Bergmann wrote:
On Thursday 06 June 2013, Guennadi Liakhovetski wrote:
+Required properties:
+- dmas:a list of [DMA controller phandle] [MID/RID value]
pairs
+- dma-names: a list of DMA channel names, one per dmas entry
Looks ok to
On 18/06/13 09:05, Linus Walleij wrote:
On Mon, Jun 17, 2013 at 8:50 PM, Laurent Pinchart
laurent.pinchart+rene...@ideasonboard.com wrote:
Hello,
Here's the seventh (and hopefully final) version of the SuperH and SH Mobile
pin controllers (PFC) DT support patch set.
The patches have been
Hello,
Thank you for the review.
On 06/18/2013 01:56 AM, Samuel Ortiz wrote:
Hi Florian,
On Thu, May 30, 2013 at 03:51:54PM +0200, Florian Vaussard wrote:
For now, the call to twl4030-power is hard-wired inside twl-core.
To ease the future transition to DT, make twl4030-power as a
separate
Am Dienstag, 18. Juni 2013, 10:05:30 schrieb Linus Walleij:
On Mon, Jun 17, 2013 at 8:50 PM, Laurent Pinchart
laurent.pinchart+rene...@ideasonboard.com wrote:
Hello,
Here's the seventh (and hopefully final) version of the SuperH and SH
Mobile pin controllers (PFC) DT support patch
Hello,
On 06/18/2013 02:02 AM, Samuel Ortiz wrote:
Hi Florian,
On Thu, May 30, 2013 at 03:51:55PM +0200, Florian Vaussard wrote:
int twl4030_power_probe(struct platform_device *pdev)
{
struct twl4030_power_data *pdata = pdev-dev.platform_data;
+ struct device_node *node =
Hi Arnd
Thanks for your comments
On Mon, 17 Jun 2013, Arnd Bergmann wrote:
On Thursday 06 June 2013, Guennadi Liakhovetski wrote:
Documentation/devicetree/bindings/dma/dma.txt | 44
+
drivers/dma/of-dma.c | 31 +
2
I may have submitted this one too early. There are now a few things I
want to address:
* rename moxart_uc7112lx_defconfig moxart_defconfig
* remove MACH_UC7112LX default y from arch/arm/mach-moxart/Kconfig
Also, the omitted arch/arm/mach-moxart/idle.c hinges on a patch now
submitted to Russell's
Hi Olof,
On Mon, Jun 17, 2013 at 10:44:51AM -0700, Olof Johansson wrote:
On Mon, Jun 17, 2013 at 04:51:09PM +0100, Lorenzo Pieralisi wrote:
The TC2 versatile express core tile integrates a logic block that provides
the
interface between the dual cluster test-chip and the M3
Hi Pawell,
On Thu, Jun 13, 2013 at 10:45:57AM +0100, Pawel Moll wrote:
On Thu, 2013-06-13 at 01:13 +0100, Samuel Ortiz wrote:
Now, about the driver itself, besides the really odd code design, the
static variables all over the place, the nasty init hacks and the
unneeded long function
Morning, Samuel,
On Tue, 2013-06-18 at 10:09 +0100, Samuel Ortiz wrote:
Hi Pawell,
Double l in the wrong place ;-)
If you feel strongly about it, I'm ready to split it into mfd_cells and
move the gpio and leds code into separate drivers, however I'm not
convinced that it's worth the
On 6/18/2013 12:08 PM, Joel A Fernandes wrote:
From: Matt Porter mpor...@ti.com
Adds support for parsing the TI EDMA DT data into the required EDMA
private API platform data. Enables runtime PM support to initialize
the EDMA hwmod. Enables build on OMAP.
Changes by Joel:
* Setup default
Hi,
On Thu, Jun 13, 2013 at 02:13:51PM +0530, Kishon Vijay Abraham I wrote:
+struct phy_provider *of_phy_provider_register(struct device *dev,
+ struct module *owner, struct phy * (*of_xlate)(struct device *dev,
+ struct of_phandle_args *args))
I would rename this to
Hi,
On Thu, Jun 13, 2013 at 02:13:52PM +0530, Kishon Vijay Abraham I wrote:
@@ -159,6 +191,12 @@ static int omap_usb2_probe(struct platform_device *pdev)
otg-start_srp = omap_usb_start_srp;
otg-phy= phy-phy;
+ pm_runtime_enable(phy-dev);
enabling
On Thu, Jun 13, 2013 at 02:13:53PM +0530, Kishon Vijay Abraham I wrote:
Used the generic PHY framework API to create the PHY. For powering on
and powering off the PHY, power_on and power_off ops are used. Once the
MUSB OMAP glue is adapted to the new framework, the suspend and resume
ops of
On Thu, Jun 13, 2013 at 02:13:54PM +0530, Kishon Vijay Abraham I wrote:
Changed the inticall from subsys_initcall to module_init for
twl4030-usb.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
not part of the series, should be sent separately. I'll queue this one
for v3.12 once
On Thu, Jun 13, 2013 at 02:13:55PM +0530, Kishon Vijay Abraham I wrote:
In order for controllers to get PHY in case of non dt boot, the phy
binding information (phy device name) should be added in the platform
data of the controller.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
I
On Thu, Jun 13, 2013 at 02:13:56PM +0530, Kishon Vijay Abraham I wrote:
Updated the usb_otg_hs dt data to include the *phy* and *phy-names*
binding in order for the driver to use the new generic PHY framework.
Also updated the Documentation to include the binding information.
The PHY binding
On Thu, Jun 13, 2013 at 02:13:58PM +0530, Kishon Vijay Abraham I wrote:
Now that omap-usb2 is adapted to the new generic PHY framework,
*set_suspend* ops can be removed from omap-usb2 driver.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Reviewed-by: Felipe Balbi ba...@ti.com
--
On Thu, Jun 13, 2013 at 02:13:59PM +0530, Kishon Vijay Abraham I wrote:
Now that twl4030-usb is adapted to the new generic PHY framework,
*set_suspend* and *phy_init* ops can be removed from twl4030-usb driver.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Reviewed-by: Felipe Balbi
Hi,
On Thu, Jun 13, 2013 at 02:13:57PM +0530, Kishon Vijay Abraham I wrote:
Use the generic PHY framework API to get the PHY. The usb_phy_set_resume
and usb_phy_set_suspend is replaced with power_on/get_sync and
power_off/put_sync to align with the new PHY framework.
musb-xceiv can't be
Hi,
On Tuesday 18 June 2013 03:10 PM, Felipe Balbi wrote:
Hi,
On Thu, Jun 13, 2013 at 02:13:52PM +0530, Kishon Vijay Abraham I wrote:
@@ -159,6 +191,12 @@ static int omap_usb2_probe(struct platform_device *pdev)
otg-start_srp = omap_usb_start_srp;
otg-phy
Hi,
On Tue, Jun 18, 2013 at 03:19:03PM +0530, Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 18 June 2013 03:10 PM, Felipe Balbi wrote:
Hi,
On Thu, Jun 13, 2013 at 02:13:52PM +0530, Kishon Vijay Abraham I wrote:
@@ -159,6 +191,12 @@ static int omap_usb2_probe(struct platform_device
Hi,
On Mon, Jun 17, 2013 at 12:16:35PM +0200, Sylwester Nawrocki wrote:
I have already used this API for our MIPI CSI-2/DSIM DPHYs driver,
the RFC patch series can be found at [1].
Thanks,
Sylwester
[1] http://www.spinics.net/lists/arm-kernel/msg251666.html
one comment to that series:
Hi,
On Tuesday 18 June 2013 03:20 PM, Felipe Balbi wrote:
Hi,
On Tue, Jun 18, 2013 at 03:19:03PM +0530, Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 18 June 2013 03:10 PM, Felipe Balbi wrote:
Hi,
On Thu, Jun 13, 2013 at 02:13:52PM +0530, Kishon Vijay Abraham I wrote:
@@ -159,6 +191,12 @@
Am Dienstag, den 18.06.2013, 13:00 +0800 schrieb Wei Yongjun:
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Add the missing unlock before return from function coda_stop_streaming()
in the error handling case.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
Hi,
On Tuesday 18 June 2013 03:14 PM, Felipe Balbi wrote:
On Thu, Jun 13, 2013 at 02:13:55PM +0530, Kishon Vijay Abraham I wrote:
In order for controllers to get PHY in case of non dt boot, the phy
binding information (phy device name) should be added in the platform
data of the controller.
On 6/18/2013 12:08 PM, Joel A Fernandes wrote:
From: Matt Porter mpor...@ti.com
Changes by Joel:
* Split EDMA xbar support out of original EDMA DT parsing patch
to keep it easier for review.
* Rewrite shift and offset calculation.
Suggested-by: Sekhar Nori nsek...@ti.com
Suggested by:
Hi Olof,
thanks a lot.
On Mon, Jun 17, 2013 at 06:44:51PM +0100, Olof Johansson wrote:
On Mon, Jun 17, 2013 at 04:51:09PM +0100, Lorenzo Pieralisi wrote:
The TC2 versatile express core tile integrates a logic block that provides
the
interface between the dual cluster test-chip and the M3
On Tue, Jun 18, 2013 at 05:25:22AM +0100, Nicolas Pitre wrote:
On Mon, 17 Jun 2013, Lorenzo Pieralisi wrote:
The TC2 versatile express core tile integrates a logic block that provides
the
interface between the dual cluster test-chip and the M3 microcontroller that
carries out power
Hi,
On Tue, Jun 18, 2013 at 03:34:36PM +0530, Kishon Vijay Abraham I wrote:
On Tuesday 18 June 2013 03:14 PM, Felipe Balbi wrote:
On Thu, Jun 13, 2013 at 02:13:55PM +0530, Kishon Vijay Abraham I wrote:
In order for controllers to get PHY in case of non dt boot, the phy
binding information
On Mon, Jun 17, 2013 at 11:55 PM, Rob Herring robherri...@gmail.com wrote:
+Optional properties :
+ - sda-hold-time : should contain the SDA hold time in nanoseconds.
Please specify time units in the property name. Perhaps
i2c-sda-hold-time-ns.
Based on reading the discussion, there is one
Ping Kukjin.
On 11 June 2013 11:59, Sachin Kamat sachin.ka...@linaro.org wrote:
This series is based on for-next branch of Kukjin's tree.
Tested on Origen board.
Changes since v1:
* Split LCD patch into LCD and PWM as suggested by Tomasz Figa.
* Added all PWM output nodes to pinctrl dtsi
USB Host PHY clock on port 2 must be configured to 19.2MHz.
Provide this information.
CC: Sricharan R r.sricha...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap5-uevm.dts |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git
Hi Benoit Tony,
The first two patches make changes to dts files to get USB host support
and DVI EDID to work on Panda.
The third patch should get USB host functional on uEVM.
The fourth patch is a temporary workaround to create a clock alias to
the USB PHY clock as it is not possible to define
Provide the RESET and Power regulators for the USB PHY,
the USB Host port mode and the PHY device.
Also provide pin multiplexer information for the USB host
pins.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap4-panda-common.dtsi | 62 +
1
On Panda the +5V supply for DVI EDID is supplied by the
same regulator that poweres the USB Hub. Currently, the
DSS/DVI subsystem doesn't know how to manage this regulator
and so DVI EDID reads will fail if USB Hub is not enabled.
As a temporary fix we keep this regulator permanently enabled
on
Till the OMAP clocks are correctly defined in device tree, use
this temporary hack to provide clock alias to the USB PHY clocks.
Without this, USB Host Ethernet will not be functional with
device tree boots on Panda and uEVM.
Signed-off-by: Roger Quadros rog...@ti.com
---
Hi,
On Tuesday 18 June 2013 03:57 PM, Felipe Balbi wrote:
Hi,
On Tue, Jun 18, 2013 at 03:34:36PM +0530, Kishon Vijay Abraham I wrote:
On Tuesday 18 June 2013 03:14 PM, Felipe Balbi wrote:
On Thu, Jun 13, 2013 at 02:13:55PM +0530, Kishon Vijay Abraham I wrote:
In order for controllers to get
* Roger Quadros rog...@ti.com [130618 04:17]:
Till the OMAP clocks are correctly defined in device tree, use
this temporary hack to provide clock alias to the USB PHY clocks.
Without this, USB Host Ethernet will not be functional with
device tree boots on Panda and uEVM.
Thanks, this looks
Now that the mbus device tree binding has been introduced, we can
switch over to it.
Also, and since the initialization of the mbus driver is quite
fundamental for the system to work properly, this patch adds a BUG()
in case mbus fails to initialize.
Signed-off-by: Ezequiel Garcia
This patch adds static window allocation to the device tree binding.
Each first-child of the mbus-compatible node, with a suitable 'ranges'
property, declaring an address translation, will trigger an address
decoding window allocation.
Signed-off-by: Ezequiel Garcia
We introduce a common initialization function mvebu_mbus_common_init()
that will be used by both legacy and device-tree initialization code.
This patch is an intermediate step, which will allow to introduce the
DT binding for this driver in a less intrusive way.
Signed-off-by: Thomas Petazzoni
Now that mbus device tree binding has been introduced, remove the address
decoding window management from this driver.
A suitable 'ranges' entry should be added to the devbus-compatible node in
the device tree, as described by the mbus binding documentation.
Signed-off-by: Ezequiel Garcia
In order to access the SoC BootROM, we need to declare a mapping
(through a ranges property). The mbus driver will use this property
to allocate a suitable address decoding window.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/boot/dts/armada-370-db.dts
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/boot/dts/armada-370-db.dts | 2 +-
arch/arm/boot/dts/armada-370-mirabox.dts | 2 +-
arch/arm/boot/dts/armada-370-rd.dts | 2 +-
arch/arm/boot/dts/armada-370.dtsi| 2 +-
Now that mbus has been added to the device tree, it's possible to
move the PCIe nodes out of internal registers, placing it directly
below the mbus. This is a more accurate representation of the
hardware.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
The Armada 370/XP SoC family has a completely configurable address
space handled by the MBus controller.
This patch introduces the device tree layout of MBus, making the
'soc' node as mbus-compatible.
Since every peripheral/controller is a child of this 'soc' node,
this makes all of them sit
Now that mbus has been added to the device tree, it's possible to
move the DeviceBus out of internal registers, placing it directly
below the mbus. This is a more accurate representation of the hardware.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
Now that mbus has been added to the device tree, it's possible to
move the PCIe nodes out of internal registers, placing it directly
below the mbus. This is a more accurate representation of the
hardware.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
On 06/18/13 13:25, Ezequiel Garcia wrote:
In the example below there's an extract of a device tree showing how
the internal-regs and pcie nodes can be represented:
#define MBUS_ID(target,attributes) (((target) 24) | ((attributes)
16))
soc {
compatible =
On Thu, Sep 13, 2012 at 05:41:44PM +0200, Sebastian Hesselbarth wrote:
+#define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE | 0xe802C)
+#define DOVE_TWSI_ENABLE_OPTION1BIT(7)
+#define DOVE_GLOBAL_CONFIG_2 (DOVE_SB_REGS_VIRT_BASE | 0xe8030)
+#define
Hi,
On Tuesday 18 June 2013 03:33 PM, Rahul Sharma wrote:
Thanks all,
On Fri, Jun 14, 2013 at 11:39 AM, 김승우 sw0312@samsung.com wrote:
Hello Kishon,
On 2013년 06월 13일 21:54, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 13 June 2013 04:51 PM, Inki Dae wrote:
-Original
On Tue, Jun 18, 2013 at 08:25:31AM -0300, Ezequiel Garcia wrote:
Now that mbus device tree binding has been introduced, remove the address
decoding window management from this driver.
A suitable 'ranges' entry should be added to the devbus-compatible node in
the device tree, as described by
On 06/18/13 13:36, Russell King - ARM Linux wrote:
On Thu, Sep 13, 2012 at 05:41:44PM +0200, Sebastian Hesselbarth wrote:
+#define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE | 0xe802C)
+#define DOVE_TWSI_ENABLE_OPTION1 BIT(7)
+#define DOVE_GLOBAL_CONFIG_2
On 06/18/2013 06:03 PM, Philipp Zabel wrote:
Am Dienstag, den 18.06.2013, 13:00 +0800 schrieb Wei Yongjun:
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Add the missing unlock before return from function coda_stop_streaming()
in the error handling case.
Signed-off-by: Wei Yongjun
Modified code for calculating hdmi IP register values from drm timing
values. The modification is based on the inputs from hw team and specifically
proposed for 1440x576i and 1440x480i. But same changes holds good for other
interlaced resolutions also.
Signed-off-by: Rahul Sharma
On 06/18/2013 02:23 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [130618 04:17]:
Till the OMAP clocks are correctly defined in device tree, use
this temporary hack to provide clock alias to the USB PHY clocks.
Without this, USB Host Ethernet will not be functional with
device tree
On Tue, Jun 18, 2013 at 02:17:31PM +0200, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Tue, 18 Jun 2013 07:39:20 -0400, Jason Cooper wrote:
On Tue, Jun 18, 2013 at 08:25:31AM -0300, Ezequiel Garcia wrote:
Now that mbus device tree binding has been introduced, remove the address
Hi,
On Tue, Jun 18, 2013 at 04:43:44PM +0530, Kishon Vijay Abraham I wrote:
On Tue, Jun 18, 2013 at 03:34:36PM +0530, Kishon Vijay Abraham I wrote:
On Tuesday 18 June 2013 03:14 PM, Felipe Balbi wrote:
On Thu, Jun 13, 2013 at 02:13:55PM +0530, Kishon Vijay Abraham I wrote:
In order for
On Tue, Jun 18, 2013 at 08:33:54AM -0400, Jason Cooper wrote:
On Tue, Jun 18, 2013 at 02:17:31PM +0200, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Tue, 18 Jun 2013 07:39:20 -0400, Jason Cooper wrote:
On Tue, Jun 18, 2013 at 08:25:31AM -0300, Ezequiel Garcia wrote:
Now that mbus
Hi Sebastian,
On Tue, Jun 18, 2013 at 01:33:37PM +0200, Sebastian Hesselbarth wrote:
On 06/18/13 13:25, Ezequiel Garcia wrote:
In the example below there's an extract of a device tree showing how
the internal-regs and pcie nodes can be represented:
#define MBUS_ID(target,attributes)
On Tuesday 18 June 2013, Joel A Fernandes wrote:
This series is a repost of Matt Porter's EDMA patches for AM33XX EDMA support
with changes for few pending review comments on v9 series.
Currently this is required for AM33XX (Beaglebone or EVM) to access MMC
and be able mount to rootfs and
On Tuesday 18 June 2013, dingu...@altera.com wrote:
@@ -476,27 +476,31 @@
};
timer0: timer0@ffc08000 {
- compatible = snps,dw-apb-timer-sp;
+ compatible = snps,dw-apb-timer;
interrupts = 0
For now, the call to twl4030-power is hard-wired inside twl-core.
To ease the future transition to DT, make twl4030-power as a
separate module, like what is already done for twl4030-audio
and others.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
drivers/mfd/twl-core.c | 12
Hello,
This series enables a partial DT support for twl4030-power. The
missing part is the power management scripts, as the required
binding should be defined first. It however enables the complete
shutdown of the processor at poweroff when booting with DT,
dropping the power consumption from
Increase lisibility when probing power scripts and resources by
creating dedicated functions.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
drivers/mfd/twl4030-power.c | 60 --
1 files changed, 40 insertions(+), 20 deletions(-)
diff --git
If an error occurs when loading power scripts or resources, the
registers are not correctly relocked. Fix it.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
drivers/mfd/twl4030-power.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git
Support for loading twl4030-power module via devicetree.
For now, when booting with a DT, only the poweroff callback
feature is supported through the ti,use_poweroff property.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
.../devicetree/bindings/mfd/twl4030-power.txt | 28
Remove unnecessary goto statements, causing duplicated if
conditions.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
drivers/mfd/twl4030-power.c | 38 +++---
1 files changed, 15 insertions(+), 23 deletions(-)
diff --git
On Tuesday 18 June 2013, Guennadi Liakhovetski wrote:
Hmm, you've clearly shown that this can work, but it feels like a really
odd way to
do this. I don't think we should do it this way, because it tries to be
really
generic but then cannot some of the interesting cases, e.g.
On 06/18/2013 02:11 PM, Roger Quadros wrote:
On Panda the +5V supply for DVI EDID is supplied by the
same regulator that poweres the USB Hub. Currently, the
DSS/DVI subsystem doesn't know how to manage this regulator
and so DVI EDID reads will fail if USB Hub is not enabled.
As a temporary
On Tuesday 18 June 2013, Guennadi Liakhovetski wrote:
Hi Arnd
On Mon, 17 Jun 2013, Arnd Bergmann wrote:
On Thursday 06 June 2013, Guennadi Liakhovetski wrote:
+Required properties:
+- dmas: a list of [DMA controller phandle] [MID/RID value]
pairs
+- dma-names: a
On Tuesday 18 June 2013, Jingoo Han wrote:
On Monday, June 17, 2013 9:45 PM, Arnd Bergmann wrote:
On Monday 17 June 2013 18:45:52 Jingoo Han wrote:
On Friday, June 14, 2013 9:54 PM, Arnd Bergmann wrote:
Please look up the documentation about inbound viewport and describe
in a
On Tuesday 18 June 2013, zhangfei gao wrote:
On Tue, Jun 18, 2013 at 4:58 AM, Arnd Bergmann a...@arndb.de wrote:
+static struct of_dma_filter_info k3_dma_filter;
+static bool k3_dma_filter_fn(struct dma_chan *chan, void *param)
+{
+ return (*(int *)param == chan-chan_id);
+}
Add clock changes for hdmi subsystem for exynos5250 SoC. These
include addition of new clocks like mout_hdmi and smmu_tv, associating
ID to clk_hdmiphy and some essential corrections.
This set is based on kukjin's for-next branch at
Add sclk_hdmiphy to the list of exposed clocks. This is required
by hdmi driver to change the parent of hdmi clock.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
Documentation/devicetree/bindings/clock/exynos5420-clock.txt |1 +
drivers/clk/samsung/clk-exynos5420.c
sclk_pixel is used to represent pixel clock divider on all exynos
SoCs not as a gate clock. It is queried in driver to pass as the
parent to hdmi clock while switching between parents. A new ID can
be asssigned Pixel gate clock which is currently not in use. Pixel
clock gate is default 'on'.
hdmi driver needs to change the parent of hdmi clock
to pixel clock or hdmiphy clock, based on the stability
of hdmiphy. This patch is exposing the mux for changing
the parent.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
Documentation/devicetree/bindings/clock/exynos5420-clock.txt |
Listing sclk_hdmiphy at 0th position in the list of parents is
causing wrong configuration in reg SRC_DISP10.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Tuesday 18 June 2013, Heiko Stübner wrote:
Side comment: I think it would be nice if the generic code did this
init if a l2x0 device node was in the device tree, since the only
reason to override init_machine is to do this call in addition to
of_platform_populate().
Arnd said similar
With this patch, it is at par with Exynos5250 and Exynos4 clocks
where sclk_pixel ID is assigned to a divider clock but in real,
sclk_pixel is listed under gate clocks (enum value).
Alternate to this, I can allocate a new ID, div_pixel, listed under
new category of Divider Clocks for Exyno4, 5250
Patch adds of_get_next_child and of_get_next_available_child
stubs for non-OF builds.
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
include/linux/of.h | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/include/linux/of.h b/include/linux/of.h
index
Adding sysmmu clock for tv for exynos5420.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
Documentation/devicetree/bindings/clock/exynos5420-clock.txt |1 +
drivers/clk/samsung/clk-exynos5420.c |3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
Hi,
On Tuesday 18 June 2013 06:05 PM, Felipe Balbi wrote:
Hi,
On Tue, Jun 18, 2013 at 04:43:44PM +0530, Kishon Vijay Abraham I wrote:
On Tue, Jun 18, 2013 at 03:34:36PM +0530, Kishon Vijay Abraham I wrote:
On Tuesday 18 June 2013 03:14 PM, Felipe Balbi wrote:
On Thu, Jun 13, 2013 at
Hi,
On Tue, Jun 18, 2013 at 08:25:00PM +0530, Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 18 June 2013 06:05 PM, Felipe Balbi wrote:
Hi,
On Tue, Jun 18, 2013 at 04:43:44PM +0530, Kishon Vijay Abraham I wrote:
On Tue, Jun 18, 2013 at 03:34:36PM +0530, Kishon Vijay Abraham I wrote:
On
On Tue, Jun 18, 2013 at 1:36 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
Maybe what we need is something like this:
static DEFINE_SPINLOCK(io_lock);
static void modifyl(u32 new, u32 mask, void __iomem *reg)
{
unsigned long flags;
u32 val;
On Tuesday 18 June 2013 22:22:17 zhangfei wrote:
With no need to have a filter function.
Cool, then I would like to wait for the patch.
Maybe you can try to add the dma_get_slave_channel() function I proposed here
as a first patch and add your driver on top. There may be issues I missed,
and
Jaehoon,
On Mon, Jun 17, 2013 at 9:51 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi Doug,
I have one question for using clock-frequency.
I found the fixed-rate-clocks feature.
If we want to set clock-frequency, then can we use the fixed-rate-clocks?
i'm not sure how use the
On Tue, Jun 18, 2013 at 5:11 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Tue, Jun 18, 2013 at 05:02:49PM +0200, Linus Walleij wrote:
Nowadays I would do the above with regmap_update_bits().
Mutual exclusion for read-modify-write of individual bits in a
register is one of
Although the internal register window size is 1 MiB, the previous
ranges translation for the internal register space had a size of
0x400. This was done to allow the crypto and nand node to access
the corresponding 'sram' and 'nand' decoding windows.
In order to describe the hardware more
Hi Pavel,
Am Dienstag, 18. Juni 2013, 17:02:44 schrieb Pavel Machek:
Hi!
The following 2 patches will eliminate the need for the patch in John
Stultz's tree. If there is to be merge of the 2 trees, then the
patch:
dw_apb_timer_of.c: Remove parts that were picoxcell-specific
can
On Tue, Jun 18, 2013 at 05:02:49PM +0200, Linus Walleij wrote:
Nowadays I would do the above with regmap_update_bits().
Mutual exclusion for read-modify-write of individual bits in a
register is one of those cases where doing a regmap over
a memory-mapped register range makes a lot of sense.
Hi Benoit Tony,
The first two patches make changes to dts files to get USB host support
and DVI EDID to work on Panda.
The third patch should get USB host functional on uEVM.
The fourth patch is a temporary workaround to create a clock alias to
the USB PHY clock as it is not possible to define
Provide the RESET and Power regulators for the USB PHY,
the USB Host port mode and the PHY device.
Also provide pin multiplexer information for the USB host
pins.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap4-panda-common.dtsi | 62 +
1
On Panda the +5V supply for DVI EDID is supplied by the
same regulator that poweres the USB Hub. Currently, the
DSS/DVI subsystem doesn't know how to manage this regulator
and so DVI EDID reads will fail if USB Hub is not enabled.
As a temporary fix we keep this regulator permanently enabled
on
Till the OMAP clocks are correctly defined in device tree, use
this temporary hack to provide clock alias to the USB PHY clocks.
Without this, USB Host Ethernet will not be functional with
device tree boots on Panda and uEVM.
Signed-off-by: Roger Quadros rog...@ti.com
---
USB Host PHY clock on port 2 must be configured to 19.2MHz.
Provide this information.
CC: Sricharan R r.sricha...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap5-uevm.dts |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git
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